1bafec742SSukumar Swaminathan /* 2bafec742SSukumar Swaminathan * CDDL HEADER START 3bafec742SSukumar Swaminathan * 4bafec742SSukumar Swaminathan * The contents of this file are subject to the terms of the 5bafec742SSukumar Swaminathan * Common Development and Distribution License (the "License"). 6bafec742SSukumar Swaminathan * You may not use this file except in compliance with the License. 7bafec742SSukumar Swaminathan * 8bafec742SSukumar Swaminathan * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9bafec742SSukumar Swaminathan * or http://www.opensolaris.org/os/licensing. 10bafec742SSukumar Swaminathan * See the License for the specific language governing permissions 11bafec742SSukumar Swaminathan * and limitations under the License. 12bafec742SSukumar Swaminathan * 13bafec742SSukumar Swaminathan * When distributing Covered Code, include this CDDL HEADER in each 14bafec742SSukumar Swaminathan * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15bafec742SSukumar Swaminathan * If applicable, add the following below this CDDL HEADER, with the 16bafec742SSukumar Swaminathan * fields enclosed by brackets "[]" replaced with your own identifying 17bafec742SSukumar Swaminathan * information: Portions Copyright [yyyy] [name of copyright owner] 18bafec742SSukumar Swaminathan * 19bafec742SSukumar Swaminathan * CDDL HEADER END 20bafec742SSukumar Swaminathan */ 21bafec742SSukumar Swaminathan 22bafec742SSukumar Swaminathan /* 23accf27a5SSukumar Swaminathan * Copyright 2010 QLogic Corporation. All rights reserved. 24bafec742SSukumar Swaminathan */ 25bafec742SSukumar Swaminathan 26bafec742SSukumar Swaminathan #ifndef _QLGE_H 27bafec742SSukumar Swaminathan #define _QLGE_H 28bafec742SSukumar Swaminathan 29bafec742SSukumar Swaminathan #ifdef __cplusplus 30bafec742SSukumar Swaminathan extern "C" { 31bafec742SSukumar Swaminathan #endif 32bafec742SSukumar Swaminathan 33bafec742SSukumar Swaminathan #include <sys/ddi.h> 34bafec742SSukumar Swaminathan #include <sys/sunddi.h> 35bafec742SSukumar Swaminathan #include <sys/sunmdi.h> 36bafec742SSukumar Swaminathan #include <sys/modctl.h> 37bafec742SSukumar Swaminathan #include <sys/pci.h> 38bafec742SSukumar Swaminathan #include <sys/dlpi.h> 39bafec742SSukumar Swaminathan #include <sys/sdt.h> 40bafec742SSukumar Swaminathan #include <sys/mac_provider.h> 41bafec742SSukumar Swaminathan #include <sys/mac.h> 42bafec742SSukumar Swaminathan #include <sys/mac_flow.h> 43bafec742SSukumar Swaminathan #include <sys/mac_ether.h> 44bafec742SSukumar Swaminathan #include <sys/vlan.h> 45bafec742SSukumar Swaminathan #include <sys/netlb.h> 46bafec742SSukumar Swaminathan #include <sys/kmem.h> 47bafec742SSukumar Swaminathan #include <sys/file.h> 48bafec742SSukumar Swaminathan #include <sys/proc.h> 49bafec742SSukumar Swaminathan #include <sys/callb.h> 50bafec742SSukumar Swaminathan #include <sys/disp.h> 51bafec742SSukumar Swaminathan #include <sys/strsun.h> 52bafec742SSukumar Swaminathan #include <sys/ethernet.h> 53bafec742SSukumar Swaminathan #include <sys/miiregs.h> 54bafec742SSukumar Swaminathan #include <sys/kstat.h> 55bafec742SSukumar Swaminathan #include <sys/byteorder.h> 56accf27a5SSukumar Swaminathan #include <sys/ddifm.h> 57accf27a5SSukumar Swaminathan #include <sys/fm/protocol.h> 58accf27a5SSukumar Swaminathan #include <sys/fm/util.h> 59accf27a5SSukumar Swaminathan #include <sys/fm/io/ddi.h> 60bafec742SSukumar Swaminathan 61bafec742SSukumar Swaminathan #include <qlge_hw.h> 62bafec742SSukumar Swaminathan #include <qlge_dbg.h> 63bafec742SSukumar Swaminathan #include <qlge_open.h> 64bafec742SSukumar Swaminathan 65bafec742SSukumar Swaminathan #define ADAPTER_NAME "qlge" 66bafec742SSukumar Swaminathan 67bafec742SSukumar Swaminathan /* 68bafec742SSukumar Swaminathan * Local Macro Definitions. 69bafec742SSukumar Swaminathan */ 70bafec742SSukumar Swaminathan #ifdef TRUE 71bafec742SSukumar Swaminathan #undef TRUE 72bafec742SSukumar Swaminathan #endif 73bafec742SSukumar Swaminathan #define TRUE 1 74bafec742SSukumar Swaminathan 75bafec742SSukumar Swaminathan #ifdef FALSE 76bafec742SSukumar Swaminathan #undef FALSE 77bafec742SSukumar Swaminathan #endif 78bafec742SSukumar Swaminathan #define FALSE 0 79bafec742SSukumar Swaminathan 80bafec742SSukumar Swaminathan /* #define QLGE_TRACK_BUFFER_USAGE */ 81bafec742SSukumar Swaminathan /* 82bafec742SSukumar Swaminathan * byte order, sparc is big endian, x86 is little endian, 83bafec742SSukumar Swaminathan * but PCI is little endian only 84bafec742SSukumar Swaminathan */ 85bafec742SSukumar Swaminathan #ifdef sparc 86bafec742SSukumar Swaminathan #define cpu_to_le64(x) BSWAP_64(x) 87bafec742SSukumar Swaminathan #define cpu_to_le32(x) BSWAP_32(x) 88bafec742SSukumar Swaminathan #define cpu_to_le16(x) BSWAP_16(x) 89bafec742SSukumar Swaminathan #define le64_to_cpu(x) cpu_to_le64(x) 90bafec742SSukumar Swaminathan #define le32_to_cpu(x) cpu_to_le32(x) 91bafec742SSukumar Swaminathan #define le16_to_cpu(x) cpu_to_le16(x) 92bafec742SSukumar Swaminathan #else 93bafec742SSukumar Swaminathan #define cpu_to_le64(x) (x) 94bafec742SSukumar Swaminathan #define cpu_to_le32(x) (x) 95bafec742SSukumar Swaminathan #define cpu_to_le16(x) (x) 96bafec742SSukumar Swaminathan #define le64_to_cpu(x) (x) 97bafec742SSukumar Swaminathan #define le32_to_cpu(x) (x) 98bafec742SSukumar Swaminathan #define le16_to_cpu(x) (x) 99bafec742SSukumar Swaminathan #endif 100bafec742SSukumar Swaminathan 101bafec742SSukumar Swaminathan /* 102bafec742SSukumar Swaminathan * Macros to help code, maintain, etc. 103bafec742SSukumar Swaminathan */ 104bafec742SSukumar Swaminathan 105bafec742SSukumar Swaminathan #define LSB(x) (uint8_t)(x) 106bafec742SSukumar Swaminathan #define MSB(x) (uint8_t)((uint16_t)(x) >> 8) 107bafec742SSukumar Swaminathan 108bafec742SSukumar Swaminathan #define MSW(x) (uint16_t)((uint32_t)(x) >> 16) 109bafec742SSukumar Swaminathan #define LSW(x) (uint16_t)(x) 110bafec742SSukumar Swaminathan 111bafec742SSukumar Swaminathan #define MS32(x) (uint32_t)((uint32_t)(x) >> 32) 112bafec742SSukumar Swaminathan #define LS32(x) (uint32_t)(x) 113bafec742SSukumar Swaminathan 114bafec742SSukumar Swaminathan #define MSW_LSB(x) (uint8_t)(LSB(MSW(x))) 115bafec742SSukumar Swaminathan #define MSW_MSB(x) (uint8_t)(MSB(MSW(x))) 116bafec742SSukumar Swaminathan 117bafec742SSukumar Swaminathan #define LSD(x) (uint32_t)(x) 118bafec742SSukumar Swaminathan #define MSD(x) (uint32_t)((uint64_t)(x) >> 32) 119bafec742SSukumar Swaminathan 120bafec742SSukumar Swaminathan #define SHORT_TO_LONG(a, b) (uint32_t)((uint16_t)b << 16 | (uint16_t)a) 121bafec742SSukumar Swaminathan #define CHAR_TO_SHORT(a, b) (uint16_t)((uint8_t)b << 8 | (uint8_t)a) 122bafec742SSukumar Swaminathan 123bafec742SSukumar Swaminathan #define SWAP_ENDIAN_16(x) ((LSB(x) << 8) | MSB(x)) 124bafec742SSukumar Swaminathan 125bafec742SSukumar Swaminathan #define SWAP_ENDIAN_32(x) ((SWAP_ENDIAN_16(LSW(x)) << 16) | \ 126bafec742SSukumar Swaminathan SWAP_ENDIAN_16(MSW(x))) 127bafec742SSukumar Swaminathan 128bafec742SSukumar Swaminathan #define SWAP_ENDIAN_64(x) ((SWAP_ENDIAN_32(LS32(x)) << 32) | \ 129bafec742SSukumar Swaminathan SWAP_ENDIAN_32(MS32(x))) 130bafec742SSukumar Swaminathan 131bafec742SSukumar Swaminathan #define QL_MIN(x, y) ((x < y) ? x : y) 132bafec742SSukumar Swaminathan 133bafec742SSukumar Swaminathan #define CARRIER_ON(qlge) mac_link_update((qlge)->mh, LINK_STATE_UP) 134bafec742SSukumar Swaminathan #define CARRIER_OFF(qlge) mac_link_update((qlge)->mh, LINK_STATE_DOWN) 135bafec742SSukumar Swaminathan 136bafec742SSukumar Swaminathan /* 137bafec742SSukumar Swaminathan * qlge local function return status codes 138bafec742SSukumar Swaminathan */ 139bafec742SSukumar Swaminathan #define QL_ERROR 1 140bafec742SSukumar Swaminathan #define QL_SUCCESS 0 141bafec742SSukumar Swaminathan /* 142bafec742SSukumar Swaminathan * Solaris version compatibility definitions. 143bafec742SSukumar Swaminathan */ 144bafec742SSukumar Swaminathan #define QL_GET_LBOLT(timer) timer = ddi_get_lbolt() 145bafec742SSukumar Swaminathan #define QL_DMA_XFER_COUNTER (uint64_t)0xffffffff 146bafec742SSukumar Swaminathan #define QL_DRIVER_NAME(dip) ddi_driver_name(ddi_get_parent(dip)) 147bafec742SSukumar Swaminathan 148bafec742SSukumar Swaminathan #define MINOR_NODE_FLAG 8 149bafec742SSukumar Swaminathan 150bafec742SSukumar Swaminathan /* 151bafec742SSukumar Swaminathan * Host adapter default definitions. 152bafec742SSukumar Swaminathan */ 153bafec742SSukumar Swaminathan 154bafec742SSukumar Swaminathan /* Timeout timer counts in seconds (must greater than 1 second). */ 155bafec742SSukumar Swaminathan #define USEC_PER_TICK drv_hztousec(1) 156bafec742SSukumar Swaminathan #define TICKS_PER_SEC drv_usectohz(1000000) 157bafec742SSukumar Swaminathan #define QL_ONE_SEC_DELAY 1000000 158bafec742SSukumar Swaminathan #define QL_ONE_MSEC_DELAY 1000 159bafec742SSukumar Swaminathan #define TX_TIMEOUT 3*TICKS_PER_SEC 160bafec742SSukumar Swaminathan /* 161bafec742SSukumar Swaminathan * DMA attributes definitions. 162bafec742SSukumar Swaminathan */ 163bafec742SSukumar Swaminathan #define QL_DMA_LOW_ADDRESS (uint64_t)0 164bafec742SSukumar Swaminathan #define QL_DMA_HIGH_64BIT_ADDRESS (uint64_t)0xffffffffffffffffull 165bafec742SSukumar Swaminathan #define QL_DMA_HIGH_32BIT_ADDRESS (uint64_t)0xffffffff 166bafec742SSukumar Swaminathan #define QL_DMA_ADDRESS_ALIGNMENT (uint64_t)8 167bafec742SSukumar Swaminathan #define QL_DMA_ALIGN_8_BYTE_BOUNDARY (uint64_t)BIT_3 168bafec742SSukumar Swaminathan #define QL_DMA_RING_ADDRESS_ALIGNMENT (uint64_t)64 169bafec742SSukumar Swaminathan #define QL_DMA_ALIGN_64_BYTE_BOUNDARY (uint64_t)BIT_6 170bafec742SSukumar Swaminathan #define QL_DMA_BURSTSIZES 0xfff 171bafec742SSukumar Swaminathan #define QL_DMA_MIN_XFER_SIZE 1 172bafec742SSukumar Swaminathan #define QL_DMA_MAX_XFER_SIZE (uint64_t)0xffffffff 173bafec742SSukumar Swaminathan #define QL_DMA_SEGMENT_BOUNDARY (uint64_t)0xffffffff 174bafec742SSukumar Swaminathan #define QL_DMA_GRANULARITY 1 175bafec742SSukumar Swaminathan #define QL_DMA_XFER_FLAGS 0 176bafec742SSukumar Swaminathan #define QL_MAX_COOKIES 16 177bafec742SSukumar Swaminathan 178bafec742SSukumar Swaminathan /* 179bafec742SSukumar Swaminathan * ISP PCI Configuration. 180bafec742SSukumar Swaminathan */ 181bafec742SSukumar Swaminathan #define QL_INTR_INTERVAL 128 /* default interrupt interval 128us */ 182bafec742SSukumar Swaminathan #define QL_INTR_PKTS 8 /* default packet count threshold 8us */ 183bafec742SSukumar Swaminathan 184bafec742SSukumar Swaminathan /* GLD */ 185bafec742SSukumar Swaminathan #define QL_STREAM_OPS(dev_ops, attach, detach) \ 186bafec742SSukumar Swaminathan DDI_DEFINE_STREAM_OPS(dev_ops, nulldev, nulldev, attach, detach, \ 187bafec742SSukumar Swaminathan nodev, NULL, D_MP, NULL, ql_quiesce) 188bafec742SSukumar Swaminathan 189bafec742SSukumar Swaminathan #define QL_GET_DEV(dip) ((qlge_t *)(ddi_get_driver_private(dip))) 190bafec742SSukumar Swaminathan #define RESUME_TX(tx_ring) mac_tx_update(tx_ring->qlge->mh); 191bafec742SSukumar Swaminathan #define RX_UPSTREAM(rx_ring, mp) mac_rx(rx_ring->qlge->mh, \ 192bafec742SSukumar Swaminathan rx_ring->qlge->handle, mp); 193bafec742SSukumar Swaminathan 194bafec742SSukumar Swaminathan /* GLD DMA */ 195bafec742SSukumar Swaminathan extern ddi_device_acc_attr_t ql_dev_acc_attr; 196bafec742SSukumar Swaminathan extern ddi_device_acc_attr_t ql_desc_acc_attr; 197bafec742SSukumar Swaminathan extern ddi_device_acc_attr_t ql_buf_acc_attr; 198bafec742SSukumar Swaminathan 199bafec742SSukumar Swaminathan struct dma_info { 200bafec742SSukumar Swaminathan void *vaddr; 201bafec742SSukumar Swaminathan ddi_dma_handle_t dma_handle; 202bafec742SSukumar Swaminathan ddi_acc_handle_t acc_handle; 203bafec742SSukumar Swaminathan uint64_t dma_addr; 204bafec742SSukumar Swaminathan size_t mem_len; /* allocated size */ 205bafec742SSukumar Swaminathan offset_t offset; /* relative to handle */ 206bafec742SSukumar Swaminathan }; 207bafec742SSukumar Swaminathan 208bafec742SSukumar Swaminathan /* 209bafec742SSukumar Swaminathan * Sync a DMA area described by a dma_info 210bafec742SSukumar Swaminathan */ 211bafec742SSukumar Swaminathan #define DMA_SYNC(area, flag) ((void) ddi_dma_sync((area).dma_handle, \ 212bafec742SSukumar Swaminathan (area).offset, (area).mem_len, (flag))) 213bafec742SSukumar Swaminathan 214bafec742SSukumar Swaminathan /* 215bafec742SSukumar Swaminathan * Find the (kernel virtual) address of block of memory 216bafec742SSukumar Swaminathan * described by a dma_info 217bafec742SSukumar Swaminathan */ 218bafec742SSukumar Swaminathan #define DMA_VPTR(area) ((area).vaddr) 219bafec742SSukumar Swaminathan 220bafec742SSukumar Swaminathan /* 221bafec742SSukumar Swaminathan * Zero a block of memory described by a dma_info 222bafec742SSukumar Swaminathan */ 223bafec742SSukumar Swaminathan #define DMA_ZERO(area) bzero(DMA_VPTR(area), (area).mem_len) 224bafec742SSukumar Swaminathan 225bafec742SSukumar Swaminathan #define MAX_SG_ELEMENTS 16 226bafec742SSukumar Swaminathan #define QL_MAX_TX_DMA_HANDLES MAX_SG_ELEMENTS 227bafec742SSukumar Swaminathan #define TOTAL_SG_ELEMENTS (MAX_SG_ELEMENTS + TX_DESC_PER_IOCB) 228bafec742SSukumar Swaminathan 229bafec742SSukumar Swaminathan /* 230bafec742SSukumar Swaminathan * ISP PCI Configuration. 231bafec742SSukumar Swaminathan */ 232bafec742SSukumar Swaminathan 233bafec742SSukumar Swaminathan /* Initialize steps */ 234bafec742SSukumar Swaminathan #define INIT_SOFTSTATE_ALLOC BIT_0 235bafec742SSukumar Swaminathan #define INIT_REGS_SETUP BIT_1 236bafec742SSukumar Swaminathan #define INIT_DOORBELL_REGS_SETUP BIT_2 237bafec742SSukumar Swaminathan #define INIT_MAC_ALLOC BIT_3 238bafec742SSukumar Swaminathan #define INIT_PCI_CONFIG_SETUP BIT_4 239bafec742SSukumar Swaminathan #define INIT_SETUP_RINGS BIT_5 240bafec742SSukumar Swaminathan #define INIT_MEMORY_ALLOC BIT_6 241bafec742SSukumar Swaminathan #define INIT_INTR_ALLOC BIT_7 242bafec742SSukumar Swaminathan #define INIT_ADD_INTERRUPT BIT_8 243bafec742SSukumar Swaminathan #define INIT_LOCKS_CREATED BIT_9 244bafec742SSukumar Swaminathan #define INIT_ADD_SOFT_INTERRUPT BIT_10 245bafec742SSukumar Swaminathan #define INIT_MUTEX BIT_11 246bafec742SSukumar Swaminathan #define ADAPTER_INIT BIT_12 247bafec742SSukumar Swaminathan #define INIT_MAC_REGISTERED BIT_13 248bafec742SSukumar Swaminathan #define INIT_KSTATS BIT_14 249accf27a5SSukumar Swaminathan #define INIT_FM BIT_15 250accf27a5SSukumar Swaminathan #define INIT_ADAPTER_UP BIT_16 251accf27a5SSukumar Swaminathan #define INIT_ALLOC_RX_BUF BIT_17 252accf27a5SSukumar Swaminathan #define INIT_INTR_ENABLED BIT_18 253bafec742SSukumar Swaminathan 254bafec742SSukumar Swaminathan 255bafec742SSukumar Swaminathan #define LS_64BITS(x) (uint32_t)(0xffffffff & ((uint64_t)x)) 256bafec742SSukumar Swaminathan #define MS_64BITS(x) (uint32_t)(0xffffffff & (((uint64_t)x)>>16>>16)) 257bafec742SSukumar Swaminathan 258bafec742SSukumar Swaminathan typedef uint64_t dma_addr_t; 259bafec742SSukumar Swaminathan extern int ql_quiesce(dev_info_t *dip); 260bafec742SSukumar Swaminathan 261bafec742SSukumar Swaminathan /* 262accf27a5SSukumar Swaminathan * LSO can support up to 65535 bytes of data, but can not be sent in one IOCB 263bafec742SSukumar Swaminathan * which only has 8 TX OALs, additional OALs must be applied separately. 264bafec742SSukumar Swaminathan */ 265accf27a5SSukumar Swaminathan #define QL_LSO_MAX 65535 /* Maximum supported LSO data Length */ 266bafec742SSukumar Swaminathan 267bafec742SSukumar Swaminathan enum tx_mode_t { 268bafec742SSukumar Swaminathan USE_DMA, 269bafec742SSukumar Swaminathan USE_COPY 270bafec742SSukumar Swaminathan }; 271bafec742SSukumar Swaminathan 272bafec742SSukumar Swaminathan #define QL_MAX_COPY_LENGTH 256 273bafec742SSukumar Swaminathan 274bafec742SSukumar Swaminathan #define MAX_FRAGMENTS_IN_IOCB 7 275bafec742SSukumar Swaminathan 276bafec742SSukumar Swaminathan #ifndef VLAN_ID_MASK 277bafec742SSukumar Swaminathan #define VLAN_ID_MASK 0x0fffu 278bafec742SSukumar Swaminathan #endif 279bafec742SSukumar Swaminathan #ifndef VLAN_TAGSZ 280bafec742SSukumar Swaminathan #define VLAN_TAGSZ 4 281bafec742SSukumar Swaminathan #endif 282bafec742SSukumar Swaminathan 283bafec742SSukumar Swaminathan #ifndef ETHERTYPE_VLAN 284bafec742SSukumar Swaminathan #define ETHERTYPE_VLAN 0x8100 285bafec742SSukumar Swaminathan #endif 286bafec742SSukumar Swaminathan 287bafec742SSukumar Swaminathan #ifndef MBLKL 288bafec742SSukumar Swaminathan #define MBLKL(mp) ((uintptr_t)(mp)->b_wptr - (uintptr_t)(mp)->b_rptr) 289bafec742SSukumar Swaminathan #endif 290bafec742SSukumar Swaminathan /* 291bafec742SSukumar Swaminathan * Checksum Offload 292bafec742SSukumar Swaminathan */ 293bafec742SSukumar Swaminathan #define TCP_CKSUM_OFFSET 16 294bafec742SSukumar Swaminathan #define UDP_CKSUM_OFFSET 6 295bafec742SSukumar Swaminathan #define IPPROTO_IPv6OVERv4 41 296bafec742SSukumar Swaminathan 297bafec742SSukumar Swaminathan /* 298bafec742SSukumar Swaminathan * Driver must be in one of these states 299bafec742SSukumar Swaminathan */ 300bafec742SSukumar Swaminathan enum mac_state { 301bafec742SSukumar Swaminathan QL_MAC_INIT, /* in the initialization stage */ 302bafec742SSukumar Swaminathan QL_MAC_ATTACHED, /* driver attached */ 303bafec742SSukumar Swaminathan QL_MAC_STARTED, /* interrupt enabled, driver is ready */ 304bafec742SSukumar Swaminathan QL_MAC_BRINGDOWN, /* in the bring down process */ 305bafec742SSukumar Swaminathan QL_MAC_STOPPED, /* stoped, no more interrupts */ 306bafec742SSukumar Swaminathan QL_MAC_DETACH, /* to be detached */ 307bafec742SSukumar Swaminathan QL_MAC_SUSPENDED 308bafec742SSukumar Swaminathan }; 309bafec742SSukumar Swaminathan 310bafec742SSukumar Swaminathan /* 311bafec742SSukumar Swaminathan * Soft Request Flag 312bafec742SSukumar Swaminathan */ 313bafec742SSukumar Swaminathan #define NEED_HW_RESET BIT_0 /* need hardware reset */ 314bafec742SSukumar Swaminathan #define NEED_MPI_RESET BIT_1 /* need MPI RISC reset */ 315bafec742SSukumar Swaminathan 316bafec742SSukumar Swaminathan /* 317bafec742SSukumar Swaminathan * (Internal) return values from ioctl subroutines 318bafec742SSukumar Swaminathan */ 319bafec742SSukumar Swaminathan enum ioc_reply { 320bafec742SSukumar Swaminathan IOC_INVAL = -1, /* bad, NAK with EINVAL */ 321bafec742SSukumar Swaminathan IOC_DONE, /* OK, reply sent */ 322bafec742SSukumar Swaminathan IOC_ACK, /* OK, just send ACK */ 323bafec742SSukumar Swaminathan IOC_REPLY, /* OK, just send reply */ 324bafec742SSukumar Swaminathan IOC_RESTART_ACK, /* OK, restart & ACK */ 325bafec742SSukumar Swaminathan IOC_RESTART_REPLY /* OK, restart & reply */ 326bafec742SSukumar Swaminathan }; 327bafec742SSukumar Swaminathan 328bafec742SSukumar Swaminathan /* 329bafec742SSukumar Swaminathan * Link Speed,in Mbps 330bafec742SSukumar Swaminathan */ 331bafec742SSukumar Swaminathan #define SPEED_10 10 332bafec742SSukumar Swaminathan #define SPEED_100 100 333bafec742SSukumar Swaminathan #define SPEED_1000 1000 334bafec742SSukumar Swaminathan #define SPEED_10G 10000 335bafec742SSukumar Swaminathan 336bafec742SSukumar Swaminathan /* 337bafec742SSukumar Swaminathan * Multicast List 338bafec742SSukumar Swaminathan */ 339bafec742SSukumar Swaminathan typedef struct { 340bafec742SSukumar Swaminathan struct ether_addr addr; 341bafec742SSukumar Swaminathan unsigned char reserved[2]; 342bafec742SSukumar Swaminathan } ql_multicast_addr; 343bafec742SSukumar Swaminathan 344bafec742SSukumar Swaminathan #define MAX_MULTICAST_LIST_SIZE 128 345bafec742SSukumar Swaminathan 346bafec742SSukumar Swaminathan typedef struct { 347bafec742SSukumar Swaminathan struct ether_addr addr; /* in canonical form */ 348bafec742SSukumar Swaminathan boolean_t set; /* B_TRUE => valid */ 349bafec742SSukumar Swaminathan } qlge_mac_addr_t; 350bafec742SSukumar Swaminathan 351bafec742SSukumar Swaminathan #define MAX_UNICAST_LIST_SIZE 128 352bafec742SSukumar Swaminathan 353bafec742SSukumar Swaminathan /* 354bafec742SSukumar Swaminathan * Device kstate structure. 355bafec742SSukumar Swaminathan */ 356bafec742SSukumar Swaminathan enum { 357bafec742SSukumar Swaminathan QL_KSTAT_CHIP = 0, 358bafec742SSukumar Swaminathan QL_KSTAT_LINK, 359bafec742SSukumar Swaminathan QL_KSTAT_REG, 360bafec742SSukumar Swaminathan QL_KSTAT_COUNT 361bafec742SSukumar Swaminathan }; 362bafec742SSukumar Swaminathan 363bafec742SSukumar Swaminathan /* 364bafec742SSukumar Swaminathan * Register Bit Set/Reset 365bafec742SSukumar Swaminathan */ 366bafec742SSukumar Swaminathan enum { 367bafec742SSukumar Swaminathan BIT_SET = 0, 368bafec742SSukumar Swaminathan BIT_RESET 369bafec742SSukumar Swaminathan }; 370bafec742SSukumar Swaminathan 371bafec742SSukumar Swaminathan /* 372bafec742SSukumar Swaminathan * Flash Image Search State 373bafec742SSukumar Swaminathan */ 374bafec742SSukumar Swaminathan enum { STOP_SEARCH, /* Image address bad, no more search */ 375bafec742SSukumar Swaminathan CONTINUE_SEARCH, /* Image address ok, continue search */ 376bafec742SSukumar Swaminathan LAST_IMAGE_FOUND /* Found last image and FLTDS address */ 377bafec742SSukumar Swaminathan }; 378bafec742SSukumar Swaminathan 379bafec742SSukumar Swaminathan /* 380bafec742SSukumar Swaminathan * Loop Back Modes 381bafec742SSukumar Swaminathan */ 382bafec742SSukumar Swaminathan enum { QLGE_LOOP_NONE, 383bafec742SSukumar Swaminathan QLGE_LOOP_INTERNAL_PARALLEL, 384bafec742SSukumar Swaminathan QLGE_LOOP_INTERNAL_SERIAL, 385bafec742SSukumar Swaminathan QLGE_LOOP_EXTERNAL_PHY 386bafec742SSukumar Swaminathan }; 387bafec742SSukumar Swaminathan 388bafec742SSukumar Swaminathan /* for soft state routine */ 389bafec742SSukumar Swaminathan typedef struct { 390bafec742SSukumar Swaminathan offset_t index; 391bafec742SSukumar Swaminathan char *name; 392bafec742SSukumar Swaminathan } ql_ksindex_t; 393bafec742SSukumar Swaminathan 394bafec742SSukumar Swaminathan struct bq_desc { 395bafec742SSukumar Swaminathan struct dma_info bd_dma; 396bafec742SSukumar Swaminathan struct bq_desc *next; 397bafec742SSukumar Swaminathan struct rx_ring *rx_ring; 398bafec742SSukumar Swaminathan mblk_t *mp; 399bafec742SSukumar Swaminathan frtn_t rx_recycle; /* recycle function - called after mp */ 400bafec742SSukumar Swaminathan /* is to be freed by OS */ 401bafec742SSukumar Swaminathan uint16_t index; 402bafec742SSukumar Swaminathan uint16_t free_buf; /* Set to indicate the buffer is */ 403bafec742SSukumar Swaminathan /* being freed, new one should not */ 404bafec742SSukumar Swaminathan /* be allocated */ 405bafec742SSukumar Swaminathan uint32_t upl_inuse; /* buffer in use by upper layers */ 406bafec742SSukumar Swaminathan }; 407bafec742SSukumar Swaminathan 408bafec742SSukumar Swaminathan #define VM_PAGE_SIZE 4096 409bafec742SSukumar Swaminathan 410bafec742SSukumar Swaminathan #define QLGE_POLL_ALL -1 411bafec742SSukumar Swaminathan 412bafec742SSukumar Swaminathan #define SMALL_BUFFER_SIZE 512 413bafec742SSukumar Swaminathan #define LARGE_BUFFER_SIZE 4096 414bafec742SSukumar Swaminathan 415bafec742SSukumar Swaminathan #define MAX_TX_WAIT_COUNT 1000 416bafec742SSukumar Swaminathan #define MAX_RX_WAIT_COUNT 25 /* 25 second */ 417bafec742SSukumar Swaminathan 418bafec742SSukumar Swaminathan #define MIN_BUFFERS_ARM_COUNT 16 419bafec742SSukumar Swaminathan #define MIN_BUFFERS_FREE_COUNT 32 /* If free buffer count go over this */ 420bafec742SSukumar Swaminathan /* value, arm the chip */ 421bafec742SSukumar Swaminathan /* if less than 16 free lrg buf nodes in the free list, then */ 422bafec742SSukumar Swaminathan /* rx has to use copy method to send packets upstream */ 423bafec742SSukumar Swaminathan #define RX_COPY_MODE_THRESHOLD (MIN_BUFFERS_ARM_COUNT/4) 424bafec742SSukumar Swaminathan /* if there are more than TX_STOP_THRESHOLD free tx buffers, try to send it */ 425bafec742SSukumar Swaminathan #define TX_STOP_THRESHOLD 16 426bafec742SSukumar Swaminathan #define TX_RESUME_THRESHOLD 8 427bafec742SSukumar Swaminathan 428bafec742SSukumar Swaminathan struct tx_ring_desc { 429bafec742SSukumar Swaminathan struct ob_mac_iocb_req *queue_entry; /* tx descriptor of this */ 430bafec742SSukumar Swaminathan struct dma_info dma_mem_area; /* tx buffer */ 431bafec742SSukumar Swaminathan ddi_dma_handle_t tx_dma_handle[QL_MAX_TX_DMA_HANDLES]; 432bafec742SSukumar Swaminathan int tx_dma_handle_used; 433bafec742SSukumar Swaminathan enum tx_mode_t tx_type; /* map mode or copy mode */ 434bafec742SSukumar Swaminathan mblk_t *mp; /* requested sending packet */ 435bafec742SSukumar Swaminathan uint32_t index; 436bafec742SSukumar Swaminathan caddr_t copy_buffer; 437bafec742SSukumar Swaminathan uint64_t copy_buffer_dma_addr; 438bafec742SSukumar Swaminathan struct dma_info oal_dma; /* oal is premapped */ 439bafec742SSukumar Swaminathan uint64_t oal_dma_addr; /* oal dma address premapped */ 440bafec742SSukumar Swaminathan uint32_t tx_bytes; 441bafec742SSukumar Swaminathan void *oal; 442bafec742SSukumar Swaminathan }; 443bafec742SSukumar Swaminathan 444bafec742SSukumar Swaminathan struct tx_ring { 445bafec742SSukumar Swaminathan struct qlge *qlge; 446bafec742SSukumar Swaminathan struct dma_info wqicb_dma; 447bafec742SSukumar Swaminathan uint16_t cq_id; /* completion (rx) queue for */ 448bafec742SSukumar Swaminathan /* tx completions */ 449bafec742SSukumar Swaminathan uint8_t wq_id; 450bafec742SSukumar Swaminathan uint32_t wq_size; 451bafec742SSukumar Swaminathan uint32_t wq_len; 452bafec742SSukumar Swaminathan kmutex_t tx_lock; 453bafec742SSukumar Swaminathan struct dma_info wq_dma; 454bafec742SSukumar Swaminathan volatile uint32_t tx_free_count; 455bafec742SSukumar Swaminathan uint32_t tx_mode; 456bafec742SSukumar Swaminathan boolean_t queue_stopped; /* Tx no resource */ 457bafec742SSukumar Swaminathan uint32_t *prod_idx_db_reg; 458bafec742SSukumar Swaminathan uint16_t prod_idx; 459bafec742SSukumar Swaminathan uint32_t *valid_db_reg; /* PCI doorbell mem area + 4 */ 460bafec742SSukumar Swaminathan struct tx_ring_desc *wq_desc; 461bafec742SSukumar Swaminathan /* shadow copy of consumer idx */ 462bafec742SSukumar Swaminathan uint32_t *cnsmr_idx_sh_reg; 463bafec742SSukumar Swaminathan /* dma-shadow copy consumer */ 464bafec742SSukumar Swaminathan uint64_t cnsmr_idx_sh_reg_dma; 465bafec742SSukumar Swaminathan uint32_t defer; /* tx no resource */ 466bafec742SSukumar Swaminathan uint64_t obytes; 467bafec742SSukumar Swaminathan uint64_t opackets; 468bafec742SSukumar Swaminathan uint32_t errxmt; 469bafec742SSukumar Swaminathan uint64_t brdcstxmt; 470bafec742SSukumar Swaminathan uint64_t multixmt; 471bafec742SSukumar Swaminathan uint64_t tx_fail_dma_bind; 472bafec742SSukumar Swaminathan uint64_t tx_no_dma_handle; 473bafec742SSukumar Swaminathan uint64_t tx_no_dma_cookie; 474bafec742SSukumar Swaminathan 475bafec742SSukumar Swaminathan enum mac_state mac_flags; 476bafec742SSukumar Swaminathan }; 477bafec742SSukumar Swaminathan 478bafec742SSukumar Swaminathan struct bq_element { 479bafec742SSukumar Swaminathan uint32_t addr_lo; 480bafec742SSukumar Swaminathan uint32_t addr_hi; 481bafec742SSukumar Swaminathan }; 482bafec742SSukumar Swaminathan 483bafec742SSukumar Swaminathan /* 484bafec742SSukumar Swaminathan * Type of inbound queue. 485bafec742SSukumar Swaminathan */ 486bafec742SSukumar Swaminathan enum { 487bafec742SSukumar Swaminathan DEFAULT_Q = 2, /* Handles slow queue and chip/MPI events. */ 488bafec742SSukumar Swaminathan TX_Q = 3, /* Handles outbound completions. */ 489bafec742SSukumar Swaminathan RX_Q = 4, /* Handles inbound completions. */ 490bafec742SSukumar Swaminathan }; 491bafec742SSukumar Swaminathan 492bafec742SSukumar Swaminathan struct rx_ring { 493bafec742SSukumar Swaminathan struct dma_info cqicb_dma; 494bafec742SSukumar Swaminathan 495bafec742SSukumar Swaminathan /* GLD required flags */ 496bafec742SSukumar Swaminathan uint64_t ring_gen_num; 497bafec742SSukumar Swaminathan /* statistics */ 498bafec742SSukumar Swaminathan uint64_t rx_packets; 499bafec742SSukumar Swaminathan uint64_t rx_bytes; 500bafec742SSukumar Swaminathan uint32_t frame_too_long; 501bafec742SSukumar Swaminathan uint32_t frame_too_short; 502bafec742SSukumar Swaminathan uint32_t fcs_err; 503bafec742SSukumar Swaminathan uint32_t rx_packets_dropped_no_buffer; 504bafec742SSukumar Swaminathan uint32_t rx_pkt_dropped_mac_unenabled; 505bafec742SSukumar Swaminathan volatile uint32_t rx_indicate; 506bafec742SSukumar Swaminathan 507bafec742SSukumar Swaminathan /* miscellaneous */ 508bafec742SSukumar Swaminathan int type; /* DEFAULT_Q, TX_Q, RX_Q */ 509bafec742SSukumar Swaminathan kmutex_t rx_lock; 510bafec742SSukumar Swaminathan uint32_t irq; 511bafec742SSukumar Swaminathan struct qlge *qlge; 512bafec742SSukumar Swaminathan uint32_t cpu; /* Which CPU this should run on. */ 513bafec742SSukumar Swaminathan enum mac_state mac_flags; 514bafec742SSukumar Swaminathan /* completion queue */ 515bafec742SSukumar Swaminathan struct dma_info cq_dma; /* virtual addr and phy addr */ 516bafec742SSukumar Swaminathan uint32_t cq_size; 517bafec742SSukumar Swaminathan uint32_t cq_len; 518bafec742SSukumar Swaminathan uint16_t cq_id; 519accf27a5SSukumar Swaminathan off_t prod_idx_sh_reg_offset; 520bafec742SSukumar Swaminathan volatile uint32_t *prod_idx_sh_reg; /* Shadowed prod reg */ 521bafec742SSukumar Swaminathan uint64_t prod_idx_sh_reg_dma; /* Physical address */ 522bafec742SSukumar Swaminathan uint32_t *cnsmr_idx_db_reg; /* PCI db mem area 0 */ 523bafec742SSukumar Swaminathan uint32_t cnsmr_idx; /* current sw idx */ 524bafec742SSukumar Swaminathan struct net_rsp_iocb *curr_entry; /* next entry on queue */ 525bafec742SSukumar Swaminathan uint32_t *valid_db_reg; /* PCI doorbell mem area + 4 */ 526bafec742SSukumar Swaminathan 527bafec742SSukumar Swaminathan /* large buffer queue */ 528bafec742SSukumar Swaminathan uint32_t lbq_len; /* entry count */ 529bafec742SSukumar Swaminathan uint32_t lbq_size; /* size in bytes */ 530bafec742SSukumar Swaminathan uint32_t lbq_buf_size; 531bafec742SSukumar Swaminathan struct dma_info lbq_dma; /* lbq dma info */ 532bafec742SSukumar Swaminathan uint64_t *lbq_base_indirect; 533bafec742SSukumar Swaminathan uint64_t lbq_base_indirect_dma; 534bafec742SSukumar Swaminathan kmutex_t lbq_lock; 535bafec742SSukumar Swaminathan struct bq_desc **lbuf_in_use; 536bafec742SSukumar Swaminathan volatile uint32_t lbuf_in_use_count; 537bafec742SSukumar Swaminathan struct bq_desc **lbuf_free; 538bafec742SSukumar Swaminathan volatile uint32_t lbuf_free_count; /* free lbuf desc cnt */ 539bafec742SSukumar Swaminathan uint32_t *lbq_prod_idx_db_reg; /* PCI db mem area+0x18 */ 540bafec742SSukumar Swaminathan uint32_t lbq_prod_idx; /* current sw prod idx */ 541bafec742SSukumar Swaminathan uint32_t lbq_curr_idx; /* next entry we expect */ 542bafec742SSukumar Swaminathan uint32_t lbq_free_tail; /* free tail */ 543bafec742SSukumar Swaminathan uint32_t lbq_free_head; /* free head */ 544bafec742SSukumar Swaminathan uint32_t lbq_use_tail; /* inuse tail */ 545bafec742SSukumar Swaminathan uint32_t lbq_use_head; /* inuse head */ 546bafec742SSukumar Swaminathan 547bafec742SSukumar Swaminathan struct bq_desc *lbq_desc; 548bafec742SSukumar Swaminathan 549bafec742SSukumar Swaminathan /* small buffer queue */ 550bafec742SSukumar Swaminathan uint32_t sbq_len; /* entry count */ 551bafec742SSukumar Swaminathan uint32_t sbq_size; /* size in bytes of queue */ 552bafec742SSukumar Swaminathan uint32_t sbq_buf_size; 553bafec742SSukumar Swaminathan struct dma_info sbq_dma; /* sbq dma info */ 554bafec742SSukumar Swaminathan uint64_t *sbq_base_indirect; 555bafec742SSukumar Swaminathan uint64_t sbq_base_indirect_dma; 556bafec742SSukumar Swaminathan kmutex_t sbq_lock; 557bafec742SSukumar Swaminathan struct bq_desc **sbuf_in_use; 558bafec742SSukumar Swaminathan volatile uint32_t sbuf_in_use_count; 559bafec742SSukumar Swaminathan struct bq_desc **sbuf_free; 560bafec742SSukumar Swaminathan volatile uint32_t sbuf_free_count; /* free buffer desc cnt */ 561bafec742SSukumar Swaminathan uint32_t *sbq_prod_idx_db_reg; /* PCI db mem area+0x1c */ 562bafec742SSukumar Swaminathan uint32_t sbq_prod_idx; /* current sw prod idx */ 563bafec742SSukumar Swaminathan uint32_t sbq_curr_idx; /* next entry we expect */ 564bafec742SSukumar Swaminathan uint32_t sbq_free_tail; /* free tail */ 565bafec742SSukumar Swaminathan uint32_t sbq_free_head; /* free head */ 566bafec742SSukumar Swaminathan uint32_t sbq_use_tail; /* inuse tail */ 567bafec742SSukumar Swaminathan uint32_t sbq_use_head; /* inuse head */ 568bafec742SSukumar Swaminathan struct bq_desc *sbq_desc; 569bafec742SSukumar Swaminathan /* for test purpose */ 570bafec742SSukumar Swaminathan uint32_t rx_failed_sbq_allocs; 571bafec742SSukumar Swaminathan uint32_t rx_failed_lbq_allocs; 572bafec742SSukumar Swaminathan uint32_t sbuf_copy_count; 573bafec742SSukumar Swaminathan uint32_t lbuf_copy_count; 574bafec742SSukumar Swaminathan 575accf27a5SSukumar Swaminathan #ifdef QLGE_PERFORMANCE 576accf27a5SSukumar Swaminathan uint32_t hist[8]; 577accf27a5SSukumar Swaminathan #endif 578bafec742SSukumar Swaminathan }; 579bafec742SSukumar Swaminathan 580bafec742SSukumar Swaminathan struct intr_ctx { 581bafec742SSukumar Swaminathan struct qlge *qlge; 582bafec742SSukumar Swaminathan uint32_t intr; 583bafec742SSukumar Swaminathan uint32_t hooked; 584bafec742SSukumar Swaminathan uint32_t intr_en_mask; 585bafec742SSukumar Swaminathan uint32_t intr_dis_mask; 586bafec742SSukumar Swaminathan uint32_t intr_read_mask; 587bafec742SSukumar Swaminathan /* 588bafec742SSukumar Swaminathan * It's incremented for 589bafec742SSukumar Swaminathan * each irq handler that is scheduled. 590bafec742SSukumar Swaminathan * When each handler finishes it 591bafec742SSukumar Swaminathan * decrements irq_cnt and enables 592bafec742SSukumar Swaminathan * interrupts if it's zero. 593bafec742SSukumar Swaminathan */ 594bafec742SSukumar Swaminathan uint32_t irq_cnt; 595bafec742SSukumar Swaminathan uint_t (*handler)(caddr_t, caddr_t); 596bafec742SSukumar Swaminathan }; 597bafec742SSukumar Swaminathan 598bafec742SSukumar Swaminathan struct tx_buf_desc { 599bafec742SSukumar Swaminathan uint64_t addr; 600bafec742SSukumar Swaminathan uint32_t len; 601bafec742SSukumar Swaminathan #define TX_DESC_LEN_MASK 0x000fffff 602bafec742SSukumar Swaminathan #define TX_DESC_C 0x40000000 603bafec742SSukumar Swaminathan #define TX_DESC_E 0x80000000 604bafec742SSukumar Swaminathan }; 605bafec742SSukumar Swaminathan 606bafec742SSukumar Swaminathan typedef struct qlge { 607bafec742SSukumar Swaminathan /* 608bafec742SSukumar Swaminathan * Solaris adapter configuration data 609bafec742SSukumar Swaminathan */ 610bafec742SSukumar Swaminathan dev_info_t *dip; 611bafec742SSukumar Swaminathan int instance; 612bafec742SSukumar Swaminathan ddi_acc_handle_t dev_handle; 613bafec742SSukumar Swaminathan caddr_t iobase; 614bafec742SSukumar Swaminathan ddi_acc_handle_t dev_doorbell_reg_handle; 615bafec742SSukumar Swaminathan caddr_t doorbell_reg_iobase; 616bafec742SSukumar Swaminathan pci_cfg_t pci_cfg; 617bafec742SSukumar Swaminathan ddi_acc_handle_t pci_handle; 618bafec742SSukumar Swaminathan uint32_t page_size; 619bafec742SSukumar Swaminathan uint32_t sequence; 620bafec742SSukumar Swaminathan struct intr_ctx intr_ctx[MAX_RX_RINGS]; 621bafec742SSukumar Swaminathan struct dma_info ricb_dma; 622accf27a5SSukumar Swaminathan /* fault management capabilities */ 623accf27a5SSukumar Swaminathan int fm_capabilities; 624accf27a5SSukumar Swaminathan boolean_t fm_enable; 625bafec742SSukumar Swaminathan enum mac_state mac_flags; 626bafec742SSukumar Swaminathan 627bafec742SSukumar Swaminathan volatile uint32_t cfg_flags; 628bafec742SSukumar Swaminathan 629bafec742SSukumar Swaminathan #define CFG_JUMBLE_PACKET BIT_1 630bafec742SSukumar Swaminathan #define CFG_RX_COPY_MODE BIT_2 631bafec742SSukumar Swaminathan #define CFG_SUPPORT_MULTICAST BIT_3 632bafec742SSukumar Swaminathan #define CFG_HW_UNABLE_PSEUDO_HDR_CKSUM BIT_4 633bafec742SSukumar Swaminathan #define CFG_CKSUM_HEADER_IPv4 BIT_5 634bafec742SSukumar Swaminathan #define CFG_CKSUM_PARTIAL BIT_6 635bafec742SSukumar Swaminathan #define CFG_CKSUM_FULL_IPv4 BIT_7 636bafec742SSukumar Swaminathan #define CFG_CKSUM_FULL_IPv6 BIT_8 637bafec742SSukumar Swaminathan #define CFG_LSO BIT_9 638bafec742SSukumar Swaminathan #define CFG_SUPPORT_SCATTER_GATHER BIT_10 639bafec742SSukumar Swaminathan #define CFG_ENABLE_SPLIT_HEADER BIT_11 640bafec742SSukumar Swaminathan #define CFG_ENABLE_EXTENDED_LOGGING BIT_15 641bafec742SSukumar Swaminathan uint32_t chksum_cap; 642bafec742SSukumar Swaminathan volatile uint32_t flags; 643bafec742SSukumar Swaminathan #define CFG_CHIP_8100 BIT_16 644bafec742SSukumar Swaminathan 645bafec742SSukumar Swaminathan #define CFG_IST(qlge, cfgflags) (qlge->cfg_flags & cfgflags) 646bafec742SSukumar Swaminathan 647bafec742SSukumar Swaminathan /* For Shadow Registers, used by adapter to write to host memory */ 648bafec742SSukumar Swaminathan struct dma_info host_copy_shadow_dma_attr; 649bafec742SSukumar Swaminathan /* 650bafec742SSukumar Swaminathan * Extra 2x8 bytes memory saving large/small buf queue base address 651bafec742SSukumar Swaminathan * for each CQICB and read by chip, new request since 8100 652bafec742SSukumar Swaminathan */ 653bafec742SSukumar Swaminathan struct dma_info buf_q_ptr_base_addr_dma_attr; 654bafec742SSukumar Swaminathan /* 655bafec742SSukumar Swaminathan * Debugging 656bafec742SSukumar Swaminathan */ 657bafec742SSukumar Swaminathan uint32_t ql_dbgprnt; 658bafec742SSukumar Swaminathan /* 659bafec742SSukumar Swaminathan * GLD 660bafec742SSukumar Swaminathan */ 661bafec742SSukumar Swaminathan mac_handle_t mh; 662bafec742SSukumar Swaminathan mac_resource_handle_t handle; 663bafec742SSukumar Swaminathan ql_stats_t stats; 664bafec742SSukumar Swaminathan kstat_t *ql_kstats[QL_KSTAT_COUNT]; 665bafec742SSukumar Swaminathan /* 666bafec742SSukumar Swaminathan * mutex 667bafec742SSukumar Swaminathan */ 668bafec742SSukumar Swaminathan kmutex_t gen_mutex; /* general adapter mutex */ 669bafec742SSukumar Swaminathan kmutex_t hw_mutex; /* common hw(nvram)access */ 670bafec742SSukumar Swaminathan 671bafec742SSukumar Swaminathan /* 672bafec742SSukumar Swaminathan * Generic timer 673bafec742SSukumar Swaminathan */ 674bafec742SSukumar Swaminathan timeout_id_t ql_timer_timeout_id; 675bafec742SSukumar Swaminathan clock_t ql_timer_ticks; 676bafec742SSukumar Swaminathan 677bafec742SSukumar Swaminathan /* 678bafec742SSukumar Swaminathan * Interrupt 679bafec742SSukumar Swaminathan */ 680bafec742SSukumar Swaminathan int intr_type; 681bafec742SSukumar Swaminathan /* for legacy interrupt */ 682bafec742SSukumar Swaminathan ddi_iblock_cookie_t iblock_cookie; 683bafec742SSukumar Swaminathan /* for MSI and Fixed interrupts */ 684bafec742SSukumar Swaminathan ddi_intr_handle_t *htable; /* For array of interrupts */ 685bafec742SSukumar Swaminathan int intr_cnt; /* # of intrs actually allocated */ 686bafec742SSukumar Swaminathan uint_t intr_pri; /* Interrupt priority */ 687bafec742SSukumar Swaminathan int intr_cap; /* Interrupt capabilities */ 688bafec742SSukumar Swaminathan size_t intr_size; /* size of the allocated */ 689bafec742SSukumar Swaminathan /* interrupt handlers */ 690bafec742SSukumar Swaminathan /* Power management context. */ 691bafec742SSukumar Swaminathan uint8_t power_level; 692bafec742SSukumar Swaminathan #define LOW_POWER_LEVEL (BIT_1 | BIT_0) 693bafec742SSukumar Swaminathan #define MAX_POWER_LEVEL 0 694bafec742SSukumar Swaminathan 695bafec742SSukumar Swaminathan /* 696bafec742SSukumar Swaminathan * General NIC 697bafec742SSukumar Swaminathan */ 698bafec742SSukumar Swaminathan uint32_t xgmac_sem_mask; 699bafec742SSukumar Swaminathan uint32_t xgmac_sem_bits; 700bafec742SSukumar Swaminathan uint32_t func_number; 701bafec742SSukumar Swaminathan uint32_t fn0_net; /* network function 0 port */ 702bafec742SSukumar Swaminathan uint32_t fn1_net; /* network function 1 port */ 703bafec742SSukumar Swaminathan 704bafec742SSukumar Swaminathan uint32_t mtu; 705accf27a5SSukumar Swaminathan uint32_t max_frame_size; 706bafec742SSukumar Swaminathan uint32_t port_link_state; 707bafec742SSukumar Swaminathan uint32_t speed; 708bafec742SSukumar Swaminathan uint16_t link_type; 709bafec742SSukumar Swaminathan uint32_t duplex; 710bafec742SSukumar Swaminathan uint32_t pause; /* flow-control mode */ 711bafec742SSukumar Swaminathan uint32_t loop_back_mode; 712bafec742SSukumar Swaminathan uint32_t lso_enable; 713accf27a5SSukumar Swaminathan uint32_t dcbx_enable; /* dcbx mode */ 714bafec742SSukumar Swaminathan /* 715bafec742SSukumar Swaminathan * PCI status 716bafec742SSukumar Swaminathan */ 717bafec742SSukumar Swaminathan uint16_t vendor_id; 718bafec742SSukumar Swaminathan uint16_t device_id; 719bafec742SSukumar Swaminathan 720bafec742SSukumar Swaminathan /* 721bafec742SSukumar Swaminathan * Multicast list 722bafec742SSukumar Swaminathan */ 723bafec742SSukumar Swaminathan uint32_t multicast_list_count; 724bafec742SSukumar Swaminathan ql_multicast_addr multicast_list[MAX_MULTICAST_LIST_SIZE]; 725bafec742SSukumar Swaminathan boolean_t multicast_promisc; 726bafec742SSukumar Swaminathan /* 727bafec742SSukumar Swaminathan * MAC address information 728bafec742SSukumar Swaminathan */ 729bafec742SSukumar Swaminathan struct ether_addr dev_addr; /* ethernet address read from nvram */ 730bafec742SSukumar Swaminathan qlge_mac_addr_t unicst_addr[MAX_UNICAST_LIST_SIZE]; 731bafec742SSukumar Swaminathan uint32_t unicst_total; /* total unicst addresses */ 732bafec742SSukumar Swaminathan uint32_t unicst_avail; 733bafec742SSukumar Swaminathan /* 734bafec742SSukumar Swaminathan * Soft Interrupt handlers 735bafec742SSukumar Swaminathan */ 736bafec742SSukumar Swaminathan /* soft interrupt handle for MPI interrupt */ 737bafec742SSukumar Swaminathan ddi_softint_handle_t mpi_event_intr_hdl; 738bafec742SSukumar Swaminathan /* soft interrupt handle for asic reset */ 739bafec742SSukumar Swaminathan ddi_softint_handle_t asic_reset_intr_hdl; 740bafec742SSukumar Swaminathan /* soft interrupt handle for mpi reset */ 741bafec742SSukumar Swaminathan ddi_softint_handle_t mpi_reset_intr_hdl; 742bafec742SSukumar Swaminathan /* 743bafec742SSukumar Swaminathan * IOCTL 744bafec742SSukumar Swaminathan */ 745bafec742SSukumar Swaminathan /* new ioctl admin flags to work around the 1024 max data copy in&out */ 746bafec742SSukumar Swaminathan caddr_t ioctl_buf_ptr; 747bafec742SSukumar Swaminathan uint32_t ioctl_buf_lenth; 748bafec742SSukumar Swaminathan uint16_t expected_trans_times; 749bafec742SSukumar Swaminathan uint32_t ioctl_total_length; 750bafec742SSukumar Swaminathan uint32_t ioctl_transferred_bytes; 751bafec742SSukumar Swaminathan ql_mpi_coredump_t ql_mpi_coredump; 752bafec742SSukumar Swaminathan /* 753bafec742SSukumar Swaminathan * Mailbox lock and flags 754bafec742SSukumar Swaminathan */ 755bafec742SSukumar Swaminathan boolean_t fw_init_complete; 756bafec742SSukumar Swaminathan kmutex_t mbx_mutex; 757bafec742SSukumar Swaminathan boolean_t mbx_wait_completion; 758bafec742SSukumar Swaminathan kcondvar_t cv_mbx_intr; 759bafec742SSukumar Swaminathan mbx_data_t received_mbx_cmds; 760bafec742SSukumar Swaminathan uint_t max_read_mbx; 761bafec742SSukumar Swaminathan firmware_version_info_t fw_version_info; 762bafec742SSukumar Swaminathan phy_firmware_version_info_t phy_version_info; 763bafec742SSukumar Swaminathan port_cfg_info_t port_cfg_info; 764bafec742SSukumar Swaminathan struct dma_info ioctl_buf_dma_attr; 765bafec742SSukumar Swaminathan 766bafec742SSukumar Swaminathan /* 767bafec742SSukumar Swaminathan * Flash 768bafec742SSukumar Swaminathan */ 769bafec742SSukumar Swaminathan uint32_t flash_fltds_addr; 770bafec742SSukumar Swaminathan uint32_t flash_flt_fdt_index; 771bafec742SSukumar Swaminathan uint32_t flash_fdt_addr; 772bafec742SSukumar Swaminathan uint32_t flash_fdt_size; 773bafec742SSukumar Swaminathan uint32_t flash_flt_nic_config_table_index; 774bafec742SSukumar Swaminathan uint32_t flash_nic_config_table_addr; 775bafec742SSukumar Swaminathan uint32_t flash_nic_config_table_size; 776bafec742SSukumar Swaminathan uint32_t flash_vpd_addr; 777bafec742SSukumar Swaminathan ql_flash_info_t flash_info; 778bafec742SSukumar Swaminathan ql_fltds_t fltds; 779bafec742SSukumar Swaminathan ql_flt_t flt; 780bafec742SSukumar Swaminathan uint16_t flash_len; /* size of Flash memory */ 781bafec742SSukumar Swaminathan ql_nic_config_t nic_config; 782bafec742SSukumar Swaminathan flash_desc_t fdesc; 783bafec742SSukumar Swaminathan /* 784bafec742SSukumar Swaminathan * TX / RX 785bafec742SSukumar Swaminathan */ 786bafec742SSukumar Swaminathan clock_t last_tx_time; 787bafec742SSukumar Swaminathan boolean_t rx_copy; 788bafec742SSukumar Swaminathan uint16_t rx_coalesce_usecs; 789bafec742SSukumar Swaminathan uint16_t rx_max_coalesced_frames; 790bafec742SSukumar Swaminathan uint16_t tx_coalesce_usecs; 791bafec742SSukumar Swaminathan uint16_t tx_max_coalesced_frames; 792bafec742SSukumar Swaminathan uint32_t payload_copy_thresh; 793bafec742SSukumar Swaminathan 794bafec742SSukumar Swaminathan uint32_t xg_sem_mask; 795bafec742SSukumar Swaminathan 796bafec742SSukumar Swaminathan uint32_t ip_hdr_offset; 797bafec742SSukumar Swaminathan uint32_t selected_tx_ring; 798bafec742SSukumar Swaminathan 799bafec742SSukumar Swaminathan struct rx_ring rx_ring[MAX_RX_RINGS]; 800bafec742SSukumar Swaminathan struct tx_ring tx_ring[MAX_TX_RINGS]; 801bafec742SSukumar Swaminathan uint32_t rx_polls[MAX_RX_RINGS]; 802bafec742SSukumar Swaminathan uint32_t rx_interrupts[MAX_RX_RINGS]; 803bafec742SSukumar Swaminathan 804bafec742SSukumar Swaminathan int tx_ring_size; 805bafec742SSukumar Swaminathan int rx_ring_size; 806a6766df4SSukumar Swaminathan uint32_t rx_copy_threshold; 807bafec742SSukumar Swaminathan uint32_t rx_ring_count; 808bafec742SSukumar Swaminathan uint32_t rss_ring_count; 809bafec742SSukumar Swaminathan uint32_t tx_ring_first_cq_id; 810bafec742SSukumar Swaminathan uint32_t tx_ring_count; 811accf27a5SSukumar Swaminathan uint32_t isr_stride; 812bafec742SSukumar Swaminathan #ifdef QLGE_TRACK_BUFFER_USAGE 813bafec742SSukumar Swaminathan /* Count no of times the buffers fell below 32 */ 814bafec742SSukumar Swaminathan uint32_t rx_sb_low_count[MAX_RX_RINGS]; 815bafec742SSukumar Swaminathan uint32_t rx_lb_low_count[MAX_RX_RINGS]; 816bafec742SSukumar Swaminathan uint32_t cq_low_count[MAX_RX_RINGS]; 817bafec742SSukumar Swaminathan #endif 818bafec742SSukumar Swaminathan } qlge_t; 819bafec742SSukumar Swaminathan 820bafec742SSukumar Swaminathan 821bafec742SSukumar Swaminathan /* 822bafec742SSukumar Swaminathan * Reconfiguring the network devices requires the net_config privilege 823bafec742SSukumar Swaminathan * in Solaris 10+. 824bafec742SSukumar Swaminathan */ 825bafec742SSukumar Swaminathan extern int secpolicy_net_config(const cred_t *, boolean_t); 826bafec742SSukumar Swaminathan 827bafec742SSukumar Swaminathan /* 828bafec742SSukumar Swaminathan * Global Function Prototypes in qlge_dbg.c source file. 829bafec742SSukumar Swaminathan */ 830bafec742SSukumar Swaminathan extern int ql_fw_dump(qlge_t *); 831bafec742SSukumar Swaminathan extern uint8_t ql_get8(qlge_t *, uint32_t); 832bafec742SSukumar Swaminathan extern uint16_t ql_get16(qlge_t *, uint32_t); 833bafec742SSukumar Swaminathan extern uint32_t ql_get32(qlge_t *, uint32_t); 834bafec742SSukumar Swaminathan extern void ql_put8(qlge_t *, uint32_t, uint8_t); 835bafec742SSukumar Swaminathan extern void ql_put16(qlge_t *, uint32_t, uint16_t); 836bafec742SSukumar Swaminathan extern void ql_put32(qlge_t *, uint32_t, uint32_t); 837bafec742SSukumar Swaminathan extern uint32_t ql_read_reg(qlge_t *, uint32_t); 838bafec742SSukumar Swaminathan extern void ql_write_reg(qlge_t *, uint32_t, uint32_t); 839bafec742SSukumar Swaminathan extern void ql_dump_all_contrl_regs(qlge_t *); 840bafec742SSukumar Swaminathan extern int ql_wait_reg_bit(qlge_t *, uint32_t, uint32_t, int, uint32_t); 841bafec742SSukumar Swaminathan extern void ql_dump_pci_config(qlge_t *); 842bafec742SSukumar Swaminathan extern void ql_dump_host_pci_regs(qlge_t *); 843bafec742SSukumar Swaminathan extern void ql_dump_req_pkt(qlge_t *, struct ob_mac_iocb_req *, void *, int); 844bafec742SSukumar Swaminathan extern void ql_dump_cqicb(qlge_t *, struct cqicb_t *); 845bafec742SSukumar Swaminathan extern void ql_dump_wqicb(qlge_t *, struct wqicb_t *); 846bafec742SSukumar Swaminathan extern void ql_gld3_init(qlge_t *, mac_register_t *); 847bafec742SSukumar Swaminathan enum ioc_reply ql_chip_ioctl(qlge_t *, queue_t *, mblk_t *); 848bafec742SSukumar Swaminathan enum ioc_reply ql_loop_ioctl(qlge_t *, queue_t *, mblk_t *, struct iocblk *); 849bafec742SSukumar Swaminathan extern int ql_8xxx_binary_core_dump(qlge_t *, ql_mpi_coredump_t *); 850bafec742SSukumar Swaminathan /* 851bafec742SSukumar Swaminathan * Global Data in qlge.c source file. 852bafec742SSukumar Swaminathan */ 853bafec742SSukumar Swaminathan extern void qlge_delay(clock_t usecs); 854bafec742SSukumar Swaminathan extern int ql_sem_spinlock(qlge_t *, uint32_t); 855bafec742SSukumar Swaminathan extern void ql_sem_unlock(qlge_t *, uint32_t); 856bafec742SSukumar Swaminathan extern int ql_sem_lock(qlge_t *, uint32_t, uint32_t); 857bafec742SSukumar Swaminathan extern int ql_init_misc_registers(qlge_t *); 858bafec742SSukumar Swaminathan extern int ql_init_mem_resources(qlge_t *); 859bafec742SSukumar Swaminathan extern int ql_do_start(qlge_t *); 860bafec742SSukumar Swaminathan extern int ql_do_stop(qlge_t *); 861bafec742SSukumar Swaminathan extern int ql_add_to_multicast_list(qlge_t *, uint8_t *ep); 862bafec742SSukumar Swaminathan extern int ql_remove_from_multicast_list(qlge_t *, uint8_t *); 863bafec742SSukumar Swaminathan extern void ql_set_promiscuous(qlge_t *, int); 864bafec742SSukumar Swaminathan extern void ql_get_hw_stats(qlge_t *); 865bafec742SSukumar Swaminathan extern int ql_send_common(struct tx_ring *, mblk_t *); 866bafec742SSukumar Swaminathan extern void ql_wake_asic_reset_soft_intr(qlge_t *); 867bafec742SSukumar Swaminathan extern void ql_write_doorbell_reg(qlge_t *, uint32_t *, uint32_t); 868bafec742SSukumar Swaminathan extern uint32_t ql_read_doorbell_reg(qlge_t *, uint32_t *); 869bafec742SSukumar Swaminathan extern int ql_set_mac_addr_reg(qlge_t *, uint8_t *, uint32_t, uint16_t); 870bafec742SSukumar Swaminathan extern int ql_read_xgmac_reg(qlge_t *, uint32_t, uint32_t *); 871bafec742SSukumar Swaminathan extern void ql_enable_completion_interrupt(qlge_t *, uint32_t); 872bafec742SSukumar Swaminathan extern mblk_t *ql_ring_rx_poll(void *, int); 873bafec742SSukumar Swaminathan extern void ql_disable_completion_interrupt(qlge_t *qlge, uint32_t intr); 874bafec742SSukumar Swaminathan extern mblk_t *ql_ring_tx(void *arg, mblk_t *mp); 875accf27a5SSukumar Swaminathan extern uint8_t ql_tx_hashing(qlge_t *qlge, caddr_t bp); 876bafec742SSukumar Swaminathan extern void ql_atomic_set_32(volatile uint32_t *target, uint32_t newval); 877bafec742SSukumar Swaminathan extern uint32_t ql_atomic_read_32(volatile uint32_t *target); 878bafec742SSukumar Swaminathan extern void ql_restart_timer(qlge_t *qlge); 879*cddcb3daSSukumar Swaminathan extern int ql_route_initialize(qlge_t *); 880bafec742SSukumar Swaminathan /* 881bafec742SSukumar Swaminathan * Global Function Prototypes in qlge_flash.c source file. 882bafec742SSukumar Swaminathan */ 883bafec742SSukumar Swaminathan extern int ql_sem_flash_lock(qlge_t *); 884bafec742SSukumar Swaminathan extern void ql_sem_flash_unlock(qlge_t *); 885bafec742SSukumar Swaminathan extern int qlge_load_flash(qlge_t *, uint8_t *, uint32_t, uint32_t); 886bafec742SSukumar Swaminathan extern int qlge_dump_fcode(qlge_t *, uint8_t *, uint32_t, uint32_t); 887bafec742SSukumar Swaminathan extern int ql_flash_vpd(qlge_t *qlge, uint8_t *buf); 888bafec742SSukumar Swaminathan extern int ql_get_flash_params(qlge_t *qlge); 889bafec742SSukumar Swaminathan /* 890bafec742SSukumar Swaminathan * Global Function Prototypes in qlge_mpi.c source file. 891bafec742SSukumar Swaminathan */ 892bafec742SSukumar Swaminathan extern void ql_do_mpi_intr(qlge_t *qlge); 893bafec742SSukumar Swaminathan extern int ql_reset_mpi_risc(qlge_t *); 894bafec742SSukumar Swaminathan extern int ql_get_fw_state(qlge_t *, uint32_t *); 895bafec742SSukumar Swaminathan extern int qlge_get_link_status(qlge_t *, struct qlnic_link_status_info *); 896bafec742SSukumar Swaminathan extern int ql_mbx_test(qlge_t *qlge); 897bafec742SSukumar Swaminathan extern int ql_mbx_test2(qlge_t *qlge); 898bafec742SSukumar Swaminathan extern int ql_get_port_cfg(qlge_t *qlge); 899accf27a5SSukumar Swaminathan extern int ql_set_mpi_port_config(qlge_t *qlge, port_cfg_info_t new_cfg); 900accf27a5SSukumar Swaminathan extern int ql_set_loop_back_mode(qlge_t *qlge); 901accf27a5SSukumar Swaminathan extern int ql_set_pause_mode(qlge_t *qlge); 902bafec742SSukumar Swaminathan extern int ql_get_LED_config(qlge_t *); 903bafec742SSukumar Swaminathan extern int ql_dump_sfp(qlge_t *, void *bp, int mode); 904bafec742SSukumar Swaminathan extern int ql_set_IDC_Req(qlge_t *, uint8_t dest_functions, uint8_t timeout); 905bafec742SSukumar Swaminathan extern void ql_write_flash_test(qlge_t *qlge, uint32_t testAddr); 906bafec742SSukumar Swaminathan extern void ql_write_flash_test2(qlge_t *qlge, uint32_t testAddr); 907bafec742SSukumar Swaminathan extern int ql_get_firmware_version(qlge_t *, 908bafec742SSukumar Swaminathan struct qlnic_mpi_version_info *); 909bafec742SSukumar Swaminathan extern int ql_read_processor_data(qlge_t *, uint32_t, uint32_t *); 910bafec742SSukumar Swaminathan extern int ql_write_processor_data(qlge_t *, uint32_t, uint32_t); 911bafec742SSukumar Swaminathan extern int ql_read_risc_ram(qlge_t *, uint32_t, uint64_t, uint32_t); 912bafec742SSukumar Swaminathan extern int ql_trigger_system_error_event(qlge_t *qlge); 913bafec742SSukumar Swaminathan 914bafec742SSukumar Swaminathan extern void ql_core_dump(qlge_t *); 915bafec742SSukumar Swaminathan extern void ql_dump_crash_record(qlge_t *); 916bafec742SSukumar Swaminathan extern void ql_dump_buf(char *, uint8_t *, uint8_t, uint32_t); 917bafec742SSukumar Swaminathan extern void ql_printf(const char *, ...); 918bafec742SSukumar Swaminathan 919accf27a5SSukumar Swaminathan /* 920accf27a5SSukumar Swaminathan * Global Function Prototypes in qlge_gld.c source file. 921accf27a5SSukumar Swaminathan */ 922accf27a5SSukumar Swaminathan extern int ql_unicst_set(qlge_t *qlge, const uint8_t *macaddr, int slot); 923accf27a5SSukumar Swaminathan 924accf27a5SSukumar Swaminathan /* 925accf27a5SSukumar Swaminathan * Global Function Prototypes in qlge_fm.c source file. 926accf27a5SSukumar Swaminathan */ 927accf27a5SSukumar Swaminathan extern void ql_fm_ereport(qlge_t *qlge, char *detail); 928accf27a5SSukumar Swaminathan extern int ql_fm_check_acc_handle(ddi_acc_handle_t handle); 929accf27a5SSukumar Swaminathan extern int ql_fm_check_dma_handle(ddi_dma_handle_t handle); 930accf27a5SSukumar Swaminathan 931accf27a5SSukumar Swaminathan 932bafec742SSukumar Swaminathan #ifdef __cplusplus 933bafec742SSukumar Swaminathan } 934bafec742SSukumar Swaminathan #endif 935bafec742SSukumar Swaminathan 936bafec742SSukumar Swaminathan #endif /* _QLGE_H */ 937