1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* Copyright 2009 QLogic Corporation */ 23 24 /* 25 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 26 * Use is subject to license terms. 27 */ 28 29 #ifndef _QL_MBX_H 30 #define _QL_MBX_H 31 32 /* 33 * ISP2xxx Solaris Fibre Channel Adapter (FCA) driver header file. 34 * 35 * *********************************************************************** 36 * * ** 37 * * NOTICE ** 38 * * COPYRIGHT (C) 1996-2009 QLOGIC CORPORATION ** 39 * * ALL RIGHTS RESERVED ** 40 * * ** 41 * *********************************************************************** 42 * 43 */ 44 45 #ifdef __cplusplus 46 extern "C" { 47 #endif 48 49 /* 50 * ISP mailbox Self-Test status codes 51 */ 52 #define MBS_FRM_ALIVE 0 /* Firmware Alive. */ 53 #define MBS_CHKSUM_ERR 1 /* Checksum Error. */ 54 #define MBS_BUSY 4 /* Busy. */ 55 56 /* 57 * ISP mailbox command complete status codes 58 */ 59 #define MBS_COMMAND_COMPLETE 0x4000 60 #define MBS_INVALID_COMMAND 0x4001 61 #define MBS_HOST_INTERFACE_ERROR 0x4002 62 #define MBS_TEST_FAILED 0x4003 63 #define MBS_POST_ERROR 0x4004 64 #define MBS_COMMAND_ERROR 0x4005 65 #define MBS_COMMAND_PARAMETER_ERROR 0x4006 66 #define MBS_PORT_ID_USED 0x4007 67 #define MBS_LOOP_ID_USED 0x4008 68 #define MBS_ALL_IDS_IN_USE 0x4009 69 #define MBS_NOT_LOGGED_IN 0x400A 70 #define MBS_LOOP_DOWN 0x400B 71 #define MBS_LOOP_BACK_ERROR 0x400C 72 #define MBS_CHECKSUM_ERROR 0x4010 73 74 /* 75 * Sub-error Codes for Mailbox Command Completion Status Code 4005h 76 */ 77 #define MBSS_NO_LINK 0x0001 78 #define MBSS_IOCB_ALLOC_ERR 0x0002 79 #define MBSS_ECB_ALLOC_ERR 0x0003 80 #define MBSS_CMD_FAILURE 0x0004 81 #define MBSS_NO_FABRIC 0x0005 82 #define MBSS_FIRMWARE_NOT_RDY 0x0007 83 #define MBSS_INITIATOR_DISABLED 0x0008 84 #define MBSS_NOT_LOGGED_IN 0x0009 85 #define MBSS_PARTIAL_DATA_XFER 0x000A 86 #define MBSS_TOPOLOGY_ERR 0x0016 87 #define MBSS_CHIP_RESET_NEEDED 0x0017 88 #define MBSS_MULTIPLE_OPEN_EXCH 0x0018 89 #define MBSS_IOCB_COUNT_ERR 0x0019 90 #define MBSS_CMD_AFTER_FW_INIT_ERR 0x001A 91 92 /* 93 * ISP mailbox asynchronous event status codes 94 */ 95 #define MBA_ASYNC_EVENT 0x8000 /* Asynchronous event. */ 96 #define MBA_RESET 0x8001 /* Reset Detected. */ 97 #define MBA_SYSTEM_ERR 0x8002 /* System Error. */ 98 #define MBA_REQ_TRANSFER_ERR 0x8003 /* Request Transfer Error. */ 99 #define MBA_RSP_TRANSFER_ERR 0x8004 /* Response Transfer Error. */ 100 #define MBA_WAKEUP_THRES 0x8005 /* Request Queue Wake-up. */ 101 #define MBA_MENLO_ALERT 0x800f /* Menlo Alert Notification. */ 102 #define MBA_LIP_OCCURRED 0x8010 /* Loop Initialization Procedure */ 103 /* occurred. */ 104 #define MBA_LOOP_UP 0x8011 /* FC Loop UP. */ 105 #define MBA_LOOP_DOWN 0x8012 /* FC Loop Down. */ 106 #define MBA_LIP_RESET 0x8013 /* LIP reset occurred. */ 107 #define MBA_PORT_UPDATE 0x8014 /* Port Database update. */ 108 #define MBA_RSCN_UPDATE 0x8015 /* State Change Registration. */ 109 #define MBA_LIP_F8 0x8016 /* Received a LIP F8. */ 110 #define MBA_LIP_ERROR 0x8017 /* Loop initialization errors. */ 111 #define MBA_SECURITY_UPDATE 0x801B /* FC-SP security update. */ 112 #define MBA_SCSI_COMPLETION 0x8020 /* SCSI Command Complete. */ 113 #define MBA_CTIO_COMPLETION 0x8021 /* CTIO Complete. */ 114 #define MBA_IP_COMPLETION 0x8022 /* IP Transmit Command Complete. */ 115 #define MBA_IP_RECEIVE 0x8023 /* IP Received. */ 116 #define MBA_IP_BROADCAST 0x8024 /* IP Broadcast Received. */ 117 #define MBA_IP_LOW_WATER_MARK 0x8025 /* IP Low Water Mark reached. */ 118 #define MBA_IP_RCV_BUFFER_EMPTY 0x8026 /* IP receive buffer queue empty. */ 119 #define MBA_IP_HDR_DATA_SPLIT 0x8027 /* IP header/data splitting feature */ 120 /* used. */ 121 #define MBA_POINT_TO_POINT 0x8030 /* Point to point mode. */ 122 #define MBA_CMPLT_1_16BIT 0x8031 /* Completion 1 16bit IOSB. */ 123 #define MBA_CMPLT_2_16BIT 0x8032 /* Completion 2 16bit IOSB. */ 124 #define MBA_CMPLT_3_16BIT 0x8033 /* Completion 3 16bit IOSB. */ 125 #define MBA_CMPLT_4_16BIT 0x8034 /* Completion 4 16bit IOSB. */ 126 #define MBA_CMPLT_5_16BIT 0x8035 /* Completion 5 16bit IOSB. */ 127 #define MBA_CHG_IN_CONNECTION 0x8036 /* Change in connection mode. */ 128 #define MBA_ZIO_UPDATE 0x8040 /* ZIO response queue update. */ 129 #define MBA_CMPLT_2_32BIT 0x8042 /* Completion 2 32bit IOSB. */ 130 #define MBA_PORT_BYPASS_CHANGED 0x8043 /* Crystal+ port#0 bypass transition */ 131 #define MBA_RECEIVE_ERROR 0x8048 /* Receive Error */ 132 #define MBA_LS_RJT_SENT 0x8049 /* LS_RJT response sent */ 133 #define MBA_FW_RESTART_COMP 0x8060 /* Firmware Restart Complete. */ 134 135 /* Driver defined. */ 136 #define MBA_CMPLT_1_32BIT 0x9000 /* Completion 1 32bit IOSB. */ 137 138 /* 139 * Mailbox 23 event codes 140 */ 141 #define MBX23_MBX_OR_ASYNC_EVENT 0x0 142 #define MBX23_RESPONSE_QUEUE_UPDATE 0x1 143 #define MBX23_SCSI_COMPLETION 0x2 144 145 /* 146 * Menlo alert event defines 147 */ 148 #define MLA_PANIC_RECOVERY 0x1 149 #define MLA_LOGIN_OPERATIONAL_FW 0x2 150 #define MLA_LOGIN_DIAGNOSTIC_FW 0x3 151 #define MLA_LOGIN_GOLDEN_FW 0x4 152 #define MLA_REJECT_RESPONSE 0x5 153 154 /* 155 * ISP mailbox commands 156 */ 157 #define MBC_LOAD_RAM 1 /* Load RAM. */ 158 #define MBC_EXECUTE_FIRMWARE 2 /* Execute firmware. */ 159 #define MBC_DUMP_RAM 3 /* Dump RAM. */ 160 #define MBC_WRITE_RAM_WORD 4 /* Write RAM word. */ 161 #define MBC_READ_RAM_WORD 5 /* Read RAM word. */ 162 #define MBC_MAILBOX_REGISTER_TEST 6 /* Wrap incoming mailboxes */ 163 #define MBC_VERIFY_CHECKSUM 7 /* Verify checksum. */ 164 #define MBC_ABOUT_FIRMWARE 8 /* About Firmware. */ 165 #define MBC_DUMP_RISC_RAM 0xa /* Dump RISC RAM command. */ 166 #define MBC_LOAD_RAM_EXTENDED 0xb /* Load RAM extended. */ 167 #define MBC_DUMP_RAM_EXTENDED 0xc /* Dump RAM extended. */ 168 #define MBC_READ_RAM_EXTENDED 0xf /* Read RAM extended. */ 169 #define MBC_SERDES_TRANSMIT_PARAMETERS 0x10 /* Serdes Xmit Parameters */ 170 #define MBC_2300_EXECUTE_IOCB 0x12 /* ISP2300 Execute IOCB cmd */ 171 #define MBC_GET_IO_STATUS 0x12 /* ISP2422 Get I/O Status */ 172 #define MBC_STOP_FIRMWARE 0x14 /* Stop firmware */ 173 #define MBC_ABORT_COMMAND_IOCB 0x15 /* Abort IOCB command. */ 174 #define MBC_ABORT_DEVICE 0x16 /* Abort device (ID/LUN). */ 175 #define MBC_ABORT_TARGET 0x17 /* Abort target (ID). */ 176 #define MBC_RESET 0x18 /* Target reset. */ 177 #define MBC_XMIT_PARM 0x19 /* Change default xmit parms */ 178 #define MBC_PORT_PARAM 0x1a /* Get/set port speed parms */ 179 #define MBC_GET_ID 0x20 /* Get loop id of ISP2200. */ 180 #define MBC_GET_TIMEOUT_PARAMETERS 0x22 /* Get Timeout Parameters. */ 181 #define MBC_TRACE_CONTROL 0x27 /* Trace control. */ 182 #define MBC_READ_SFP 0x31 /* Read SFP. */ 183 #define MBC_GET_FIRMWARE_OPTIONS 0x28 /* Get firmware options */ 184 #define MBC_SET_FIRMWARE_OPTIONS 0x38 /* set firmware options */ 185 #define MBC_RESET_MENLO 0x3a /* Reset Menlo. */ 186 #define MBC_LOOP_PORT_BYPASS 0x40 /* Loop Port Bypass. */ 187 #define MBC_LOOP_PORT_ENABLE 0x41 /* Loop Port Enable. */ 188 #define MBC_GET_RESOURCE_COUNTS 0x42 /* Get Resource Counts. */ 189 #define MBC_NON_PARTICIPATE 0x43 /* Non-Participating Mode. */ 190 #define MBC_ECHO 0x44 /* ELS ECHO */ 191 #define MBC_DIAGNOSTIC_LOOP_BACK 0x45 /* Diagnostic loop back. */ 192 #define MBC_ONLINE_SELF_TEST 0x46 /* Online self-test. */ 193 #define MBC_ENHANCED_GET_PORT_DATABASE 0x47 /* Get Port Database + login */ 194 #define MBC_INITIALIZE_MULTI_ID_FW 0x48 /* Initialize multi-id fw */ 195 #define MBC_RESET_LINK_STATUS 0x52 /* Reset Link Error Status */ 196 #define MBC_EXECUTE_IOCB 0x54 /* 64 Bit Execute IOCB cmd. */ 197 #define MBC_SEND_RNID_ELS 0x57 /* Send RNID ELS request */ 198 #define MBC_SET_PARAMETERS 0x59 /* Set RNID parameters */ 199 #define MBC_GET_PARAMETERS 0x5a /* Get RNID parameters */ 200 #define MBC_DATA_RATE 0x5d /* Data Rate */ 201 #define MBC_INITIALIZE_FIRMWARE 0x60 /* Initialize firmware */ 202 #define MBC_INITIATE_LIP 0x62 /* Initiate LIP */ 203 #define MBC_GET_FC_AL_POSITION_MAP 0x63 /* Get FC_AL Position Map. */ 204 #define MBC_GET_PORT_DATABASE 0x64 /* Get Port Database. */ 205 #define MBC_CLEAR_ACA 0x65 /* Clear ACA. */ 206 #define MBC_TARGET_RESET 0x66 /* Target Reset. */ 207 #define MBC_CLEAR_TASK_SET 0x67 /* Clear Task Set. */ 208 #define MBC_ABORT_TASK_SET 0x68 /* Abort Task Set. */ 209 #define MBC_GET_FIRMWARE_STATE 0x69 /* Get firmware state. */ 210 #define MBC_GET_PORT_NAME 0x6a /* Get port name. */ 211 #define MBC_GET_LINK_STATUS 0x6b /* Get Link Status. */ 212 #define MBC_LIP_RESET 0x6c /* LIP reset. */ 213 #define MBC_GET_STATUS_COUNTS 0x6d /* Get Link Statistics and */ 214 /* Private Data Counts */ 215 #define MBC_SEND_SNS_COMMAND 0x6e /* Send Simple Name Server */ 216 #define MBC_LOGIN_FABRIC_PORT 0x6f /* Login fabric port. */ 217 #define MBC_SEND_CHANGE_REQUEST 0x70 /* Send Change Request. */ 218 #define MBC_LOGOUT_FABRIC_PORT 0x71 /* Logout fabric port. */ 219 #define MBC_LIP_FULL_LOGIN 0x72 /* Full login LIP. */ 220 #define MBC_LOGIN_LOOP_PORT 0x74 /* Login Loop Port. */ 221 #define MBC_PORT_NODE_NAME_LIST 0x75 /* Get port/node name list */ 222 #define MBC_INITIALIZE_IP 0x77 /* Initialize IP */ 223 #define MBC_SEND_FARP_REQ_COMMAND 0x78 /* FARP request. */ 224 #define MBC_UNLOAD_IP 0x79 /* Unload IP */ 225 #define MBC_GET_ID_LIST 0x7c /* Get port ID list. */ 226 #define MBC_SEND_LFA_COMMAND 0x7d /* Send Loop Fabric Address */ 227 #define MBC_LUN_RESET 0x7e /* Send Task mgmt LUN reset */ 228 229 /* 230 * Mbc 20h (Get ID) returns the switch capabilities in mailbox7. 231 * The extra bits were added with 4.00.28 MID firmware. 232 */ 233 #define FLOGI_SEQ_DEL BIT_8 234 #define FLOGI_NPIV_SUPPORT BIT_10 /* implies FDISC support */ 235 #define FLOGI_VSAN_SUPPORT BIT_12 236 #define FLOGI_SP_SUPPORT BIT_13 237 238 /* 239 * Driver Mailbox command definitions. 240 */ 241 #define MAILBOX_TOV 30 /* Default Timeout value. */ 242 243 /* Mailbox command parameter structure definition. */ 244 typedef struct mbx_cmd { 245 uint32_t out_mb; /* Outgoing from driver */ 246 uint32_t in_mb; /* Incomming from RISC */ 247 uint16_t mb[MAX_MBOX_COUNT]; 248 clock_t timeout; /* Timeout in seconds. */ 249 } mbx_cmd_t; 250 251 /* Returned Mailbox registers. */ 252 typedef struct ql_mbx_data { 253 uint16_t mb[MAX_MBOX_COUNT]; 254 } ql_mbx_data_t; 255 256 /* Mailbox bit definitions for out_mb and in_mb */ 257 #define MBX_29 BIT_29 258 #define MBX_28 BIT_28 259 #define MBX_27 BIT_27 260 #define MBX_26 BIT_26 261 #define MBX_25 BIT_25 262 #define MBX_24 BIT_24 263 #define MBX_23 BIT_23 264 #define MBX_22 BIT_22 265 #define MBX_21 BIT_21 266 #define MBX_20 BIT_20 267 #define MBX_19 BIT_19 268 #define MBX_18 BIT_18 269 #define MBX_17 BIT_17 270 #define MBX_16 BIT_16 271 #define MBX_15 BIT_15 272 #define MBX_14 BIT_14 273 #define MBX_13 BIT_13 274 #define MBX_12 BIT_12 275 #define MBX_11 BIT_11 276 #define MBX_10 BIT_10 277 #define MBX_9 BIT_9 278 #define MBX_8 BIT_8 279 #define MBX_7 BIT_7 280 #define MBX_6 BIT_6 281 #define MBX_5 BIT_5 282 #define MBX_4 BIT_4 283 #define MBX_3 BIT_3 284 #define MBX_2 BIT_2 285 #define MBX_1 BIT_1 286 #define MBX_0 BIT_0 287 288 #define MBX_0_THRU_1 MBX_0|MBX_1 289 #define MBX_0_THRU_2 MBX_0_THRU_1|MBX_2 290 #define MBX_0_THRU_3 MBX_0_THRU_2|MBX_3 291 #define MBX_0_THRU_4 MBX_0_THRU_3|MBX_4 292 #define MBX_0_THRU_5 MBX_0_THRU_4|MBX_5 293 #define MBX_0_THRU_6 MBX_0_THRU_5|MBX_6 294 #define MBX_0_THRU_7 MBX_0_THRU_6|MBX_7 295 #define MBX_0_THRU_8 MBX_0_THRU_7|MBX_8 296 #define MBX_0_THRU_9 MBX_0_THRU_8|MBX_9 297 #define MBX_0_THRU_10 MBX_0_THRU_9|MBX_10 298 299 300 /* 301 * Firmware state codes from get firmware state mailbox command 302 */ 303 #define FSTATE_CONFIG_WAIT 0 304 #define FSTATE_WAIT_AL_PA 1 305 #define FSTATE_WAIT_LOGIN 2 306 #define FSTATE_READY 3 307 #define FSTATE_LOSS_SYNC 4 308 #define FSTATE_ERROR 5 309 #define FSTATE_NON_PART 7 310 311 /* 312 * Firmware options 1, 2, 3. 313 */ 314 #define FO1_AE_ON_LIPF8 BIT_0 315 #define FO1_AE_ALL_LIP_RESET BIT_1 316 #define FO1_CTIO_RETRY BIT_3 317 #define FO1_DISABLE_LIP_F7_SW BIT_4 318 #define FO1_DISABLE_100MS_LOS_WAIT BIT_5 319 #define FO1_DISABLE_GPIO BIT_6 320 #define FO1_AE_AUTO_BYPASS BIT_9 321 #define FO1_ENABLE_PURE_IOCB BIT_10 322 #define FO1_AE_PLOGI_RJT BIT_11 323 #define FO1_ENABLE_ABORT_SEQUENCE BIT_12 324 #define FO1_AE_QUEUE_FULL BIT_13 325 326 #define FO2_REV_LOOPBACK BIT_1 327 #define FO2_ENABLE_ATIO_TYPE_3 BIT_0 328 329 #define FO3_STARTUP_OPTS_VALID BIT_5 330 #define FO3_AE_RND_ERROR BIT_1 331 #define FO3_ENABLE_EMERG_IOCB BIT_0 332 333 #define FO13_LESB_NO_RESET BIT_0 334 335 /* 336 * f/w trace opcodes - mailbox 1(bits 7-0) 337 */ 338 #define FTO_INSERT_TIME_STAMP 1 339 #define FTO_RESERVED_2 2 340 #define FTO_RESERVED_3 3 341 #define FTO_EXT_TRACE_ENABLE 4 342 #define FTO_EXT_TRACE_DISABLE 5 343 #define FTO_FCE_TRACE_ENABLE 8 344 #define FTO_FCE_TRACE_DISABLE 9 345 #define FTO_FCEMAXTRACEBUF 0x840 /* max frame size */ 346 347 /* 348 * fw_attributes defines from firmware version mailbox command 349 */ 350 #define FWATTRIB_EF 0x7 351 #define FWATTRIB_TP 0x17 352 #define FWATTRIB_IP 0x37 353 #define FWATTRIB_TPX 0x117 354 #define FWATTRIB_IPX 0x137 355 #define FWATTRIB_FL 0x217 356 #define FWATTRIB_FPX 0x317 357 358 /* 359 * Diagnostic ELS ECHO parameter structure definition. 360 */ 361 typedef struct echo { 362 uint16_t options; 363 uint32_t transfer_count; 364 ddi_dma_cookie_t transfer_data_address; 365 ddi_dma_cookie_t receive_data_address; 366 } echo_t; 367 368 /* 369 * LFA command structure. 370 */ 371 #define LFA_PAYLOAD_SIZE 38 372 typedef struct lfa_cmd { 373 uint8_t resp_buffer_length[2]; /* length in 16bit words. */ 374 uint8_t reserved[2]; 375 uint8_t resp_buffer_address[8]; 376 uint8_t subcommand_length[2]; /* length in 16bit words. */ 377 uint8_t reserved_1[2]; 378 uint8_t addr[4]; 379 uint8_t subcommand[2]; 380 uint8_t payload[LFA_PAYLOAD_SIZE]; 381 } lfa_cmd_t; 382 383 /* 384 * Deivce ID list definitions. 385 */ 386 struct ql_dev_id { 387 uint8_t al_pa; 388 uint8_t area; 389 uint8_t domain; 390 uint8_t loop_id; 391 }; 392 393 struct ql_ex_dev_id { 394 uint8_t al_pa; 395 uint8_t area; 396 uint8_t domain; 397 uint8_t reserved; 398 uint8_t loop_id_l; 399 uint8_t loop_id_h; 400 }; 401 402 struct ql_24_dev_id { 403 uint8_t al_pa; 404 uint8_t area; 405 uint8_t domain; 406 uint8_t reserved; 407 uint8_t n_port_hdl_l; 408 uint8_t n_port_hdl_h; 409 uint8_t reserved_1[2]; 410 }; 411 412 typedef union ql_dev_id_list { 413 struct ql_dev_id d; 414 struct ql_ex_dev_id d_ex; 415 struct ql_24_dev_id d_24; 416 } ql_dev_id_list_t; 417 418 /* Define maximum number of device list entries.. */ 419 #define DEVICE_LIST_ENTRIES MAX_24_FIBRE_DEVICES 420 421 /* Define size of Loop Position Map. */ 422 #define LOOP_POSITION_MAP_SIZE 128 /* bytes */ 423 424 /* 425 * Port Database structure definition 426 * Little endian except where noted. 427 */ 428 #define PORT_DATABASE_SIZE 128 /* bytes */ 429 typedef struct port_database_23 { 430 uint8_t options; 431 uint8_t control; 432 uint8_t master_state; 433 uint8_t slave_state; 434 uint8_t hard_address[3]; 435 uint8_t rsvd; 436 uint32_t port_id; 437 uint8_t node_name[8]; /* Big endian. */ 438 uint8_t port_name[8]; /* Big endian. */ 439 uint16_t execution_throttle; 440 uint16_t execution_count; 441 uint8_t reset_count; 442 uint8_t reserved_2; 443 uint16_t resource_allocation; 444 uint16_t current_allocation; 445 uint16_t queue_head; 446 uint16_t queue_tail; 447 uint16_t transmit_execution_list_next; 448 uint16_t transmit_execution_list_previous; 449 uint16_t common_features; 450 uint16_t total_concurrent_sequences; 451 uint16_t RO_by_information_category; 452 uint8_t recipient; 453 uint8_t initiator; 454 uint16_t receive_data_size; 455 uint16_t concurrent_sequences; 456 uint16_t open_sequences_per_exchange; 457 uint16_t lun_abort_flags; 458 uint16_t lun_stop_flags; 459 uint16_t stop_queue_head; 460 uint16_t stop_queue_tail; 461 uint16_t port_retry_timer; 462 uint16_t next_sequence_id; 463 uint16_t frame_count; 464 uint16_t PRLI_payload_length; 465 uint16_t PRLI_service_parameter_word_0; /* Big endian */ 466 /* Bits 15-0 of word 0 */ 467 uint16_t PRLI_service_parameter_word_3; /* Big endian */ 468 /* Bits 15-0 of word 3 */ 469 uint16_t loop_id; 470 uint16_t extended_lun_info_list_pointer; 471 uint16_t extended_lun_stop_list_pointer; 472 } port_database_23_t; 473 474 typedef struct port_database_24 { 475 uint16_t flags; 476 uint8_t current_login_state; 477 uint8_t last_stable_login_state; 478 uint8_t hard_address[3]; 479 uint8_t rsvd; 480 uint8_t port_id[3]; 481 uint8_t sequence_id; 482 uint16_t port_retry_timer; 483 uint16_t n_port_handle; 484 uint16_t receive_data_size; 485 uint8_t reserved_1[2]; 486 uint16_t PRLI_service_parameter_word_0; /* Big endian */ 487 /* Bits 15-0 of word 0 */ 488 uint16_t PRLI_service_parameter_word_3; /* Big endian */ 489 /* Bits 15-0 of word 3 */ 490 uint8_t port_name[8]; /* Big endian. */ 491 uint8_t node_name[8]; /* Big endian. */ 492 uint8_t reserved_2[24]; 493 } port_database_24_t; 494 495 /* 496 * Port database slave/master/current_login/ast_stable_login states 497 */ 498 #define PD_STATE_DISCOVERY 0 499 #define PD_STATE_WAIT_DISCOVERY_ACK 1 500 #define PD_STATE_PORT_LOGIN 2 501 #define PD_STATE_WAIT_PORT_LOGIN_ACK 3 502 #define PD_STATE_PLOGI_PENDING 3 503 #define PD_STATE_PROCESS_LOGIN 4 504 #define PD_STATE_PLOGI_COMPLETED 4 505 #define PD_STATE_WAIT_PROCESS_LOGIN_ACK 5 506 #define PD_STATE_PRLI_PENDING 5 507 #define PD_STATE_PORT_LOGGED_IN 6 508 #define PD_STATE_PLOGI_PRLI_COMPLETED 6 509 #define PD_STATE_PORT_UNAVAILABLE 7 510 #define PD_STATE_PROCESS_LOGOUT 8 511 #define PD_STATE_WAIT_PROCESS_LOGOUT_ACK 9 512 #define PD_STATE_PORT_LOGOUT 10 513 #define PD_STATE_WAIT_PORT_LOGOUT_ACK 11 514 515 #define PD_PORT_LOGIN(tq) \ 516 (tq->master_state == PD_STATE_PROCESS_LOGIN || \ 517 tq->master_state == PD_STATE_PORT_LOGGED_IN || \ 518 tq->slave_state == PD_STATE_PROCESS_LOGIN || \ 519 tq->slave_state == PD_STATE_PORT_LOGGED_IN) 520 521 /* 522 * ql_login_lport() options 523 */ 524 #define LLF_NONE 0 525 #define LLF_PLOGI BIT_0 /* unconditional PLOGI */ 526 527 /* 528 * ql_login_fport() options 529 */ 530 #define LFF_NONE 0 531 #define LFF_NO_PLOGI BIT_0 532 #define LFF_NO_PRLI BIT_1 533 534 /* 535 * ql_get_port_database() options 536 */ 537 #define PDF_NONE 0 538 #define PDF_PLOGI BIT_0 539 #define PDF_ADISC BIT_1 540 541 /* 542 * ql_get_adapter_id() returned connection types 543 */ 544 #define CNX_LOOP_NO_FABRIC 0 545 #define CNX_FLPORT_IN_LOOP 1 546 #define CNX_NPORT_2_NPORT_P2P 2 547 #define CNX_FLPORT_P2P 3 548 #define CNX_NPORT_2_NPORT_NO_TGT_RSP 4 549 550 /* 551 * Global Data in ql_mbx.c source file. 552 */ 553 554 /* 555 * Global Function Prototypes in ql_mbx.c source file. 556 */ 557 int ql_initialize_ip(ql_adapter_state_t *); 558 int ql_shutdown_ip(ql_adapter_state_t *); 559 int ql_online_selftest(ql_adapter_state_t *); 560 int ql_loop_back(ql_adapter_state_t *, lbp_t *, uint32_t, uint32_t); 561 int ql_echo(ql_adapter_state_t *, echo_t *); 562 int ql_send_change_request(ql_adapter_state_t *, uint16_t); 563 int ql_send_lfa(ql_adapter_state_t *, lfa_cmd_t *); 564 int ql_clear_aca(ql_adapter_state_t *, ql_tgt_t *, uint16_t); 565 int ql_target_reset(ql_adapter_state_t *, ql_tgt_t *, uint16_t); 566 int ql_abort_target(ql_adapter_state_t *, ql_tgt_t *, uint16_t); 567 int ql_lun_reset(ql_adapter_state_t *, ql_tgt_t *, uint16_t); 568 int ql_clear_task_set(ql_adapter_state_t *, ql_tgt_t *, uint16_t); 569 int ql_abort_task_set(ql_adapter_state_t *, ql_tgt_t *, uint16_t); 570 int ql_loop_port_bypass(ql_adapter_state_t *, ql_tgt_t *); 571 int ql_loop_port_enable(ql_adapter_state_t *, ql_tgt_t *); 572 int ql_login_lport(ql_adapter_state_t *, ql_tgt_t *, uint16_t, uint16_t); 573 int ql_login_fport(ql_adapter_state_t *, ql_tgt_t *, uint16_t, uint16_t, 574 ql_mbx_data_t *); 575 int ql_logout_fabric_port(ql_adapter_state_t *, ql_tgt_t *); 576 int ql_log_iocb(ql_adapter_state_t *, ql_tgt_t *, uint16_t, uint16_t, 577 ql_mbx_data_t *); 578 int ql_get_port_database(ql_adapter_state_t *, ql_tgt_t *, uint8_t); 579 int ql_get_loop_position_map(ql_adapter_state_t *, size_t, caddr_t); 580 int ql_set_rnid_params(ql_adapter_state_t *, size_t, caddr_t); 581 int ql_send_rnid_els(ql_adapter_state_t *, uint16_t, uint8_t, size_t, caddr_t); 582 int ql_get_rnid_params(ql_adapter_state_t *, size_t, caddr_t); 583 int ql_get_link_status(ql_adapter_state_t *, uint16_t, size_t, caddr_t, 584 uint8_t); 585 int ql_get_status_counts(ql_adapter_state_t *, uint16_t, size_t, caddr_t, 586 uint8_t); 587 int ql_reset_link_status(ql_adapter_state_t *); 588 int ql_loop_reset(ql_adapter_state_t *); 589 int ql_initiate_lip(ql_adapter_state_t *); 590 int ql_full_login_lip(ql_adapter_state_t *); 591 int ql_lip_reset(ql_adapter_state_t *, uint16_t); 592 int ql_abort_command(ql_adapter_state_t *, ql_srb_t *); 593 int ql_verify_checksum(ql_adapter_state_t *); 594 int ql_get_id_list(ql_adapter_state_t *, caddr_t, uint32_t, ql_mbx_data_t *); 595 int ql_wrt_risc_ram(ql_adapter_state_t *, uint32_t, uint64_t, uint32_t); 596 int ql_rd_risc_ram(ql_adapter_state_t *, uint32_t, uint64_t, uint32_t); 597 int ql_issue_mbx_iocb(ql_adapter_state_t *, caddr_t, uint32_t); 598 int ql_mbx_wrap_test(ql_adapter_state_t *, ql_mbx_data_t *); 599 int ql_execute_fw(ql_adapter_state_t *); 600 int ql_get_firmware_option(ql_adapter_state_t *, ql_mbx_data_t *); 601 int ql_set_firmware_option(ql_adapter_state_t *, ql_mbx_data_t *); 602 int ql_init_firmware(ql_adapter_state_t *); 603 int ql_get_firmware_state(ql_adapter_state_t *, ql_mbx_data_t *); 604 int ql_get_adapter_id(ql_adapter_state_t *, ql_mbx_data_t *); 605 int ql_get_fw_version(ql_adapter_state_t *, ql_mbx_data_t *); 606 int ql_data_rate(ql_adapter_state_t *, ql_mbx_data_t *); 607 int ql_diag_loopback(ql_adapter_state_t *, caddr_t, uint32_t, uint16_t, 608 uint32_t, ql_mbx_data_t *); 609 int ql_diag_echo(ql_adapter_state_t *, caddr_t, uint32_t, uint16_t, 610 ql_mbx_data_t *); 611 int ql_serdes_param(ql_adapter_state_t *, ql_mbx_data_t *); 612 int ql_get_timeout_parameters(ql_adapter_state_t *, uint16_t *); 613 int ql_stop_firmware(ql_adapter_state_t *); 614 int ql_read_sfp(ql_adapter_state_t *, dma_mem_t *, uint16_t, uint16_t); 615 int ql_iidma_rate(ql_adapter_state_t *, uint16_t, uint32_t *, uint32_t); 616 int ql_fw_etrace(ql_adapter_state_t *, dma_mem_t *, uint16_t); 617 int ql_reset_menlo(ql_adapter_state_t *, ql_mbx_data_t *, uint16_t); 618 /* 619 * Mailbox command table initializer 620 */ 621 #define MBOX_CMD_TABLE() \ 622 { \ 623 {MBC_LOAD_RAM, "MBC_LOAD_RAM"}, \ 624 {MBC_EXECUTE_FIRMWARE, "MBC_EXECUTE_FIRMWARE"}, \ 625 {MBC_DUMP_RAM, "MBC_DUMP_RAM"}, \ 626 {MBC_WRITE_RAM_WORD, "MBC_WRITE_RAM_WORD"}, \ 627 {MBC_READ_RAM_WORD, "MBC_READ_RAM_WORD"}, \ 628 {MBC_MAILBOX_REGISTER_TEST, "MBC_MAILBOX_REGISTER_TEST"}, \ 629 {MBC_VERIFY_CHECKSUM, "MBC_VERIFY_CHECKSUM"}, \ 630 {MBC_ABOUT_FIRMWARE, "MBC_ABOUT_FIRMWARE"}, \ 631 {MBC_DUMP_RISC_RAM, "MBC_DUMP_RISC_RAM"}, \ 632 {MBC_LOAD_RAM_EXTENDED, "MBC_LOAD_RAM_EXTENDED"}, \ 633 {MBC_DUMP_RAM_EXTENDED, "MBC_DUMP_RAM_EXTENDED"}, \ 634 {MBC_READ_RAM_EXTENDED, "MBC_READ_RAM_EXTENDED"}, \ 635 {MBC_SERDES_TRANSMIT_PARAMETERS, "MBC_SERDES_TRANSMIT_PARAMETERS"},\ 636 {MBC_2300_EXECUTE_IOCB, "MBC_2300_EXECUTE_IOCB"}, \ 637 {MBC_GET_IO_STATUS, "MBC_GET_IO_STATUS"}, \ 638 {MBC_STOP_FIRMWARE, "MBC_STOP_FIRMWARE"}, \ 639 {MBC_ABORT_COMMAND_IOCB, "MBC_ABORT_COMMAND_IOCB"}, \ 640 {MBC_ABORT_DEVICE, "MBC_ABORT_DEVICE"}, \ 641 {MBC_ABORT_TARGET, "MBC_ABORT_TARGET"}, \ 642 {MBC_RESET, "MBC_RESET"}, \ 643 {MBC_XMIT_PARM, "MBC_XMIT_PARM"}, \ 644 {MBC_PORT_PARAM, "MBC_PORT_PARAM"}, \ 645 {MBC_GET_ID, "MBC_GET_ID"}, \ 646 {MBC_GET_TIMEOUT_PARAMETERS, "MBC_GET_TIMEOUT_PARAMETERS"}, \ 647 {MBC_TRACE_CONTROL, "MBC_TRACE_CONTROL"}, \ 648 {MBC_READ_SFP, "MBC_READ_SFP"}, \ 649 {MBC_GET_FIRMWARE_OPTIONS, "MBC_GET_FIRMWARE_OPTIONS"}, \ 650 {MBC_SET_FIRMWARE_OPTIONS, "MBC_SET_FIRMWARE_OPTIONS"}, \ 651 {MBC_LOOP_PORT_BYPASS, "MBC_LOOP_PORT_BYPASS"}, \ 652 {MBC_LOOP_PORT_ENABLE, "MBC_LOOP_PORT_ENABLE"}, \ 653 {MBC_GET_RESOURCE_COUNTS, "MBC_GET_RESOURCE_COUNTS"}, \ 654 {MBC_NON_PARTICIPATE, "MBC_NON_PARTICIPATE"}, \ 655 {MBC_ECHO, "MBC_ECHO"}, \ 656 {MBC_DIAGNOSTIC_LOOP_BACK, "MBC_DIAGNOSTIC_LOOP_BACK"}, \ 657 {MBC_ONLINE_SELF_TEST, "MBC_ONLINE_SELF_TEST"}, \ 658 {MBC_ENHANCED_GET_PORT_DATABASE, "MBC_ENHANCED_GET_PORT_DATABASE"},\ 659 {MBC_INITIALIZE_MULTI_ID_FW, "MBC_INITIALIZE_MULTI_ID_FW"}, \ 660 {MBC_RESET_LINK_STATUS, "MBC_RESET_LINK_STATUS"}, \ 661 {MBC_EXECUTE_IOCB, "MBC_EXECUTE_IOCB"}, \ 662 {MBC_SEND_RNID_ELS, "MBC_SEND_RNID_ELS"}, \ 663 {MBC_SET_PARAMETERS, "MBC_SET_PARAMETERS"}, \ 664 {MBC_GET_PARAMETERS, "MBC_GET_PARAMETERS"}, \ 665 {MBC_DATA_RATE, "MBC_DATA_RATE"}, \ 666 {MBC_INITIALIZE_FIRMWARE, "MBC_INITIALIZE_FIRMWARE"}, \ 667 {MBC_INITIATE_LIP, "MBC_INITIATE_LIP"}, \ 668 {MBC_GET_FC_AL_POSITION_MAP, "MBC_GET_FC_AL_POSITION_MAP"}, \ 669 {MBC_GET_PORT_DATABASE, "MBC_GET_PORT_DATABASE"}, \ 670 {MBC_CLEAR_ACA, "MBC_CLEAR_ACA"}, \ 671 {MBC_TARGET_RESET, "MBC_TARGET_RESET"}, \ 672 {MBC_CLEAR_TASK_SET, "MBC_CLEAR_TASK_SET"}, \ 673 {MBC_ABORT_TASK_SET, "MBC_ABORT_TASK_SET"}, \ 674 {MBC_GET_FIRMWARE_STATE, "MBC_GET_FIRMWARE_STATE"}, \ 675 {MBC_GET_PORT_NAME, "MBC_GET_PORT_NAME"}, \ 676 {MBC_GET_LINK_STATUS, "MBC_GET_LINK_STATUS"}, \ 677 {MBC_LIP_RESET, "MBC_LIP_RESET"}, \ 678 {MBC_GET_STATUS_COUNTS, "MBC_GET_STATUS_COUNTS"}, \ 679 {MBC_SEND_SNS_COMMAND, "MBC_SEND_SNS_COMMAND"}, \ 680 {MBC_LOGIN_FABRIC_PORT, "MBC_LOGIN_FABRIC_PORT"}, \ 681 {MBC_SEND_CHANGE_REQUEST, "MBC_SEND_CHANGE_REQUEST"}, \ 682 {MBC_LOGOUT_FABRIC_PORT, "MBC_LOGOUT_FABRIC_PORT"}, \ 683 {MBC_LIP_FULL_LOGIN, "MBC_LIP_FULL_LOGIN"}, \ 684 {MBC_LOGIN_LOOP_PORT, "MBC_LOGIN_LOOP_PORT"}, \ 685 {MBC_PORT_NODE_NAME_LIST, "MBC_PORT_NODE_NAME_LIST"}, \ 686 {MBC_INITIALIZE_IP, "MBC_INITIALIZE_IP"}, \ 687 {MBC_SEND_FARP_REQ_COMMAND, "MBC_SEND_FARP_REQ_COMMAND"}, \ 688 {MBC_UNLOAD_IP, "MBC_UNLOAD_IP"}, \ 689 {MBC_GET_ID_LIST, "MBC_GET_ID_LIST"}, \ 690 {MBC_SEND_LFA_COMMAND, "MBC_SEND_LFA_COMMAND"}, \ 691 {MBC_LUN_RESET, "MBC_LUN_RESET"}, \ 692 {NULL, "Unsupported"} \ 693 } 694 695 #ifdef __cplusplus 696 } 697 #endif 698 699 #endif /* _QL_MBX_H */ 700