1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* Copyright 2009 QLogic Corporation */ 23 24 /* 25 * File Name: exioct.h 26 * 27 * San/Device Management Ioctl Header 28 * File is created to adhere to Solaris requirement using 8-space tabs. 29 * 30 * !!!!! PLEASE DO NOT REMOVE THE TABS !!!!! 31 * !!!!! PLEASE NO SINGLE LINE COMMENTS: // !!!!! 32 * !!!!! PLEASE NO MORE THAN 80 CHARS PER LINE !!!!! 33 * 34 * *********************************************************************** 35 * * ** 36 * * NOTICE ** 37 * * COPYRIGHT (C) 2000-2009 QLOGIC CORPORATION ** 38 * * ALL RIGHTS RESERVED ** 39 * * ** 40 * *********************************************************************** 41 */ 42 43 #ifndef _EXIOCT_H 44 #define _EXIOCT_H 45 46 #ifdef __cplusplus 47 extern "C" { 48 #endif 49 50 #include <exioctso.h> 51 52 /* 53 * NOTE: the following version defines must be updated each time the 54 * changes made may affect the backward compatibility of the 55 * input/output relations of the SDM IOCTL functions. 56 */ 57 #define EXT_VERSION 5 58 59 /* 60 * OS independent General definitions 61 */ 62 #define EXT_DEF_SIGNATURE_SIZE 8 63 #define EXT_DEF_WWN_NAME_SIZE 8 64 #define EXT_DEF_WWP_NAME_SIZE 8 65 #define EXT_DEF_SERIAL_NUM_SIZE 4 66 #define EXT_DEF_PORTID_SIZE 4 67 #define EXT_DEF_PORTID_SIZE_ACTUAL 3 68 #define EXT_DEF_MAX_STR_SIZE 128 69 #define EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH 12 70 #define EXT_DEF_MAC_ADDRESS_SIZE 6 71 72 #define EXT_DEF_ADDR_MODE_32 1 73 #define EXT_DEF_ADDR_MODE_64 2 74 75 /* 76 * *********************************************************************** 77 * OS dependent General configuration defines 78 * *********************************************************************** 79 */ 80 #define EXT_DEF_MAX_HBA EXT_DEF_MAX_HBA_OS 81 #define EXT_DEF_MAX_BUS EXT_DEF_MAX_BUS_OS 82 #define EXT_DEF_MAX_TARGET EXT_DEF_MAX_TARGET_OS 83 #define EXT_DEF_MAX_LUN EXT_DEF_MAX_LUN_OS 84 #define EXT_DEF_NON_SCSI3_MAX_LUN EXT_DEF_NON_SCSI3_MAX_LUN_OS 85 86 /* 87 * *********************************************************************** 88 * Common header struct definitions for San/Device Mgmt 89 * *********************************************************************** 90 */ 91 typedef struct { 92 UINT64 Signature; /* 8 chars string */ 93 UINT64 RequestAdr; /* 8 */ 94 UINT64 ResponseAdr; /* 8 */ 95 UINT64 VendorSpecificData; /* 8 chars string */ 96 UINT32 Status; /* 4 */ 97 UINT32 DetailStatus; /* 4 */ 98 UINT32 Reserved1; /* 4 */ 99 UINT32 RequestLen; /* 4 */ 100 UINT32 ResponseLen; /* 4 */ 101 UINT16 AddrMode; /* 2 */ 102 UINT16 Version; /* 2 */ 103 UINT16 SubCode; /* 2 */ 104 UINT16 Instance; /* 2 */ 105 UINT16 HbaSelect; /* 2 */ 106 UINT16 VendorSpecificStatus[11]; /* 22 */ 107 } EXT_IOCTL, *PEXT_IOCTL; /* size = 84 / 0x54 */ 108 109 typedef union _ext_signature { 110 UINT64 Signature; 111 char bytes[EXT_DEF_SIGNATURE_SIZE]; 112 } ext_sig_t; 113 114 /* 115 * Addressing mode used by the user application 116 */ 117 #define EXT_ADDR_MODE EXT_ADDR_MODE_OS 118 119 /* 120 * Status. These macros are being used for setting Status field in 121 * EXT_IOCTL structure. 122 */ 123 #define EXT_STATUS_OK 0 124 #define EXT_STATUS_ERR 1 125 #define EXT_STATUS_BUSY 2 126 #define EXT_STATUS_PENDING 3 127 #define EXT_STATUS_SUSPENDED 4 128 #define EXT_STATUS_RETRY_PENDING 5 129 #define EXT_STATUS_INVALID_PARAM 6 130 #define EXT_STATUS_DATA_OVERRUN 7 131 #define EXT_STATUS_DATA_UNDERRUN 8 132 #define EXT_STATUS_DEV_NOT_FOUND 9 133 #define EXT_STATUS_COPY_ERR 10 134 #define EXT_STATUS_MAILBOX 11 135 #define EXT_STATUS_UNSUPPORTED_SUBCODE 12 136 #define EXT_STATUS_UNSUPPORTED_VERSION 13 137 #define EXT_STATUS_MS_NO_RESPONSE 14 138 #define EXT_STATUS_SCSI_STATUS 15 139 #define EXT_STATUS_BUFFER_TOO_SMALL 16 140 #define EXT_STATUS_NO_MEMORY 17 141 #define EXT_STATUS_UNKNOWN 18 142 #define EXT_STATUS_UNKNOWN_DSTATUS 19 143 #define EXT_STATUS_INVALID_REQUEST 20 144 #define EXT_STATUS_DEVICE_NOT_READY 21 145 #define EXT_STATUS_DEVICE_OFFLINE 22 146 #define EXT_STATUS_HBA_NOT_READY 23 147 #define EXT_STATUS_HBA_QUEUE_FULL 24 148 #define EXT_STATUS_INVALID_VPINDEX 25 149 150 /* 151 * Detail Status contains the SCSI bus status codes. 152 */ 153 154 #define EXT_DSTATUS_GOOD 0x00 155 #define EXT_DSTATUS_CHECK_CONDITION 0x02 156 #define EXT_DSTATUS_CONDITION_MET 0x04 157 #define EXT_DSTATUS_BUSY 0x08 158 #define EXT_DSTATUS_INTERMEDIATE 0x10 159 #define EXT_DSTATUS_INTERMEDIATE_COND_MET 0x14 160 #define EXT_DSTATUS_RESERVATION_CONFLICT 0x18 161 #define EXT_DSTATUS_COMMAND_TERMINATED 0x22 162 #define EXT_DSTATUS_QUEUE_FULL 0x28 163 164 /* 165 * Detail Status contains the needed Response buffer space(bytes) 166 * when Status = EXT_STATUS_BUFFER_TOO_SMALL 167 */ 168 169 170 /* 171 * Detail Status contains one of the following codes 172 * when Status = EXT_STATUS_INVALID_PARAM or 173 * = EXT_STATUS_DEV_NOT_FOUND 174 */ 175 #define EXT_DSTATUS_NOADNL_INFO 0x00 176 #define EXT_DSTATUS_HBA_INST 0x01 177 #define EXT_DSTATUS_TARGET 0x02 178 #define EXT_DSTATUS_LUN 0x03 179 #define EXT_DSTATUS_REQUEST_LEN 0x04 180 #define EXT_DSTATUS_PATH_INDEX 0x05 181 182 /* 183 * Currently supported DeviceControl / ioctl command codes 184 */ 185 #define EXT_CC_QUERY EXT_CC_QUERY_OS 186 #define EXT_CC_SEND_FCCT_PASSTHRU EXT_CC_SEND_FCCT_PASSTHRU_OS 187 #define EXT_CC_REG_AEN EXT_CC_REG_AEN_OS 188 #define EXT_CC_GET_AEN EXT_CC_GET_AEN_OS 189 #define EXT_CC_SEND_ELS_RNID EXT_CC_SEND_ELS_RNID_OS 190 #define EXT_CC_SEND_SCSI_PASSTHRU EXT_CC_SCSI_PASSTHRU_OS 191 #define EXT_CC_READ_HOST_PARAMS EXT_CC_READ_HOST_PARAMS_OS 192 #define EXT_CC_READ_RISC_PARAMS EXT_CC_READ_RISC_PARAMS_OS 193 #define EXT_CC_UPDATE_HOST_PARAMS EXT_CC_UPDATE_HOST_PARAMS_OS 194 #define EXT_CC_UPDATE_RISC_PARAMS EXT_CC_UPDATE_RISC_PARAMS_OS 195 #define EXT_CC_READ_NVRAM EXT_CC_READ_NVRAM_OS 196 #define EXT_CC_UPDATE_NVRAM EXT_CC_UPDATE_NVRAM_OS 197 #define EXT_CC_HOST_IDX EXT_CC_HOST_IDX_OS 198 #define EXT_CC_LOOPBACK EXT_CC_LOOPBACK_OS 199 #define EXT_CC_READ_OPTION_ROM EXT_CC_READ_OPTION_ROM_OS 200 #define EXT_CC_READ_OPTION_ROM_EX EXT_CC_READ_OPTION_ROM_EX_OS 201 #define EXT_CC_UPDATE_OPTION_ROM EXT_CC_UPDATE_OPTION_ROM_OS 202 #define EXT_CC_UPDATE_OPTION_ROM_EX EXT_CC_UPDATE_OPTION_ROM_EX_OS 203 #define EXT_CC_GET_VPD EXT_CC_GET_VPD_OS 204 #define EXT_CC_SET_VPD EXT_CC_SET_VPD_OS 205 #define EXT_CC_GET_FCACHE EXT_CC_GET_FCACHE_OS 206 #define EXT_CC_GET_FCACHE_EX EXT_CC_GET_FCACHE_EX_OS 207 #define EXT_CC_HOST_DRVNAME EXT_CC_HOST_DRVNAME_OS 208 #define EXT_CC_GET_SFP_DATA EXT_CC_GET_SFP_DATA_OS 209 #define EXT_CC_WWPN_TO_SCSIADDR EXT_CC_WWPN_TO_SCSIADDR_OS 210 #define EXT_CC_PORT_PARAM EXT_CC_PORT_PARAM_OS 211 #define EXT_CC_GET_PCI_DATA EXT_CC_GET_PCI_DATA_OS 212 #define EXT_CC_GET_FWEXTTRACE EXT_CC_GET_FWEXTTRACE_OS 213 #define EXT_CC_GET_FWFCETRACE EXT_CC_GET_FWFCETRACE_OS 214 #define EXT_CC_GET_VP_CNT_ID EXT_CC_GET_VP_CNT_ID_OS 215 #define EXT_CC_VPORT_CMD EXT_CC_VPORT_CMD_OS 216 #define EXT_CC_ACCESS_FLASH EXT_CC_ACCESS_FLASH_OS 217 #define EXT_CC_RESET_FW EXT_CC_RESET_FW_OS 218 219 /* 220 * HBA port operations 221 */ 222 #define EXT_CC_GET_DATA EXT_CC_GET_DATA_OS 223 #define EXT_CC_SET_DATA EXT_CC_SET_DATA_OS 224 225 /* 226 * The following DeviceControl / ioctl command codes currently are not 227 * supported. 228 */ 229 #define EXT_CC_SEND_ELS_RTIN EXT_CC_SEND_ELS_RTIN_OS 230 231 232 /* 233 * *********************************************************************** 234 * EXT_IOCTL SubCode definition. 235 * These macros are being used for setting SubCode field in EXT_IOCTL 236 * structure. 237 * *********************************************************************** 238 */ 239 240 /* 241 * Query. 242 * Uses with EXT_QUERY as the ioctl code. 243 */ 244 #define EXT_SC_QUERY_HBA_NODE 1 245 #define EXT_SC_QUERY_HBA_PORT 2 246 #define EXT_SC_QUERY_DISC_PORT 3 247 #define EXT_SC_QUERY_DISC_TGT 4 248 #define EXT_SC_QUERY_DISC_LUN 5 /* Currently Not Supported */ 249 #define EXT_SC_QUERY_DRIVER 6 250 #define EXT_SC_QUERY_FW 7 251 #define EXT_SC_QUERY_CHIP 8 252 #define EXT_SC_QUERY_CNA_PORT 9 253 254 /* 255 * Get. 256 * Uses with EXT_GET_DATA as the ioctl code 257 */ 258 /* 1 - 99 Common */ 259 #define EXT_SC_GET_SCSI_ADDR 1 /* Currently Not Supported */ 260 #define EXT_SC_GET_ERR_DETECTIONS 2 /* Currently Not Supported */ 261 #define EXT_SC_GET_STATISTICS 3 262 #define EXT_SC_GET_BUS_MODE 4 /* Currently Not Supported */ 263 #define EXT_SC_GET_DR_DUMP_BUF 5 /* Currently Not Supported */ 264 #define EXT_SC_GET_RISC_CODE 6 265 #define EXT_SC_GET_FLASH_RAM 7 266 #define EXT_SC_GET_BEACON_STATE 8 267 #define EXT_SC_GET_DCBX_PARAM 9 268 269 /* 100 - 199 FC_INTF_TYPE */ 270 #define EXT_SC_GET_LINK_STATUS 101 /* Currently Not Supported */ 271 #define EXT_SC_GET_LOOP_ID 102 /* Currently Not Supported */ 272 #define EXT_SC_GET_LUN_BITMASK 103 273 #define EXT_SC_GET_PORT_DATABASE 104 /* Currently Not Supported */ 274 #define EXT_SC_GET_PORT_DATABASE_MEM 105 /* Currently Not Supported */ 275 #define EXT_SC_GET_PORT_SUMMARY 106 276 #define EXT_SC_GET_POSITION_MAP 107 277 #define EXT_SC_GET_RETRY_CNT 108 /* Currently Not Supported */ 278 #define EXT_SC_GET_RNID 109 279 #define EXT_SC_GET_RTIN 110 /* Currently Not Supported */ 280 #define EXT_SC_GET_FC_LUN_BITMASK 111 281 #define EXT_SC_GET_FC_STATISTICS 112 282 #define EXT_SC_GET_FC4_STATISTICS 113 283 #define EXT_SC_GET_TARGET_ID 114 284 285 286 /* 200 - 299 SCSI_INTF_TYPE */ 287 #define EXT_SC_GET_SEL_TIMEOUT 201 /* Currently Not Supported */ 288 289 #define EXT_DEF_DCBX_PARAM_BUF_SIZE 4096 /* Bytes */ 290 291 /* 292 * Set. 293 * Uses with EXT_SET_DATA as the ioctl code 294 */ 295 /* 1 - 99 Common */ 296 #define EXT_SC_RST_STATISTICS 3 297 #define EXT_SC_SET_BUS_MODE 4 /* Currently Not Supported */ 298 #define EXT_SC_SET_DR_DUMP_BUF 5 /* Currently Not Supported */ 299 #define EXT_SC_SET_RISC_CODE 6 300 #define EXT_SC_SET_FLASH_RAM 7 301 #define EXT_SC_SET_BEACON_STATE 8 302 303 /* special types (non snia) */ 304 #define EXT_SC_SET_PARMS 99 /* dpb */ 305 306 /* 100 - 199 FC_INTF_TYPE */ 307 #define EXT_SC_SET_LUN_BITMASK 103 308 #define EXT_SC_SET_RETRY_CNT 108 /* Currently Not Supported */ 309 #define EXT_SC_SET_RNID 109 310 #define EXT_SC_SET_RTIN 110 /* Currently Not Supported */ 311 #define EXT_SC_SET_FC_LUN_BITMASK 111 312 #define EXT_SC_ADD_TARGET_DEVICE 112 313 #define EXT_SC_SWAP_TARGET_DEVICE 113 314 315 /* 200 - 299 SCSI_INTF_TYPE */ 316 #define EXT_SC_SET_SEL_TIMEOUT 201 /* Currently Not Supported */ 317 318 /* SCSI passthrough */ 319 #define EXT_SC_SEND_SCSI_PASSTHRU 0 320 #define EXT_SC_SEND_FC_SCSI_PASSTHRU 1 321 322 /* NVRAM */ 323 #define EXT_SC_NVRAM_HARDWARE 0 /* Save */ 324 #define EXT_SC_NVRAM_DRIVER 1 /* Driver (Apply) */ 325 #define EXT_SC_NVRAM_ALL 2 /* NVRAM/Driver (Save+Apply) */ 326 327 /* 328 * Vport functions 329 * Used with EXT_CC_VPORT_CMD as the ioctl code. 330 */ 331 #define EXT_VF_SC_VPORT_GETINFO 1 332 #define EXT_VF_SC_VPORT_DELETE 2 333 #define EXT_VF_SC_VPORT_MODIFY 3 334 #define EXT_VF_SC_VPORT_CREATE 4 335 336 /* 337 * Flash access sub codes 338 * Used with EXT_CC_ACCESS_FLASH as the ioctl code. 339 */ 340 #define EXT_SC_FLASH_READ 0 341 #define EXT_SC_FLASH_WRITE 1 342 343 /* 344 * Reset FW subcodes for Schultz 345 * Used with EXT_CC_RESET_FW as the ioctl code. 346 */ 347 #define EXT_SC_RESET_FC_FW 1 348 #define EXT_SC_RESET_MPI_FW 2 349 350 /* Read */ 351 352 /* Write */ 353 354 /* Reset */ 355 356 /* Request struct */ 357 358 359 /* 360 * Response struct 361 */ 362 typedef struct _EXT_HBA_NODE { 363 UINT32 DriverAttr; /* 4 */ 364 UINT32 FWAttr; /* 4 */ 365 UINT16 PortCount; /* 2; 1 */ 366 UINT16 InterfaceType; /* 2; FC/SCSI */ 367 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 368 UINT8 Manufacturer[EXT_DEF_MAX_STR_SIZE]; /* 128; "QLOGIC" */ 369 UINT8 Model[EXT_DEF_MAX_STR_SIZE]; /* 128; "QLA2200" */ 370 UINT8 SerialNum[EXT_DEF_SERIAL_NUM_SIZE]; /* 4; 123 */ 371 UINT8 DriverVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "7.4.3" */ 372 UINT8 FWVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "2.1.6" */ 373 UINT8 OptRomVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "1.44" */ 374 UINT8 Reserved[32]; /* 32 */ 375 } EXT_HBA_NODE, *PEXT_HBA_NODE; /* 696 */ 376 377 /* HBA node query interface type */ 378 #define EXT_DEF_FC_INTF_TYPE 1 379 #define EXT_DEF_SCSI_INTF_TYPE 2 380 #define EXT_DEF_VIRTUAL_FC_INTF_TYPE 3 381 382 typedef struct _EXT_HBA_PORT { 383 UINT64 Target; /* 8 */ 384 UINT32 PortSupportedSpeed; /* 4 */ 385 UINT32 PortSpeed; /* 4 */ 386 UINT16 Type; /* 2; Port Type */ 387 UINT16 State; /* 2; Port State */ 388 UINT16 Mode; /* 2 */ 389 UINT16 DiscPortCount; /* 2 */ 390 UINT16 DiscPortNameType; /* 2; USE_NODE_NAME or */ 391 /* USE_PORT_NAME */ 392 UINT16 DiscTargetCount; /* 2 */ 393 UINT16 Bus; /* 2 */ 394 UINT16 Lun; /* 2 */ 395 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 396 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes valid Port Id. */ 397 UINT8 PortSupportedFC4Types; /* 1 */ 398 UINT8 PortActiveFC4Types; /* 1 */ 399 UINT8 FabricName[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 400 UINT16 LinkState2; /* 2; sfp status */ 401 UINT16 LinkState3; /* 2; reserved field */ 402 UINT8 Reserved[6]; /* 6 */ 403 } EXT_HBA_PORT, *PEXT_HBA_PORT; /* 64 */ 404 405 /* FC-4 Instrumentation */ 406 typedef struct _EXT_HBA_FC4Statistics { 407 INT64 InputRequests; /* 8 */ 408 INT64 OutputRequests; /* 8 */ 409 INT64 ControlRequests; /* 8 */ 410 INT64 InputMegabytes; /* 8 */ 411 INT64 OutputMegabytes; /* 8 */ 412 UINT64 Reserved[6]; /* 48 */ 413 } EXT_HBA_FC4STATISTICS, *PEXT_HBA_FC4STATISTICS; /* 88 */ 414 415 typedef struct _EXT_LOOPBACK_REQ { 416 UINT32 TransferCount; 417 UINT32 IterationCount; 418 UINT32 BufferAddress; 419 UINT32 BufferLength; 420 UINT16 Options; 421 UINT8 Reserved[18]; 422 } EXT_LOOPBACK_REQ, *PEXT_LOOPBACK_REQ; 423 424 typedef struct _EXT_LOOPBACK_RSP { 425 UINT64 BufferAddress; 426 UINT32 BufferLength; 427 UINT32 IterationCountLastError; 428 UINT16 CompletionStatus; 429 UINT16 CrcErrorCount; 430 UINT16 DisparityErrorCount; 431 UINT16 FrameLengthErrorCount; 432 UINT8 CommandSent; 433 UINT8 Reserved[15]; 434 } EXT_LOOPBACK_RSP, *PEXT_LOOPBACK_RSP; 435 436 /* used with loopback response CommandSent */ 437 #define INT_DEF_LB_LOOPBACK_CMD 0 438 #define INT_DEF_LB_ECHO_CMD 1 439 440 /* definition for interpreting CompletionStatus values */ 441 #define EXT_DEF_LB_COMPLETE 0x4000 442 #define EXT_DEF_LB_PARAM_ERR 0x4006 443 #define EXT_DEF_LB_LOOP_DOWN 0x400b 444 #define EXT_DEF_LB_CMD_ERROR 0x400c 445 446 /* port type */ 447 #define EXT_DEF_INITIATOR_DEV 0x1 448 #define EXT_DEF_TARGET_DEV 0x2 449 #define EXT_DEF_TAPE_DEV 0x4 450 #define EXT_DEF_FABRIC_DEV 0x8 451 452 453 /* HBA port state */ 454 #define EXT_DEF_HBA_OK 0 455 #define EXT_DEF_HBA_SUSPENDED 1 456 #define EXT_DEF_HBA_LOOP_DOWN 2 457 458 /* Connection mode */ 459 #define EXT_DEF_UNKNOWN_MODE 0 460 #define EXT_DEF_P2P_MODE 1 461 #define EXT_DEF_LOOP_MODE 2 462 #define EXT_DEF_FL_MODE 3 463 #define EXT_DEF_N_MODE 4 464 465 /* Valid name type for Disc. port/target */ 466 #define EXT_DEF_USE_NODE_NAME 1 467 #define EXT_DEF_USE_PORT_NAME 2 468 469 /* FC4 type values */ 470 #define EXT_DEF_FC4_TYPE_SCSI 0x1 471 #define EXT_DEF_FC4_TYPE_IP 0x2 472 #define EXT_DEF_FC4_TYPE_SCTP 0x4 473 #define EXT_DEF_FC4_TYPE_VI 0x8 474 475 /* IIDMA rate values */ 476 #define IIDMA_RATE_1GB 0x0 477 #define IIDMA_RATE_2GB 0x1 478 #define IIDMA_RATE_4GB 0x3 479 #define IIDMA_RATE_8GB 0x4 480 #define IIDMA_RATE_10GB 0x13 481 #define IIDMA_RATE_UNKNOWN 0xffff 482 483 /* IIDMA Mode values */ 484 #define IIDMA_MODE_0 0 485 #define IIDMA_MODE_1 1 486 #define IIDMA_MODE_2 2 487 #define IIDMA_MODE_3 3 488 489 /* Port Speed values */ 490 #define EXT_DEF_PORTSPEED_UNKNOWN 0x0 491 #define EXT_DEF_PORTSPEED_1GBIT 0x1 492 #define EXT_DEF_PORTSPEED_2GBIT 0x2 493 #define EXT_DEF_PORTSPEED_4GBIT 0x4 494 #define EXT_DEF_PORTSPEED_8GBIT 0x8 495 #define EXT_DEF_PORTSPEED_10GBIT 0x10 496 #define EXT_PORTSPEED_NOT_NEGOTIATED (1<<15) /* Speed not established */ 497 498 typedef struct _EXT_DISC_PORT { 499 UINT64 TargetId; /* 8 */ 500 UINT16 Type; /* 2; Port Type */ 501 UINT16 Status; /* 2; Port Status */ 502 UINT16 Bus; /* 2; n/a for Solaris */ 503 UINT16 LoopID; /* 2; Loop ID */ 504 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 505 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 506 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes used big endian */ 507 UINT8 Local; /* 1; Local or Remote */ 508 UINT8 Reserved[27]; /* 27 */ 509 } EXT_DISC_PORT, *PEXT_DISC_PORT; /* 64 */ 510 511 typedef struct _EXT_DISC_TARGET { 512 UINT64 TargetId; /* 8 */ 513 UINT16 Type; /* 2; Target Type */ 514 UINT16 Status; /* 2; Target Status */ 515 UINT16 Bus; /* 2; n/a for Solaris */ 516 UINT16 LunCount; /* 2; n/a for nt */ 517 UINT16 LoopID; /* 2; Loop ID */ 518 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 519 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 520 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes used big endian */ 521 UINT8 Local; /* 1; Local or Remote */ 522 UINT8 Reserved[25]; /* 25 */ 523 } EXT_DISC_TARGET, *PEXT_DISC_TARGET; /* 64 */ 524 525 /* The following command is not supported */ 526 typedef struct _EXT_DISC_LUN { /* n/a for nt */ 527 UINT16 Id; /* 2 */ 528 UINT16 State; /* 2 */ 529 UINT16 IoCount; /* 2 */ 530 UINT8 Reserved[30]; /* 30 */ 531 } EXT_DISC_LUN, *PEXT_DISC_LUN; /* 36 */ 532 533 534 /* SCSI address */ 535 typedef struct _EXT_SCSI_ADDR { 536 UINT64 Target; /* 8 */ 537 UINT16 Bus; /* 2 */ 538 UINT16 Lun; /* 2 */ 539 UINT8 Padding[12]; /* 12 */ 540 } EXT_SCSI_ADDR, *PEXT_SCSI_ADDR; /* 24 */ 541 542 543 /* Fibre Channel address */ 544 typedef struct _EXT_FC_ADDR { 545 UINT16 Type; /* 2 */ 546 union { 547 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 548 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 549 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4 */ 550 } FcAddr; 551 UINT8 Padding[4]; /* 4 */ 552 } EXT_FC_ADDR, *PEXT_FC_ADDR; /* 14 */ 553 554 #define EXT_DEF_TYPE_WWNN 1 555 #define EXT_DEF_TYPE_WWPN 2 556 #define EXT_DEF_TYPE_PORTID 3 557 #define EXT_DEF_TYPE_FABRIC 4 558 559 /* Destination address */ 560 typedef struct _EXT_DEST_ADDR { 561 union { 562 struct { 563 UINT64 Target; /* 8 */ 564 UINT16 Bus; /* 2 */ 565 UINT8 pad[6]; /* 6 */ 566 } ScsiAddr; 567 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 568 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 569 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4 */ 570 } DestAddr; 571 UINT16 DestType; /* 2 */ 572 UINT16 Lun; /* 2 */ 573 UINT8 Padding[4]; /* 4 */ 574 } EXT_DEST_ADDR, *PEXT_DEST_ADDR; /* 24 */ 575 576 577 #define EXT_DEF_DESTTYPE_WWNN 1 578 #define EXT_DEF_DESTTYPE_WWPN 2 579 #define EXT_DEF_DESTTYPE_PORTID 3 580 #define EXT_DEF_DESTTYPE_FABRIC 4 581 #define EXT_DEF_DESTTYPE_SCSI 5 582 583 /* Statistic */ 584 typedef struct _EXT_HBA_PORT_STAT { 585 UINT32 ControllerErrorCount; /* 4 */ 586 UINT32 DeviceErrorCount; /* 4 */ 587 UINT32 IoCount; /* 4 */ 588 UINT32 MBytesCount; /* 4; MB of data processed */ 589 UINT32 LipResetCount; /* 4; Total no. of LIP Reset */ 590 UINT32 InterruptCount; /* 4; Total no. of Interrupts */ 591 UINT32 LinkFailureCount; /* 4 */ 592 UINT32 LossOfSyncCount; /* 4 */ 593 UINT32 LossOfSignalsCount; /* 4 */ 594 UINT32 PrimitiveSeqProtocolErrorCount; /* 4 */ 595 UINT32 InvalidTransmissionWordCount; /* 4 */ 596 UINT32 InvalidCRCCount; /* 4 */ 597 UINT8 Reserved[64]; /* 64 */ 598 } EXT_HBA_PORT_STAT, *PEXT_HBA_PORT_STAT; /* 112 */ 599 600 601 /* Driver property */ 602 typedef struct _EXT_DRIVER { 603 UINT32 MaxTransferLen; /* 4 */ 604 UINT32 MaxDataSegments; /* 4 */ 605 UINT32 Attrib; /* 4 */ 606 UINT32 InternalFlags[4]; /* 16 */ 607 UINT16 NumOfBus; /* 2; Port Type */ 608 UINT16 TargetsPerBus; /* 2; Port Status */ 609 UINT16 LunsPerTarget; /* 2 */ 610 UINT16 DmaBitAddresses; /* 2 */ 611 UINT16 IoMapType; /* 2 */ 612 UINT8 Version[EXT_DEF_MAX_STR_SIZE]; /* 128 */ 613 UINT8 Reserved[32]; /* 32 */ 614 } EXT_DRIVER, *PEXT_DRIVER; /* 198 */ 615 616 617 /* Firmware property */ 618 typedef struct _EXT_FW { 619 UINT32 Attrib; /* 4 */ 620 UINT8 Version[EXT_DEF_MAX_STR_SIZE]; /* 128 */ 621 UINT8 Reserved[66]; /* 66 */ 622 } EXT_FW, *PEXT_FW; /* 198 */ 623 624 /* ISP/Chip property */ 625 typedef struct _EXT_CHIP { 626 UINT32 IoAddr; /* 4 */ 627 UINT32 IoAddrLen; /* 4 */ 628 UINT32 MemAddr; /* 4 */ 629 UINT32 MemAddrLen; /* 4 */ 630 UINT16 VendorId; /* 2 */ 631 UINT16 DeviceId; /* 2 */ 632 UINT16 SubVendorId; /* 2 */ 633 UINT16 SubSystemId; /* 2 */ 634 UINT16 PciBusNumber; /* 2 */ 635 UINT16 PciSlotNumber; /* 2 */ 636 UINT16 ChipType; /* 2 */ 637 UINT16 InterruptLevel; /* 2 */ 638 UINT16 OutMbx[8]; /* 16 */ 639 UINT16 FuncNo; /* 2 */ 640 UINT8 Reserved[29]; /* 29 */ 641 UINT8 ChipRevID; /* 1 */ 642 } EXT_CHIP, *PEXT_CHIP; /* 80 */ 643 644 /* CNA properties */ 645 typedef struct _EXT_CNA_PORT { 646 UINT16 VLanId; /* 2 */ 647 UINT8 VNPortMACAddress[EXT_DEF_MAC_ADDRESS_SIZE]; /* 6 */ 648 UINT16 FabricParam; /* 2 */ 649 UINT16 Reserved0; /* 2 */ 650 UINT32 Reserved[29]; /* 116 */ 651 } EXT_CNA_PORT, *PEXT_CNA_PORT; /* 128 */ 652 653 /* Fabric Parameters */ 654 #define EXT_DEF_MAC_ADDR_MODE_FPMA 0x8000 655 656 /* Request Buffer for RNID */ 657 typedef struct _EXT_RNID_REQ { 658 EXT_FC_ADDR Addr; /* 14 */ 659 UINT8 DataFormat; /* 1 */ 660 UINT8 Pad; /* 1 */ 661 UINT8 OptWWN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 662 UINT8 OptPortId[EXT_DEF_PORTID_SIZE]; /* 4 */ 663 UINT8 Reserved[51]; /* 51 */ 664 } EXT_RNID_REQ, *PEXT_RNID_REQ; /* 79 */ 665 666 #define EXT_DEF_RNID_DFORMAT_NONE 0 667 #define EXT_DEF_RNID_DFORMAT_TOPO_DISC 0xDF 668 669 /* Request Buffer for Set RNID */ 670 typedef struct _EXT_SET_RNID_REQ { 671 UINT8 IPVersion[2]; /* 2 */ 672 UINT8 UDPPortNumber[2]; /* 2 */ 673 UINT8 IPAddress[16]; /* 16 */ 674 UINT8 Reserved[64]; /* 64 */ 675 } EXT_SET_RNID_REQ, *PEXT_SET_RNID_REQ; /* 84 */ 676 677 /* RNID definition and data struct */ 678 #define SEND_RNID_RSP_SIZE 72 679 680 typedef struct _RNID_DATA 681 { 682 UINT32 UnitType; /* 4 */ 683 UINT32 NumOfAttachedNodes; /* 4 */ 684 UINT16 TopoDiscFlags; /* 2 */ 685 UINT16 Reserved; /* 2 */ 686 UINT8 WWN[16]; /* 16 */ 687 UINT8 PortId[4]; /* 4 */ 688 UINT8 IPVersion[2]; /* 2 */ 689 UINT8 UDPPortNumber[2]; /* 2 */ 690 UINT8 IPAddress[16]; /* 16 */ 691 } EXT_RNID_DATA, *PEXT_RNID_DATA; /* 52 */ 692 693 694 /* SCSI pass-through */ 695 typedef struct _EXT_SCSI_PASSTHRU { 696 EXT_SCSI_ADDR TargetAddr; 697 UINT8 Direction; 698 UINT8 CdbLength; 699 UINT8 Cdb[EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH]; 700 UINT8 Reserved[66]; 701 UINT8 SenseData[256]; 702 } EXT_SCSI_PASSTHRU, *PEXT_SCSI_PASSTHRU; 703 704 /* FC SCSI pass-through */ 705 typedef struct _EXT_FC_SCSI_PASSTHRU { 706 EXT_DEST_ADDR FCScsiAddr; 707 UINT8 Direction; 708 UINT8 CdbLength; 709 UINT8 Cdb[EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH]; 710 UINT8 Reserved[64]; 711 UINT8 SenseData[256]; 712 } EXT_FC_SCSI_PASSTHRU, *PEXT_FC_SCSI_PASSTHRU; 713 714 /* SCSI pass-through direction */ 715 #define EXT_DEF_SCSI_PASSTHRU_DATA_IN 1 716 #define EXT_DEF_SCSI_PASSTHRU_DATA_OUT 2 717 718 719 /* EXT_REG_AEN Request struct */ 720 typedef struct _EXT_REG_AEN { 721 UINT32 Enable; /* 4; non-0 to enable, 0 to disable. */ 722 UINT8 Reserved[4]; /* 4 */ 723 } EXT_REG_AEN, *PEXT_REG_AEN; /* 8 */ 724 725 /* EXT_GET_AEN Response struct */ 726 typedef struct _EXT_ASYNC_EVENT { 727 UINT32 AsyncEventCode; /* 4 */ 728 union { 729 struct { 730 UINT8 RSCNInfo[EXT_DEF_PORTID_SIZE_ACTUAL]; /* 3 BE */ 731 UINT8 AddrFormat; /* 1 */ 732 UINT8 Rsvd_1[8]; /* 8 */ 733 } RSCN; 734 735 UINT8 Reserved[12]; /* 12 */ 736 } Payload; 737 } EXT_ASYNC_EVENT, *PEXT_ASYNC_EVENT; /* 16 */ 738 739 740 /* Asynchronous Event Codes */ 741 #define EXT_DEF_LIP_OCCURRED 0x8010 742 #define EXT_DEF_LINK_UP 0x8011 743 #define EXT_DEF_LINK_DOWN 0x8012 744 #define EXT_DEF_LIP_RESET 0x8013 745 #define EXT_DEF_RSCN 0x8015 746 #define EXT_DEF_DEVICE_UPDATE 0x8014 747 748 /* LED state information */ 749 #define EXT_DEF_GRN_BLINK_OFF 0x00 750 #define EXT_DEF_GRN_BLINK_ON 0x01 751 752 typedef struct _EXT_BEACON_CONTROL { 753 UINT32 State; /* 4 */ 754 UINT8 Reserved[12]; /* 12 */ 755 } EXT_BEACON_CONTROL, *PEXT_BEACON_CONTROL; /* 16 */ 756 757 /* Required # of entries in the queue buffer allocated. */ 758 #define EXT_DEF_MAX_AEN_QUEUE EXT_DEF_MAX_AEN_QUEUE_OS 759 760 /* 761 * LUN BitMask structure definition, array of 8bit bytes, 762 * 1 bit per lun. When bit == 1, the lun is masked. 763 * Most significant bit of mask[0] is lun 0. 764 * Least significant bit of mask[0] is lun 7. 765 */ 766 typedef struct _EXT_LUN_BIT_MASK { 767 #if ((EXT_DEF_NON_SCSI3_MAX_LUN & 0x7) == 0) 768 UINT8 mask[EXT_DEF_NON_SCSI3_MAX_LUN >> 3]; 769 #else 770 UINT8 mask[(EXT_DEF_NON_SCSI3_MAX_LUN + 8) >> 3 ]; 771 #endif 772 } EXT_LUN_BIT_MASK, *PEXT_LUN_BIT_MASK; 773 774 /* Device type to get for EXT_SC_GET_PORT_SUMMARY */ 775 #define EXT_DEF_GET_KNOWN_DEVICE 0x1 776 #define EXT_DEF_GET_VISIBLE_DEVICE 0x2 777 #define EXT_DEF_GET_HIDDEN_DEVICE 0x4 778 #define EXT_DEF_GET_FABRIC_DEVICE 0x8 779 #define EXT_DEF_GET_LOOP_DEVICE 0x10 780 781 /* Each entry in device database */ 782 typedef struct _EXT_DEVICEDATAENTRY 783 { 784 EXT_SCSI_ADDR TargetAddress; /* scsi address */ 785 UINT32 DeviceFlags; /* Flags for device */ 786 UINT16 LoopID; /* Loop ID */ 787 UINT16 BaseLunNumber; 788 UINT8 NodeWWN[8]; /* Node World Wide Name for device */ 789 UINT8 PortWWN[8]; /* Port World Wide Name for device */ 790 UINT8 PortID[3]; /* Current PortId for device */ 791 UINT8 ControlFlags; /* Control flag */ 792 UINT8 Reserved[132]; 793 } EXT_DEVICEDATAENTRY, *PEXT_DEVICEDATAENTRY; 794 795 #define EXT_DEF_EXTERNAL_LUN_COUNT 2048 796 #define EXT_DEF_EXTERNAL_LUN_BITMASK_BYTES (EXT_DEF_EXTERNAL_LUN_COUNT / 8) 797 798 /* Structure as used in the IOCTL. */ 799 800 typedef struct _EXT_EXTERNAL_LUN_BITMASK_ENTRY 801 { 802 UINT8 NodeName[EXT_DEF_WWN_NAME_SIZE]; 803 UINT8 PortName[EXT_DEF_WWN_NAME_SIZE]; 804 UINT8 Reserved1[16]; /* Pad to 32-byte header */ 805 UINT8 Bitmask[EXT_DEF_EXTERNAL_LUN_BITMASK_BYTES]; 806 } EXT_EXTERNAL_LUN_BITMASK_ENTRY, *PEXT_EXTERNAL_LUN_BITMASK_ENTRY; 807 808 809 /* Structure as it is stored in the NT registry */ 810 811 typedef struct _LUN_BITMASK_LIST 812 { 813 UINT16 Version; /* Should be LUN_BITMASK_REGISTRY_VERSION */ 814 UINT16 EntryCount; /* Count of variable entries following */ 815 UINT8 Reserved[28]; /* Pad to 32-byte header */ 816 817 EXT_EXTERNAL_LUN_BITMASK_ENTRY 818 BitmaskEntry[1]; /* Var-length data */ 819 } EXT_LUN_BITMASK_LIST, *PEXT_LUN_BITMASK_LIST; 820 821 822 /* Device database information */ 823 typedef struct _EXT_DEVICEDATA 824 { 825 UINT32 TotalDevices; /* Set to total number of device */ 826 UINT32 ReturnListEntryCount; /* Set to number of device entries */ 827 /* returned in list. */ 828 829 EXT_DEVICEDATAENTRY EntryList[1]; /* Variable length */ 830 } EXT_DEVICEDATA, *PEXT_DEVICEDATA; 831 832 833 /* Swap Target Device Data structure */ 834 typedef struct _EXT_SWAPTARGETDEVICE 835 { 836 EXT_DEVICEDATAENTRY CurrentExistDevice; 837 EXT_DEVICEDATAENTRY NewDevice; 838 } EXT_SWAPTARGETDEVICE, *PEXT_SWAPTARGETDEVICE; 839 840 #define EXT_DEF_LUN_BITMASK_LIST_MIN_ENTRIES 1 841 #define EXT_DEF_LUN_BITMASK_LIST_MAX_ENTRIES 256 842 843 #ifdef _WIN64 844 #define EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE 32 845 #else 846 #define EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE \ 847 offsetof(LUN_BITMASK_LIST_BUFFER, asBitmaskEntry) 848 #endif 849 850 #define EXT_DEF_LUN_BITMASK_LIST_MIN_SIZE \ 851 (EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE + \ 852 (sizeof (EXT_EXTERNAL_LUN_BITMASK_ENTRY) * \ 853 EXT_DEF_LUN_BITMASK_LIST_MIN_ENTRIES)) 854 #define EXT_DEF_LUN_BITMASK_LIST_MAX_SIZE \ 855 (EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE + \ 856 (sizeof (EXT_EXTERNAL_LUN_BITMASK_ENTRY) * \ 857 EXT_DEF_LUN_BITMASK_LIST_MAX_ENTRIES)) 858 /* 859 * LUN mask bit manipulation macros 860 * 861 * P = Pointer to an EXT_LUN_BIT_MASK union. 862 * L = LUN number. 863 */ 864 #define EXT_IS_LUN_BIT_SET(P, L) \ 865 (((P)->mask[L / 8] & (0x80 >> (L % 8))) ? 1 : 0) 866 867 #define EXT_SET_LUN_BIT(P, L) \ 868 ((P)->mask[L / 8] |= (0x80 >> (L % 8))) 869 870 #define EXT_CLR_LUN_BIT(P, L) \ 871 ((P)->mask[L / 8] &= ~(0x80 >> (L % 8))) 872 873 typedef struct _EXT_PORT_PARAM { 874 EXT_DEST_ADDR FCScsiAddr; 875 UINT16 Mode; 876 UINT16 Speed; 877 } EXT_PORT_PARAM, *PEXT_PORT_PARAM; 878 879 #define EXT_IIDMA_MODE_GET 0 880 #define EXT_IIDMA_MODE_SET 1 881 882 /* 883 * PCI header structure definitions. 884 */ 885 886 typedef struct _PCI_HEADER_T { 887 UINT8 signature[2]; 888 UINT8 reserved[0x16]; 889 UINT8 dataoffset[2]; 890 UINT8 pad[6]; 891 } PCI_HEADER_T, *PPCI_HEADER_T; 892 893 /* 894 * PCI data structure definitions. 895 */ 896 typedef struct _PCI_DATA_T { 897 UINT8 signature[4]; 898 UINT8 vid[2]; 899 UINT8 did[2]; 900 UINT8 reserved0[2]; 901 UINT8 pcidatalen[2]; 902 UINT8 pcidatarev; 903 UINT8 classcode[3]; 904 UINT8 imagelength[2]; /* In sectors */ 905 UINT8 revisionlevel[2]; 906 UINT8 codetype; 907 UINT8 indicator; 908 UINT8 reserved1[2]; 909 UINT8 pad[8]; 910 } PCI_DATA_T, *PPCI_DATA_T; 911 912 /* 913 * Mercury/Menlo 914 */ 915 916 #define MENLO_RESET_FLAG_ENABLE_DIAG_FW 1 917 918 typedef struct _EXT_MENLO_RESET { 919 UINT16 Flags; 920 UINT16 Reserved; 921 } EXT_MENLO_RESET, *PEXT_MENLO_RESET; 922 923 typedef struct _EXT_MENLO_GET_FW_VERSION { 924 UINT32 FwVersion; 925 } EXT_MENLO_GET_FW_VERSION, *PEXT_MENLO_GET_FW_VERSION; 926 927 #define MENLO_UPDATE_FW_FLAG_DIAG_FW 0x0008 /* if flag is cleared then */ 928 /* it must be an fw op */ 929 typedef struct _EXT_MENLO_UPDATE_FW { 930 UINT64 pFwDataBytes; 931 UINT32 TotalByteCount; 932 UINT16 Flags; 933 UINT16 Reserved; 934 } EXT_MENLO_UPDATE_FW, *PEXT_MENLO_UPDATE_FW; 935 936 #define CONFIG_PARAM_ID_RESERVED 1 937 #define CONFIG_PARAM_ID_UIF 2 938 #define CONFIG_PARAM_ID_FCOE_COS 3 939 #define CONFIG_PARAM_ID_PAUSE_TYPE 4 940 #define CONFIG_PARAM_ID_TIMEOUTS 5 941 942 #define INFO_DATA_TYPE_CONFIG_LOG_DATA 1 /* Fetch Config Log Data */ 943 #define INFO_DATA_TYPE_LOG_DATA 2 /* Fetch Log Data */ 944 #define INFO_DATA_TYPE_PORT_STATISTICS 3 /* Fetch Port Statistics */ 945 #define INFO_DATA_TYPE_LIF_STATISTICS 4 /* Fetch LIF Statistics */ 946 #define INFO_DATA_TYPE_ASIC_STATISTICS 5 /* Fetch ASIC Statistics */ 947 #define INFO_DATA_TYPE_CONFIG_PARAMETERS 6 /* Fetch Config Parameters */ 948 #define INFO_DATA_TYPE_PANIC_LOG 7 /* Fetch Panic Log */ 949 950 /* 951 * InfoContext defines for INFO_DATA_TYPE_LOG_DATA 952 */ 953 #define IC_LOG_DATA_LOG_ID_DEBUG_LOG 0 954 #define IC_LOG_DATA_LOG_ID_LEARN_LOG 1 955 #define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG 2 956 #define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG 3 957 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG 4 958 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG 5 959 #define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG 6 960 #define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG 7 961 #define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG 8 962 #define IC_LOG_DATA_LOG_ID_DCX_LOG 9 963 964 /* 965 * InfoContext defines for INFO_DATA_TYPE_PORT_STATISTICS 966 */ 967 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0 0 968 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1 1 969 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0 2 970 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1 3 971 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0 4 972 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1 5 973 974 /* 975 * InfoContext defines for INFO_DATA_TYPE_LIF_STATISTICS 976 */ 977 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0 0 978 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1 1 979 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0 2 980 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1 3 981 #define IC_LIF_STATISTICS_LIF_NUMBER_CPU 6 982 983 typedef struct _EXT_MENLO_ACCESS_PARAMETERS { 984 union { 985 struct { 986 UINT32 StartingAddr; 987 UINT32 Reserved2; 988 UINT32 Reserved3; 989 } MenloMemory; /* For Read & Write Menlo Memory */ 990 991 struct { 992 UINT32 ConfigParamID; 993 UINT32 ConfigParamData0; 994 UINT32 ConfigParamData1; 995 } MenloConfig; /* For change Configuration */ 996 997 struct { 998 UINT32 InfoDataType; 999 UINT32 InfoContext; 1000 UINT32 Reserved; 1001 } MenloInfo; /* For fetch Menlo Info */ 1002 } ap; 1003 } EXT_MENLO_ACCESS_PARAMETERS, *PEXT_MENLO_ACCESS_PARAMETERS; 1004 1005 #define INFO_DATA_TYPE_LOG_CONFIG_TBC ((10*7)+1)*4 1006 #define INFO_DATA_TYPE_PORT_STAT_ETH_TBC 0x194 1007 #define INFO_DATA_TYPE_PORT_STAT_FC_TBC 0xC0 1008 #define INFO_DATA_TYPE_LIF_STAT_TBC 0x40 1009 #define INFO_DATA_TYPE_ASIC_STAT_TBC 0x5F8 1010 #define INFO_DATA_TYPE_CONFIG_TBC 0x140 1011 1012 #define MENLO_OP_READ_MEM 0 /* Read Menlo Memory */ 1013 #define MENLO_OP_WRITE_MEM 1 /* Write Menlo Memory */ 1014 #define MENLO_OP_CHANGE_CONFIG 2 /* Change Configuration */ 1015 #define MENLO_OP_GET_INFO 3 /* Fetch Menlo Info (Logs, & */ 1016 /* Statistics, Configuration) */ 1017 1018 typedef struct _EXT_MENLO_MANAGE_INFO { 1019 UINT64 pDataBytes; /* 8 */ 1020 EXT_MENLO_ACCESS_PARAMETERS Parameters; /* 12 */ 1021 UINT32 TotalByteCount; /* 4 */ 1022 UINT16 Operation; /* 2 */ 1023 UINT16 Reserved; /* 2 */ 1024 UINT16 Reserved1[2]; /* 4 */ 1025 } EXT_MENLO_MANAGE_INFO, *PEXT_MENLO_MANAGE_INFO; 1026 1027 #define MENLO_FC_CHECKSUM_FAILURE 0x01 1028 #define MENLO_FC_INVALID_LENGTH 0x02 1029 #define MENLO_FC_INVALID_ADDRESS 0x04 1030 #define MENLO_FC_INVALID_CONFIG_ID_TYPE 0x05 1031 #define MENLO_FC_INVALID_CONFIG_DATA 0x06 1032 #define MENLO_FC_INVALID_INFO_CONTEXT 0x07 1033 1034 typedef struct _EXT_MENLO_MGT { 1035 union { 1036 EXT_MENLO_RESET MenloReset; 1037 EXT_MENLO_GET_FW_VERSION MenloGetFwVer; 1038 EXT_MENLO_UPDATE_FW MenloUpdateFw; 1039 EXT_MENLO_MANAGE_INFO MenloManageInfo; 1040 } sp; 1041 } EXT_MENLO_MGT, *PEXT_MENLO_MGT; 1042 1043 /* 1044 * vport enum definations 1045 */ 1046 typedef enum vport_options { 1047 EXT_VPO_LOGIN_RETRY_ENABLE = 0, 1048 EXT_VPO_PERSISTENT = 1, 1049 EXT_VPO_QOS_BW = 2, 1050 EXT_VPO_VFABRIC_ENABLE = 3 1051 } vport_options_t; 1052 1053 /* 1054 * vport struct definations 1055 */ 1056 #define MAX_DEV_PATH 256 1057 #define MAX_VP_ID 256 1058 #define EXT_OLD_VPORT_ID_CNT_SIZE 260 1059 typedef struct _EXT_VPORT_ID_CNT { 1060 UINT32 VpCnt; 1061 UINT8 VpId[MAX_VP_ID]; 1062 UINT8 vp_path[MAX_VP_ID][MAX_DEV_PATH]; 1063 INT32 VpDrvInst[MAX_VP_ID]; 1064 } EXT_VPORT_ID_CNT, *PEXT_VPORT_ID_CNT; 1065 1066 typedef struct _EXT_VPORT_PARAMS { 1067 UINT32 vp_id; 1068 vport_options_t options; 1069 UINT8 wwpn[EXT_DEF_WWN_NAME_SIZE]; 1070 UINT8 wwnn[EXT_DEF_WWN_NAME_SIZE]; 1071 } EXT_VPORT_PARAMS, *PEXT_VPORT_PARAMS; 1072 1073 typedef struct _EXT_VPORT_INFO { 1074 UINT32 free; 1075 UINT32 used; 1076 UINT32 id; 1077 UINT32 state; 1078 UINT32 bound; 1079 UINT8 wwnn[EXT_DEF_WWN_NAME_SIZE]; 1080 UINT8 wwpn[EXT_DEF_WWN_NAME_SIZE]; 1081 UINT8 reserved[220]; 1082 } EXT_VPORT_INFO, *PEXT_VPORT_INFO; 1083 1084 #ifdef __cplusplus 1085 } 1086 #endif 1087 1088 #endif /* _EXIOCT_H */ 1089