1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_DDI_INTR_IMPL_H 27 #define _SYS_DDI_INTR_IMPL_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 /* 32 * Sun DDI interrupt implementation specific definitions 33 */ 34 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 39 #ifdef _KERNEL 40 41 /* 42 * Typedef for interrupt ops 43 */ 44 typedef enum { 45 DDI_INTROP_SUPPORTED_TYPES = 1, /* 1 get supported interrupts types */ 46 DDI_INTROP_NINTRS, /* 2 get num of interrupts supported */ 47 DDI_INTROP_ALLOC, /* 3 allocate interrupt handle */ 48 DDI_INTROP_GETPRI, /* 4 get priority */ 49 DDI_INTROP_SETPRI, /* 5 set priority */ 50 DDI_INTROP_ADDISR, /* 6 add interrupt handler */ 51 DDI_INTROP_DUPVEC, /* 7 duplicate interrupt handler */ 52 DDI_INTROP_ENABLE, /* 8 enable interrupt */ 53 DDI_INTROP_BLOCKENABLE, /* 9 block enable interrupts */ 54 DDI_INTROP_BLOCKDISABLE, /* 10 block disable interrupts */ 55 DDI_INTROP_DISABLE, /* 11 disable interrupt */ 56 DDI_INTROP_REMISR, /* 12 remove interrupt handler */ 57 DDI_INTROP_FREE, /* 13 free interrupt handle */ 58 DDI_INTROP_GETCAP, /* 14 get capacity */ 59 DDI_INTROP_SETCAP, /* 15 set capacity */ 60 DDI_INTROP_SETMASK, /* 16 set mask */ 61 DDI_INTROP_CLRMASK, /* 17 clear mask */ 62 DDI_INTROP_GETPENDING, /* 18 get pending interrupt */ 63 DDI_INTROP_NAVAIL /* 19 get num of available interrupts */ 64 } ddi_intr_op_t; 65 66 /* Version number used in the handles */ 67 #define DDI_INTR_VERSION_1 1 68 #define DDI_INTR_VERSION DDI_INTR_VERSION_1 69 70 /* 71 * One such data structure is allocated per ddi_intr_handle_t 72 * This is the incore copy of the regular interrupt info. 73 */ 74 typedef struct ddi_intr_handle_impl { 75 dev_info_t *ih_dip; /* dip associated with handle */ 76 uint16_t ih_type; /* interrupt type being used */ 77 ushort_t ih_inum; /* interrupt number */ 78 uint32_t ih_vector; /* vector number */ 79 uint16_t ih_ver; /* Version */ 80 uint_t ih_state; /* interrupt handle state */ 81 uint_t ih_cap; /* interrupt capabilities */ 82 uint_t ih_pri; /* priority - bus dependent */ 83 krwlock_t ih_rwlock; /* read/write lock per handle */ 84 85 uint_t (*ih_cb_func)(caddr_t, caddr_t); 86 void *ih_cb_arg1; 87 void *ih_cb_arg2; 88 89 /* 90 * The following 3 members are used to support MSI-X specific features 91 */ 92 uint_t ih_flags; /* Misc flags */ 93 uint_t ih_dup_cnt; /* # of dupped msi-x vectors */ 94 struct ddi_intr_handle_impl *ih_main; 95 /* pntr to the main vector */ 96 /* 97 * The next set of members are for 'scratch' purpose only. 98 * The DDI interrupt framework uses them internally and their 99 * interpretation is left to the framework. For now, 100 * scratch1 - used to send NINTRs information 101 * to various nexus drivers. 102 * scratch2 - used to send 'behavior' flag 103 * information to the nexus drivers 104 * from ddi_intr_alloc(). It is also 105 * used to send 'h_array' to the nexus drivers 106 * for ddi_intr_block_enable/disable() on x86. 107 * private - On X86 it usually carries a pointer to 108 * ihdl_plat_t. Not used on SPARC platforms. 109 */ 110 void *ih_private; /* Platform specific data */ 111 uint_t ih_scratch1; /* Scratch1: #interrupts */ 112 void *ih_scratch2; /* Scratch2: flag/h_array */ 113 } ddi_intr_handle_impl_t; 114 115 /* values for ih_state (strictly for interrupt handle) */ 116 #define DDI_IHDL_STATE_ALLOC 0x01 /* Allocated. ddi_intr_alloc() called */ 117 #define DDI_IHDL_STATE_ADDED 0x02 /* Added interrupt handler */ 118 /* ddi_intr_add_handler() called */ 119 #define DDI_IHDL_STATE_ENABLE 0x04 /* Enabled. ddi_intr_enable() called */ 120 121 #define DDI_INTR_IS_MSI_OR_MSIX(type) \ 122 ((type) == DDI_INTR_TYPE_MSI || (type) == DDI_INTR_TYPE_MSIX) 123 124 #define DDI_INTR_BEHAVIOR_FLAG_VALID(f) \ 125 (((f) == DDI_INTR_ALLOC_NORMAL) || ((f) == DDI_INTR_ALLOC_STRICT)) 126 127 #define DDI_INTR_TYPE_FLAG_VALID(t) \ 128 (((t) == DDI_INTR_TYPE_FIXED) || \ 129 ((t) == DDI_INTR_TYPE_MSI) || \ 130 ((t) == DDI_INTR_TYPE_MSIX)) 131 132 /* values for ih_flags */ 133 #define DDI_INTR_MSIX_DUP 0x01 /* MSI-X vector which has been dupped */ 134 135 /* Maximum number of MSI resources to allocate */ 136 #define DDI_MAX_MSI_ALLOC 2 137 138 /* 139 * The following MSI-X limits will change with Interrupt Resource Management 140 * (IRM) support. 141 */ 142 /* Default number of MSI-X resources to allocate */ 143 #define DDI_DEFAULT_MSIX_ALLOC 2 144 145 /* Maximum number of MSI-X resources to allocate */ 146 #define DDI_MAX_MSIX_ALLOC 8 147 148 struct av_softinfo; 149 150 /* 151 * One such data structure is allocated per ddi_soft_intr_handle 152 * This is the incore copy of the softint info. 153 */ 154 typedef struct ddi_softint_hdl_impl { 155 dev_info_t *ih_dip; /* dip associated with handle */ 156 uint_t ih_pri; /* priority - bus dependent */ 157 krwlock_t ih_rwlock; /* read/write lock per handle */ 158 struct av_softinfo *ih_pending; /* whether softint is pending */ 159 160 uint_t (*ih_cb_func)(caddr_t, caddr_t); 161 /* cb function for soft ints */ 162 void *ih_cb_arg1; /* arg1 of callback function */ 163 void *ih_cb_arg2; /* arg2 passed to "trigger" */ 164 165 /* 166 * The next member is for 'scratch' purpose only. 167 * The DDI interrupt framework uses it internally and its 168 * interpretation is left to the framework. 169 * private - used by the DDI framework to pass back 170 * and forth 'softid' information on SPARC 171 * side only. Not used on X86 platform. 172 */ 173 void *ih_private; /* Platform specific data */ 174 } ddi_softint_hdl_impl_t; 175 176 /* Softint internal implementation defines */ 177 #define DDI_SOFT_INTR_PRI_M 4 178 #define DDI_SOFT_INTR_PRI_H 6 179 180 /* 181 * One such data structure is allocated for MSI-X enabled 182 * device. If no MSI-X is enabled then it is NULL 183 */ 184 typedef struct ddi_intr_msix { 185 /* MSI-X Table related information */ 186 ddi_acc_handle_t msix_tbl_hdl; /* MSI-X table handle */ 187 uint32_t *msix_tbl_addr; /* MSI-X table addr */ 188 uint32_t msix_tbl_offset; /* MSI-X table offset */ 189 190 /* MSI-X PBA Table related information */ 191 ddi_acc_handle_t msix_pba_hdl; /* MSI-X PBA handle */ 192 uint32_t *msix_pba_addr; /* MSI-X PBA addr */ 193 uint32_t msix_pba_offset; /* MSI-X PBA offset */ 194 195 ddi_device_acc_attr_t msix_dev_attr; /* MSI-X device attr */ 196 } ddi_intr_msix_t; 197 198 199 /* 200 * One such data structure is allocated for each dip. 201 * It has interrupt related information that can be 202 * stored/retrieved for convenience. 203 */ 204 typedef struct devinfo_intr { 205 /* These three fields show what the device is capable of */ 206 uint_t devi_intr_sup_types; /* Intrs supported by device */ 207 208 ddi_intr_msix_t *devi_msix_p; /* MSI-X info, if supported */ 209 210 /* Next three fields show current status for the device */ 211 uint_t devi_intr_curr_type; /* Interrupt type being used */ 212 uint_t devi_intr_sup_nintrs; /* #intr supported */ 213 uint_t devi_intr_curr_nintrs; /* #intr currently being used */ 214 215 ddi_intr_handle_t **devi_intr_handle_p; /* Hdl for legacy intr APIs */ 216 217 #if defined(__i386) || defined(__amd64) 218 /* Save the PCI config space handle */ 219 ddi_acc_handle_t devi_cfg_handle; 220 int devi_cap_ptr; /* MSI or MSI-X cap pointer */ 221 #endif 222 } devinfo_intr_t; 223 224 #define NEXUS_HAS_INTR_OP(dip) \ 225 ((DEVI(dip)->devi_ops->devo_bus_ops) && \ 226 (DEVI(dip)->devi_ops->devo_bus_ops->busops_rev >= BUSO_REV_9) && \ 227 (DEVI(dip)->devi_ops->devo_bus_ops->bus_intr_op)) 228 229 int i_ddi_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t op, 230 ddi_intr_handle_impl_t *hdlp, void *result); 231 232 int i_ddi_add_softint(ddi_softint_hdl_impl_t *); 233 void i_ddi_remove_softint(ddi_softint_hdl_impl_t *); 234 int i_ddi_trigger_softint(ddi_softint_hdl_impl_t *, void *); 235 int i_ddi_set_softint_pri(ddi_softint_hdl_impl_t *, uint_t); 236 237 void i_ddi_intr_devi_init(dev_info_t *dip); 238 void i_ddi_intr_devi_fini(dev_info_t *dip); 239 240 uint_t i_ddi_intr_get_supported_types(dev_info_t *dip); 241 void i_ddi_intr_set_supported_types(dev_info_t *dip, int sup_type); 242 uint_t i_ddi_intr_get_current_type(dev_info_t *dip); 243 void i_ddi_intr_set_current_type(dev_info_t *dip, int intr_type); 244 uint_t i_ddi_intr_get_supported_nintrs(dev_info_t *dip, int intr_type); 245 void i_ddi_intr_set_supported_nintrs(dev_info_t *dip, int nintrs); 246 uint_t i_ddi_intr_get_current_nintrs(dev_info_t *dip); 247 void i_ddi_intr_set_current_nintrs(dev_info_t *dip, int nintrs); 248 249 ddi_intr_handle_t *i_ddi_get_intr_handle(dev_info_t *dip, int inum); 250 void i_ddi_set_intr_handle(dev_info_t *dip, int inum, 251 ddi_intr_handle_t *hdlp); 252 253 ddi_intr_msix_t *i_ddi_get_msix(dev_info_t *dip); 254 void i_ddi_set_msix(dev_info_t *dip, ddi_intr_msix_t *msix_p); 255 256 #if defined(__i386) || defined(__amd64) 257 ddi_acc_handle_t i_ddi_get_pci_config_handle(dev_info_t *dip); 258 void i_ddi_set_pci_config_handle(dev_info_t *dip, ddi_acc_handle_t handle); 259 int i_ddi_get_msi_msix_cap_ptr(dev_info_t *dip); 260 void i_ddi_set_msi_msix_cap_ptr(dev_info_t *dip, int cap_ptr); 261 #endif 262 263 uint_t i_ddi_get_msix_alloc_limit(dev_info_t *dip); 264 265 int32_t i_ddi_get_intr_weight(dev_info_t *); 266 int32_t i_ddi_set_intr_weight(dev_info_t *, int32_t); 267 268 void i_ddi_alloc_intr_phdl(ddi_intr_handle_impl_t *); 269 void i_ddi_free_intr_phdl(ddi_intr_handle_impl_t *); 270 271 #define DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, func, arg1, arg2) \ 272 hdlp->ih_cb_func = func; \ 273 hdlp->ih_cb_arg1 = arg1; \ 274 hdlp->ih_cb_arg2 = arg2; 275 276 #ifdef DEBUG 277 #define I_DDI_VERIFY_MSIX_HANDLE(hdlp) \ 278 if ((hdlp->ih_type == DDI_INTR_TYPE_MSIX) && \ 279 (hdlp->ih_flags & DDI_INTR_MSIX_DUP)) { \ 280 ASSERT(hdlp->ih_dip == hdlp->ih_main->ih_dip); \ 281 ASSERT(hdlp->ih_type == hdlp->ih_main->ih_type); \ 282 ASSERT(hdlp->ih_vector == hdlp->ih_main->ih_vector); \ 283 ASSERT(hdlp->ih_ver == hdlp->ih_main->ih_ver); \ 284 ASSERT(hdlp->ih_cap == hdlp->ih_main->ih_cap); \ 285 ASSERT(hdlp->ih_pri == hdlp->ih_main->ih_pri); \ 286 } 287 #else 288 #define I_DDI_VERIFY_MSIX_HANDLE(hdlp) 289 #endif 290 291 #else /* _KERNEL */ 292 293 typedef struct devinfo_intr devinfo_intr_t; 294 295 #endif /* _KERNEL */ 296 297 /* 298 * Used only by old DDI interrupt interfaces. 299 */ 300 301 /* 302 * This structure represents one interrupt possible from the given 303 * device. It is used in an array for devices with multiple interrupts. 304 */ 305 struct intrspec { 306 uint_t intrspec_pri; /* interrupt priority */ 307 uint_t intrspec_vec; /* vector # (0 if none) */ 308 uint_t (*intrspec_func)(); /* function to call for interrupt, */ 309 /* If (uint_t (*)()) 0, none. */ 310 /* If (uint_t (*)()) 1, then */ 311 }; 312 313 #ifdef _KERNEL 314 315 /* 316 * Figure out how many FIXED nintrs are supported 317 */ 318 int i_ddi_get_intx_nintrs(dev_info_t *dip); 319 320 /* 321 * NOTE: 322 * The following 4 busops entry points are obsoleted with version 323 * 9 or greater. Use i_ddi_intr_op interface in place of these 324 * obsolete interfaces. 325 * 326 * Remove these busops entry points and all related data structures 327 * in future minor/major solaris release. 328 */ 329 typedef enum {DDI_INTR_CTLOPS_NONE} ddi_intr_ctlop_t; 330 331 /* The following are obsolete interfaces */ 332 ddi_intrspec_t i_ddi_get_intrspec(dev_info_t *dip, dev_info_t *rdip, 333 uint_t inumber); 334 335 int i_ddi_add_intrspec(dev_info_t *dip, dev_info_t *rdip, 336 ddi_intrspec_t intrspec, ddi_iblock_cookie_t *iblock_cookiep, 337 ddi_idevice_cookie_t *idevice_cookiep, 338 uint_t (*int_handler)(caddr_t int_handler_arg), 339 caddr_t int_handler_arg, int kind); 340 341 void i_ddi_remove_intrspec(dev_info_t *dip, dev_info_t *rdip, 342 ddi_intrspec_t intrspec, ddi_iblock_cookie_t iblock_cookie); 343 344 int i_ddi_intr_ctlops(dev_info_t *dip, dev_info_t *rdip, 345 ddi_intr_ctlop_t op, void *arg, void *val); 346 347 #endif /* _KERNEL */ 348 349 #ifdef __cplusplus 350 } 351 #endif 352 353 #endif /* _SYS_DDI_INTR_IMPL_H */ 354