1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 /* 26 * Copyright (c) 2009, Intel Corporation. 27 * All Rights Reserved. 28 */ 29 30 #ifndef _SYS_CPUDRV_H 31 #define _SYS_CPUDRV_H 32 33 #include <sys/promif.h> 34 #include <sys/cpuvar.h> 35 #include <sys/taskq.h> 36 37 #ifdef __cplusplus 38 extern "C" { 39 #endif 40 41 #ifdef _KERNEL 42 43 /* 44 * CPU power management data 45 */ 46 /* 47 * Data related to a particular speed. 48 * 49 * All per speed data nodes for a CPU are linked together using down_spd. 50 * The link list is ordered with first node containing data for 51 * normal (maximum) speed. up_spd points to the next speed up. Currently 52 * all up_spd's point to the normal speed but this can be changed in future. 53 * quant_cnt is the number of ticks when monitoring system will be called 54 * next. There are different quant_cnt for different speeds. 55 * 56 * Note that 'speed' has different meaning depending upon the platform. 57 * On SPARC, the speed is really a divisor of the maximum speed (e.g., a speed 58 * of 2 means that it's 1/2 the maximum speed). On x86, speed is a processor 59 * frequency. 60 */ 61 typedef struct cpudrv_pm_spd { 62 uint_t speed; /* platform dependent notion */ 63 uint_t quant_cnt; /* quantum count in ticks */ 64 struct cpudrv_pm_spd *down_spd; /* ptr to next speed down */ 65 struct cpudrv_pm_spd *up_spd; /* ptr to next speed up */ 66 uint_t idle_hwm; /* down if idle thread >= hwm */ 67 uint_t idle_lwm; /* up if idle thread < lwm */ 68 uint_t idle_bhwm_cnt; /* # of iters idle is < hwm */ 69 uint_t idle_blwm_cnt; /* # of iters idle is < lwm */ 70 uint_t user_hwm; /* up if user thread > hwm */ 71 int user_lwm; /* down if user thread <= lwm */ 72 int pm_level; /* power level for framework */ 73 } cpudrv_pm_spd_t; 74 75 /* 76 * Power management data 77 */ 78 typedef struct cpudrv_pm { 79 cpudrv_pm_spd_t *head_spd; /* ptr to head of speed */ 80 cpudrv_pm_spd_t *cur_spd; /* ptr to current speed */ 81 uint_t num_spd; /* number of speeds */ 82 hrtime_t lastquan_mstate[NCMSTATES]; /* last quantum's mstate */ 83 clock_t lastquan_ticks; /* last quantum's clock tick */ 84 int pm_busycnt; /* pm_busy_component() count */ 85 ddi_taskq_t *tq; /* taskq handler for CPU monitor */ 86 timeout_id_t timeout_id; /* cpudrv_monitor()'s timeout_id */ 87 int timeout_count; /* count dispatched timeouts */ 88 kmutex_t timeout_lock; /* protect timeout_count */ 89 kcondvar_t timeout_cv; /* wait on timeout_count change */ 90 #if defined(__x86) 91 kthread_t *pm_governor_thread; /* governor thread */ 92 cpudrv_pm_spd_t *top_spd; /* ptr to effective head speed */ 93 #endif 94 boolean_t pm_started; /* PM really started */ 95 } cpudrv_pm_t; 96 97 /* 98 * Idle & user threads water marks in percentage 99 */ 100 #if defined(__x86) 101 #define CPUDRV_IDLE_HWM 85 /* idle high water mark */ 102 #define CPUDRV_IDLE_LWM 70 /* idle low water mark */ 103 #define CPUDRV_IDLE_BLWM_CNT_MAX 1 /* # of iters idle can be < lwm */ 104 #define CPUDRV_IDLE_BHWM_CNT_MAX 1 /* # of iters idle can be < hwm */ 105 #else 106 #define CPUDRV_IDLE_HWM 98 /* idle high water mark */ 107 #define CPUDRV_IDLE_LWM 8 /* idle low water mark */ 108 #define CPUDRV_IDLE_BLWM_CNT_MAX 2 /* # of iters idle can be < lwm */ 109 #define CPUDRV_IDLE_BHWM_CNT_MAX 2 /* # of iters idle can be < hwm */ 110 #endif 111 #define CPUDRV_USER_HWM 20 /* user high water mark */ 112 #define CPUDRV_IDLE_BUF_ZONE 4 /* buffer zone when going down */ 113 114 115 /* 116 * Maximums for creating 'pm-components' property 117 */ 118 #define CPUDRV_COMP_MAX_DIG 4 /* max digits in power level */ 119 /* or divisor */ 120 #define CPUDRV_COMP_MAX_VAL 9999 /* max value in above digits */ 121 122 /* 123 * Component number for calls to PM framework 124 */ 125 #define CPUDRV_COMP_NUM 0 /* first component is 0 */ 126 127 /* 128 * Quantum counts for normal and other clock speeds in terms of ticks. 129 * 130 * In determining the quantum count, we need to balance two opposing factors: 131 * 132 * 1) Minimal delay when user start using the CPU that is in low 133 * power mode -- requires that we monitor more frequently, 134 * 135 * 2) Extra code executed because of frequent monitoring -- requires 136 * that we monitor less frequently. 137 * 138 * We reach a tradeoff between these two requirements by monitoring 139 * more frequently when we are in low speed mode (CPUDRV_QUANT_CNT_OTHR) 140 * so we can bring the CPU up without user noticing it. Moreover, at low 141 * speed we are not using CPU much so extra code execution should be fine. 142 * Since we are in no hurry to bring CPU down and at normal speed and we 143 * might really be using the CPU fully, we monitor less frequently 144 * (CPUDRV_QUANT_CNT_NORMAL). 145 */ 146 #if defined(__x86) 147 #define CPUDRV_QUANT_CNT_NORMAL (hz * 1) /* 1 sec */ 148 #else 149 #define CPUDRV_QUANT_CNT_NORMAL (hz * 5) /* 5 sec */ 150 #endif 151 #define CPUDRV_QUANT_CNT_OTHR (hz * 1) /* 1 sec */ 152 153 /* 154 * Taskq parameters 155 */ 156 #define CPUDRV_TASKQ_THREADS 1 /* # threads to run CPU monitor */ 157 #define CPUDRV_TASKQ_MIN 2 /* min # of taskq entries */ 158 #define CPUDRV_TASKQ_MAX 2 /* max # of taskq entries */ 159 160 161 /* 162 * Device driver state structure 163 */ 164 typedef struct cpudrv_devstate { 165 dev_info_t *dip; /* devinfo handle */ 166 cpu_t *cp; /* CPU data for this node */ 167 processorid_t cpu_id; /* CPU number for this node */ 168 cpudrv_pm_t cpudrv_pm; /* power management data */ 169 kmutex_t lock; /* protects state struct */ 170 } cpudrv_devstate_t; 171 172 extern void *cpudrv_state; 173 extern boolean_t cpudrv_enabled; 174 175 /* 176 * Debugging definitions 177 */ 178 #ifdef DEBUG 179 #define D_INIT 0x00000001 180 #define D_FINI 0x00000002 181 #define D_ATTACH 0x00000004 182 #define D_DETACH 0x00000008 183 #define D_POWER 0x00000010 184 #define D_PM_INIT 0x00000020 185 #define D_PM_FREE 0x00000040 186 #define D_PM_COMP_CREATE 0x00000080 187 #define D_PM_MONITOR 0x00000100 188 #define D_PM_MONITOR_VERBOSE 0x00000200 189 #define D_PM_MONITOR_DELAY 0x00000400 190 191 extern uint_t cpudrv_debug; 192 193 #define _PRINTF prom_printf 194 #define DPRINTF(flag, args) if (cpudrv_debug & flag) _PRINTF args; 195 #else 196 #define DPRINTF(flag, args) 197 #endif /* DEBUG */ 198 199 extern int cpudrv_change_speed(cpudrv_devstate_t *, cpudrv_pm_spd_t *); 200 extern boolean_t cpudrv_get_cpu_id(dev_info_t *, processorid_t *); 201 extern boolean_t cpudrv_is_governor_thread(cpudrv_pm_t *); 202 extern boolean_t cpudrv_mach_init(cpudrv_devstate_t *); 203 extern boolean_t cpudrv_mach_fini(cpudrv_devstate_t *); 204 extern boolean_t cpudrv_power_ready(cpu_t *); 205 extern boolean_t cpudrv_is_enabled(cpudrv_devstate_t *); 206 extern void cpudrv_set_supp_freqs(cpudrv_devstate_t *); 207 extern int cpudrv_get_cpu(cpudrv_devstate_t *); 208 209 #endif /* _KERNEL */ 210 211 #ifdef __cplusplus 212 } 213 #endif 214 215 #endif /* _SYS_CPUDRV_H */ 216