xref: /illumos-gate/usr/src/uts/common/sys/auxv_SPARC.h (revision 1ba081ee9f36cc673e86a7218c97c558c5b193e1)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef	_SYS_AUXV_SPARC_H
27 #define	_SYS_AUXV_SPARC_H
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
33 /*
34  * Flags used to describe various instruction set extensions available
35  * on different SPARC processors.
36  *
37  * [The first four are legacy descriptions.]
38  */
39 #define	AV_SPARC_MUL32	0x0001	/* 32x32-bit smul/umul is efficient */
40 #define	AV_SPARC_DIV32	0x0002	/* 32x32-bit sdiv/udiv is efficient */
41 #define	AV_SPARC_FSMULD	0x0004	/* fsmuld is efficient */
42 #define	AV_SPARC_V8PLUS	0x0008	/* V9 instructions available to 32-bit apps */
43 #define	AV_SPARC_POPC	0x0010	/* popc is efficient */
44 #define	AV_SPARC_VIS	0x0020	/* VIS instruction set supported */
45 #define	AV_SPARC_VIS2	0x0040	/* VIS2 instruction set supported */
46 #define	AV_SPARC_ASI_BLK_INIT	0x0080	/* ASI_BLK_INIT_xxx ASI */
47 #define	AV_SPARC_FMAF	0x0100	/* Fused Multiply-Add */
48 /* Bit 9 is not in use */
49 #define	AV_SPARC_VIS3	0x0400  /* VIS3 instruction set extensions */
50 #define	AV_SPARC_HPC	0x0800  /* High Performance Computing insns */
51 #define	AV_SPARC_RANDOM	0x1000  /* random instruction */
52 #define	AV_SPARC_TRANS	0x2000  /* transactions supported */
53 #define	AV_SPARC_FJFMAU	0x4000	/* Fujitsu Unfused Multiply-Add */
54 #define	AV_SPARC_IMA	0x8000	/* Integer Multiply-add */
55 #define	AV_SPARC_ASI_CACHE_SPARING	0x10000
56 #define	AV_SPARC_PAUSE	0x20000	/* pause instruction */
57 #define	AV_SPARC_CBCOND	0x40000	/* compare and branch instructions */
58 #define	AV_SPARC_AES	0x80000	/* AES instructions */
59 #define	AV_SPARC_DES	0x100000	/* DES instructions */
60 #define	AV_SPARC_KASUMI	0x200000	/* Kasumi instructions */
61 #define	AV_SPARC_CAMELLIA	0x400000	/* Camellia instructions */
62 #define	AV_SPARC_MD5	0x800000	/* MD5 instructions */
63 #define	AV_SPARC_SHA1	0x1000000	/* SHA1 instructions */
64 #define	AV_SPARC_SHA256	0x2000000	/* SHA256 instructions */
65 #define	AV_SPARC_SHA512	0x4000000	/* SHA512 instructions */
66 #define	AV_SPARC_MPMUL	0x8000000	/* multiple precision multiply */
67 #define	AV_SPARC_MONT	0x10000000	/* Montgomery mult/sqr instructions */
68 #define	AV_SPARC_CRC32C	0x20000000	/* CRC32C instructions */
69 
70 #define	FMT_AV_SPARC	\
71 	"\20" \
72 	"\36crc32c\35mont\34mpmul\33sha512\32sha256\31sha1"	\
73 	"\30md5\27camellia\26kasumi\25des\24aes\23cbcond\22pause\21cspare" \
74 	"\20ima\17fjfmau\16trans\15random\14hpc\13vis3\12-\11fmaf"	\
75 	"\10ASIBlkInit\7vis2\6vis\5popc\4v8plus\3fsmuld\2div32\1mul32"
76 
77 /*
78  * compatibility defines: Obsolete
79  */
80 #define	AV_SPARC_HWMUL_32x32	AV_SPARC_MUL32
81 #define	AV_SPARC_HWDIV_32x32	AV_SPARC_DIV32
82 #define	AV_SPARC_HWFSMULD	AV_SPARC_FSMULD
83 
84 #ifdef __cplusplus
85 }
86 #endif
87 
88 #endif	/* !_SYS_AUXV_SPARC_H */
89