1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright (c) 2000-2001 by Sun Microsystems, Inc. 24 * All rights reserved. 25 * 26 * CAUTION: This header file has not gone through a formal review process. 27 * Thus its commitment level is very low and may change or be removed 28 * at any time. 29 */ 30 31 #ifndef _SYS_AC97_H 32 #define _SYS_AC97_H 33 34 #pragma ident "%Z%%M% %I% %E% SMI" 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif 39 40 #ifdef _KERNEL 41 42 /* 43 * This header file describes the AC-97 V2.1 Codec register set. See the 44 * spec for a detailed description of each register. 45 */ 46 47 struct ac97_v21 { 48 uint16_t ac97_reset; /* 00h */ 49 uint16_t ac97_master_volume; /* 02h */ 50 uint16_t ac97_headphone_volume; /* 04h, optional */ 51 uint16_t ac97_master_mono_volume; /* 06h, optional */ 52 uint16_t ac97_master_tone; /* 08h, optional */ 53 uint16_t ac97_pc_beep_volume; /* 0ah, optional */ 54 uint16_t ac97_phone_volume; /* 0ch, optional */ 55 uint16_t ac97_mic_volume; /* 0eh */ 56 uint16_t ac97_line_in_volume; /* 10h */ 57 uint16_t ac97_cd_volume; /* 12h */ 58 uint16_t ac97_video_volume; /* 14h, optional */ 59 uint16_t ac97_aux_volume; /* 16h, optional */ 60 uint16_t ac97_PCM_out_volume; /* 18h */ 61 uint16_t ac97_record_select; /* 1ah */ 62 uint16_t ac97_record_gain; /* 1ch */ 63 uint16_t ac97_record_gain_mic; /* 1eh, optional */ 64 uint16_t ac97_general_purpose; /* 20h, optional */ 65 uint16_t ac97_threeD_control; /* 22h, optional */ 66 uint16_t ac97_reserved_1; /* 24h */ 67 uint16_t ac97_pwrdwn_ctrl_stat; /* 26h */ 68 69 /* extended audio registers */ 70 71 uint16_t ac97_ext_audio_id; /* 28h, optional */ 72 uint16_t ac97_ext_audio_stat_ctrl; /* 2ah, optional */ 73 uint16_t ac97_ext_front_DAC_rate; /* 2ch, optional */ 74 uint16_t ac97_ext_surround_DAC_rate; /* 2eh, optional */ 75 uint16_t ac97_ext_LFE_DAC_rate; /* 30h, optional */ 76 uint16_t ac97_ext_LR_ADC_rate; /* 32h, optional */ 77 uint16_t ac97_ext_mic_ADC_rate; /* 34h, optional */ 78 uint16_t ac97_ext_C_LFE_volume; /* 36h, optional */ 79 uint16_t ac97_ext_LR_surround_volume; /* 38h, optional */ 80 uint16_t ac97_ext_reserved_1; /* 3ah, optional */ 81 82 /* extended modem registers */ 83 84 uint16_t ac97_ext_modem_id; /* 3ch, optional */ 85 uint16_t ac97_ext_modem_stat_ctrl; /* 3eh, optional */ 86 uint16_t ac97_ext_line1_DAC_ADC_rate; /* 40h, optional */ 87 uint16_t ac97_ext_line2_DAC_ADC_rate; /* 42h, optional */ 88 uint16_t ac97_ext_hndst_DAC_ADC_rate; /* 44h, optional */ 89 uint16_t ac97_ext_line1_DAC_ADC_level; /* 46h, optional */ 90 uint16_t ac97_ext_line2_DAC_ADC_level; /* 48h, optional */ 91 uint16_t ac97_ext_hndst_DAC_ADC_level; /* 4ah, optional */ 92 uint16_t ac97_ext_GPIO_pin_config; /* 4ch, optional */ 93 uint16_t ac97_ext_GPIO_pin_polarity; /* 4eh, optional */ 94 uint16_t ac97_ext_GPIO_pin_sticky; /* 50h, optional */ 95 uint16_t ac97_ext_GPIO_pin_wakeup; /* 52h, optional */ 96 uint16_t ac97_ext_GPIO_pin_status; /* 54h, optional */ 97 uint16_t ac97_ext_modem_AFE_stat_ctrl; /* 56h, optional */ 98 uint16_t ac97_ext_reserved_2; /* 58h, optional */ 99 100 /* reserved for vendor usage */ 101 uint16_t ac97_vendor_01; /* 5ah, optional */ 102 uint16_t ac97_vendor_02; /* 5ch, optional */ 103 uint16_t ac97_vendor_03; /* 5eh, optional */ 104 uint16_t ac97_vendor_04; /* 60h, optional */ 105 uint16_t ac97_vendor_05; /* 62h, optional */ 106 uint16_t ac97_vendor_06; /* 64h, optional */ 107 uint16_t ac97_vendor_07; /* 66h, optional */ 108 uint16_t ac97_vendor_08; /* 68h, optional */ 109 uint16_t ac97_vendor_09; /* 6ah, optional */ 110 uint16_t ac97_vendor_10; /* 6ch, optional */ 111 uint16_t ac97_vendor_11; /* 6eh, optional */ 112 uint16_t ac97_vendor_12; /* 70h, optional */ 113 uint16_t ac97_vendor_13; /* 72h, optional */ 114 uint16_t ac97_vendor_14; /* 74h, optional */ 115 uint16_t ac97_vendor_15; /* 76h, optional */ 116 uint16_t ac97_vendor_16; /* 78h, optional */ 117 uint16_t ac97_vendor_17; /* 7ah, optional */ 118 119 uint16_t ac97_vendor_id1; /* 7ch */ 120 uint16_t ac97_vendor_id2; /* 7eh */ 121 }; 122 typedef struct ac97_v21 ac97_v21_t; 123 124 /* 125 * Defines for the V2.1 registers. 126 */ 127 128 /* Reset Register Index 00h */ 129 #define AC97_RESET_REGISTER 0x00 130 #define RR_DEDICATED_MIC 0x0001 131 #define RR_RESERVED 0x0002 132 #define RR_BASS_TREBLE 0x0004 133 #define RR_PSEUDO_STEREO 0x0008 134 #define RR_HEADPHONE_SUPPORT 0x0010 135 #define RR_LOUDNESS_SUPPORT 0x0020 136 #define RR_18_BIT_DAC 0x0040 137 #define RR_20_BIT_DAC 0x0080 138 #define RR_18_BIT_ADC 0x0100 139 #define RR_20_BIT_ADC 0x0200 140 #define RR_3D_STEREO_ENHANCE_MASK 0x7c00 141 142 /* Master Volume Register Index 02h */ 143 #define AC97_MASTER_VOLUME_REGISTER 0x02 144 #define MVR_RIGHT_MASK 0x001f 145 #define MVR_RIGHT_0dB_ATTEN 0x0000 146 #define MVR_RIGHT_OPTIONAL_MASK 0x003f 147 #define MVR_LEFT_MASK 0x1f00 148 #define MVR_LEFT_0dB_ATTEN 0x0000 149 #define MVR_LEFT_OPTIONAL_MASK 0x3f00 150 #define MVR_MUTE 0x8000 151 152 /* Headphone Volume Register Index 04h - Optional */ 153 #define AC97_HEADPHONE_VOLUME_REGISTER 0x04 154 #define HPVR_RIGHT_MASK 0x001f 155 #define HPVR_RIGHT_0dB_ATTEN 0x0000 156 #define HPVR_RIGHT_OPTIONAL_MASK 0x003f 157 #define HPVR_LEFT_MASK 0x1f00 158 #define HPVR_LEFT_0dB_ATTEN 0x0000 159 #define HPVR_LEFT_OPTIONAL_MASK 0x3f00 160 #define HPVR_MUTE 0x8000 161 162 /* Mono Master Volume Register Index 06h - Optional */ 163 #define AC97_MONO_MASTER_VOLUME_REGSITER 0x06 164 #define MMVR_MASK 0x001f 165 #define MMVR_0dB_ATTEN 0x0000 166 #define MMVR_OPTIONAL_MASK 0x003f 167 #define MMVR_MUTE 0x8000 168 169 /* Master Tone Control Register Index 08h - Optional */ 170 #define AC97_MASTER_TONE_CONTROL_REGISTER 0x08 171 #define MTCR_TREBLE_MASK 0x000e 172 #define MTCR_TREBLE_OPTIONAL_MASK 0x000f 173 #define MTCR_TREBLE_BYPASS 0x000f 174 #define MTCR_BASS_MASK 0x0e00 175 #define MTCR_BASS_OPTIONAL_MASK 0x0f00 176 #define MTCR_BASS_BYPASS 0x0f00 177 178 /* PC Beep Register Index 0ah - Optional */ 179 #define AC97_PC_BEEP_REGISTER 0x0a 180 #define PCBR_VOLUME_MASK 0x001e 181 #define PCBR_0dB_ATTEN 0x0000 182 #define PCBR_MUTE 0x8000 183 184 /* Phone Volume Register Index 0ch - Optional */ 185 #define AC97_PHONE_VOLUME_REGISTER 0x0c 186 #define PVR_GAIN_MASK 0x001f 187 #define PVR_0dB_GAIN 0x0010 188 #define PVR_MAX_ATTEN 0x001f 189 #define PVR_MUTE 0x8000 190 191 /* Mic Volume Register Index 0eh */ 192 #define AC97_MIC_VOLUME_REGISTER 0x0e 193 #define MICVR_GAIN_MASK 0x001f 194 #define MICVR_0dB_GAIN 0x0008 195 #define MICVR_MAX_ATTEN 0x001f 196 #define MICVR_20dB_BOOST 0x0040 197 #define MICVR_20dB_NOBOOST 0x0000 198 #define MICVR_MUTE 0x8000 199 200 /* Line In Volume Register Index 10h */ 201 #define AC97_LINE_IN_VOLUME_REGISTER 0x10 202 #define LIVR_RIGHT_GAIN_MASK 0x001f 203 #define LIVR_RIGHT_0dB_GAIN 0x0010 204 #define LIVR_RIGHT_MAX_ATTEN 0x001f 205 #define LIVR_LEFT_GAIN_MASK 0x1f00 206 #define LIVR_LEFT_0dB_GAIN 0x1000 207 #define LIVR_LEFT_MAX_ATTEN 0x1f00 208 #define LIVR_MUTE 0x8000 209 210 /* CD Volume Register Index 12h */ 211 #define AC97_CD_VOLUME_REGISTER 0x12 212 #define CDVR_RIGHT_GAIN_MASK 0x001f 213 #define CDVR_RIGHT_0dB_GAIN 0x0010 214 #define CDVR_RIGHT_MAX_ATTEN 0x001f 215 #define CDVR_LEFT_GAIN_MASK 0x1f00 216 #define CDVR_LEFT_0dB_GAIN 0x1000 217 #define CDVR_LEFT_MAX_ATTEN 0x1f00 218 #define CDVR_MUTE 0x8000 219 220 /* Video Volume Register Index 14h - Optional */ 221 #define AC97_VIDEO_VOLUME_REGISTER 0x14 222 #define VIDVR_RIGHT_GAIN_MASK 0x001f 223 #define VIDVR_RIGHT_0dB_GAIN 0x0010 224 #define VIDVR_RIGHT_MAX_ATTEN 0x001f 225 #define VIDVR_LEFT_GAIN_MASK 0x1f00 226 #define VIDVR_LEFT_0dB_GAIN 0x1000 227 #define VIDVR_LEFT_MAX_ATTEN 0x1f00 228 #define VIDVR_MUTE 0x8000 229 230 /* Aux Volume Register Index 16h - Optional */ 231 #define AC97_AUX_VOLUME_REGISTER 0x16 232 #define AUXVR_RIGHT_GAIN_MASK 0x001f 233 #define AUXVR_RIGHT_0dB_GAIN 0x0010 234 #define AUXVR_RIGHT_MAX_ATTEN 0x001f 235 #define AUXVR_LEFT_GAIN_MASK 0x1f00 236 #define AUXVR_LEFT_0dB_GAIN 0x1000 237 #define AUXVR_LEFT_MAX_ATTEN 0x1f00 238 #define AUXVR_MUTE 0x8000 239 240 /* PCM Out Input Volume Register Index 18h */ 241 #define AC97_PCM_OUT_VOLUME_REGISTER 0x18 242 #define PCMOVR_RIGHT_GAIN_MASK 0x001f 243 #define PCMOVR_RIGHT_0dB_GAIN 0x0010 244 #define PCMOVR_RIGHT_MAX_ATTEN 0x001f 245 #define PCMOVR_LEFT_GAIN_MASK 0x1f00 246 #define PCMOVR_LEFT_0dB_GAIN 0x1000 247 #define PCMOVR_LEFT_MAX_ATTEN 0x1f00 248 #define PCMOVR_MUTE 0x8000 249 250 /* Record Select Control Register Index 1ah */ 251 #define AC97_RECORD_SELECT_CTRL_REGISTER 0x1a 252 #define RSCR_R_MIC 0x0000 253 #define RSCR_R_CD 0x0001 254 #define RSCR_R_VIDEO 0x0002 255 #define RSCR_R_AUX 0x0003 256 #define RSCR_R_LINE_IN 0x0004 257 #define RSCR_R_STEREO_MIX 0x0005 258 #define RSCR_R_MONO_MIX 0x0006 259 #define RSCR_R_PHONE 0x0007 260 #define RSCR_L_MIC 0x0000 261 #define RSCR_L_CD 0x0100 262 #define RSCR_L_VIDEO 0x0200 263 #define RSCR_L_AUX 0x0300 264 #define RSCR_L_LINE_IN 0x0400 265 #define RSCR_L_STEREO_MIX 0x0500 266 #define RSCR_L_MONO_MIX 0x0600 267 #define RSCR_L_PHONE 0x0700 268 269 /* Record Gain Register Index 1ch */ 270 #define AC97_RECORD_GAIN_REGISTER 0x1c 271 #define RGR_RIGHT_MASK 0x000f 272 #define RGR_RIGHT_0db_GAIN 0x0000 273 #define RGR_RIGHT_MAX_GAIN 0x000f 274 #define RGR_LEFT_MASK 0x0f00 275 #define RGR_LEFT_0db_GAIN 0x0000 276 #define RGR_LEFT_MAX_GAIN 0x0f00 277 #define RGR_MUTE 0x8000 278 279 /* Record Gain Mic Register Index 1eh - Optional */ 280 #define AC97_RECORD_GAIN_MIC_REGISTER 0x1e 281 #define RGMR_MASK 0x000f 282 #define RGMR_MUTE 0x8000 283 #define RGMR_MASK 0x000f 284 #define RGMR_0db_GAIN 0x0000 285 #define RGMR_MAX_GAIN 0x000f 286 287 /* General Purpose Register Index 20h - Optional */ 288 #define AC97_GENERAL_PURPOSE_REGISTER 0x20 289 #define GPR_LPBK 0x0080 290 #define GPR_MS_MIC1 0x0000 291 #define GPR_MS_MIC2 0x0100 292 #define GPR_MONO_MIX_IN 0x0000 293 #define GPR_MONO_MIC_IN 0x0200 294 #define GPR_BASS_BOOST 0x1000 295 #define GPR_3D_STEREO_ENHANCE 0x2000 296 #define GPR_ST 0x4000 297 #define GPR_POP_PRE_3D 0x0000 298 #define GPR_POP_POST_3D 0x8000 299 300 /* 3D Control Regsiter Index 22h - Optional */ 301 #define AC97_THREE_D_CONTROL_REGISTER 0x22 302 #define TDCR_DEPTH_MASK 0x000f 303 #define TDCR_CENTER_MASK 0x0f00 304 #define TDCR_NULL 0x0000 305 306 /* Powerdown Control Status Register Index 26h */ 307 #define AC97_POWERDOWN_CTRL_STAT_REGISTER 0x26 308 #define PCSR_ADC 0x0001 309 #define PCSR_DAC 0x0002 310 #define PCSR_ANL 0x0004 311 #define PCSR_REF 0x0008 312 #define PCSR_POWERD_UP (PCSR_ADC|PCSR_DAC|\ 313 PCSR_ANL|PCSR_REF) 314 #define PCSR_PR0 0x0100 315 #define PCSR_PR1 0x0200 316 #define PCSR_PR2 0x0400 317 #define PCSR_PR3 0x0800 318 #define PCSR_PR4 0x1000 319 #define PCSR_PR5 0x2000 320 #define PCSR_PR6 0x4000 321 #define PCSR_EAPD 0x8000 322 323 /* Extended Audio Register Index 28h - Optional */ 324 #define AC97_EXTENDED_AUDIO_REGISTER 0x28 325 #define EAR_VRA 0x0001 326 #define EAR_DRA 0x0002 327 #define EAR_VRM 0x0008 328 #define EAR_CDAC 0x0040 329 #define EAR_SDAC 0x0080 330 #define EAR_LDAC 0x0100 331 #define EAR_AMAP 0x0200 332 #define EAR_PRIMARY_CODEC 0x0000 333 #define EAR_SECONDARY_01_CODEC 0x4000 334 #define EAR_SECONDARY_10_CODEC 0x8000 335 #define EAR_SECONDARY_11_CODEC 0xc000 336 337 /* Extended Audio Status and Control Register Index 2ah - Optional */ 338 #define AC97_EXTENDED_AUDIO_STAT_CTRL_REGISTER 0x2a 339 #define EASCR_VRA 0x0001 340 #define EASCR_DRA 0x0002 341 #define EASCR_VRM 0x0008 342 #define EASCR_CDAC 0x0040 343 #define EASCR_SDAC 0x0080 344 #define EASCR_LDAC 0x0100 345 #define EASCR_MADC 0x0200 346 #define EASCR_PRI 0x0800 347 #define EASCR_PRJ 0x1000 348 #define EASCR_PRK 0x2000 349 #define EASCR_PRL 0x4000 350 351 /* Extended Front DAC Rate Register 2ch - Optional */ 352 #define AC97_EXTENDED_FRONT_DAC_RATE_REGISTER 0x2c 353 #define AC97_SAMPLE_RATE_48000 0xbb80 354 355 /* Extended Surround DAC Rate Register 2eh - Optional */ 356 #define AC97_EXTENDED_SURROUND_DAC_RATE_REGISTER 0x2e 357 358 /* Extended LFE DAC Rate Register 30h - Optional */ 359 #define AC97_EXTENDED_LFE_DAC_RATE_REGISTER 0x30 360 361 /* Extended LR DAC Rate Register 32h - Optional */ 362 #define AC97_EXTENDED_LR_DAC_RATE_REGISTER 0x32 363 364 /* Extended Mic ADC Rate Register 34h - Optional */ 365 #define AC97_EXTENDED_MIC_ADC_RATE_REGISTER 0x34 366 367 /* Extended Center and LFE Volume Register 36h - Optional */ 368 #define AC97_EXTENDED_C_LFE_VOLUME_REGISTER 0x36 369 #define EXLFEVR_CENTER_MASK 0x001f 370 #define EXLFEVR_CENTER_OPTIONAL_MASK 0x003f 371 #define EXLFEVR_CENTER_MTUE 0x0080 372 #define EXLFEVR_LFE_MASK 0x1f00 373 #define EXLFEVR_LFE_OPTIONAL_MASK 0x3f00 374 #define EXLFEVR_LFE_MUTE 0x8000 375 376 /* Extended Left and Right Surround Volume Register 38h - Optional */ 377 #define AC97_EXTENDED_LRS_VOLUME_REGISTER 0x38 378 #define EXLFEVR_RIGHT_MASK 0x001f 379 #define EXLFEVR_RIGHT_OPTIONAL_MASK 0x003f 380 #define EXLFEVR_RIGHT_MTUE 0x0080 381 #define EXLFEVR_LEFT_MASK 0x1f00 382 #define EXLFEVR_LEFT_OPTIONAL_MASK 0x3f00 383 #define EXLFEVR_LEFT_MUTE 0x8000 384 385 /* Extended Modem ID Register 3ch - Optional */ 386 #define AC97_EXTENDED_MODEM_ID_REGISTER 0x3c 387 #define EMIDR_LINE1 0x0001 388 #define EMIDR_LINE2 0x0002 389 #define EMIDR_HSET 0x0004 390 #define EMIDR_CID1 0x0008 391 #define EMIDR_CID2 0x0010 392 #define EMIDR_PRIMARY_CODEC 0x0000 393 #define EMIDR_SECONDARY_01_CODEC 0x4000 394 #define EMIDR_SECONDARY_10_CODEC 0x8000 395 #define EMIDR_SECONDARY_11_CODEC 0xc000 396 397 /* Extended Modem Status and Control Register 3eh - Optional */ 398 #define AC97_EXTENDED_MODE_STAT_CTRL_REGISTER 0x3e 399 #define EMSCR_BPIO 0x0001 400 #define EMSCR_MREF 0x0002 401 #define EMSCR_ADC1 0x0004 402 #define EMSCR_DAC1 0x0008 403 #define EMSCR_ADC2 0x0010 404 #define EMSCR_DAC2 0x0020 405 #define EMSCR_HADC 0x0040 406 #define EMSCR_HDAC 0x0080 407 #define EMSCR_PRA 0x0100 408 #define EMSCR_PRB 0x0200 409 #define EMSCR_PRC 0x0400 410 #define EMSCR_PRD 0x0800 411 #define EMSCR_PRE 0x1000 412 #define EMSCR_PRF 0x2000 413 #define EMSCR_PRG 0x4000 414 #define EMSCR_PRH 0x8000 415 416 /* Extended Modem Line 1 DAC/ADC Sample Rate Register 40h - Optional */ 417 #define AC97_EXTENDED_MODEM_LINE1_RATE_REGISTER 0x40 418 419 /* Extended Modem Line 2 DAC/ADC Sample Rate Register 42h - Optional */ 420 #define AC97_EXTENDED_MODEM_LINE2_RATE_REGISTER 0x42 421 422 /* Extended Modem Handset Sample Rate Register 44h - Optional */ 423 #define AC97_EXTENDED_MODEM_HANDSET_RATE_REGISTER 0x44 424 425 /* Extended Modem Line 1 DAC/ADC Level Register 46h - Optional */ 426 #define AC97_EXTENDED_MODEM_LINE1_LEVEL_REGISTER 0x46 427 #define EML1LR_ADC_LEVEL_MASK 0x000f 428 #define EML1LR_ADC_LEVEL_MUTE 0x0080 429 #define EML1LR_DAC_LEVEL_MASK 0x0f00 430 #define EML1LR_DAC_LEVEL_MUTE 0x8000 431 432 /* Extended Modem Line 2 DAC/ADC Level Register 48h - Optional */ 433 #define AC97_EXTENDED_MODEM_LINE2_LEVEL_REGISTER 0x48 434 #define EML2LR_ADC_LEVEL_MASK 0x000f 435 #define EML2LR_ADC_LEVEL_MUTE 0x0080 436 #define EML2LR_DAC_LEVEL_MASK 0x0f00 437 #define EML2LR_DAC_LEVEL_MUTE 0x8000 438 439 /* Extended Modem Handset DAC/ADC Level Register 4ah - Optional */ 440 #define AC97_EXTENDED_MODEM_HANDSET_LEVEL_REGISTER 0x4a 441 #define EMHLR_ADC_LEVEL_MASK 0x000f 442 #define EMHLR_ADC_LEVEL_MUTE 0x0080 443 #define EMHLR_DAC_LEVEL_MASK 0x0f00 444 #define EMHLR_DAC_LEVEL_MUTE 0x8000 445 446 /* Extended Modem GPIO Pin Configuration Register 4ch - Optional */ 447 #define AC97_EXTENDED_MODEM_GPIO_PIN_REGISTER 0x4c 448 449 /* Extended Modem GPIO Pin Polarity Register 4eh - Optional */ 450 #define AC97_EXTENDED_MODEM_GPIO_POLARITY_REGISTER 0x4e 451 452 /* Extended Modem GPIO Pin Sticky Register 50h - Optional */ 453 #define AC97_EXTENDED_MODEM_GPIO_STICKY_REGISTER 0x50 454 455 /* Extended Modem GPIO Pin Wake-up Mask Register 52h - Optional */ 456 #define AC97_EXTENDED_MODEM_GPIO_WAKEUP_REGISTER 0x52 457 458 /* Extended Modem GPIO Pin Status Mask Register 54h - Optional */ 459 #define AC97_EXTENDED_MODEM_GPIO_STATUS_REGISTER 0x54 460 461 /* Extended Modem AFE Status and Control Register 56h - Optional */ 462 #define AC97_EXTENDED_MODEM_AFE_STAT_CTRL_REGISTER 0x56 463 #define EMAFESCR_L1B0 0x0001 464 #define EMAFESCR_L1B1 0x0002 465 #define EMAFESCR_L1B2 0x0004 466 #define EMAFESCR_L2B0 0x0010 467 #define EMAFESCR_L2B1 0x0020 468 #define EMAFESCR_L2B2 0x0040 469 #define EMAFESCR_HSB0 0x0100 470 #define EMAFESCR_HSB1 0x0200 471 #define EMAFESCR_HSB2 0x0400 472 #define EMAFESCR_MLINK_ON 0x0000 473 #define EMAFESCR_MLINK_OFF 0x1000 474 #define EMAFESCR_CIDR 0x2000 475 #define EMAFESCR_CID1 0x4000 476 #define EMAFESCR_CID2 0x8000 477 478 /* Vender Reserved Registers 5ah - 7ah - Optional */ 479 #define AC97_VENDOR_REGISTER_01 0x5a 480 #define AC97_VENDOR_REGISTER_02 0x5c 481 #define AC97_VENDOR_REGISTER_03 0x5e 482 #define AC97_VENDOR_REGISTER_04 0x60 483 #define AC97_VENDOR_REGISTER_05 0x62 484 #define AC97_VENDOR_REGISTER_06 0x64 485 #define AC97_VENDOR_REGISTER_07 0x66 486 #define AC97_VENDOR_REGISTER_08 0x68 487 #define AC97_VENDOR_REGISTER_09 0x6a 488 #define AC97_VENDOR_REGISTER_10 0x6c 489 #define AC97_VENDOR_REGISTER_11 0x6e 490 #define AC97_VENDOR_REGISTER_12 0x70 491 #define AC97_VENDOR_REGISTER_13 0x72 492 #define AC97_VENDOR_REGISTER_14 0x74 493 #define AC97_VENDOR_REGISTER_15 0x76 494 #define AC97_VENDOR_REGISTER_16 0x78 495 #define AC97_VENDOR_REGISTER_17 0x7a 496 497 /* Vendor ID1 Register 7ch */ 498 #define AC97_VENDOR_ID1_REGISTER 0x7c 499 #define VID1R_CHAR2_MASK 0x00ff 500 #define VID1R_CHAR1_MASK 0xff00 501 502 /* Vendor ID2 Register 7eh */ 503 #define AC97_VENDOR_ID2_REGISTER 0x7e 504 #define VID2R_REVISION_MASK 0x00ff 505 #define VID2R_CHAR3_MASK 0xff00 506 507 #endif /* _KERNEL */ 508 509 #ifdef __cplusplus 510 } 511 #endif 512 513 #endif /* _SYS_AC97_H */ 514