1*7c478bd9Sstevel@tonic-gate /* 2*7c478bd9Sstevel@tonic-gate * CDDL HEADER START 3*7c478bd9Sstevel@tonic-gate * 4*7c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*7c478bd9Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*7c478bd9Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*7c478bd9Sstevel@tonic-gate * with the License. 8*7c478bd9Sstevel@tonic-gate * 9*7c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*7c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*7c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 12*7c478bd9Sstevel@tonic-gate * and limitations under the License. 13*7c478bd9Sstevel@tonic-gate * 14*7c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*7c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*7c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*7c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*7c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*7c478bd9Sstevel@tonic-gate * 20*7c478bd9Sstevel@tonic-gate * CDDL HEADER END 21*7c478bd9Sstevel@tonic-gate */ 22*7c478bd9Sstevel@tonic-gate /* 23*7c478bd9Sstevel@tonic-gate * Copyright 1999-2002 Sun Microsystems, Inc. All rights reserved. 24*7c478bd9Sstevel@tonic-gate * Use is subject to license terms. 25*7c478bd9Sstevel@tonic-gate */ 26*7c478bd9Sstevel@tonic-gate 27*7c478bd9Sstevel@tonic-gate #ifndef _SYS_1394_ADAPTERS_HCI1394_IXL_H 28*7c478bd9Sstevel@tonic-gate #define _SYS_1394_ADAPTERS_HCI1394_IXL_H 29*7c478bd9Sstevel@tonic-gate 30*7c478bd9Sstevel@tonic-gate /* 31*7c478bd9Sstevel@tonic-gate * hci1394_ixl.h 32*7c478bd9Sstevel@tonic-gate * Structures and defines for IXL processing. 33*7c478bd9Sstevel@tonic-gate * 1. Structures tracking per-command state [created during compilation 34*7c478bd9Sstevel@tonic-gate * and stored in each command's compiler_privatep]. 35*7c478bd9Sstevel@tonic-gate * 2. Structures used for state tracking during IXL program compilation. 36*7c478bd9Sstevel@tonic-gate * 3. Structures used during IXL dynamic update for assessment and the 37*7c478bd9Sstevel@tonic-gate * performing the update itself. 38*7c478bd9Sstevel@tonic-gate */ 39*7c478bd9Sstevel@tonic-gate 40*7c478bd9Sstevel@tonic-gate #ifdef __cplusplus 41*7c478bd9Sstevel@tonic-gate extern "C" { 42*7c478bd9Sstevel@tonic-gate #endif 43*7c478bd9Sstevel@tonic-gate 44*7c478bd9Sstevel@tonic-gate #include <sys/note.h> 45*7c478bd9Sstevel@tonic-gate 46*7c478bd9Sstevel@tonic-gate #include <sys/1394/adapters/hci1394_def.h> 47*7c478bd9Sstevel@tonic-gate #include <sys/1394/adapters/hci1394_isoch.h> 48*7c478bd9Sstevel@tonic-gate 49*7c478bd9Sstevel@tonic-gate /* 50*7c478bd9Sstevel@tonic-gate * function return codes from hci1394_ixl_dma_sync() 51*7c478bd9Sstevel@tonic-gate */ 52*7c478bd9Sstevel@tonic-gate #define HCI1394_IXL_INTR_NOERROR (0) /* no error */ 53*7c478bd9Sstevel@tonic-gate #define HCI1394_IXL_INTR_INUPDATE (1) /* update active at intr entry */ 54*7c478bd9Sstevel@tonic-gate /* (info only, not err) */ 55*7c478bd9Sstevel@tonic-gate #define HCI1394_IXL_INTR_DMASTOP (2) /* encountered end of dma or stopped */ 56*7c478bd9Sstevel@tonic-gate /* (might be info only) */ 57*7c478bd9Sstevel@tonic-gate #define HCI1394_IXL_INTR_DMALOST (-1) /* dma location indeterminate (lost) */ 58*7c478bd9Sstevel@tonic-gate #define HCI1394_IXL_INTR_NOADV (-2) /* dma non-advance retries exhausted */ 59*7c478bd9Sstevel@tonic-gate /* (stuck or lost) */ 60*7c478bd9Sstevel@tonic-gate /* fatal internal errors from hci1394_ixl_dma_sync() */ 61*7c478bd9Sstevel@tonic-gate #define HCI1394_IXL_INTR_ININTR (-3) /* interrupt active at intrrupt entry */ 62*7c478bd9Sstevel@tonic-gate #define HCI1394_IXL_INTR_INCALL (-4) /* callback active at entry */ 63*7c478bd9Sstevel@tonic-gate #define HCI1394_IXL_INTR_STOP (-5) /* context is being stopped */ 64*7c478bd9Sstevel@tonic-gate 65*7c478bd9Sstevel@tonic-gate /* 66*7c478bd9Sstevel@tonic-gate * maximum number of jump IXL commands permitted between two data transfer 67*7c478bd9Sstevel@tonic-gate * commands. This allows for several label and jump combinations to exist, but 68*7c478bd9Sstevel@tonic-gate * also is used to detect when the label/jump complexity probably indicates 69*7c478bd9Sstevel@tonic-gate * an infinite loop without any transfers. 70*7c478bd9Sstevel@tonic-gate */ 71*7c478bd9Sstevel@tonic-gate #define HCI1394_IXL_MAX_SEQ_JUMPS 10 72*7c478bd9Sstevel@tonic-gate 73*7c478bd9Sstevel@tonic-gate /* 74*7c478bd9Sstevel@tonic-gate * xfer control structures - for execution and update control of compiled 75*7c478bd9Sstevel@tonic-gate * ixl program. 76*7c478bd9Sstevel@tonic-gate * 77*7c478bd9Sstevel@tonic-gate * For pkt, buf and special xfer start ixl commands, address 78*7c478bd9Sstevel@tonic-gate * of allocated xfer_ctl struct is set into ixl compiler_privatep. 79*7c478bd9Sstevel@tonic-gate * 80*7c478bd9Sstevel@tonic-gate * For pkt xfer non-start ixl commands, address of pkt xfer start ixl 81*7c478bd9Sstevel@tonic-gate * command is set into compiler_privatep and the index [1-n] of 82*7c478bd9Sstevel@tonic-gate * this non-start pkt xfer ixl command to its related component in the 83*7c478bd9Sstevel@tonic-gate * generated descriptor block is set into compiler_resv. 84*7c478bd9Sstevel@tonic-gate * 85*7c478bd9Sstevel@tonic-gate * The xfer_ctl_dma struct array is needed because allocation of subsequent 86*7c478bd9Sstevel@tonic-gate * descriptor blocks may be from different memory pages (i.e. not contiguous) 87*7c478bd9Sstevel@tonic-gate * and thus, during update processing, subsequent descriptor block addrs 88*7c478bd9Sstevel@tonic-gate * can't be calculated (e.g. change of buf addr or size or modification to 89*7c478bd9Sstevel@tonic-gate * set tag&sync, setskipmode or jump cmds). 90*7c478bd9Sstevel@tonic-gate */ 91*7c478bd9Sstevel@tonic-gate 92*7c478bd9Sstevel@tonic-gate #define XCTL_LABELLED 1 /* flag: ixl xfer cmd initiated by ixl label cmd */ 93*7c478bd9Sstevel@tonic-gate 94*7c478bd9Sstevel@tonic-gate typedef struct hci1394_xfer_ctl_dma { 95*7c478bd9Sstevel@tonic-gate /* 96*7c478bd9Sstevel@tonic-gate * dma descriptor block's bound addr (with "Z" bits set); is used to 97*7c478bd9Sstevel@tonic-gate * fill jump/skip addrs of previous dma descriptor block (previous on 98*7c478bd9Sstevel@tonic-gate * exec path, not link path); Note:("Z" bits)*16 is size of this 99*7c478bd9Sstevel@tonic-gate * descriptor block; individual component's format depends on IXL cmd 100*7c478bd9Sstevel@tonic-gate * type; 101*7c478bd9Sstevel@tonic-gate */ 102*7c478bd9Sstevel@tonic-gate uint32_t dma_bound; 103*7c478bd9Sstevel@tonic-gate 104*7c478bd9Sstevel@tonic-gate /* 105*7c478bd9Sstevel@tonic-gate * kernel virtual (unbound) addr of last component of allocated 106*7c478bd9Sstevel@tonic-gate * descriptor block; start addr of descriptor block can be calculated 107*7c478bd9Sstevel@tonic-gate * by adding size of a descriptor block component(16) and subtracting 108*7c478bd9Sstevel@tonic-gate * ("Z" bits)*16; Note: if ixl cmd is xmit_hdr_only, must add 2*desc 109*7c478bd9Sstevel@tonic-gate * block component(32), instead; 110*7c478bd9Sstevel@tonic-gate * used to determine current location during exec by examining/clearing 111*7c478bd9Sstevel@tonic-gate * the status/timestamp value; 112*7c478bd9Sstevel@tonic-gate * used to obtain value for store timestamp cmd; used to set new 113*7c478bd9Sstevel@tonic-gate * jump/skip addr on update calls; 114*7c478bd9Sstevel@tonic-gate * used to set new tag and sync on update calls; 115*7c478bd9Sstevel@tonic-gate */ 116*7c478bd9Sstevel@tonic-gate caddr_t dma_descp; 117*7c478bd9Sstevel@tonic-gate 118*7c478bd9Sstevel@tonic-gate /* 119*7c478bd9Sstevel@tonic-gate * pointer to the hci1394_buf_info_t structure corresponding to the 120*7c478bd9Sstevel@tonic-gate * mapped DMA memory into which this descriptor was written. Contains 121*7c478bd9Sstevel@tonic-gate * the DMA handles necessary for ddi_dma_sync() and ddi_put32/get32() 122*7c478bd9Sstevel@tonic-gate * calls. 123*7c478bd9Sstevel@tonic-gate */ 124*7c478bd9Sstevel@tonic-gate hci1394_buf_info_t *dma_buf; 125*7c478bd9Sstevel@tonic-gate 126*7c478bd9Sstevel@tonic-gate } hci1394_xfer_ctl_dma_t; 127*7c478bd9Sstevel@tonic-gate 128*7c478bd9Sstevel@tonic-gate 129*7c478bd9Sstevel@tonic-gate typedef struct hci1394_xfer_ctl { 130*7c478bd9Sstevel@tonic-gate struct hci1394_xfer_ctl *ctl_nextp; /* next ixl xfer_ctl struct */ 131*7c478bd9Sstevel@tonic-gate ixl1394_command_t *execp; /* next ixlxfer cmd (along exec path) */ 132*7c478bd9Sstevel@tonic-gate ixl1394_set_skipmode_t *skipmodep; /* associated skip cmd. if any */ 133*7c478bd9Sstevel@tonic-gate uint16_t ctl_flags; /* xctl flags defined above */ 134*7c478bd9Sstevel@tonic-gate uint16_t cnt; /* dma descriptor blocks alloc count */ 135*7c478bd9Sstevel@tonic-gate /* (for pkt=1) */ 136*7c478bd9Sstevel@tonic-gate hci1394_xfer_ctl_dma_t dma[1]; /* addrs of descriptor blocks, cnt of */ 137*7c478bd9Sstevel@tonic-gate /* these are allocated */ 138*7c478bd9Sstevel@tonic-gate } hci1394_xfer_ctl_t; 139*7c478bd9Sstevel@tonic-gate 140*7c478bd9Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("Single thread modifies", hci1394_xfer_ctl)) 141*7c478bd9Sstevel@tonic-gate 142*7c478bd9Sstevel@tonic-gate /* 143*7c478bd9Sstevel@tonic-gate * IXL Compiler temporary working variables for building IXL context program. 144*7c478bd9Sstevel@tonic-gate * (i.e. converting IXL program to a list of hci descriptor blocks) 145*7c478bd9Sstevel@tonic-gate */ 146*7c478bd9Sstevel@tonic-gate typedef struct hci1394_comp_ixl_vars_s { 147*7c478bd9Sstevel@tonic-gate /* COMMON RECV/XMIT COMPILE VALUES */ 148*7c478bd9Sstevel@tonic-gate hci1394_state_t *soft_statep; /* driver state */ 149*7c478bd9Sstevel@tonic-gate hci1394_iso_ctxt_t *ctxtp; /* current context */ 150*7c478bd9Sstevel@tonic-gate hci1394_xfer_ctl_t *xcs_firstp; /* 1st alloc xfer_ctl_t struc */ 151*7c478bd9Sstevel@tonic-gate hci1394_xfer_ctl_t *xcs_currentp; /* last alloc xfer_ctl_t struc */ 152*7c478bd9Sstevel@tonic-gate 153*7c478bd9Sstevel@tonic-gate hci1394_idma_desc_mem_t *dma_firstp; /* 1st alloc descriptor mem */ 154*7c478bd9Sstevel@tonic-gate hci1394_idma_desc_mem_t *dma_currentp; /* cur dma descriptor mem */ 155*7c478bd9Sstevel@tonic-gate 156*7c478bd9Sstevel@tonic-gate int dma_bld_error; /* compilation error code */ 157*7c478bd9Sstevel@tonic-gate uint_t ixl_io_mode; /* I/O mode: 0=recv,1=xmit */ 158*7c478bd9Sstevel@tonic-gate 159*7c478bd9Sstevel@tonic-gate ixl1394_command_t *ixl_cur_cmdp; /* processing current ixl cmd */ 160*7c478bd9Sstevel@tonic-gate ixl1394_command_t *ixl_cur_xfer_stp; /* currently buildng xfer cmd */ 161*7c478bd9Sstevel@tonic-gate ixl1394_command_t *ixl_cur_labelp; /* set if xfer inited by labl */ 162*7c478bd9Sstevel@tonic-gate 163*7c478bd9Sstevel@tonic-gate uint16_t ixl_xfer_st_cnt; /* # of xfer start ixl cmds built */ 164*7c478bd9Sstevel@tonic-gate 165*7c478bd9Sstevel@tonic-gate uint_t xfer_state; /* none, pkt, buf, skip, hdronly */ 166*7c478bd9Sstevel@tonic-gate uint_t xfer_hci_flush; /* updateable - xfer, jump, set */ 167*7c478bd9Sstevel@tonic-gate 168*7c478bd9Sstevel@tonic-gate uint32_t xfer_pktlen; 169*7c478bd9Sstevel@tonic-gate uint32_t xfer_bufp[HCI1394_DESC_MAX_Z]; 170*7c478bd9Sstevel@tonic-gate uint16_t xfer_bufcnt; 171*7c478bd9Sstevel@tonic-gate uint16_t xfer_size[HCI1394_DESC_MAX_Z]; 172*7c478bd9Sstevel@tonic-gate 173*7c478bd9Sstevel@tonic-gate uint16_t descriptors; 174*7c478bd9Sstevel@tonic-gate uint16_t reserved; 175*7c478bd9Sstevel@tonic-gate hci1394_desc_t descriptor_block[HCI1394_DESC_MAX_Z]; 176*7c478bd9Sstevel@tonic-gate 177*7c478bd9Sstevel@tonic-gate /* START RECV ONLY SECTION */ 178*7c478bd9Sstevel@tonic-gate uint16_t ixl_setsyncwait_cnt; 179*7c478bd9Sstevel@tonic-gate /* END RECV ONLY SECTION */ 180*7c478bd9Sstevel@tonic-gate 181*7c478bd9Sstevel@tonic-gate /* START XMIT ONLY SECTION */ 182*7c478bd9Sstevel@tonic-gate ixl1394_set_tagsync_t *ixl_settagsync_cmdp; 183*7c478bd9Sstevel@tonic-gate ixl1394_set_skipmode_t *ixl_setskipmode_cmdp; 184*7c478bd9Sstevel@tonic-gate 185*7c478bd9Sstevel@tonic-gate uint16_t default_tag; 186*7c478bd9Sstevel@tonic-gate uint16_t default_sync; 187*7c478bd9Sstevel@tonic-gate uint16_t default_skipmode; /* next, self, stop, jump */ 188*7c478bd9Sstevel@tonic-gate uint16_t skipmode; /* next, self, stop, jump */ 189*7c478bd9Sstevel@tonic-gate ixl1394_command_t *default_skiplabelp; 190*7c478bd9Sstevel@tonic-gate ixl1394_command_t *default_skipxferp; 191*7c478bd9Sstevel@tonic-gate ixl1394_command_t *skiplabelp; 192*7c478bd9Sstevel@tonic-gate ixl1394_command_t *skipxferp; 193*7c478bd9Sstevel@tonic-gate 194*7c478bd9Sstevel@tonic-gate uint32_t xmit_pkthdr1; 195*7c478bd9Sstevel@tonic-gate uint32_t xmit_pkthdr2; 196*7c478bd9Sstevel@tonic-gate uint32_t storevalue_bufp; 197*7c478bd9Sstevel@tonic-gate uint32_t storevalue_data; 198*7c478bd9Sstevel@tonic-gate /* END XMIT ONLY SECTION */ 199*7c478bd9Sstevel@tonic-gate } hci1394_comp_ixl_vars_t; 200*7c478bd9Sstevel@tonic-gate 201*7c478bd9Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("Single thread modifies", hci1394_comp_ixl_vars_s)) 202*7c478bd9Sstevel@tonic-gate 203*7c478bd9Sstevel@tonic-gate /* 204*7c478bd9Sstevel@tonic-gate * hci1394_comp_ixl_vars.xfer_hci_flush - xfer descriptor block build hci 205*7c478bd9Sstevel@tonic-gate * flush evaluation flags 206*7c478bd9Sstevel@tonic-gate */ 207*7c478bd9Sstevel@tonic-gate #define UPDATEABLE_XFER 0x01 /* current xfer command is updateable */ 208*7c478bd9Sstevel@tonic-gate #define UPDATEABLE_JUMP 0x02 /* cur xfer is finalized by updateable jump */ 209*7c478bd9Sstevel@tonic-gate #define UPDATEABLE_SET 0x04 /* current xfer has associated updateable set */ 210*7c478bd9Sstevel@tonic-gate #define INITIATING_LBL 0x08 /* current xfer is initiated by a label cmd */ 211*7c478bd9Sstevel@tonic-gate 212*7c478bd9Sstevel@tonic-gate /* hci1394_comp_ixl_vars.xfer_state - xfer descriptr block build state values */ 213*7c478bd9Sstevel@tonic-gate #define XFER_NONE 0 /* build inactive */ 214*7c478bd9Sstevel@tonic-gate #define XFER_PKT 1 /* building xfer packet descriptor block */ 215*7c478bd9Sstevel@tonic-gate #define XFER_BUF 2 /* building xfer buffer descriptor blocks */ 216*7c478bd9Sstevel@tonic-gate #define XMIT_NOPKT 3 /* building skip cycle xmit descriptor block */ 217*7c478bd9Sstevel@tonic-gate #define XMIT_HDRONLY 4 /* building header only xmit descriptor block */ 218*7c478bd9Sstevel@tonic-gate 219*7c478bd9Sstevel@tonic-gate /* 220*7c478bd9Sstevel@tonic-gate * IXL Dynamic Update temporary working variables. 221*7c478bd9Sstevel@tonic-gate * (used when assessing feasibility of an update based on where the hardware 222*7c478bd9Sstevel@tonic-gate * is, and for performing the actual update.) 223*7c478bd9Sstevel@tonic-gate */ 224*7c478bd9Sstevel@tonic-gate #define IXL_MAX_LOCN 4 /* extent of location array */ 225*7c478bd9Sstevel@tonic-gate 226*7c478bd9Sstevel@tonic-gate typedef struct hci1394_upd_locn_info { 227*7c478bd9Sstevel@tonic-gate ixl1394_command_t *ixlp; 228*7c478bd9Sstevel@tonic-gate uint_t ixldepth; 229*7c478bd9Sstevel@tonic-gate } hci1394_upd_locn_info_t; 230*7c478bd9Sstevel@tonic-gate 231*7c478bd9Sstevel@tonic-gate typedef struct hci1394_ixl_update_vars { 232*7c478bd9Sstevel@tonic-gate 233*7c478bd9Sstevel@tonic-gate hci1394_state_t *soft_statep; /* driver state struct */ 234*7c478bd9Sstevel@tonic-gate hci1394_iso_ctxt_t *ctxtp; /* current iso context */ 235*7c478bd9Sstevel@tonic-gate ixl1394_command_t *ixlnewp; /* ixl cmd containing new values */ 236*7c478bd9Sstevel@tonic-gate ixl1394_command_t *ixloldp; /* cmd to be updated with new vals */ 237*7c478bd9Sstevel@tonic-gate 238*7c478bd9Sstevel@tonic-gate ixl1394_command_t *ixlxferp; /* xfer cmd which is real targ of upd */ 239*7c478bd9Sstevel@tonic-gate ixl1394_command_t *skipxferp; /* xfer cmd if mode is skip to label */ 240*7c478bd9Sstevel@tonic-gate 241*7c478bd9Sstevel@tonic-gate /* currently exec xfer and MAX_LOCN-1 xfers following */ 242*7c478bd9Sstevel@tonic-gate hci1394_upd_locn_info_t locn_info[IXL_MAX_LOCN]; 243*7c478bd9Sstevel@tonic-gate 244*7c478bd9Sstevel@tonic-gate uint_t ixldepth; /* xferp depth at which to start upd */ 245*7c478bd9Sstevel@tonic-gate uint_t skipmode; /* set skip mode mode value */ 246*7c478bd9Sstevel@tonic-gate uint_t pkthdr1; /* new pkt header 1 if tag or sync update */ 247*7c478bd9Sstevel@tonic-gate uint_t pkthdr2; /* new pkt hdr 2 if send xfer size change */ 248*7c478bd9Sstevel@tonic-gate uint32_t skipaddr; /* bound skip destaddr (0=not skip to labl) */ 249*7c478bd9Sstevel@tonic-gate uint32_t jumpaddr; /* bound jump destaddr if jump update (w/Z) */ 250*7c478bd9Sstevel@tonic-gate uint32_t bufaddr; /* new buf addr if xfer buffr addr change */ 251*7c478bd9Sstevel@tonic-gate uint32_t bufsize; /* new buf size if xfer buffr size change */ 252*7c478bd9Sstevel@tonic-gate uint32_t hcihdr; /* new hci descriptor hdr field (cmd,int,cnt) */ 253*7c478bd9Sstevel@tonic-gate uint32_t hcistatus; /* new hci descrptr stat field (rescount) */ 254*7c478bd9Sstevel@tonic-gate int32_t hci_offset; /* offset from xfer_ctl dma_descp to */ 255*7c478bd9Sstevel@tonic-gate /* hci changing */ 256*7c478bd9Sstevel@tonic-gate int hdr_offset; /* offset from xfer_ctl dma_descp to */ 257*7c478bd9Sstevel@tonic-gate /* pkthdrs hci */ 258*7c478bd9Sstevel@tonic-gate int upd_status; /* update completion return status value */ 259*7c478bd9Sstevel@tonic-gate 260*7c478bd9Sstevel@tonic-gate uint_t risklevel; /* caller risk override spec (unimplemented) */ 261*7c478bd9Sstevel@tonic-gate uint16_t ixl_opcode; /* ixl update command code */ 262*7c478bd9Sstevel@tonic-gate uint16_t ixlcount; /* ixlxferp # of dma cmds to update */ 263*7c478bd9Sstevel@tonic-gate } hci1394_ixl_update_vars_t; 264*7c478bd9Sstevel@tonic-gate 265*7c478bd9Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("Single thread modifies", hci1394_ixl_update_vars)) 266*7c478bd9Sstevel@tonic-gate 267*7c478bd9Sstevel@tonic-gate int hci1394_compile_ixl(hci1394_state_t *soft_statep, hci1394_iso_ctxt_t *ctxtp, 268*7c478bd9Sstevel@tonic-gate ixl1394_command_t *ixlp, int *resultp); 269*7c478bd9Sstevel@tonic-gate int hci1394_ixl_update(hci1394_state_t *soft_statep, hci1394_iso_ctxt_t *ctxtp, 270*7c478bd9Sstevel@tonic-gate ixl1394_command_t *ixlnewp, ixl1394_command_t *ixloldp, uint_t riskoverride, 271*7c478bd9Sstevel@tonic-gate int *resultp); 272*7c478bd9Sstevel@tonic-gate void hci1394_ixl_interrupt(hci1394_state_t *soft_statep, 273*7c478bd9Sstevel@tonic-gate hci1394_iso_ctxt_t *ctxtp, boolean_t in_stop); 274*7c478bd9Sstevel@tonic-gate int hci1394_ixl_dma_sync(hci1394_state_t *soft_statep, 275*7c478bd9Sstevel@tonic-gate hci1394_iso_ctxt_t *ctxtp); 276*7c478bd9Sstevel@tonic-gate int hci1394_ixl_set_start(hci1394_iso_ctxt_t *ctxtp, ixl1394_command_t *ixlstp); 277*7c478bd9Sstevel@tonic-gate void hci1394_ixl_reset_status(hci1394_iso_ctxt_t *ctxtp); 278*7c478bd9Sstevel@tonic-gate int hci1394_ixl_check_status(hci1394_xfer_ctl_dma_t *dma, uint16_t ixlopcode, 279*7c478bd9Sstevel@tonic-gate uint16_t *timestamp, boolean_t do_status_reset); 280*7c478bd9Sstevel@tonic-gate int hci1394_ixl_find_next_exec_xfer(ixl1394_command_t *ixl_start, 281*7c478bd9Sstevel@tonic-gate uint_t *callback_cnt, ixl1394_command_t **next_exec_ixlpp); 282*7c478bd9Sstevel@tonic-gate void hci1394_ixl_cleanup(hci1394_state_t *soft_statep, 283*7c478bd9Sstevel@tonic-gate hci1394_iso_ctxt_t *ctxtp); 284*7c478bd9Sstevel@tonic-gate 285*7c478bd9Sstevel@tonic-gate #ifdef __cplusplus 286*7c478bd9Sstevel@tonic-gate } 287*7c478bd9Sstevel@tonic-gate #endif 288*7c478bd9Sstevel@tonic-gate 289*7c478bd9Sstevel@tonic-gate #endif /* _SYS_1394_ADAPTERS_HCI1394_IXL_H */ 290