1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright (c) 1995-2001 by Sun Microsystems, Inc. 24 * All rights reserved. 25 */ 26 27 #ifndef _CIS_HANDLERS_H 28 #define _CIS_HANDLERS_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 /* 35 * This is the CIS tuple handler header file. 36 * 37 * Each tuple that we recognize and are prepared to handle is assigned a 38 * cistpl_callout_t structure. This lets us specify a handler for 39 * this tuple, as well as flags that describe this tuple and which 40 * are used by the CIS interpreter and tuple parser. 41 */ 42 typedef struct cistpl_callout_t { 43 cisdata_t type; /* type of tuple */ 44 cisdata_t subtype; /* only used for CISTPL_FUNCE */ 45 uint32_t flags; /* misc flags */ 46 uint32_t (*handler)(); /* tuple handler */ 47 char *text; /* name of tuple */ 48 } cistpl_callout_t; 49 50 /* 51 * Flags that are used by a tuple handler to specify what action it 52 * should perform. 53 */ 54 #define HANDTPL_NOERROR 0x000000000 /* no error */ 55 #define HANDTPL_SET_FLAGS 0x000000001 /* set tuple flags */ 56 #define HANDTPL_COPY_DONE 0x000000002 /* tuple data copy is done */ 57 #define HANDTPL_PARSE_LTUPLE 0x000000004 /* parse tuple, return opt data */ 58 #define HANDTPL_RETURN_NAME 0x000000008 /* return tuple name string */ 59 60 /* 61 * This flag is returned by tuple handlers if they encounter an error. It 62 * is returned by cis_list_lcreate if any of the tuple handlers have 63 * return an error while processing the CIS. 64 * 65 * Note that the following bit is reserved: 66 * #define BAD_CIS_ADDR 0x080000000 67 * It appears in cis.h and is used to indicate that cis_list_create 68 * tried to read past the end of the mapped in CIS space. 69 */ 70 #define HANDTPL_ERROR 0x001000000 /* handler returned an error */ 71 72 /* 73 * General-use constants and macros that aren't specific to a tuple. 74 */ 75 #define CISTPL_EXT_BIT 0x080 /* additional extension bytes follow */ 76 77 /* 78 * Constants, macros and structures used by cistpl_devspeed and 79 * cis_convert_devspeed functions. 80 */ 81 #define CISTPL_DEVSPEED_TABLE 0x000000001 /* use the device speed table */ 82 #define CISTPL_DEVSPEED_EXT 0x000000002 /* use the extended speed table */ 83 #define CISTPL_DEVSPEED_MAX_TBL 8 /* max devspeed table entries */ 84 #define CISTPL_DEVSPEED_MAX_EXP 8 /* max exponent entries */ 85 #define CISTPL_DEVSPEED_MAX_MAN 16 /* max mantissa entries */ 86 #define CISTPL_DEVSPEED_TBL(t) cistpl_devspeed_struct.table[(t) & \ 87 (CISTPL_DEVSPEED_MAX_TBL - 1)] 88 #define CISTPL_DEVSPEED_MAN(m) cistpl_devspeed_struct.mantissa[(m) & \ 89 (CISTPL_DEVSPEED_MAX_MAN - 1)] 90 #define CISTPL_DEVSPEED_EXP(e) cistpl_devspeed_struct.exponent[(e) & \ 91 (CISTPL_DEVSPEED_MAX_EXP - 1)] 92 typedef struct cistpl_devspeed_struct_t { 93 uint32_t *table; 94 uint32_t *tenfac; 95 uint32_t *mantissa; 96 uint32_t *exponent; 97 } cistpl_devspeed_struct_t; 98 99 /* 100 * Constants, flags and structure typedefs that are used by specific tuples. 101 * 102 * CISTPL_DEVICE, CISTPL_DEVICE_A, CISTPL_DEVICE_OC and CISTPL_DEVICE_OA 103 */ 104 #define CISTPL_DEVICE_DTYPE_NULL 0x00 /* a NULL device (hole) */ 105 #define CISTPL_DEVICE_DTYPE_ROM 0x01 /* device is of type ROM */ 106 #define CISTPL_DEVICE_DTYPE_OTPROM 0x02 /* device is of type OTPROM */ 107 #define CISTPL_DEVICE_DTYPE_EPROM 0x03 /* device is of type EPROM */ 108 #define CISTPL_DEVICE_DTYPE_EEPROM 0x04 /* device is of type EEPROM */ 109 #define CISTPL_DEVICE_DTYPE_FLASH 0x05 /* device is of type FLASH */ 110 #define CISTPL_DEVICE_DTYPE_SRAM 0x06 /* device is of type SRAM */ 111 #define CISTPL_DEVICE_DTYPE_DRAM 0x07 /* device is of type DRAM */ 112 #define CISTPL_DEVICE_DTYPE_RSVD_8 0x08 /* reserved */ 113 #define CISTPL_DEVICE_DTYPE_RSVD_9 0x09 /* reserved */ 114 #define CISTPL_DEVICE_DTYPE_RSVD_a 0x0a /* reserved */ 115 #define CISTPL_DEVICE_DTYPE_RSVD_b 0x0b /* reserved */ 116 #define CISTPL_DEVICE_DTYPE_RSVD_c 0x0c /* reserved */ 117 #define CISTPL_DEVICE_DTYPE_FUNCSPEC 0x0d /* device is of type FUNCSPEC */ 118 #define CISTPL_DEVICE_DTYPE_EXTEND 0x0e /* device is of type extended */ 119 #define CISTPL_DEVICE_DTYPE_RSVD_f 0x0f /* reserved */ 120 121 /* 122 * Flags for cistpl_device_node_t->flags member for CISTPL_DEVICE 123 * and CISTPL_DEVICE_A tuples 124 */ 125 #define CISTPL_DEVICE_WPS 0x00000001 /* WPS bit is set */ 126 /* 127 * Flags and values for cistpl_device_node_t->flags member for 128 * CISTPL_DEVICE_OC and CISTPL_DEVICE_OA tuples 129 */ 130 #define CISTPL_DEVICE_OC_MWAIT 0x00010000 /* use MWAIT */ 131 #define CISTPL_DEVICE_OC_Vcc_MASK 0x00060000 /* mask for Vcc value */ 132 #define CISTPL_DEVICE_OC_Vcc5 0x00000000 /* 5.0 volt operation */ 133 #define CISTPL_DEVICE_OC_Vcc33 0x00020000 /* 3.3 volt operation */ 134 #define CISTPL_DEVICE_OC_VccXX 0x00040000 /* X.X volt operation */ 135 #define CISTPL_DEVICE_OC_VccYY 0x00060000 /* Y.Y volt operation */ 136 /* 137 * CISTPL_DEVICE_MAX_DEVICES defines the maximum number of devices that 138 * we can parse in a CISTPL_DEVICE{...} tuple 139 */ 140 #define CISTPL_DEVICE_MAX_DEVICES 10 141 142 /* 143 * CISTPL_DEVICE_SPEED_SIZE_IGNORE if the device speed is set to this, then 144 * ignore the speed and size values 145 */ 146 #define CISTPL_DEVICE_SPEED_SIZE_IGNORE 0x0ff /* ignore size and speed info */ 147 148 typedef struct cistpl_device_node_t { 149 uint32_t flags; /* flags specific to this device */ 150 uint32_t speed; /* device speed in device speed code format */ 151 uint32_t nS_speed; /* device speed in nS */ 152 uint32_t type; /* device type */ 153 uint32_t size; /* device size */ 154 uint32_t size_in_bytes; /* device size in bytes */ 155 } cistpl_device_node_t; 156 157 typedef struct cistpl_device_t { 158 uint32_t num_devices; /* number of devices found */ 159 cistpl_device_node_t devnode[CISTPL_DEVICE_MAX_DEVICES]; 160 } cistpl_device_t; 161 162 /* 163 * CISTPL_CONFIG 164 */ 165 #define MAKE_CONFIG_REG_ADDR(base, reg) (base + (reg * 2)) 166 #define CISTPL_CONFIG_MAX_CONFIG_REGS 128 /* max num config regs */ 167 typedef struct cistpl_config_t { 168 uint32_t present; /* register present flags */ 169 uint32_t nr; /* number of config registers found */ 170 uint32_t hr; /* highest config register index found */ 171 uint32_t regs[CISTPL_CONFIG_MAX_CONFIG_REGS]; /* reg offsets */ 172 uint32_t base; /* base offset of config registers */ 173 uint32_t last; /* last config index */ 174 } cistpl_config_t; 175 176 /* 177 * CISTPL_VERS_1 178 */ 179 #define CISTPL_VERS_1_MAX_PROD_STRINGS 4 /* max number product strings */ 180 typedef struct cistpl_vers_1_t { 181 uint32_t major; /* major version number */ 182 uint32_t minor; /* minor version number */ 183 uint32_t ns; /* number of information strings */ 184 /* pointers to product information strings */ 185 char pi[CISTPL_VERS_1_MAX_PROD_STRINGS][CIS_MAX_TUPLE_DATA_LEN]; 186 } cistpl_vers_1_t; 187 188 /* 189 * CISTPL_VERS_2 190 */ 191 typedef struct cistpl_vers_2_t { 192 uint32_t vers; /* version number */ 193 uint32_t comply; /* level of compliance */ 194 uint32_t dindex; /* byte address of first data byte in card */ 195 uint32_t reserved; /* two reserved bytes */ 196 uint32_t vspec8; /* vendor specific (byte 8) */ 197 uint32_t vspec9; /* vendor specific (byte 9) */ 198 uint32_t nhdr; /* number of copies of CIS present on device */ 199 char oem[CIS_MAX_TUPLE_DATA_LEN]; /* Vendor of software that */ 200 /* formatted card */ 201 char info[CIS_MAX_TUPLE_DATA_LEN]; /* Informational message */ 202 /* about card */ 203 } cistpl_vers_2_t; 204 205 /* 206 * CISTPL_JEDEC_A and CISTPL_JEDEC_C 207 */ 208 #define CISTPL_JEDEC_MAX_IDENTIFIERS 4 209 typedef struct jedec_ident_t { 210 uint32_t id; /* manufacturer id */ 211 uint32_t info; /* manufacturer specific info */ 212 } jedec_ident_t; 213 214 typedef struct cistpl_jedec_t { 215 uint32_t nid; /* # of JEDEC identifiers present */ 216 jedec_ident_t jid[CISTPL_JEDEC_MAX_IDENTIFIERS]; 217 } cistpl_jedec_t; 218 219 /* 220 * CISTPL_FORMAT and CISTPL_FORMAT_A 221 * 222 * These tuples describe the data recording format for a region. 223 */ 224 typedef struct cistpl_format_t { 225 uint32_t type; /* format type code */ 226 uint32_t edc_length; /* error detection code length */ 227 uint32_t edc_type; /* error detection code type */ 228 uint32_t offset; /* offset of first byte of data in this part */ 229 uint32_t nbytes; /* number of bytes of data in this partition */ 230 union { 231 struct disk { 232 uint32_t bksize; /* block size */ 233 uint32_t nblocks; /* nblocks data for disk-like device */ 234 uint32_t edcloc; /* location of error detection code */ 235 } disk; 236 struct mem { 237 uint32_t flags; /* various flags */ 238 uint32_t reserved; /* reserved byte */ 239 caddr_t address; /* physical addr for mem-like device */ 240 uint32_t edcloc; /* location of error detection code */ 241 } mem; 242 } dev; 243 } cistpl_format_t; 244 245 /* 246 * device format types 247 */ 248 #define TPLFMTTYPE_DISK 0x00 /* disk-like format */ 249 #define TPLFMTTYPE_MEM 0x01 /* memory-like format */ 250 #define TPLFMTTYPE_VS 0x80 /* vendor specific format */ 251 252 /* 253 * error detection code types 254 */ 255 #define TPLFMTEDC_NONE 0x00 /* no error detection code */ 256 #define TPLFMTEDC_CKSUM 0x01 /* arithmetic checksum is used */ 257 #define TPLFMTEDC_CRC 0x02 /* 16-bit CRC */ 258 #define TPLFMTEDC_PCC 0x03 /* whole-partition arithmetic checksum */ 259 #define TPLFMTEDC_VS 0x80 /* vendor specific error checking */ 260 261 #define EDC_LENGTH_MASK 0x07 262 #define EDC_TYPE_MASK 0x0f 263 #define EDC_TYPE_SHIFT 3 264 265 /* 266 * flags for memory-like devices 267 */ 268 #define TPLFMTFLAGS_ADDR 0x01 /* address is valid */ 269 #define TPLFMTFLAGS_AUTO 0x02 /* automatically map memory region */ 270 271 /* 272 * CISTPL_GEOMETRY 273 */ 274 typedef struct cistpl_geometry_t { 275 uint32_t spt; 276 uint32_t tpc; 277 uint32_t ncyl; 278 } cistpl_geometry_t; 279 280 /* 281 * CISTPL_BYTEORDER 282 */ 283 typedef struct cistpl_byteorder_t { 284 uint32_t order; /* byte order code */ 285 uint32_t map; /* byte mapping code */ 286 } cistpl_byteorder_t; 287 288 /* 289 * byte order and mapping codes 290 */ 291 #define TPLBYTEORD_LOW 0x00 /* specifies little endian order */ 292 #define TPLBYTEORD_HIGH 0x01 /* specifies big endian order */ 293 #define TPLBYTEORD_VS 0x80 /* vendor specific order 0x80-0xFF */ 294 295 #define TPLBYTEMAP_LOW 0x00 /* byte zero is least significant byte */ 296 #define TPLBYTEMAP_HIGH 0x01 /* byte zero is most significant byte */ 297 #define TPLBYTEMAP_VS 0x80 /* vendor specific mapping */ 298 299 /* 300 * CISTPL_DATE 301 */ 302 typedef struct cistpl_date_t { 303 uint32_t time; 304 uint32_t day; 305 } cistpl_date_t; 306 307 /* 308 * CISTPL_BATTERY 309 */ 310 typedef struct cistpl_battery_t { 311 uint32_t rday; /* replacement date */ 312 uint32_t xday; /* expiration date */ 313 } cistpl_battery_t; 314 315 /* 316 * CISTPL_ORG 317 */ 318 typedef struct cistpl_org_t { 319 uint32_t type; /* data organization code */ 320 char desc[CIS_MAX_TUPLE_DATA_LEN]; /* text description of */ 321 /* this organization */ 322 } cistpl_org_t; 323 324 /* 325 * CISTPL_MANFID 326 */ 327 typedef struct cistpl_manfid_t { 328 uint32_t manf; /* PCMCIA PC Card manufacturer code */ 329 uint32_t card; /* manufacturer information */ 330 } cistpl_manfid_t; 331 332 /* 333 * CISTPL_FUNCID 334 */ 335 typedef struct cistpl_funcid_t { 336 uint32_t function; /* PC Card function code */ 337 uint32_t sysinit; /* system initialization mask */ 338 } cistpl_funcid_t; 339 340 /* 341 * Function types for CISTPL_FUNCID; note that the TPLFUNC_UNKNOWN is 342 * not defined by the PCMCIA standard. 343 * 344 * Definitions for cistpl_funcid_t->function 345 */ 346 #define TPLFUNC_MULTI 0x000 /* vendor-specific multifunction card */ 347 #define TPLFUNC_MEMORY 0x001 /* memory card */ 348 #define TPLFUNC_SERIAL 0x002 /* serial I/O port */ 349 #define TPLFUNC_PARALLEL 0x003 /* parallel printer port */ 350 #define TPLFUNC_FIXED 0x004 /* fixed disk, silicon or removeable */ 351 #define TPLFUNC_VIDEO 0x005 /* video interface */ 352 #define TPLFUNC_LAN 0x006 /* Local Area Network adapter */ 353 #define TPLFUNC_AIMS 0x007 /* Auto Incrementing Mass Storage */ 354 #define TPLFUNC_SCSI 0x008 /* SCSI bridge */ 355 #define TPLFUNC_SECURITY 0x009 /* Security Cards */ 356 #define TPLFUNC_VENDOR_SPECIFIC 0x0fe /* Vendor Specific */ 357 #define TPLFUNC_UNKNOWN 0x0ff /* unknown function(s) */ 358 /* 359 * Definitions for cistpl_funcid_t->sysinit 360 */ 361 #define TPLINIT_POST 0x01 /* POST should attempt configure */ 362 #define TPLINIT_ROM 0x02 /* map ROM during sys init */ 363 364 /* 365 * CISTPL_FUNCE 366 */ 367 typedef struct cistpl_funce_t { 368 uint32_t function; /* type of extended data */ 369 uint32_t subfunction; 370 union { 371 struct serial { 372 uint32_t ua; /* UART in use */ 373 uint32_t uc; /* UART capabilities */ 374 } serial; 375 struct modem { 376 uint32_t fc; /* supported flow control methods */ 377 uint32_t cb; /* size of DCE command buffer */ 378 uint32_t eb; /* size of DCE to DCE buffer */ 379 uint32_t tb; /* size of DTE to DCE buffer */ 380 } modem; 381 struct data_modem { 382 uint32_t ud; /* highest data rate */ 383 uint32_t ms; /* modulation standards */ 384 /* err correct proto and non-CCITT modulation */ 385 uint32_t em; 386 uint32_t dc; /* data compression protocols */ 387 uint32_t cm; /* command protocols */ 388 uint32_t ex; /* escape mechanisms */ 389 uint32_t dy; /* standardized data encryption */ 390 uint32_t ef; /* misc. end user features */ 391 uint32_t ncd; /* number of country codes */ 392 uchar_t cd[16]; /* CCITT country code */ 393 } data_modem; 394 struct fax { 395 uint32_t uf; /* highest data rate in DTE/UART */ 396 uint32_t fm; /* CCITT modulation standards */ 397 uint32_t fy; /* standardized data encryption */ 398 uint32_t fs; /* feature selection */ 399 uint32_t ncf; /* number of country codes */ 400 uchar_t cf[16]; /* CCITT country codes */ 401 } fax; 402 struct voice { 403 uint32_t uv; /* highest data rate */ 404 uint32_t nsr; 405 uint32_t sr[16]; /* voice sampling rates (*100) */ 406 uint32_t nss; 407 uint32_t ss[16]; /* voice sample sizes (*10) */ 408 uint32_t nsc; 409 uint32_t sc[16]; /* voice compression methods */ 410 } voice; 411 struct lan { 412 uint32_t tech; /* network technology */ 413 uint32_t speed; /* media bit or baud rate */ 414 uint32_t media; /* network media supported */ 415 uint32_t con; /* open/closed connector standard */ 416 uint32_t id_sz; /* length of lan station id */ 417 uchar_t id[16]; /* station ID */ 418 } lan; 419 } data; 420 } cistpl_funce_t; 421 422 /* serial port subfunctions */ 423 #define TPLFE_SUB_SERIAL 0 /* serial port */ 424 #define TPLFE_SUB_MODEM_COMMON 1 /* common modem interface */ 425 #define TPLFE_SUB_MODEM_DATA 2 /* data modem services */ 426 #define TPLFE_SUB_MODEM_FAX 3 /* fax modem services */ 427 #define TPLFE_SUB_VOICE 4 /* voice services */ 428 /* modem subfunctions for description of capabilities */ 429 #define TPLFE_CAP_MODEM_DATA 5 /* data modem capabilities */ 430 #define TPLFE_CAP_MODEM_FAX 6 /* fax modem capabilities */ 431 #define TPLFE_CAP_MODEM_VOICE 7 /* voice modem capabilities */ 432 /* serial port subfunctions for description of capabilities */ 433 #define TPLFE_CAP_SERIAL_DATA 8 /* serial port capabilities - data modem */ 434 #define TPLFE_CAP_SERIAL_FAX 9 /* serial port capabilities - fax modem */ 435 #define TPLFE_CAP_SERIAL_VOICE 10 /* serial port capabilities - voice */ 436 437 /* serial port UART definitions */ 438 #define TPLFE_UA_8250 0 /* Intel 8250 */ 439 #define TPLFE_UA_16450 1 /* NS 16450 */ 440 #define TPLFE_UA_16550 2 /* NS 16550 */ 441 442 /* serial port capabilities definitions */ 443 #define TPLFE_UC_PARITY_SPACE 0x0001 /* space parity supported */ 444 #define TPLFE_UC_PARITY_MARK 0x0002 /* mark parity supported */ 445 #define TPLFE_UC_PARITY_ODD 0x0004 /* odd parity supported */ 446 #define TPLFE_UC_PARITY_EVEN 0x0008 /* even parity supported */ 447 #define TPLFE_UC_CS5 0x0100 /* 5 bit characters supported */ 448 #define TPLFE_UC_CS6 0x0200 /* 6 bit characters supported */ 449 #define TPLFE_UC_CS7 0x0400 /* 7 bit characters supported */ 450 #define TPLFE_UC_CS8 0x0800 /* 8 bit characters supported */ 451 #define TPLFE_UC_STOP_1 0x1000 /* 1 stop bit supported */ 452 #define TPLFE_UC_STOP_15 0x2000 /* 1.5 stop bits supported */ 453 #define TPLFE_UC_STOP_2 0x4000 /* 2 stop bits supported */ 454 455 /* modem flow control methods */ 456 #define TPLFE_FC_TX_XONOFF 0x01 /* transmit XON/XOFF */ 457 #define TPLFE_FC_RX_XONOFF 0x02 /* receiver XON/XOFF */ 458 #define TPLFE_FC_TX_HW 0x04 /* transmit hardware flow control (CTS) */ 459 #define TPLFE_FC_RX_HW 0x08 /* receiver hardware flow control (RTS) */ 460 #define TPLFE_FC_TRANS 0x10 /* tranparent flow control */ 461 462 /* modem modulation standards */ 463 #define TPLFE_MS_BELL103 0x0001 /* 300bps */ 464 #define TPLFE_MS_V21 0x0002 /* 300bps (V.21) */ 465 #define TPLFE_MS_V23 0x0004 /* 600/1200bps (V.23) */ 466 #define TPLFE_MS_V22AB 0x0008 /* 1200bps (V.22A V.22B) */ 467 #define TPLFE_MS_BELL212 0x0010 /* 2400bsp (US Bell 212) */ 468 #define TPLFE_MS_V22BIS 0x0020 /* 2400bps (V.22bis) */ 469 #define TPLFE_MS_V26 0x0040 /* 2400bps leased line (V.26) */ 470 #define TPLFE_MS_V26BIS 0x0080 /* 2400bps (V.26bis) */ 471 #define TPLFE_MS_V27BIS 0x0100 /* 4800/2400bps leased line (V.27bis) */ 472 #define TPLFE_MS_V29 0x0200 /* 9600/7200/4800 leased line (V.29) */ 473 #define TPLFE_MS_V32 0x0400 /* up to 9600bps (V.32) */ 474 #define TPLFE_MS_V32BIS 0x0800 /* up to 14400bps (V.32bis) */ 475 #define TPLFE_MS_VFAST 0x1000 /* up to 28800 V.FAST */ 476 477 /* modem error correction/detection protocols */ 478 #define TPLFE_EM_MNP 0x01 /* MNP levels 2-4 */ 479 #define TPLFE_EM_V42 0x02 /* CCITT LAPM (V.42) */ 480 481 /* modem data compression protocols */ 482 #define TPLFE_DC_V42BIS 0x01 /* CCITT compression V.42 */ 483 #define TPLFE_DC_MNP5 0x02 /* MNP compression (uses MNP 2, 3 or 4) */ 484 485 /* modem command protocols */ 486 #define TPLFE_CM_AT1 0x01 /* ANSI/EIA/TIA 602 "Action" commands */ 487 #define TPLFE_CM_AT2 0x02 /* ANSI/EIA/TIA 602 "ACE/DCE IF Params" */ 488 #define TPLFE_CM_AT3 0x04 /* ANSI/EIA/TIA 602 "Ace Parameters" */ 489 #define TPLFE_CM_MNP_AT 0x08 /* MNP specificat AT commands */ 490 #define TPLFE_CM_V25BIS 0x10 /* V.25bis calling commands */ 491 #define TPLFE_CM_V25A 0x20 /* V.25bis test procedures */ 492 #define TPLFE_CM_DMCL 0x40 /* DMCL command mode */ 493 494 /* modem escape mechanism */ 495 #define TPLFE_EX_BREAK 0x01 /* BREAK support standardized */ 496 #define TPLFE_EX_PLUS 0x02 /* +++ returns to command mode */ 497 #define TPLFE_EX_UD 0x04 /* user defined escape character */ 498 499 /* modem miscellaneous features */ 500 #define TPLFE_EF_CALLERID 0x01 /* Caller ID is supported */ 501 502 /* fax modulation standards */ 503 #define TPLFE_FM_V21C2 0x01 /* 300bps (V.21-C2) */ 504 #define TPLFE_FM_V27TER 0x02 /* 4800/2400bps (V.27ter) */ 505 #define TPLFE_FM_V29 0x04 /* 9600/7200/4800 leased line (V.29) */ 506 #define TPLFE_FM_V17 0x08 /* 14.4K/12K/9600/7200bps (V.17) */ 507 #define TPLFE_FM_V33 0x10 /* 14.4K/12K/9600/7200 lease line (V.33) */ 508 509 /* fax feature selection */ 510 #define TPLFE_FS_T3 0x01 /* Group 2 (T.3) service class */ 511 #define TPLFE_FS_T4 0x02 /* Group 3 (T.4) service class */ 512 #define TPLFE_FS_T6 0x04 /* Group 4 (T.6) service class */ 513 #define TPLFE_FS_ECM 0x08 /* Error Correction Modeer */ 514 #define TPLFE_FS_VOICEREQ 0x10 /* voice requests allowed */ 515 #define TPLFE_FS_POLLING 0x20 /* polling support */ 516 #define TPLFE_FS_FTP 0x40 /* file transfer support */ 517 #define TPLFE_FS_PASSWORD 0x80 /* password support */ 518 519 /* LAN tuple definitions */ 520 #define TPLFE_NETWORK_INFO 0x00 521 522 /* LAN technology types */ 523 #define TPLFE_LAN_TECH_ARCNET 1 524 #define TPLFE_LAN_TECH_ETHERNET 2 525 #define TPLFE_LAN_TECH_TOKENRING 3 526 #define TPLFE_LAN_TECH_LOCALTALK 4 527 #define TPLFE_LAN_TECH_FDDI 5 528 #define TPLFE_LAN_TECH_ATM 6 529 #define TPLFE_LAN_TECH_WIRELESS 7 530 531 /* LAN media types */ 532 #define TPLFE_LAN_MEDIA_INHERENT 0 533 #define TPLFE_LAN_MEDIA_UTP 1 534 #define TPLFE_LAN_MEDIA_STP 2 535 #define TPLFE_LAN_MEDIA_THIN_COAX 3 536 #define TPLFE_LAN_MEDIA_THICK_COAX 4 537 #define TPLFE_LAN_MEDIA_FIBER 5 538 #define TPLFE_LAN_MEDIA_SSR_902 6 539 #define TPLFE_LAN_MEDIA_SSR_2_4 7 540 #define TPLFE_LAN_MEDIA_SSR_5_4 8 541 #define TPLFE_LAN_MEDIA_DIFFUSE_IR 9 542 #define TPLFE_LAN_MEDIA_PTP_IR 10 543 544 /* 545 * CISTPL_CFTABLE_ENTRY 546 * 547 * These flags and macros are used internally to the handler. 548 */ 549 /* mask to get the config entry number from TPCE_INDX */ 550 #define CISTPL_CFTABLE_TPCE_CFGENTRYM 0x03f 551 /* default config bit in TPCE_INDX */ 552 #define CISTPL_CFTABLE_TPCE_DEFAULTM 0x040 553 /* interface config byte follows */ 554 #define CISTPL_CFTABLE_TPCE_IFM 0x080 555 556 /* power bit mask for tpce_fs */ 557 #define CISTPL_CFTABLE_TPCE_FS_PWRM 0x003 558 /* Vcc, Vpp1 and Vpp2 descriptions */ 559 #define CISTPL_CFTABLE_TPCE_FS_PWR_VPP2M 0x003 560 /* Vcc and Vpp1=Vpp2 descriptions */ 561 #define CISTPL_CFTABLE_TPCE_FS_PWR_VPP1M 0x002 562 /* Vcc description only */ 563 #define CISTPL_CFTABLE_TPCE_FS_PWR_VCCM 0x001 564 /* no connection on sleep/power down */ 565 #define CISTPL_CFTABLE_PD_NC_SLEEPM 0x07d 566 /* zero value required */ 567 #define CISTPL_CFTABLE_PD_ZEROM 0x07e 568 /* no connection ever */ 569 #define CISTPL_CFTABLE_PD_NCM 0x07f 570 571 /* timing data exists */ 572 #define CISTPL_CFTABLE_TPCE_FS_TDM 0x004 573 /* WAIT scale mask */ 574 #define CISTPL_CFTABLE_TPCE_FS_TD_WAITM 0x003 575 #define GET_TPCE_FS_TD_WAITS(sf) ((sf)& \ 576 CISTPL_CFTABLE_TPCE_FS_TD_WAITM) 577 /* RDY/BSY scale mask */ 578 #define CISTPL_CFTABLE_TPCE_FS_TD_RDYM 0x01c 579 #define GET_TPCE_FS_TD_RDYS(sf) (((sf)>>2)& \ 580 CISTPL_CFTABLE_TPCE_FS_TD_RDYM) 581 /* RSVD scale mask */ 582 #define CISTPL_CFTABLE_TPCE_FS_TD_RSVDM 0x0e0 583 #define GET_TPCE_FS_TD_RSVDS(sf) (((sf)>>5)& \ 584 CISTPL_CFTABLE_TPCE_FS_TD_RSVDM) 585 586 #define CISTPL_CFTABLE_TPCE_FS_IOM 0x008 /* I/O data exists */ 587 /* I/O addr lines mask */ 588 #define CISTPL_CFTABLE_TPCE_FS_IO_ALM 0x01f 589 /* RANGE bit in TPCE_IO */ 590 #define CISTPL_CFTABLE_TPCE_FS_IO_RANGEM 0x080 591 /* max of 16 I/O ranges */ 592 #define CISTPL_CFTABLE_ENTRY_MAX_IO_RANGES 16 593 594 #define CISTPL_CFTABLE_TPCE_FS_IRQM 0x010 /* IRQ data exists */ 595 /* extended IRQ mask exists */ 596 #define CISTPL_CFTABLE_TPCE_FS_IRQ_MASKM 0x010 597 598 #define CISTPL_CFTABLE_TPCE_FS_MEMM 0x060 /* mem space mask */ 599 /* space selection byte ... */ 600 #define CISTPL_CFTABLE_TPCE_FS_MEM3M 0x060 601 /* length (2 bytes) and card address (2 bytes) */ 602 #define CISTPL_CFTABLE_TPCE_FS_MEM2M 0x040 603 /* single 2-byte length */ 604 #define CISTPL_CFTABLE_TPCE_FS_MEM1M 0x020 605 /* max of 8 mem space descriptors */ 606 #define CISTPL_CFTABLE_ENTRY_MAX_MEM_WINDOWS 8 607 /* number of bytes/page description */ 608 #define CISTPL_CFTABLE_TPCE_FS_MEM_PGSIZE 256 609 /* host addr info present */ 610 #define CISTPL_CFTABLE_TPCE_FS_MEM_HOSTM 0x080 611 612 #define CISTPL_CFTABLE_TPCE_FS_MISCM 0x080 /* misc fields mask */ 613 614 /* 615 * Constants, macros, structures and flags used by cistpl_pd_parse() 616 * cistpl_expd_parse() and the CISTPL_CFTABLE_ENTRY tuple handler. 617 */ 618 #define CISTPL_PD_MAN(m) cistpl_pd_struct.mantissa[m&15] 619 #define CISTPL_PD_EXP(e) cistpl_pd_struct.exponent[e&7] 620 typedef struct cistpl_pd_struct_t { 621 uint32_t *mantissa; 622 uint32_t *exponent; 623 } cistpl_pd_struct_t; 624 625 /* 626 * These flags are passed to the caller in the cistpl_cftable_entry_t->flags 627 * field and indicate what interface information is available. The low 628 * order byte of this field is reserved and no flags should be defined 629 * to exist there. 630 */ 631 #define CISTPL_CFTABLE_TPCE_DEFAULT 0x000000100 /* this is a default conf */ 632 633 /* interface config description present flags */ 634 #define CISTPL_CFTABLE_TPCE_IF 0x000000200 /* if config byte exists */ 635 /* 636 * When the CISTPL_CFTABLE_TPCE_IF flag is set, the following flags 637 * are available in the ifc member of the cistpl_cftable_entry_t 638 * structure. 639 */ 640 #define CISTPL_CFTABLE_TPCE_IF_MEMORY 0x00 /* memory interface */ 641 #define CISTPL_CFTABLE_TPCE_IF_IO_MEM 0x01 /* IO and memory */ 642 #define CISTPL_CFTABLE_TPCE_IF_RSVD_2 0x02 /* reserved */ 643 #define CISTPL_CFTABLE_TPCE_IF_RSVD_3 0x03 /* reserved */ 644 #define CISTPL_CFTABLE_TPCE_IF_CUSTOM_0 0x04 /* custom interface 0 */ 645 #define CISTPL_CFTABLE_TPCE_IF_CUSTOM_1 0x05 /* custom interface 1 */ 646 #define CISTPL_CFTABLE_TPCE_IF_CUSTOM_2 0x06 /* custom interface 2 */ 647 #define CISTPL_CFTABLE_TPCE_IF_CUSTOM_3 0x07 /* custom interface 3 */ 648 #define CISTPL_CFTABLE_TPCE_IF_RSVD_8 0x08 /* reserved */ 649 #define CISTPL_CFTABLE_TPCE_IF_RSVD_9 0x09 /* reserved */ 650 #define CISTPL_CFTABLE_TPCE_IF_RSVD_a 0x0a /* reserved */ 651 #define CISTPL_CFTABLE_TPCE_IF_RSVD_b 0x0b /* reserved */ 652 #define CISTPL_CFTABLE_TPCE_IF_RSVD_c 0x0c /* reserved */ 653 #define CISTPL_CFTABLE_TPCE_IF_RSVD_d 0x0d /* reserved */ 654 #define CISTPL_CFTABLE_TPCE_IF_RSVD_e 0x0e /* reserved */ 655 #define CISTPL_CFTABLE_TPCE_IF_RSVD_f 0x0f /* reserved */ 656 #define CISTPL_CFTABLE_TPCE_IF_MASK 0x0f /* interface type mask */ 657 #define CISTPL_CFTABLE_TPCE_IF_BVD 0x10 /* BVD active in PRR */ 658 #define CISTPL_CFTABLE_TPCE_IF_WP 0x20 /* WP active in PRR */ 659 #define CISTPL_CFTABLE_TPCE_IF_RDY 0x40 /* RDY active in PRR */ 660 #define CISTPL_CFTABLE_TPCE_IF_MWAIT 0x80 /* WAIT - mem cycles */ 661 662 /* power description present flags */ 663 #define CISTPL_CFTABLE_TPCE_FS_PWR 0x000001000 /* power info exists */ 664 665 /* timing description present flags */ 666 #define CISTPL_CFTABLE_TPCE_FS_TD 0x000010000 /* timing info exists */ 667 668 /* I/O description present flags */ 669 #define CISTPL_CFTABLE_TPCE_FS_IO 0x000100000 /* I/O information exists */ 670 671 /* IRQ description present flags */ 672 #define CISTPL_CFTABLE_TPCE_FS_IRQ 0x000200000 /* IRQ information exists */ 673 674 /* memory space description present flags */ 675 #define CISTPL_CFTABLE_TPCE_FS_MEM 0x001000000 /* MEM space info exists */ 676 677 /* misc description present flags */ 678 #define CISTPL_CFTABLE_TPCE_FS_MISC 0x002000000 /* MISC info exists */ 679 680 /* additional information tuples present flags */ 681 #define CISTPL_CFTABLE_TPCE_FS_STCE_EV 0x004000000 /* STCE_EV exists */ 682 #define CISTPL_CFTABLE_TPCE_FS_STCE_PD 0x008000000 /* STCE_PD exists */ 683 684 /* 685 * Power description flags and structures. 686 * 687 * The following eight values represent what the power description structure 688 * parameter selection byte tells us is present. A copy of this byte 689 * is in the low order byte of each parameter's flag field. 690 */ 691 #define CISTPL_CFTABLE_PD_NOMV 0x001 /* nominal supply voltage */ 692 #define CISTPL_CFTABLE_PD_MINV 0x002 /* minimum supply voltage */ 693 #define CISTPL_CFTABLE_PD_MAXV 0x004 /* maximum supply voltage */ 694 #define CISTPL_CFTABLE_PD_STATICI 0x008 /* continuous supply current */ 695 /* max current required averaged over 1 second */ 696 #define CISTPL_CFTABLE_PD_AVGI 0x010 697 /* maximum current required averaged over 10mS */ 698 #define CISTPL_CFTABLE_PD_PEAKI 0x020 699 /* power down supply curent required */ 700 #define CISTPL_CFTABLE_PD_PDOWNI 0x040 701 /* power supply is about to blow up */ 702 #define CISTPL_CFTABLE_PD_RFU 0x080 703 704 /* 705 * For each voltage/current parameter, there is an associated flags field. 706 * The following flags are in this field. The low order byte of each 707 * of these flags fields also contains a copy of the power description 708 * structure parameter selection byte as read from the tuple, that's why 709 * we start the flag values at 0x0100 and go up from there. 710 */ 711 /* this parameter exists */ 712 #define CISTPL_CFTABLE_PD_EXISTS 0x000000100 713 /* multiply return value by 10 */ 714 #define CISTPL_CFTABLE_PD_MUL10 0x000000200 715 /* no connection on sleep/power down */ 716 #define CISTPL_CFTABLE_PD_NC_SLEEP 0x000001000 717 /* zero value required */ 718 #define CISTPL_CFTABLE_PD_ZERO 0x000002000 719 /* no connection ever */ 720 #define CISTPL_CFTABLE_PD_NC 0x000004000 721 722 typedef struct cistpl_cftable_entry_pwr_t { 723 uint32_t nomV; /* nominal supply voltage */ 724 uint32_t nomV_flags; 725 uint32_t minV; /* minimum supply voltage */ 726 uint32_t minV_flags; 727 uint32_t maxV; /* maximum supply voltage */ 728 uint32_t maxV_flags; 729 uint32_t staticI; /* continuous supply current */ 730 uint32_t staticI_flags; 731 uint32_t avgI; /* max current required */ 732 /* averaged over 1 sec. */ 733 uint32_t avgI_flags; 734 uint32_t peakI; /* max current required */ 735 /* averaged over 10mS */ 736 uint32_t peakI_flags; 737 uint32_t pdownI; /* power down supply curent required */ 738 uint32_t pdownI_flags; 739 } cistpl_cftable_entry_pwr_t; 740 741 /* 742 * Flags for the global power description structure. These show up in 743 * the flags field of the structure. 744 */ 745 #define CISTPL_CFTABLE_TPCE_FS_PWR_VCC 0x000000001 /* Vcc description valid */ 746 #define CISTPL_CFTABLE_TPCE_FS_PWR_VPP1 0x000000002 /* vpp1 description valid */ 747 #define CISTPL_CFTABLE_TPCE_FS_PWR_VPP2 0x000000004 /* Vpp2 description valid */ 748 749 typedef struct cistpl_cftable_entry_pd_t { 750 uint32_t flags; /* which descriptions are valid */ 751 struct cistpl_cftable_entry_pwr_t pd_vcc; /* VCC power description */ 752 struct cistpl_cftable_entry_pwr_t pd_vpp1; /* Vpp1 power description */ 753 struct cistpl_cftable_entry_pwr_t pd_vpp2; /* Vpp2 power description */ 754 } cistpl_cftable_entry_pd_t; 755 756 /* 757 * Device speed structure. Each field is only valid if the 758 * CISTPL_CFTABLE_TPCE_FS_TD flag is set. 759 * 760 * The following flags describe which timing information is available. 761 * They appear in the flags field of the device speed structure. 762 */ 763 /* WAIT timing exists */ 764 #define CISTPL_CFTABLE_TPCE_FS_TD_WAIT 0x000000001 765 /* RDY/BSY timing exists */ 766 #define CISTPL_CFTABLE_TPCE_FS_TD_RDY 0x000000002 767 /* RSVD timing exists */ 768 #define CISTPL_CFTABLE_TPCE_FS_TD_RSVD 0x000000004 769 770 typedef struct cistpl_cftable_entry_speed_t { 771 uint32_t flags; /* which timing information is present */ 772 uint32_t wait; /* max WAIT time in device speed format */ 773 uint32_t nS_wait; /* max WAIT time in nS */ 774 uint32_t rdybsy; /* max RDY/BSY time in device speed format */ 775 uint32_t nS_rdybsy; /* max RDY/BSY time in nS */ 776 uint32_t rsvd; /* max RSVD time in device speed format */ 777 uint32_t nS_rsvd; /* max RSVD time in nS */ 778 } cistpl_cftable_entry_speed_t; 779 780 /* 781 * Device I/O range description structures. Only valid if the 782 * CISTPL_CFTABLE_TPCE_FS_IO flag is set. 783 * 784 * The following flags describe the IO description information. They 785 * appear in the flags field of the IO space description structure. 786 */ 787 #define CISTPL_CFTABLE_TPCE_FS_IO_BUS 0x060 /* bus width mask */ 788 #define CISTPL_CFTABLE_TPCE_FS_IO_BUS8 0x020 /* 8-bit flag */ 789 #define CISTPL_CFTABLE_TPCE_FS_IO_BUS16 0x040 /* 16-bit flag */ 790 #define CISTPL_CFTABLE_TPCE_FS_IO_RANGE 0x080 /* IO address ranges exist */ 791 792 typedef struct cistpl_cftable_entry_io_range_t { 793 uint32_t addr; /* I/O start address */ 794 uint32_t length; /* I/O register length */ 795 } cistpl_cftable_entry_io_range_t; 796 typedef struct cistpl_cftable_entry_io_t { 797 uint32_t flags; /* direct copy of TPCE_IO byte in tuple */ 798 uint32_t addr_lines; /* number of decoded I/O address lines */ 799 uint32_t ranges; /* number of I/O ranges */ 800 struct cistpl_cftable_entry_io_range_t 801 range[CISTPL_CFTABLE_ENTRY_MAX_IO_RANGES]; 802 } cistpl_cftable_entry_io_t; 803 804 /* 805 * Device IRQ description structure. Only valid if the 806 * CISTPL_CFTABLE_TPCE_FS_IRQ flag is set. 807 */ 808 typedef struct cistpl_cftable_entry_irq_t { 809 uint32_t flags; /* direct copy of TPCE_IR byte in tuple */ 810 uint32_t irqs; /* bit mask for each allowed IRQ */ 811 } cistpl_cftable_entry_irq_t; 812 813 /* 814 * Device memory space description structure. Only valid if the 815 * CISTPL_CFTABLE_TPCE_FS_MEM flag is set. 816 * 817 * The following flags describe the memory description information. They 818 * appear in the flags field of the memory space description structure. 819 */ 820 /* space descriptors */ 821 #define CISTPL_CFTABLE_TPCE_FS_MEM3 0x000000001 822 /* host_addr=card_addr */ 823 #define CISTPL_CFTABLE_TPCE_FS_MEM2 0x000000002 824 /* card address=0, any host address */ 825 #define CISTPL_CFTABLE_TPCE_FS_MEM1 0x000000004 826 /* if host address is present in MEM3 */ 827 #define CISTPL_CFTABLE_TPCE_FS_MEM_HOST 0x000000008 828 829 typedef struct cistpl_cftable_entry_mem_window_t { 830 uint32_t length; /* length of this window */ 831 uint32_t card_addr; /* card address */ 832 uint32_t host_addr; /* host address */ 833 } cistpl_cftable_entry_mem_window_t; 834 typedef struct cistpl_cftable_entry_mem_t { 835 uint32_t flags; /* memory desc type and host addr info */ 836 uint32_t windows; /* number of memory space descriptors */ 837 cistpl_cftable_entry_mem_window_t 838 window[CISTPL_CFTABLE_ENTRY_MAX_MEM_WINDOWS]; 839 } cistpl_cftable_entry_mem_t; 840 841 /* 842 * Devices misc description structure. Only valid if the 843 * CISTPL_CFTABLE_TPCE_FS_MISC flag is set. 844 */ 845 #define CISTPL_CFTABLE_TPCE_FS_MISC_MAX 2 /* # bytes we understand */ 846 #define CISTPL_CFTABLE_TPCE_MI_MTC_MASK 0x00000007 /* max twin cards mask */ 847 #define CISTPL_CFTABLE_TPCE_MI_AUDIO 0x00000008 /* audio on BVD2 */ 848 #define CISTPL_CFTABLE_TPCE_MI_READONLY 0x00000010 /* R/O storage */ 849 #define CISTPL_CFTABLE_TPCE_MI_PWRDOWN 0x00000020 /* powerdown capable */ 850 #define CISTPL_CFTABLE_TPCE_MI_DRQ_MASK 0x00000c00 /* DMAREQ mask */ 851 #define CISTPL_CFTABLE_TPCE_MI_DRQ_SPK 0x00000400 /* DMAREQ on SPKR */ 852 #define CISTPL_CFTABLE_TPCE_MI_DRQ_IOIS 0x00000800 /* DMAREQ on IOIS16 */ 853 #define CISTPL_CFTABLE_TPCE_MI_DRQ_INP 0x00000c00 /* DMAREQ on INPACK */ 854 #define CISTPL_CFTABLE_TPCE_MI_DMA_8 0x00000000 /* DMA width 8 bits */ 855 #define CISTPL_CFTABLE_TPCE_MI_DMA_16 0x00001000 /* DMA width 16 bits */ 856 857 typedef struct cistpl_cftable_entry_misc_t { 858 uint32_t flags; /* misc features flags */ 859 } cistpl_cftable_entry_misc_t; 860 861 /* 862 * Additional information sub-tuples defines and structure 863 */ 864 #define STCE_EV 0x0c0 /* Environment Descriptor Subtuple */ 865 #define STCE_PD 0x0c1 /* Physical Device Name Subtuple */ 866 typedef struct cistpl_cftable_entry_stce_ev_t { 867 char stev_strs[CIS_MAX_TUPLE_DATA_LEN]; 868 } cistpl_cftable_entry_stce_ev_t; 869 870 typedef struct cistpl_cftable_entry_stce_pd_t { 871 char stpd_strs[CIS_MAX_TUPLE_DATA_LEN]; 872 } cistpl_cftable_entry_stce_pd_t; 873 874 /* 875 * cistpl_cftable_entry_t - this is the struct that the caller passes 876 * to the CISTPL_CFTABLE_ENTRY handler 877 */ 878 typedef struct cistpl_cftable_entry_t { 879 uint32_t flags; /* which descriptions are valid */ 880 uint32_t ifc; /* interface description info */ 881 uint32_t pin; /* values for PRR */ 882 uint32_t index; /* configuration index number */ 883 struct cistpl_cftable_entry_pd_t pd; /* power requirements description */ 884 struct cistpl_cftable_entry_speed_t speed; /* device speed description */ 885 struct cistpl_cftable_entry_io_t io; /* device I/O map */ 886 struct cistpl_cftable_entry_irq_t irq; /* device IRQ utilization */ 887 struct cistpl_cftable_entry_mem_t mem; /* device memory space */ 888 struct cistpl_cftable_entry_misc_t misc; /* misc device features */ 889 } cistpl_cftable_entry_t; 890 891 /* 892 * CISTPL_LINKTARGET 893 * 894 * This tuple is used to verify that tuple chains other than the primary 895 * chain which starts at offset 0 in Attribute Memory are valid. All 896 * secondary tuple chains are required to contain this tuple as the 897 * first tuple of the chain. 898 * This tuple must have a link field of at least MIN_LINKTARGET_LENGTH and 899 * must contain the byte pattern CISTPL_LINKTARGET_MAGIC. 900 * LINKTARGET_AC_HEADER_LENGTH is the number of bytes contained in a 901 * valid CISTPL_LINKTARGET tuple header. 902 */ 903 #define MIN_LINKTARGET_LENGTH 3 904 #define CISTPL_LINKTARGET_MAGIC "CIS" 905 #define LINKTARGET_AC_HEADER_LENGTH 2 906 907 typedef struct cistpl_linktarget_t { 908 uint32_t length; /* number of bytes in tpltg_tag */ 909 char tpltg_tag[CIS_MAX_TUPLE_DATA_LEN]; 910 } cistpl_linktarget_t; 911 912 /* 913 * CISTPL_LONGLINK_A and CISTPL_LONGLINK_C 914 * 915 * Both of these tuples are processed the same way. The target address is 916 * really an offset from the beginning of the specified address space 917 * and is not a virtual address. 918 * This tuple must have a link field of at least MIN_LONGLINK_AC_LENGTH. 919 */ 920 #define MIN_LONGLINK_AC_LENGTH 4 921 922 typedef struct cistpl_longlink_ac_t { 923 uint32_t flags; /* space flags */ 924 uint32_t tpll_addr; /* target address, normalized */ 925 } cistpl_longlink_ac_t; 926 /* 927 * Flags for cistpl_longlink_ac_t->flags 928 */ 929 #define CISTPL_LONGLINK_AC_AM 0x0001 /* longlink to AM */ 930 #define CISTPL_LONGLINK_AC_CM 0x0002 /* longlink to CM */ 931 932 /* 933 * CISTPL_LONGLINK_MFC 934 * 935 * This tuple describes the start of the function-specific CIS for each 936 * function on a multi-function card. 937 * 938 * This tuple must have a link field of at least MIN_LONGLINK_AC_LENGTH. 939 */ 940 #define MIN_LONGLINK_MFC_LENGTH 6 941 #define MIN_LONGLINK_MFC_NREGS 1 942 943 typedef struct cis_function_t { 944 uint32_t tas; /* target address space of function */ 945 uint32_t addr; /* target address offset */ 946 } cis_function_t; 947 948 typedef struct cistpl_longlink_mfc_t { 949 uint32_t nfuncs; /* number of functions */ 950 uint32_t nregs; /* number of config register sets */ 951 cis_function_t function[CIS_MAX_FUNCTIONS]; 952 } cistpl_longlink_mfc_t; 953 /* 954 * Flags for cistpl_longlink_mfc_t->function[n]->tas 955 */ 956 #define CISTPL_LONGLINK_MFC_TAS_AM 0x00 /* CIS in attribute memory */ 957 #define CISTPL_LONGLINK_MFC_TAS_CM 0x01 /* CIS in common memory */ 958 959 /* 960 * CISTPL_LONGLINK_CB 961 * 962 * This tuple describes the start of a function's CIS chain 963 * for CardBus cards 964 */ 965 typedef struct cistpl_longlink_cb_t { 966 uint32_t flags; /* address space flags */ 967 uint32_t addr; /* raw (unproessed) address value */ 968 union { 969 /* device-dependant config space info */ 970 struct { 971 uint32_t offset; /* offset within config space */ 972 } cfg; 973 /* memory space info */ 974 struct { 975 uint32_t asi; /* BAR */ 976 uint32_t offset; /* offset within BAR space */ 977 } mem; 978 /* expansion ROM space info */ 979 struct { 980 uint32_t image; /* image number */ 981 uint32_t offset; /* offset from iamge base */ 982 } rom; 983 } space; 984 } cistpl_longlink_cb_t; 985 /* 986 * Flags for cistpl_longlink_cb_t->flags 987 */ 988 #define CISTPL_LONGLINK_CB_CFG 0x0001 /* config space info valid */ 989 #define CISTPL_LONGLINK_CB_MEM 0x0002 /* memory space info valid */ 990 #define CISTPL_LONGLINK_CB_ROM 0x0004 /* expansion ROM space info valid */ 991 992 /* 993 * CISTPL_SPCL 994 * 995 * This tuple is the Special Purpose tuple and it's contents are dependant 996 * on the meaning of the header information in this tuple. 997 */ 998 typedef struct cistpl_spcl_t { 999 uint32_t id; /* tuple contents identification */ 1000 uint32_t seq; /* data sequence number */ 1001 uint32_t bytes; /* number of bytes following */ 1002 uchar_t data[CIS_MAX_TUPLE_DATA_LEN]; 1003 } cistpl_spcl_t; 1004 /* 1005 * Flags for cistpl_spcl_t->seq 1006 */ 1007 #define CISTPL_SPCL_SEQ_END 0x080 /* last tuple in sequence */ 1008 1009 /* 1010 * CISTPL_SWIL 1011 * 1012 * This tuple describes the software interleaving of data within a 1013 * partition on the card. 1014 */ 1015 typedef struct cistpl_swil_t { 1016 uint32_t intrlv; /* interleave */ 1017 } cistpl_swil_t; 1018 1019 /* 1020 * CISTPL_BAR 1021 * 1022 * This tuple describes the CardBus Base Address Registers 1023 */ 1024 typedef struct cistpl_bar_t { 1025 uint32_t attributes; /* attributes */ 1026 uint32_t size; /* BAR size */ 1027 } cistpl_bar_t; 1028 /* 1029 * Flags for cistpl_bar_t->attributes 1030 */ 1031 #define CISTPL_BAR_ASI_MASK 0x007 /* Base Address Register mask */ 1032 #define CISTPL_BAR_ASI_BAR_1 0x001 /* Base Address Register 1 */ 1033 #define CISTPL_BAR_ASI_BAR_2 0x002 /* Base Address Register 2 */ 1034 #define CISTPL_BAR_ASI_BAR_3 0x003 /* Base Address Register 3 */ 1035 #define CISTPL_BAR_ASI_BAR_4 0x004 /* Base Address Register 4 */ 1036 #define CISTPL_BAR_ASI_BAR_5 0x005 /* Base Address Register 5 */ 1037 #define CISTPL_BAR_ASI_BAR_6 0x006 /* Base Address Register 6 */ 1038 #define CISTPL_BAR_ASI_BAR_7 0x007 /* Base Address Register 7 */ 1039 #define CISTPL_BAR_ASI_EXP_ROM 0x007 /* Expansion ROM BAR */ 1040 1041 #define CISTPL_BAR_AS_MEM 0x000 /* BAR is of type memory */ 1042 #define CISTPL_BAR_AS_IO 0x008 /* BAR is of type IO */ 1043 1044 #define CISTPL_BAR_PREFETCH_CACHE_MASK 0x060 /* prefetch/cache mask */ 1045 #define CISTPL_BAR_PREFETCH 0x020 /* prefetchable not cacheable */ 1046 #define CISTPL_BAR_PREFETCH_CACHE 0x040 /* prefetchable and cacheable */ 1047 1048 #define CISTPL_BAR_BELOW_1MB 0x080 /* must locate within first MB */ 1049 1050 /* 1051 * CISTPL_DEVICEGEO and CISTPL_DEVICEGEO_A 1052 * 1053 * These tuples describe the device geometry of memory partitions. 1054 */ 1055 #define CISTPL_DEVICEGEO_MAX_PARTITIONS 42 1056 typedef struct cistpl_devicegeo_info_t { 1057 uint32_t bus; /* card interface width in bytes */ 1058 uint32_t ebs; /* minimum erase block size */ 1059 uint32_t rbs; /* minimum read block size */ 1060 uint32_t wbs; /* minimum write bock size */ 1061 uint32_t part; /* segment partition subdivisions */ 1062 uint32_t hwil; /* hardware interleave */ 1063 } cistpl_devicegeo_info_t; 1064 typedef struct cistpl_devicegeo_t { 1065 cistpl_devicegeo_info_t info[CISTPL_DEVICEGEO_MAX_PARTITIONS]; 1066 } cistpl_devicegeo_t; 1067 1068 /* 1069 * The cistpl_get_tuple_name_t used to support the HANDTPL_RETURN_NAME 1070 * operation of the CIS parser. 1071 */ 1072 typedef struct cistpl_get_tuple_name_t { 1073 char name[CIS_MAX_TUPLE_NAME_LEN]; 1074 } cistpl_get_tuple_name_t; 1075 1076 /* 1077 * cisparse_t - the structure that unifies all tuple parsing structures 1078 */ 1079 typedef union cisparse_t { 1080 cistpl_config_t cistpl_config; 1081 cistpl_device_t cistpl_device; 1082 cistpl_vers_1_t cistpl_vers_1; 1083 cistpl_vers_2_t cistpl_vers_2; 1084 cistpl_jedec_t cistpl_jedec; 1085 cistpl_format_t cistpl_format; 1086 cistpl_geometry_t cistpl_geometry; 1087 cistpl_byteorder_t cistpl_byteorder; 1088 cistpl_date_t cistpl_date; 1089 cistpl_battery_t cistpl_battery; 1090 cistpl_org_t cistpl_org; 1091 cistpl_manfid_t cistpl_manfid; 1092 cistpl_funcid_t cistpl_funcid; 1093 cistpl_funce_t cistpl_funce; 1094 cistpl_cftable_entry_t cistpl_cftable_entry; 1095 cistpl_linktarget_t cistpl_linktarget; 1096 cistpl_longlink_ac_t cistpl_longlink_ac; 1097 cistpl_longlink_mfc_t cistpl_longlink_mfc; 1098 cistpl_spcl_t cistpl_spcl; 1099 cistpl_swil_t cistpl_swil; 1100 cistpl_bar_t cistpl_bar; 1101 cistpl_devicegeo_t cistpl_devicegeo; 1102 cistpl_longlink_cb_t cistpl_longlink_cb; 1103 cistpl_get_tuple_name_t cistpl_get_tuple_name; 1104 /* members below are for legacy support - REMOVE THEM BEFORE FCS!! */ 1105 cistpl_config_t config; 1106 cistpl_device_t device; 1107 cistpl_vers_1_t version_1; 1108 cistpl_vers_2_t version_2; 1109 cistpl_jedec_t jedec; 1110 cistpl_format_t format; 1111 cistpl_geometry_t geometry; 1112 cistpl_byteorder_t byteorder; 1113 cistpl_date_t date; 1114 cistpl_battery_t battery; 1115 cistpl_org_t org; 1116 cistpl_manfid_t manfid; 1117 cistpl_funcid_t funcid; 1118 cistpl_funce_t funce; 1119 cistpl_cftable_entry_t cftable; 1120 cistpl_linktarget_t linktarget; 1121 cistpl_longlink_ac_t longlink_ac; 1122 cistpl_longlink_mfc_t longlink_mfc; 1123 cistpl_spcl_t spcl; 1124 cistpl_swil_t swil; 1125 cistpl_bar_t bar; 1126 cistpl_devicegeo_t devgeo; 1127 cistpl_longlink_cb_t longlink_cb; 1128 cistpl_get_tuple_name_t tuple_name; 1129 } cisparse_t; 1130 1131 #ifdef __cplusplus 1132 } 1133 #endif 1134 1135 #endif /* _CIS_HANDLERS_H */ 1136