xref: /illumos-gate/usr/src/uts/common/io/xge/hal/include/xgehal-stats.h (revision 7f7322febbcfe774b7270abc3b191c094bfcc517)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  *  Copyright (c) 2002-2005 Neterion, Inc.
24  *  All right Reserved.
25  *
26  *  FileName :    xgehal-stats.h
27  *
28  *  Description:  HW statistics object
29  *
30  *  Created:      2 June 2004
31  */
32 
33 #ifndef XGE_HAL_STATS_H
34 #define XGE_HAL_STATS_H
35 
36 #include "xge-os-pal.h"
37 #include "xge-debug.h"
38 #include "xgehal-types.h"
39 #include "xgehal-config.h"
40 
41 /**
42  * struct xge_hal_stats_hw_info_t - Xframe hardware statistics.
43  * Transmit MAC Statistics:
44  *
45  * @tmac_frms: Count of successfully transmitted MAC
46  * frames Note that this statistic may be inaccurate. The correct statistic may
47  * be derived by calcualating (tmac_ttl_octets - tmac_ttl_less_fb_octets) / 8
48  *
49  * @tmac_data_octets: Count of data and padding octets of successfully
50  * transmitted frames.
51  *
52  * @tmac_drop_frms: Count of frames that could not be sent for no other reason
53  * than internal MAC processing. Increments once whenever the
54  * transmit buffer is flushed (due to an ECC error on a memory descriptor).
55  *
56  * @tmac_mcst_frms: Count of successfully transmitted frames to a multicast
57  * address. Does not include frames sent to the broadcast address.
58  *
59  * @tmac_bcst_frms: Count of successfully transmitted frames to the broadcast
60  * address.
61  *
62  * @tmac_pause_ctrl_frms: Count of MAC PAUSE control frames that are
63  * transmitted. Since, the only control frames supported by this device
64  * are PAUSE frames, this register is a count of all transmitted MAC control
65  * frames.
66  *
67  * @tmac_ttl_octets: Count of total octets of transmitted frames, including
68  * framing characters.
69  *
70  * @tmac_ucst_frms: Count of transmitted frames containing a unicast address.
71  * @tmac_nucst_frms: Count of transmitted frames containing a non-unicast
72  * (broadcast, multicast) address.
73  *
74  * @tmac_any_err_frms: Count of transmitted frames containing any error that
75  * prevents them from being passed to the network. Increments if there is an ECC
76  * while reading the frame out of the transmit buffer.
77  *
78  * @tmac_ttl_less_fb_octets: Count of total octets of transmitted
79  * frames, not including framing characters (i.e. less framing bits)
80  *
81  * @tmac_vld_ip_octets: Count of total octets of transmitted IP datagrams that
82  * were passed to the network. Frames that are padded by the host have
83  * their padding counted as part of the IP datagram.
84  *
85  * @tmac_vld_ip: Count of transmitted IP datagrams that were passed to the
86  * network.
87  *
88  * @tmac_drop_ip: Count of transmitted IP datagrams that could not be passed to
89  * the network. Increments because of 1) an internal processing error (such as
90  * an uncorrectable ECC error); 2) a frame parsing error during IP checksum
91  * calculation.
92  *
93  * @tmac_icmp: Count of transmitted ICMP messages. Includes messages not sent
94  * due to problems within ICMP.
95  *
96  * @tmac_rst_tcp: Count of transmitted TCP segments containing the RST flag.
97  *
98  * @tmac_tcp: Count of transmitted TCP segments. Note that Xena has
99  * no knowledge of retransmission.
100  *
101  * @tmac_udp: Count of transmitted UDP datagrams.
102  * @reserved_0: Reserved.
103  *
104  * Receive MAC Statistics:
105  * @rmac_vld_frms: Count of successfully received MAC frames. Does not include
106  * frames received with frame-too-long, FCS, or length errors.
107  *
108  * @rmac_data_octets: Count of data and padding octets of successfully received
109  * frames. Does not include frames received with frame-too-long, FCS, or length
110  * errors.
111  *
112  * @rmac_fcs_err_frms: Count of received MAC frames that do not pass FCS. Does
113  * not include frames received with frame-too-long or frame-too-short error.
114  *
115  * @rmac_drop_frms: Count of received frames that could not be passed to the
116  * host because of 1) Random Early Discard (RED); 2) Frame steering algorithm
117  * found no available queue; 3) Receive ingress buffer overflow.
118  *
119  * @rmac_vld_mcst_frms: Count of successfully received MAC frames containing a
120  * multicast address. Does not include frames received with frame-too-long, FCS,
121  * or length errors.
122  *
123  * @rmac_vld_bcst_frms: Count of successfully received MAC frames containing a
124  * broadcast address. Does not include frames received with frame-too-long, FCS,
125  * or length errors.
126  *
127  * @rmac_in_rng_len_err_frms: Count of received frames with a length/type field
128  * value between 46 (42 for VLANtagged frames) and 1500 (also 1500 for
129  * VLAN-tagged frames), inclusive, that does not match the number of data octets
130  * (including pad) received. Also contains a count of received frames with a
131  * length/type field less than 46 (42 for VLAN-tagged frames) and the number of
132  * data octets (including pad) received is greater than 46 (42 for VLAN-tagged
133  * frames).
134  *
135  * @rmac_out_rng_len_err_frms: Count of received frames with length/type field
136  * between 1501 and 1535 decimal, inclusive.
137  *
138  * @rmac_long_frms: Count of received frames that are longer than
139  * rmac_max_pyld_len + 18 bytes (+22 bytes if VLAN-tagged).
140  *
141  * @rmac_pause_ctrl_frms: Count of received MAC PAUSE control frames.
142  *
143  * @rmac_unsup_ctrl_frms: Count of received MAC control frames
144  * that do not contain the PAUSE opcode. The sum of MAC_PAUSE_CTRL_FRMS and this
145  * register is a count of all received MAC control frames.
146  *
147  * @rmac_ttl_octets: Count of total octets of received frames, including framing
148  * characters.
149  *
150  * @rmac_accepted_ucst_frms: Count of successfully received frames
151  * containing a unicast address. Only includes frames that are passed to the
152  * system.
153  *
154  * @rmac_accepted_nucst_frms: Count of successfully received frames
155  * containing a non-unicast (broadcast or multicast) address. Only includes
156  * frames that are passed to the system. Could include, for instance,
157  * non-unicast frames that contain FCS errors if the MAC_ERROR_CFG register is
158  * set to pass FCSerrored frames to the host.
159  *
160  * @rmac_discarded_frms: Count of received frames containing any error that
161  * prevents them from being passed to the system. Includes, for example,
162  * received pause frames that are discarded by the MAC and frames discarded
163  * because of their destination address.
164  *
165  * @rmac_drop_events: Because the RMAC drops one frame at a time, this stat
166  * matches rmac_drop_frms.
167  *
168  * @reserved_1: Reserved.
169  * @rmac_ttl_less_fb_octets: Count of total octets of received frames,
170  * not including framing characters (i.e. less framing bits).
171  *
172  * @rmac_ttl_frms: Count of all received MAC frames, including frames received
173  * with frame-too-long, FCS, or length errors.
174  *
175  * @reserved_2: Reserved.
176  * @reserved_3: Reserved.
177  * @rmac_usized_frms: Count of received frames of length (including FCS, but not
178  * framing bits) less than 64 octets, that are otherwise well-formed.
179  *
180  * @rmac_osized_frms: Count of received frames of length (including FCS, but not
181  * framing bits) more than 1518 octets, that are otherwise well-formed.
182  *
183  * @rmac_frag_frms: Count of received frames of length (including FCS, but not
184  * framing bits) less than 64 octets that had bad FCS. In other words, counts
185  * fragments (i.e. runts).
186  *
187  * @rmac_jabber_frms: Count of received frames of length (including FCS, but not
188  * framing bits) more than MTU octets that had bad FCS. In other words, counts
189  * jabbers.
190  *
191  * @reserved_4: Reserved.
192  * @rmac_ttl_64_frms: Count of all received MAC frames with length (including
193  * FCS, but not framing bits) of exactly 64 octets. Includes frames received
194  * with frame-too-long, FCS, or length errors.
195  *
196  * @rmac_ttl_65_127_frms: Count of all received MAC frames with length
197  * (including FCS, but not framing bits) of between 65 and 127 octets
198  * inclusive. Includes frames received with frame-too-long, FCS, or length
199  * errors.
200  * @reserved_5: Reserved.
201  * @rmac_ttl_128_255_frms: Count of all received MAC frames with length
202  * (including FCS, but not framing bits) of between 128 and 255 octets
203  * inclusive. Includes frames received with frame-too-long, FCS, or length
204  * errors.
205  *
206  * @rmac_ttl_256_511_frms: Count of all received MAC frames with length
207  * (including FCS, but not framing bits) of between 256 and 511 octets
208  * inclusive. Includes frames received with frame-too-long, FCS, or length
209  * errors.
210  *
211  * @reserved_6: Reserved.
212  * @rmac_ttl_512_1023_frms: Count of all received MAC frames with length
213  * (including FCS, but not framing bits) of between 512 and 1023 octets
214  * inclusive. Includes frames received with frame-too-long, FCS, or length
215  * errors.
216  *
217  * @rmac_ttl_1024_1518_frms: Count of all received MAC frames with length
218  * (including FCS, but not framing bits) of between 1024 and 1518 octets
219  * inclusive. Includes frames received with frame-too-long, FCS, or length
220  * errors.
221  * @reserved_7: Reserved.
222  * @rmac_ip: Count of received IP datagrams. Includes errored IP datagrams.
223  *
224  * @rmac_ip_octets: Count of number of octets in received IP datagrams. Includes
225  * errored IP datagrams.
226  *
227  * @rmac_hdr_err_ip: Count of received IP datagrams that are discarded due to IP
228  * header errors.
229  *
230  * @rmac_drop_ip: Count of received IP datagrams that could not be passed to the
231  * host because of 1) Random Early Discard (RED); 2) Frame steering algorithm
232  * found no available queue; 3) Receive ingress buffer overflow.
233  * @rmac_icmp: Count of received ICMP messages. Includes errored ICMP messages
234  * (due to ICMP checksum fail).
235  *
236  * @reserved_8: Reserved.
237  * @rmac_tcp: Count of received TCP segments. Since Xena is unaware of
238  * connection context, counts all received TCP segments, regardless of whether
239  * or not they pertain to an established connection.
240  *
241  * @rmac_udp: Count of received UDP datagrams.
242  * @rmac_err_drp_udp: Count of received UDP datagrams that were not delivered to
243  * the system because of 1) Random Early Discard (RED); 2) Frame steering
244  * algorithm found no available queue; 3) Receive ingress buffer overflow.
245  *
246  * @rmac_xgmii_err_sym: Count of the number of symbol errors in the received
247  * XGMII data (i.e. PHY indicates "Receive Error" on the XGMII). Only includes
248  * symbol errors that are observed between the XGMII Start Frame Delimiter
249  * and End Frame Delimiter, inclusive. And only increments the count by one for
250  * each frame.
251  *
252  * @rmac_frms_q0: Count of number of frames that pass through queue 0 of receive
253  * buffer.
254  * @rmac_frms_q1: Count of number of frames that pass through queue 1 of receive
255  * buffer.
256  * @rmac_frms_q2: Count of number of frames that pass through queue 2 of receive
257  * buffer.
258  * @rmac_frms_q3: Count of number of frames that pass through queue 3 of receive
259  * buffer.
260  * @rmac_frms_q4: Count of number of frames that pass through queue 4 of receive
261  * buffer.
262  * @rmac_frms_q5: Count of number of frames that pass through queue 5 of receive
263  * buffer.
264  * @rmac_frms_q6: Count of number of frames that pass through queue 6 of receive
265  * buffer.
266  * @rmac_frms_q7: Count of number of frames that pass through queue 7 of receive
267  * buffer.
268  * @rmac_full_q0: Count of number of times that receive buffer queue 0 has
269  * filled up. If a queue is size 0, then this stat is incremented to a value of
270  * 1 when MAC receives its first frame.
271  *
272  * @rmac_full_q1: Count of number of times that receive buffer queue 1 has
273  * filled up. If a queue is size 0, then this stat is incremented to a value of
274  * 1 when MAC receives its first frame.
275  *
276  * @rmac_full_q2: Count of number of times that receive buffer queue 2 has
277  * filled up. If a queue is size 0, then this stat is incremented to a value of
278  * 1 when MAC receives its first frame.
279  *
280  * @rmac_full_q3: Count of number of times that receive buffer queue 3 has
281  * filled up. If a queue is size 0, then this stat is incremented to a value of
282  * 1 when MAC receives its first frame.
283  *
284  * @rmac_full_q4: Count of number of times that receive buffer queue 4 has
285  * filled up. If a queue is size 0, then this stat is incremented to a value of
286  * 1 when MAC receives its first frame.
287  *
288  * @rmac_full_q5: Count of number of times that receive buffer queue 5 has
289  * filled up. If a queue is size 0, then this stat is incremented to a value of
290  * 1 when MAC receives its first frame.
291  *
292  * @rmac_full_q6: Count of number of times that receive buffer queue 6 has
293  * filled up. If a queue is size 0, then this stat is incremented to a value of
294  * 1 when MAC receives its first frame.
295  *
296  * @rmac_full_q7: Count of number of times that receive buffer queue 7 has
297  * filled up. If a queue is size 0, then this stat is incremented to a value of
298  * 1 when MAC receives its first frame.
299  *
300  * @rmac_pause_cnt: Count of number of pause quanta that the MAC has been in the
301  * paused state. Recall, one pause quantum equates to 512 bit times.
302  * @reserved_9: Reserved.
303  * @rmac_xgmii_data_err_cnt: This counter is incremented when either 1) The
304  * Reconcilliation Sublayer (RS) is expecting one control character and gets
305  * another (i.e. expecting Start control character and gets another control
306  * character); 2) Start control character is not in lane 0 or lane 4; 3) The RS
307  * gets a Start control character, but the start frame delimiter is not found in
308  * the correct location.
309  * @rmac_xgmii_ctrl_err_cnt: Maintains a count of unexpected or
310  * misplaced control characters occuring outside of normal data transmission
311  * (i.e. not included in RMAC_XGMII_DATA_ERR_CNT).
312  *
313  * @rmac_accepted_ip: Count of received IP datagrams that were passed to the
314  * system.
315  *
316  * @rmac_err_tcp: Count of received TCP segments containing errors. For example,
317  * bad TCP checksum.
318  *
319  * PCI (bus) Statistics:
320  * @rd_req_cnt: Counts the total number of read requests made by the device.
321  * @new_rd_req_cnt: Counts the requests made for a new read sequence (request
322  * made for the same sequence after a retry or disconnect response are not
323  * counted).
324  * @new_rd_req_rtry_cnt: Counts the Retry responses received on the start of
325  * the new read sequences.
326  * @rd_rtry_cnt: Counts the Retry responses received for read requests.
327  * @wr_rtry_rd_ack_cnt: Increments whenever a read request is accepted by
328  * the target after a write request was terminated with retry.
329  * @wr_req_cnt: Counts the total number of Write requests made by the device.
330  * @new_wr_req_cnt: Counts the requests made for a new write sequence (request
331  * made for the same sequence after a retry or disconnect response are not
332  * counted).
333  * @new_wr_req_rtry_cnt: Counts the requests made for a new write sequence
334  * (request made for the same sequence after a retry or disconnect response are
335  * not counted).
336  *
337  * @wr_rtry_cnt: Counts the Retry responses received for write requests.
338  * @wr_disc_cnt: Write Disconnect. Counts the target initiated disconnects
339  * on write transactions.
340  * @rd_rtry_wr_ack_cnt: Increments whenever a write request is accepted by the
341  * target after a read request was terminated with retry.
342  *
343  * @txp_wr_cnt: Counts the host write transactions to the Tx Pointer
344  * FIFOs.
345  * @txd_rd_cnt: Count of the Transmit Descriptor (TxD) read requests.
346  * @txd_wr_cnt: Count of the TxD write requests.
347  * @rxd_rd_cnt: Count of the Receive Descriptor (RxD) read requests.
348  * @rxd_wr_cnt: Count of the RxD write requests.
349  * @txf_rd_cnt: Count of transmit frame read requests. This will not
350  * equal the number of frames transmitted, as frame data is typically spread
351  * across multiple PCI transactions.
352  * @rxf_wr_cnt: Count of receive frame write requests.
353  *
354  * Xframe hardware statistics.
355  */
356 typedef struct xge_hal_stats_hw_info_t {
357 #ifdef  XGE_OS_HOST_BIG_ENDIAN
358 /* Tx MAC statistics counters. */
359 	u32 tmac_frms;
360 	u32 tmac_data_octets;
361 	u64 tmac_drop_frms;
362 	u32 tmac_mcst_frms;
363 	u32 tmac_bcst_frms;
364 	u64 tmac_pause_ctrl_frms;
365 	u32 tmac_ttl_octets;
366 	u32 tmac_ucst_frms;
367 	u32 tmac_nucst_frms;
368 	u32 tmac_any_err_frms;
369 	u64 tmac_ttl_less_fb_octets;
370 	u64 tmac_vld_ip_octets;
371 	u32 tmac_vld_ip;
372 	u32 tmac_drop_ip;
373 	u32 tmac_icmp;
374 	u32 tmac_rst_tcp;
375 	u64 tmac_tcp;
376 	u32 tmac_udp;
377 	u32 reserved_0;
378 
379 /* Rx MAC Statistics counters. */
380 	u32 rmac_vld_frms;
381 	u32 rmac_data_octets;
382 	u64 rmac_fcs_err_frms;
383 	u64 rmac_drop_frms;
384 	u32 rmac_vld_mcst_frms;
385 	u32 rmac_vld_bcst_frms;
386 	u32 rmac_in_rng_len_err_frms;
387 	u32 rmac_out_rng_len_err_frms;
388 	u64 rmac_long_frms;
389 	u64 rmac_pause_ctrl_frms;
390 	u64 rmac_unsup_ctrl_frms;
391 	u32 rmac_ttl_octets;
392 	u32 rmac_accepted_ucst_frms;
393 	u32 rmac_accepted_nucst_frms;
394 	u32 rmac_discarded_frms;
395 	u32 rmac_drop_events;
396 	u32 reserved_1;
397 	u64 rmac_ttl_less_fb_octets;
398 	u64 rmac_ttl_frms;
399 	u64 reserved_2;
400 	u32 reserved_3;
401 	u32 rmac_usized_frms;
402 	u32 rmac_osized_frms;
403 	u32 rmac_frag_frms;
404 	u32 rmac_jabber_frms;
405 	u32 reserved_4;
406 	u64 rmac_ttl_64_frms;
407 	u64 rmac_ttl_65_127_frms;
408 	u64 reserved_5;
409 	u64 rmac_ttl_128_255_frms;
410 	u64 rmac_ttl_256_511_frms;
411 	u64 reserved_6;
412 	u64 rmac_ttl_512_1023_frms;
413 	u64 rmac_ttl_1024_1518_frms;
414 	u32 reserved_7;
415 	u32 rmac_ip;
416 	u64 rmac_ip_octets;
417 	u32 rmac_hdr_err_ip;
418 	u32 rmac_drop_ip;
419 	u32 rmac_icmp;
420 	u32 reserved_8;
421 	u64 rmac_tcp;
422 	u32 rmac_udp;
423 	u32 rmac_err_drp_udp;
424 	u64 rmac_xgmii_err_sym;
425 	u64 rmac_frms_q0;
426 	u64 rmac_frms_q1;
427 	u64 rmac_frms_q2;
428 	u64 rmac_frms_q3;
429 	u64 rmac_frms_q4;
430 	u64 rmac_frms_q5;
431 	u64 rmac_frms_q6;
432 	u64 rmac_frms_q7;
433 	u16 rmac_full_q0;
434 	u16 rmac_full_q1;
435 	u16 rmac_full_q2;
436 	u16 rmac_full_q3;
437 	u16 rmac_full_q4;
438 	u16 rmac_full_q5;
439 	u16 rmac_full_q6;
440 	u16 rmac_full_q7;
441 	u32 rmac_pause_cnt;
442 	u32 reserved_9;
443 	u64 rmac_xgmii_data_err_cnt;
444 	u64 rmac_xgmii_ctrl_err_cnt;
445 	u32 rmac_accepted_ip;
446 	u32 rmac_err_tcp;
447 
448 /* PCI/PCI-X Read transaction statistics. */
449 	u32 rd_req_cnt;
450 	u32 new_rd_req_cnt;
451 	u32 new_rd_req_rtry_cnt;
452 	u32 rd_rtry_cnt;
453 	u32 wr_rtry_rd_ack_cnt;
454 
455 /* PCI/PCI-X write transaction statistics. */
456 	u32 wr_req_cnt;
457 	u32 new_wr_req_cnt;
458 	u32 new_wr_req_rtry_cnt;
459 	u32 wr_rtry_cnt;
460 	u32 wr_disc_cnt;
461 	u32 rd_rtry_wr_ack_cnt;
462 
463 /*	DMA Transaction statistics. */
464 	u32 txp_wr_cnt;
465 	u32 txd_rd_cnt;
466 	u32 txd_wr_cnt;
467 	u32 rxd_rd_cnt;
468 	u32 rxd_wr_cnt;
469 	u32 txf_rd_cnt;
470 	u32 rxf_wr_cnt;
471 
472 /* Enhanced Herc statistics */
473 	u32 tmac_frms_oflow;
474 	u32 tmac_data_octets_oflow;
475 	u32 tmac_mcst_frms_oflow;
476 	u32 tmac_bcst_frms_oflow;
477 	u32 tmac_ttl_octets_oflow;
478 	u32 tmac_ucst_frms_oflow;
479 	u32 tmac_nucst_frms_oflow;
480 	u32 tmac_any_err_frms_oflow;
481 	u64 tmac_vlan_frms;
482 	u32 tmac_vld_ip_oflow;
483 	u32 tmac_drop_ip_oflow;
484 	u32 tmac_icmp_oflow;
485 	u32 tmac_rst_tcp_oflow;
486 	u32 tmac_udp_oflow;
487 	u32 tpa_unknown_protocol;
488 	u32 tpa_parse_failure;
489 	u32 rmac_vld_frms_oflow;
490 	u32 rmac_data_octets_oflow;
491 	u32 rmac_vld_mcst_frms_oflow;
492 	u32 rmac_vld_bcst_frms_oflow;
493 	u32 rmac_ttl_octets_oflow;
494 	u32 rmac_accepted_ucst_frms_oflow;
495 	u32 rmac_accepted_nucst_frms_oflow;
496 	u32 rmac_discarded_frms_oflow;
497 	u32 rmac_drop_events_oflow;
498 	u32 rmac_usized_frms_oflow;
499 	u32 rmac_osized_frms_oflow;
500 	u32 rmac_frag_frms_oflow;
501 	u32 rmac_jabber_frms_oflow;
502 	u32 rmac_ip_oflow;
503 	u32 rmac_drop_ip_oflow;
504 	u32 rmac_icmp_oflow;
505 	u32 rmac_udp_oflow;
506 	u32 rmac_err_drp_udp_oflow;
507 	u32 rmac_pause_cnt_oflow;
508 	u64 rmac_ttl_1519_4095_frms;
509 	u64 rmac_ttl_4096_8191_frms;
510 	u64 rmac_ttl_8192_max_frms;
511 	u64 rmac_ttl_gt_max_frms;
512 	u64 rmac_osized_alt_frms;
513 	u64 rmac_jabber_alt_frms;
514 	u64 rmac_gt_max_alt_frms;
515 	u64 rmac_vlan_frms;
516 	u32 rmac_fcs_discard;
517 	u32 rmac_len_discard;
518 	u32 rmac_da_discard;
519 	u32 rmac_pf_discard;
520 	u32 rmac_rts_discard;
521 	u32 rmac_red_discard;
522 	u32 rmac_ingm_full_discard;
523 	u32 rmac_accepted_ip_oflow;
524 	u32 link_fault_cnt;
525 #else
526 /* Tx MAC statistics counters. */
527 	u32 tmac_data_octets;
528 	u32 tmac_frms;
529 	u64 tmac_drop_frms;
530 	u32 tmac_bcst_frms;
531 	u32 tmac_mcst_frms;
532 	u64 tmac_pause_ctrl_frms;
533 	u32 tmac_ucst_frms;
534 	u32 tmac_ttl_octets;
535 	u32 tmac_any_err_frms;
536 	u32 tmac_nucst_frms;
537 	u64 tmac_ttl_less_fb_octets;
538 	u64 tmac_vld_ip_octets;
539 	u32 tmac_drop_ip;
540 	u32 tmac_vld_ip;
541 	u32 tmac_rst_tcp;
542 	u32 tmac_icmp;
543 	u64 tmac_tcp;
544 	u32 reserved_0;
545 	u32 tmac_udp;
546 
547 /* Rx MAC Statistics counters. */
548 	u32 rmac_data_octets;
549 	u32 rmac_vld_frms;
550 	u64 rmac_fcs_err_frms;
551 	u64 rmac_drop_frms;
552 	u32 rmac_vld_bcst_frms;
553 	u32 rmac_vld_mcst_frms;
554 	u32 rmac_out_rng_len_err_frms;
555 	u32 rmac_in_rng_len_err_frms;
556 	u64 rmac_long_frms;
557 	u64 rmac_pause_ctrl_frms;
558 	u64 rmac_unsup_ctrl_frms;
559 	u32 rmac_accepted_ucst_frms;
560 	u32 rmac_ttl_octets;
561 	u32 rmac_discarded_frms;
562 	u32 rmac_accepted_nucst_frms;
563 	u32 reserved_1;
564 	u32 rmac_drop_events;
565 	u64 rmac_ttl_less_fb_octets;
566 	u64 rmac_ttl_frms;
567 	u64 reserved_2;
568 	u32 rmac_usized_frms;
569 	u32 reserved_3;
570 	u32 rmac_frag_frms;
571 	u32 rmac_osized_frms;
572 	u32 reserved_4;
573 	u32 rmac_jabber_frms;
574 	u64 rmac_ttl_64_frms;
575 	u64 rmac_ttl_65_127_frms;
576 	u64 reserved_5;
577 	u64 rmac_ttl_128_255_frms;
578 	u64 rmac_ttl_256_511_frms;
579 	u64 reserved_6;
580 	u64 rmac_ttl_512_1023_frms;
581 	u64 rmac_ttl_1024_1518_frms;
582 	u32 rmac_ip;
583 	u32 reserved_7;
584 	u64 rmac_ip_octets;
585 	u32 rmac_drop_ip;
586 	u32 rmac_hdr_err_ip;
587 	u32 reserved_8;
588 	u32 rmac_icmp;
589 	u64 rmac_tcp;
590 	u32 rmac_err_drp_udp;
591 	u32 rmac_udp;
592 	u64 rmac_xgmii_err_sym;
593 	u64 rmac_frms_q0;
594 	u64 rmac_frms_q1;
595 	u64 rmac_frms_q2;
596 	u64 rmac_frms_q3;
597 	u64 rmac_frms_q4;
598 	u64 rmac_frms_q5;
599 	u64 rmac_frms_q6;
600 	u64 rmac_frms_q7;
601 	u16 rmac_full_q3;
602 	u16 rmac_full_q2;
603 	u16 rmac_full_q1;
604 	u16 rmac_full_q0;
605 	u16 rmac_full_q7;
606 	u16 rmac_full_q6;
607 	u16 rmac_full_q5;
608 	u16 rmac_full_q4;
609 	u32 reserved_9;
610 	u32 rmac_pause_cnt;
611 	u64 rmac_xgmii_data_err_cnt;
612 	u64 rmac_xgmii_ctrl_err_cnt;
613 	u32 rmac_err_tcp;
614 	u32 rmac_accepted_ip;
615 
616 /* PCI/PCI-X Read transaction statistics. */
617 	u32 new_rd_req_cnt;
618 	u32 rd_req_cnt;
619 	u32 rd_rtry_cnt;
620 	u32 new_rd_req_rtry_cnt;
621 
622 /* PCI/PCI-X Write/Read transaction statistics. */
623 	u32 wr_req_cnt;
624 	u32 wr_rtry_rd_ack_cnt;
625 	u32 new_wr_req_rtry_cnt;
626 	u32 new_wr_req_cnt;
627 	u32 wr_disc_cnt;
628 	u32 wr_rtry_cnt;
629 
630 /*	PCI/PCI-X Write / DMA Transaction statistics. */
631 	u32 txp_wr_cnt;
632 	u32 rd_rtry_wr_ack_cnt;
633 	u32 txd_wr_cnt;
634 	u32 txd_rd_cnt;
635 	u32 rxd_wr_cnt;
636 	u32 rxd_rd_cnt;
637 	u32 rxf_wr_cnt;
638 	u32 txf_rd_cnt;
639 
640 /* Enhanced Herc statistics */
641 	u32 tmac_data_octets_oflow;
642 	u32 tmac_frms_oflow;
643 	u32 tmac_bcst_frms_oflow;
644 	u32 tmac_mcst_frms_oflow;
645 	u32 tmac_ucst_frms_oflow;
646 	u32 tmac_ttl_octets_oflow;
647 	u32 tmac_any_err_frms_oflow;
648 	u32 tmac_nucst_frms_oflow;
649 	u64 tmac_vlan_frms;
650 	u32 tmac_drop_ip_oflow;
651 	u32 tmac_vld_ip_oflow;
652 	u32 tmac_rst_tcp_oflow;
653 	u32 tmac_icmp_oflow;
654 	u32 tpa_unknown_protocol;
655 	u32 tmac_udp_oflow;
656 	u32 rmac_vld_frms_oflow;
657 	u32 tpa_parse_failure;
658 	u32 rmac_vld_mcst_frms_oflow;
659 	u32 rmac_data_octets_oflow;
660 	u32 rmac_ttl_octets_oflow;
661 	u32 rmac_vld_bcst_frms_oflow;
662 	u32 rmac_accepted_nucst_frms_oflow;
663 	u32 rmac_accepted_ucst_frms_oflow;
664 	u32 rmac_drop_events_oflow;
665 	u32 rmac_discarded_frms_oflow;
666 	u32 rmac_osized_frms_oflow;
667 	u32 rmac_usized_frms_oflow;
668 	u32 rmac_jabber_frms_oflow;
669 	u32 rmac_frag_frms_oflow;
670 	u32 rmac_drop_ip_oflow;
671 	u32 rmac_ip_oflow;
672 	u32 rmac_udp_oflow;
673 	u32 rmac_icmp_oflow;
674 	u32 rmac_pause_cnt_oflow;
675 	u32 rmac_err_drp_udp_oflow;
676 	u64 rmac_ttl_1519_4095_frms;
677 	u64 rmac_ttl_4096_8191_frms;
678 	u64 rmac_ttl_8192_max_frms;
679 	u64 rmac_ttl_gt_max_frms;
680 	u64 rmac_osized_alt_frms;
681 	u64 rmac_jabber_alt_frms;
682 	u64 rmac_gt_max_alt_frms;
683 	u64 rmac_vlan_frms;
684 	u32 rmac_len_discard;
685 	u32 rmac_fcs_discard;
686 	u32 rmac_pf_discard;
687 	u32 rmac_da_discard;
688 	u32 rmac_red_discard;
689 	u32 rmac_rts_discard;
690 	u32 rmac_accepted_ip_oflow;
691 	u32 rmac_ingm_full_discard;
692 	u32 link_fault_cnt;
693 #endif
694 } xge_hal_stats_hw_info_t;
695 
696 /**
697  * struct xge_hal_stats_channel_into_t - HAL channel statistics.
698  * @out_of_dtrs_cnt: Number of times caller failed to reserve descriptors,
699  *    that is, number of xge_hal_fifo/ring_dtr_reserve failures.
700  * @reserve_free_swaps_cnt: Reserve/free swap counter. Internal usage.
701  * @max_compl_per_intr_cnt: Maximum number of completions per interrupt.
702  * @avg_compl_per_intr_cnt: Average number of completions per interrupt.
703  *           Note that a total number of completed descriptors
704  *           for the given channel can be calculated as
705  *           (@traffic_intr_cnt * @avg_compl_per_intr_cnt).
706  * @total_compl_cnt: Total completion count.
707  *        @total_compl_cnt == (@traffic_intr_cnt * @avg_compl_per_intr_cnt).
708  * @total_posts: Total number of descriptor postings on the channel.
709  *        Counts the number of xge_hal_ring_dtr_post()
710  *        or xge_hal_fifo_dtr_post() calls by ULD, for ring and fifo
711  *        channel, respectively.
712  * @total_posts_many: Total number of posts on the channel that involved
713  *        more than one descriptor. Counts the number of
714  *        xge_hal_fifo_dtr_post_many() calls performed by ULD.
715  * @total_buffers: Total number of buffers posted on the channel.
716  * @avg_buffers_per_post: Average number of buffers transferred in a single
717  *        post operation.
718  *        Calculated as @total_buffers/@total_posts.
719  * @avg_buffer_size: Average buffer size transferred by a single post
720  *       operation on a fifo channel. The counter is not supported for a ring
721  *       channel. Calculated as a total number of transmitted octets divided
722  *       by @total_buffers.
723  * @avg_post_size: Average amount of data transferred by a single post.
724  *       Calculated as a total number of transmitted octets divided by
725  *       @total_posts.
726  * @ring_bump_cnt: Ring "bump" count. Number of times the hardware could
727  *       not post receive data (and had to continue keeping it on-board)
728  *       because of unavailable receive descriptor(s).
729  * @total_posts_dtrs_many: Total number of posts on the channel that involving
730  *       more than one descriptor.
731  * @total_posts_frags_many: Total number of fragments posted on the channel
732  *	 during post requests of multiple descriptors.
733  * @total_posts_dang_dtrs: Total number of posts on the channel involving
734  *       dangling descriptors.
735  * @total_posts_dang_frags: Total number of dangling fragments posted on the channel
736  *	 during post request containing multiple descriptors.
737  *
738  * HAL channel counters.
739  * See also: xge_hal_stats_device_info_t{}.
740  */
741 typedef struct xge_hal_stats_channel_info_t {
742 	u32	out_of_dtrs_cnt;
743 	u32	reserve_free_swaps_cnt;
744 	u32	avg_compl_per_intr_cnt;
745 	u32	total_compl_cnt;
746 	u32	total_posts;
747 	u32	total_posts_many;
748 	u32	total_buffers;
749 	u32	avg_buffers_per_post;
750 	u32	avg_buffer_size;
751 	u32	avg_post_size;
752 	u32	ring_bump_cnt;
753 	u32	total_posts_dtrs_many;
754 	u32	total_posts_frags_many;
755 	u32	total_posts_dang_dtrs;
756 	u32	total_posts_dang_frags;
757 } xge_hal_stats_channel_info_t;
758 
759 
760 /**
761  * struct xge_hal_stats_sw_err_t - HAL device error statistics.
762  * @ecc_err_cnt: ECC error count.
763  * @parity_err_cnt: Parity error count.
764  * @serr_cnt: Number of exceptions indicated to the host via PCI SERR#.
765  * @rxd_t_code_err_cnt: Array of receive transfer codes. The position
766  * (index) in this array reflects the transfer code type, for instance
767  * 0x7 - for "invalid receive buffer size", or 0x8 - for ECC.
768  * Value rxd_t_code_err_cnt[i] reflects the
769  * number of times the corresponding transfer code was encountered.
770  *
771  * @txd_t_code_err_cnt: Array of transmit transfer codes. The position
772  * (index) in this array reflects the transfer code type, for instance
773  * 0xA - "loss of link".
774  * Value txd_t_code_err_cnt[i] reflects the
775  * number of times the corresponding transfer code was encountered.
776  */
777 typedef struct xge_hal_stats_sw_err_t {
778 	u32     sm_err_cnt;
779 	u32     single_ecc_err_cnt;
780 	u32     double_ecc_err_cnt;
781 	u32     ecc_err_cnt;
782 	u32     parity_err_cnt;
783 	u32     serr_cnt;
784 	u32     rxd_t_code_err_cnt[16];
785 	u32     txd_t_code_err_cnt[16];
786 } xge_hal_stats_sw_err_t;
787 
788 /**
789  * struct xge_hal_stats_device_info_t - HAL own per-device statistics.
790  * @not_traffic_intr_cnt: Number of times the host was interrupted
791  *                        without new completions.
792  *                        "Non-traffic interrupt counter".
793  * @traffic_intr_cnt: Number of traffic interrupts for the device.
794  * @total_intr_cnt: Total number of traffic interrupts for the device.
795  *                  @total_intr_cnt == @traffic_intr_cnt +
796  *                              @not_traffic_intr_cnt
797  * @soft_reset_cnt: Number of times soft reset is done on this device.
798  * @rxufca_hi_adjust_cnt: TODO
799  * @rxufca_lo_adjust_cnt: TODO
800  *
801  * HAL per-device statistics.
802  * See also: xge_hal_stats_channel_info_t{}.
803  */
804 typedef struct xge_hal_stats_device_info_t {
805 	u32				rx_traffic_intr_cnt;
806 	u32				tx_traffic_intr_cnt;
807 	u32				not_traffic_intr_cnt;
808 	u32				traffic_intr_cnt;
809 	u32				total_intr_cnt;
810 	u32				soft_reset_cnt;
811 	u32				rxufca_hi_adjust_cnt;
812 	u32				rxufca_lo_adjust_cnt;
813 #ifdef XGE_HAL_CONFIG_LRO
814 	u32				tot_frms_lroised;
815 	u32				tot_lro_sessions;
816 #endif
817 } xge_hal_stats_device_info_t;
818 
819 /**
820  * struct xge_hal_stats_t - Contains HAL per-device statistics,
821  * including hw.
822  * @devh: HAL device handle.
823  * @dma_addr: DMA addres of the %hw_info. Given to device to fill-in the stats.
824  * @hw_info_dmah: DMA handle used to map hw statistics onto the device memory
825  *                space.
826  * @hw_info_dma_acch: One more DMA handle used subsequently to free the
827  *                    DMA object. Note that this and the previous handle have
828  *                    physical meaning for Solaris; on Windows and Linux the
829  *                    corresponding value will be simply pointer to PCI device.
830  *
831  * @hw_info: Xframe statistics maintained by the hardware.
832  * @sw_dev_info_stats: HAL's "soft" device informational statistics, e.g. number
833  *                     of completions per interrupt.
834  * @sw_dev_err_stats: HAL's "soft" device error statistics.
835  *
836  * @is_initialized: True, if all the subordinate structures are allocated and
837  *                  initialized.
838  * @is_enabled: True, if device stats collection is enabled.
839  *
840  * Structure-container of HAL per-device statistics. Note that per-channel
841  * statistics are kept in separate structures under HAL's fifo and ring
842  * channels.
843  * See also: xge_hal_stats_hw_info_t{}, xge_hal_stats_sw_err_t{},
844  * xge_hal_stats_device_info_t{}.
845  * See also: xge_hal_stats_channel_info_t{}.
846  */
847 typedef struct xge_hal_stats_t {
848         /* handles */
849 	xge_hal_device_h		devh;
850 	dma_addr_t			dma_addr;
851 	pci_dma_h			hw_info_dmah;
852 	pci_dma_acc_h			hw_info_dma_acch;
853 
854         /* HAL device hardware statistics */
855 	xge_hal_stats_hw_info_t		*hw_info;
856 	xge_hal_stats_hw_info_t		hw_info_saved;
857 	xge_hal_stats_hw_info_t		hw_info_latest;
858 
859         /* HAL device "soft" stats */
860 	xge_hal_stats_sw_err_t          sw_dev_err_stats;
861 	xge_hal_stats_device_info_t     sw_dev_info_stats;
862 
863         /* flags */
864 	int				is_initialized;
865 	int				is_enabled;
866 } xge_hal_stats_t;
867 
868 /* ========================== STATS PRIVATE API ========================= */
869 
870 xge_hal_status_e __hal_stats_initialize(xge_hal_stats_t *stats,
871 			xge_hal_device_h devh);
872 
873 void __hal_stats_terminate(xge_hal_stats_t *stats);
874 
875 void __hal_stats_enable(xge_hal_stats_t *stats);
876 
877 void __hal_stats_disable(xge_hal_stats_t *stats);
878 
879 void __hal_stats_soft_reset(xge_hal_device_h devh, int reset_all);
880 
881 /* ========================== STATS PUBLIC API ========================= */
882 
883 xge_hal_status_e xge_hal_stats_hw(xge_hal_device_h devh,
884 			xge_hal_stats_hw_info_t	**hw_info);
885 
886 xge_hal_status_e xge_hal_stats_device(xge_hal_device_h devh,
887 			xge_hal_stats_device_info_t **device_info);
888 
889 xge_hal_status_e xge_hal_stats_channel(xge_hal_channel_h channelh,
890 			xge_hal_stats_channel_info_t **channel_info);
891 
892 xge_hal_status_e xge_hal_stats_reset(xge_hal_device_h devh);
893 
894 #endif /* XGE_HAL_STATS_H */
895