1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 /* 28 * Copyright (c) 2002-2005 Neterion, Inc. 29 * All right Reserved. 30 * 31 * FileName : xge_osdep.h 32 * 33 * Description: OSPAL - Solaris 34 * 35 */ 36 37 #ifndef _SYS_XGE_OSDEP_H 38 #define _SYS_XGE_OSDEP_H 39 40 #pragma ident "%Z%%M% %I% %E% SMI" 41 42 #include <sys/ddi.h> 43 #include <sys/sunddi.h> 44 #include <sys/varargs.h> 45 #include <sys/atomic.h> 46 #include <sys/policy.h> 47 #include <sys/int_fmtio.h> 48 #include <sys/thread.h> 49 #include <sys/cpuvar.h> 50 51 #include <inet/common.h> 52 #include <inet/ip.h> 53 #include <inet/mi.h> 54 #include <inet/nd.h> 55 56 #ifdef __cplusplus 57 extern "C" { 58 #endif 59 60 /* ------------------------- includes and defines ------------------------- */ 61 62 #define XGE_HAL_TX_MULTI_POST_IRQ 1 63 #define XGE_HAL_TX_MULTI_RESERVE_IRQ 1 64 #define XGE_HAL_TX_MULTI_FREE_IRQ 1 65 #define XGE_HAL_RX_MULTI_FREE 1 66 #define XGE_HAL_DMA_DTR_CONSISTENT 1 67 #define XGE_HAL_DMA_STATS_STREAMING 1 68 69 #if defined(__sparc) 70 #define XGE_OS_DMA_REQUIRES_SYNC 1 71 #define XGELL_TX_NOMAP_COPY 1 72 #define XGE_HAL_ALIGN_XMIT 1 73 #endif 74 75 #ifdef _BIG_ENDIAN 76 #define XGE_OS_HOST_BIG_ENDIAN 1 77 #else 78 #define XGE_OS_HOST_LITTLE_ENDIAN 1 79 #endif 80 81 #if defined(_LP64) 82 #define XGE_OS_PLATFORM_64BIT 1 83 #else 84 #define XGE_OS_PLATFORM_32BIT 1 85 #endif 86 87 #define XGE_OS_HAS_SNPRINTF 1 88 89 /* ---------------------- fixed size primitive types ----------------------- */ 90 91 #define u8 uint8_t 92 #define u16 uint16_t 93 #define u32 uint32_t 94 #define u64 uint64_t 95 typedef u64 dma_addr_t; 96 #define ulong_t ulong_t 97 #define ptrdiff_t ptrdiff_t 98 typedef kmutex_t spinlock_t; 99 typedef dev_info_t *pci_dev_h; 100 typedef ddi_acc_handle_t pci_reg_h; 101 typedef ddi_acc_handle_t pci_cfg_h; 102 typedef ddi_iblock_cookie_t pci_irq_h; 103 typedef ddi_dma_handle_t pci_dma_h; 104 typedef ddi_acc_handle_t pci_dma_acc_h; 105 106 /* -------------------------- "libc" functionality ------------------------- */ 107 108 #define xge_os_strcpy (void) strcpy 109 #define xge_os_strlen strlen 110 #define xge_os_snprintf snprintf 111 #define xge_os_memzero(addr, size) bzero(addr, size) 112 #define xge_os_memcpy(dst, src, size) bcopy(src, dst, size) 113 #define xge_os_memcmp(src1, src2, size) bcmp(src1, src2, size) 114 115 #ifdef __GNUC__ 116 #define xge_os_printf(fmt...) cmn_err(CE_CONT, fmt) 117 #define xge_os_sprintf(buf, fmt...) strlen(sprintf(buf, fmt)) 118 #else 119 #define xge_os_vaprintf(fmt) { \ 120 va_list va; \ 121 va_start(va, fmt); \ 122 vcmn_err(CE_CONT, fmt, va); \ 123 va_end(va); \ 124 } 125 126 static inline void xge_os_printf(char *fmt, ...) { 127 xge_os_vaprintf(fmt); 128 } 129 130 #define xge_os_vasprintf(buf, fmt) { \ 131 va_list va; \ 132 va_start(va, fmt); \ 133 (void) vsprintf(buf, fmt, va); \ 134 va_end(va); \ 135 } 136 137 static inline int xge_os_sprintf(char *buf, char *fmt, ...) { 138 xge_os_vasprintf(buf, fmt); 139 return (strlen(buf)); 140 } 141 #endif 142 143 #define xge_os_timestamp(buf) { \ 144 todinfo_t todinfo = utc_to_tod(ddi_get_time()); \ 145 (void) xge_os_sprintf(buf, "%2d/%2d/%2d.%2d:%2d:%2d: ", \ 146 todinfo.tod_day, todinfo.tod_month, \ 147 (1970 + todinfo.tod_year - 70), \ 148 todinfo.tod_hour, todinfo.tod_min, todinfo.tod_sec); \ 149 } 150 151 #define xge_os_println xge_os_printf 152 153 /* -------------------- synchronization primitives ------------------------- */ 154 155 #define xge_os_spin_lock_init(lockp, ctxh) \ 156 mutex_init(lockp, NULL, MUTEX_DRIVER, NULL) 157 #define xge_os_spin_lock_init_irq(lockp, irqh) \ 158 mutex_init(lockp, NULL, MUTEX_DRIVER, irqh) 159 #define xge_os_spin_lock_destroy(lockp, cthx) \ 160 (cthx = cthx, mutex_destroy(lockp)) 161 #define xge_os_spin_lock_destroy_irq(lockp, cthx) \ 162 (cthx = cthx, mutex_destroy(lockp)) 163 #define xge_os_spin_lock(lockp) mutex_enter(lockp) 164 #define xge_os_spin_unlock(lockp) mutex_exit(lockp) 165 #define xge_os_spin_lock_irq(lockp, flags) (flags = flags, mutex_enter(lockp)) 166 #define xge_os_spin_unlock_irq(lockp, flags) mutex_exit(lockp) 167 168 /* x86 arch will never re-order writes, Sparc can */ 169 #define xge_os_wmb() membar_producer() 170 171 #define xge_os_udelay(us) drv_usecwait(us) 172 #define xge_os_mdelay(ms) drv_usecwait(ms * 1000) 173 174 #define xge_os_cmpxchg(targetp, cmp, newval) \ 175 sizeof (*(targetp)) == 4 ? \ 176 cas32((uint32_t *)targetp, cmp, newval) : \ 177 cas64((uint64_t *)targetp, cmp, newval) 178 179 /* ------------------------- misc primitives ------------------------------- */ 180 181 #define xge_os_unlikely(x) (x) 182 #define xge_os_prefetch(a) (a = a) 183 #define xge_os_prefetchw 184 #ifdef __GNUC__ 185 #define xge_os_bug(fmt...) cmn_err(CE_PANIC, fmt) 186 #else 187 static inline void xge_os_bug(char *fmt, ...) { 188 va_list ap; 189 190 va_start(ap, fmt); 191 vcmn_err(CE_PANIC, fmt, ap); 192 va_end(ap); 193 } 194 #endif 195 196 /* -------------------------- compiler stuffs ------------------------------ */ 197 198 #if defined(__i386) 199 #define __xge_os_cacheline_size 64 /* L1-cache line size: x86_64 */ 200 #else 201 #define __xge_os_cacheline_size 64 /* L1-cache line size: sparcv9 */ 202 #endif 203 204 #ifdef __GNUC__ 205 #define __xge_os_attr_cacheline_aligned \ 206 __attribute__((__aligned__(__xge_os_cacheline_size))) 207 #else 208 #define __xge_os_attr_cacheline_aligned 209 #endif 210 211 /* ---------------------- memory primitives -------------------------------- */ 212 213 static inline void *__xge_os_malloc(pci_dev_h pdev, unsigned long size, 214 char *file, int line) 215 { 216 void *vaddr = kmem_alloc(size, KM_SLEEP); 217 218 XGE_OS_MEMORY_CHECK_MALLOC(vaddr, size, file, line); 219 return (vaddr); 220 } 221 222 static inline void xge_os_free(pci_dev_h pdev, const void *vaddr, 223 unsigned long size) 224 { 225 XGE_OS_MEMORY_CHECK_FREE(vaddr, size); 226 kmem_free((void*)vaddr, size); 227 } 228 229 #define xge_os_malloc(pdev, size) \ 230 __xge_os_malloc(pdev, size, __FILE__, __LINE__) 231 232 static inline void *__xge_os_dma_malloc(pci_dev_h pdev, unsigned long size, 233 int dma_flags, pci_dma_h *p_dmah, pci_dma_acc_h *p_dma_acch, char *file, 234 int line) 235 { 236 void *vaddr; 237 int ret; 238 size_t real_size; 239 extern ddi_device_acc_attr_t *p_xge_dev_attr; 240 extern struct ddi_dma_attr *p_hal_dma_attr; 241 extern struct ddi_dma_attr *p_hal_dma_attr_aligned; 242 243 ret = ddi_dma_alloc_handle(pdev, 244 (dma_flags & XGE_OS_DMA_CACHELINE_ALIGNED ? 245 p_hal_dma_attr_aligned : p_hal_dma_attr), 246 DDI_DMA_DONTWAIT, 0, p_dmah); 247 if (ret != DDI_SUCCESS) { 248 return (NULL); 249 } 250 251 ret = ddi_dma_mem_alloc(*p_dmah, size, p_xge_dev_attr, 252 (dma_flags & XGE_OS_DMA_CONSISTENT ? 253 DDI_DMA_CONSISTENT : DDI_DMA_STREAMING), 254 DDI_DMA_DONTWAIT, 0, (caddr_t *)&vaddr, &real_size, p_dma_acch); 255 if (ret != DDI_SUCCESS) { 256 ddi_dma_free_handle(p_dmah); 257 return (NULL); 258 } 259 260 if (size > real_size) { 261 ddi_dma_mem_free(p_dma_acch); 262 ddi_dma_free_handle(p_dmah); 263 return (NULL); 264 } 265 266 XGE_OS_MEMORY_CHECK_MALLOC(vaddr, size, file, line); 267 268 return (vaddr); 269 } 270 271 #define xge_os_dma_malloc(pdev, size, dma_flags, p_dmah, p_dma_acch) \ 272 __xge_os_dma_malloc(pdev, size, dma_flags, p_dmah, p_dma_acch, \ 273 __FILE__, __LINE__) 274 275 static inline void xge_os_dma_free(pci_dev_h pdev, const void *vaddr, int size, 276 pci_dma_acc_h *p_dma_acch, pci_dma_h *p_dmah) 277 { 278 XGE_OS_MEMORY_CHECK_FREE(vaddr, 0); 279 ddi_dma_mem_free(p_dma_acch); 280 ddi_dma_free_handle(p_dmah); 281 } 282 283 284 /* --------------------------- pci primitives ------------------------------ */ 285 286 #define xge_os_pci_read8(pdev, cfgh, where, val) \ 287 (*(val) = pci_config_get8(cfgh, where)) 288 289 #define xge_os_pci_write8(pdev, cfgh, where, val) \ 290 pci_config_put8(cfgh, where, val) 291 292 #define xge_os_pci_read16(pdev, cfgh, where, val) \ 293 (*(val) = pci_config_get16(cfgh, where)) 294 295 #define xge_os_pci_write16(pdev, cfgh, where, val) \ 296 pci_config_put16(cfgh, where, val) 297 298 #define xge_os_pci_read32(pdev, cfgh, where, val) \ 299 (*(val) = pci_config_get32(cfgh, where)) 300 301 #define xge_os_pci_write32(pdev, cfgh, where, val) \ 302 pci_config_put32(cfgh, where, val) 303 304 /* --------------------------- io primitives ------------------------------- */ 305 306 #define xge_os_pio_mem_read8(pdev, regh, addr) \ 307 (ddi_get8(regh, (uint8_t *)(addr))) 308 309 #define xge_os_pio_mem_write8(pdev, regh, val, addr) \ 310 (ddi_put8(regh, (uint8_t *)(addr), val)) 311 312 #define xge_os_pio_mem_read16(pdev, regh, addr) \ 313 (ddi_get16(regh, (uint16_t *)(addr))) 314 315 #define xge_os_pio_mem_write16(pdev, regh, val, addr) \ 316 (ddi_put16(regh, (uint16_t *)(addr), val)) 317 318 #define xge_os_pio_mem_read32(pdev, regh, addr) \ 319 (ddi_get32(regh, (uint32_t *)(addr))) 320 321 #define xge_os_pio_mem_write32(pdev, regh, val, addr) \ 322 (ddi_put32(regh, (uint32_t *)(addr), val)) 323 324 #define xge_os_pio_mem_read64(pdev, regh, addr) \ 325 (ddi_get64(regh, (uint64_t *)(addr))) 326 327 #define xge_os_pio_mem_write64(pdev, regh, val, addr) \ 328 (ddi_put64(regh, (uint64_t *)(addr), val)) 329 330 #define xge_os_flush_bridge xge_os_pio_mem_read64 331 332 /* --------------------------- dma primitives ----------------------------- */ 333 334 #define XGE_OS_DMA_DIR_TODEVICE DDI_DMA_SYNC_FORDEV 335 #define XGE_OS_DMA_DIR_FROMDEVICE DDI_DMA_SYNC_FORKERNEL 336 #define XGE_OS_DMA_DIR_BIDIRECTIONAL -1 337 #if defined(__x86) 338 #define XGE_OS_DMA_USES_IOMMU 0 339 #else 340 #define XGE_OS_DMA_USES_IOMMU 1 341 #endif 342 343 #define XGE_OS_INVALID_DMA_ADDR ((dma_addr_t)0) 344 345 static inline dma_addr_t xge_os_dma_map(pci_dev_h pdev, pci_dma_h dmah, 346 void *vaddr, size_t size, int dir, int dma_flags) { 347 int ret; 348 uint_t flags; 349 uint_t ncookies; 350 ddi_dma_cookie_t dma_cookie; 351 352 switch (dir) { 353 case XGE_OS_DMA_DIR_TODEVICE: 354 flags = DDI_DMA_WRITE; 355 break; 356 case XGE_OS_DMA_DIR_FROMDEVICE: 357 flags = DDI_DMA_READ; 358 break; 359 case XGE_OS_DMA_DIR_BIDIRECTIONAL: 360 flags = DDI_DMA_RDWR; 361 break; 362 default: 363 return (0); 364 } 365 366 flags |= (dma_flags & XGE_OS_DMA_CONSISTENT) ? 367 DDI_DMA_CONSISTENT : DDI_DMA_STREAMING; 368 369 ret = ddi_dma_addr_bind_handle(dmah, NULL, vaddr, size, flags, 370 DDI_DMA_SLEEP, 0, &dma_cookie, &ncookies); 371 if (ret != DDI_SUCCESS) { 372 return (0); 373 } 374 375 if (ncookies != 1 || dma_cookie.dmac_size < size) { 376 (void) ddi_dma_unbind_handle(dmah); 377 return (0); 378 } 379 380 return (dma_cookie.dmac_laddress); 381 } 382 383 static inline void xge_os_dma_unmap(pci_dev_h pdev, pci_dma_h dmah, 384 dma_addr_t dma_addr, size_t size, int dir) 385 { 386 (void) ddi_dma_unbind_handle(dmah); 387 } 388 389 static inline void xge_os_dma_sync(pci_dev_h pdev, pci_dma_h dmah, 390 dma_addr_t dma_addr, u64 dma_offset, size_t length, int dir) 391 { 392 (void) ddi_dma_sync(dmah, dma_offset, length, dir); 393 } 394 395 #ifdef __cplusplus 396 } 397 #endif 398 399 #endif /* _SYS_XGE_OSDEP_H */ 400