1 /* 2 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 /* 7 * Copyright (c) 2006 8 * Damien Bergamini <damien.bergamini@free.fr> 9 * 10 * Permission to use, copy, modify, and distribute this software for any 11 * purpose with or without fee is hereby granted, provided that the above 12 * copyright notice and this permission notice appear in all copies. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 15 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 16 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 17 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 18 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 19 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 20 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 21 */ 22 23 /* 24 * Driver for Intel PRO/Wireless 3945ABG 802.11 network adapters. 25 */ 26 27 #include <sys/types.h> 28 #include <sys/byteorder.h> 29 #include <sys/conf.h> 30 #include <sys/cmn_err.h> 31 #include <sys/stat.h> 32 #include <sys/ddi.h> 33 #include <sys/sunddi.h> 34 #include <sys/strsubr.h> 35 #include <sys/ethernet.h> 36 #include <inet/common.h> 37 #include <inet/nd.h> 38 #include <inet/mi.h> 39 #include <sys/note.h> 40 #include <sys/stream.h> 41 #include <sys/strsun.h> 42 #include <sys/modctl.h> 43 #include <sys/devops.h> 44 #include <sys/dlpi.h> 45 #include <sys/mac.h> 46 #include <sys/mac_wifi.h> 47 #include <sys/net80211.h> 48 #include <sys/net80211_proto.h> 49 #include <sys/varargs.h> 50 #include <sys/policy.h> 51 #include <sys/pci.h> 52 53 #include "wpireg.h" 54 #include "wpivar.h" 55 #include <inet/wifi_ioctl.h> 56 57 #ifdef DEBUG 58 #define WPI_DEBUG_80211 (1 << 0) 59 #define WPI_DEBUG_CMD (1 << 1) 60 #define WPI_DEBUG_DMA (1 << 2) 61 #define WPI_DEBUG_EEPROM (1 << 3) 62 #define WPI_DEBUG_FW (1 << 4) 63 #define WPI_DEBUG_HW (1 << 5) 64 #define WPI_DEBUG_INTR (1 << 6) 65 #define WPI_DEBUG_MRR (1 << 7) 66 #define WPI_DEBUG_PIO (1 << 8) 67 #define WPI_DEBUG_RX (1 << 9) 68 #define WPI_DEBUG_SCAN (1 << 10) 69 #define WPI_DEBUG_TX (1 << 11) 70 #define WPI_DEBUG_RATECTL (1 << 12) 71 #define WPI_DEBUG_RADIO (1 << 13) 72 #define WPI_DEBUG_RESUME (1 << 14) 73 uint32_t wpi_dbg_flags = 0; 74 #define WPI_DBG(x) \ 75 wpi_dbg x 76 #else 77 #define WPI_DBG(x) 78 #endif 79 80 static void *wpi_soft_state_p = NULL; 81 static uint8_t wpi_fw_bin [] = { 82 #include "fw-wpi/ipw3945.ucode.hex" 83 }; 84 85 /* DMA attributes for a shared page */ 86 static ddi_dma_attr_t sh_dma_attr = { 87 DMA_ATTR_V0, /* version of this structure */ 88 0, /* lowest usable address */ 89 0xffffffffU, /* highest usable address */ 90 0xffffffffU, /* maximum DMAable byte count */ 91 0x1000, /* alignment in bytes */ 92 0x1000, /* burst sizes (any?) */ 93 1, /* minimum transfer */ 94 0xffffffffU, /* maximum transfer */ 95 0xffffffffU, /* maximum segment length */ 96 1, /* maximum number of segments */ 97 1, /* granularity */ 98 0, /* flags (reserved) */ 99 }; 100 101 /* DMA attributes for a ring descriptor */ 102 static ddi_dma_attr_t ring_desc_dma_attr = { 103 DMA_ATTR_V0, /* version of this structure */ 104 0, /* lowest usable address */ 105 0xffffffffU, /* highest usable address */ 106 0xffffffffU, /* maximum DMAable byte count */ 107 0x4000, /* alignment in bytes */ 108 0x100, /* burst sizes (any?) */ 109 1, /* minimum transfer */ 110 0xffffffffU, /* maximum transfer */ 111 0xffffffffU, /* maximum segment length */ 112 1, /* maximum number of segments */ 113 1, /* granularity */ 114 0, /* flags (reserved) */ 115 }; 116 117 118 /* DMA attributes for a tx cmd */ 119 static ddi_dma_attr_t tx_cmd_dma_attr = { 120 DMA_ATTR_V0, /* version of this structure */ 121 0, /* lowest usable address */ 122 0xffffffffU, /* highest usable address */ 123 0xffffffffU, /* maximum DMAable byte count */ 124 4, /* alignment in bytes */ 125 0x100, /* burst sizes (any?) */ 126 1, /* minimum transfer */ 127 0xffffffffU, /* maximum transfer */ 128 0xffffffffU, /* maximum segment length */ 129 1, /* maximum number of segments */ 130 1, /* granularity */ 131 0, /* flags (reserved) */ 132 }; 133 134 /* DMA attributes for a rx buffer */ 135 static ddi_dma_attr_t rx_buffer_dma_attr = { 136 DMA_ATTR_V0, /* version of this structure */ 137 0, /* lowest usable address */ 138 0xffffffffU, /* highest usable address */ 139 0xffffffffU, /* maximum DMAable byte count */ 140 1, /* alignment in bytes */ 141 0x100, /* burst sizes (any?) */ 142 1, /* minimum transfer */ 143 0xffffffffU, /* maximum transfer */ 144 0xffffffffU, /* maximum segment length */ 145 1, /* maximum number of segments */ 146 1, /* granularity */ 147 0, /* flags (reserved) */ 148 }; 149 150 /* 151 * DMA attributes for a tx buffer. 152 * the maximum number of segments is 4 for the hardware. 153 * now all the wifi drivers put the whole frame in a single 154 * descriptor, so we define the maximum number of segments 4, 155 * just the same as the rx_buffer. we consider leverage the HW 156 * ability in the future, that is why we don't define rx and tx 157 * buffer_dma_attr as the same. 158 */ 159 static ddi_dma_attr_t tx_buffer_dma_attr = { 160 DMA_ATTR_V0, /* version of this structure */ 161 0, /* lowest usable address */ 162 0xffffffffU, /* highest usable address */ 163 0xffffffffU, /* maximum DMAable byte count */ 164 1, /* alignment in bytes */ 165 0x100, /* burst sizes (any?) */ 166 1, /* minimum transfer */ 167 0xffffffffU, /* maximum transfer */ 168 0xffffffffU, /* maximum segment length */ 169 1, /* maximum number of segments */ 170 1, /* granularity */ 171 0, /* flags (reserved) */ 172 }; 173 174 /* DMA attributes for a load firmware */ 175 static ddi_dma_attr_t fw_buffer_dma_attr = { 176 DMA_ATTR_V0, /* version of this structure */ 177 0, /* lowest usable address */ 178 0xffffffffU, /* highest usable address */ 179 0x7fffffff, /* maximum DMAable byte count */ 180 4, /* alignment in bytes */ 181 0x100, /* burst sizes (any?) */ 182 1, /* minimum transfer */ 183 0xffffffffU, /* maximum transfer */ 184 0xffffffffU, /* maximum segment length */ 185 4, /* maximum number of segments */ 186 1, /* granularity */ 187 0, /* flags (reserved) */ 188 }; 189 190 /* regs access attributes */ 191 static ddi_device_acc_attr_t wpi_reg_accattr = { 192 DDI_DEVICE_ATTR_V0, 193 DDI_STRUCTURE_LE_ACC, 194 DDI_STRICTORDER_ACC, 195 DDI_DEFAULT_ACC 196 }; 197 198 /* DMA access attributes */ 199 static ddi_device_acc_attr_t wpi_dma_accattr = { 200 DDI_DEVICE_ATTR_V0, 201 DDI_NEVERSWAP_ACC, 202 DDI_STRICTORDER_ACC, 203 DDI_DEFAULT_ACC 204 }; 205 206 static int wpi_ring_init(wpi_sc_t *); 207 static void wpi_ring_free(wpi_sc_t *); 208 static int wpi_alloc_shared(wpi_sc_t *); 209 static void wpi_free_shared(wpi_sc_t *); 210 static int wpi_alloc_fw_dma(wpi_sc_t *); 211 static void wpi_free_fw_dma(wpi_sc_t *); 212 static int wpi_alloc_rx_ring(wpi_sc_t *); 213 static void wpi_reset_rx_ring(wpi_sc_t *); 214 static void wpi_free_rx_ring(wpi_sc_t *); 215 static int wpi_alloc_tx_ring(wpi_sc_t *, wpi_tx_ring_t *, int, int); 216 static void wpi_reset_tx_ring(wpi_sc_t *, wpi_tx_ring_t *); 217 static void wpi_free_tx_ring(wpi_sc_t *, wpi_tx_ring_t *); 218 219 static ieee80211_node_t *wpi_node_alloc(ieee80211com_t *); 220 static void wpi_node_free(ieee80211_node_t *); 221 static int wpi_newstate(ieee80211com_t *, enum ieee80211_state, int); 222 static int wpi_key_set(ieee80211com_t *, const struct ieee80211_key *, 223 const uint8_t mac[IEEE80211_ADDR_LEN]); 224 static void wpi_mem_lock(wpi_sc_t *); 225 static void wpi_mem_unlock(wpi_sc_t *); 226 static uint32_t wpi_mem_read(wpi_sc_t *, uint16_t); 227 static void wpi_mem_write(wpi_sc_t *, uint16_t, uint32_t); 228 static void wpi_mem_write_region_4(wpi_sc_t *, uint16_t, 229 const uint32_t *, int); 230 static uint16_t wpi_read_prom_word(wpi_sc_t *, uint32_t); 231 static int wpi_load_microcode(wpi_sc_t *); 232 static int wpi_load_firmware(wpi_sc_t *, uint32_t); 233 static void wpi_rx_intr(wpi_sc_t *, wpi_rx_desc_t *, 234 wpi_rx_data_t *); 235 static void wpi_tx_intr(wpi_sc_t *, wpi_rx_desc_t *, 236 wpi_rx_data_t *); 237 static void wpi_cmd_intr(wpi_sc_t *, wpi_rx_desc_t *); 238 static uint_t wpi_intr(caddr_t); 239 static uint_t wpi_notif_softintr(caddr_t); 240 static uint8_t wpi_plcp_signal(int); 241 static void wpi_read_eeprom(wpi_sc_t *); 242 static int wpi_cmd(wpi_sc_t *, int, const void *, int, int); 243 static int wpi_mrr_setup(wpi_sc_t *); 244 static void wpi_set_led(wpi_sc_t *, uint8_t, uint8_t, uint8_t); 245 static int wpi_auth(wpi_sc_t *); 246 static int wpi_scan(wpi_sc_t *); 247 static int wpi_config(wpi_sc_t *); 248 static void wpi_stop_master(wpi_sc_t *); 249 static int wpi_power_up(wpi_sc_t *); 250 static int wpi_reset(wpi_sc_t *); 251 static void wpi_hw_config(wpi_sc_t *); 252 static int wpi_init(wpi_sc_t *); 253 static void wpi_stop(wpi_sc_t *); 254 static void wpi_amrr_init(wpi_amrr_t *); 255 static void wpi_amrr_timeout(wpi_sc_t *); 256 static void wpi_amrr_ratectl(void *, ieee80211_node_t *); 257 258 static int wpi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 259 static int wpi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 260 261 /* 262 * GLD specific operations 263 */ 264 static int wpi_m_stat(void *arg, uint_t stat, uint64_t *val); 265 static int wpi_m_start(void *arg); 266 static void wpi_m_stop(void *arg); 267 static int wpi_m_unicst(void *arg, const uint8_t *macaddr); 268 static int wpi_m_multicst(void *arg, boolean_t add, const uint8_t *m); 269 static int wpi_m_promisc(void *arg, boolean_t on); 270 static mblk_t *wpi_m_tx(void *arg, mblk_t *mp); 271 static void wpi_m_ioctl(void *arg, queue_t *wq, mblk_t *mp); 272 static int wpi_m_setprop(void *arg, const char *pr_name, 273 mac_prop_id_t wldp_pr_num, uint_t wldp_length, const void *wldp_buf); 274 static int wpi_m_getprop(void *arg, const char *pr_name, 275 mac_prop_id_t wldp_pr_num, uint_t pr_flags, uint_t wldp_lenth, 276 void *wldp_buf); 277 static void wpi_destroy_locks(wpi_sc_t *sc); 278 static int wpi_send(ieee80211com_t *ic, mblk_t *mp, uint8_t type); 279 static void wpi_thread(wpi_sc_t *sc); 280 281 /* 282 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 283 */ 284 static const struct ieee80211_rateset wpi_rateset_11b = 285 { 4, { 2, 4, 11, 22 } }; 286 287 static const struct ieee80211_rateset wpi_rateset_11g = 288 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 289 290 static const uint8_t wpi_ridx_to_signal[] = { 291 /* OFDM: IEEE Std 802.11a-1999, pp. 14 Table 80 */ 292 /* R1-R4 (ral/ural is R4-R1) */ 293 0xd, 0xf, 0x5, 0x7, 0x9, 0xb, 0x1, 0x3, 294 /* CCK: device-dependent */ 295 10, 20, 55, 110 296 }; 297 298 /* 299 * For mfthread only 300 */ 301 extern pri_t minclsyspri; 302 303 /* 304 * Module Loading Data & Entry Points 305 */ 306 DDI_DEFINE_STREAM_OPS(wpi_devops, nulldev, nulldev, wpi_attach, 307 wpi_detach, nodev, NULL, D_MP, NULL, ddi_quiesce_not_supported); 308 309 static struct modldrv wpi_modldrv = { 310 &mod_driverops, 311 "Intel(R) PRO/Wireless 3945ABG driver", 312 &wpi_devops 313 }; 314 315 static struct modlinkage wpi_modlinkage = { 316 MODREV_1, 317 &wpi_modldrv, 318 NULL 319 }; 320 321 int 322 _init(void) 323 { 324 int status; 325 326 status = ddi_soft_state_init(&wpi_soft_state_p, 327 sizeof (wpi_sc_t), 1); 328 if (status != DDI_SUCCESS) 329 return (status); 330 331 mac_init_ops(&wpi_devops, "wpi"); 332 status = mod_install(&wpi_modlinkage); 333 if (status != DDI_SUCCESS) { 334 mac_fini_ops(&wpi_devops); 335 ddi_soft_state_fini(&wpi_soft_state_p); 336 } 337 338 return (status); 339 } 340 341 int 342 _fini(void) 343 { 344 int status; 345 346 status = mod_remove(&wpi_modlinkage); 347 if (status == DDI_SUCCESS) { 348 mac_fini_ops(&wpi_devops); 349 ddi_soft_state_fini(&wpi_soft_state_p); 350 } 351 352 return (status); 353 } 354 355 int 356 _info(struct modinfo *mip) 357 { 358 return (mod_info(&wpi_modlinkage, mip)); 359 } 360 361 /* 362 * Mac Call Back entries 363 */ 364 mac_callbacks_t wpi_m_callbacks = { 365 MC_IOCTL | MC_SETPROP | MC_GETPROP, 366 wpi_m_stat, 367 wpi_m_start, 368 wpi_m_stop, 369 wpi_m_promisc, 370 wpi_m_multicst, 371 wpi_m_unicst, 372 wpi_m_tx, 373 NULL, 374 wpi_m_ioctl, 375 NULL, 376 NULL, 377 NULL, 378 wpi_m_setprop, 379 wpi_m_getprop 380 }; 381 382 #ifdef DEBUG 383 void 384 wpi_dbg(uint32_t flags, const char *fmt, ...) 385 { 386 va_list ap; 387 388 if (flags & wpi_dbg_flags) { 389 va_start(ap, fmt); 390 vcmn_err(CE_NOTE, fmt, ap); 391 va_end(ap); 392 } 393 } 394 #endif 395 /* 396 * device operations 397 */ 398 int 399 wpi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 400 { 401 wpi_sc_t *sc; 402 ddi_acc_handle_t cfg_handle; 403 caddr_t cfg_base; 404 ieee80211com_t *ic; 405 int instance, err, i; 406 char strbuf[32]; 407 wifi_data_t wd = { 0 }; 408 mac_register_t *macp; 409 410 switch (cmd) { 411 case DDI_ATTACH: 412 break; 413 case DDI_RESUME: 414 sc = ddi_get_soft_state(wpi_soft_state_p, 415 ddi_get_instance(dip)); 416 ASSERT(sc != NULL); 417 mutex_enter(&sc->sc_glock); 418 sc->sc_flags &= ~WPI_F_SUSPEND; 419 mutex_exit(&sc->sc_glock); 420 if (sc->sc_flags & WPI_F_RUNNING) { 421 (void) wpi_init(sc); 422 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1); 423 } 424 WPI_DBG((WPI_DEBUG_RESUME, "wpi: resume \n")); 425 return (DDI_SUCCESS); 426 default: 427 err = DDI_FAILURE; 428 goto attach_fail1; 429 } 430 431 instance = ddi_get_instance(dip); 432 err = ddi_soft_state_zalloc(wpi_soft_state_p, instance); 433 if (err != DDI_SUCCESS) { 434 cmn_err(CE_WARN, 435 "wpi_attach(): failed to allocate soft state\n"); 436 goto attach_fail1; 437 } 438 sc = ddi_get_soft_state(wpi_soft_state_p, instance); 439 sc->sc_dip = dip; 440 441 err = ddi_regs_map_setup(dip, 0, &cfg_base, 0, 0, 442 &wpi_reg_accattr, &cfg_handle); 443 if (err != DDI_SUCCESS) { 444 cmn_err(CE_WARN, 445 "wpi_attach(): failed to map config spaces regs\n"); 446 goto attach_fail2; 447 } 448 sc->sc_rev = ddi_get8(cfg_handle, 449 (uint8_t *)(cfg_base + PCI_CONF_REVID)); 450 ddi_put8(cfg_handle, (uint8_t *)(cfg_base + 0x41), 0); 451 sc->sc_clsz = ddi_get16(cfg_handle, 452 (uint16_t *)(cfg_base + PCI_CONF_CACHE_LINESZ)); 453 ddi_regs_map_free(&cfg_handle); 454 if (!sc->sc_clsz) 455 sc->sc_clsz = 16; 456 sc->sc_clsz = (sc->sc_clsz << 2); 457 sc->sc_dmabuf_sz = roundup(0x1000 + sizeof (struct ieee80211_frame) + 458 IEEE80211_MTU + IEEE80211_CRC_LEN + 459 (IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN + 460 IEEE80211_WEP_CRCLEN), sc->sc_clsz); 461 /* 462 * Map operating registers 463 */ 464 err = ddi_regs_map_setup(dip, 1, &sc->sc_base, 465 0, 0, &wpi_reg_accattr, &sc->sc_handle); 466 if (err != DDI_SUCCESS) { 467 cmn_err(CE_WARN, 468 "wpi_attach(): failed to map device regs\n"); 469 goto attach_fail2; 470 } 471 472 /* 473 * Allocate shared page. 474 */ 475 err = wpi_alloc_shared(sc); 476 if (err != DDI_SUCCESS) { 477 cmn_err(CE_WARN, "failed to allocate shared page\n"); 478 goto attach_fail3; 479 } 480 481 /* 482 * Get the hw conf, including MAC address, then init all rings. 483 */ 484 wpi_read_eeprom(sc); 485 err = wpi_ring_init(sc); 486 if (err != DDI_SUCCESS) { 487 cmn_err(CE_WARN, "wpi_attach(): " 488 "failed to allocate and initialize ring\n"); 489 goto attach_fail4; 490 } 491 492 sc->sc_hdr = (const wpi_firmware_hdr_t *)wpi_fw_bin; 493 494 /* firmware image layout: |HDR|<--TEXT-->|<--DATA-->|<--BOOT-->| */ 495 sc->sc_text = (const char *)(sc->sc_hdr + 1); 496 sc->sc_data = sc->sc_text + LE_32(sc->sc_hdr->textsz); 497 sc->sc_boot = sc->sc_data + LE_32(sc->sc_hdr->datasz); 498 err = wpi_alloc_fw_dma(sc); 499 if (err != DDI_SUCCESS) { 500 cmn_err(CE_WARN, "wpi_attach(): " 501 "failed to allocate firmware dma\n"); 502 goto attach_fail5; 503 } 504 505 /* 506 * Initialize mutexs and condvars 507 */ 508 err = ddi_get_iblock_cookie(dip, 0, &sc->sc_iblk); 509 if (err != DDI_SUCCESS) { 510 cmn_err(CE_WARN, 511 "wpi_attach(): failed to do ddi_get_iblock_cookie()\n"); 512 goto attach_fail6; 513 } 514 mutex_init(&sc->sc_glock, NULL, MUTEX_DRIVER, sc->sc_iblk); 515 mutex_init(&sc->sc_tx_lock, NULL, MUTEX_DRIVER, sc->sc_iblk); 516 cv_init(&sc->sc_fw_cv, NULL, CV_DRIVER, NULL); 517 cv_init(&sc->sc_cmd_cv, NULL, CV_DRIVER, NULL); 518 cv_init(&sc->sc_tx_cv, "tx-ring", CV_DRIVER, NULL); 519 /* 520 * initialize the mfthread 521 */ 522 mutex_init(&sc->sc_mt_lock, NULL, MUTEX_DRIVER, 523 (void *) sc->sc_iblk); 524 cv_init(&sc->sc_mt_cv, NULL, CV_DRIVER, NULL); 525 sc->sc_mf_thread = NULL; 526 sc->sc_mf_thread_switch = 0; 527 /* 528 * Initialize the wifi part, which will be used by 529 * generic layer 530 */ 531 ic = &sc->sc_ic; 532 ic->ic_phytype = IEEE80211_T_OFDM; 533 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 534 ic->ic_state = IEEE80211_S_INIT; 535 ic->ic_maxrssi = 70; /* experimental number */ 536 ic->ic_caps = IEEE80211_C_SHPREAMBLE | IEEE80211_C_TXPMGT | 537 IEEE80211_C_PMGT | IEEE80211_C_SHSLOT; 538 539 /* 540 * use software WEP and TKIP, hardware CCMP; 541 */ 542 ic->ic_caps |= IEEE80211_C_AES_CCM; 543 ic->ic_caps |= IEEE80211_C_WPA; /* Support WPA/WPA2 */ 544 545 /* set supported .11b and .11g rates */ 546 ic->ic_sup_rates[IEEE80211_MODE_11B] = wpi_rateset_11b; 547 ic->ic_sup_rates[IEEE80211_MODE_11G] = wpi_rateset_11g; 548 549 /* set supported .11b and .11g channels (1 through 14) */ 550 for (i = 1; i <= 14; i++) { 551 ic->ic_sup_channels[i].ich_freq = 552 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 553 ic->ic_sup_channels[i].ich_flags = 554 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 555 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 556 } 557 ic->ic_ibss_chan = &ic->ic_sup_channels[0]; 558 ic->ic_xmit = wpi_send; 559 /* 560 * init Wifi layer 561 */ 562 ieee80211_attach(ic); 563 564 /* register WPA door */ 565 ieee80211_register_door(ic, ddi_driver_name(dip), 566 ddi_get_instance(dip)); 567 568 /* 569 * Override 80211 default routines 570 */ 571 sc->sc_newstate = ic->ic_newstate; 572 ic->ic_newstate = wpi_newstate; 573 ic->ic_node_alloc = wpi_node_alloc; 574 ic->ic_node_free = wpi_node_free; 575 ic->ic_crypto.cs_key_set = wpi_key_set; 576 ieee80211_media_init(ic); 577 /* 578 * initialize default tx key 579 */ 580 ic->ic_def_txkey = 0; 581 582 err = ddi_add_softintr(dip, DDI_SOFTINT_LOW, 583 &sc->sc_notif_softint_id, &sc->sc_iblk, NULL, wpi_notif_softintr, 584 (caddr_t)sc); 585 if (err != DDI_SUCCESS) { 586 cmn_err(CE_WARN, 587 "wpi_attach(): failed to do ddi_add_softintr()\n"); 588 goto attach_fail7; 589 } 590 591 /* 592 * Add the interrupt handler 593 */ 594 err = ddi_add_intr(dip, 0, &sc->sc_iblk, NULL, 595 wpi_intr, (caddr_t)sc); 596 if (err != DDI_SUCCESS) { 597 cmn_err(CE_WARN, 598 "wpi_attach(): failed to do ddi_add_intr()\n"); 599 goto attach_fail8; 600 } 601 602 /* 603 * Initialize pointer to device specific functions 604 */ 605 wd.wd_secalloc = WIFI_SEC_NONE; 606 wd.wd_opmode = ic->ic_opmode; 607 IEEE80211_ADDR_COPY(wd.wd_bssid, ic->ic_macaddr); 608 609 macp = mac_alloc(MAC_VERSION); 610 if (err != DDI_SUCCESS) { 611 cmn_err(CE_WARN, 612 "wpi_attach(): failed to do mac_alloc()\n"); 613 goto attach_fail9; 614 } 615 616 macp->m_type_ident = MAC_PLUGIN_IDENT_WIFI; 617 macp->m_driver = sc; 618 macp->m_dip = dip; 619 macp->m_src_addr = ic->ic_macaddr; 620 macp->m_callbacks = &wpi_m_callbacks; 621 macp->m_min_sdu = 0; 622 macp->m_max_sdu = IEEE80211_MTU; 623 macp->m_pdata = &wd; 624 macp->m_pdata_size = sizeof (wd); 625 626 /* 627 * Register the macp to mac 628 */ 629 err = mac_register(macp, &ic->ic_mach); 630 mac_free(macp); 631 if (err != DDI_SUCCESS) { 632 cmn_err(CE_WARN, 633 "wpi_attach(): failed to do mac_register()\n"); 634 goto attach_fail9; 635 } 636 637 /* 638 * Create minor node of type DDI_NT_NET_WIFI 639 */ 640 (void) snprintf(strbuf, sizeof (strbuf), "wpi%d", instance); 641 err = ddi_create_minor_node(dip, strbuf, S_IFCHR, 642 instance + 1, DDI_NT_NET_WIFI, 0); 643 if (err != DDI_SUCCESS) 644 cmn_err(CE_WARN, 645 "wpi_attach(): failed to do ddi_create_minor_node()\n"); 646 647 /* 648 * Notify link is down now 649 */ 650 mac_link_update(ic->ic_mach, LINK_STATE_DOWN); 651 652 /* 653 * create the mf thread to handle the link status, 654 * recovery fatal error, etc. 655 */ 656 657 sc->sc_mf_thread_switch = 1; 658 if (sc->sc_mf_thread == NULL) 659 sc->sc_mf_thread = thread_create((caddr_t)NULL, 0, 660 wpi_thread, sc, 0, &p0, TS_RUN, minclsyspri); 661 662 sc->sc_flags |= WPI_F_ATTACHED; 663 664 return (DDI_SUCCESS); 665 attach_fail9: 666 ddi_remove_intr(dip, 0, sc->sc_iblk); 667 attach_fail8: 668 ddi_remove_softintr(sc->sc_notif_softint_id); 669 sc->sc_notif_softint_id = NULL; 670 attach_fail7: 671 ieee80211_detach(ic); 672 wpi_destroy_locks(sc); 673 attach_fail6: 674 wpi_free_fw_dma(sc); 675 attach_fail5: 676 wpi_ring_free(sc); 677 attach_fail4: 678 wpi_free_shared(sc); 679 attach_fail3: 680 ddi_regs_map_free(&sc->sc_handle); 681 attach_fail2: 682 ddi_soft_state_free(wpi_soft_state_p, instance); 683 attach_fail1: 684 return (err); 685 } 686 687 int 688 wpi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 689 { 690 wpi_sc_t *sc; 691 int err; 692 693 sc = ddi_get_soft_state(wpi_soft_state_p, ddi_get_instance(dip)); 694 ASSERT(sc != NULL); 695 696 switch (cmd) { 697 case DDI_DETACH: 698 break; 699 case DDI_SUSPEND: 700 if (sc->sc_flags & WPI_F_RUNNING) { 701 wpi_stop(sc); 702 } 703 mutex_enter(&sc->sc_glock); 704 sc->sc_flags |= WPI_F_SUSPEND; 705 mutex_exit(&sc->sc_glock); 706 WPI_DBG((WPI_DEBUG_RESUME, "wpi: suspend \n")); 707 return (DDI_SUCCESS); 708 default: 709 return (DDI_FAILURE); 710 } 711 if (!(sc->sc_flags & WPI_F_ATTACHED)) 712 return (DDI_FAILURE); 713 714 err = mac_disable(sc->sc_ic.ic_mach); 715 if (err != DDI_SUCCESS) 716 return (err); 717 718 /* 719 * Destroy the mf_thread 720 */ 721 mutex_enter(&sc->sc_mt_lock); 722 sc->sc_mf_thread_switch = 0; 723 while (sc->sc_mf_thread != NULL) { 724 if (cv_wait_sig(&sc->sc_mt_cv, &sc->sc_mt_lock) == 0) 725 break; 726 } 727 mutex_exit(&sc->sc_mt_lock); 728 729 wpi_stop(sc); 730 731 /* 732 * Unregiste from the MAC layer subsystem 733 */ 734 (void) mac_unregister(sc->sc_ic.ic_mach); 735 736 mutex_enter(&sc->sc_glock); 737 wpi_free_fw_dma(sc); 738 wpi_ring_free(sc); 739 wpi_free_shared(sc); 740 mutex_exit(&sc->sc_glock); 741 742 ddi_remove_intr(dip, 0, sc->sc_iblk); 743 ddi_remove_softintr(sc->sc_notif_softint_id); 744 sc->sc_notif_softint_id = NULL; 745 746 /* 747 * detach ieee80211 748 */ 749 ieee80211_detach(&sc->sc_ic); 750 751 wpi_destroy_locks(sc); 752 753 ddi_regs_map_free(&sc->sc_handle); 754 ddi_remove_minor_node(dip, NULL); 755 ddi_soft_state_free(wpi_soft_state_p, ddi_get_instance(dip)); 756 757 return (DDI_SUCCESS); 758 } 759 760 static void 761 wpi_destroy_locks(wpi_sc_t *sc) 762 { 763 cv_destroy(&sc->sc_mt_cv); 764 mutex_destroy(&sc->sc_mt_lock); 765 cv_destroy(&sc->sc_tx_cv); 766 cv_destroy(&sc->sc_cmd_cv); 767 cv_destroy(&sc->sc_fw_cv); 768 mutex_destroy(&sc->sc_tx_lock); 769 mutex_destroy(&sc->sc_glock); 770 } 771 772 /* 773 * Allocate an area of memory and a DMA handle for accessing it 774 */ 775 static int 776 wpi_alloc_dma_mem(wpi_sc_t *sc, size_t memsize, ddi_dma_attr_t *dma_attr_p, 777 ddi_device_acc_attr_t *acc_attr_p, uint_t dma_flags, wpi_dma_t *dma_p) 778 { 779 caddr_t vaddr; 780 int err; 781 782 /* 783 * Allocate handle 784 */ 785 err = ddi_dma_alloc_handle(sc->sc_dip, dma_attr_p, 786 DDI_DMA_SLEEP, NULL, &dma_p->dma_hdl); 787 if (err != DDI_SUCCESS) { 788 dma_p->dma_hdl = NULL; 789 return (DDI_FAILURE); 790 } 791 792 /* 793 * Allocate memory 794 */ 795 err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, acc_attr_p, 796 dma_flags & (DDI_DMA_CONSISTENT | DDI_DMA_STREAMING), 797 DDI_DMA_SLEEP, NULL, &vaddr, &dma_p->alength, &dma_p->acc_hdl); 798 if (err != DDI_SUCCESS) { 799 ddi_dma_free_handle(&dma_p->dma_hdl); 800 dma_p->dma_hdl = NULL; 801 dma_p->acc_hdl = NULL; 802 return (DDI_FAILURE); 803 } 804 805 /* 806 * Bind the two together 807 */ 808 dma_p->mem_va = vaddr; 809 err = ddi_dma_addr_bind_handle(dma_p->dma_hdl, NULL, 810 vaddr, dma_p->alength, dma_flags, DDI_DMA_SLEEP, NULL, 811 &dma_p->cookie, &dma_p->ncookies); 812 if (err != DDI_DMA_MAPPED) { 813 ddi_dma_mem_free(&dma_p->acc_hdl); 814 ddi_dma_free_handle(&dma_p->dma_hdl); 815 dma_p->acc_hdl = NULL; 816 dma_p->dma_hdl = NULL; 817 return (DDI_FAILURE); 818 } 819 820 dma_p->nslots = ~0U; 821 dma_p->size = ~0U; 822 dma_p->token = ~0U; 823 dma_p->offset = 0; 824 return (DDI_SUCCESS); 825 } 826 827 /* 828 * Free one allocated area of DMAable memory 829 */ 830 static void 831 wpi_free_dma_mem(wpi_dma_t *dma_p) 832 { 833 if (dma_p->dma_hdl != NULL) { 834 if (dma_p->ncookies) { 835 (void) ddi_dma_unbind_handle(dma_p->dma_hdl); 836 dma_p->ncookies = 0; 837 } 838 ddi_dma_free_handle(&dma_p->dma_hdl); 839 dma_p->dma_hdl = NULL; 840 } 841 842 if (dma_p->acc_hdl != NULL) { 843 ddi_dma_mem_free(&dma_p->acc_hdl); 844 dma_p->acc_hdl = NULL; 845 } 846 } 847 848 /* 849 * Allocate an area of dma memory for firmware load. 850 * Idealy, this allocation should be a one time action, that is, 851 * the memory will be freed after the firmware is uploaded to the 852 * card. but since a recovery mechanism for the fatal firmware need 853 * reload the firmware, and re-allocate dma at run time may be failed, 854 * so we allocate it at attach and keep it in the whole lifecycle of 855 * the driver. 856 */ 857 static int 858 wpi_alloc_fw_dma(wpi_sc_t *sc) 859 { 860 int i, err = DDI_SUCCESS; 861 wpi_dma_t *dma_p; 862 863 err = wpi_alloc_dma_mem(sc, LE_32(sc->sc_hdr->textsz), 864 &fw_buffer_dma_attr, &wpi_dma_accattr, 865 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 866 &sc->sc_dma_fw_text); 867 dma_p = &sc->sc_dma_fw_text; 868 WPI_DBG((WPI_DEBUG_DMA, "ncookies:%d addr1:%x size1:%x\n", 869 dma_p->ncookies, dma_p->cookie.dmac_address, 870 dma_p->cookie.dmac_size)); 871 if (err != DDI_SUCCESS) { 872 cmn_err(CE_WARN, "wpi_alloc_fw_dma(): failed to alloc" 873 "text dma memory"); 874 goto fail; 875 } 876 for (i = 0; i < dma_p->ncookies; i++) { 877 sc->sc_fw_text_cookie[i] = dma_p->cookie; 878 ddi_dma_nextcookie(dma_p->dma_hdl, &dma_p->cookie); 879 } 880 err = wpi_alloc_dma_mem(sc, LE_32(sc->sc_hdr->datasz), 881 &fw_buffer_dma_attr, &wpi_dma_accattr, 882 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 883 &sc->sc_dma_fw_data); 884 dma_p = &sc->sc_dma_fw_data; 885 WPI_DBG((WPI_DEBUG_DMA, "ncookies:%d addr1:%x size1:%x\n", 886 dma_p->ncookies, dma_p->cookie.dmac_address, 887 dma_p->cookie.dmac_size)); 888 if (err != DDI_SUCCESS) { 889 cmn_err(CE_WARN, "wpi_alloc_fw_dma(): failed to alloc" 890 "data dma memory"); 891 goto fail; 892 } 893 for (i = 0; i < dma_p->ncookies; i++) { 894 sc->sc_fw_data_cookie[i] = dma_p->cookie; 895 ddi_dma_nextcookie(dma_p->dma_hdl, &dma_p->cookie); 896 } 897 fail: 898 return (err); 899 } 900 901 static void 902 wpi_free_fw_dma(wpi_sc_t *sc) 903 { 904 wpi_free_dma_mem(&sc->sc_dma_fw_text); 905 wpi_free_dma_mem(&sc->sc_dma_fw_data); 906 } 907 908 /* 909 * Allocate a shared page between host and NIC. 910 */ 911 static int 912 wpi_alloc_shared(wpi_sc_t *sc) 913 { 914 int err = DDI_SUCCESS; 915 916 /* must be aligned on a 4K-page boundary */ 917 err = wpi_alloc_dma_mem(sc, sizeof (wpi_shared_t), 918 &sh_dma_attr, &wpi_dma_accattr, 919 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 920 &sc->sc_dma_sh); 921 if (err != DDI_SUCCESS) 922 goto fail; 923 sc->sc_shared = (wpi_shared_t *)sc->sc_dma_sh.mem_va; 924 return (err); 925 926 fail: 927 wpi_free_shared(sc); 928 return (err); 929 } 930 931 static void 932 wpi_free_shared(wpi_sc_t *sc) 933 { 934 wpi_free_dma_mem(&sc->sc_dma_sh); 935 } 936 937 static int 938 wpi_alloc_rx_ring(wpi_sc_t *sc) 939 { 940 wpi_rx_ring_t *ring; 941 wpi_rx_data_t *data; 942 int i, err = DDI_SUCCESS; 943 944 ring = &sc->sc_rxq; 945 ring->cur = 0; 946 947 err = wpi_alloc_dma_mem(sc, WPI_RX_RING_COUNT * sizeof (uint32_t), 948 &ring_desc_dma_attr, &wpi_dma_accattr, 949 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 950 &ring->dma_desc); 951 if (err != DDI_SUCCESS) { 952 WPI_DBG((WPI_DEBUG_DMA, "dma alloc rx ring desc failed\n")); 953 goto fail; 954 } 955 ring->desc = (uint32_t *)ring->dma_desc.mem_va; 956 957 /* 958 * Allocate Rx buffers. 959 */ 960 for (i = 0; i < WPI_RX_RING_COUNT; i++) { 961 data = &ring->data[i]; 962 err = wpi_alloc_dma_mem(sc, sc->sc_dmabuf_sz, 963 &rx_buffer_dma_attr, &wpi_dma_accattr, 964 DDI_DMA_READ | DDI_DMA_STREAMING, 965 &data->dma_data); 966 if (err != DDI_SUCCESS) { 967 WPI_DBG((WPI_DEBUG_DMA, "dma alloc rx ring buf[%d] " 968 "failed\n", i)); 969 goto fail; 970 } 971 972 ring->desc[i] = LE_32(data->dma_data.cookie.dmac_address); 973 } 974 975 WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV); 976 977 return (err); 978 979 fail: 980 wpi_free_rx_ring(sc); 981 return (err); 982 } 983 984 static void 985 wpi_reset_rx_ring(wpi_sc_t *sc) 986 { 987 int ntries; 988 989 wpi_mem_lock(sc); 990 991 WPI_WRITE(sc, WPI_RX_CONFIG, 0); 992 for (ntries = 0; ntries < 2000; ntries++) { 993 if (WPI_READ(sc, WPI_RX_STATUS) & WPI_RX_IDLE) 994 break; 995 DELAY(1000); 996 } 997 #ifdef DEBUG 998 if (ntries == 2000) 999 WPI_DBG((WPI_DEBUG_DMA, "timeout resetting Rx ring\n")); 1000 #endif 1001 wpi_mem_unlock(sc); 1002 1003 sc->sc_rxq.cur = 0; 1004 } 1005 1006 static void 1007 wpi_free_rx_ring(wpi_sc_t *sc) 1008 { 1009 int i; 1010 1011 for (i = 0; i < WPI_RX_RING_COUNT; i++) { 1012 if (sc->sc_rxq.data[i].dma_data.dma_hdl) 1013 WPI_DMA_SYNC(sc->sc_rxq.data[i].dma_data, 1014 DDI_DMA_SYNC_FORCPU); 1015 wpi_free_dma_mem(&sc->sc_rxq.data[i].dma_data); 1016 } 1017 1018 if (sc->sc_rxq.dma_desc.dma_hdl) 1019 WPI_DMA_SYNC(sc->sc_rxq.dma_desc, DDI_DMA_SYNC_FORDEV); 1020 wpi_free_dma_mem(&sc->sc_rxq.dma_desc); 1021 } 1022 1023 static int 1024 wpi_alloc_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring, int count, int qid) 1025 { 1026 wpi_tx_data_t *data; 1027 wpi_tx_desc_t *desc_h; 1028 uint32_t paddr_desc_h; 1029 wpi_tx_cmd_t *cmd_h; 1030 uint32_t paddr_cmd_h; 1031 int i, err = DDI_SUCCESS; 1032 1033 ring->qid = qid; 1034 ring->count = count; 1035 ring->queued = 0; 1036 ring->cur = 0; 1037 1038 err = wpi_alloc_dma_mem(sc, count * sizeof (wpi_tx_desc_t), 1039 &ring_desc_dma_attr, &wpi_dma_accattr, 1040 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 1041 &ring->dma_desc); 1042 if (err != DDI_SUCCESS) { 1043 WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring desc[%d] failed\n", 1044 qid)); 1045 goto fail; 1046 } 1047 1048 /* update shared page with ring's base address */ 1049 sc->sc_shared->txbase[qid] = ring->dma_desc.cookie.dmac_address; 1050 1051 desc_h = (wpi_tx_desc_t *)ring->dma_desc.mem_va; 1052 paddr_desc_h = ring->dma_desc.cookie.dmac_address; 1053 1054 err = wpi_alloc_dma_mem(sc, count * sizeof (wpi_tx_cmd_t), 1055 &tx_cmd_dma_attr, &wpi_dma_accattr, 1056 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 1057 &ring->dma_cmd); 1058 if (err != DDI_SUCCESS) { 1059 WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring cmd[%d] failed\n", 1060 qid)); 1061 goto fail; 1062 } 1063 1064 cmd_h = (wpi_tx_cmd_t *)ring->dma_cmd.mem_va; 1065 paddr_cmd_h = ring->dma_cmd.cookie.dmac_address; 1066 1067 /* 1068 * Allocate Tx buffers. 1069 */ 1070 ring->data = kmem_zalloc(sizeof (wpi_tx_data_t) * count, KM_NOSLEEP); 1071 if (ring->data == NULL) { 1072 WPI_DBG((WPI_DEBUG_DMA, "could not allocate tx data slots\n")); 1073 goto fail; 1074 } 1075 1076 for (i = 0; i < count; i++) { 1077 data = &ring->data[i]; 1078 err = wpi_alloc_dma_mem(sc, sc->sc_dmabuf_sz, 1079 &tx_buffer_dma_attr, &wpi_dma_accattr, 1080 DDI_DMA_WRITE | DDI_DMA_STREAMING, 1081 &data->dma_data); 1082 if (err != DDI_SUCCESS) { 1083 WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring buf[%d] " 1084 "failed\n", i)); 1085 goto fail; 1086 } 1087 1088 data->desc = desc_h + i; 1089 data->paddr_desc = paddr_desc_h + 1090 ((uintptr_t)data->desc - (uintptr_t)desc_h); 1091 data->cmd = cmd_h + i; 1092 data->paddr_cmd = paddr_cmd_h + 1093 ((uintptr_t)data->cmd - (uintptr_t)cmd_h); 1094 } 1095 1096 return (err); 1097 1098 fail: 1099 if (ring->data) 1100 kmem_free(ring->data, sizeof (wpi_tx_data_t) * count); 1101 wpi_free_tx_ring(sc, ring); 1102 return (err); 1103 } 1104 1105 static void 1106 wpi_reset_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring) 1107 { 1108 wpi_tx_data_t *data; 1109 int i, ntries; 1110 1111 wpi_mem_lock(sc); 1112 1113 WPI_WRITE(sc, WPI_TX_CONFIG(ring->qid), 0); 1114 for (ntries = 0; ntries < 100; ntries++) { 1115 if (WPI_READ(sc, WPI_TX_STATUS) & WPI_TX_IDLE(ring->qid)) 1116 break; 1117 DELAY(10); 1118 } 1119 #ifdef DEBUG 1120 if (ntries == 100 && wpi_dbg_flags > 0) { 1121 WPI_DBG((WPI_DEBUG_DMA, "timeout resetting Tx ring %d\n", 1122 ring->qid)); 1123 } 1124 #endif 1125 wpi_mem_unlock(sc); 1126 1127 for (i = 0; i < ring->count; i++) { 1128 data = &ring->data[i]; 1129 WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV); 1130 } 1131 1132 ring->queued = 0; 1133 ring->cur = 0; 1134 } 1135 1136 /*ARGSUSED*/ 1137 static void 1138 wpi_free_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring) 1139 { 1140 int i; 1141 1142 if (ring->dma_desc.dma_hdl != NULL) 1143 WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV); 1144 wpi_free_dma_mem(&ring->dma_desc); 1145 1146 if (ring->dma_cmd.dma_hdl != NULL) 1147 WPI_DMA_SYNC(ring->dma_cmd, DDI_DMA_SYNC_FORDEV); 1148 wpi_free_dma_mem(&ring->dma_cmd); 1149 1150 if (ring->data != NULL) { 1151 for (i = 0; i < ring->count; i++) { 1152 if (ring->data[i].dma_data.dma_hdl) 1153 WPI_DMA_SYNC(ring->data[i].dma_data, 1154 DDI_DMA_SYNC_FORDEV); 1155 wpi_free_dma_mem(&ring->data[i].dma_data); 1156 } 1157 kmem_free(ring->data, ring->count * sizeof (wpi_tx_data_t)); 1158 } 1159 } 1160 1161 static int 1162 wpi_ring_init(wpi_sc_t *sc) 1163 { 1164 int i, err = DDI_SUCCESS; 1165 1166 for (i = 0; i < 4; i++) { 1167 err = wpi_alloc_tx_ring(sc, &sc->sc_txq[i], WPI_TX_RING_COUNT, 1168 i); 1169 if (err != DDI_SUCCESS) 1170 goto fail; 1171 } 1172 err = wpi_alloc_tx_ring(sc, &sc->sc_cmdq, WPI_CMD_RING_COUNT, 4); 1173 if (err != DDI_SUCCESS) 1174 goto fail; 1175 err = wpi_alloc_tx_ring(sc, &sc->sc_svcq, WPI_SVC_RING_COUNT, 5); 1176 if (err != DDI_SUCCESS) 1177 goto fail; 1178 err = wpi_alloc_rx_ring(sc); 1179 if (err != DDI_SUCCESS) 1180 goto fail; 1181 return (err); 1182 1183 fail: 1184 return (err); 1185 } 1186 1187 static void 1188 wpi_ring_free(wpi_sc_t *sc) 1189 { 1190 int i = 4; 1191 1192 wpi_free_rx_ring(sc); 1193 wpi_free_tx_ring(sc, &sc->sc_svcq); 1194 wpi_free_tx_ring(sc, &sc->sc_cmdq); 1195 while (--i >= 0) { 1196 wpi_free_tx_ring(sc, &sc->sc_txq[i]); 1197 } 1198 } 1199 1200 /* ARGSUSED */ 1201 static ieee80211_node_t * 1202 wpi_node_alloc(ieee80211com_t *ic) 1203 { 1204 wpi_amrr_t *amrr; 1205 1206 amrr = kmem_zalloc(sizeof (wpi_amrr_t), KM_SLEEP); 1207 if (amrr != NULL) 1208 wpi_amrr_init(amrr); 1209 return (&amrr->in); 1210 } 1211 1212 static void 1213 wpi_node_free(ieee80211_node_t *in) 1214 { 1215 ieee80211com_t *ic = in->in_ic; 1216 1217 ic->ic_node_cleanup(in); 1218 if (in->in_wpa_ie != NULL) 1219 ieee80211_free(in->in_wpa_ie); 1220 kmem_free(in, sizeof (wpi_amrr_t)); 1221 } 1222 1223 /*ARGSUSED*/ 1224 static int 1225 wpi_newstate(ieee80211com_t *ic, enum ieee80211_state nstate, int arg) 1226 { 1227 wpi_sc_t *sc = (wpi_sc_t *)ic; 1228 ieee80211_node_t *in = ic->ic_bss; 1229 enum ieee80211_state ostate; 1230 int i, err = WPI_SUCCESS; 1231 1232 mutex_enter(&sc->sc_glock); 1233 switch (nstate) { 1234 case IEEE80211_S_SCAN: 1235 ostate = ic->ic_state; 1236 switch (ostate) { 1237 default: 1238 break; 1239 case IEEE80211_S_INIT: 1240 /* make the link LED blink while we're scanning */ 1241 wpi_set_led(sc, WPI_LED_LINK, 20, 2); 1242 1243 ic->ic_flags |= IEEE80211_F_SCAN | IEEE80211_F_ASCAN; 1244 if ((err = wpi_scan(sc)) != 0) { 1245 WPI_DBG((WPI_DEBUG_80211, 1246 "could not initiate scan\n")); 1247 ic->ic_flags &= ~(IEEE80211_F_SCAN | 1248 IEEE80211_F_ASCAN); 1249 mutex_exit(&sc->sc_glock); 1250 return (err); 1251 } 1252 break; 1253 } 1254 ic->ic_state = nstate; 1255 sc->sc_clk = 0; 1256 1257 mutex_exit(&sc->sc_glock); 1258 return (WPI_SUCCESS); 1259 1260 case IEEE80211_S_AUTH: 1261 /* reset state to handle reassociations correctly */ 1262 sc->sc_config.state = 0; 1263 sc->sc_config.filter &= ~LE_32(WPI_FILTER_BSS); 1264 1265 if ((err = wpi_auth(sc)) != 0) { 1266 WPI_DBG((WPI_DEBUG_80211, 1267 "could not send authentication request\n")); 1268 mutex_exit(&sc->sc_glock); 1269 return (err); 1270 } 1271 break; 1272 1273 case IEEE80211_S_RUN: 1274 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 1275 /* link LED blinks while monitoring */ 1276 wpi_set_led(sc, WPI_LED_LINK, 5, 5); 1277 break; 1278 } 1279 1280 if (ic->ic_opmode != IEEE80211_M_STA) { 1281 (void) wpi_auth(sc); 1282 /* need setup beacon here */ 1283 } 1284 WPI_DBG((WPI_DEBUG_80211, "wpi: associated.")); 1285 1286 /* update adapter's configuration */ 1287 sc->sc_config.state = LE_16(WPI_CONFIG_ASSOCIATED); 1288 /* short preamble/slot time are negotiated when associating */ 1289 sc->sc_config.flags &= ~LE_32(WPI_CONFIG_SHPREAMBLE | 1290 WPI_CONFIG_SHSLOT); 1291 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1292 sc->sc_config.flags |= LE_32(WPI_CONFIG_SHSLOT); 1293 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1294 sc->sc_config.flags |= LE_32(WPI_CONFIG_SHPREAMBLE); 1295 sc->sc_config.filter |= LE_32(WPI_FILTER_BSS); 1296 if (ic->ic_opmode != IEEE80211_M_STA) 1297 sc->sc_config.filter |= LE_32(WPI_FILTER_BEACON); 1298 1299 WPI_DBG((WPI_DEBUG_80211, "config chan %d flags %x\n", 1300 sc->sc_config.chan, sc->sc_config.flags)); 1301 err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config, 1302 sizeof (wpi_config_t), 1); 1303 if (err != WPI_SUCCESS) { 1304 WPI_DBG((WPI_DEBUG_80211, 1305 "could not update configuration\n")); 1306 mutex_exit(&sc->sc_glock); 1307 return (err); 1308 } 1309 1310 /* start automatic rate control */ 1311 mutex_enter(&sc->sc_mt_lock); 1312 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 1313 sc->sc_flags |= WPI_F_RATE_AUTO_CTL; 1314 /* set rate to some reasonable initial value */ 1315 i = in->in_rates.ir_nrates - 1; 1316 while (i > 0 && IEEE80211_RATE(i) > 72) 1317 i--; 1318 in->in_txrate = i; 1319 } else { 1320 sc->sc_flags &= ~WPI_F_RATE_AUTO_CTL; 1321 } 1322 mutex_exit(&sc->sc_mt_lock); 1323 1324 /* link LED always on while associated */ 1325 wpi_set_led(sc, WPI_LED_LINK, 0, 1); 1326 break; 1327 1328 case IEEE80211_S_INIT: 1329 case IEEE80211_S_ASSOC: 1330 break; 1331 } 1332 1333 mutex_exit(&sc->sc_glock); 1334 return (sc->sc_newstate(ic, nstate, arg)); 1335 } 1336 1337 /*ARGSUSED*/ 1338 static int wpi_key_set(ieee80211com_t *ic, const struct ieee80211_key *k, 1339 const uint8_t mac[IEEE80211_ADDR_LEN]) 1340 { 1341 wpi_sc_t *sc = (wpi_sc_t *)ic; 1342 wpi_node_t node; 1343 int err; 1344 1345 switch (k->wk_cipher->ic_cipher) { 1346 case IEEE80211_CIPHER_WEP: 1347 case IEEE80211_CIPHER_TKIP: 1348 return (1); /* sofeware do it. */ 1349 case IEEE80211_CIPHER_AES_CCM: 1350 break; 1351 default: 1352 return (0); 1353 } 1354 sc->sc_config.filter &= ~(WPI_FILTER_NODECRYPTUNI | 1355 WPI_FILTER_NODECRYPTMUL); 1356 1357 mutex_enter(&sc->sc_glock); 1358 1359 /* update ap/multicast node */ 1360 (void) memset(&node, 0, sizeof (node)); 1361 if (IEEE80211_IS_MULTICAST(mac)) { 1362 (void) memset(node.bssid, 0xff, 6); 1363 node.id = WPI_ID_BROADCAST; 1364 } else { 1365 IEEE80211_ADDR_COPY(node.bssid, ic->ic_bss->in_bssid); 1366 node.id = WPI_ID_BSS; 1367 } 1368 if (k->wk_flags & IEEE80211_KEY_XMIT) { 1369 node.key_flags = 0; 1370 node.keyp = k->wk_keyix; 1371 } else { 1372 node.key_flags = (1 << 14); 1373 node.keyp = k->wk_keyix + 4; 1374 } 1375 (void) memcpy(node.key, k->wk_key, k->wk_keylen); 1376 node.key_flags |= (2 | (1 << 3) | (k->wk_keyix << 8)); 1377 node.sta_mask = 1; 1378 node.control = 1; 1379 err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 1); 1380 if (err != WPI_SUCCESS) { 1381 cmn_err(CE_WARN, "wpi_key_set():" 1382 "failed to update ap node\n"); 1383 mutex_exit(&sc->sc_glock); 1384 return (0); 1385 } 1386 mutex_exit(&sc->sc_glock); 1387 return (1); 1388 } 1389 1390 /* 1391 * Grab exclusive access to NIC memory. 1392 */ 1393 static void 1394 wpi_mem_lock(wpi_sc_t *sc) 1395 { 1396 uint32_t tmp; 1397 int ntries; 1398 1399 tmp = WPI_READ(sc, WPI_GPIO_CTL); 1400 WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_MAC); 1401 1402 /* spin until we actually get the lock */ 1403 for (ntries = 0; ntries < 1000; ntries++) { 1404 if ((WPI_READ(sc, WPI_GPIO_CTL) & 1405 (WPI_GPIO_CLOCK | WPI_GPIO_SLEEP)) == WPI_GPIO_CLOCK) 1406 break; 1407 DELAY(10); 1408 } 1409 if (ntries == 1000) 1410 WPI_DBG((WPI_DEBUG_PIO, "could not lock memory\n")); 1411 } 1412 1413 /* 1414 * Release lock on NIC memory. 1415 */ 1416 static void 1417 wpi_mem_unlock(wpi_sc_t *sc) 1418 { 1419 uint32_t tmp = WPI_READ(sc, WPI_GPIO_CTL); 1420 WPI_WRITE(sc, WPI_GPIO_CTL, tmp & ~WPI_GPIO_MAC); 1421 } 1422 1423 static uint32_t 1424 wpi_mem_read(wpi_sc_t *sc, uint16_t addr) 1425 { 1426 WPI_WRITE(sc, WPI_READ_MEM_ADDR, WPI_MEM_4 | addr); 1427 return (WPI_READ(sc, WPI_READ_MEM_DATA)); 1428 } 1429 1430 static void 1431 wpi_mem_write(wpi_sc_t *sc, uint16_t addr, uint32_t data) 1432 { 1433 WPI_WRITE(sc, WPI_WRITE_MEM_ADDR, WPI_MEM_4 | addr); 1434 WPI_WRITE(sc, WPI_WRITE_MEM_DATA, data); 1435 } 1436 1437 static void 1438 wpi_mem_write_region_4(wpi_sc_t *sc, uint16_t addr, 1439 const uint32_t *data, int wlen) 1440 { 1441 for (; wlen > 0; wlen--, data++, addr += 4) 1442 wpi_mem_write(sc, addr, *data); 1443 } 1444 1445 /* 1446 * Read 16 bits from the EEPROM. We access EEPROM through the MAC instead of 1447 * using the traditional bit-bang method. 1448 */ 1449 static uint16_t 1450 wpi_read_prom_word(wpi_sc_t *sc, uint32_t addr) 1451 { 1452 uint32_t val; 1453 int ntries; 1454 1455 WPI_WRITE(sc, WPI_EEPROM_CTL, addr << 2); 1456 1457 wpi_mem_lock(sc); 1458 for (ntries = 0; ntries < 10; ntries++) { 1459 if ((val = WPI_READ(sc, WPI_EEPROM_CTL)) & WPI_EEPROM_READY) 1460 break; 1461 DELAY(10); 1462 } 1463 wpi_mem_unlock(sc); 1464 1465 if (ntries == 10) { 1466 WPI_DBG((WPI_DEBUG_PIO, "could not read EEPROM\n")); 1467 return (0xdead); 1468 } 1469 return (val >> 16); 1470 } 1471 1472 /* 1473 * The firmware boot code is small and is intended to be copied directly into 1474 * the NIC internal memory. 1475 */ 1476 static int 1477 wpi_load_microcode(wpi_sc_t *sc) 1478 { 1479 const char *ucode; 1480 int size; 1481 1482 ucode = sc->sc_boot; 1483 size = LE_32(sc->sc_hdr->bootsz); 1484 /* check that microcode size is a multiple of 4 */ 1485 if (size & 3) 1486 return (EINVAL); 1487 1488 size /= sizeof (uint32_t); 1489 1490 wpi_mem_lock(sc); 1491 1492 /* copy microcode image into NIC memory */ 1493 wpi_mem_write_region_4(sc, WPI_MEM_UCODE_BASE, (const uint32_t *)ucode, 1494 size); 1495 1496 wpi_mem_write(sc, WPI_MEM_UCODE_SRC, 0); 1497 wpi_mem_write(sc, WPI_MEM_UCODE_DST, WPI_FW_TEXT); 1498 wpi_mem_write(sc, WPI_MEM_UCODE_SIZE, size); 1499 1500 /* run microcode */ 1501 wpi_mem_write(sc, WPI_MEM_UCODE_CTL, WPI_UC_RUN); 1502 1503 wpi_mem_unlock(sc); 1504 1505 return (WPI_SUCCESS); 1506 } 1507 1508 /* 1509 * The firmware text and data segments are transferred to the NIC using DMA. 1510 * The driver just copies the firmware into DMA-safe memory and tells the NIC 1511 * where to find it. Once the NIC has copied the firmware into its internal 1512 * memory, we can free our local copy in the driver. 1513 */ 1514 static int 1515 wpi_load_firmware(wpi_sc_t *sc, uint32_t target) 1516 { 1517 const char *fw; 1518 int size; 1519 wpi_dma_t *dma_p; 1520 ddi_dma_cookie_t *cookie; 1521 wpi_tx_desc_t desc; 1522 int i, ntries, err = WPI_SUCCESS; 1523 1524 /* only text and data here */ 1525 if (target == WPI_FW_TEXT) { 1526 fw = sc->sc_text; 1527 size = LE_32(sc->sc_hdr->textsz); 1528 dma_p = &sc->sc_dma_fw_text; 1529 cookie = sc->sc_fw_text_cookie; 1530 } else { 1531 fw = sc->sc_data; 1532 size = LE_32(sc->sc_hdr->datasz); 1533 dma_p = &sc->sc_dma_fw_data; 1534 cookie = sc->sc_fw_data_cookie; 1535 } 1536 1537 /* copy firmware image to DMA-safe memory */ 1538 (void) memcpy(dma_p->mem_va, fw, size); 1539 1540 /* make sure the adapter will get up-to-date values */ 1541 (void) ddi_dma_sync(dma_p->dma_hdl, 0, size, DDI_DMA_SYNC_FORDEV); 1542 1543 (void) memset(&desc, 0, sizeof (desc)); 1544 desc.flags = LE_32(WPI_PAD32(size) << 28 | dma_p->ncookies << 24); 1545 for (i = 0; i < dma_p->ncookies; i++) { 1546 WPI_DBG((WPI_DEBUG_DMA, "cookie%d addr:%x size:%x\n", 1547 i, cookie[i].dmac_address, cookie[i].dmac_size)); 1548 desc.segs[i].addr = cookie[i].dmac_address; 1549 desc.segs[i].len = (uint32_t)cookie[i].dmac_size; 1550 } 1551 1552 wpi_mem_lock(sc); 1553 1554 /* tell adapter where to copy image in its internal memory */ 1555 WPI_WRITE(sc, WPI_FW_TARGET, target); 1556 1557 WPI_WRITE(sc, WPI_TX_CONFIG(6), 0); 1558 1559 /* copy firmware descriptor into NIC memory */ 1560 WPI_WRITE_REGION_4(sc, WPI_TX_DESC(6), (uint32_t *)&desc, 1561 sizeof desc / sizeof (uint32_t)); 1562 1563 WPI_WRITE(sc, WPI_TX_CREDIT(6), 0xfffff); 1564 WPI_WRITE(sc, WPI_TX_STATE(6), 0x4001); 1565 WPI_WRITE(sc, WPI_TX_CONFIG(6), 0x80000001); 1566 1567 /* wait while the adapter is busy copying the firmware */ 1568 for (ntries = 0; ntries < 100; ntries++) { 1569 if (WPI_READ(sc, WPI_TX_STATUS) & WPI_TX_IDLE(6)) 1570 break; 1571 DELAY(1000); 1572 } 1573 if (ntries == 100) { 1574 WPI_DBG((WPI_DEBUG_FW, "timeout transferring firmware\n")); 1575 err = ETIMEDOUT; 1576 } 1577 1578 WPI_WRITE(sc, WPI_TX_CREDIT(6), 0); 1579 1580 wpi_mem_unlock(sc); 1581 1582 return (err); 1583 } 1584 1585 /*ARGSUSED*/ 1586 static void 1587 wpi_rx_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc, wpi_rx_data_t *data) 1588 { 1589 ieee80211com_t *ic = &sc->sc_ic; 1590 wpi_rx_ring_t *ring = &sc->sc_rxq; 1591 wpi_rx_stat_t *stat; 1592 wpi_rx_head_t *head; 1593 wpi_rx_tail_t *tail; 1594 ieee80211_node_t *in; 1595 struct ieee80211_frame *wh; 1596 mblk_t *mp; 1597 uint16_t len; 1598 1599 stat = (wpi_rx_stat_t *)(desc + 1); 1600 1601 if (stat->len > WPI_STAT_MAXLEN) { 1602 WPI_DBG((WPI_DEBUG_RX, "invalid rx statistic header\n")); 1603 return; 1604 } 1605 1606 head = (wpi_rx_head_t *)((caddr_t)(stat + 1) + stat->len); 1607 tail = (wpi_rx_tail_t *)((caddr_t)(head + 1) + LE_16(head->len)); 1608 1609 len = LE_16(head->len); 1610 1611 WPI_DBG((WPI_DEBUG_RX, "rx intr: idx=%d len=%d stat len=%d rssi=%d " 1612 "rate=%x chan=%d tstamp=%llu", ring->cur, LE_32(desc->len), 1613 len, (int8_t)stat->rssi, head->rate, head->chan, 1614 LE_64(tail->tstamp))); 1615 1616 if ((len < 20) || (len > sc->sc_dmabuf_sz)) { 1617 sc->sc_rx_err++; 1618 return; 1619 } 1620 1621 /* 1622 * Discard Rx frames with bad CRC early 1623 */ 1624 if ((LE_32(tail->flags) & WPI_RX_NOERROR) != WPI_RX_NOERROR) { 1625 WPI_DBG((WPI_DEBUG_RX, "rx tail flags error %x\n", 1626 LE_32(tail->flags))); 1627 sc->sc_rx_err++; 1628 return; 1629 } 1630 1631 /* update Rx descriptor */ 1632 /* ring->desc[ring->cur] = LE_32(data->dma_data.cookie.dmac_address); */ 1633 1634 #ifdef WPI_BPF 1635 #ifndef WPI_CURRENT 1636 if (sc->sc_drvbpf != NULL) { 1637 #else 1638 if (bpf_peers_present(sc->sc_drvbpf)) { 1639 #endif 1640 struct wpi_rx_radiotap_header *tap = &sc->sc_rxtap; 1641 1642 tap->wr_flags = 0; 1643 tap->wr_rate = head->rate; 1644 tap->wr_chan_freq = 1645 LE_16(ic->ic_channels[head->chan].ic_freq); 1646 tap->wr_chan_flags = 1647 LE_16(ic->ic_channels[head->chan].ic_flags); 1648 tap->wr_dbm_antsignal = (int8_t)(stat->rssi - WPI_RSSI_OFFSET); 1649 tap->wr_dbm_antnoise = (int8_t)LE_16(stat->noise); 1650 tap->wr_tsft = tail->tstamp; 1651 tap->wr_antenna = (LE_16(head->flags) >> 4) & 0xf; 1652 switch (head->rate) { 1653 /* CCK rates */ 1654 case 10: tap->wr_rate = 2; break; 1655 case 20: tap->wr_rate = 4; break; 1656 case 55: tap->wr_rate = 11; break; 1657 case 110: tap->wr_rate = 22; break; 1658 /* OFDM rates */ 1659 case 0xd: tap->wr_rate = 12; break; 1660 case 0xf: tap->wr_rate = 18; break; 1661 case 0x5: tap->wr_rate = 24; break; 1662 case 0x7: tap->wr_rate = 36; break; 1663 case 0x9: tap->wr_rate = 48; break; 1664 case 0xb: tap->wr_rate = 72; break; 1665 case 0x1: tap->wr_rate = 96; break; 1666 case 0x3: tap->wr_rate = 108; break; 1667 /* unknown rate: should not happen */ 1668 default: tap->wr_rate = 0; 1669 } 1670 if (LE_16(head->flags) & 0x4) 1671 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 1672 1673 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 1674 } 1675 #endif 1676 /* grab a reference to the source node */ 1677 wh = (struct ieee80211_frame *)(head + 1); 1678 1679 #ifdef DEBUG 1680 if (wpi_dbg_flags & WPI_DEBUG_RX) 1681 ieee80211_dump_pkt((uint8_t *)wh, len, 0, 0); 1682 #endif 1683 1684 in = ieee80211_find_rxnode(ic, wh); 1685 mp = allocb(len, BPRI_MED); 1686 if (mp) { 1687 (void) memcpy(mp->b_wptr, wh, len); 1688 mp->b_wptr += len; 1689 1690 /* send the frame to the 802.11 layer */ 1691 (void) ieee80211_input(ic, mp, in, stat->rssi, 0); 1692 } else { 1693 sc->sc_rx_nobuf++; 1694 WPI_DBG((WPI_DEBUG_RX, 1695 "wpi_rx_intr(): alloc rx buf failed\n")); 1696 } 1697 /* release node reference */ 1698 ieee80211_free_node(in); 1699 } 1700 1701 /*ARGSUSED*/ 1702 static void 1703 wpi_tx_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc, wpi_rx_data_t *data) 1704 { 1705 ieee80211com_t *ic = &sc->sc_ic; 1706 wpi_tx_ring_t *ring = &sc->sc_txq[desc->qid & 0x3]; 1707 /* wpi_tx_data_t *txdata = &ring->data[desc->idx]; */ 1708 wpi_tx_stat_t *stat = (wpi_tx_stat_t *)(desc + 1); 1709 wpi_amrr_t *amrr = (wpi_amrr_t *)ic->ic_bss; 1710 1711 WPI_DBG((WPI_DEBUG_TX, "tx done: qid=%d idx=%d retries=%d nkill=%d " 1712 "rate=%x duration=%d status=%x\n", 1713 desc->qid, desc->idx, stat->ntries, stat->nkill, stat->rate, 1714 LE_32(stat->duration), LE_32(stat->status))); 1715 1716 amrr->txcnt++; 1717 WPI_DBG((WPI_DEBUG_RATECTL, "tx: %d cnt\n", amrr->txcnt)); 1718 if (stat->ntries > 0) { 1719 amrr->retrycnt++; 1720 sc->sc_tx_retries++; 1721 WPI_DBG((WPI_DEBUG_RATECTL, "tx: %d retries\n", 1722 amrr->retrycnt)); 1723 } 1724 1725 sc->sc_tx_timer = 0; 1726 1727 mutex_enter(&sc->sc_tx_lock); 1728 ring->queued--; 1729 if (ring->queued < 0) 1730 ring->queued = 0; 1731 if ((sc->sc_need_reschedule) && (ring->queued <= (ring->count << 3))) { 1732 sc->sc_need_reschedule = 0; 1733 mutex_exit(&sc->sc_tx_lock); 1734 mac_tx_update(ic->ic_mach); 1735 mutex_enter(&sc->sc_tx_lock); 1736 } 1737 mutex_exit(&sc->sc_tx_lock); 1738 } 1739 1740 static void 1741 wpi_cmd_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc) 1742 { 1743 if ((desc->qid & 7) != 4) { 1744 return; /* not a command ack */ 1745 } 1746 mutex_enter(&sc->sc_glock); 1747 sc->sc_flags |= WPI_F_CMD_DONE; 1748 cv_signal(&sc->sc_cmd_cv); 1749 mutex_exit(&sc->sc_glock); 1750 } 1751 1752 static uint_t 1753 wpi_notif_softintr(caddr_t arg) 1754 { 1755 wpi_sc_t *sc = (wpi_sc_t *)arg; 1756 ieee80211com_t *ic = &sc->sc_ic; 1757 wpi_rx_desc_t *desc; 1758 wpi_rx_data_t *data; 1759 uint32_t hw; 1760 1761 mutex_enter(&sc->sc_glock); 1762 if (sc->sc_notif_softint_pending != 1) { 1763 mutex_exit(&sc->sc_glock); 1764 return (DDI_INTR_UNCLAIMED); 1765 } 1766 mutex_exit(&sc->sc_glock); 1767 1768 hw = LE_32(sc->sc_shared->next); 1769 1770 while (sc->sc_rxq.cur != hw) { 1771 data = &sc->sc_rxq.data[sc->sc_rxq.cur]; 1772 desc = (wpi_rx_desc_t *)data->dma_data.mem_va; 1773 1774 WPI_DBG((WPI_DEBUG_INTR, "rx notification hw = %d cur = %d " 1775 "qid=%x idx=%d flags=%x type=%d len=%d\n", 1776 hw, sc->sc_rxq.cur, desc->qid, desc->idx, desc->flags, 1777 desc->type, LE_32(desc->len))); 1778 1779 if (!(desc->qid & 0x80)) /* reply to a command */ 1780 wpi_cmd_intr(sc, desc); 1781 1782 switch (desc->type) { 1783 case WPI_RX_DONE: 1784 /* a 802.11 frame was received */ 1785 wpi_rx_intr(sc, desc, data); 1786 break; 1787 1788 case WPI_TX_DONE: 1789 /* a 802.11 frame has been transmitted */ 1790 wpi_tx_intr(sc, desc, data); 1791 break; 1792 1793 case WPI_UC_READY: 1794 { 1795 wpi_ucode_info_t *uc = 1796 (wpi_ucode_info_t *)(desc + 1); 1797 1798 /* the microcontroller is ready */ 1799 WPI_DBG((WPI_DEBUG_FW, 1800 "microcode alive notification version %x " 1801 "alive %x\n", LE_32(uc->version), 1802 LE_32(uc->valid))); 1803 1804 if (LE_32(uc->valid) != 1) { 1805 WPI_DBG((WPI_DEBUG_FW, 1806 "microcontroller initialization failed\n")); 1807 } 1808 break; 1809 } 1810 case WPI_STATE_CHANGED: 1811 { 1812 uint32_t *status = (uint32_t *)(desc + 1); 1813 1814 /* enabled/disabled notification */ 1815 WPI_DBG((WPI_DEBUG_RADIO, "state changed to %x\n", 1816 LE_32(*status))); 1817 1818 if (LE_32(*status) & 1) { 1819 /* 1820 * the radio button has to be pushed(OFF). It 1821 * is considered as a hw error, the 1822 * wpi_thread() tries to recover it after the 1823 * button is pushed again(ON) 1824 */ 1825 cmn_err(CE_NOTE, 1826 "wpi: Radio transmitter is off\n"); 1827 sc->sc_ostate = sc->sc_ic.ic_state; 1828 ieee80211_new_state(&sc->sc_ic, 1829 IEEE80211_S_INIT, -1); 1830 sc->sc_flags |= 1831 (WPI_F_HW_ERR_RECOVER | WPI_F_RADIO_OFF); 1832 } 1833 break; 1834 } 1835 case WPI_START_SCAN: 1836 { 1837 wpi_start_scan_t *scan = 1838 (wpi_start_scan_t *)(desc + 1); 1839 1840 WPI_DBG((WPI_DEBUG_SCAN, 1841 "scanning channel %d status %x\n", 1842 scan->chan, LE_32(scan->status))); 1843 1844 /* fix current channel */ 1845 ic->ic_curchan = &ic->ic_sup_channels[scan->chan]; 1846 break; 1847 } 1848 case WPI_STOP_SCAN: 1849 WPI_DBG((WPI_DEBUG_SCAN, "scan finished\n")); 1850 ieee80211_end_scan(ic); 1851 break; 1852 } 1853 1854 sc->sc_rxq.cur = (sc->sc_rxq.cur + 1) % WPI_RX_RING_COUNT; 1855 } 1856 1857 /* tell the firmware what we have processed */ 1858 hw = (hw == 0) ? WPI_RX_RING_COUNT - 1 : hw - 1; 1859 WPI_WRITE(sc, WPI_RX_WIDX, hw & (~7)); 1860 mutex_enter(&sc->sc_glock); 1861 sc->sc_notif_softint_pending = 0; 1862 mutex_exit(&sc->sc_glock); 1863 1864 return (DDI_INTR_CLAIMED); 1865 } 1866 1867 static uint_t 1868 wpi_intr(caddr_t arg) 1869 { 1870 wpi_sc_t *sc = (wpi_sc_t *)arg; 1871 uint32_t r, rfh; 1872 1873 mutex_enter(&sc->sc_glock); 1874 if (sc->sc_flags & WPI_F_SUSPEND) { 1875 mutex_exit(&sc->sc_glock); 1876 return (DDI_INTR_UNCLAIMED); 1877 } 1878 1879 r = WPI_READ(sc, WPI_INTR); 1880 if (r == 0 || r == 0xffffffff) { 1881 mutex_exit(&sc->sc_glock); 1882 return (DDI_INTR_UNCLAIMED); 1883 } 1884 1885 WPI_DBG((WPI_DEBUG_INTR, "interrupt reg %x\n", r)); 1886 1887 rfh = WPI_READ(sc, WPI_INTR_STATUS); 1888 /* disable interrupts */ 1889 WPI_WRITE(sc, WPI_MASK, 0); 1890 /* ack interrupts */ 1891 WPI_WRITE(sc, WPI_INTR, r); 1892 WPI_WRITE(sc, WPI_INTR_STATUS, rfh); 1893 1894 if (sc->sc_notif_softint_id == NULL) { 1895 mutex_exit(&sc->sc_glock); 1896 return (DDI_INTR_CLAIMED); 1897 } 1898 1899 if (r & (WPI_SW_ERROR | WPI_HW_ERROR)) { 1900 WPI_DBG((WPI_DEBUG_FW, "fatal firmware error\n")); 1901 mutex_exit(&sc->sc_glock); 1902 wpi_stop(sc); 1903 sc->sc_ostate = sc->sc_ic.ic_state; 1904 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1); 1905 sc->sc_flags |= WPI_F_HW_ERR_RECOVER; 1906 return (DDI_INTR_CLAIMED); 1907 } 1908 1909 if ((r & (WPI_RX_INTR | WPI_RX_SWINT)) || 1910 (rfh & 0x40070000)) { 1911 sc->sc_notif_softint_pending = 1; 1912 ddi_trigger_softintr(sc->sc_notif_softint_id); 1913 } 1914 1915 if (r & WPI_ALIVE_INTR) { /* firmware initialized */ 1916 sc->sc_flags |= WPI_F_FW_INIT; 1917 cv_signal(&sc->sc_fw_cv); 1918 } 1919 1920 /* re-enable interrupts */ 1921 WPI_WRITE(sc, WPI_MASK, WPI_INTR_MASK); 1922 mutex_exit(&sc->sc_glock); 1923 1924 return (DDI_INTR_CLAIMED); 1925 } 1926 1927 static uint8_t 1928 wpi_plcp_signal(int rate) 1929 { 1930 switch (rate) { 1931 /* CCK rates (returned values are device-dependent) */ 1932 case 2: return (10); 1933 case 4: return (20); 1934 case 11: return (55); 1935 case 22: return (110); 1936 1937 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1938 /* R1-R4 (ral/ural is R4-R1) */ 1939 case 12: return (0xd); 1940 case 18: return (0xf); 1941 case 24: return (0x5); 1942 case 36: return (0x7); 1943 case 48: return (0x9); 1944 case 72: return (0xb); 1945 case 96: return (0x1); 1946 case 108: return (0x3); 1947 1948 /* unsupported rates (should not get there) */ 1949 default: return (0); 1950 } 1951 } 1952 1953 static mblk_t * 1954 wpi_m_tx(void *arg, mblk_t *mp) 1955 { 1956 wpi_sc_t *sc = (wpi_sc_t *)arg; 1957 ieee80211com_t *ic = &sc->sc_ic; 1958 mblk_t *next; 1959 1960 if (sc->sc_flags & WPI_F_SUSPEND) { 1961 freemsgchain(mp); 1962 return (NULL); 1963 } 1964 1965 if (ic->ic_state != IEEE80211_S_RUN) { 1966 freemsgchain(mp); 1967 return (NULL); 1968 } 1969 1970 while (mp != NULL) { 1971 next = mp->b_next; 1972 mp->b_next = NULL; 1973 if (wpi_send(ic, mp, IEEE80211_FC0_TYPE_DATA) != 0) { 1974 mp->b_next = next; 1975 break; 1976 } 1977 mp = next; 1978 } 1979 return (mp); 1980 } 1981 1982 /* ARGSUSED */ 1983 static int 1984 wpi_send(ieee80211com_t *ic, mblk_t *mp, uint8_t type) 1985 { 1986 wpi_sc_t *sc = (wpi_sc_t *)ic; 1987 wpi_tx_ring_t *ring; 1988 wpi_tx_desc_t *desc; 1989 wpi_tx_data_t *data; 1990 wpi_tx_cmd_t *cmd; 1991 wpi_cmd_data_t *tx; 1992 ieee80211_node_t *in; 1993 struct ieee80211_frame *wh; 1994 struct ieee80211_key *k; 1995 mblk_t *m, *m0; 1996 int rate, hdrlen, len, mblen, off, err = WPI_SUCCESS; 1997 1998 ring = ((type & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_DATA) ? 1999 (&sc->sc_txq[0]) : (&sc->sc_txq[1]); 2000 data = &ring->data[ring->cur]; 2001 desc = data->desc; 2002 cmd = data->cmd; 2003 bzero(desc, sizeof (*desc)); 2004 bzero(cmd, sizeof (*cmd)); 2005 2006 mutex_enter(&sc->sc_tx_lock); 2007 if (sc->sc_flags & WPI_F_SUSPEND) { 2008 mutex_exit(&sc->sc_tx_lock); 2009 if ((type & IEEE80211_FC0_TYPE_MASK) != 2010 IEEE80211_FC0_TYPE_DATA) { 2011 freemsg(mp); 2012 } 2013 err = ENXIO; 2014 goto exit; 2015 } 2016 2017 if (ring->queued > ring->count - 64) { 2018 WPI_DBG((WPI_DEBUG_TX, "wpi_send(): no txbuf\n")); 2019 sc->sc_need_reschedule = 1; 2020 mutex_exit(&sc->sc_tx_lock); 2021 if ((type & IEEE80211_FC0_TYPE_MASK) != 2022 IEEE80211_FC0_TYPE_DATA) { 2023 freemsg(mp); 2024 } 2025 sc->sc_tx_nobuf++; 2026 err = ENOMEM; 2027 goto exit; 2028 } 2029 mutex_exit(&sc->sc_tx_lock); 2030 2031 hdrlen = sizeof (struct ieee80211_frame); 2032 2033 m = allocb(msgdsize(mp) + 32, BPRI_MED); 2034 if (m == NULL) { /* can not alloc buf, drop this package */ 2035 cmn_err(CE_WARN, 2036 "wpi_send(): failed to allocate msgbuf\n"); 2037 freemsg(mp); 2038 err = WPI_SUCCESS; 2039 goto exit; 2040 } 2041 for (off = 0, m0 = mp; m0 != NULL; m0 = m0->b_cont) { 2042 mblen = MBLKL(m0); 2043 (void) memcpy(m->b_rptr + off, m0->b_rptr, mblen); 2044 off += mblen; 2045 } 2046 m->b_wptr += off; 2047 freemsg(mp); 2048 2049 wh = (struct ieee80211_frame *)m->b_rptr; 2050 2051 in = ieee80211_find_txnode(ic, wh->i_addr1); 2052 if (in == NULL) { 2053 cmn_err(CE_WARN, "wpi_send(): failed to find tx node\n"); 2054 freemsg(m); 2055 sc->sc_tx_err++; 2056 err = WPI_SUCCESS; 2057 goto exit; 2058 } 2059 2060 (void) ieee80211_encap(ic, m, in); 2061 2062 cmd->code = WPI_CMD_TX_DATA; 2063 cmd->flags = 0; 2064 cmd->qid = ring->qid; 2065 cmd->idx = ring->cur; 2066 2067 tx = (wpi_cmd_data_t *)cmd->data; 2068 tx->flags = 0; 2069 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2070 tx->flags |= LE_32(WPI_TX_NEED_ACK); 2071 } else { 2072 tx->flags &= ~(LE_32(WPI_TX_NEED_ACK)); 2073 } 2074 2075 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2076 k = ieee80211_crypto_encap(ic, m); 2077 if (k == NULL) { 2078 freemsg(m); 2079 sc->sc_tx_err++; 2080 err = WPI_SUCCESS; 2081 goto exit; 2082 } 2083 2084 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_AES_CCM) { 2085 tx->security = 2; /* for CCMP */ 2086 tx->flags |= LE_32(WPI_TX_NEED_ACK); 2087 (void) memcpy(&tx->key, k->wk_key, k->wk_keylen); 2088 } 2089 2090 /* packet header may have moved, reset our local pointer */ 2091 wh = (struct ieee80211_frame *)m->b_rptr; 2092 } 2093 2094 len = msgdsize(m); 2095 2096 #ifdef DEBUG 2097 if (wpi_dbg_flags & WPI_DEBUG_TX) 2098 ieee80211_dump_pkt((uint8_t *)wh, hdrlen, 0, 0); 2099 #endif 2100 2101 /* pickup a rate */ 2102 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 2103 IEEE80211_FC0_TYPE_MGT) { 2104 /* mgmt frames are sent at the lowest available bit-rate */ 2105 rate = 2; 2106 } else { 2107 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 2108 rate = ic->ic_fixed_rate; 2109 } else 2110 rate = in->in_rates.ir_rates[in->in_txrate]; 2111 } 2112 rate &= IEEE80211_RATE_VAL; 2113 WPI_DBG((WPI_DEBUG_RATECTL, "tx rate[%d of %d] = %x", 2114 in->in_txrate, in->in_rates.ir_nrates, rate)); 2115 #ifdef WPI_BPF 2116 #ifndef WPI_CURRENT 2117 if (sc->sc_drvbpf != NULL) { 2118 #else 2119 if (bpf_peers_present(sc->sc_drvbpf)) { 2120 #endif 2121 struct wpi_tx_radiotap_header *tap = &sc->sc_txtap; 2122 2123 tap->wt_flags = 0; 2124 tap->wt_chan_freq = LE_16(ic->ic_curchan->ic_freq); 2125 tap->wt_chan_flags = LE_16(ic->ic_curchan->ic_flags); 2126 tap->wt_rate = rate; 2127 if (wh->i_fc[1] & IEEE80211_FC1_WEP) 2128 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2129 2130 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 2131 } 2132 #endif 2133 2134 tx->flags |= (LE_32(WPI_TX_AUTO_SEQ)); 2135 tx->flags |= LE_32(WPI_TX_BT_DISABLE | WPI_TX_CALIBRATION); 2136 2137 /* retrieve destination node's id */ 2138 tx->id = IEEE80211_IS_MULTICAST(wh->i_addr1) ? WPI_ID_BROADCAST : 2139 WPI_ID_BSS; 2140 2141 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 2142 IEEE80211_FC0_TYPE_MGT) { 2143 /* tell h/w to set timestamp in probe responses */ 2144 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 2145 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 2146 tx->flags |= LE_32(WPI_TX_INSERT_TSTAMP); 2147 2148 if (((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 2149 IEEE80211_FC0_SUBTYPE_ASSOC_REQ) || 2150 ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 2151 IEEE80211_FC0_SUBTYPE_REASSOC_REQ)) 2152 tx->timeout = 3; 2153 else 2154 tx->timeout = 2; 2155 } else 2156 tx->timeout = 0; 2157 2158 tx->rate = wpi_plcp_signal(rate); 2159 2160 /* be very persistant at sending frames out */ 2161 tx->rts_ntries = 7; 2162 tx->data_ntries = 15; 2163 2164 tx->cck_mask = 0x0f; 2165 tx->ofdm_mask = 0xff; 2166 tx->lifetime = LE_32(0xffffffff); 2167 2168 tx->len = LE_16(len); 2169 2170 /* save and trim IEEE802.11 header */ 2171 (void) memcpy(tx + 1, m->b_rptr, hdrlen); 2172 m->b_rptr += hdrlen; 2173 (void) memcpy(data->dma_data.mem_va, m->b_rptr, len - hdrlen); 2174 2175 WPI_DBG((WPI_DEBUG_TX, "sending data: qid=%d idx=%d len=%d", ring->qid, 2176 ring->cur, len)); 2177 2178 /* first scatter/gather segment is used by the tx data command */ 2179 desc->flags = LE_32(WPI_PAD32(len) << 28 | (2) << 24); 2180 desc->segs[0].addr = LE_32(data->paddr_cmd); 2181 desc->segs[0].len = LE_32( 2182 roundup(4 + sizeof (wpi_cmd_data_t) + hdrlen, 4)); 2183 desc->segs[1].addr = LE_32(data->dma_data.cookie.dmac_address); 2184 desc->segs[1].len = LE_32(len - hdrlen); 2185 2186 WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV); 2187 WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV); 2188 2189 mutex_enter(&sc->sc_tx_lock); 2190 ring->queued++; 2191 mutex_exit(&sc->sc_tx_lock); 2192 2193 /* kick ring */ 2194 ring->cur = (ring->cur + 1) % WPI_TX_RING_COUNT; 2195 WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur); 2196 freemsg(m); 2197 /* release node reference */ 2198 ieee80211_free_node(in); 2199 2200 ic->ic_stats.is_tx_bytes += len; 2201 ic->ic_stats.is_tx_frags++; 2202 2203 if (sc->sc_tx_timer == 0) 2204 sc->sc_tx_timer = 5; 2205 exit: 2206 return (err); 2207 } 2208 2209 static void 2210 wpi_m_ioctl(void* arg, queue_t *wq, mblk_t *mp) 2211 { 2212 wpi_sc_t *sc = (wpi_sc_t *)arg; 2213 ieee80211com_t *ic = &sc->sc_ic; 2214 int err; 2215 2216 err = ieee80211_ioctl(ic, wq, mp); 2217 if (err == ENETRESET) { 2218 /* 2219 * This is special for the hidden AP connection. 2220 * In any case, we should make sure only one 'scan' 2221 * in the driver for a 'connect' CLI command. So 2222 * when connecting to a hidden AP, the scan is just 2223 * sent out to the air when we know the desired 2224 * essid of the AP we want to connect. 2225 */ 2226 if (ic->ic_des_esslen) { 2227 (void) ieee80211_new_state(ic, 2228 IEEE80211_S_SCAN, -1); 2229 } 2230 } 2231 } 2232 2233 /* 2234 * Callback functions for get/set properties 2235 */ 2236 static int 2237 wpi_m_getprop(void *arg, const char *pr_name, mac_prop_id_t wldp_pr_name, 2238 uint_t pr_flags, uint_t wldp_length, void *wldp_buf) 2239 { 2240 int err = 0; 2241 wpi_sc_t *sc = (wpi_sc_t *)arg; 2242 2243 err = ieee80211_getprop(&sc->sc_ic, pr_name, wldp_pr_name, 2244 pr_flags, wldp_length, wldp_buf); 2245 2246 return (err); 2247 } 2248 static int 2249 wpi_m_setprop(void *arg, const char *pr_name, mac_prop_id_t wldp_pr_name, 2250 uint_t wldp_length, const void *wldp_buf) 2251 { 2252 int err; 2253 wpi_sc_t *sc = (wpi_sc_t *)arg; 2254 ieee80211com_t *ic = &sc->sc_ic; 2255 2256 err = ieee80211_setprop(ic, pr_name, wldp_pr_name, 2257 wldp_length, wldp_buf); 2258 2259 if (err == ENETRESET) { 2260 if (ic->ic_des_esslen) { 2261 (void) ieee80211_new_state(ic, 2262 IEEE80211_S_SCAN, -1); 2263 } 2264 2265 err = 0; 2266 } 2267 2268 return (err); 2269 } 2270 2271 /*ARGSUSED*/ 2272 static int 2273 wpi_m_stat(void *arg, uint_t stat, uint64_t *val) 2274 { 2275 wpi_sc_t *sc = (wpi_sc_t *)arg; 2276 ieee80211com_t *ic = &sc->sc_ic; 2277 ieee80211_node_t *in = ic->ic_bss; 2278 struct ieee80211_rateset *rs = &in->in_rates; 2279 2280 mutex_enter(&sc->sc_glock); 2281 switch (stat) { 2282 case MAC_STAT_IFSPEED: 2283 *val = ((ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) ? 2284 (rs->ir_rates[in->in_txrate] & IEEE80211_RATE_VAL) 2285 : ic->ic_fixed_rate) / 2 * 1000000; 2286 break; 2287 case MAC_STAT_NOXMTBUF: 2288 *val = sc->sc_tx_nobuf; 2289 break; 2290 case MAC_STAT_NORCVBUF: 2291 *val = sc->sc_rx_nobuf; 2292 break; 2293 case MAC_STAT_IERRORS: 2294 *val = sc->sc_rx_err; 2295 break; 2296 case MAC_STAT_RBYTES: 2297 *val = ic->ic_stats.is_rx_bytes; 2298 break; 2299 case MAC_STAT_IPACKETS: 2300 *val = ic->ic_stats.is_rx_frags; 2301 break; 2302 case MAC_STAT_OBYTES: 2303 *val = ic->ic_stats.is_tx_bytes; 2304 break; 2305 case MAC_STAT_OPACKETS: 2306 *val = ic->ic_stats.is_tx_frags; 2307 break; 2308 case MAC_STAT_OERRORS: 2309 case WIFI_STAT_TX_FAILED: 2310 *val = sc->sc_tx_err; 2311 break; 2312 case WIFI_STAT_TX_RETRANS: 2313 *val = sc->sc_tx_retries; 2314 break; 2315 case WIFI_STAT_FCS_ERRORS: 2316 case WIFI_STAT_WEP_ERRORS: 2317 case WIFI_STAT_TX_FRAGS: 2318 case WIFI_STAT_MCAST_TX: 2319 case WIFI_STAT_RTS_SUCCESS: 2320 case WIFI_STAT_RTS_FAILURE: 2321 case WIFI_STAT_ACK_FAILURE: 2322 case WIFI_STAT_RX_FRAGS: 2323 case WIFI_STAT_MCAST_RX: 2324 case WIFI_STAT_RX_DUPS: 2325 mutex_exit(&sc->sc_glock); 2326 return (ieee80211_stat(ic, stat, val)); 2327 default: 2328 mutex_exit(&sc->sc_glock); 2329 return (ENOTSUP); 2330 } 2331 mutex_exit(&sc->sc_glock); 2332 2333 return (WPI_SUCCESS); 2334 2335 } 2336 2337 static int 2338 wpi_m_start(void *arg) 2339 { 2340 wpi_sc_t *sc = (wpi_sc_t *)arg; 2341 ieee80211com_t *ic = &sc->sc_ic; 2342 int err; 2343 2344 err = wpi_init(sc); 2345 if (err != WPI_SUCCESS) { 2346 wpi_stop(sc); 2347 DELAY(1000000); 2348 err = wpi_init(sc); 2349 } 2350 2351 if (err) { 2352 /* 2353 * The hw init err(eg. RF is OFF). Return Success to make 2354 * the 'plumb' succeed. The wpi_thread() tries to re-init 2355 * background. 2356 */ 2357 mutex_enter(&sc->sc_glock); 2358 sc->sc_flags |= WPI_F_HW_ERR_RECOVER; 2359 mutex_exit(&sc->sc_glock); 2360 return (WPI_SUCCESS); 2361 } 2362 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2363 mutex_enter(&sc->sc_glock); 2364 sc->sc_flags |= WPI_F_RUNNING; 2365 mutex_exit(&sc->sc_glock); 2366 2367 return (WPI_SUCCESS); 2368 } 2369 2370 static void 2371 wpi_m_stop(void *arg) 2372 { 2373 wpi_sc_t *sc = (wpi_sc_t *)arg; 2374 ieee80211com_t *ic = &sc->sc_ic; 2375 2376 wpi_stop(sc); 2377 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2378 mutex_enter(&sc->sc_mt_lock); 2379 sc->sc_flags &= ~WPI_F_HW_ERR_RECOVER; 2380 sc->sc_flags &= ~WPI_F_RATE_AUTO_CTL; 2381 mutex_exit(&sc->sc_mt_lock); 2382 mutex_enter(&sc->sc_glock); 2383 sc->sc_flags &= ~WPI_F_RUNNING; 2384 mutex_exit(&sc->sc_glock); 2385 } 2386 2387 /*ARGSUSED*/ 2388 static int 2389 wpi_m_unicst(void *arg, const uint8_t *macaddr) 2390 { 2391 wpi_sc_t *sc = (wpi_sc_t *)arg; 2392 ieee80211com_t *ic = &sc->sc_ic; 2393 int err; 2394 2395 if (!IEEE80211_ADDR_EQ(ic->ic_macaddr, macaddr)) { 2396 IEEE80211_ADDR_COPY(ic->ic_macaddr, macaddr); 2397 mutex_enter(&sc->sc_glock); 2398 err = wpi_config(sc); 2399 mutex_exit(&sc->sc_glock); 2400 if (err != WPI_SUCCESS) { 2401 cmn_err(CE_WARN, 2402 "wpi_m_unicst(): " 2403 "failed to configure device\n"); 2404 goto fail; 2405 } 2406 } 2407 return (WPI_SUCCESS); 2408 fail: 2409 return (err); 2410 } 2411 2412 /*ARGSUSED*/ 2413 static int 2414 wpi_m_multicst(void *arg, boolean_t add, const uint8_t *m) 2415 { 2416 return (WPI_SUCCESS); 2417 } 2418 2419 /*ARGSUSED*/ 2420 static int 2421 wpi_m_promisc(void *arg, boolean_t on) 2422 { 2423 return (WPI_SUCCESS); 2424 } 2425 2426 static void 2427 wpi_thread(wpi_sc_t *sc) 2428 { 2429 ieee80211com_t *ic = &sc->sc_ic; 2430 clock_t clk; 2431 int times = 0, err, n = 0, timeout = 0; 2432 uint32_t tmp; 2433 2434 mutex_enter(&sc->sc_mt_lock); 2435 while (sc->sc_mf_thread_switch) { 2436 tmp = WPI_READ(sc, WPI_GPIO_CTL); 2437 if (tmp & WPI_GPIO_HW_RF_KILL) { 2438 sc->sc_flags &= ~WPI_F_RADIO_OFF; 2439 } else { 2440 sc->sc_flags |= WPI_F_RADIO_OFF; 2441 } 2442 /* 2443 * If in SUSPEND or the RF is OFF, do nothing 2444 */ 2445 if ((sc->sc_flags & WPI_F_SUSPEND) || 2446 (sc->sc_flags & WPI_F_RADIO_OFF)) { 2447 mutex_exit(&sc->sc_mt_lock); 2448 delay(drv_usectohz(100000)); 2449 mutex_enter(&sc->sc_mt_lock); 2450 continue; 2451 } 2452 2453 /* 2454 * recovery fatal error 2455 */ 2456 if (ic->ic_mach && 2457 (sc->sc_flags & WPI_F_HW_ERR_RECOVER)) { 2458 2459 WPI_DBG((WPI_DEBUG_FW, 2460 "wpi_thread(): " 2461 "try to recover fatal hw error: %d\n", times++)); 2462 2463 wpi_stop(sc); 2464 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2465 2466 mutex_exit(&sc->sc_mt_lock); 2467 delay(drv_usectohz(2000000)); 2468 mutex_enter(&sc->sc_mt_lock); 2469 err = wpi_init(sc); 2470 if (err != WPI_SUCCESS) { 2471 n++; 2472 if (n < 3) 2473 continue; 2474 } 2475 n = 0; 2476 if (!err) 2477 sc->sc_flags |= WPI_F_RUNNING; 2478 sc->sc_flags &= ~WPI_F_HW_ERR_RECOVER; 2479 mutex_exit(&sc->sc_mt_lock); 2480 delay(drv_usectohz(2000000)); 2481 if (sc->sc_ostate != IEEE80211_S_INIT) 2482 ieee80211_new_state(ic, IEEE80211_S_SCAN, 0); 2483 mutex_enter(&sc->sc_mt_lock); 2484 } 2485 2486 /* 2487 * rate ctl 2488 */ 2489 if (ic->ic_mach && 2490 (sc->sc_flags & WPI_F_RATE_AUTO_CTL)) { 2491 clk = ddi_get_lbolt(); 2492 if (clk > sc->sc_clk + drv_usectohz(500000)) { 2493 wpi_amrr_timeout(sc); 2494 } 2495 } 2496 mutex_exit(&sc->sc_mt_lock); 2497 delay(drv_usectohz(100000)); 2498 mutex_enter(&sc->sc_mt_lock); 2499 if (sc->sc_tx_timer) { 2500 timeout++; 2501 if (timeout == 10) { 2502 sc->sc_tx_timer--; 2503 if (sc->sc_tx_timer == 0) { 2504 sc->sc_flags |= WPI_F_HW_ERR_RECOVER; 2505 sc->sc_ostate = IEEE80211_S_RUN; 2506 } 2507 timeout = 0; 2508 } 2509 } 2510 } 2511 sc->sc_mf_thread = NULL; 2512 cv_signal(&sc->sc_mt_cv); 2513 mutex_exit(&sc->sc_mt_lock); 2514 } 2515 2516 /* 2517 * Extract various information from EEPROM. 2518 */ 2519 static void 2520 wpi_read_eeprom(wpi_sc_t *sc) 2521 { 2522 ieee80211com_t *ic = &sc->sc_ic; 2523 uint16_t val; 2524 int i; 2525 2526 /* read MAC address */ 2527 val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 0); 2528 ic->ic_macaddr[0] = val & 0xff; 2529 ic->ic_macaddr[1] = val >> 8; 2530 val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 1); 2531 ic->ic_macaddr[2] = val & 0xff; 2532 ic->ic_macaddr[3] = val >> 8; 2533 val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 2); 2534 ic->ic_macaddr[4] = val & 0xff; 2535 ic->ic_macaddr[5] = val >> 8; 2536 2537 WPI_DBG((WPI_DEBUG_EEPROM, 2538 "mac:%2x:%2x:%2x:%2x:%2x:%2x\n", 2539 ic->ic_macaddr[0], ic->ic_macaddr[1], 2540 ic->ic_macaddr[2], ic->ic_macaddr[3], 2541 ic->ic_macaddr[4], ic->ic_macaddr[5])); 2542 /* read power settings for 2.4GHz channels */ 2543 for (i = 0; i < 14; i++) { 2544 sc->sc_pwr1[i] = wpi_read_prom_word(sc, WPI_EEPROM_PWR1 + i); 2545 sc->sc_pwr2[i] = wpi_read_prom_word(sc, WPI_EEPROM_PWR2 + i); 2546 WPI_DBG((WPI_DEBUG_EEPROM, 2547 "channel %d pwr1 0x%04x pwr2 0x%04x\n", i + 1, 2548 sc->sc_pwr1[i], sc->sc_pwr2[i])); 2549 } 2550 } 2551 2552 /* 2553 * Send a command to the firmware. 2554 */ 2555 static int 2556 wpi_cmd(wpi_sc_t *sc, int code, const void *buf, int size, int async) 2557 { 2558 wpi_tx_ring_t *ring = &sc->sc_cmdq; 2559 wpi_tx_desc_t *desc; 2560 wpi_tx_cmd_t *cmd; 2561 2562 ASSERT(size <= sizeof (cmd->data)); 2563 ASSERT(mutex_owned(&sc->sc_glock)); 2564 2565 WPI_DBG((WPI_DEBUG_CMD, "wpi_cmd() # code[%d]", code)); 2566 desc = ring->data[ring->cur].desc; 2567 cmd = ring->data[ring->cur].cmd; 2568 2569 cmd->code = (uint8_t)code; 2570 cmd->flags = 0; 2571 cmd->qid = ring->qid; 2572 cmd->idx = ring->cur; 2573 (void) memcpy(cmd->data, buf, size); 2574 2575 desc->flags = LE_32(WPI_PAD32(size) << 28 | 1 << 24); 2576 desc->segs[0].addr = ring->data[ring->cur].paddr_cmd; 2577 desc->segs[0].len = 4 + size; 2578 2579 /* kick cmd ring */ 2580 ring->cur = (ring->cur + 1) % WPI_CMD_RING_COUNT; 2581 WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur); 2582 2583 if (async) 2584 return (WPI_SUCCESS); 2585 else { 2586 clock_t clk; 2587 sc->sc_flags &= ~WPI_F_CMD_DONE; 2588 clk = ddi_get_lbolt() + drv_usectohz(2000000); 2589 while (!(sc->sc_flags & WPI_F_CMD_DONE)) { 2590 if (cv_timedwait(&sc->sc_cmd_cv, &sc->sc_glock, clk) 2591 < 0) 2592 break; 2593 } 2594 if (sc->sc_flags & WPI_F_CMD_DONE) 2595 return (WPI_SUCCESS); 2596 else 2597 return (WPI_FAIL); 2598 } 2599 } 2600 2601 /* 2602 * Configure h/w multi-rate retries. 2603 */ 2604 static int 2605 wpi_mrr_setup(wpi_sc_t *sc) 2606 { 2607 wpi_mrr_setup_t mrr; 2608 int i, err; 2609 2610 /* CCK rates (not used with 802.11a) */ 2611 for (i = WPI_CCK1; i <= WPI_CCK11; i++) { 2612 mrr.rates[i].flags = 0; 2613 mrr.rates[i].signal = wpi_ridx_to_signal[i]; 2614 /* fallback to the immediate lower CCK rate (if any) */ 2615 mrr.rates[i].next = (i == WPI_CCK1) ? WPI_CCK1 : i - 1; 2616 /* try one time at this rate before falling back to "next" */ 2617 mrr.rates[i].ntries = 1; 2618 } 2619 2620 /* OFDM rates (not used with 802.11b) */ 2621 for (i = WPI_OFDM6; i <= WPI_OFDM54; i++) { 2622 mrr.rates[i].flags = 0; 2623 mrr.rates[i].signal = wpi_ridx_to_signal[i]; 2624 /* fallback to the immediate lower OFDM rate (if any) */ 2625 mrr.rates[i].next = (i == WPI_OFDM6) ? WPI_OFDM6 : i - 1; 2626 /* try one time at this rate before falling back to "next" */ 2627 mrr.rates[i].ntries = 1; 2628 } 2629 2630 /* setup MRR for control frames */ 2631 mrr.which = LE_32(WPI_MRR_CTL); 2632 err = wpi_cmd(sc, WPI_CMD_MRR_SETUP, &mrr, sizeof (mrr), 1); 2633 if (err != WPI_SUCCESS) { 2634 WPI_DBG((WPI_DEBUG_MRR, 2635 "could not setup MRR for control frames\n")); 2636 return (err); 2637 } 2638 2639 /* setup MRR for data frames */ 2640 mrr.which = LE_32(WPI_MRR_DATA); 2641 err = wpi_cmd(sc, WPI_CMD_MRR_SETUP, &mrr, sizeof (mrr), 1); 2642 if (err != WPI_SUCCESS) { 2643 WPI_DBG((WPI_DEBUG_MRR, 2644 "could not setup MRR for data frames\n")); 2645 return (err); 2646 } 2647 2648 return (WPI_SUCCESS); 2649 } 2650 2651 static void 2652 wpi_set_led(wpi_sc_t *sc, uint8_t which, uint8_t off, uint8_t on) 2653 { 2654 wpi_cmd_led_t led; 2655 2656 led.which = which; 2657 led.unit = LE_32(100000); /* on/off in unit of 100ms */ 2658 led.off = off; 2659 led.on = on; 2660 2661 (void) wpi_cmd(sc, WPI_CMD_SET_LED, &led, sizeof (led), 1); 2662 } 2663 2664 static int 2665 wpi_auth(wpi_sc_t *sc) 2666 { 2667 ieee80211com_t *ic = &sc->sc_ic; 2668 ieee80211_node_t *in = ic->ic_bss; 2669 wpi_node_t node; 2670 int err; 2671 2672 /* update adapter's configuration */ 2673 IEEE80211_ADDR_COPY(sc->sc_config.bssid, in->in_bssid); 2674 sc->sc_config.chan = ieee80211_chan2ieee(ic, in->in_chan); 2675 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2676 sc->sc_config.cck_mask = 0x03; 2677 sc->sc_config.ofdm_mask = 0; 2678 } else if ((in->in_chan != IEEE80211_CHAN_ANYC) && 2679 (IEEE80211_IS_CHAN_5GHZ(in->in_chan))) { 2680 sc->sc_config.cck_mask = 0; 2681 sc->sc_config.ofdm_mask = 0x15; 2682 } else { /* assume 802.11b/g */ 2683 sc->sc_config.cck_mask = 0x0f; 2684 sc->sc_config.ofdm_mask = 0xff; 2685 } 2686 2687 WPI_DBG((WPI_DEBUG_80211, "config chan %d flags %x cck %x ofdm %x" 2688 " bssid:%02x:%02x:%02x:%02x:%02x:%2x\n", 2689 sc->sc_config.chan, sc->sc_config.flags, 2690 sc->sc_config.cck_mask, sc->sc_config.ofdm_mask, 2691 sc->sc_config.bssid[0], sc->sc_config.bssid[1], 2692 sc->sc_config.bssid[2], sc->sc_config.bssid[3], 2693 sc->sc_config.bssid[4], sc->sc_config.bssid[5])); 2694 err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config, 2695 sizeof (wpi_config_t), 1); 2696 if (err != WPI_SUCCESS) { 2697 cmn_err(CE_WARN, "wpi_auth(): failed to configurate chan%d\n", 2698 sc->sc_config.chan); 2699 return (err); 2700 } 2701 2702 /* add default node */ 2703 (void) memset(&node, 0, sizeof (node)); 2704 IEEE80211_ADDR_COPY(node.bssid, in->in_bssid); 2705 node.id = WPI_ID_BSS; 2706 node.rate = wpi_plcp_signal(2); 2707 err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 1); 2708 if (err != WPI_SUCCESS) { 2709 cmn_err(CE_WARN, "wpi_auth(): failed to add BSS node\n"); 2710 return (err); 2711 } 2712 2713 err = wpi_mrr_setup(sc); 2714 if (err != WPI_SUCCESS) { 2715 cmn_err(CE_WARN, "wpi_auth(): failed to setup MRR\n"); 2716 return (err); 2717 } 2718 2719 return (WPI_SUCCESS); 2720 } 2721 2722 /* 2723 * Send a scan request to the firmware. 2724 */ 2725 static int 2726 wpi_scan(wpi_sc_t *sc) 2727 { 2728 ieee80211com_t *ic = &sc->sc_ic; 2729 wpi_tx_ring_t *ring = &sc->sc_cmdq; 2730 wpi_tx_desc_t *desc; 2731 wpi_tx_data_t *data; 2732 wpi_tx_cmd_t *cmd; 2733 wpi_scan_hdr_t *hdr; 2734 wpi_scan_chan_t *chan; 2735 struct ieee80211_frame *wh; 2736 ieee80211_node_t *in = ic->ic_bss; 2737 struct ieee80211_rateset *rs; 2738 enum ieee80211_phymode mode; 2739 uint8_t *frm; 2740 int i, pktlen, nrates; 2741 2742 data = &ring->data[ring->cur]; 2743 desc = data->desc; 2744 cmd = (wpi_tx_cmd_t *)data->dma_data.mem_va; 2745 2746 cmd->code = WPI_CMD_SCAN; 2747 cmd->flags = 0; 2748 cmd->qid = ring->qid; 2749 cmd->idx = ring->cur; 2750 2751 hdr = (wpi_scan_hdr_t *)cmd->data; 2752 (void) memset(hdr, 0, sizeof (wpi_scan_hdr_t)); 2753 hdr->first = 1; 2754 hdr->nchan = 14; 2755 hdr->len = hdr->nchan * sizeof (wpi_scan_chan_t); 2756 hdr->quiet = LE_16(5); 2757 hdr->threshold = LE_16(1); 2758 hdr->filter = LE_32(5); 2759 hdr->rate = wpi_plcp_signal(2); 2760 hdr->id = WPI_ID_BROADCAST; 2761 hdr->mask = LE_32(0xffffffff); 2762 hdr->esslen = ic->ic_des_esslen; 2763 if (ic->ic_des_esslen) 2764 bcopy(ic->ic_des_essid, hdr->essid, ic->ic_des_esslen); 2765 else 2766 bzero(hdr->essid, sizeof (hdr->essid)); 2767 /* 2768 * Build a probe request frame. Most of the following code is a 2769 * copy & paste of what is done in net80211. Unfortunately, the 2770 * functions to add IEs are static and thus can't be reused here. 2771 */ 2772 wh = (struct ieee80211_frame *)(hdr + 1); 2773 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 2774 IEEE80211_FC0_SUBTYPE_PROBE_REQ; 2775 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 2776 (void) memset(wh->i_addr1, 0xff, 6); 2777 IEEE80211_ADDR_COPY(wh->i_addr2, ic->ic_macaddr); 2778 (void) memset(wh->i_addr3, 0xff, 6); 2779 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by h/w */ 2780 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by h/w */ 2781 2782 frm = (uint8_t *)(wh + 1); 2783 2784 /* add essid IE */ 2785 *frm++ = IEEE80211_ELEMID_SSID; 2786 *frm++ = in->in_esslen; 2787 (void) memcpy(frm, in->in_essid, in->in_esslen); 2788 frm += in->in_esslen; 2789 2790 mode = ieee80211_chan2mode(ic, ic->ic_curchan); 2791 rs = &ic->ic_sup_rates[mode]; 2792 2793 /* add supported rates IE */ 2794 *frm++ = IEEE80211_ELEMID_RATES; 2795 nrates = rs->ir_nrates; 2796 if (nrates > IEEE80211_RATE_SIZE) 2797 nrates = IEEE80211_RATE_SIZE; 2798 *frm++ = (uint8_t)nrates; 2799 (void) memcpy(frm, rs->ir_rates, nrates); 2800 frm += nrates; 2801 2802 /* add supported xrates IE */ 2803 if (rs->ir_nrates > IEEE80211_RATE_SIZE) { 2804 nrates = rs->ir_nrates - IEEE80211_RATE_SIZE; 2805 *frm++ = IEEE80211_ELEMID_XRATES; 2806 *frm++ = (uint8_t)nrates; 2807 (void) memcpy(frm, rs->ir_rates + IEEE80211_RATE_SIZE, nrates); 2808 frm += nrates; 2809 } 2810 2811 /* add optionnal IE (usually an RSN IE) */ 2812 if (ic->ic_opt_ie != NULL) { 2813 (void) memcpy(frm, ic->ic_opt_ie, ic->ic_opt_ie_len); 2814 frm += ic->ic_opt_ie_len; 2815 } 2816 2817 /* setup length of probe request */ 2818 hdr->pbrlen = LE_16((uintptr_t)frm - (uintptr_t)wh); 2819 2820 /* align on a 4-byte boundary */ 2821 chan = (wpi_scan_chan_t *)frm; 2822 for (i = 1; i <= hdr->nchan; i++, chan++) { 2823 chan->flags = 3; 2824 chan->chan = (uint8_t)i; 2825 chan->magic = LE_16(0x62ab); 2826 chan->active = LE_16(20); 2827 chan->passive = LE_16(120); 2828 2829 frm += sizeof (wpi_scan_chan_t); 2830 } 2831 2832 pktlen = (uintptr_t)frm - (uintptr_t)cmd; 2833 2834 desc->flags = LE_32(WPI_PAD32(pktlen) << 28 | 1 << 24); 2835 desc->segs[0].addr = LE_32(data->dma_data.cookie.dmac_address); 2836 desc->segs[0].len = LE_32(pktlen); 2837 2838 WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV); 2839 WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV); 2840 2841 /* kick cmd ring */ 2842 ring->cur = (ring->cur + 1) % WPI_CMD_RING_COUNT; 2843 WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur); 2844 2845 return (WPI_SUCCESS); /* will be notified async. of failure/success */ 2846 } 2847 2848 static int 2849 wpi_config(wpi_sc_t *sc) 2850 { 2851 ieee80211com_t *ic = &sc->sc_ic; 2852 wpi_txpower_t txpower; 2853 wpi_power_t power; 2854 #ifdef WPI_BLUE_COEXISTENCE 2855 wpi_bluetooth_t bluetooth; 2856 #endif 2857 wpi_node_t node; 2858 int err; 2859 2860 /* Intel's binary only daemon is a joke.. */ 2861 2862 /* set Tx power for 2.4GHz channels (values read from EEPROM) */ 2863 (void) memset(&txpower, 0, sizeof (txpower)); 2864 (void) memcpy(txpower.pwr1, sc->sc_pwr1, 14 * sizeof (uint16_t)); 2865 (void) memcpy(txpower.pwr2, sc->sc_pwr2, 14 * sizeof (uint16_t)); 2866 err = wpi_cmd(sc, WPI_CMD_TXPOWER, &txpower, sizeof (txpower), 0); 2867 if (err != WPI_SUCCESS) { 2868 cmn_err(CE_WARN, "wpi_config(): failed to set txpower\n"); 2869 return (err); 2870 } 2871 2872 /* set power mode */ 2873 (void) memset(&power, 0, sizeof (power)); 2874 power.flags = LE_32(0x8); 2875 err = wpi_cmd(sc, WPI_CMD_SET_POWER_MODE, &power, sizeof (power), 0); 2876 if (err != WPI_SUCCESS) { 2877 cmn_err(CE_WARN, "wpi_config(): failed to set power mode\n"); 2878 return (err); 2879 } 2880 #ifdef WPI_BLUE_COEXISTENCE 2881 /* configure bluetooth coexistence */ 2882 (void) memset(&bluetooth, 0, sizeof (bluetooth)); 2883 bluetooth.flags = 3; 2884 bluetooth.lead = 0xaa; 2885 bluetooth.kill = 1; 2886 err = wpi_cmd(sc, WPI_CMD_BLUETOOTH, &bluetooth, 2887 sizeof (bluetooth), 0); 2888 if (err != WPI_SUCCESS) { 2889 cmn_err(CE_WARN, 2890 "wpi_config(): " 2891 "failed to configurate bluetooth coexistence\n"); 2892 return (err); 2893 } 2894 #endif 2895 /* configure adapter */ 2896 (void) memset(&sc->sc_config, 0, sizeof (wpi_config_t)); 2897 IEEE80211_ADDR_COPY(sc->sc_config.myaddr, ic->ic_macaddr); 2898 sc->sc_config.chan = ieee80211_chan2ieee(ic, ic->ic_curchan); 2899 sc->sc_config.flags = LE_32(WPI_CONFIG_TSF | WPI_CONFIG_AUTO | 2900 WPI_CONFIG_24GHZ); 2901 sc->sc_config.filter = 0; 2902 switch (ic->ic_opmode) { 2903 case IEEE80211_M_STA: 2904 sc->sc_config.mode = WPI_MODE_STA; 2905 sc->sc_config.filter |= LE_32(WPI_FILTER_MULTICAST); 2906 break; 2907 case IEEE80211_M_IBSS: 2908 case IEEE80211_M_AHDEMO: 2909 sc->sc_config.mode = WPI_MODE_IBSS; 2910 break; 2911 case IEEE80211_M_HOSTAP: 2912 sc->sc_config.mode = WPI_MODE_HOSTAP; 2913 break; 2914 case IEEE80211_M_MONITOR: 2915 sc->sc_config.mode = WPI_MODE_MONITOR; 2916 sc->sc_config.filter |= LE_32(WPI_FILTER_MULTICAST | 2917 WPI_FILTER_CTL | WPI_FILTER_PROMISC); 2918 break; 2919 } 2920 sc->sc_config.cck_mask = 0x0f; /* not yet negotiated */ 2921 sc->sc_config.ofdm_mask = 0xff; /* not yet negotiated */ 2922 err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config, 2923 sizeof (wpi_config_t), 0); 2924 if (err != WPI_SUCCESS) { 2925 cmn_err(CE_WARN, "wpi_config(): " 2926 "failed to set configure command\n"); 2927 return (err); 2928 } 2929 2930 /* add broadcast node */ 2931 (void) memset(&node, 0, sizeof (node)); 2932 (void) memset(node.bssid, 0xff, 6); 2933 node.id = WPI_ID_BROADCAST; 2934 node.rate = wpi_plcp_signal(2); 2935 err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 0); 2936 if (err != WPI_SUCCESS) { 2937 cmn_err(CE_WARN, "wpi_config(): " 2938 "failed to add broadcast node\n"); 2939 return (err); 2940 } 2941 2942 return (WPI_SUCCESS); 2943 } 2944 2945 static void 2946 wpi_stop_master(wpi_sc_t *sc) 2947 { 2948 uint32_t tmp; 2949 int ntries; 2950 2951 tmp = WPI_READ(sc, WPI_RESET); 2952 WPI_WRITE(sc, WPI_RESET, tmp | WPI_STOP_MASTER); 2953 2954 tmp = WPI_READ(sc, WPI_GPIO_CTL); 2955 if ((tmp & WPI_GPIO_PWR_STATUS) == WPI_GPIO_PWR_SLEEP) 2956 return; /* already asleep */ 2957 2958 for (ntries = 0; ntries < 2000; ntries++) { 2959 if (WPI_READ(sc, WPI_RESET) & WPI_MASTER_DISABLED) 2960 break; 2961 DELAY(1000); 2962 } 2963 if (ntries == 2000) 2964 WPI_DBG((WPI_DEBUG_HW, "timeout waiting for master\n")); 2965 } 2966 2967 static int 2968 wpi_power_up(wpi_sc_t *sc) 2969 { 2970 uint32_t tmp; 2971 int ntries; 2972 2973 wpi_mem_lock(sc); 2974 tmp = wpi_mem_read(sc, WPI_MEM_POWER); 2975 wpi_mem_write(sc, WPI_MEM_POWER, tmp & ~0x03000000); 2976 wpi_mem_unlock(sc); 2977 2978 for (ntries = 0; ntries < 5000; ntries++) { 2979 if (WPI_READ(sc, WPI_GPIO_STATUS) & WPI_POWERED) 2980 break; 2981 DELAY(10); 2982 } 2983 if (ntries == 5000) { 2984 cmn_err(CE_WARN, 2985 "wpi_power_up(): timeout waiting for NIC to power up\n"); 2986 return (ETIMEDOUT); 2987 } 2988 return (WPI_SUCCESS); 2989 } 2990 2991 static int 2992 wpi_reset(wpi_sc_t *sc) 2993 { 2994 uint32_t tmp; 2995 int ntries; 2996 2997 /* clear any pending interrupts */ 2998 WPI_WRITE(sc, WPI_INTR, 0xffffffff); 2999 3000 tmp = WPI_READ(sc, WPI_PLL_CTL); 3001 WPI_WRITE(sc, WPI_PLL_CTL, tmp | WPI_PLL_INIT); 3002 3003 tmp = WPI_READ(sc, WPI_CHICKEN); 3004 WPI_WRITE(sc, WPI_CHICKEN, tmp | WPI_CHICKEN_RXNOLOS); 3005 3006 tmp = WPI_READ(sc, WPI_GPIO_CTL); 3007 WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_INIT); 3008 3009 /* wait for clock stabilization */ 3010 for (ntries = 0; ntries < 1000; ntries++) { 3011 if (WPI_READ(sc, WPI_GPIO_CTL) & WPI_GPIO_CLOCK) 3012 break; 3013 DELAY(10); 3014 } 3015 if (ntries == 1000) { 3016 cmn_err(CE_WARN, 3017 "wpi_reset(): timeout waiting for clock stabilization\n"); 3018 return (ETIMEDOUT); 3019 } 3020 3021 /* initialize EEPROM */ 3022 tmp = WPI_READ(sc, WPI_EEPROM_STATUS); 3023 if ((tmp & WPI_EEPROM_VERSION) == 0) { 3024 cmn_err(CE_WARN, "wpi_reset(): EEPROM not found\n"); 3025 return (EIO); 3026 } 3027 WPI_WRITE(sc, WPI_EEPROM_STATUS, tmp & ~WPI_EEPROM_LOCKED); 3028 3029 return (WPI_SUCCESS); 3030 } 3031 3032 static void 3033 wpi_hw_config(wpi_sc_t *sc) 3034 { 3035 uint16_t val; 3036 uint32_t hw; 3037 3038 /* voodoo from the Linux "driver".. */ 3039 hw = WPI_READ(sc, WPI_HWCONFIG); 3040 3041 if ((sc->sc_rev & 0xc0) == 0x40) 3042 hw |= WPI_HW_ALM_MB; 3043 else if (!(sc->sc_rev & 0x80)) 3044 hw |= WPI_HW_ALM_MM; 3045 3046 val = wpi_read_prom_word(sc, WPI_EEPROM_CAPABILITIES); 3047 if ((val & 0xff) == 0x80) 3048 hw |= WPI_HW_SKU_MRC; 3049 3050 val = wpi_read_prom_word(sc, WPI_EEPROM_REVISION); 3051 hw &= ~WPI_HW_REV_D; 3052 if ((val & 0xf0) == 0xd0) 3053 hw |= WPI_HW_REV_D; 3054 3055 val = wpi_read_prom_word(sc, WPI_EEPROM_TYPE); 3056 if ((val & 0xff) > 1) 3057 hw |= WPI_HW_TYPE_B; 3058 3059 WPI_DBG((WPI_DEBUG_HW, "setting h/w config %x\n", hw)); 3060 WPI_WRITE(sc, WPI_HWCONFIG, hw); 3061 } 3062 3063 static int 3064 wpi_init(wpi_sc_t *sc) 3065 { 3066 uint32_t tmp; 3067 int qid, ntries, err; 3068 clock_t clk; 3069 3070 mutex_enter(&sc->sc_glock); 3071 sc->sc_flags &= ~WPI_F_FW_INIT; 3072 3073 (void) wpi_reset(sc); 3074 3075 wpi_mem_lock(sc); 3076 wpi_mem_write(sc, WPI_MEM_CLOCK1, 0xa00); 3077 DELAY(20); 3078 tmp = wpi_mem_read(sc, WPI_MEM_PCIDEV); 3079 wpi_mem_write(sc, WPI_MEM_PCIDEV, tmp | 0x800); 3080 wpi_mem_unlock(sc); 3081 3082 (void) wpi_power_up(sc); 3083 wpi_hw_config(sc); 3084 3085 tmp = WPI_READ(sc, WPI_GPIO_CTL); 3086 if (!(tmp & WPI_GPIO_HW_RF_KILL)) { 3087 cmn_err(CE_WARN, "wpi_init(): Radio transmitter is off\n"); 3088 goto fail1; 3089 } 3090 3091 /* init Rx ring */ 3092 wpi_mem_lock(sc); 3093 WPI_WRITE(sc, WPI_RX_BASE, sc->sc_rxq.dma_desc.cookie.dmac_address); 3094 WPI_WRITE(sc, WPI_RX_RIDX_PTR, 3095 (uint32_t)(sc->sc_dma_sh.cookie.dmac_address + 3096 offsetof(wpi_shared_t, next))); 3097 WPI_WRITE(sc, WPI_RX_WIDX, (WPI_RX_RING_COUNT - 1) & (~7)); 3098 WPI_WRITE(sc, WPI_RX_CONFIG, 0xa9601010); 3099 wpi_mem_unlock(sc); 3100 3101 /* init Tx rings */ 3102 wpi_mem_lock(sc); 3103 wpi_mem_write(sc, WPI_MEM_MODE, 2); /* bypass mode */ 3104 wpi_mem_write(sc, WPI_MEM_RA, 1); /* enable RA0 */ 3105 wpi_mem_write(sc, WPI_MEM_TXCFG, 0x3f); /* enable all 6 Tx rings */ 3106 wpi_mem_write(sc, WPI_MEM_BYPASS1, 0x10000); 3107 wpi_mem_write(sc, WPI_MEM_BYPASS2, 0x30002); 3108 wpi_mem_write(sc, WPI_MEM_MAGIC4, 4); 3109 wpi_mem_write(sc, WPI_MEM_MAGIC5, 5); 3110 3111 WPI_WRITE(sc, WPI_TX_BASE_PTR, sc->sc_dma_sh.cookie.dmac_address); 3112 WPI_WRITE(sc, WPI_MSG_CONFIG, 0xffff05a5); 3113 3114 for (qid = 0; qid < 6; qid++) { 3115 WPI_WRITE(sc, WPI_TX_CTL(qid), 0); 3116 WPI_WRITE(sc, WPI_TX_BASE(qid), 0); 3117 WPI_WRITE(sc, WPI_TX_CONFIG(qid), 0x80200008); 3118 } 3119 wpi_mem_unlock(sc); 3120 3121 /* clear "radio off" and "disable command" bits (reversed logic) */ 3122 WPI_WRITE(sc, WPI_UCODE_CLR, WPI_RADIO_OFF); 3123 WPI_WRITE(sc, WPI_UCODE_CLR, WPI_DISABLE_CMD); 3124 3125 /* clear any pending interrupts */ 3126 WPI_WRITE(sc, WPI_INTR, 0xffffffff); 3127 3128 /* enable interrupts */ 3129 WPI_WRITE(sc, WPI_MASK, WPI_INTR_MASK); 3130 3131 /* load firmware boot code into NIC */ 3132 err = wpi_load_microcode(sc); 3133 if (err != WPI_SUCCESS) { 3134 cmn_err(CE_WARN, "wpi_init(): failed to load microcode\n"); 3135 goto fail1; 3136 } 3137 3138 /* load firmware .text segment into NIC */ 3139 err = wpi_load_firmware(sc, WPI_FW_TEXT); 3140 if (err != WPI_SUCCESS) { 3141 cmn_err(CE_WARN, "wpi_init(): " 3142 "failed to load firmware(text)\n"); 3143 goto fail1; 3144 } 3145 3146 /* load firmware .data segment into NIC */ 3147 err = wpi_load_firmware(sc, WPI_FW_DATA); 3148 if (err != WPI_SUCCESS) { 3149 cmn_err(CE_WARN, "wpi_init(): " 3150 "failed to load firmware(data)\n"); 3151 goto fail1; 3152 } 3153 3154 /* now press "execute" ;-) */ 3155 tmp = WPI_READ(sc, WPI_RESET); 3156 tmp &= ~(WPI_MASTER_DISABLED | WPI_STOP_MASTER | WPI_NEVO_RESET); 3157 WPI_WRITE(sc, WPI_RESET, tmp); 3158 3159 /* ..and wait at most one second for adapter to initialize */ 3160 clk = ddi_get_lbolt() + drv_usectohz(2000000); 3161 while (!(sc->sc_flags & WPI_F_FW_INIT)) { 3162 if (cv_timedwait(&sc->sc_fw_cv, &sc->sc_glock, clk) < 0) 3163 break; 3164 } 3165 if (!(sc->sc_flags & WPI_F_FW_INIT)) { 3166 cmn_err(CE_WARN, 3167 "wpi_init(): timeout waiting for firmware init\n"); 3168 goto fail1; 3169 } 3170 3171 /* wait for thermal sensors to calibrate */ 3172 for (ntries = 0; ntries < 1000; ntries++) { 3173 if (WPI_READ(sc, WPI_TEMPERATURE) != 0) 3174 break; 3175 DELAY(10); 3176 } 3177 3178 if (ntries == 1000) { 3179 WPI_DBG((WPI_DEBUG_HW, 3180 "wpi_init(): timeout waiting for thermal sensors " 3181 "calibration\n")); 3182 } 3183 3184 WPI_DBG((WPI_DEBUG_HW, "temperature %d\n", 3185 (int)WPI_READ(sc, WPI_TEMPERATURE))); 3186 3187 err = wpi_config(sc); 3188 if (err) { 3189 cmn_err(CE_WARN, "wpi_init(): failed to configure device\n"); 3190 goto fail1; 3191 } 3192 3193 mutex_exit(&sc->sc_glock); 3194 return (WPI_SUCCESS); 3195 3196 fail1: 3197 err = WPI_FAIL; 3198 mutex_exit(&sc->sc_glock); 3199 return (err); 3200 } 3201 3202 static void 3203 wpi_stop(wpi_sc_t *sc) 3204 { 3205 uint32_t tmp; 3206 int ac; 3207 3208 3209 mutex_enter(&sc->sc_glock); 3210 /* disable interrupts */ 3211 WPI_WRITE(sc, WPI_MASK, 0); 3212 WPI_WRITE(sc, WPI_INTR, WPI_INTR_MASK); 3213 WPI_WRITE(sc, WPI_INTR_STATUS, 0xff); 3214 WPI_WRITE(sc, WPI_INTR_STATUS, 0x00070000); 3215 3216 wpi_mem_lock(sc); 3217 wpi_mem_write(sc, WPI_MEM_MODE, 0); 3218 wpi_mem_unlock(sc); 3219 3220 /* reset all Tx rings */ 3221 for (ac = 0; ac < 4; ac++) 3222 wpi_reset_tx_ring(sc, &sc->sc_txq[ac]); 3223 wpi_reset_tx_ring(sc, &sc->sc_cmdq); 3224 wpi_reset_tx_ring(sc, &sc->sc_svcq); 3225 3226 /* reset Rx ring */ 3227 wpi_reset_rx_ring(sc); 3228 3229 wpi_mem_lock(sc); 3230 wpi_mem_write(sc, WPI_MEM_CLOCK2, 0x200); 3231 wpi_mem_unlock(sc); 3232 3233 DELAY(5); 3234 3235 wpi_stop_master(sc); 3236 3237 sc->sc_tx_timer = 0; 3238 tmp = WPI_READ(sc, WPI_RESET); 3239 WPI_WRITE(sc, WPI_RESET, tmp | WPI_SW_RESET); 3240 mutex_exit(&sc->sc_glock); 3241 } 3242 3243 /* 3244 * Naive implementation of the Adaptive Multi Rate Retry algorithm: 3245 * "IEEE 802.11 Rate Adaptation: A Practical Approach" 3246 * Mathieu Lacage, Hossein Manshaei, Thierry Turletti 3247 * INRIA Sophia - Projet Planete 3248 * http://www-sop.inria.fr/rapports/sophia/RR-5208.html 3249 */ 3250 #define is_success(amrr) \ 3251 ((amrr)->retrycnt < (amrr)->txcnt / 10) 3252 #define is_failure(amrr) \ 3253 ((amrr)->retrycnt > (amrr)->txcnt / 3) 3254 #define is_enough(amrr) \ 3255 ((amrr)->txcnt > 100) 3256 #define is_min_rate(in) \ 3257 ((in)->in_txrate == 0) 3258 #define is_max_rate(in) \ 3259 ((in)->in_txrate == (in)->in_rates.ir_nrates - 1) 3260 #define increase_rate(in) \ 3261 ((in)->in_txrate++) 3262 #define decrease_rate(in) \ 3263 ((in)->in_txrate--) 3264 #define reset_cnt(amrr) \ 3265 { (amrr)->txcnt = (amrr)->retrycnt = 0; } 3266 3267 #define WPI_AMRR_MIN_SUCCESS_THRESHOLD 1 3268 #define WPI_AMRR_MAX_SUCCESS_THRESHOLD 15 3269 3270 static void 3271 wpi_amrr_init(wpi_amrr_t *amrr) 3272 { 3273 amrr->success = 0; 3274 amrr->recovery = 0; 3275 amrr->txcnt = amrr->retrycnt = 0; 3276 amrr->success_threshold = WPI_AMRR_MIN_SUCCESS_THRESHOLD; 3277 } 3278 3279 static void 3280 wpi_amrr_timeout(wpi_sc_t *sc) 3281 { 3282 ieee80211com_t *ic = &sc->sc_ic; 3283 3284 WPI_DBG((WPI_DEBUG_RATECTL, "wpi_amrr_timeout() enter\n")); 3285 if (ic->ic_opmode == IEEE80211_M_STA) 3286 wpi_amrr_ratectl(NULL, ic->ic_bss); 3287 else 3288 ieee80211_iterate_nodes(&ic->ic_sta, wpi_amrr_ratectl, NULL); 3289 sc->sc_clk = ddi_get_lbolt(); 3290 } 3291 3292 /* ARGSUSED */ 3293 static void 3294 wpi_amrr_ratectl(void *arg, ieee80211_node_t *in) 3295 { 3296 wpi_amrr_t *amrr = (wpi_amrr_t *)in; 3297 int need_change = 0; 3298 3299 if (is_success(amrr) && is_enough(amrr)) { 3300 amrr->success++; 3301 if (amrr->success >= amrr->success_threshold && 3302 !is_max_rate(in)) { 3303 amrr->recovery = 1; 3304 amrr->success = 0; 3305 increase_rate(in); 3306 WPI_DBG((WPI_DEBUG_RATECTL, 3307 "AMRR increasing rate %d (txcnt=%d retrycnt=%d)\n", 3308 in->in_txrate, amrr->txcnt, amrr->retrycnt)); 3309 need_change = 1; 3310 } else { 3311 amrr->recovery = 0; 3312 } 3313 } else if (is_failure(amrr)) { 3314 amrr->success = 0; 3315 if (!is_min_rate(in)) { 3316 if (amrr->recovery) { 3317 amrr->success_threshold++; 3318 if (amrr->success_threshold > 3319 WPI_AMRR_MAX_SUCCESS_THRESHOLD) 3320 amrr->success_threshold = 3321 WPI_AMRR_MAX_SUCCESS_THRESHOLD; 3322 } else { 3323 amrr->success_threshold = 3324 WPI_AMRR_MIN_SUCCESS_THRESHOLD; 3325 } 3326 decrease_rate(in); 3327 WPI_DBG((WPI_DEBUG_RATECTL, 3328 "AMRR decreasing rate %d (txcnt=%d retrycnt=%d)\n", 3329 in->in_txrate, amrr->txcnt, amrr->retrycnt)); 3330 need_change = 1; 3331 } 3332 amrr->recovery = 0; /* paper is incorrect */ 3333 } 3334 3335 if (is_enough(amrr) || need_change) 3336 reset_cnt(amrr); 3337 } 3338