1 /* 2 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 /* 7 * Copyright (c) 2006 8 * Damien Bergamini <damien.bergamini@free.fr> 9 * 10 * Permission to use, copy, modify, and distribute this software for any 11 * purpose with or without fee is hereby granted, provided that the above 12 * copyright notice and this permission notice appear in all copies. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 15 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 16 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 17 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 18 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 19 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 20 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 21 */ 22 23 /* 24 * Driver for Intel PRO/Wireless 3945ABG 802.11 network adapters. 25 */ 26 27 #include <sys/types.h> 28 #include <sys/byteorder.h> 29 #include <sys/conf.h> 30 #include <sys/cmn_err.h> 31 #include <sys/stat.h> 32 #include <sys/ddi.h> 33 #include <sys/sunddi.h> 34 #include <sys/strsubr.h> 35 #include <sys/ethernet.h> 36 #include <inet/common.h> 37 #include <inet/nd.h> 38 #include <inet/mi.h> 39 #include <sys/note.h> 40 #include <sys/stream.h> 41 #include <sys/strsun.h> 42 #include <sys/modctl.h> 43 #include <sys/devops.h> 44 #include <sys/dlpi.h> 45 #include <sys/mac.h> 46 #include <sys/mac_wifi.h> 47 #include <sys/net80211.h> 48 #include <sys/net80211_proto.h> 49 #include <sys/varargs.h> 50 #include <sys/policy.h> 51 #include <sys/pci.h> 52 53 #include "wpireg.h" 54 #include "wpivar.h" 55 #include <inet/wifi_ioctl.h> 56 57 #ifdef DEBUG 58 #define WPI_DEBUG_80211 (1 << 0) 59 #define WPI_DEBUG_CMD (1 << 1) 60 #define WPI_DEBUG_DMA (1 << 2) 61 #define WPI_DEBUG_EEPROM (1 << 3) 62 #define WPI_DEBUG_FW (1 << 4) 63 #define WPI_DEBUG_HW (1 << 5) 64 #define WPI_DEBUG_INTR (1 << 6) 65 #define WPI_DEBUG_MRR (1 << 7) 66 #define WPI_DEBUG_PIO (1 << 8) 67 #define WPI_DEBUG_RX (1 << 9) 68 #define WPI_DEBUG_SCAN (1 << 10) 69 #define WPI_DEBUG_TX (1 << 11) 70 #define WPI_DEBUG_RATECTL (1 << 12) 71 #define WPI_DEBUG_RADIO (1 << 13) 72 #define WPI_DEBUG_RESUME (1 << 14) 73 uint32_t wpi_dbg_flags = 0; 74 #define WPI_DBG(x) \ 75 wpi_dbg x 76 #else 77 #define WPI_DBG(x) 78 #endif 79 80 static void *wpi_soft_state_p = NULL; 81 static uint8_t wpi_fw_bin [] = { 82 #include "fw-wpi/ipw3945.ucode.hex" 83 }; 84 85 /* DMA attributes for a shared page */ 86 static ddi_dma_attr_t sh_dma_attr = { 87 DMA_ATTR_V0, /* version of this structure */ 88 0, /* lowest usable address */ 89 0xffffffffU, /* highest usable address */ 90 0xffffffffU, /* maximum DMAable byte count */ 91 0x1000, /* alignment in bytes */ 92 0x1000, /* burst sizes (any?) */ 93 1, /* minimum transfer */ 94 0xffffffffU, /* maximum transfer */ 95 0xffffffffU, /* maximum segment length */ 96 1, /* maximum number of segments */ 97 1, /* granularity */ 98 0, /* flags (reserved) */ 99 }; 100 101 /* DMA attributes for a ring descriptor */ 102 static ddi_dma_attr_t ring_desc_dma_attr = { 103 DMA_ATTR_V0, /* version of this structure */ 104 0, /* lowest usable address */ 105 0xffffffffU, /* highest usable address */ 106 0xffffffffU, /* maximum DMAable byte count */ 107 0x4000, /* alignment in bytes */ 108 0x100, /* burst sizes (any?) */ 109 1, /* minimum transfer */ 110 0xffffffffU, /* maximum transfer */ 111 0xffffffffU, /* maximum segment length */ 112 1, /* maximum number of segments */ 113 1, /* granularity */ 114 0, /* flags (reserved) */ 115 }; 116 117 118 /* DMA attributes for a tx cmd */ 119 static ddi_dma_attr_t tx_cmd_dma_attr = { 120 DMA_ATTR_V0, /* version of this structure */ 121 0, /* lowest usable address */ 122 0xffffffffU, /* highest usable address */ 123 0xffffffffU, /* maximum DMAable byte count */ 124 4, /* alignment in bytes */ 125 0x100, /* burst sizes (any?) */ 126 1, /* minimum transfer */ 127 0xffffffffU, /* maximum transfer */ 128 0xffffffffU, /* maximum segment length */ 129 1, /* maximum number of segments */ 130 1, /* granularity */ 131 0, /* flags (reserved) */ 132 }; 133 134 /* DMA attributes for a rx buffer */ 135 static ddi_dma_attr_t rx_buffer_dma_attr = { 136 DMA_ATTR_V0, /* version of this structure */ 137 0, /* lowest usable address */ 138 0xffffffffU, /* highest usable address */ 139 0xffffffffU, /* maximum DMAable byte count */ 140 1, /* alignment in bytes */ 141 0x100, /* burst sizes (any?) */ 142 1, /* minimum transfer */ 143 0xffffffffU, /* maximum transfer */ 144 0xffffffffU, /* maximum segment length */ 145 1, /* maximum number of segments */ 146 1, /* granularity */ 147 0, /* flags (reserved) */ 148 }; 149 150 /* 151 * DMA attributes for a tx buffer. 152 * the maximum number of segments is 4 for the hardware. 153 * now all the wifi drivers put the whole frame in a single 154 * descriptor, so we define the maximum number of segments 4, 155 * just the same as the rx_buffer. we consider leverage the HW 156 * ability in the future, that is why we don't define rx and tx 157 * buffer_dma_attr as the same. 158 */ 159 static ddi_dma_attr_t tx_buffer_dma_attr = { 160 DMA_ATTR_V0, /* version of this structure */ 161 0, /* lowest usable address */ 162 0xffffffffU, /* highest usable address */ 163 0xffffffffU, /* maximum DMAable byte count */ 164 1, /* alignment in bytes */ 165 0x100, /* burst sizes (any?) */ 166 1, /* minimum transfer */ 167 0xffffffffU, /* maximum transfer */ 168 0xffffffffU, /* maximum segment length */ 169 1, /* maximum number of segments */ 170 1, /* granularity */ 171 0, /* flags (reserved) */ 172 }; 173 174 /* DMA attributes for a load firmware */ 175 static ddi_dma_attr_t fw_buffer_dma_attr = { 176 DMA_ATTR_V0, /* version of this structure */ 177 0, /* lowest usable address */ 178 0xffffffffU, /* highest usable address */ 179 0x7fffffff, /* maximum DMAable byte count */ 180 4, /* alignment in bytes */ 181 0x100, /* burst sizes (any?) */ 182 1, /* minimum transfer */ 183 0xffffffffU, /* maximum transfer */ 184 0xffffffffU, /* maximum segment length */ 185 4, /* maximum number of segments */ 186 1, /* granularity */ 187 0, /* flags (reserved) */ 188 }; 189 190 /* regs access attributes */ 191 static ddi_device_acc_attr_t wpi_reg_accattr = { 192 DDI_DEVICE_ATTR_V0, 193 DDI_STRUCTURE_LE_ACC, 194 DDI_STRICTORDER_ACC, 195 DDI_DEFAULT_ACC 196 }; 197 198 /* DMA access attributes */ 199 static ddi_device_acc_attr_t wpi_dma_accattr = { 200 DDI_DEVICE_ATTR_V0, 201 DDI_NEVERSWAP_ACC, 202 DDI_STRICTORDER_ACC, 203 DDI_DEFAULT_ACC 204 }; 205 206 static int wpi_ring_init(wpi_sc_t *); 207 static void wpi_ring_free(wpi_sc_t *); 208 static int wpi_alloc_shared(wpi_sc_t *); 209 static void wpi_free_shared(wpi_sc_t *); 210 static int wpi_alloc_fw_dma(wpi_sc_t *); 211 static void wpi_free_fw_dma(wpi_sc_t *); 212 static int wpi_alloc_rx_ring(wpi_sc_t *); 213 static void wpi_reset_rx_ring(wpi_sc_t *); 214 static void wpi_free_rx_ring(wpi_sc_t *); 215 static int wpi_alloc_tx_ring(wpi_sc_t *, wpi_tx_ring_t *, int, int); 216 static void wpi_reset_tx_ring(wpi_sc_t *, wpi_tx_ring_t *); 217 static void wpi_free_tx_ring(wpi_sc_t *, wpi_tx_ring_t *); 218 219 static ieee80211_node_t *wpi_node_alloc(ieee80211com_t *); 220 static void wpi_node_free(ieee80211_node_t *); 221 static int wpi_newstate(ieee80211com_t *, enum ieee80211_state, int); 222 static int wpi_key_set(ieee80211com_t *, const struct ieee80211_key *, 223 const uint8_t mac[IEEE80211_ADDR_LEN]); 224 static void wpi_mem_lock(wpi_sc_t *); 225 static void wpi_mem_unlock(wpi_sc_t *); 226 static uint32_t wpi_mem_read(wpi_sc_t *, uint16_t); 227 static void wpi_mem_write(wpi_sc_t *, uint16_t, uint32_t); 228 static void wpi_mem_write_region_4(wpi_sc_t *, uint16_t, 229 const uint32_t *, int); 230 static uint16_t wpi_read_prom_word(wpi_sc_t *, uint32_t); 231 static int wpi_load_microcode(wpi_sc_t *); 232 static int wpi_load_firmware(wpi_sc_t *, uint32_t); 233 static void wpi_rx_intr(wpi_sc_t *, wpi_rx_desc_t *, 234 wpi_rx_data_t *); 235 static void wpi_tx_intr(wpi_sc_t *, wpi_rx_desc_t *, 236 wpi_rx_data_t *); 237 static void wpi_cmd_intr(wpi_sc_t *, wpi_rx_desc_t *); 238 static uint_t wpi_intr(caddr_t); 239 static uint_t wpi_notif_softintr(caddr_t); 240 static uint8_t wpi_plcp_signal(int); 241 static void wpi_read_eeprom(wpi_sc_t *); 242 static int wpi_cmd(wpi_sc_t *, int, const void *, int, int); 243 static int wpi_mrr_setup(wpi_sc_t *); 244 static void wpi_set_led(wpi_sc_t *, uint8_t, uint8_t, uint8_t); 245 static int wpi_auth(wpi_sc_t *); 246 static int wpi_scan(wpi_sc_t *); 247 static int wpi_config(wpi_sc_t *); 248 static void wpi_stop_master(wpi_sc_t *); 249 static int wpi_power_up(wpi_sc_t *); 250 static int wpi_reset(wpi_sc_t *); 251 static void wpi_hw_config(wpi_sc_t *); 252 static int wpi_init(wpi_sc_t *); 253 static void wpi_stop(wpi_sc_t *); 254 static void wpi_amrr_init(wpi_amrr_t *); 255 static void wpi_amrr_timeout(wpi_sc_t *); 256 static void wpi_amrr_ratectl(void *, ieee80211_node_t *); 257 258 static int wpi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 259 static int wpi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 260 261 /* 262 * GLD specific operations 263 */ 264 static int wpi_m_stat(void *arg, uint_t stat, uint64_t *val); 265 static int wpi_m_start(void *arg); 266 static void wpi_m_stop(void *arg); 267 static int wpi_m_unicst(void *arg, const uint8_t *macaddr); 268 static int wpi_m_multicst(void *arg, boolean_t add, const uint8_t *m); 269 static int wpi_m_promisc(void *arg, boolean_t on); 270 static mblk_t *wpi_m_tx(void *arg, mblk_t *mp); 271 static void wpi_m_ioctl(void *arg, queue_t *wq, mblk_t *mp); 272 static int wpi_m_setprop(void *arg, const char *pr_name, 273 mac_prop_id_t wldp_pr_num, uint_t wldp_length, const void *wldp_buf); 274 static int wpi_m_getprop(void *arg, const char *pr_name, 275 mac_prop_id_t wldp_pr_num, uint_t pr_flags, uint_t wldp_lenth, 276 void *wldp_buf); 277 static void wpi_destroy_locks(wpi_sc_t *sc); 278 static int wpi_send(ieee80211com_t *ic, mblk_t *mp, uint8_t type); 279 static void wpi_thread(wpi_sc_t *sc); 280 281 /* 282 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 283 */ 284 static const struct ieee80211_rateset wpi_rateset_11b = 285 { 4, { 2, 4, 11, 22 } }; 286 287 static const struct ieee80211_rateset wpi_rateset_11g = 288 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 289 290 static const uint8_t wpi_ridx_to_signal[] = { 291 /* OFDM: IEEE Std 802.11a-1999, pp. 14 Table 80 */ 292 /* R1-R4 (ral/ural is R4-R1) */ 293 0xd, 0xf, 0x5, 0x7, 0x9, 0xb, 0x1, 0x3, 294 /* CCK: device-dependent */ 295 10, 20, 55, 110 296 }; 297 298 /* 299 * For mfthread only 300 */ 301 extern pri_t minclsyspri; 302 303 /* 304 * Module Loading Data & Entry Points 305 */ 306 DDI_DEFINE_STREAM_OPS(wpi_devops, nulldev, nulldev, wpi_attach, 307 wpi_detach, nodev, NULL, D_MP, NULL, ddi_quiesce_not_supported); 308 309 static struct modldrv wpi_modldrv = { 310 &mod_driverops, 311 "Intel(R) PRO/Wireless 3945ABG driver", 312 &wpi_devops 313 }; 314 315 static struct modlinkage wpi_modlinkage = { 316 MODREV_1, 317 &wpi_modldrv, 318 NULL 319 }; 320 321 int 322 _init(void) 323 { 324 int status; 325 326 status = ddi_soft_state_init(&wpi_soft_state_p, 327 sizeof (wpi_sc_t), 1); 328 if (status != DDI_SUCCESS) 329 return (status); 330 331 mac_init_ops(&wpi_devops, "wpi"); 332 status = mod_install(&wpi_modlinkage); 333 if (status != DDI_SUCCESS) { 334 mac_fini_ops(&wpi_devops); 335 ddi_soft_state_fini(&wpi_soft_state_p); 336 } 337 338 return (status); 339 } 340 341 int 342 _fini(void) 343 { 344 int status; 345 346 status = mod_remove(&wpi_modlinkage); 347 if (status == DDI_SUCCESS) { 348 mac_fini_ops(&wpi_devops); 349 ddi_soft_state_fini(&wpi_soft_state_p); 350 } 351 352 return (status); 353 } 354 355 int 356 _info(struct modinfo *mip) 357 { 358 return (mod_info(&wpi_modlinkage, mip)); 359 } 360 361 /* 362 * Mac Call Back entries 363 */ 364 mac_callbacks_t wpi_m_callbacks = { 365 MC_IOCTL | MC_SETPROP | MC_GETPROP, 366 wpi_m_stat, 367 wpi_m_start, 368 wpi_m_stop, 369 wpi_m_promisc, 370 wpi_m_multicst, 371 wpi_m_unicst, 372 wpi_m_tx, 373 NULL, 374 wpi_m_ioctl, 375 NULL, 376 NULL, 377 NULL, 378 wpi_m_setprop, 379 wpi_m_getprop 380 }; 381 382 #ifdef DEBUG 383 void 384 wpi_dbg(uint32_t flags, const char *fmt, ...) 385 { 386 va_list ap; 387 388 if (flags & wpi_dbg_flags) { 389 va_start(ap, fmt); 390 vcmn_err(CE_NOTE, fmt, ap); 391 va_end(ap); 392 } 393 } 394 #endif 395 /* 396 * device operations 397 */ 398 int 399 wpi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 400 { 401 wpi_sc_t *sc; 402 ddi_acc_handle_t cfg_handle; 403 caddr_t cfg_base; 404 ieee80211com_t *ic; 405 int instance, err, i; 406 char strbuf[32]; 407 wifi_data_t wd = { 0 }; 408 mac_register_t *macp; 409 410 switch (cmd) { 411 case DDI_ATTACH: 412 break; 413 case DDI_RESUME: 414 sc = ddi_get_soft_state(wpi_soft_state_p, 415 ddi_get_instance(dip)); 416 ASSERT(sc != NULL); 417 mutex_enter(&sc->sc_glock); 418 sc->sc_flags &= ~WPI_F_SUSPEND; 419 mutex_exit(&sc->sc_glock); 420 if (sc->sc_flags & WPI_F_RUNNING) { 421 (void) wpi_init(sc); 422 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1); 423 } 424 WPI_DBG((WPI_DEBUG_RESUME, "wpi: resume \n")); 425 return (DDI_SUCCESS); 426 default: 427 err = DDI_FAILURE; 428 goto attach_fail1; 429 } 430 431 instance = ddi_get_instance(dip); 432 err = ddi_soft_state_zalloc(wpi_soft_state_p, instance); 433 if (err != DDI_SUCCESS) { 434 cmn_err(CE_WARN, 435 "wpi_attach(): failed to allocate soft state\n"); 436 goto attach_fail1; 437 } 438 sc = ddi_get_soft_state(wpi_soft_state_p, instance); 439 sc->sc_dip = dip; 440 441 err = ddi_regs_map_setup(dip, 0, &cfg_base, 0, 0, 442 &wpi_reg_accattr, &cfg_handle); 443 if (err != DDI_SUCCESS) { 444 cmn_err(CE_WARN, 445 "wpi_attach(): failed to map config spaces regs\n"); 446 goto attach_fail2; 447 } 448 sc->sc_rev = ddi_get8(cfg_handle, 449 (uint8_t *)(cfg_base + PCI_CONF_REVID)); 450 ddi_put8(cfg_handle, (uint8_t *)(cfg_base + 0x41), 0); 451 sc->sc_clsz = ddi_get16(cfg_handle, 452 (uint16_t *)(cfg_base + PCI_CONF_CACHE_LINESZ)); 453 ddi_regs_map_free(&cfg_handle); 454 if (!sc->sc_clsz) 455 sc->sc_clsz = 16; 456 sc->sc_clsz = (sc->sc_clsz << 2); 457 sc->sc_dmabuf_sz = roundup(0x1000 + sizeof (struct ieee80211_frame) + 458 IEEE80211_MTU + IEEE80211_CRC_LEN + 459 (IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN + 460 IEEE80211_WEP_CRCLEN), sc->sc_clsz); 461 /* 462 * Map operating registers 463 */ 464 err = ddi_regs_map_setup(dip, 1, &sc->sc_base, 465 0, 0, &wpi_reg_accattr, &sc->sc_handle); 466 if (err != DDI_SUCCESS) { 467 cmn_err(CE_WARN, 468 "wpi_attach(): failed to map device regs\n"); 469 goto attach_fail2; 470 } 471 472 /* 473 * Allocate shared page. 474 */ 475 err = wpi_alloc_shared(sc); 476 if (err != DDI_SUCCESS) { 477 cmn_err(CE_WARN, "failed to allocate shared page\n"); 478 goto attach_fail3; 479 } 480 481 /* 482 * Get the hw conf, including MAC address, then init all rings. 483 */ 484 wpi_read_eeprom(sc); 485 err = wpi_ring_init(sc); 486 if (err != DDI_SUCCESS) { 487 cmn_err(CE_WARN, "wpi_attach(): " 488 "failed to allocate and initialize ring\n"); 489 goto attach_fail4; 490 } 491 492 sc->sc_hdr = (const wpi_firmware_hdr_t *)wpi_fw_bin; 493 494 /* firmware image layout: |HDR|<--TEXT-->|<--DATA-->|<--BOOT-->| */ 495 sc->sc_text = (const char *)(sc->sc_hdr + 1); 496 sc->sc_data = sc->sc_text + LE_32(sc->sc_hdr->textsz); 497 sc->sc_boot = sc->sc_data + LE_32(sc->sc_hdr->datasz); 498 err = wpi_alloc_fw_dma(sc); 499 if (err != DDI_SUCCESS) { 500 cmn_err(CE_WARN, "wpi_attach(): " 501 "failed to allocate firmware dma\n"); 502 goto attach_fail5; 503 } 504 505 /* 506 * Initialize mutexs and condvars 507 */ 508 err = ddi_get_iblock_cookie(dip, 0, &sc->sc_iblk); 509 if (err != DDI_SUCCESS) { 510 cmn_err(CE_WARN, 511 "wpi_attach(): failed to do ddi_get_iblock_cookie()\n"); 512 goto attach_fail6; 513 } 514 mutex_init(&sc->sc_glock, NULL, MUTEX_DRIVER, sc->sc_iblk); 515 mutex_init(&sc->sc_tx_lock, NULL, MUTEX_DRIVER, sc->sc_iblk); 516 cv_init(&sc->sc_fw_cv, NULL, CV_DRIVER, NULL); 517 cv_init(&sc->sc_cmd_cv, NULL, CV_DRIVER, NULL); 518 519 /* 520 * initialize the mfthread 521 */ 522 mutex_init(&sc->sc_mt_lock, NULL, MUTEX_DRIVER, 523 (void *) sc->sc_iblk); 524 cv_init(&sc->sc_mt_cv, NULL, CV_DRIVER, NULL); 525 sc->sc_mf_thread = NULL; 526 sc->sc_mf_thread_switch = 0; 527 /* 528 * Initialize the wifi part, which will be used by 529 * generic layer 530 */ 531 ic = &sc->sc_ic; 532 ic->ic_phytype = IEEE80211_T_OFDM; 533 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 534 ic->ic_state = IEEE80211_S_INIT; 535 ic->ic_maxrssi = 70; /* experimental number */ 536 ic->ic_caps = IEEE80211_C_SHPREAMBLE | IEEE80211_C_TXPMGT | 537 IEEE80211_C_PMGT | IEEE80211_C_SHSLOT; 538 539 /* 540 * use software WEP and TKIP, hardware CCMP; 541 */ 542 ic->ic_caps |= IEEE80211_C_AES_CCM; 543 ic->ic_caps |= IEEE80211_C_WPA; /* Support WPA/WPA2 */ 544 545 /* set supported .11b and .11g rates */ 546 ic->ic_sup_rates[IEEE80211_MODE_11B] = wpi_rateset_11b; 547 ic->ic_sup_rates[IEEE80211_MODE_11G] = wpi_rateset_11g; 548 549 /* set supported .11b and .11g channels (1 through 14) */ 550 for (i = 1; i <= 14; i++) { 551 ic->ic_sup_channels[i].ich_freq = 552 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 553 ic->ic_sup_channels[i].ich_flags = 554 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 555 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ | 556 IEEE80211_CHAN_PASSIVE; 557 } 558 ic->ic_ibss_chan = &ic->ic_sup_channels[0]; 559 ic->ic_xmit = wpi_send; 560 /* 561 * init Wifi layer 562 */ 563 ieee80211_attach(ic); 564 565 /* register WPA door */ 566 ieee80211_register_door(ic, ddi_driver_name(dip), 567 ddi_get_instance(dip)); 568 569 /* 570 * Override 80211 default routines 571 */ 572 sc->sc_newstate = ic->ic_newstate; 573 ic->ic_newstate = wpi_newstate; 574 ic->ic_node_alloc = wpi_node_alloc; 575 ic->ic_node_free = wpi_node_free; 576 ic->ic_crypto.cs_key_set = wpi_key_set; 577 ieee80211_media_init(ic); 578 /* 579 * initialize default tx key 580 */ 581 ic->ic_def_txkey = 0; 582 583 err = ddi_add_softintr(dip, DDI_SOFTINT_LOW, 584 &sc->sc_notif_softint_id, &sc->sc_iblk, NULL, wpi_notif_softintr, 585 (caddr_t)sc); 586 if (err != DDI_SUCCESS) { 587 cmn_err(CE_WARN, 588 "wpi_attach(): failed to do ddi_add_softintr()\n"); 589 goto attach_fail7; 590 } 591 592 /* 593 * Add the interrupt handler 594 */ 595 err = ddi_add_intr(dip, 0, &sc->sc_iblk, NULL, 596 wpi_intr, (caddr_t)sc); 597 if (err != DDI_SUCCESS) { 598 cmn_err(CE_WARN, 599 "wpi_attach(): failed to do ddi_add_intr()\n"); 600 goto attach_fail8; 601 } 602 603 /* 604 * Initialize pointer to device specific functions 605 */ 606 wd.wd_secalloc = WIFI_SEC_NONE; 607 wd.wd_opmode = ic->ic_opmode; 608 IEEE80211_ADDR_COPY(wd.wd_bssid, ic->ic_macaddr); 609 610 macp = mac_alloc(MAC_VERSION); 611 if (err != DDI_SUCCESS) { 612 cmn_err(CE_WARN, 613 "wpi_attach(): failed to do mac_alloc()\n"); 614 goto attach_fail9; 615 } 616 617 macp->m_type_ident = MAC_PLUGIN_IDENT_WIFI; 618 macp->m_driver = sc; 619 macp->m_dip = dip; 620 macp->m_src_addr = ic->ic_macaddr; 621 macp->m_callbacks = &wpi_m_callbacks; 622 macp->m_min_sdu = 0; 623 macp->m_max_sdu = IEEE80211_MTU; 624 macp->m_pdata = &wd; 625 macp->m_pdata_size = sizeof (wd); 626 627 /* 628 * Register the macp to mac 629 */ 630 err = mac_register(macp, &ic->ic_mach); 631 mac_free(macp); 632 if (err != DDI_SUCCESS) { 633 cmn_err(CE_WARN, 634 "wpi_attach(): failed to do mac_register()\n"); 635 goto attach_fail9; 636 } 637 638 /* 639 * Create minor node of type DDI_NT_NET_WIFI 640 */ 641 (void) snprintf(strbuf, sizeof (strbuf), "wpi%d", instance); 642 err = ddi_create_minor_node(dip, strbuf, S_IFCHR, 643 instance + 1, DDI_NT_NET_WIFI, 0); 644 if (err != DDI_SUCCESS) 645 cmn_err(CE_WARN, 646 "wpi_attach(): failed to do ddi_create_minor_node()\n"); 647 648 /* 649 * Notify link is down now 650 */ 651 mac_link_update(ic->ic_mach, LINK_STATE_DOWN); 652 653 /* 654 * create the mf thread to handle the link status, 655 * recovery fatal error, etc. 656 */ 657 658 sc->sc_mf_thread_switch = 1; 659 if (sc->sc_mf_thread == NULL) 660 sc->sc_mf_thread = thread_create((caddr_t)NULL, 0, 661 wpi_thread, sc, 0, &p0, TS_RUN, minclsyspri); 662 663 sc->sc_flags |= WPI_F_ATTACHED; 664 665 return (DDI_SUCCESS); 666 attach_fail9: 667 ddi_remove_intr(dip, 0, sc->sc_iblk); 668 attach_fail8: 669 ddi_remove_softintr(sc->sc_notif_softint_id); 670 sc->sc_notif_softint_id = NULL; 671 attach_fail7: 672 ieee80211_detach(ic); 673 wpi_destroy_locks(sc); 674 attach_fail6: 675 wpi_free_fw_dma(sc); 676 attach_fail5: 677 wpi_ring_free(sc); 678 attach_fail4: 679 wpi_free_shared(sc); 680 attach_fail3: 681 ddi_regs_map_free(&sc->sc_handle); 682 attach_fail2: 683 ddi_soft_state_free(wpi_soft_state_p, instance); 684 attach_fail1: 685 return (err); 686 } 687 688 int 689 wpi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 690 { 691 wpi_sc_t *sc; 692 int err; 693 694 sc = ddi_get_soft_state(wpi_soft_state_p, ddi_get_instance(dip)); 695 ASSERT(sc != NULL); 696 697 switch (cmd) { 698 case DDI_DETACH: 699 break; 700 case DDI_SUSPEND: 701 if (sc->sc_flags & WPI_F_RUNNING) { 702 wpi_stop(sc); 703 } 704 mutex_enter(&sc->sc_glock); 705 sc->sc_flags |= WPI_F_SUSPEND; 706 mutex_exit(&sc->sc_glock); 707 WPI_DBG((WPI_DEBUG_RESUME, "wpi: suspend \n")); 708 return (DDI_SUCCESS); 709 default: 710 return (DDI_FAILURE); 711 } 712 if (!(sc->sc_flags & WPI_F_ATTACHED)) 713 return (DDI_FAILURE); 714 715 err = mac_disable(sc->sc_ic.ic_mach); 716 if (err != DDI_SUCCESS) 717 return (err); 718 719 /* 720 * Destroy the mf_thread 721 */ 722 mutex_enter(&sc->sc_mt_lock); 723 sc->sc_mf_thread_switch = 0; 724 while (sc->sc_mf_thread != NULL) { 725 if (cv_wait_sig(&sc->sc_mt_cv, &sc->sc_mt_lock) == 0) 726 break; 727 } 728 mutex_exit(&sc->sc_mt_lock); 729 730 wpi_stop(sc); 731 732 /* 733 * Unregiste from the MAC layer subsystem 734 */ 735 (void) mac_unregister(sc->sc_ic.ic_mach); 736 737 mutex_enter(&sc->sc_glock); 738 wpi_free_fw_dma(sc); 739 wpi_ring_free(sc); 740 wpi_free_shared(sc); 741 mutex_exit(&sc->sc_glock); 742 743 ddi_remove_intr(dip, 0, sc->sc_iblk); 744 ddi_remove_softintr(sc->sc_notif_softint_id); 745 sc->sc_notif_softint_id = NULL; 746 747 /* 748 * detach ieee80211 749 */ 750 ieee80211_detach(&sc->sc_ic); 751 752 wpi_destroy_locks(sc); 753 754 ddi_regs_map_free(&sc->sc_handle); 755 ddi_remove_minor_node(dip, NULL); 756 ddi_soft_state_free(wpi_soft_state_p, ddi_get_instance(dip)); 757 758 return (DDI_SUCCESS); 759 } 760 761 static void 762 wpi_destroy_locks(wpi_sc_t *sc) 763 { 764 cv_destroy(&sc->sc_mt_cv); 765 mutex_destroy(&sc->sc_mt_lock); 766 cv_destroy(&sc->sc_cmd_cv); 767 cv_destroy(&sc->sc_fw_cv); 768 mutex_destroy(&sc->sc_tx_lock); 769 mutex_destroy(&sc->sc_glock); 770 } 771 772 /* 773 * Allocate an area of memory and a DMA handle for accessing it 774 */ 775 static int 776 wpi_alloc_dma_mem(wpi_sc_t *sc, size_t memsize, ddi_dma_attr_t *dma_attr_p, 777 ddi_device_acc_attr_t *acc_attr_p, uint_t dma_flags, wpi_dma_t *dma_p) 778 { 779 caddr_t vaddr; 780 int err; 781 782 /* 783 * Allocate handle 784 */ 785 err = ddi_dma_alloc_handle(sc->sc_dip, dma_attr_p, 786 DDI_DMA_SLEEP, NULL, &dma_p->dma_hdl); 787 if (err != DDI_SUCCESS) { 788 dma_p->dma_hdl = NULL; 789 return (DDI_FAILURE); 790 } 791 792 /* 793 * Allocate memory 794 */ 795 err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, acc_attr_p, 796 dma_flags & (DDI_DMA_CONSISTENT | DDI_DMA_STREAMING), 797 DDI_DMA_SLEEP, NULL, &vaddr, &dma_p->alength, &dma_p->acc_hdl); 798 if (err != DDI_SUCCESS) { 799 ddi_dma_free_handle(&dma_p->dma_hdl); 800 dma_p->dma_hdl = NULL; 801 dma_p->acc_hdl = NULL; 802 return (DDI_FAILURE); 803 } 804 805 /* 806 * Bind the two together 807 */ 808 dma_p->mem_va = vaddr; 809 err = ddi_dma_addr_bind_handle(dma_p->dma_hdl, NULL, 810 vaddr, dma_p->alength, dma_flags, DDI_DMA_SLEEP, NULL, 811 &dma_p->cookie, &dma_p->ncookies); 812 if (err != DDI_DMA_MAPPED) { 813 ddi_dma_mem_free(&dma_p->acc_hdl); 814 ddi_dma_free_handle(&dma_p->dma_hdl); 815 dma_p->acc_hdl = NULL; 816 dma_p->dma_hdl = NULL; 817 return (DDI_FAILURE); 818 } 819 820 dma_p->nslots = ~0U; 821 dma_p->size = ~0U; 822 dma_p->token = ~0U; 823 dma_p->offset = 0; 824 return (DDI_SUCCESS); 825 } 826 827 /* 828 * Free one allocated area of DMAable memory 829 */ 830 static void 831 wpi_free_dma_mem(wpi_dma_t *dma_p) 832 { 833 if (dma_p->dma_hdl != NULL) { 834 if (dma_p->ncookies) { 835 (void) ddi_dma_unbind_handle(dma_p->dma_hdl); 836 dma_p->ncookies = 0; 837 } 838 ddi_dma_free_handle(&dma_p->dma_hdl); 839 dma_p->dma_hdl = NULL; 840 } 841 842 if (dma_p->acc_hdl != NULL) { 843 ddi_dma_mem_free(&dma_p->acc_hdl); 844 dma_p->acc_hdl = NULL; 845 } 846 } 847 848 /* 849 * Allocate an area of dma memory for firmware load. 850 * Idealy, this allocation should be a one time action, that is, 851 * the memory will be freed after the firmware is uploaded to the 852 * card. but since a recovery mechanism for the fatal firmware need 853 * reload the firmware, and re-allocate dma at run time may be failed, 854 * so we allocate it at attach and keep it in the whole lifecycle of 855 * the driver. 856 */ 857 static int 858 wpi_alloc_fw_dma(wpi_sc_t *sc) 859 { 860 int i, err = DDI_SUCCESS; 861 wpi_dma_t *dma_p; 862 863 err = wpi_alloc_dma_mem(sc, LE_32(sc->sc_hdr->textsz), 864 &fw_buffer_dma_attr, &wpi_dma_accattr, 865 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 866 &sc->sc_dma_fw_text); 867 dma_p = &sc->sc_dma_fw_text; 868 WPI_DBG((WPI_DEBUG_DMA, "ncookies:%d addr1:%x size1:%x\n", 869 dma_p->ncookies, dma_p->cookie.dmac_address, 870 dma_p->cookie.dmac_size)); 871 if (err != DDI_SUCCESS) { 872 cmn_err(CE_WARN, "wpi_alloc_fw_dma(): failed to alloc" 873 "text dma memory"); 874 goto fail; 875 } 876 for (i = 0; i < dma_p->ncookies; i++) { 877 sc->sc_fw_text_cookie[i] = dma_p->cookie; 878 ddi_dma_nextcookie(dma_p->dma_hdl, &dma_p->cookie); 879 } 880 err = wpi_alloc_dma_mem(sc, LE_32(sc->sc_hdr->datasz), 881 &fw_buffer_dma_attr, &wpi_dma_accattr, 882 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 883 &sc->sc_dma_fw_data); 884 dma_p = &sc->sc_dma_fw_data; 885 WPI_DBG((WPI_DEBUG_DMA, "ncookies:%d addr1:%x size1:%x\n", 886 dma_p->ncookies, dma_p->cookie.dmac_address, 887 dma_p->cookie.dmac_size)); 888 if (err != DDI_SUCCESS) { 889 cmn_err(CE_WARN, "wpi_alloc_fw_dma(): failed to alloc" 890 "data dma memory"); 891 goto fail; 892 } 893 for (i = 0; i < dma_p->ncookies; i++) { 894 sc->sc_fw_data_cookie[i] = dma_p->cookie; 895 ddi_dma_nextcookie(dma_p->dma_hdl, &dma_p->cookie); 896 } 897 fail: 898 return (err); 899 } 900 901 static void 902 wpi_free_fw_dma(wpi_sc_t *sc) 903 { 904 wpi_free_dma_mem(&sc->sc_dma_fw_text); 905 wpi_free_dma_mem(&sc->sc_dma_fw_data); 906 } 907 908 /* 909 * Allocate a shared page between host and NIC. 910 */ 911 static int 912 wpi_alloc_shared(wpi_sc_t *sc) 913 { 914 int err = DDI_SUCCESS; 915 916 /* must be aligned on a 4K-page boundary */ 917 err = wpi_alloc_dma_mem(sc, sizeof (wpi_shared_t), 918 &sh_dma_attr, &wpi_dma_accattr, 919 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 920 &sc->sc_dma_sh); 921 if (err != DDI_SUCCESS) 922 goto fail; 923 sc->sc_shared = (wpi_shared_t *)sc->sc_dma_sh.mem_va; 924 return (err); 925 926 fail: 927 wpi_free_shared(sc); 928 return (err); 929 } 930 931 static void 932 wpi_free_shared(wpi_sc_t *sc) 933 { 934 wpi_free_dma_mem(&sc->sc_dma_sh); 935 } 936 937 static int 938 wpi_alloc_rx_ring(wpi_sc_t *sc) 939 { 940 wpi_rx_ring_t *ring; 941 wpi_rx_data_t *data; 942 int i, err = DDI_SUCCESS; 943 944 ring = &sc->sc_rxq; 945 ring->cur = 0; 946 947 err = wpi_alloc_dma_mem(sc, WPI_RX_RING_COUNT * sizeof (uint32_t), 948 &ring_desc_dma_attr, &wpi_dma_accattr, 949 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 950 &ring->dma_desc); 951 if (err != DDI_SUCCESS) { 952 WPI_DBG((WPI_DEBUG_DMA, "dma alloc rx ring desc failed\n")); 953 goto fail; 954 } 955 ring->desc = (uint32_t *)ring->dma_desc.mem_va; 956 957 /* 958 * Allocate Rx buffers. 959 */ 960 for (i = 0; i < WPI_RX_RING_COUNT; i++) { 961 data = &ring->data[i]; 962 err = wpi_alloc_dma_mem(sc, sc->sc_dmabuf_sz, 963 &rx_buffer_dma_attr, &wpi_dma_accattr, 964 DDI_DMA_READ | DDI_DMA_STREAMING, 965 &data->dma_data); 966 if (err != DDI_SUCCESS) { 967 WPI_DBG((WPI_DEBUG_DMA, "dma alloc rx ring buf[%d] " 968 "failed\n", i)); 969 goto fail; 970 } 971 972 ring->desc[i] = LE_32(data->dma_data.cookie.dmac_address); 973 } 974 975 WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV); 976 977 return (err); 978 979 fail: 980 wpi_free_rx_ring(sc); 981 return (err); 982 } 983 984 static void 985 wpi_reset_rx_ring(wpi_sc_t *sc) 986 { 987 int ntries; 988 989 wpi_mem_lock(sc); 990 991 WPI_WRITE(sc, WPI_RX_CONFIG, 0); 992 for (ntries = 0; ntries < 2000; ntries++) { 993 if (WPI_READ(sc, WPI_RX_STATUS) & WPI_RX_IDLE) 994 break; 995 DELAY(1000); 996 } 997 if (ntries == 2000) 998 WPI_DBG((WPI_DEBUG_DMA, "timeout resetting Rx ring\n")); 999 1000 wpi_mem_unlock(sc); 1001 1002 sc->sc_rxq.cur = 0; 1003 } 1004 1005 static void 1006 wpi_free_rx_ring(wpi_sc_t *sc) 1007 { 1008 int i; 1009 1010 for (i = 0; i < WPI_RX_RING_COUNT; i++) { 1011 if (sc->sc_rxq.data[i].dma_data.dma_hdl) 1012 WPI_DMA_SYNC(sc->sc_rxq.data[i].dma_data, 1013 DDI_DMA_SYNC_FORCPU); 1014 wpi_free_dma_mem(&sc->sc_rxq.data[i].dma_data); 1015 } 1016 1017 if (sc->sc_rxq.dma_desc.dma_hdl) 1018 WPI_DMA_SYNC(sc->sc_rxq.dma_desc, DDI_DMA_SYNC_FORDEV); 1019 wpi_free_dma_mem(&sc->sc_rxq.dma_desc); 1020 } 1021 1022 static int 1023 wpi_alloc_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring, int count, int qid) 1024 { 1025 wpi_tx_data_t *data; 1026 wpi_tx_desc_t *desc_h; 1027 uint32_t paddr_desc_h; 1028 wpi_tx_cmd_t *cmd_h; 1029 uint32_t paddr_cmd_h; 1030 int i, err = DDI_SUCCESS; 1031 1032 ring->qid = qid; 1033 ring->count = count; 1034 ring->queued = 0; 1035 ring->cur = 0; 1036 1037 err = wpi_alloc_dma_mem(sc, count * sizeof (wpi_tx_desc_t), 1038 &ring_desc_dma_attr, &wpi_dma_accattr, 1039 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 1040 &ring->dma_desc); 1041 if (err != DDI_SUCCESS) { 1042 WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring desc[%d] failed\n", 1043 qid)); 1044 goto fail; 1045 } 1046 1047 /* update shared page with ring's base address */ 1048 sc->sc_shared->txbase[qid] = ring->dma_desc.cookie.dmac_address; 1049 1050 desc_h = (wpi_tx_desc_t *)ring->dma_desc.mem_va; 1051 paddr_desc_h = ring->dma_desc.cookie.dmac_address; 1052 1053 err = wpi_alloc_dma_mem(sc, count * sizeof (wpi_tx_cmd_t), 1054 &tx_cmd_dma_attr, &wpi_dma_accattr, 1055 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 1056 &ring->dma_cmd); 1057 if (err != DDI_SUCCESS) { 1058 WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring cmd[%d] failed\n", 1059 qid)); 1060 goto fail; 1061 } 1062 1063 cmd_h = (wpi_tx_cmd_t *)ring->dma_cmd.mem_va; 1064 paddr_cmd_h = ring->dma_cmd.cookie.dmac_address; 1065 1066 /* 1067 * Allocate Tx buffers. 1068 */ 1069 ring->data = kmem_zalloc(sizeof (wpi_tx_data_t) * count, KM_NOSLEEP); 1070 if (ring->data == NULL) { 1071 WPI_DBG((WPI_DEBUG_DMA, "could not allocate tx data slots\n")); 1072 goto fail; 1073 } 1074 1075 for (i = 0; i < count; i++) { 1076 data = &ring->data[i]; 1077 err = wpi_alloc_dma_mem(sc, sc->sc_dmabuf_sz, 1078 &tx_buffer_dma_attr, &wpi_dma_accattr, 1079 DDI_DMA_WRITE | DDI_DMA_STREAMING, 1080 &data->dma_data); 1081 if (err != DDI_SUCCESS) { 1082 WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring buf[%d] " 1083 "failed\n", i)); 1084 goto fail; 1085 } 1086 1087 data->desc = desc_h + i; 1088 data->paddr_desc = paddr_desc_h + 1089 ((uintptr_t)data->desc - (uintptr_t)desc_h); 1090 data->cmd = cmd_h + i; 1091 data->paddr_cmd = paddr_cmd_h + 1092 ((uintptr_t)data->cmd - (uintptr_t)cmd_h); 1093 } 1094 1095 return (err); 1096 1097 fail: 1098 wpi_free_tx_ring(sc, ring); 1099 return (err); 1100 } 1101 1102 static void 1103 wpi_reset_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring) 1104 { 1105 wpi_tx_data_t *data; 1106 int i, ntries; 1107 1108 wpi_mem_lock(sc); 1109 1110 WPI_WRITE(sc, WPI_TX_CONFIG(ring->qid), 0); 1111 for (ntries = 0; ntries < 100; ntries++) { 1112 if (WPI_READ(sc, WPI_TX_STATUS) & WPI_TX_IDLE(ring->qid)) 1113 break; 1114 DELAY(10); 1115 } 1116 #ifdef DEBUG 1117 if (ntries == 100 && wpi_dbg_flags > 0) { 1118 WPI_DBG((WPI_DEBUG_DMA, "timeout resetting Tx ring %d\n", 1119 ring->qid)); 1120 } 1121 #endif 1122 wpi_mem_unlock(sc); 1123 1124 for (i = 0; i < ring->count; i++) { 1125 data = &ring->data[i]; 1126 WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV); 1127 } 1128 1129 ring->queued = 0; 1130 ring->cur = 0; 1131 } 1132 1133 /*ARGSUSED*/ 1134 static void 1135 wpi_free_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring) 1136 { 1137 int i; 1138 1139 if (ring->dma_desc.dma_hdl != NULL) 1140 WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV); 1141 wpi_free_dma_mem(&ring->dma_desc); 1142 1143 if (ring->dma_cmd.dma_hdl != NULL) 1144 WPI_DMA_SYNC(ring->dma_cmd, DDI_DMA_SYNC_FORDEV); 1145 wpi_free_dma_mem(&ring->dma_cmd); 1146 1147 if (ring->data != NULL) { 1148 for (i = 0; i < ring->count; i++) { 1149 if (ring->data[i].dma_data.dma_hdl) 1150 WPI_DMA_SYNC(ring->data[i].dma_data, 1151 DDI_DMA_SYNC_FORDEV); 1152 wpi_free_dma_mem(&ring->data[i].dma_data); 1153 } 1154 kmem_free(ring->data, ring->count * sizeof (wpi_tx_data_t)); 1155 ring->data = NULL; 1156 } 1157 } 1158 1159 static int 1160 wpi_ring_init(wpi_sc_t *sc) 1161 { 1162 int i, err = DDI_SUCCESS; 1163 1164 for (i = 0; i < 4; i++) { 1165 err = wpi_alloc_tx_ring(sc, &sc->sc_txq[i], WPI_TX_RING_COUNT, 1166 i); 1167 if (err != DDI_SUCCESS) 1168 goto fail; 1169 } 1170 err = wpi_alloc_tx_ring(sc, &sc->sc_cmdq, WPI_CMD_RING_COUNT, 4); 1171 if (err != DDI_SUCCESS) 1172 goto fail; 1173 err = wpi_alloc_tx_ring(sc, &sc->sc_svcq, WPI_SVC_RING_COUNT, 5); 1174 if (err != DDI_SUCCESS) 1175 goto fail; 1176 err = wpi_alloc_rx_ring(sc); 1177 if (err != DDI_SUCCESS) 1178 goto fail; 1179 return (err); 1180 1181 fail: 1182 return (err); 1183 } 1184 1185 static void 1186 wpi_ring_free(wpi_sc_t *sc) 1187 { 1188 int i = 4; 1189 1190 wpi_free_rx_ring(sc); 1191 wpi_free_tx_ring(sc, &sc->sc_svcq); 1192 wpi_free_tx_ring(sc, &sc->sc_cmdq); 1193 while (--i >= 0) { 1194 wpi_free_tx_ring(sc, &sc->sc_txq[i]); 1195 } 1196 } 1197 1198 /* ARGSUSED */ 1199 static ieee80211_node_t * 1200 wpi_node_alloc(ieee80211com_t *ic) 1201 { 1202 wpi_amrr_t *amrr; 1203 1204 amrr = kmem_zalloc(sizeof (wpi_amrr_t), KM_SLEEP); 1205 if (amrr != NULL) 1206 wpi_amrr_init(amrr); 1207 return (&amrr->in); 1208 } 1209 1210 static void 1211 wpi_node_free(ieee80211_node_t *in) 1212 { 1213 ieee80211com_t *ic = in->in_ic; 1214 1215 ic->ic_node_cleanup(in); 1216 if (in->in_wpa_ie != NULL) 1217 ieee80211_free(in->in_wpa_ie); 1218 kmem_free(in, sizeof (wpi_amrr_t)); 1219 } 1220 1221 /*ARGSUSED*/ 1222 static int 1223 wpi_newstate(ieee80211com_t *ic, enum ieee80211_state nstate, int arg) 1224 { 1225 wpi_sc_t *sc = (wpi_sc_t *)ic; 1226 ieee80211_node_t *in = ic->ic_bss; 1227 enum ieee80211_state ostate; 1228 int i, err = WPI_SUCCESS; 1229 1230 mutex_enter(&sc->sc_glock); 1231 ostate = ic->ic_state; 1232 switch (nstate) { 1233 case IEEE80211_S_SCAN: 1234 switch (ostate) { 1235 case IEEE80211_S_INIT: 1236 { 1237 wpi_node_t node; 1238 1239 sc->sc_flags |= WPI_F_SCANNING; 1240 sc->sc_scan_next = 0; 1241 1242 /* make the link LED blink while we're scanning */ 1243 wpi_set_led(sc, WPI_LED_LINK, 20, 2); 1244 1245 /* 1246 * clear association to receive beacons from all 1247 * BSS'es 1248 */ 1249 sc->sc_config.state = 0; 1250 sc->sc_config.filter &= ~LE_32(WPI_FILTER_BSS); 1251 1252 WPI_DBG((WPI_DEBUG_80211, "config chan %d flags %x " 1253 "filter %x\n", 1254 sc->sc_config.chan, sc->sc_config.flags, 1255 sc->sc_config.filter)); 1256 1257 err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config, 1258 sizeof (wpi_config_t), 1); 1259 if (err != WPI_SUCCESS) { 1260 cmn_err(CE_WARN, 1261 "could not clear association\n"); 1262 sc->sc_flags &= ~WPI_F_SCANNING; 1263 mutex_exit(&sc->sc_glock); 1264 return (err); 1265 } 1266 1267 /* add broadcast node to send probe request */ 1268 (void) memset(&node, 0, sizeof (node)); 1269 (void) memset(&node.bssid, 0xff, IEEE80211_ADDR_LEN); 1270 node.id = WPI_ID_BROADCAST; 1271 1272 err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, 1273 sizeof (node), 1); 1274 if (err != WPI_SUCCESS) { 1275 cmn_err(CE_WARN, 1276 "could not add broadcast node\n"); 1277 sc->sc_flags &= ~WPI_F_SCANNING; 1278 mutex_exit(&sc->sc_glock); 1279 return (err); 1280 } 1281 break; 1282 } 1283 case IEEE80211_S_SCAN: 1284 mutex_exit(&sc->sc_glock); 1285 /* step to next channel before actual FW scan */ 1286 err = sc->sc_newstate(ic, nstate, arg); 1287 mutex_enter(&sc->sc_glock); 1288 if ((err != 0) || ((err = wpi_scan(sc)) != 0)) { 1289 cmn_err(CE_WARN, 1290 "could not initiate scan\n"); 1291 sc->sc_flags &= ~WPI_F_SCANNING; 1292 ieee80211_cancel_scan(ic); 1293 } 1294 mutex_exit(&sc->sc_glock); 1295 return (err); 1296 default: 1297 break; 1298 } 1299 sc->sc_clk = 0; 1300 break; 1301 1302 case IEEE80211_S_AUTH: 1303 if (ostate == IEEE80211_S_SCAN) { 1304 sc->sc_flags &= ~WPI_F_SCANNING; 1305 } 1306 1307 /* reset state to handle reassociations correctly */ 1308 sc->sc_config.state = 0; 1309 sc->sc_config.filter &= ~LE_32(WPI_FILTER_BSS); 1310 1311 if ((err = wpi_auth(sc)) != 0) { 1312 WPI_DBG((WPI_DEBUG_80211, 1313 "could not send authentication request\n")); 1314 mutex_exit(&sc->sc_glock); 1315 return (err); 1316 } 1317 break; 1318 1319 case IEEE80211_S_RUN: 1320 if (ostate == IEEE80211_S_SCAN) { 1321 sc->sc_flags &= ~WPI_F_SCANNING; 1322 } 1323 1324 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 1325 /* link LED blinks while monitoring */ 1326 wpi_set_led(sc, WPI_LED_LINK, 5, 5); 1327 break; 1328 } 1329 1330 if (ic->ic_opmode != IEEE80211_M_STA) { 1331 (void) wpi_auth(sc); 1332 /* need setup beacon here */ 1333 } 1334 WPI_DBG((WPI_DEBUG_80211, "wpi: associated.")); 1335 1336 /* update adapter's configuration */ 1337 sc->sc_config.state = LE_16(WPI_CONFIG_ASSOCIATED); 1338 /* short preamble/slot time are negotiated when associating */ 1339 sc->sc_config.flags &= ~LE_32(WPI_CONFIG_SHPREAMBLE | 1340 WPI_CONFIG_SHSLOT); 1341 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1342 sc->sc_config.flags |= LE_32(WPI_CONFIG_SHSLOT); 1343 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1344 sc->sc_config.flags |= LE_32(WPI_CONFIG_SHPREAMBLE); 1345 sc->sc_config.filter |= LE_32(WPI_FILTER_BSS); 1346 if (ic->ic_opmode != IEEE80211_M_STA) 1347 sc->sc_config.filter |= LE_32(WPI_FILTER_BEACON); 1348 1349 WPI_DBG((WPI_DEBUG_80211, "config chan %d flags %x\n", 1350 sc->sc_config.chan, sc->sc_config.flags)); 1351 err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config, 1352 sizeof (wpi_config_t), 1); 1353 if (err != WPI_SUCCESS) { 1354 WPI_DBG((WPI_DEBUG_80211, 1355 "could not update configuration\n")); 1356 mutex_exit(&sc->sc_glock); 1357 return (err); 1358 } 1359 1360 /* start automatic rate control */ 1361 mutex_enter(&sc->sc_mt_lock); 1362 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 1363 sc->sc_flags |= WPI_F_RATE_AUTO_CTL; 1364 /* set rate to some reasonable initial value */ 1365 i = in->in_rates.ir_nrates - 1; 1366 while (i > 0 && IEEE80211_RATE(i) > 72) 1367 i--; 1368 in->in_txrate = i; 1369 } else { 1370 sc->sc_flags &= ~WPI_F_RATE_AUTO_CTL; 1371 } 1372 mutex_exit(&sc->sc_mt_lock); 1373 1374 /* link LED always on while associated */ 1375 wpi_set_led(sc, WPI_LED_LINK, 0, 1); 1376 break; 1377 1378 case IEEE80211_S_INIT: 1379 sc->sc_flags &= ~WPI_F_SCANNING; 1380 break; 1381 1382 case IEEE80211_S_ASSOC: 1383 sc->sc_flags &= ~WPI_F_SCANNING; 1384 break; 1385 } 1386 1387 mutex_exit(&sc->sc_glock); 1388 return (sc->sc_newstate(ic, nstate, arg)); 1389 } 1390 1391 /*ARGSUSED*/ 1392 static int wpi_key_set(ieee80211com_t *ic, const struct ieee80211_key *k, 1393 const uint8_t mac[IEEE80211_ADDR_LEN]) 1394 { 1395 wpi_sc_t *sc = (wpi_sc_t *)ic; 1396 wpi_node_t node; 1397 int err; 1398 1399 switch (k->wk_cipher->ic_cipher) { 1400 case IEEE80211_CIPHER_WEP: 1401 case IEEE80211_CIPHER_TKIP: 1402 return (1); /* sofeware do it. */ 1403 case IEEE80211_CIPHER_AES_CCM: 1404 break; 1405 default: 1406 return (0); 1407 } 1408 sc->sc_config.filter &= ~(WPI_FILTER_NODECRYPTUNI | 1409 WPI_FILTER_NODECRYPTMUL); 1410 1411 mutex_enter(&sc->sc_glock); 1412 1413 /* update ap/multicast node */ 1414 (void) memset(&node, 0, sizeof (node)); 1415 if (IEEE80211_IS_MULTICAST(mac)) { 1416 (void) memset(node.bssid, 0xff, 6); 1417 node.id = WPI_ID_BROADCAST; 1418 } else { 1419 IEEE80211_ADDR_COPY(node.bssid, ic->ic_bss->in_bssid); 1420 node.id = WPI_ID_BSS; 1421 } 1422 if (k->wk_flags & IEEE80211_KEY_XMIT) { 1423 node.key_flags = 0; 1424 node.keyp = k->wk_keyix; 1425 } else { 1426 node.key_flags = (1 << 14); 1427 node.keyp = k->wk_keyix + 4; 1428 } 1429 (void) memcpy(node.key, k->wk_key, k->wk_keylen); 1430 node.key_flags |= (2 | (1 << 3) | (k->wk_keyix << 8)); 1431 node.sta_mask = 1; 1432 node.control = 1; 1433 err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 1); 1434 if (err != WPI_SUCCESS) { 1435 cmn_err(CE_WARN, "wpi_key_set():" 1436 "failed to update ap node\n"); 1437 mutex_exit(&sc->sc_glock); 1438 return (0); 1439 } 1440 mutex_exit(&sc->sc_glock); 1441 return (1); 1442 } 1443 1444 /* 1445 * Grab exclusive access to NIC memory. 1446 */ 1447 static void 1448 wpi_mem_lock(wpi_sc_t *sc) 1449 { 1450 uint32_t tmp; 1451 int ntries; 1452 1453 tmp = WPI_READ(sc, WPI_GPIO_CTL); 1454 WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_MAC); 1455 1456 /* spin until we actually get the lock */ 1457 for (ntries = 0; ntries < 1000; ntries++) { 1458 if ((WPI_READ(sc, WPI_GPIO_CTL) & 1459 (WPI_GPIO_CLOCK | WPI_GPIO_SLEEP)) == WPI_GPIO_CLOCK) 1460 break; 1461 DELAY(10); 1462 } 1463 if (ntries == 1000) 1464 WPI_DBG((WPI_DEBUG_PIO, "could not lock memory\n")); 1465 } 1466 1467 /* 1468 * Release lock on NIC memory. 1469 */ 1470 static void 1471 wpi_mem_unlock(wpi_sc_t *sc) 1472 { 1473 uint32_t tmp = WPI_READ(sc, WPI_GPIO_CTL); 1474 WPI_WRITE(sc, WPI_GPIO_CTL, tmp & ~WPI_GPIO_MAC); 1475 } 1476 1477 static uint32_t 1478 wpi_mem_read(wpi_sc_t *sc, uint16_t addr) 1479 { 1480 WPI_WRITE(sc, WPI_READ_MEM_ADDR, WPI_MEM_4 | addr); 1481 return (WPI_READ(sc, WPI_READ_MEM_DATA)); 1482 } 1483 1484 static void 1485 wpi_mem_write(wpi_sc_t *sc, uint16_t addr, uint32_t data) 1486 { 1487 WPI_WRITE(sc, WPI_WRITE_MEM_ADDR, WPI_MEM_4 | addr); 1488 WPI_WRITE(sc, WPI_WRITE_MEM_DATA, data); 1489 } 1490 1491 static void 1492 wpi_mem_write_region_4(wpi_sc_t *sc, uint16_t addr, 1493 const uint32_t *data, int wlen) 1494 { 1495 for (; wlen > 0; wlen--, data++, addr += 4) 1496 wpi_mem_write(sc, addr, *data); 1497 } 1498 1499 /* 1500 * Read 16 bits from the EEPROM. We access EEPROM through the MAC instead of 1501 * using the traditional bit-bang method. 1502 */ 1503 static uint16_t 1504 wpi_read_prom_word(wpi_sc_t *sc, uint32_t addr) 1505 { 1506 uint32_t val; 1507 int ntries; 1508 1509 WPI_WRITE(sc, WPI_EEPROM_CTL, addr << 2); 1510 1511 wpi_mem_lock(sc); 1512 for (ntries = 0; ntries < 10; ntries++) { 1513 if ((val = WPI_READ(sc, WPI_EEPROM_CTL)) & WPI_EEPROM_READY) 1514 break; 1515 DELAY(10); 1516 } 1517 wpi_mem_unlock(sc); 1518 1519 if (ntries == 10) { 1520 WPI_DBG((WPI_DEBUG_PIO, "could not read EEPROM\n")); 1521 return (0xdead); 1522 } 1523 return (val >> 16); 1524 } 1525 1526 /* 1527 * The firmware boot code is small and is intended to be copied directly into 1528 * the NIC internal memory. 1529 */ 1530 static int 1531 wpi_load_microcode(wpi_sc_t *sc) 1532 { 1533 const char *ucode; 1534 int size; 1535 1536 ucode = sc->sc_boot; 1537 size = LE_32(sc->sc_hdr->bootsz); 1538 /* check that microcode size is a multiple of 4 */ 1539 if (size & 3) 1540 return (EINVAL); 1541 1542 size /= sizeof (uint32_t); 1543 1544 wpi_mem_lock(sc); 1545 1546 /* copy microcode image into NIC memory */ 1547 wpi_mem_write_region_4(sc, WPI_MEM_UCODE_BASE, (const uint32_t *)ucode, 1548 size); 1549 1550 wpi_mem_write(sc, WPI_MEM_UCODE_SRC, 0); 1551 wpi_mem_write(sc, WPI_MEM_UCODE_DST, WPI_FW_TEXT); 1552 wpi_mem_write(sc, WPI_MEM_UCODE_SIZE, size); 1553 1554 /* run microcode */ 1555 wpi_mem_write(sc, WPI_MEM_UCODE_CTL, WPI_UC_RUN); 1556 1557 wpi_mem_unlock(sc); 1558 1559 return (WPI_SUCCESS); 1560 } 1561 1562 /* 1563 * The firmware text and data segments are transferred to the NIC using DMA. 1564 * The driver just copies the firmware into DMA-safe memory and tells the NIC 1565 * where to find it. Once the NIC has copied the firmware into its internal 1566 * memory, we can free our local copy in the driver. 1567 */ 1568 static int 1569 wpi_load_firmware(wpi_sc_t *sc, uint32_t target) 1570 { 1571 const char *fw; 1572 int size; 1573 wpi_dma_t *dma_p; 1574 ddi_dma_cookie_t *cookie; 1575 wpi_tx_desc_t desc; 1576 int i, ntries, err = WPI_SUCCESS; 1577 1578 /* only text and data here */ 1579 if (target == WPI_FW_TEXT) { 1580 fw = sc->sc_text; 1581 size = LE_32(sc->sc_hdr->textsz); 1582 dma_p = &sc->sc_dma_fw_text; 1583 cookie = sc->sc_fw_text_cookie; 1584 } else { 1585 fw = sc->sc_data; 1586 size = LE_32(sc->sc_hdr->datasz); 1587 dma_p = &sc->sc_dma_fw_data; 1588 cookie = sc->sc_fw_data_cookie; 1589 } 1590 1591 /* copy firmware image to DMA-safe memory */ 1592 (void) memcpy(dma_p->mem_va, fw, size); 1593 1594 /* make sure the adapter will get up-to-date values */ 1595 (void) ddi_dma_sync(dma_p->dma_hdl, 0, size, DDI_DMA_SYNC_FORDEV); 1596 1597 (void) memset(&desc, 0, sizeof (desc)); 1598 desc.flags = LE_32(WPI_PAD32(size) << 28 | dma_p->ncookies << 24); 1599 for (i = 0; i < dma_p->ncookies; i++) { 1600 WPI_DBG((WPI_DEBUG_DMA, "cookie%d addr:%x size:%x\n", 1601 i, cookie[i].dmac_address, cookie[i].dmac_size)); 1602 desc.segs[i].addr = cookie[i].dmac_address; 1603 desc.segs[i].len = (uint32_t)cookie[i].dmac_size; 1604 } 1605 1606 wpi_mem_lock(sc); 1607 1608 /* tell adapter where to copy image in its internal memory */ 1609 WPI_WRITE(sc, WPI_FW_TARGET, target); 1610 1611 WPI_WRITE(sc, WPI_TX_CONFIG(6), 0); 1612 1613 /* copy firmware descriptor into NIC memory */ 1614 WPI_WRITE_REGION_4(sc, WPI_TX_DESC(6), (uint32_t *)&desc, 1615 sizeof desc / sizeof (uint32_t)); 1616 1617 WPI_WRITE(sc, WPI_TX_CREDIT(6), 0xfffff); 1618 WPI_WRITE(sc, WPI_TX_STATE(6), 0x4001); 1619 WPI_WRITE(sc, WPI_TX_CONFIG(6), 0x80000001); 1620 1621 /* wait while the adapter is busy copying the firmware */ 1622 for (ntries = 0; ntries < 100; ntries++) { 1623 if (WPI_READ(sc, WPI_TX_STATUS) & WPI_TX_IDLE(6)) 1624 break; 1625 DELAY(1000); 1626 } 1627 if (ntries == 100) { 1628 WPI_DBG((WPI_DEBUG_FW, "timeout transferring firmware\n")); 1629 err = ETIMEDOUT; 1630 } 1631 1632 WPI_WRITE(sc, WPI_TX_CREDIT(6), 0); 1633 1634 wpi_mem_unlock(sc); 1635 1636 return (err); 1637 } 1638 1639 /*ARGSUSED*/ 1640 static void 1641 wpi_rx_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc, wpi_rx_data_t *data) 1642 { 1643 ieee80211com_t *ic = &sc->sc_ic; 1644 wpi_rx_ring_t *ring = &sc->sc_rxq; 1645 wpi_rx_stat_t *stat; 1646 wpi_rx_head_t *head; 1647 wpi_rx_tail_t *tail; 1648 ieee80211_node_t *in; 1649 struct ieee80211_frame *wh; 1650 mblk_t *mp; 1651 uint16_t len; 1652 1653 stat = (wpi_rx_stat_t *)(desc + 1); 1654 1655 if (stat->len > WPI_STAT_MAXLEN) { 1656 WPI_DBG((WPI_DEBUG_RX, "invalid rx statistic header\n")); 1657 return; 1658 } 1659 1660 head = (wpi_rx_head_t *)((caddr_t)(stat + 1) + stat->len); 1661 tail = (wpi_rx_tail_t *)((caddr_t)(head + 1) + LE_16(head->len)); 1662 1663 len = LE_16(head->len); 1664 1665 WPI_DBG((WPI_DEBUG_RX, "rx intr: idx=%d len=%d stat len=%d rssi=%d " 1666 "rate=%x chan=%d tstamp=%llu", ring->cur, LE_32(desc->len), 1667 len, (int8_t)stat->rssi, head->rate, head->chan, 1668 LE_64(tail->tstamp))); 1669 1670 if ((len < 20) || (len > sc->sc_dmabuf_sz)) { 1671 sc->sc_rx_err++; 1672 return; 1673 } 1674 1675 /* 1676 * Discard Rx frames with bad CRC early 1677 */ 1678 if ((LE_32(tail->flags) & WPI_RX_NOERROR) != WPI_RX_NOERROR) { 1679 WPI_DBG((WPI_DEBUG_RX, "rx tail flags error %x\n", 1680 LE_32(tail->flags))); 1681 sc->sc_rx_err++; 1682 return; 1683 } 1684 1685 /* update Rx descriptor */ 1686 /* ring->desc[ring->cur] = LE_32(data->dma_data.cookie.dmac_address); */ 1687 1688 #ifdef WPI_BPF 1689 #ifndef WPI_CURRENT 1690 if (sc->sc_drvbpf != NULL) { 1691 #else 1692 if (bpf_peers_present(sc->sc_drvbpf)) { 1693 #endif 1694 struct wpi_rx_radiotap_header *tap = &sc->sc_rxtap; 1695 1696 tap->wr_flags = 0; 1697 tap->wr_rate = head->rate; 1698 tap->wr_chan_freq = 1699 LE_16(ic->ic_channels[head->chan].ic_freq); 1700 tap->wr_chan_flags = 1701 LE_16(ic->ic_channels[head->chan].ic_flags); 1702 tap->wr_dbm_antsignal = (int8_t)(stat->rssi - WPI_RSSI_OFFSET); 1703 tap->wr_dbm_antnoise = (int8_t)LE_16(stat->noise); 1704 tap->wr_tsft = tail->tstamp; 1705 tap->wr_antenna = (LE_16(head->flags) >> 4) & 0xf; 1706 switch (head->rate) { 1707 /* CCK rates */ 1708 case 10: tap->wr_rate = 2; break; 1709 case 20: tap->wr_rate = 4; break; 1710 case 55: tap->wr_rate = 11; break; 1711 case 110: tap->wr_rate = 22; break; 1712 /* OFDM rates */ 1713 case 0xd: tap->wr_rate = 12; break; 1714 case 0xf: tap->wr_rate = 18; break; 1715 case 0x5: tap->wr_rate = 24; break; 1716 case 0x7: tap->wr_rate = 36; break; 1717 case 0x9: tap->wr_rate = 48; break; 1718 case 0xb: tap->wr_rate = 72; break; 1719 case 0x1: tap->wr_rate = 96; break; 1720 case 0x3: tap->wr_rate = 108; break; 1721 /* unknown rate: should not happen */ 1722 default: tap->wr_rate = 0; 1723 } 1724 if (LE_16(head->flags) & 0x4) 1725 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 1726 1727 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 1728 } 1729 #endif 1730 /* grab a reference to the source node */ 1731 wh = (struct ieee80211_frame *)(head + 1); 1732 1733 #ifdef DEBUG 1734 if (wpi_dbg_flags & WPI_DEBUG_RX) 1735 ieee80211_dump_pkt((uint8_t *)wh, len, 0, 0); 1736 #endif 1737 1738 in = ieee80211_find_rxnode(ic, wh); 1739 mp = allocb(len, BPRI_MED); 1740 if (mp) { 1741 (void) memcpy(mp->b_wptr, wh, len); 1742 mp->b_wptr += len; 1743 1744 /* send the frame to the 802.11 layer */ 1745 (void) ieee80211_input(ic, mp, in, stat->rssi, 0); 1746 } else { 1747 sc->sc_rx_nobuf++; 1748 WPI_DBG((WPI_DEBUG_RX, 1749 "wpi_rx_intr(): alloc rx buf failed\n")); 1750 } 1751 /* release node reference */ 1752 ieee80211_free_node(in); 1753 } 1754 1755 /*ARGSUSED*/ 1756 static void 1757 wpi_tx_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc, wpi_rx_data_t *data) 1758 { 1759 ieee80211com_t *ic = &sc->sc_ic; 1760 wpi_tx_ring_t *ring = &sc->sc_txq[desc->qid & 0x3]; 1761 /* wpi_tx_data_t *txdata = &ring->data[desc->idx]; */ 1762 wpi_tx_stat_t *stat = (wpi_tx_stat_t *)(desc + 1); 1763 wpi_amrr_t *amrr = (wpi_amrr_t *)ic->ic_bss; 1764 1765 WPI_DBG((WPI_DEBUG_TX, "tx done: qid=%d idx=%d retries=%d nkill=%d " 1766 "rate=%x duration=%d status=%x\n", 1767 desc->qid, desc->idx, stat->ntries, stat->nkill, stat->rate, 1768 LE_32(stat->duration), LE_32(stat->status))); 1769 1770 amrr->txcnt++; 1771 WPI_DBG((WPI_DEBUG_RATECTL, "tx: %d cnt\n", amrr->txcnt)); 1772 if (stat->ntries > 0) { 1773 amrr->retrycnt++; 1774 sc->sc_tx_retries++; 1775 WPI_DBG((WPI_DEBUG_RATECTL, "tx: %d retries\n", 1776 amrr->retrycnt)); 1777 } 1778 1779 sc->sc_tx_timer = 0; 1780 1781 mutex_enter(&sc->sc_tx_lock); 1782 ring->queued--; 1783 if (ring->queued < 0) 1784 ring->queued = 0; 1785 if ((sc->sc_need_reschedule) && (ring->queued <= (ring->count << 3))) { 1786 sc->sc_need_reschedule = 0; 1787 mutex_exit(&sc->sc_tx_lock); 1788 mac_tx_update(ic->ic_mach); 1789 mutex_enter(&sc->sc_tx_lock); 1790 } 1791 mutex_exit(&sc->sc_tx_lock); 1792 } 1793 1794 static void 1795 wpi_cmd_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc) 1796 { 1797 if ((desc->qid & 7) != 4) { 1798 return; /* not a command ack */ 1799 } 1800 mutex_enter(&sc->sc_glock); 1801 sc->sc_flags |= WPI_F_CMD_DONE; 1802 cv_signal(&sc->sc_cmd_cv); 1803 mutex_exit(&sc->sc_glock); 1804 } 1805 1806 static uint_t 1807 wpi_notif_softintr(caddr_t arg) 1808 { 1809 wpi_sc_t *sc = (wpi_sc_t *)arg; 1810 wpi_rx_desc_t *desc; 1811 wpi_rx_data_t *data; 1812 uint32_t hw; 1813 1814 mutex_enter(&sc->sc_glock); 1815 if (sc->sc_notif_softint_pending != 1) { 1816 mutex_exit(&sc->sc_glock); 1817 return (DDI_INTR_UNCLAIMED); 1818 } 1819 mutex_exit(&sc->sc_glock); 1820 1821 hw = LE_32(sc->sc_shared->next); 1822 1823 while (sc->sc_rxq.cur != hw) { 1824 data = &sc->sc_rxq.data[sc->sc_rxq.cur]; 1825 desc = (wpi_rx_desc_t *)data->dma_data.mem_va; 1826 1827 WPI_DBG((WPI_DEBUG_INTR, "rx notification hw = %d cur = %d " 1828 "qid=%x idx=%d flags=%x type=%d len=%d\n", 1829 hw, sc->sc_rxq.cur, desc->qid, desc->idx, desc->flags, 1830 desc->type, LE_32(desc->len))); 1831 1832 if (!(desc->qid & 0x80)) /* reply to a command */ 1833 wpi_cmd_intr(sc, desc); 1834 1835 switch (desc->type) { 1836 case WPI_RX_DONE: 1837 /* a 802.11 frame was received */ 1838 wpi_rx_intr(sc, desc, data); 1839 break; 1840 1841 case WPI_TX_DONE: 1842 /* a 802.11 frame has been transmitted */ 1843 wpi_tx_intr(sc, desc, data); 1844 break; 1845 1846 case WPI_UC_READY: 1847 { 1848 wpi_ucode_info_t *uc = 1849 (wpi_ucode_info_t *)(desc + 1); 1850 1851 /* the microcontroller is ready */ 1852 WPI_DBG((WPI_DEBUG_FW, 1853 "microcode alive notification version %x " 1854 "alive %x\n", LE_32(uc->version), 1855 LE_32(uc->valid))); 1856 1857 if (LE_32(uc->valid) != 1) { 1858 WPI_DBG((WPI_DEBUG_FW, 1859 "microcontroller initialization failed\n")); 1860 } 1861 break; 1862 } 1863 case WPI_STATE_CHANGED: 1864 { 1865 uint32_t *status = (uint32_t *)(desc + 1); 1866 1867 /* enabled/disabled notification */ 1868 WPI_DBG((WPI_DEBUG_RADIO, "state changed to %x\n", 1869 LE_32(*status))); 1870 1871 if (LE_32(*status) & 1) { 1872 /* 1873 * the radio button has to be pushed(OFF). It 1874 * is considered as a hw error, the 1875 * wpi_thread() tries to recover it after the 1876 * button is pushed again(ON) 1877 */ 1878 cmn_err(CE_NOTE, 1879 "wpi: Radio transmitter is off\n"); 1880 sc->sc_ostate = sc->sc_ic.ic_state; 1881 ieee80211_new_state(&sc->sc_ic, 1882 IEEE80211_S_INIT, -1); 1883 sc->sc_flags |= 1884 (WPI_F_HW_ERR_RECOVER | WPI_F_RADIO_OFF); 1885 } 1886 break; 1887 } 1888 case WPI_START_SCAN: 1889 { 1890 wpi_start_scan_t *scan = 1891 (wpi_start_scan_t *)(desc + 1); 1892 1893 WPI_DBG((WPI_DEBUG_SCAN, 1894 "scanning channel %d status %x\n", 1895 scan->chan, LE_32(scan->status))); 1896 1897 break; 1898 } 1899 case WPI_STOP_SCAN: 1900 { 1901 wpi_stop_scan_t *scan = 1902 (wpi_stop_scan_t *)(desc + 1); 1903 1904 WPI_DBG((WPI_DEBUG_SCAN, 1905 "completed channel %d (burst of %d) status %02x\n", 1906 scan->chan, scan->nchan, scan->status)); 1907 1908 sc->sc_scan_pending = 0; 1909 sc->sc_scan_next++; 1910 break; 1911 } 1912 default: 1913 break; 1914 } 1915 1916 sc->sc_rxq.cur = (sc->sc_rxq.cur + 1) % WPI_RX_RING_COUNT; 1917 } 1918 1919 /* tell the firmware what we have processed */ 1920 hw = (hw == 0) ? WPI_RX_RING_COUNT - 1 : hw - 1; 1921 WPI_WRITE(sc, WPI_RX_WIDX, hw & (~7)); 1922 mutex_enter(&sc->sc_glock); 1923 sc->sc_notif_softint_pending = 0; 1924 mutex_exit(&sc->sc_glock); 1925 1926 return (DDI_INTR_CLAIMED); 1927 } 1928 1929 static uint_t 1930 wpi_intr(caddr_t arg) 1931 { 1932 wpi_sc_t *sc = (wpi_sc_t *)arg; 1933 uint32_t r, rfh; 1934 1935 mutex_enter(&sc->sc_glock); 1936 if (sc->sc_flags & WPI_F_SUSPEND) { 1937 mutex_exit(&sc->sc_glock); 1938 return (DDI_INTR_UNCLAIMED); 1939 } 1940 1941 r = WPI_READ(sc, WPI_INTR); 1942 if (r == 0 || r == 0xffffffff) { 1943 mutex_exit(&sc->sc_glock); 1944 return (DDI_INTR_UNCLAIMED); 1945 } 1946 1947 WPI_DBG((WPI_DEBUG_INTR, "interrupt reg %x\n", r)); 1948 1949 rfh = WPI_READ(sc, WPI_INTR_STATUS); 1950 /* disable interrupts */ 1951 WPI_WRITE(sc, WPI_MASK, 0); 1952 /* ack interrupts */ 1953 WPI_WRITE(sc, WPI_INTR, r); 1954 WPI_WRITE(sc, WPI_INTR_STATUS, rfh); 1955 1956 if (sc->sc_notif_softint_id == NULL) { 1957 mutex_exit(&sc->sc_glock); 1958 return (DDI_INTR_CLAIMED); 1959 } 1960 1961 if (r & (WPI_SW_ERROR | WPI_HW_ERROR)) { 1962 WPI_DBG((WPI_DEBUG_FW, "fatal firmware error\n")); 1963 mutex_exit(&sc->sc_glock); 1964 wpi_stop(sc); 1965 if (!(sc->sc_flags & WPI_F_HW_ERR_RECOVER)) { 1966 sc->sc_ostate = sc->sc_ic.ic_state; 1967 } 1968 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1); 1969 sc->sc_flags |= WPI_F_HW_ERR_RECOVER; 1970 return (DDI_INTR_CLAIMED); 1971 } 1972 1973 if ((r & (WPI_RX_INTR | WPI_RX_SWINT)) || 1974 (rfh & 0x40070000)) { 1975 sc->sc_notif_softint_pending = 1; 1976 ddi_trigger_softintr(sc->sc_notif_softint_id); 1977 } 1978 1979 if (r & WPI_ALIVE_INTR) { /* firmware initialized */ 1980 sc->sc_flags |= WPI_F_FW_INIT; 1981 cv_signal(&sc->sc_fw_cv); 1982 } 1983 1984 /* re-enable interrupts */ 1985 WPI_WRITE(sc, WPI_MASK, WPI_INTR_MASK); 1986 mutex_exit(&sc->sc_glock); 1987 1988 return (DDI_INTR_CLAIMED); 1989 } 1990 1991 static uint8_t 1992 wpi_plcp_signal(int rate) 1993 { 1994 switch (rate) { 1995 /* CCK rates (returned values are device-dependent) */ 1996 case 2: return (10); 1997 case 4: return (20); 1998 case 11: return (55); 1999 case 22: return (110); 2000 2001 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 2002 /* R1-R4 (ral/ural is R4-R1) */ 2003 case 12: return (0xd); 2004 case 18: return (0xf); 2005 case 24: return (0x5); 2006 case 36: return (0x7); 2007 case 48: return (0x9); 2008 case 72: return (0xb); 2009 case 96: return (0x1); 2010 case 108: return (0x3); 2011 2012 /* unsupported rates (should not get there) */ 2013 default: return (0); 2014 } 2015 } 2016 2017 static mblk_t * 2018 wpi_m_tx(void *arg, mblk_t *mp) 2019 { 2020 wpi_sc_t *sc = (wpi_sc_t *)arg; 2021 ieee80211com_t *ic = &sc->sc_ic; 2022 mblk_t *next; 2023 2024 if (sc->sc_flags & WPI_F_SUSPEND) { 2025 freemsgchain(mp); 2026 return (NULL); 2027 } 2028 2029 if (ic->ic_state != IEEE80211_S_RUN) { 2030 freemsgchain(mp); 2031 return (NULL); 2032 } 2033 2034 while (mp != NULL) { 2035 next = mp->b_next; 2036 mp->b_next = NULL; 2037 if (wpi_send(ic, mp, IEEE80211_FC0_TYPE_DATA) != 0) { 2038 mp->b_next = next; 2039 break; 2040 } 2041 mp = next; 2042 } 2043 return (mp); 2044 } 2045 2046 /* ARGSUSED */ 2047 static int 2048 wpi_send(ieee80211com_t *ic, mblk_t *mp, uint8_t type) 2049 { 2050 wpi_sc_t *sc = (wpi_sc_t *)ic; 2051 wpi_tx_ring_t *ring; 2052 wpi_tx_desc_t *desc; 2053 wpi_tx_data_t *data; 2054 wpi_tx_cmd_t *cmd; 2055 wpi_cmd_data_t *tx; 2056 ieee80211_node_t *in; 2057 struct ieee80211_frame *wh; 2058 struct ieee80211_key *k; 2059 mblk_t *m, *m0; 2060 int rate, hdrlen, len, mblen, off, err = WPI_SUCCESS; 2061 2062 ring = ((type & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_DATA) ? 2063 (&sc->sc_txq[0]) : (&sc->sc_txq[1]); 2064 data = &ring->data[ring->cur]; 2065 desc = data->desc; 2066 cmd = data->cmd; 2067 bzero(desc, sizeof (*desc)); 2068 bzero(cmd, sizeof (*cmd)); 2069 2070 mutex_enter(&sc->sc_tx_lock); 2071 if (sc->sc_flags & WPI_F_SUSPEND) { 2072 mutex_exit(&sc->sc_tx_lock); 2073 if ((type & IEEE80211_FC0_TYPE_MASK) != 2074 IEEE80211_FC0_TYPE_DATA) { 2075 freemsg(mp); 2076 } 2077 err = ENXIO; 2078 goto exit; 2079 } 2080 2081 if (ring->queued > ring->count - 64) { 2082 WPI_DBG((WPI_DEBUG_TX, "wpi_send(): no txbuf\n")); 2083 sc->sc_need_reschedule = 1; 2084 mutex_exit(&sc->sc_tx_lock); 2085 if ((type & IEEE80211_FC0_TYPE_MASK) != 2086 IEEE80211_FC0_TYPE_DATA) { 2087 freemsg(mp); 2088 } 2089 sc->sc_tx_nobuf++; 2090 err = ENOMEM; 2091 goto exit; 2092 } 2093 mutex_exit(&sc->sc_tx_lock); 2094 2095 hdrlen = sizeof (struct ieee80211_frame); 2096 2097 m = allocb(msgdsize(mp) + 32, BPRI_MED); 2098 if (m == NULL) { /* can not alloc buf, drop this package */ 2099 cmn_err(CE_WARN, 2100 "wpi_send(): failed to allocate msgbuf\n"); 2101 freemsg(mp); 2102 err = WPI_SUCCESS; 2103 goto exit; 2104 } 2105 for (off = 0, m0 = mp; m0 != NULL; m0 = m0->b_cont) { 2106 mblen = MBLKL(m0); 2107 (void) memcpy(m->b_rptr + off, m0->b_rptr, mblen); 2108 off += mblen; 2109 } 2110 m->b_wptr += off; 2111 freemsg(mp); 2112 2113 wh = (struct ieee80211_frame *)m->b_rptr; 2114 2115 in = ieee80211_find_txnode(ic, wh->i_addr1); 2116 if (in == NULL) { 2117 cmn_err(CE_WARN, "wpi_send(): failed to find tx node\n"); 2118 freemsg(m); 2119 sc->sc_tx_err++; 2120 err = WPI_SUCCESS; 2121 goto exit; 2122 } 2123 2124 (void) ieee80211_encap(ic, m, in); 2125 2126 cmd->code = WPI_CMD_TX_DATA; 2127 cmd->flags = 0; 2128 cmd->qid = ring->qid; 2129 cmd->idx = ring->cur; 2130 2131 tx = (wpi_cmd_data_t *)cmd->data; 2132 tx->flags = 0; 2133 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2134 tx->flags |= LE_32(WPI_TX_NEED_ACK); 2135 } else { 2136 tx->flags &= ~(LE_32(WPI_TX_NEED_ACK)); 2137 } 2138 2139 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2140 k = ieee80211_crypto_encap(ic, m); 2141 if (k == NULL) { 2142 freemsg(m); 2143 sc->sc_tx_err++; 2144 err = WPI_SUCCESS; 2145 goto exit; 2146 } 2147 2148 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_AES_CCM) { 2149 tx->security = 2; /* for CCMP */ 2150 tx->flags |= LE_32(WPI_TX_NEED_ACK); 2151 (void) memcpy(&tx->key, k->wk_key, k->wk_keylen); 2152 } 2153 2154 /* packet header may have moved, reset our local pointer */ 2155 wh = (struct ieee80211_frame *)m->b_rptr; 2156 } 2157 2158 len = msgdsize(m); 2159 2160 #ifdef DEBUG 2161 if (wpi_dbg_flags & WPI_DEBUG_TX) 2162 ieee80211_dump_pkt((uint8_t *)wh, hdrlen, 0, 0); 2163 #endif 2164 2165 /* pickup a rate */ 2166 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 2167 IEEE80211_FC0_TYPE_MGT) { 2168 /* mgmt frames are sent at the lowest available bit-rate */ 2169 rate = 2; 2170 } else { 2171 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 2172 rate = ic->ic_fixed_rate; 2173 } else 2174 rate = in->in_rates.ir_rates[in->in_txrate]; 2175 } 2176 rate &= IEEE80211_RATE_VAL; 2177 WPI_DBG((WPI_DEBUG_RATECTL, "tx rate[%d of %d] = %x", 2178 in->in_txrate, in->in_rates.ir_nrates, rate)); 2179 #ifdef WPI_BPF 2180 #ifndef WPI_CURRENT 2181 if (sc->sc_drvbpf != NULL) { 2182 #else 2183 if (bpf_peers_present(sc->sc_drvbpf)) { 2184 #endif 2185 struct wpi_tx_radiotap_header *tap = &sc->sc_txtap; 2186 2187 tap->wt_flags = 0; 2188 tap->wt_chan_freq = LE_16(ic->ic_curchan->ic_freq); 2189 tap->wt_chan_flags = LE_16(ic->ic_curchan->ic_flags); 2190 tap->wt_rate = rate; 2191 if (wh->i_fc[1] & IEEE80211_FC1_WEP) 2192 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2193 2194 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 2195 } 2196 #endif 2197 2198 tx->flags |= (LE_32(WPI_TX_AUTO_SEQ)); 2199 tx->flags |= LE_32(WPI_TX_BT_DISABLE | WPI_TX_CALIBRATION); 2200 2201 /* retrieve destination node's id */ 2202 tx->id = IEEE80211_IS_MULTICAST(wh->i_addr1) ? WPI_ID_BROADCAST : 2203 WPI_ID_BSS; 2204 2205 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 2206 IEEE80211_FC0_TYPE_MGT) { 2207 /* tell h/w to set timestamp in probe responses */ 2208 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 2209 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 2210 tx->flags |= LE_32(WPI_TX_INSERT_TSTAMP); 2211 2212 if (((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 2213 IEEE80211_FC0_SUBTYPE_ASSOC_REQ) || 2214 ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 2215 IEEE80211_FC0_SUBTYPE_REASSOC_REQ)) 2216 tx->timeout = 3; 2217 else 2218 tx->timeout = 2; 2219 } else 2220 tx->timeout = 0; 2221 2222 tx->rate = wpi_plcp_signal(rate); 2223 2224 /* be very persistant at sending frames out */ 2225 tx->rts_ntries = 7; 2226 tx->data_ntries = 15; 2227 2228 tx->cck_mask = 0x0f; 2229 tx->ofdm_mask = 0xff; 2230 tx->lifetime = LE_32(0xffffffff); 2231 2232 tx->len = LE_16(len); 2233 2234 /* save and trim IEEE802.11 header */ 2235 (void) memcpy(tx + 1, m->b_rptr, hdrlen); 2236 m->b_rptr += hdrlen; 2237 (void) memcpy(data->dma_data.mem_va, m->b_rptr, len - hdrlen); 2238 2239 WPI_DBG((WPI_DEBUG_TX, "sending data: qid=%d idx=%d len=%d", ring->qid, 2240 ring->cur, len)); 2241 2242 /* first scatter/gather segment is used by the tx data command */ 2243 desc->flags = LE_32(WPI_PAD32(len) << 28 | (2) << 24); 2244 desc->segs[0].addr = LE_32(data->paddr_cmd); 2245 desc->segs[0].len = LE_32( 2246 roundup(4 + sizeof (wpi_cmd_data_t) + hdrlen, 4)); 2247 desc->segs[1].addr = LE_32(data->dma_data.cookie.dmac_address); 2248 desc->segs[1].len = LE_32(len - hdrlen); 2249 2250 WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV); 2251 WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV); 2252 2253 mutex_enter(&sc->sc_tx_lock); 2254 ring->queued++; 2255 mutex_exit(&sc->sc_tx_lock); 2256 2257 /* kick ring */ 2258 ring->cur = (ring->cur + 1) % WPI_TX_RING_COUNT; 2259 WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur); 2260 freemsg(m); 2261 /* release node reference */ 2262 ieee80211_free_node(in); 2263 2264 ic->ic_stats.is_tx_bytes += len; 2265 ic->ic_stats.is_tx_frags++; 2266 2267 if (sc->sc_tx_timer == 0) 2268 sc->sc_tx_timer = 5; 2269 exit: 2270 return (err); 2271 } 2272 2273 static void 2274 wpi_m_ioctl(void* arg, queue_t *wq, mblk_t *mp) 2275 { 2276 wpi_sc_t *sc = (wpi_sc_t *)arg; 2277 ieee80211com_t *ic = &sc->sc_ic; 2278 int err; 2279 2280 err = ieee80211_ioctl(ic, wq, mp); 2281 if (err == ENETRESET) { 2282 /* 2283 * This is special for the hidden AP connection. 2284 * In any case, we should make sure only one 'scan' 2285 * in the driver for a 'connect' CLI command. So 2286 * when connecting to a hidden AP, the scan is just 2287 * sent out to the air when we know the desired 2288 * essid of the AP we want to connect. 2289 */ 2290 if (ic->ic_des_esslen) { 2291 if (sc->sc_flags & WPI_F_RUNNING) { 2292 wpi_m_stop(sc); 2293 (void) wpi_m_start(sc); 2294 (void) ieee80211_new_state(ic, 2295 IEEE80211_S_SCAN, -1); 2296 } 2297 } 2298 } 2299 } 2300 2301 /* 2302 * Callback functions for get/set properties 2303 */ 2304 static int 2305 wpi_m_getprop(void *arg, const char *pr_name, mac_prop_id_t wldp_pr_name, 2306 uint_t pr_flags, uint_t wldp_length, void *wldp_buf) 2307 { 2308 int err = 0; 2309 wpi_sc_t *sc = (wpi_sc_t *)arg; 2310 2311 err = ieee80211_getprop(&sc->sc_ic, pr_name, wldp_pr_name, 2312 pr_flags, wldp_length, wldp_buf); 2313 2314 return (err); 2315 } 2316 static int 2317 wpi_m_setprop(void *arg, const char *pr_name, mac_prop_id_t wldp_pr_name, 2318 uint_t wldp_length, const void *wldp_buf) 2319 { 2320 int err; 2321 wpi_sc_t *sc = (wpi_sc_t *)arg; 2322 ieee80211com_t *ic = &sc->sc_ic; 2323 2324 err = ieee80211_setprop(ic, pr_name, wldp_pr_name, 2325 wldp_length, wldp_buf); 2326 2327 if (err == ENETRESET) { 2328 if (ic->ic_des_esslen) { 2329 if (sc->sc_flags & WPI_F_RUNNING) { 2330 wpi_m_stop(sc); 2331 (void) wpi_m_start(sc); 2332 (void) ieee80211_new_state(ic, 2333 IEEE80211_S_SCAN, -1); 2334 } 2335 } 2336 2337 err = 0; 2338 } 2339 2340 return (err); 2341 } 2342 2343 /*ARGSUSED*/ 2344 static int 2345 wpi_m_stat(void *arg, uint_t stat, uint64_t *val) 2346 { 2347 wpi_sc_t *sc = (wpi_sc_t *)arg; 2348 ieee80211com_t *ic = &sc->sc_ic; 2349 ieee80211_node_t *in; 2350 2351 mutex_enter(&sc->sc_glock); 2352 switch (stat) { 2353 case MAC_STAT_IFSPEED: 2354 in = ic->ic_bss; 2355 *val = ((ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) ? 2356 IEEE80211_RATE(in->in_txrate) : 2357 ic->ic_fixed_rate) / 2 * 1000000; 2358 break; 2359 case MAC_STAT_NOXMTBUF: 2360 *val = sc->sc_tx_nobuf; 2361 break; 2362 case MAC_STAT_NORCVBUF: 2363 *val = sc->sc_rx_nobuf; 2364 break; 2365 case MAC_STAT_IERRORS: 2366 *val = sc->sc_rx_err; 2367 break; 2368 case MAC_STAT_RBYTES: 2369 *val = ic->ic_stats.is_rx_bytes; 2370 break; 2371 case MAC_STAT_IPACKETS: 2372 *val = ic->ic_stats.is_rx_frags; 2373 break; 2374 case MAC_STAT_OBYTES: 2375 *val = ic->ic_stats.is_tx_bytes; 2376 break; 2377 case MAC_STAT_OPACKETS: 2378 *val = ic->ic_stats.is_tx_frags; 2379 break; 2380 case MAC_STAT_OERRORS: 2381 case WIFI_STAT_TX_FAILED: 2382 *val = sc->sc_tx_err; 2383 break; 2384 case WIFI_STAT_TX_RETRANS: 2385 *val = sc->sc_tx_retries; 2386 break; 2387 case WIFI_STAT_FCS_ERRORS: 2388 case WIFI_STAT_WEP_ERRORS: 2389 case WIFI_STAT_TX_FRAGS: 2390 case WIFI_STAT_MCAST_TX: 2391 case WIFI_STAT_RTS_SUCCESS: 2392 case WIFI_STAT_RTS_FAILURE: 2393 case WIFI_STAT_ACK_FAILURE: 2394 case WIFI_STAT_RX_FRAGS: 2395 case WIFI_STAT_MCAST_RX: 2396 case WIFI_STAT_RX_DUPS: 2397 mutex_exit(&sc->sc_glock); 2398 return (ieee80211_stat(ic, stat, val)); 2399 default: 2400 mutex_exit(&sc->sc_glock); 2401 return (ENOTSUP); 2402 } 2403 mutex_exit(&sc->sc_glock); 2404 2405 return (WPI_SUCCESS); 2406 2407 } 2408 2409 static int 2410 wpi_m_start(void *arg) 2411 { 2412 wpi_sc_t *sc = (wpi_sc_t *)arg; 2413 ieee80211com_t *ic = &sc->sc_ic; 2414 int err; 2415 2416 err = wpi_init(sc); 2417 if (err != WPI_SUCCESS) { 2418 wpi_stop(sc); 2419 DELAY(1000000); 2420 err = wpi_init(sc); 2421 } 2422 2423 if (err) { 2424 /* 2425 * The hw init err(eg. RF is OFF). Return Success to make 2426 * the 'plumb' succeed. The wpi_thread() tries to re-init 2427 * background. 2428 */ 2429 mutex_enter(&sc->sc_glock); 2430 sc->sc_flags |= WPI_F_HW_ERR_RECOVER; 2431 mutex_exit(&sc->sc_glock); 2432 return (WPI_SUCCESS); 2433 } 2434 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2435 mutex_enter(&sc->sc_glock); 2436 sc->sc_flags |= WPI_F_RUNNING; 2437 mutex_exit(&sc->sc_glock); 2438 2439 return (WPI_SUCCESS); 2440 } 2441 2442 static void 2443 wpi_m_stop(void *arg) 2444 { 2445 wpi_sc_t *sc = (wpi_sc_t *)arg; 2446 ieee80211com_t *ic = &sc->sc_ic; 2447 2448 wpi_stop(sc); 2449 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2450 mutex_enter(&sc->sc_mt_lock); 2451 sc->sc_flags &= ~WPI_F_HW_ERR_RECOVER; 2452 sc->sc_flags &= ~WPI_F_RATE_AUTO_CTL; 2453 mutex_exit(&sc->sc_mt_lock); 2454 mutex_enter(&sc->sc_glock); 2455 sc->sc_flags &= ~WPI_F_RUNNING; 2456 mutex_exit(&sc->sc_glock); 2457 } 2458 2459 /*ARGSUSED*/ 2460 static int 2461 wpi_m_unicst(void *arg, const uint8_t *macaddr) 2462 { 2463 wpi_sc_t *sc = (wpi_sc_t *)arg; 2464 ieee80211com_t *ic = &sc->sc_ic; 2465 int err; 2466 2467 if (!IEEE80211_ADDR_EQ(ic->ic_macaddr, macaddr)) { 2468 IEEE80211_ADDR_COPY(ic->ic_macaddr, macaddr); 2469 mutex_enter(&sc->sc_glock); 2470 err = wpi_config(sc); 2471 mutex_exit(&sc->sc_glock); 2472 if (err != WPI_SUCCESS) { 2473 cmn_err(CE_WARN, 2474 "wpi_m_unicst(): " 2475 "failed to configure device\n"); 2476 goto fail; 2477 } 2478 } 2479 return (WPI_SUCCESS); 2480 fail: 2481 return (err); 2482 } 2483 2484 /*ARGSUSED*/ 2485 static int 2486 wpi_m_multicst(void *arg, boolean_t add, const uint8_t *m) 2487 { 2488 return (WPI_SUCCESS); 2489 } 2490 2491 /*ARGSUSED*/ 2492 static int 2493 wpi_m_promisc(void *arg, boolean_t on) 2494 { 2495 return (WPI_SUCCESS); 2496 } 2497 2498 static void 2499 wpi_thread(wpi_sc_t *sc) 2500 { 2501 ieee80211com_t *ic = &sc->sc_ic; 2502 clock_t clk; 2503 int times = 0, err, n = 0, timeout = 0; 2504 uint32_t tmp; 2505 2506 mutex_enter(&sc->sc_mt_lock); 2507 while (sc->sc_mf_thread_switch) { 2508 tmp = WPI_READ(sc, WPI_GPIO_CTL); 2509 if (tmp & WPI_GPIO_HW_RF_KILL) { 2510 sc->sc_flags &= ~WPI_F_RADIO_OFF; 2511 } else { 2512 sc->sc_flags |= WPI_F_RADIO_OFF; 2513 } 2514 /* 2515 * If in SUSPEND or the RF is OFF, do nothing 2516 */ 2517 if ((sc->sc_flags & WPI_F_SUSPEND) || 2518 (sc->sc_flags & WPI_F_RADIO_OFF)) { 2519 mutex_exit(&sc->sc_mt_lock); 2520 delay(drv_usectohz(100000)); 2521 mutex_enter(&sc->sc_mt_lock); 2522 continue; 2523 } 2524 2525 /* 2526 * recovery fatal error 2527 */ 2528 if (ic->ic_mach && 2529 (sc->sc_flags & WPI_F_HW_ERR_RECOVER)) { 2530 2531 WPI_DBG((WPI_DEBUG_FW, 2532 "wpi_thread(): " 2533 "try to recover fatal hw error: %d\n", times++)); 2534 2535 wpi_stop(sc); 2536 mutex_exit(&sc->sc_mt_lock); 2537 2538 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2539 delay(drv_usectohz(2000000)); 2540 2541 mutex_enter(&sc->sc_mt_lock); 2542 err = wpi_init(sc); 2543 if (err != WPI_SUCCESS) { 2544 n++; 2545 if (n < 3) 2546 continue; 2547 } 2548 n = 0; 2549 if (!err) 2550 sc->sc_flags |= WPI_F_RUNNING; 2551 sc->sc_flags &= ~WPI_F_HW_ERR_RECOVER; 2552 mutex_exit(&sc->sc_mt_lock); 2553 delay(drv_usectohz(2000000)); 2554 if (sc->sc_ostate != IEEE80211_S_INIT) 2555 ieee80211_new_state(ic, IEEE80211_S_SCAN, 0); 2556 mutex_enter(&sc->sc_mt_lock); 2557 } 2558 2559 /* 2560 * scan next channel 2561 */ 2562 if (ic->ic_mach && 2563 (sc->sc_flags & WPI_F_SCANNING) && sc->sc_scan_next) { 2564 2565 WPI_DBG((WPI_DEBUG_SCAN, 2566 "wpi_thread(): " 2567 "wait for probe response\n")); 2568 2569 sc->sc_scan_next--; 2570 mutex_exit(&sc->sc_mt_lock); 2571 delay(drv_usectohz(200000)); 2572 ieee80211_next_scan(ic); 2573 mutex_enter(&sc->sc_mt_lock); 2574 } 2575 2576 /* 2577 * rate ctl 2578 */ 2579 if (ic->ic_mach && 2580 (sc->sc_flags & WPI_F_RATE_AUTO_CTL)) { 2581 clk = ddi_get_lbolt(); 2582 if (clk > sc->sc_clk + drv_usectohz(500000)) { 2583 wpi_amrr_timeout(sc); 2584 } 2585 } 2586 mutex_exit(&sc->sc_mt_lock); 2587 delay(drv_usectohz(100000)); 2588 mutex_enter(&sc->sc_mt_lock); 2589 if (sc->sc_tx_timer) { 2590 timeout++; 2591 if (timeout == 10) { 2592 sc->sc_tx_timer--; 2593 if (sc->sc_tx_timer == 0) { 2594 sc->sc_flags |= WPI_F_HW_ERR_RECOVER; 2595 sc->sc_ostate = IEEE80211_S_RUN; 2596 WPI_DBG((WPI_DEBUG_FW, 2597 "wpi_thread(): send fail\n")); 2598 } 2599 timeout = 0; 2600 } 2601 } 2602 } 2603 sc->sc_mf_thread = NULL; 2604 cv_signal(&sc->sc_mt_cv); 2605 mutex_exit(&sc->sc_mt_lock); 2606 } 2607 2608 /* 2609 * Extract various information from EEPROM. 2610 */ 2611 static void 2612 wpi_read_eeprom(wpi_sc_t *sc) 2613 { 2614 ieee80211com_t *ic = &sc->sc_ic; 2615 uint16_t val; 2616 int i; 2617 2618 /* read MAC address */ 2619 val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 0); 2620 ic->ic_macaddr[0] = val & 0xff; 2621 ic->ic_macaddr[1] = val >> 8; 2622 val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 1); 2623 ic->ic_macaddr[2] = val & 0xff; 2624 ic->ic_macaddr[3] = val >> 8; 2625 val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 2); 2626 ic->ic_macaddr[4] = val & 0xff; 2627 ic->ic_macaddr[5] = val >> 8; 2628 2629 WPI_DBG((WPI_DEBUG_EEPROM, 2630 "mac:%2x:%2x:%2x:%2x:%2x:%2x\n", 2631 ic->ic_macaddr[0], ic->ic_macaddr[1], 2632 ic->ic_macaddr[2], ic->ic_macaddr[3], 2633 ic->ic_macaddr[4], ic->ic_macaddr[5])); 2634 /* read power settings for 2.4GHz channels */ 2635 for (i = 0; i < 14; i++) { 2636 sc->sc_pwr1[i] = wpi_read_prom_word(sc, WPI_EEPROM_PWR1 + i); 2637 sc->sc_pwr2[i] = wpi_read_prom_word(sc, WPI_EEPROM_PWR2 + i); 2638 WPI_DBG((WPI_DEBUG_EEPROM, 2639 "channel %d pwr1 0x%04x pwr2 0x%04x\n", i + 1, 2640 sc->sc_pwr1[i], sc->sc_pwr2[i])); 2641 } 2642 } 2643 2644 /* 2645 * Send a command to the firmware. 2646 */ 2647 static int 2648 wpi_cmd(wpi_sc_t *sc, int code, const void *buf, int size, int async) 2649 { 2650 wpi_tx_ring_t *ring = &sc->sc_cmdq; 2651 wpi_tx_desc_t *desc; 2652 wpi_tx_cmd_t *cmd; 2653 2654 ASSERT(size <= sizeof (cmd->data)); 2655 ASSERT(mutex_owned(&sc->sc_glock)); 2656 2657 WPI_DBG((WPI_DEBUG_CMD, "wpi_cmd() # code[%d]", code)); 2658 desc = ring->data[ring->cur].desc; 2659 cmd = ring->data[ring->cur].cmd; 2660 2661 cmd->code = (uint8_t)code; 2662 cmd->flags = 0; 2663 cmd->qid = ring->qid; 2664 cmd->idx = ring->cur; 2665 (void) memcpy(cmd->data, buf, size); 2666 2667 desc->flags = LE_32(WPI_PAD32(size) << 28 | 1 << 24); 2668 desc->segs[0].addr = ring->data[ring->cur].paddr_cmd; 2669 desc->segs[0].len = 4 + size; 2670 2671 /* kick cmd ring */ 2672 ring->cur = (ring->cur + 1) % WPI_CMD_RING_COUNT; 2673 WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur); 2674 2675 if (async) 2676 return (WPI_SUCCESS); 2677 else { 2678 clock_t clk; 2679 sc->sc_flags &= ~WPI_F_CMD_DONE; 2680 clk = ddi_get_lbolt() + drv_usectohz(2000000); 2681 while (!(sc->sc_flags & WPI_F_CMD_DONE)) { 2682 if (cv_timedwait(&sc->sc_cmd_cv, &sc->sc_glock, clk) 2683 < 0) 2684 break; 2685 } 2686 if (sc->sc_flags & WPI_F_CMD_DONE) 2687 return (WPI_SUCCESS); 2688 else 2689 return (WPI_FAIL); 2690 } 2691 } 2692 2693 /* 2694 * Configure h/w multi-rate retries. 2695 */ 2696 static int 2697 wpi_mrr_setup(wpi_sc_t *sc) 2698 { 2699 wpi_mrr_setup_t mrr; 2700 int i, err; 2701 2702 /* CCK rates (not used with 802.11a) */ 2703 for (i = WPI_CCK1; i <= WPI_CCK11; i++) { 2704 mrr.rates[i].flags = 0; 2705 mrr.rates[i].signal = wpi_ridx_to_signal[i]; 2706 /* fallback to the immediate lower CCK rate (if any) */ 2707 mrr.rates[i].next = (i == WPI_CCK1) ? WPI_CCK1 : i - 1; 2708 /* try one time at this rate before falling back to "next" */ 2709 mrr.rates[i].ntries = 1; 2710 } 2711 2712 /* OFDM rates (not used with 802.11b) */ 2713 for (i = WPI_OFDM6; i <= WPI_OFDM54; i++) { 2714 mrr.rates[i].flags = 0; 2715 mrr.rates[i].signal = wpi_ridx_to_signal[i]; 2716 /* fallback to the immediate lower OFDM rate (if any) */ 2717 mrr.rates[i].next = (i == WPI_OFDM6) ? WPI_OFDM6 : i - 1; 2718 /* try one time at this rate before falling back to "next" */ 2719 mrr.rates[i].ntries = 1; 2720 } 2721 2722 /* setup MRR for control frames */ 2723 mrr.which = LE_32(WPI_MRR_CTL); 2724 err = wpi_cmd(sc, WPI_CMD_MRR_SETUP, &mrr, sizeof (mrr), 1); 2725 if (err != WPI_SUCCESS) { 2726 WPI_DBG((WPI_DEBUG_MRR, 2727 "could not setup MRR for control frames\n")); 2728 return (err); 2729 } 2730 2731 /* setup MRR for data frames */ 2732 mrr.which = LE_32(WPI_MRR_DATA); 2733 err = wpi_cmd(sc, WPI_CMD_MRR_SETUP, &mrr, sizeof (mrr), 1); 2734 if (err != WPI_SUCCESS) { 2735 WPI_DBG((WPI_DEBUG_MRR, 2736 "could not setup MRR for data frames\n")); 2737 return (err); 2738 } 2739 2740 return (WPI_SUCCESS); 2741 } 2742 2743 static void 2744 wpi_set_led(wpi_sc_t *sc, uint8_t which, uint8_t off, uint8_t on) 2745 { 2746 wpi_cmd_led_t led; 2747 2748 led.which = which; 2749 led.unit = LE_32(100000); /* on/off in unit of 100ms */ 2750 led.off = off; 2751 led.on = on; 2752 2753 (void) wpi_cmd(sc, WPI_CMD_SET_LED, &led, sizeof (led), 1); 2754 } 2755 2756 static int 2757 wpi_auth(wpi_sc_t *sc) 2758 { 2759 ieee80211com_t *ic = &sc->sc_ic; 2760 ieee80211_node_t *in = ic->ic_bss; 2761 wpi_node_t node; 2762 int err; 2763 2764 /* update adapter's configuration */ 2765 IEEE80211_ADDR_COPY(sc->sc_config.bssid, in->in_bssid); 2766 sc->sc_config.chan = ieee80211_chan2ieee(ic, in->in_chan); 2767 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2768 sc->sc_config.cck_mask = 0x03; 2769 sc->sc_config.ofdm_mask = 0; 2770 } else if ((in->in_chan != IEEE80211_CHAN_ANYC) && 2771 (IEEE80211_IS_CHAN_5GHZ(in->in_chan))) { 2772 sc->sc_config.cck_mask = 0; 2773 sc->sc_config.ofdm_mask = 0x15; 2774 } else { /* assume 802.11b/g */ 2775 sc->sc_config.cck_mask = 0x0f; 2776 sc->sc_config.ofdm_mask = 0xff; 2777 } 2778 2779 WPI_DBG((WPI_DEBUG_80211, "config chan %d flags %x cck %x ofdm %x" 2780 " bssid:%02x:%02x:%02x:%02x:%02x:%2x\n", 2781 sc->sc_config.chan, sc->sc_config.flags, 2782 sc->sc_config.cck_mask, sc->sc_config.ofdm_mask, 2783 sc->sc_config.bssid[0], sc->sc_config.bssid[1], 2784 sc->sc_config.bssid[2], sc->sc_config.bssid[3], 2785 sc->sc_config.bssid[4], sc->sc_config.bssid[5])); 2786 err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config, 2787 sizeof (wpi_config_t), 1); 2788 if (err != WPI_SUCCESS) { 2789 cmn_err(CE_WARN, "wpi_auth(): failed to configurate chan%d\n", 2790 sc->sc_config.chan); 2791 return (err); 2792 } 2793 2794 /* add default node */ 2795 (void) memset(&node, 0, sizeof (node)); 2796 IEEE80211_ADDR_COPY(node.bssid, in->in_bssid); 2797 node.id = WPI_ID_BSS; 2798 node.rate = wpi_plcp_signal(2); 2799 err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 1); 2800 if (err != WPI_SUCCESS) { 2801 cmn_err(CE_WARN, "wpi_auth(): failed to add BSS node\n"); 2802 return (err); 2803 } 2804 2805 err = wpi_mrr_setup(sc); 2806 if (err != WPI_SUCCESS) { 2807 cmn_err(CE_WARN, "wpi_auth(): failed to setup MRR\n"); 2808 return (err); 2809 } 2810 2811 return (WPI_SUCCESS); 2812 } 2813 2814 /* 2815 * Send a scan request to the firmware. 2816 */ 2817 static int 2818 wpi_scan(wpi_sc_t *sc) 2819 { 2820 ieee80211com_t *ic = &sc->sc_ic; 2821 wpi_tx_ring_t *ring = &sc->sc_cmdq; 2822 wpi_tx_desc_t *desc; 2823 wpi_tx_data_t *data; 2824 wpi_tx_cmd_t *cmd; 2825 wpi_scan_hdr_t *hdr; 2826 wpi_scan_chan_t *chan; 2827 struct ieee80211_frame *wh; 2828 ieee80211_node_t *in = ic->ic_bss; 2829 uint8_t essid[IEEE80211_NWID_LEN+1]; 2830 struct ieee80211_rateset *rs; 2831 enum ieee80211_phymode mode; 2832 uint8_t *frm; 2833 int i, pktlen, nrates; 2834 2835 /* previous scan not completed */ 2836 if (sc->sc_scan_pending) { 2837 WPI_DBG((WPI_DEBUG_SCAN, "previous scan not completed\n")); 2838 return (WPI_SUCCESS); 2839 } 2840 2841 data = &ring->data[ring->cur]; 2842 desc = data->desc; 2843 cmd = (wpi_tx_cmd_t *)data->dma_data.mem_va; 2844 2845 cmd->code = WPI_CMD_SCAN; 2846 cmd->flags = 0; 2847 cmd->qid = ring->qid; 2848 cmd->idx = ring->cur; 2849 2850 hdr = (wpi_scan_hdr_t *)cmd->data; 2851 (void) memset(hdr, 0, sizeof (wpi_scan_hdr_t)); 2852 hdr->first = 1; 2853 hdr->nchan = 1; 2854 hdr->len = hdr->nchan * sizeof (wpi_scan_chan_t); 2855 hdr->quiet = LE_16(50); 2856 hdr->threshold = LE_16(1); 2857 hdr->filter = LE_32(5); 2858 hdr->rate = wpi_plcp_signal(2); 2859 hdr->id = WPI_ID_BROADCAST; 2860 hdr->mask = LE_32(0xffffffff); 2861 hdr->esslen = ic->ic_des_esslen; 2862 2863 if (ic->ic_des_esslen) { 2864 bcopy(ic->ic_des_essid, essid, ic->ic_des_esslen); 2865 essid[ic->ic_des_esslen] = '\0'; 2866 WPI_DBG((WPI_DEBUG_SCAN, "directed scan %s\n", essid)); 2867 2868 bcopy(ic->ic_des_essid, hdr->essid, ic->ic_des_esslen); 2869 } else { 2870 bzero(hdr->essid, sizeof (hdr->essid)); 2871 } 2872 2873 /* 2874 * Build a probe request frame. Most of the following code is a 2875 * copy & paste of what is done in net80211. Unfortunately, the 2876 * functions to add IEs are static and thus can't be reused here. 2877 */ 2878 wh = (struct ieee80211_frame *)(hdr + 1); 2879 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 2880 IEEE80211_FC0_SUBTYPE_PROBE_REQ; 2881 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 2882 (void) memset(wh->i_addr1, 0xff, 6); 2883 IEEE80211_ADDR_COPY(wh->i_addr2, ic->ic_macaddr); 2884 (void) memset(wh->i_addr3, 0xff, 6); 2885 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by h/w */ 2886 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by h/w */ 2887 2888 frm = (uint8_t *)(wh + 1); 2889 2890 /* add essid IE */ 2891 if (in->in_esslen) { 2892 bcopy(in->in_essid, essid, in->in_esslen); 2893 essid[in->in_esslen] = '\0'; 2894 WPI_DBG((WPI_DEBUG_SCAN, "probe with ESSID %s\n", 2895 essid)); 2896 } 2897 *frm++ = IEEE80211_ELEMID_SSID; 2898 *frm++ = in->in_esslen; 2899 (void) memcpy(frm, in->in_essid, in->in_esslen); 2900 frm += in->in_esslen; 2901 2902 mode = ieee80211_chan2mode(ic, ic->ic_curchan); 2903 rs = &ic->ic_sup_rates[mode]; 2904 2905 /* add supported rates IE */ 2906 *frm++ = IEEE80211_ELEMID_RATES; 2907 nrates = rs->ir_nrates; 2908 if (nrates > IEEE80211_RATE_SIZE) 2909 nrates = IEEE80211_RATE_SIZE; 2910 *frm++ = (uint8_t)nrates; 2911 (void) memcpy(frm, rs->ir_rates, nrates); 2912 frm += nrates; 2913 2914 /* add supported xrates IE */ 2915 if (rs->ir_nrates > IEEE80211_RATE_SIZE) { 2916 nrates = rs->ir_nrates - IEEE80211_RATE_SIZE; 2917 *frm++ = IEEE80211_ELEMID_XRATES; 2918 *frm++ = (uint8_t)nrates; 2919 (void) memcpy(frm, rs->ir_rates + IEEE80211_RATE_SIZE, nrates); 2920 frm += nrates; 2921 } 2922 2923 /* add optionnal IE (usually an RSN IE) */ 2924 if (ic->ic_opt_ie != NULL) { 2925 (void) memcpy(frm, ic->ic_opt_ie, ic->ic_opt_ie_len); 2926 frm += ic->ic_opt_ie_len; 2927 } 2928 2929 /* setup length of probe request */ 2930 hdr->pbrlen = LE_16((uintptr_t)frm - (uintptr_t)wh); 2931 2932 /* align on a 4-byte boundary */ 2933 chan = (wpi_scan_chan_t *)frm; 2934 for (i = 1; i <= hdr->nchan; i++, chan++) { 2935 if (ic->ic_des_esslen) { 2936 chan->flags = 0x3; 2937 } else { 2938 chan->flags = 0x1; 2939 } 2940 chan->chan = ieee80211_chan2ieee(ic, ic->ic_curchan); 2941 chan->magic = LE_16(0x62ab); 2942 chan->active = LE_16(50); 2943 chan->passive = LE_16(120); 2944 2945 frm += sizeof (wpi_scan_chan_t); 2946 } 2947 2948 pktlen = (uintptr_t)frm - (uintptr_t)cmd; 2949 2950 desc->flags = LE_32(WPI_PAD32(pktlen) << 28 | 1 << 24); 2951 desc->segs[0].addr = LE_32(data->dma_data.cookie.dmac_address); 2952 desc->segs[0].len = LE_32(pktlen); 2953 2954 WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV); 2955 WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV); 2956 2957 /* kick cmd ring */ 2958 ring->cur = (ring->cur + 1) % WPI_CMD_RING_COUNT; 2959 WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur); 2960 2961 sc->sc_scan_pending = 1; 2962 2963 return (WPI_SUCCESS); /* will be notified async. of failure/success */ 2964 } 2965 2966 static int 2967 wpi_config(wpi_sc_t *sc) 2968 { 2969 ieee80211com_t *ic = &sc->sc_ic; 2970 wpi_txpower_t txpower; 2971 wpi_power_t power; 2972 #ifdef WPI_BLUE_COEXISTENCE 2973 wpi_bluetooth_t bluetooth; 2974 #endif 2975 wpi_node_t node; 2976 int err; 2977 2978 /* Intel's binary only daemon is a joke.. */ 2979 2980 /* set Tx power for 2.4GHz channels (values read from EEPROM) */ 2981 (void) memset(&txpower, 0, sizeof (txpower)); 2982 (void) memcpy(txpower.pwr1, sc->sc_pwr1, 14 * sizeof (uint16_t)); 2983 (void) memcpy(txpower.pwr2, sc->sc_pwr2, 14 * sizeof (uint16_t)); 2984 err = wpi_cmd(sc, WPI_CMD_TXPOWER, &txpower, sizeof (txpower), 0); 2985 if (err != WPI_SUCCESS) { 2986 cmn_err(CE_WARN, "wpi_config(): failed to set txpower\n"); 2987 return (err); 2988 } 2989 2990 /* set power mode */ 2991 (void) memset(&power, 0, sizeof (power)); 2992 power.flags = LE_32(0x8); 2993 err = wpi_cmd(sc, WPI_CMD_SET_POWER_MODE, &power, sizeof (power), 0); 2994 if (err != WPI_SUCCESS) { 2995 cmn_err(CE_WARN, "wpi_config(): failed to set power mode\n"); 2996 return (err); 2997 } 2998 #ifdef WPI_BLUE_COEXISTENCE 2999 /* configure bluetooth coexistence */ 3000 (void) memset(&bluetooth, 0, sizeof (bluetooth)); 3001 bluetooth.flags = 3; 3002 bluetooth.lead = 0xaa; 3003 bluetooth.kill = 1; 3004 err = wpi_cmd(sc, WPI_CMD_BLUETOOTH, &bluetooth, 3005 sizeof (bluetooth), 0); 3006 if (err != WPI_SUCCESS) { 3007 cmn_err(CE_WARN, 3008 "wpi_config(): " 3009 "failed to configurate bluetooth coexistence\n"); 3010 return (err); 3011 } 3012 #endif 3013 /* configure adapter */ 3014 (void) memset(&sc->sc_config, 0, sizeof (wpi_config_t)); 3015 IEEE80211_ADDR_COPY(sc->sc_config.myaddr, ic->ic_macaddr); 3016 sc->sc_config.chan = ieee80211_chan2ieee(ic, ic->ic_curchan); 3017 sc->sc_config.flags = LE_32(WPI_CONFIG_TSF | WPI_CONFIG_AUTO | 3018 WPI_CONFIG_24GHZ); 3019 sc->sc_config.filter = 0; 3020 switch (ic->ic_opmode) { 3021 case IEEE80211_M_STA: 3022 sc->sc_config.mode = WPI_MODE_STA; 3023 sc->sc_config.filter |= LE_32(WPI_FILTER_MULTICAST); 3024 break; 3025 case IEEE80211_M_IBSS: 3026 case IEEE80211_M_AHDEMO: 3027 sc->sc_config.mode = WPI_MODE_IBSS; 3028 break; 3029 case IEEE80211_M_HOSTAP: 3030 sc->sc_config.mode = WPI_MODE_HOSTAP; 3031 break; 3032 case IEEE80211_M_MONITOR: 3033 sc->sc_config.mode = WPI_MODE_MONITOR; 3034 sc->sc_config.filter |= LE_32(WPI_FILTER_MULTICAST | 3035 WPI_FILTER_CTL | WPI_FILTER_PROMISC); 3036 break; 3037 } 3038 sc->sc_config.cck_mask = 0x0f; /* not yet negotiated */ 3039 sc->sc_config.ofdm_mask = 0xff; /* not yet negotiated */ 3040 err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config, 3041 sizeof (wpi_config_t), 0); 3042 if (err != WPI_SUCCESS) { 3043 cmn_err(CE_WARN, "wpi_config(): " 3044 "failed to set configure command\n"); 3045 return (err); 3046 } 3047 3048 /* add broadcast node */ 3049 (void) memset(&node, 0, sizeof (node)); 3050 (void) memset(node.bssid, 0xff, 6); 3051 node.id = WPI_ID_BROADCAST; 3052 node.rate = wpi_plcp_signal(2); 3053 err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 0); 3054 if (err != WPI_SUCCESS) { 3055 cmn_err(CE_WARN, "wpi_config(): " 3056 "failed to add broadcast node\n"); 3057 return (err); 3058 } 3059 3060 return (WPI_SUCCESS); 3061 } 3062 3063 static void 3064 wpi_stop_master(wpi_sc_t *sc) 3065 { 3066 uint32_t tmp; 3067 int ntries; 3068 3069 tmp = WPI_READ(sc, WPI_RESET); 3070 WPI_WRITE(sc, WPI_RESET, tmp | WPI_STOP_MASTER); 3071 3072 tmp = WPI_READ(sc, WPI_GPIO_CTL); 3073 if ((tmp & WPI_GPIO_PWR_STATUS) == WPI_GPIO_PWR_SLEEP) 3074 return; /* already asleep */ 3075 3076 for (ntries = 0; ntries < 2000; ntries++) { 3077 if (WPI_READ(sc, WPI_RESET) & WPI_MASTER_DISABLED) 3078 break; 3079 DELAY(1000); 3080 } 3081 if (ntries == 2000) 3082 WPI_DBG((WPI_DEBUG_HW, "timeout waiting for master\n")); 3083 } 3084 3085 static int 3086 wpi_power_up(wpi_sc_t *sc) 3087 { 3088 uint32_t tmp; 3089 int ntries; 3090 3091 wpi_mem_lock(sc); 3092 tmp = wpi_mem_read(sc, WPI_MEM_POWER); 3093 wpi_mem_write(sc, WPI_MEM_POWER, tmp & ~0x03000000); 3094 wpi_mem_unlock(sc); 3095 3096 for (ntries = 0; ntries < 5000; ntries++) { 3097 if (WPI_READ(sc, WPI_GPIO_STATUS) & WPI_POWERED) 3098 break; 3099 DELAY(10); 3100 } 3101 if (ntries == 5000) { 3102 cmn_err(CE_WARN, 3103 "wpi_power_up(): timeout waiting for NIC to power up\n"); 3104 return (ETIMEDOUT); 3105 } 3106 return (WPI_SUCCESS); 3107 } 3108 3109 static int 3110 wpi_reset(wpi_sc_t *sc) 3111 { 3112 uint32_t tmp; 3113 int ntries; 3114 3115 /* clear any pending interrupts */ 3116 WPI_WRITE(sc, WPI_INTR, 0xffffffff); 3117 3118 tmp = WPI_READ(sc, WPI_PLL_CTL); 3119 WPI_WRITE(sc, WPI_PLL_CTL, tmp | WPI_PLL_INIT); 3120 3121 tmp = WPI_READ(sc, WPI_CHICKEN); 3122 WPI_WRITE(sc, WPI_CHICKEN, tmp | WPI_CHICKEN_RXNOLOS); 3123 3124 tmp = WPI_READ(sc, WPI_GPIO_CTL); 3125 WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_INIT); 3126 3127 /* wait for clock stabilization */ 3128 for (ntries = 0; ntries < 1000; ntries++) { 3129 if (WPI_READ(sc, WPI_GPIO_CTL) & WPI_GPIO_CLOCK) 3130 break; 3131 DELAY(10); 3132 } 3133 if (ntries == 1000) { 3134 cmn_err(CE_WARN, 3135 "wpi_reset(): timeout waiting for clock stabilization\n"); 3136 return (ETIMEDOUT); 3137 } 3138 3139 /* initialize EEPROM */ 3140 tmp = WPI_READ(sc, WPI_EEPROM_STATUS); 3141 if ((tmp & WPI_EEPROM_VERSION) == 0) { 3142 cmn_err(CE_WARN, "wpi_reset(): EEPROM not found\n"); 3143 return (EIO); 3144 } 3145 WPI_WRITE(sc, WPI_EEPROM_STATUS, tmp & ~WPI_EEPROM_LOCKED); 3146 3147 return (WPI_SUCCESS); 3148 } 3149 3150 static void 3151 wpi_hw_config(wpi_sc_t *sc) 3152 { 3153 uint16_t val; 3154 uint32_t hw; 3155 3156 /* voodoo from the Linux "driver".. */ 3157 hw = WPI_READ(sc, WPI_HWCONFIG); 3158 3159 if ((sc->sc_rev & 0xc0) == 0x40) 3160 hw |= WPI_HW_ALM_MB; 3161 else if (!(sc->sc_rev & 0x80)) 3162 hw |= WPI_HW_ALM_MM; 3163 3164 val = wpi_read_prom_word(sc, WPI_EEPROM_CAPABILITIES); 3165 if ((val & 0xff) == 0x80) 3166 hw |= WPI_HW_SKU_MRC; 3167 3168 val = wpi_read_prom_word(sc, WPI_EEPROM_REVISION); 3169 hw &= ~WPI_HW_REV_D; 3170 if ((val & 0xf0) == 0xd0) 3171 hw |= WPI_HW_REV_D; 3172 3173 val = wpi_read_prom_word(sc, WPI_EEPROM_TYPE); 3174 if ((val & 0xff) > 1) 3175 hw |= WPI_HW_TYPE_B; 3176 3177 WPI_DBG((WPI_DEBUG_HW, "setting h/w config %x\n", hw)); 3178 WPI_WRITE(sc, WPI_HWCONFIG, hw); 3179 } 3180 3181 static int 3182 wpi_init(wpi_sc_t *sc) 3183 { 3184 uint32_t tmp; 3185 int qid, ntries, err; 3186 clock_t clk; 3187 3188 mutex_enter(&sc->sc_glock); 3189 sc->sc_flags &= ~WPI_F_FW_INIT; 3190 3191 (void) wpi_reset(sc); 3192 3193 wpi_mem_lock(sc); 3194 wpi_mem_write(sc, WPI_MEM_CLOCK1, 0xa00); 3195 DELAY(20); 3196 tmp = wpi_mem_read(sc, WPI_MEM_PCIDEV); 3197 wpi_mem_write(sc, WPI_MEM_PCIDEV, tmp | 0x800); 3198 wpi_mem_unlock(sc); 3199 3200 (void) wpi_power_up(sc); 3201 wpi_hw_config(sc); 3202 3203 tmp = WPI_READ(sc, WPI_GPIO_CTL); 3204 if (!(tmp & WPI_GPIO_HW_RF_KILL)) { 3205 cmn_err(CE_WARN, "wpi_init(): Radio transmitter is off\n"); 3206 goto fail1; 3207 } 3208 3209 /* init Rx ring */ 3210 wpi_mem_lock(sc); 3211 WPI_WRITE(sc, WPI_RX_BASE, sc->sc_rxq.dma_desc.cookie.dmac_address); 3212 WPI_WRITE(sc, WPI_RX_RIDX_PTR, 3213 (uint32_t)(sc->sc_dma_sh.cookie.dmac_address + 3214 offsetof(wpi_shared_t, next))); 3215 WPI_WRITE(sc, WPI_RX_WIDX, (WPI_RX_RING_COUNT - 1) & (~7)); 3216 WPI_WRITE(sc, WPI_RX_CONFIG, 0xa9601010); 3217 wpi_mem_unlock(sc); 3218 3219 /* init Tx rings */ 3220 wpi_mem_lock(sc); 3221 wpi_mem_write(sc, WPI_MEM_MODE, 2); /* bypass mode */ 3222 wpi_mem_write(sc, WPI_MEM_RA, 1); /* enable RA0 */ 3223 wpi_mem_write(sc, WPI_MEM_TXCFG, 0x3f); /* enable all 6 Tx rings */ 3224 wpi_mem_write(sc, WPI_MEM_BYPASS1, 0x10000); 3225 wpi_mem_write(sc, WPI_MEM_BYPASS2, 0x30002); 3226 wpi_mem_write(sc, WPI_MEM_MAGIC4, 4); 3227 wpi_mem_write(sc, WPI_MEM_MAGIC5, 5); 3228 3229 WPI_WRITE(sc, WPI_TX_BASE_PTR, sc->sc_dma_sh.cookie.dmac_address); 3230 WPI_WRITE(sc, WPI_MSG_CONFIG, 0xffff05a5); 3231 3232 for (qid = 0; qid < 6; qid++) { 3233 WPI_WRITE(sc, WPI_TX_CTL(qid), 0); 3234 WPI_WRITE(sc, WPI_TX_BASE(qid), 0); 3235 WPI_WRITE(sc, WPI_TX_CONFIG(qid), 0x80200008); 3236 } 3237 wpi_mem_unlock(sc); 3238 3239 /* clear "radio off" and "disable command" bits (reversed logic) */ 3240 WPI_WRITE(sc, WPI_UCODE_CLR, WPI_RADIO_OFF); 3241 WPI_WRITE(sc, WPI_UCODE_CLR, WPI_DISABLE_CMD); 3242 3243 /* clear any pending interrupts */ 3244 WPI_WRITE(sc, WPI_INTR, 0xffffffff); 3245 3246 /* enable interrupts */ 3247 WPI_WRITE(sc, WPI_MASK, WPI_INTR_MASK); 3248 3249 /* load firmware boot code into NIC */ 3250 err = wpi_load_microcode(sc); 3251 if (err != WPI_SUCCESS) { 3252 cmn_err(CE_WARN, "wpi_init(): failed to load microcode\n"); 3253 goto fail1; 3254 } 3255 3256 /* load firmware .text segment into NIC */ 3257 err = wpi_load_firmware(sc, WPI_FW_TEXT); 3258 if (err != WPI_SUCCESS) { 3259 cmn_err(CE_WARN, "wpi_init(): " 3260 "failed to load firmware(text)\n"); 3261 goto fail1; 3262 } 3263 3264 /* load firmware .data segment into NIC */ 3265 err = wpi_load_firmware(sc, WPI_FW_DATA); 3266 if (err != WPI_SUCCESS) { 3267 cmn_err(CE_WARN, "wpi_init(): " 3268 "failed to load firmware(data)\n"); 3269 goto fail1; 3270 } 3271 3272 /* now press "execute" ;-) */ 3273 tmp = WPI_READ(sc, WPI_RESET); 3274 tmp &= ~(WPI_MASTER_DISABLED | WPI_STOP_MASTER | WPI_NEVO_RESET); 3275 WPI_WRITE(sc, WPI_RESET, tmp); 3276 3277 /* ..and wait at most one second for adapter to initialize */ 3278 clk = ddi_get_lbolt() + drv_usectohz(2000000); 3279 while (!(sc->sc_flags & WPI_F_FW_INIT)) { 3280 if (cv_timedwait(&sc->sc_fw_cv, &sc->sc_glock, clk) < 0) 3281 break; 3282 } 3283 if (!(sc->sc_flags & WPI_F_FW_INIT)) { 3284 cmn_err(CE_WARN, 3285 "wpi_init(): timeout waiting for firmware init\n"); 3286 goto fail1; 3287 } 3288 3289 /* wait for thermal sensors to calibrate */ 3290 for (ntries = 0; ntries < 1000; ntries++) { 3291 if (WPI_READ(sc, WPI_TEMPERATURE) != 0) 3292 break; 3293 DELAY(10); 3294 } 3295 3296 if (ntries == 1000) { 3297 WPI_DBG((WPI_DEBUG_HW, 3298 "wpi_init(): timeout waiting for thermal sensors " 3299 "calibration\n")); 3300 } 3301 3302 WPI_DBG((WPI_DEBUG_HW, "temperature %d\n", 3303 (int)WPI_READ(sc, WPI_TEMPERATURE))); 3304 3305 err = wpi_config(sc); 3306 if (err) { 3307 cmn_err(CE_WARN, "wpi_init(): failed to configure device\n"); 3308 goto fail1; 3309 } 3310 3311 mutex_exit(&sc->sc_glock); 3312 return (WPI_SUCCESS); 3313 3314 fail1: 3315 err = WPI_FAIL; 3316 mutex_exit(&sc->sc_glock); 3317 return (err); 3318 } 3319 3320 static void 3321 wpi_stop(wpi_sc_t *sc) 3322 { 3323 uint32_t tmp; 3324 int ac; 3325 3326 3327 mutex_enter(&sc->sc_glock); 3328 /* disable interrupts */ 3329 WPI_WRITE(sc, WPI_MASK, 0); 3330 WPI_WRITE(sc, WPI_INTR, WPI_INTR_MASK); 3331 WPI_WRITE(sc, WPI_INTR_STATUS, 0xff); 3332 WPI_WRITE(sc, WPI_INTR_STATUS, 0x00070000); 3333 3334 wpi_mem_lock(sc); 3335 wpi_mem_write(sc, WPI_MEM_MODE, 0); 3336 wpi_mem_unlock(sc); 3337 3338 /* reset all Tx rings */ 3339 for (ac = 0; ac < 4; ac++) 3340 wpi_reset_tx_ring(sc, &sc->sc_txq[ac]); 3341 wpi_reset_tx_ring(sc, &sc->sc_cmdq); 3342 wpi_reset_tx_ring(sc, &sc->sc_svcq); 3343 3344 /* reset Rx ring */ 3345 wpi_reset_rx_ring(sc); 3346 3347 wpi_mem_lock(sc); 3348 wpi_mem_write(sc, WPI_MEM_CLOCK2, 0x200); 3349 wpi_mem_unlock(sc); 3350 3351 DELAY(5); 3352 3353 wpi_stop_master(sc); 3354 3355 sc->sc_tx_timer = 0; 3356 sc->sc_flags &= ~WPI_F_SCANNING; 3357 sc->sc_scan_pending = 0; 3358 sc->sc_scan_next = 0; 3359 3360 tmp = WPI_READ(sc, WPI_RESET); 3361 WPI_WRITE(sc, WPI_RESET, tmp | WPI_SW_RESET); 3362 3363 mutex_exit(&sc->sc_glock); 3364 } 3365 3366 /* 3367 * Naive implementation of the Adaptive Multi Rate Retry algorithm: 3368 * "IEEE 802.11 Rate Adaptation: A Practical Approach" 3369 * Mathieu Lacage, Hossein Manshaei, Thierry Turletti 3370 * INRIA Sophia - Projet Planete 3371 * http://www-sop.inria.fr/rapports/sophia/RR-5208.html 3372 */ 3373 #define is_success(amrr) \ 3374 ((amrr)->retrycnt < (amrr)->txcnt / 10) 3375 #define is_failure(amrr) \ 3376 ((amrr)->retrycnt > (amrr)->txcnt / 3) 3377 #define is_enough(amrr) \ 3378 ((amrr)->txcnt > 100) 3379 #define is_min_rate(in) \ 3380 ((in)->in_txrate == 0) 3381 #define is_max_rate(in) \ 3382 ((in)->in_txrate == (in)->in_rates.ir_nrates - 1) 3383 #define increase_rate(in) \ 3384 ((in)->in_txrate++) 3385 #define decrease_rate(in) \ 3386 ((in)->in_txrate--) 3387 #define reset_cnt(amrr) \ 3388 { (amrr)->txcnt = (amrr)->retrycnt = 0; } 3389 3390 #define WPI_AMRR_MIN_SUCCESS_THRESHOLD 1 3391 #define WPI_AMRR_MAX_SUCCESS_THRESHOLD 15 3392 3393 static void 3394 wpi_amrr_init(wpi_amrr_t *amrr) 3395 { 3396 amrr->success = 0; 3397 amrr->recovery = 0; 3398 amrr->txcnt = amrr->retrycnt = 0; 3399 amrr->success_threshold = WPI_AMRR_MIN_SUCCESS_THRESHOLD; 3400 } 3401 3402 static void 3403 wpi_amrr_timeout(wpi_sc_t *sc) 3404 { 3405 ieee80211com_t *ic = &sc->sc_ic; 3406 3407 WPI_DBG((WPI_DEBUG_RATECTL, "wpi_amrr_timeout() enter\n")); 3408 if (ic->ic_opmode == IEEE80211_M_STA) 3409 wpi_amrr_ratectl(NULL, ic->ic_bss); 3410 else 3411 ieee80211_iterate_nodes(&ic->ic_sta, wpi_amrr_ratectl, NULL); 3412 sc->sc_clk = ddi_get_lbolt(); 3413 } 3414 3415 /* ARGSUSED */ 3416 static void 3417 wpi_amrr_ratectl(void *arg, ieee80211_node_t *in) 3418 { 3419 wpi_amrr_t *amrr = (wpi_amrr_t *)in; 3420 int need_change = 0; 3421 3422 if (is_success(amrr) && is_enough(amrr)) { 3423 amrr->success++; 3424 if (amrr->success >= amrr->success_threshold && 3425 !is_max_rate(in)) { 3426 amrr->recovery = 1; 3427 amrr->success = 0; 3428 increase_rate(in); 3429 WPI_DBG((WPI_DEBUG_RATECTL, 3430 "AMRR increasing rate %d (txcnt=%d retrycnt=%d)\n", 3431 in->in_txrate, amrr->txcnt, amrr->retrycnt)); 3432 need_change = 1; 3433 } else { 3434 amrr->recovery = 0; 3435 } 3436 } else if (is_failure(amrr)) { 3437 amrr->success = 0; 3438 if (!is_min_rate(in)) { 3439 if (amrr->recovery) { 3440 amrr->success_threshold++; 3441 if (amrr->success_threshold > 3442 WPI_AMRR_MAX_SUCCESS_THRESHOLD) 3443 amrr->success_threshold = 3444 WPI_AMRR_MAX_SUCCESS_THRESHOLD; 3445 } else { 3446 amrr->success_threshold = 3447 WPI_AMRR_MIN_SUCCESS_THRESHOLD; 3448 } 3449 decrease_rate(in); 3450 WPI_DBG((WPI_DEBUG_RATECTL, 3451 "AMRR decreasing rate %d (txcnt=%d retrycnt=%d)\n", 3452 in->in_txrate, amrr->txcnt, amrr->retrycnt)); 3453 need_change = 1; 3454 } 3455 amrr->recovery = 0; /* paper is incorrect */ 3456 } 3457 3458 if (is_enough(amrr) || need_change) 3459 reset_cnt(amrr); 3460 } 3461