1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 12 /* 13 * Copyright 2016 Joyent, Inc. 14 */ 15 16 /* 17 * Collection of known and assembled quirks for devices. These are used while 18 * attaching the controller. 19 * 20 * Please see the big theory statement in xhci.c for more information. 21 */ 22 23 #include <sys/usb/hcd/xhci/xhci.h> 24 25 typedef struct xhci_quirk_table { 26 uint16_t xqt_vendor; 27 uint16_t xqt_device; 28 xhci_quirk_t xqt_quirks; 29 } xhci_quirk_table_t; 30 31 static xhci_quirk_table_t xhci_quirks[] = { 32 { 0x1b7e, 0x1000, XHCI_QUIRK_NO_MSI }, 33 { 0x1033, 0x0194, XHCI_QUIRK_32_ONLY }, 34 { 0x1912, 0x0014, XHCI_QUIRK_32_ONLY }, 35 { 0x8086, 0x0f35, XHCI_QUIRK_INTC_EHCI }, /* BayTrail */ 36 { 0x8086, 0x9c31, XHCI_QUIRK_INTC_EHCI }, /* Panther Point */ 37 { 0x8086, 0x1e31, XHCI_QUIRK_INTC_EHCI }, /* Panther Point */ 38 { 0x8086, 0x8c31, XHCI_QUIRK_INTC_EHCI }, /* Lynx Point */ 39 { 0x8086, 0x8cb1, XHCI_QUIRK_INTC_EHCI }, /* Wildcat Point */ 40 { 0x8086, 0x9cb1, XHCI_QUIRK_INTC_EHCI }, /* Wildcat Point-LP */ 41 { 0xffff, 0xffff, 0 } 42 }; 43 44 void 45 xhci_quirks_populate(xhci_t *xhcip) 46 { 47 xhci_quirk_table_t *xqt; 48 49 for (xqt = &xhci_quirks[0]; xqt->xqt_vendor != 0xffff; xqt++) { 50 if (xqt->xqt_vendor == xhcip->xhci_vendor_id && 51 xqt->xqt_device == xhcip->xhci_device_id) { 52 xhcip->xhci_quirks = xqt->xqt_quirks; 53 return; 54 } 55 } 56 } 57 58 /* 59 * Various Intel Chipsets have shared ports that run under both EHCI and xHCI. 60 * Whenever we reset the controller and its ports, we'll need to toggle these 61 * settings on those platforms. Note that this is generally only needed for 62 * client chipsets and even those have started to drop EHCI. 63 */ 64 void 65 xhci_reroute_intel(xhci_t *xhcip) 66 { 67 uint32_t ports; 68 69 ports = pci_config_get32(xhcip->xhci_cfg_handle, 70 PCI_XHCI_INTEL_USB3PRM); 71 pci_config_put32(xhcip->xhci_cfg_handle, PCI_XHCI_INTEL_USB3_PSSEN, 72 ports); 73 74 ports = pci_config_get32(xhcip->xhci_cfg_handle, 75 PCI_XHCI_INTEL_USB2PRM); 76 pci_config_put32(xhcip->xhci_cfg_handle, PCI_XHCI_INTEL_XUSB2PR, 77 ports); 78 } 79