1*993e3fafSRobert Mustacchi /*
2*993e3fafSRobert Mustacchi * This file and its contents are supplied under the terms of the
3*993e3fafSRobert Mustacchi * Common Development and Distribution License ("CDDL"), version 1.0.
4*993e3fafSRobert Mustacchi * You may only use this file in accordance with the terms of version
5*993e3fafSRobert Mustacchi * 1.0 of the CDDL.
6*993e3fafSRobert Mustacchi *
7*993e3fafSRobert Mustacchi * A full copy of the text of the CDDL should have accompanied this
8*993e3fafSRobert Mustacchi * source. A copy of the CDDL is also available via the Internet at
9*993e3fafSRobert Mustacchi * http://www.illumos.org/license/CDDL.
10*993e3fafSRobert Mustacchi */
11*993e3fafSRobert Mustacchi
12*993e3fafSRobert Mustacchi /*
13*993e3fafSRobert Mustacchi * Copyright 2016 Joyent, Inc.
14*993e3fafSRobert Mustacchi */
15*993e3fafSRobert Mustacchi
16*993e3fafSRobert Mustacchi /*
17*993e3fafSRobert Mustacchi * Collection of known and assembled quirks for devices. These are used while
18*993e3fafSRobert Mustacchi * attaching the controller.
19*993e3fafSRobert Mustacchi *
20*993e3fafSRobert Mustacchi * Please see the big theory statement in xhci.c for more information.
21*993e3fafSRobert Mustacchi */
22*993e3fafSRobert Mustacchi
23*993e3fafSRobert Mustacchi #include <sys/usb/hcd/xhci/xhci.h>
24*993e3fafSRobert Mustacchi
25*993e3fafSRobert Mustacchi typedef struct xhci_quirk_table {
26*993e3fafSRobert Mustacchi uint16_t xqt_vendor;
27*993e3fafSRobert Mustacchi uint16_t xqt_device;
28*993e3fafSRobert Mustacchi xhci_quirk_t xqt_quirks;
29*993e3fafSRobert Mustacchi } xhci_quirk_table_t;
30*993e3fafSRobert Mustacchi
31*993e3fafSRobert Mustacchi static xhci_quirk_table_t xhci_quirks[] = {
32*993e3fafSRobert Mustacchi { 0x1b7e, 0x1000, XHCI_QUIRK_NO_MSI },
33*993e3fafSRobert Mustacchi { 0x1033, 0x0194, XHCI_QUIRK_32_ONLY },
34*993e3fafSRobert Mustacchi { 0x1912, 0x0014, XHCI_QUIRK_32_ONLY },
35*993e3fafSRobert Mustacchi { 0x8086, 0x0f35, XHCI_QUIRK_INTC_EHCI }, /* BayTrail */
36*993e3fafSRobert Mustacchi { 0x8086, 0x9c31, XHCI_QUIRK_INTC_EHCI }, /* Panther Point */
37*993e3fafSRobert Mustacchi { 0x8086, 0x1e31, XHCI_QUIRK_INTC_EHCI }, /* Panther Point */
38*993e3fafSRobert Mustacchi { 0x8086, 0x8c31, XHCI_QUIRK_INTC_EHCI }, /* Lynx Point */
39*993e3fafSRobert Mustacchi { 0x8086, 0x8cb1, XHCI_QUIRK_INTC_EHCI }, /* Wildcat Point */
40*993e3fafSRobert Mustacchi { 0x8086, 0x9cb1, XHCI_QUIRK_INTC_EHCI }, /* Wildcat Point-LP */
41*993e3fafSRobert Mustacchi { 0xffff, 0xffff, 0 }
42*993e3fafSRobert Mustacchi };
43*993e3fafSRobert Mustacchi
44*993e3fafSRobert Mustacchi void
xhci_quirks_populate(xhci_t * xhcip)45*993e3fafSRobert Mustacchi xhci_quirks_populate(xhci_t *xhcip)
46*993e3fafSRobert Mustacchi {
47*993e3fafSRobert Mustacchi xhci_quirk_table_t *xqt;
48*993e3fafSRobert Mustacchi
49*993e3fafSRobert Mustacchi for (xqt = &xhci_quirks[0]; xqt->xqt_vendor != 0xffff; xqt++) {
50*993e3fafSRobert Mustacchi if (xqt->xqt_vendor == xhcip->xhci_vendor_id &&
51*993e3fafSRobert Mustacchi xqt->xqt_device == xhcip->xhci_device_id) {
52*993e3fafSRobert Mustacchi xhcip->xhci_quirks = xqt->xqt_quirks;
53*993e3fafSRobert Mustacchi return;
54*993e3fafSRobert Mustacchi }
55*993e3fafSRobert Mustacchi }
56*993e3fafSRobert Mustacchi }
57*993e3fafSRobert Mustacchi
58*993e3fafSRobert Mustacchi /*
59*993e3fafSRobert Mustacchi * Various Intel Chipsets have shared ports that run under both EHCI and xHCI.
60*993e3fafSRobert Mustacchi * Whenever we reset the controller and its ports, we'll need to toggle these
61*993e3fafSRobert Mustacchi * settings on those platforms. Note that this is generally only needed for
62*993e3fafSRobert Mustacchi * client chipsets and even those have started to drop EHCI.
63*993e3fafSRobert Mustacchi */
64*993e3fafSRobert Mustacchi void
xhci_reroute_intel(xhci_t * xhcip)65*993e3fafSRobert Mustacchi xhci_reroute_intel(xhci_t *xhcip)
66*993e3fafSRobert Mustacchi {
67*993e3fafSRobert Mustacchi uint32_t ports;
68*993e3fafSRobert Mustacchi
69*993e3fafSRobert Mustacchi ports = pci_config_get32(xhcip->xhci_cfg_handle,
70*993e3fafSRobert Mustacchi PCI_XHCI_INTEL_USB3PRM);
71*993e3fafSRobert Mustacchi pci_config_put32(xhcip->xhci_cfg_handle, PCI_XHCI_INTEL_USB3_PSSEN,
72*993e3fafSRobert Mustacchi ports);
73*993e3fafSRobert Mustacchi
74*993e3fafSRobert Mustacchi ports = pci_config_get32(xhcip->xhci_cfg_handle,
75*993e3fafSRobert Mustacchi PCI_XHCI_INTEL_USB2PRM);
76*993e3fafSRobert Mustacchi pci_config_put32(xhcip->xhci_cfg_handle, PCI_XHCI_INTEL_XUSB2PR,
77*993e3fafSRobert Mustacchi ports);
78*993e3fafSRobert Mustacchi }
79