1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 /* 28 * AHCI (Advanced Host Controller Interface) SATA HBA Driver 29 * 30 * Power Management Support 31 * ------------------------ 32 * 33 * At the moment, the ahci driver only implements suspend/resume to 34 * support Suspend to RAM on X86 feature. Device power management isn't 35 * implemented, link power management is disabled, and hot plug isn't 36 * allowed during the period from suspend to resume. 37 * 38 * For s/r support, the ahci driver only need to implement DDI_SUSPEND 39 * and DDI_RESUME entries, and don't need to take care of new requests 40 * sent down after suspend because the target driver (sd) has already 41 * handled these conditions, and blocked these requests. For the detailed 42 * information, please check with sdopen, sdclose and sdioctl routines. 43 * 44 */ 45 46 #include <sys/note.h> 47 #include <sys/scsi/scsi.h> 48 #include <sys/pci.h> 49 #include <sys/disp.h> 50 #include <sys/sata/sata_hba.h> 51 #include <sys/sata/adapters/ahci/ahcireg.h> 52 #include <sys/sata/adapters/ahci/ahcivar.h> 53 54 /* 55 * This is the string displayed by modinfo, etc. 56 * Make sure you keep the version ID up to date! 57 */ 58 static char ahci_ident[] = "ahci driver"; 59 60 /* 61 * Function prototypes for driver entry points 62 */ 63 static int ahci_attach(dev_info_t *, ddi_attach_cmd_t); 64 static int ahci_detach(dev_info_t *, ddi_detach_cmd_t); 65 static int ahci_getinfo(dev_info_t *, ddi_info_cmd_t, void *, void **); 66 static int ahci_quiesce(dev_info_t *); 67 68 /* 69 * Function prototypes for SATA Framework interfaces 70 */ 71 static int ahci_register_sata_hba_tran(ahci_ctl_t *, uint32_t); 72 static int ahci_unregister_sata_hba_tran(ahci_ctl_t *); 73 74 static int ahci_tran_probe_port(dev_info_t *, sata_device_t *); 75 static int ahci_tran_start(dev_info_t *, sata_pkt_t *spkt); 76 static int ahci_tran_abort(dev_info_t *, sata_pkt_t *, int); 77 static int ahci_tran_reset_dport(dev_info_t *, sata_device_t *); 78 static int ahci_tran_hotplug_port_activate(dev_info_t *, sata_device_t *); 79 static int ahci_tran_hotplug_port_deactivate(dev_info_t *, sata_device_t *); 80 #if defined(__lock_lint) 81 static int ahci_selftest(dev_info_t *, sata_device_t *); 82 #endif 83 84 /* 85 * Local function prototypes 86 */ 87 static int ahci_alloc_ports_state(ahci_ctl_t *); 88 static void ahci_dealloc_ports_state(ahci_ctl_t *); 89 static int ahci_alloc_port_state(ahci_ctl_t *, uint8_t); 90 static void ahci_dealloc_port_state(ahci_ctl_t *, uint8_t); 91 static int ahci_alloc_rcvd_fis(ahci_ctl_t *, ahci_port_t *, uint8_t); 92 static void ahci_dealloc_rcvd_fis(ahci_port_t *); 93 static int ahci_alloc_cmd_list(ahci_ctl_t *, ahci_port_t *, uint8_t); 94 static void ahci_dealloc_cmd_list(ahci_ctl_t *, ahci_port_t *); 95 static int ahci_alloc_cmd_tables(ahci_ctl_t *, ahci_port_t *); 96 static void ahci_dealloc_cmd_tables(ahci_ctl_t *, ahci_port_t *); 97 static void ahci_alloc_pmult(ahci_ctl_t *, ahci_port_t *); 98 static void ahci_dealloc_pmult(ahci_ctl_t *, ahci_port_t *); 99 100 static int ahci_initialize_controller(ahci_ctl_t *); 101 static void ahci_uninitialize_controller(ahci_ctl_t *); 102 static int ahci_initialize_port(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 103 static int ahci_config_space_init(ahci_ctl_t *); 104 105 static void ahci_drain_ports_taskq(ahci_ctl_t *); 106 static int ahci_rdwr_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t *, 107 uint8_t); 108 static int ahci_read_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t *); 109 static int ahci_write_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t); 110 static int ahci_update_pmult_pscr(ahci_ctl_t *, ahci_addr_t *, 111 sata_device_t *); 112 static int ahci_update_pmult_gscr(ahci_ctl_t *, ahci_addr_t *, 113 sata_pmult_gscr_t *); 114 static int ahci_initialize_pmult(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *, 115 sata_device_t *); 116 static int ahci_initialize_pmport(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 117 static int ahci_probe_pmult(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 118 static int ahci_probe_pmport(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *, 119 sata_device_t *); 120 121 static void ahci_disable_interface_pm(ahci_ctl_t *, uint8_t); 122 static int ahci_start_port(ahci_ctl_t *, ahci_port_t *, uint8_t); 123 static void ahci_find_dev_signature(ahci_ctl_t *, ahci_port_t *, 124 ahci_addr_t *); 125 static void ahci_update_sata_registers(ahci_ctl_t *, uint8_t, sata_device_t *); 126 static int ahci_deliver_satapkt(ahci_ctl_t *, ahci_port_t *, 127 ahci_addr_t *, sata_pkt_t *); 128 static int ahci_do_sync_start(ahci_ctl_t *, ahci_port_t *, 129 ahci_addr_t *, sata_pkt_t *); 130 static int ahci_claim_free_slot(ahci_ctl_t *, ahci_port_t *, 131 ahci_addr_t *, int); 132 static void ahci_copy_err_cnxt(sata_cmd_t *, ahci_fis_d2h_register_t *); 133 static void ahci_copy_ncq_err_page(sata_cmd_t *, 134 struct sata_ncq_error_recovery_page *); 135 static void ahci_copy_out_regs(sata_cmd_t *, ahci_fis_d2h_register_t *); 136 137 static int ahci_software_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 138 static int ahci_hba_reset(ahci_ctl_t *); 139 static int ahci_port_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 140 static int ahci_pmport_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 141 static void ahci_reject_all_abort_pkts(ahci_ctl_t *, ahci_port_t *, uint8_t); 142 static int ahci_reset_device_reject_pkts(ahci_ctl_t *, ahci_port_t *, 143 ahci_addr_t *); 144 static int ahci_reset_pmdevice_reject_pkts(ahci_ctl_t *, ahci_port_t *, 145 ahci_addr_t *); 146 static int ahci_reset_port_reject_pkts(ahci_ctl_t *, ahci_port_t *, 147 ahci_addr_t *); 148 static int ahci_reset_hba_reject_pkts(ahci_ctl_t *); 149 static int ahci_put_port_into_notrunning_state(ahci_ctl_t *, ahci_port_t *, 150 uint8_t); 151 static int ahci_restart_port_wait_till_ready(ahci_ctl_t *, ahci_port_t *, 152 uint8_t, int, int *); 153 static void ahci_mop_commands(ahci_ctl_t *, ahci_port_t *, uint32_t, 154 uint32_t, uint32_t, uint32_t, uint32_t); 155 static uint32_t ahci_get_rdlogext_data(ahci_ctl_t *, ahci_port_t *, uint8_t); 156 static void ahci_get_rqsense_data(ahci_ctl_t *, ahci_port_t *, 157 uint8_t, sata_pkt_t *); 158 static void ahci_fatal_error_recovery_handler(ahci_ctl_t *, ahci_port_t *, 159 ahci_addr_t *, uint32_t); 160 static void ahci_pmult_error_recovery_handler(ahci_ctl_t *, ahci_port_t *, 161 uint8_t, uint32_t); 162 static void ahci_timeout_pkts(ahci_ctl_t *, ahci_port_t *, 163 uint8_t, uint32_t); 164 static void ahci_events_handler(void *); 165 static void ahci_watchdog_handler(ahci_ctl_t *); 166 167 static uint_t ahci_intr(caddr_t, caddr_t); 168 static void ahci_port_intr(ahci_ctl_t *, ahci_port_t *, uint8_t); 169 static int ahci_add_intrs(ahci_ctl_t *, int); 170 static void ahci_rem_intrs(ahci_ctl_t *); 171 static void ahci_enable_all_intrs(ahci_ctl_t *); 172 static void ahci_disable_all_intrs(ahci_ctl_t *); 173 static void ahci_enable_port_intrs(ahci_ctl_t *, uint8_t); 174 static void ahci_disable_port_intrs(ahci_ctl_t *, uint8_t); 175 176 static int ahci_intr_cmd_cmplt(ahci_ctl_t *, ahci_port_t *, uint8_t); 177 static int ahci_intr_set_device_bits(ahci_ctl_t *, ahci_port_t *, uint8_t); 178 static int ahci_intr_ncq_events(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 179 static int ahci_intr_pmult_sntf_events(ahci_ctl_t *, ahci_port_t *, uint8_t); 180 static int ahci_intr_port_connect_change(ahci_ctl_t *, ahci_port_t *, uint8_t); 181 static int ahci_intr_device_mechanical_presence_status(ahci_ctl_t *, 182 ahci_port_t *, uint8_t); 183 static int ahci_intr_phyrdy_change(ahci_ctl_t *, ahci_port_t *, uint8_t); 184 static int ahci_intr_non_fatal_error(ahci_ctl_t *, ahci_port_t *, 185 uint8_t, uint32_t); 186 static int ahci_intr_fatal_error(ahci_ctl_t *, ahci_port_t *, 187 uint8_t, uint32_t); 188 static int ahci_intr_cold_port_detect(ahci_ctl_t *, ahci_port_t *, uint8_t); 189 190 static void ahci_get_ahci_addr(ahci_ctl_t *, sata_device_t *, ahci_addr_t *); 191 static int ahci_get_num_implemented_ports(uint32_t); 192 static void ahci_log_fatal_error_message(ahci_ctl_t *, uint8_t port, 193 uint32_t); 194 static void ahci_log_serror_message(ahci_ctl_t *, uint8_t, uint32_t, int); 195 #if AHCI_DEBUG 196 static void ahci_log(ahci_ctl_t *, uint_t, char *, ...); 197 #endif 198 199 200 /* 201 * DMA attributes for the data buffer 202 * 203 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 204 * does not support 64-bit addressing 205 */ 206 static ddi_dma_attr_t buffer_dma_attr = { 207 DMA_ATTR_V0, /* dma_attr_version */ 208 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 209 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 210 0x3fffffull, /* dma_attr_count_max i.e. for one cookie */ 211 0x2ull, /* dma_attr_align: word aligned */ 212 1, /* dma_attr_burstsizes */ 213 1, /* dma_attr_minxfer */ 214 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 215 0xffffffffull, /* dma_attr_seg */ 216 AHCI_PRDT_NUMBER, /* dma_attr_sgllen */ 217 512, /* dma_attr_granular */ 218 0, /* dma_attr_flags */ 219 }; 220 221 /* 222 * DMA attributes for the rcvd FIS 223 * 224 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 225 * does not support 64-bit addressing 226 */ 227 static ddi_dma_attr_t rcvd_fis_dma_attr = { 228 DMA_ATTR_V0, /* dma_attr_version */ 229 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 230 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 231 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 232 0x100ull, /* dma_attr_align: 256-byte aligned */ 233 1, /* dma_attr_burstsizes */ 234 1, /* dma_attr_minxfer */ 235 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 236 0xffffffffull, /* dma_attr_seg */ 237 1, /* dma_attr_sgllen */ 238 1, /* dma_attr_granular */ 239 0, /* dma_attr_flags */ 240 }; 241 242 /* 243 * DMA attributes for the command list 244 * 245 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 246 * does not support 64-bit addressing 247 */ 248 static ddi_dma_attr_t cmd_list_dma_attr = { 249 DMA_ATTR_V0, /* dma_attr_version */ 250 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 251 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 252 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 253 0x400ull, /* dma_attr_align: 1K-byte aligned */ 254 1, /* dma_attr_burstsizes */ 255 1, /* dma_attr_minxfer */ 256 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 257 0xffffffffull, /* dma_attr_seg */ 258 1, /* dma_attr_sgllen */ 259 1, /* dma_attr_granular */ 260 0, /* dma_attr_flags */ 261 }; 262 263 /* 264 * DMA attributes for cmd tables 265 * 266 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 267 * does not support 64-bit addressing 268 */ 269 static ddi_dma_attr_t cmd_table_dma_attr = { 270 DMA_ATTR_V0, /* dma_attr_version */ 271 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 272 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 273 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 274 0x80ull, /* dma_attr_align: 128-byte aligned */ 275 1, /* dma_attr_burstsizes */ 276 1, /* dma_attr_minxfer */ 277 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 278 0xffffffffull, /* dma_attr_seg */ 279 1, /* dma_attr_sgllen */ 280 1, /* dma_attr_granular */ 281 0, /* dma_attr_flags */ 282 }; 283 284 285 /* Device access attributes */ 286 static ddi_device_acc_attr_t accattr = { 287 DDI_DEVICE_ATTR_V0, 288 DDI_STRUCTURE_LE_ACC, 289 DDI_STRICTORDER_ACC 290 }; 291 292 293 static struct dev_ops ahcictl_dev_ops = { 294 DEVO_REV, /* devo_rev */ 295 0, /* refcnt */ 296 ahci_getinfo, /* info */ 297 nulldev, /* identify */ 298 nulldev, /* probe */ 299 ahci_attach, /* attach */ 300 ahci_detach, /* detach */ 301 nodev, /* no reset */ 302 (struct cb_ops *)0, /* driver operations */ 303 NULL, /* bus operations */ 304 NULL, /* power */ 305 ahci_quiesce, /* quiesce */ 306 }; 307 308 static sata_tran_hotplug_ops_t ahci_tran_hotplug_ops = { 309 SATA_TRAN_HOTPLUG_OPS_REV_1, 310 ahci_tran_hotplug_port_activate, 311 ahci_tran_hotplug_port_deactivate 312 }; 313 314 extern struct mod_ops mod_driverops; 315 316 static struct modldrv modldrv = { 317 &mod_driverops, /* driverops */ 318 ahci_ident, /* short description */ 319 &ahcictl_dev_ops, /* driver ops */ 320 }; 321 322 static struct modlinkage modlinkage = { 323 MODREV_1, 324 &modldrv, 325 NULL 326 }; 327 328 /* The following variables are watchdog handler related */ 329 static int ahci_watchdog_timeout = 5; /* 5 seconds */ 330 static int ahci_watchdog_tick; 331 332 /* 333 * This static variable indicates the size of command table, 334 * and it's changeable with prdt number, which ahci_dma_prdt_number 335 * indicates. 336 */ 337 static size_t ahci_cmd_table_size; 338 339 /* 340 * The below global variables are tunable via /etc/system 341 * 342 * ahci_dma_prdt_number 343 * ahci_msi_enabled 344 * ahci_buf_64bit_dma 345 * ahci_commu_64bit_dma 346 */ 347 348 /* The number of Physical Region Descriptor Table(PRDT) in Command Table */ 349 int ahci_dma_prdt_number = AHCI_PRDT_NUMBER; 350 351 /* AHCI MSI is tunable */ 352 boolean_t ahci_msi_enabled = B_TRUE; 353 354 /* 355 * 64-bit dma addressing for data buffer is tunable 356 * 357 * The variable controls only the below value: 358 * DBAU (upper 32-bits physical address of data block) 359 */ 360 boolean_t ahci_buf_64bit_dma = B_TRUE; 361 362 /* 363 * 64-bit dma addressing for communication system descriptors is tunable 364 * 365 * The variable controls the below three values: 366 * 367 * PxCLBU (upper 32-bits for the command list base physical address) 368 * PxFBU (upper 32-bits for the received FIS base physical address) 369 * CTBAU (upper 32-bits of command table base) 370 */ 371 boolean_t ahci_commu_64bit_dma = B_TRUE; 372 373 /* 374 * By default, 64-bit dma for data buffer will be disabled for AMD/ATI SB600 375 * chipset. If the users want to have a try with 64-bit dma, please change 376 * the below variable value to enable it. 377 */ 378 boolean_t sb600_buf_64bit_dma_disable = B_TRUE; 379 380 /* 381 * By default, 64-bit dma for command buffer will be disabled for AMD/ATI 382 * SB600/700/710/750/800. If the users want to have a try with 64-bit dma, 383 * please change the below value to enable it. 384 */ 385 boolean_t sbxxx_commu_64bit_dma_disable = B_TRUE; 386 387 388 /* 389 * End of global tunable variable definition 390 */ 391 392 #if AHCI_DEBUG 393 uint32_t ahci_debug_flags = 0; 394 #else 395 uint32_t ahci_debug_flags = (AHCIDBG_ERRS|AHCIDBG_TIMEOUT); 396 #endif 397 398 399 #if AHCI_DEBUG 400 /* The following is needed for ahci_log() */ 401 static kmutex_t ahci_log_mutex; 402 static char ahci_log_buf[512]; 403 #endif 404 405 /* Opaque state pointer initialized by ddi_soft_state_init() */ 406 static void *ahci_statep = NULL; 407 408 /* 409 * ahci module initialization. 410 */ 411 int 412 _init(void) 413 { 414 int ret; 415 416 ret = ddi_soft_state_init(&ahci_statep, sizeof (ahci_ctl_t), 0); 417 if (ret != 0) { 418 goto err_out; 419 } 420 421 #if AHCI_DEBUG 422 mutex_init(&ahci_log_mutex, NULL, MUTEX_DRIVER, NULL); 423 #endif 424 425 if ((ret = sata_hba_init(&modlinkage)) != 0) { 426 #if AHCI_DEBUG 427 mutex_destroy(&ahci_log_mutex); 428 #endif 429 ddi_soft_state_fini(&ahci_statep); 430 goto err_out; 431 } 432 433 ret = mod_install(&modlinkage); 434 if (ret != 0) { 435 sata_hba_fini(&modlinkage); 436 #if AHCI_DEBUG 437 mutex_destroy(&ahci_log_mutex); 438 #endif 439 ddi_soft_state_fini(&ahci_statep); 440 goto err_out; 441 } 442 443 /* watchdog tick */ 444 ahci_watchdog_tick = drv_usectohz( 445 (clock_t)ahci_watchdog_timeout * 1000000); 446 return (ret); 447 448 err_out: 449 cmn_err(CE_WARN, "!ahci: Module init failed"); 450 return (ret); 451 } 452 453 /* 454 * ahci module uninitialize. 455 */ 456 int 457 _fini(void) 458 { 459 int ret; 460 461 ret = mod_remove(&modlinkage); 462 if (ret != 0) { 463 return (ret); 464 } 465 466 /* Remove the resources allocated in _init(). */ 467 sata_hba_fini(&modlinkage); 468 #if AHCI_DEBUG 469 mutex_destroy(&ahci_log_mutex); 470 #endif 471 ddi_soft_state_fini(&ahci_statep); 472 473 return (ret); 474 } 475 476 /* 477 * _info entry point 478 */ 479 int 480 _info(struct modinfo *modinfop) 481 { 482 return (mod_info(&modlinkage, modinfop)); 483 } 484 485 /* 486 * The attach entry point for dev_ops. 487 */ 488 static int 489 ahci_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 490 { 491 ahci_ctl_t *ahci_ctlp = NULL; 492 int instance = ddi_get_instance(dip); 493 int status; 494 int attach_state; 495 uint32_t cap_status, ahci_version; 496 int intr_types; 497 int i; 498 pci_regspec_t *regs; 499 int regs_length; 500 int rnumber; 501 #if AHCI_DEBUG 502 int speed; 503 #endif 504 505 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, "ahci_attach enter", 506 NULL); 507 508 switch (cmd) { 509 case DDI_ATTACH: 510 break; 511 512 case DDI_RESUME: 513 514 /* 515 * During DDI_RESUME, the hardware state of the device 516 * (power may have been removed from the device) must be 517 * restored, allow pending requests to continue, and 518 * service new requests. 519 */ 520 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 521 mutex_enter(&ahci_ctlp->ahcictl_mutex); 522 523 /* Restart watch thread */ 524 if (ahci_ctlp->ahcictl_timeout_id == 0) 525 ahci_ctlp->ahcictl_timeout_id = timeout( 526 (void (*)(void *))ahci_watchdog_handler, 527 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 528 529 mutex_exit(&ahci_ctlp->ahcictl_mutex); 530 531 /* 532 * Re-initialize the controller and enable the interrupts and 533 * restart all the ports. 534 * 535 * Note that so far we don't support hot-plug during 536 * suspend/resume. 537 */ 538 if (ahci_initialize_controller(ahci_ctlp) != AHCI_SUCCESS) { 539 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PM, ahci_ctlp, 540 "Failed to initialize the controller " 541 "during DDI_RESUME", NULL); 542 return (DDI_FAILURE); 543 } 544 545 mutex_enter(&ahci_ctlp->ahcictl_mutex); 546 ahci_ctlp->ahcictl_flags &= ~ AHCI_SUSPEND; 547 mutex_exit(&ahci_ctlp->ahcictl_mutex); 548 549 return (DDI_SUCCESS); 550 551 default: 552 return (DDI_FAILURE); 553 } 554 555 attach_state = AHCI_ATTACH_STATE_NONE; 556 557 /* Allocate soft state */ 558 status = ddi_soft_state_zalloc(ahci_statep, instance); 559 if (status != DDI_SUCCESS) { 560 cmn_err(CE_WARN, "!ahci%d: Cannot allocate soft state", 561 instance); 562 goto err_out; 563 } 564 565 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 566 ahci_ctlp->ahcictl_flags |= AHCI_ATTACH; 567 ahci_ctlp->ahcictl_dip = dip; 568 569 /* Initialize the cport/port mapping */ 570 for (i = 0; i < AHCI_MAX_PORTS; i++) { 571 ahci_ctlp->ahcictl_port_to_cport[i] = 0xff; 572 ahci_ctlp->ahcictl_cport_to_port[i] = 0xff; 573 } 574 575 attach_state |= AHCI_ATTACH_STATE_STATEP_ALLOC; 576 577 /* 578 * Now map the AHCI base address; which includes global 579 * registers and port control registers 580 * 581 * According to the spec, the AHCI Base Address is BAR5, 582 * but BAR0-BAR4 are optional, so we need to check which 583 * rnumber is used for BAR5. 584 */ 585 586 /* 587 * search through DDI "reg" property for the AHCI register set 588 */ 589 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, dip, 590 DDI_PROP_DONTPASS, "reg", (int **)®s, 591 (uint_t *)®s_length) != DDI_PROP_SUCCESS) { 592 cmn_err(CE_WARN, "!ahci%d: Cannot lookup reg property", 593 instance); 594 goto err_out; 595 } 596 597 /* AHCI Base Address is located at 0x24 offset */ 598 for (rnumber = 0; rnumber < regs_length; ++rnumber) { 599 if ((regs[rnumber].pci_phys_hi & PCI_REG_REG_M) 600 == AHCI_PCI_RNUM) 601 break; 602 } 603 604 ddi_prop_free(regs); 605 606 if (rnumber == regs_length) { 607 cmn_err(CE_WARN, "!ahci%d: Cannot find AHCI register set", 608 instance); 609 goto err_out; 610 } 611 612 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "rnumber = %d", rnumber); 613 614 status = ddi_regs_map_setup(dip, 615 rnumber, 616 (caddr_t *)&ahci_ctlp->ahcictl_ahci_addr, 617 0, 618 0, 619 &accattr, 620 &ahci_ctlp->ahcictl_ahci_acc_handle); 621 if (status != DDI_SUCCESS) { 622 cmn_err(CE_WARN, "!ahci%d: Cannot map register space", 623 instance); 624 goto err_out; 625 } 626 627 attach_state |= AHCI_ATTACH_STATE_REG_MAP; 628 629 /* Get the AHCI version information */ 630 ahci_version = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 631 (uint32_t *)AHCI_GLOBAL_VS(ahci_ctlp)); 632 633 cmn_err(CE_NOTE, "!ahci%d: hba AHCI version = %x.%x", instance, 634 (ahci_version & 0xffff0000) >> 16, 635 ((ahci_version & 0x0000ff00) >> 4 | 636 (ahci_version & 0x000000ff))); 637 638 /* We don't support controllers whose versions are lower than 1.0 */ 639 if (!(ahci_version & 0xffff0000)) { 640 cmn_err(CE_WARN, "ahci%d: Don't support AHCI HBA with lower " 641 "than version 1.0", instance); 642 goto err_out; 643 } 644 645 /* Get the HBA capabilities information */ 646 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 647 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 648 649 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba capabilites = 0x%x", 650 cap_status); 651 652 #if AHCI_DEBUG 653 /* Get the interface speed supported by the HBA */ 654 speed = (cap_status & AHCI_HBA_CAP_ISS) >> AHCI_HBA_CAP_ISS_SHIFT; 655 if (speed == 0x01) { 656 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 657 "hba interface speed support: Gen 1 (1.5Gbps)", NULL); 658 } else if (speed == 0x10) { 659 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 660 "hba interface speed support: Gen 2 (3 Gbps)", NULL); 661 } else if (speed == 0x11) { 662 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 663 "hba interface speed support: Gen 3 (6 Gbps)", NULL); 664 } 665 #endif 666 667 /* Get the number of command slots supported by the HBA */ 668 ahci_ctlp->ahcictl_num_cmd_slots = 669 ((cap_status & AHCI_HBA_CAP_NCS) >> 670 AHCI_HBA_CAP_NCS_SHIFT) + 1; 671 672 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba number of cmd slots: %d", 673 ahci_ctlp->ahcictl_num_cmd_slots); 674 675 /* Get the bit map which indicates ports implemented by the HBA */ 676 ahci_ctlp->ahcictl_ports_implemented = 677 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 678 (uint32_t *)AHCI_GLOBAL_PI(ahci_ctlp)); 679 680 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba implementation of ports: 0x%x", 681 ahci_ctlp->ahcictl_ports_implemented); 682 683 /* 684 * According to the AHCI spec, CAP.NP should indicate the maximum 685 * number of ports supported by the HBA silicon, but we found 686 * this value of ICH8 chipset only indicates the number of ports 687 * implemented (exposed) by it. Therefore, the driver should calculate 688 * the potential maximum value by checking PI register, and use 689 * the maximum of this value and CAP.NP. 690 */ 691 ahci_ctlp->ahcictl_num_ports = max( 692 (cap_status & AHCI_HBA_CAP_NP) + 1, 693 ddi_fls(ahci_ctlp->ahcictl_ports_implemented)); 694 695 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba number of ports: %d", 696 ahci_ctlp->ahcictl_num_ports); 697 698 /* Get the number of implemented ports by the HBA */ 699 ahci_ctlp->ahcictl_num_implemented_ports = 700 ahci_get_num_implemented_ports( 701 ahci_ctlp->ahcictl_ports_implemented); 702 703 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 704 "hba number of implemented ports: %d", 705 ahci_ctlp->ahcictl_num_implemented_ports); 706 707 /* Check whether HBA supports 64bit DMA addressing */ 708 if (!(cap_status & AHCI_HBA_CAP_S64A)) { 709 ahci_ctlp->ahcictl_cap |= AHCI_CAP_BUF_32BIT_DMA; 710 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 711 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 712 "hba does not support 64-bit addressing", NULL); 713 } 714 715 /* Checking for the support of Port Multiplier */ 716 if (cap_status & AHCI_HBA_CAP_SPM) { 717 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PMULT_CBSS; 718 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 719 "hba supports port multiplier (CBSS)", NULL); 720 721 /* Support FIS-based switching ? */ 722 if (cap_status & AHCI_HBA_CAP_FBSS) { 723 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PMULT_FBSS; 724 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 725 "hba supports FIS-based switching (FBSS)", NULL); 726 } 727 } 728 729 /* Checking for Support Command List Override */ 730 if (cap_status & AHCI_HBA_CAP_SCLO) { 731 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SCLO; 732 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 733 "hba supports command list override.", NULL); 734 } 735 736 /* Checking for Asynchronous Notification */ 737 if (cap_status & AHCI_HBA_CAP_SSNTF) { 738 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SNTF; 739 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 740 "hba supports asynchronous notification.", NULL); 741 } 742 743 if (pci_config_setup(dip, &ahci_ctlp->ahcictl_pci_conf_handle) 744 != DDI_SUCCESS) { 745 cmn_err(CE_WARN, "!ahci%d: Cannot set up pci configure space", 746 instance); 747 goto err_out; 748 } 749 750 attach_state |= AHCI_ATTACH_STATE_PCICFG_SETUP; 751 752 /* 753 * Check the pci configuration space, and set caps. We also 754 * handle the hardware defect in this function. 755 * 756 * For example, force ATI SB600 to use 32-bit dma addressing 757 * since it doesn't support 64-bit dma though its CAP register 758 * declares it support. 759 */ 760 if (ahci_config_space_init(ahci_ctlp) == AHCI_FAILURE) { 761 cmn_err(CE_WARN, "!ahci%d: ahci_config_space_init failed", 762 instance); 763 goto err_out; 764 } 765 766 /* 767 * Disable the whole controller interrupts before adding 768 * interrupt handlers(s). 769 */ 770 ahci_disable_all_intrs(ahci_ctlp); 771 772 /* Get supported interrupt types */ 773 if (ddi_intr_get_supported_types(dip, &intr_types) != DDI_SUCCESS) { 774 cmn_err(CE_WARN, "!ahci%d: ddi_intr_get_supported_types failed", 775 instance); 776 goto err_out; 777 } 778 779 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 780 "ddi_intr_get_supported_types() returned: 0x%x", 781 intr_types); 782 783 if (ahci_msi_enabled && (intr_types & DDI_INTR_TYPE_MSI)) { 784 /* 785 * Try MSI first, but fall back to FIXED if failed 786 */ 787 if (ahci_add_intrs(ahci_ctlp, DDI_INTR_TYPE_MSI) == 788 DDI_SUCCESS) { 789 ahci_ctlp->ahcictl_intr_type = DDI_INTR_TYPE_MSI; 790 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 791 "Using MSI interrupt type", NULL); 792 goto intr_done; 793 } 794 795 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 796 "MSI registration failed, " 797 "trying FIXED interrupts", NULL); 798 } 799 800 if (intr_types & DDI_INTR_TYPE_FIXED) { 801 if (ahci_add_intrs(ahci_ctlp, DDI_INTR_TYPE_FIXED) == 802 DDI_SUCCESS) { 803 ahci_ctlp->ahcictl_intr_type = DDI_INTR_TYPE_FIXED; 804 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 805 "Using FIXED interrupt type", NULL); 806 goto intr_done; 807 } 808 809 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 810 "FIXED interrupt registration failed", NULL); 811 } 812 813 cmn_err(CE_WARN, "!ahci%d: Interrupt registration failed", instance); 814 815 goto err_out; 816 817 intr_done: 818 819 attach_state |= AHCI_ATTACH_STATE_INTR_ADDED; 820 821 /* Initialize the controller mutex */ 822 mutex_init(&ahci_ctlp->ahcictl_mutex, NULL, MUTEX_DRIVER, 823 (void *)(uintptr_t)ahci_ctlp->ahcictl_intr_pri); 824 825 attach_state |= AHCI_ATTACH_STATE_MUTEX_INIT; 826 827 if (ahci_dma_prdt_number < AHCI_MIN_PRDT_NUMBER) { 828 ahci_dma_prdt_number = AHCI_MIN_PRDT_NUMBER; 829 } else if (ahci_dma_prdt_number > AHCI_MAX_PRDT_NUMBER) { 830 ahci_dma_prdt_number = AHCI_MAX_PRDT_NUMBER; 831 } 832 833 ahci_cmd_table_size = (sizeof (ahci_cmd_table_t) + 834 (ahci_dma_prdt_number - AHCI_PRDT_NUMBER) * 835 sizeof (ahci_prdt_item_t)); 836 837 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 838 "ahci_attach: ahci_dma_prdt_number set by user is 0x%x," 839 " ahci_cmd_table_size is 0x%x", 840 ahci_dma_prdt_number, ahci_cmd_table_size); 841 842 if (ahci_dma_prdt_number != AHCI_PRDT_NUMBER) 843 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_sgllen = 844 ahci_dma_prdt_number; 845 846 ahci_ctlp->ahcictl_buffer_dma_attr = buffer_dma_attr; 847 ahci_ctlp->ahcictl_rcvd_fis_dma_attr = rcvd_fis_dma_attr; 848 ahci_ctlp->ahcictl_cmd_list_dma_attr = cmd_list_dma_attr; 849 ahci_ctlp->ahcictl_cmd_table_dma_attr = cmd_table_dma_attr; 850 851 /* 852 * enable 64bit dma for data buffer for SB600 if 853 * sb600_buf_64bit_dma_disable is B_FALSE 854 */ 855 if ((ahci_buf_64bit_dma == B_FALSE) || 856 ((ahci_ctlp->ahcictl_cap & AHCI_CAP_BUF_32BIT_DMA) && 857 !(sb600_buf_64bit_dma_disable == B_FALSE && 858 ahci_ctlp->ahcictl_venid == 0x1002 && 859 ahci_ctlp->ahcictl_devid == 0x4380))) { 860 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_addr_hi = 861 0xffffffffull; 862 } 863 864 /* 865 * enable 64bit dma for command buffer for SB600/700/710/800 866 * if sbxxx_commu_64bit_dma_disable is B_FALSE 867 */ 868 if ((ahci_commu_64bit_dma == B_FALSE) || 869 ((ahci_ctlp->ahcictl_cap & AHCI_CAP_COMMU_32BIT_DMA) && 870 !(sbxxx_commu_64bit_dma_disable == B_FALSE && 871 ahci_ctlp->ahcictl_venid == 0x1002 && 872 (ahci_ctlp->ahcictl_devid == 0x4380 || 873 ahci_ctlp->ahcictl_devid == 0x4391)))) { 874 ahci_ctlp->ahcictl_rcvd_fis_dma_attr.dma_attr_addr_hi = 875 0xffffffffull; 876 ahci_ctlp->ahcictl_cmd_list_dma_attr.dma_attr_addr_hi = 877 0xffffffffull; 878 ahci_ctlp->ahcictl_cmd_table_dma_attr.dma_attr_addr_hi = 879 0xffffffffull; 880 } 881 882 /* Allocate the ports structure */ 883 status = ahci_alloc_ports_state(ahci_ctlp); 884 if (status != AHCI_SUCCESS) { 885 cmn_err(CE_WARN, "!ahci%d: Cannot allocate ports structure", 886 instance); 887 goto err_out; 888 } 889 890 attach_state |= AHCI_ATTACH_STATE_PORT_ALLOC; 891 892 /* 893 * Initialize the controller and ports. 894 */ 895 status = ahci_initialize_controller(ahci_ctlp); 896 if (status != AHCI_SUCCESS) { 897 cmn_err(CE_WARN, "!ahci%d: HBA initialization failed", 898 instance); 899 goto err_out; 900 } 901 902 attach_state |= AHCI_ATTACH_STATE_HW_INIT; 903 904 /* Start one thread to check packet timeouts */ 905 ahci_ctlp->ahcictl_timeout_id = timeout( 906 (void (*)(void *))ahci_watchdog_handler, 907 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 908 909 attach_state |= AHCI_ATTACH_STATE_TIMEOUT_ENABLED; 910 911 if (ahci_register_sata_hba_tran(ahci_ctlp, cap_status)) { 912 cmn_err(CE_WARN, "!ahci%d: sata hba tran registration failed", 913 instance); 914 goto err_out; 915 } 916 917 ahci_ctlp->ahcictl_flags &= ~AHCI_ATTACH; 918 919 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "ahci_attach success!", NULL); 920 921 return (DDI_SUCCESS); 922 923 err_out: 924 if (attach_state & AHCI_ATTACH_STATE_TIMEOUT_ENABLED) { 925 mutex_enter(&ahci_ctlp->ahcictl_mutex); 926 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 927 ahci_ctlp->ahcictl_timeout_id = 0; 928 mutex_exit(&ahci_ctlp->ahcictl_mutex); 929 } 930 931 if (attach_state & AHCI_ATTACH_STATE_HW_INIT) { 932 ahci_uninitialize_controller(ahci_ctlp); 933 } 934 935 if (attach_state & AHCI_ATTACH_STATE_PORT_ALLOC) { 936 ahci_dealloc_ports_state(ahci_ctlp); 937 } 938 939 if (attach_state & AHCI_ATTACH_STATE_MUTEX_INIT) { 940 mutex_destroy(&ahci_ctlp->ahcictl_mutex); 941 } 942 943 if (attach_state & AHCI_ATTACH_STATE_INTR_ADDED) { 944 ahci_rem_intrs(ahci_ctlp); 945 } 946 947 if (attach_state & AHCI_ATTACH_STATE_PCICFG_SETUP) { 948 pci_config_teardown(&ahci_ctlp->ahcictl_pci_conf_handle); 949 } 950 951 if (attach_state & AHCI_ATTACH_STATE_REG_MAP) { 952 ddi_regs_map_free(&ahci_ctlp->ahcictl_ahci_acc_handle); 953 } 954 955 if (attach_state & AHCI_ATTACH_STATE_STATEP_ALLOC) { 956 ddi_soft_state_free(ahci_statep, instance); 957 } 958 959 return (DDI_FAILURE); 960 } 961 962 /* 963 * The detach entry point for dev_ops. 964 */ 965 static int 966 ahci_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 967 { 968 ahci_ctl_t *ahci_ctlp; 969 int instance; 970 int ret; 971 972 instance = ddi_get_instance(dip); 973 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 974 975 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_detach enter", NULL); 976 977 switch (cmd) { 978 case DDI_DETACH: 979 980 /* disable the interrupts for an uninterrupted detach */ 981 mutex_enter(&ahci_ctlp->ahcictl_mutex); 982 ahci_disable_all_intrs(ahci_ctlp); 983 mutex_exit(&ahci_ctlp->ahcictl_mutex); 984 985 /* unregister from the sata framework. */ 986 ret = ahci_unregister_sata_hba_tran(ahci_ctlp); 987 if (ret != AHCI_SUCCESS) { 988 mutex_enter(&ahci_ctlp->ahcictl_mutex); 989 ahci_enable_all_intrs(ahci_ctlp); 990 mutex_exit(&ahci_ctlp->ahcictl_mutex); 991 return (DDI_FAILURE); 992 } 993 994 mutex_enter(&ahci_ctlp->ahcictl_mutex); 995 996 /* stop the watchdog handler */ 997 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 998 ahci_ctlp->ahcictl_timeout_id = 0; 999 1000 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1001 1002 /* uninitialize the controller */ 1003 ahci_uninitialize_controller(ahci_ctlp); 1004 1005 /* remove the interrupts */ 1006 ahci_rem_intrs(ahci_ctlp); 1007 1008 /* deallocate the ports structures */ 1009 ahci_dealloc_ports_state(ahci_ctlp); 1010 1011 /* destroy mutex */ 1012 mutex_destroy(&ahci_ctlp->ahcictl_mutex); 1013 1014 /* teardown the pci config */ 1015 pci_config_teardown(&ahci_ctlp->ahcictl_pci_conf_handle); 1016 1017 /* remove the reg maps. */ 1018 ddi_regs_map_free(&ahci_ctlp->ahcictl_ahci_acc_handle); 1019 1020 /* free the soft state. */ 1021 ddi_soft_state_free(ahci_statep, instance); 1022 1023 return (DDI_SUCCESS); 1024 1025 case DDI_SUSPEND: 1026 1027 /* 1028 * The steps associated with suspension must include putting 1029 * the underlying device into a quiescent state so that it 1030 * will not generate interrupts or modify or access memory. 1031 */ 1032 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1033 if (ahci_ctlp->ahcictl_flags & AHCI_SUSPEND) { 1034 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1035 return (DDI_SUCCESS); 1036 } 1037 1038 ahci_ctlp->ahcictl_flags |= AHCI_SUSPEND; 1039 1040 /* stop the watchdog handler */ 1041 if (ahci_ctlp->ahcictl_timeout_id) { 1042 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 1043 ahci_ctlp->ahcictl_timeout_id = 0; 1044 } 1045 1046 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1047 1048 /* 1049 * drain the taskq 1050 */ 1051 ahci_drain_ports_taskq(ahci_ctlp); 1052 1053 /* 1054 * Disable the interrupts and stop all the ports. 1055 */ 1056 ahci_uninitialize_controller(ahci_ctlp); 1057 1058 return (DDI_SUCCESS); 1059 1060 default: 1061 return (DDI_FAILURE); 1062 } 1063 } 1064 1065 /* 1066 * The info entry point for dev_ops. 1067 * 1068 */ 1069 static int 1070 ahci_getinfo(dev_info_t *dip, ddi_info_cmd_t infocmd, 1071 void *arg, void **result) 1072 { 1073 #ifndef __lock_lint 1074 _NOTE(ARGUNUSED(dip)) 1075 #endif /* __lock_lint */ 1076 1077 ahci_ctl_t *ahci_ctlp; 1078 int instance; 1079 dev_t dev; 1080 1081 dev = (dev_t)arg; 1082 instance = getminor(dev); 1083 1084 switch (infocmd) { 1085 case DDI_INFO_DEVT2DEVINFO: 1086 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 1087 if (ahci_ctlp != NULL) { 1088 *result = ahci_ctlp->ahcictl_dip; 1089 return (DDI_SUCCESS); 1090 } else { 1091 *result = NULL; 1092 return (DDI_FAILURE); 1093 } 1094 case DDI_INFO_DEVT2INSTANCE: 1095 *(int *)result = instance; 1096 break; 1097 default: 1098 break; 1099 } 1100 1101 return (DDI_SUCCESS); 1102 } 1103 1104 /* 1105 * Registers the ahci with sata framework. 1106 */ 1107 static int 1108 ahci_register_sata_hba_tran(ahci_ctl_t *ahci_ctlp, uint32_t cap_status) 1109 { 1110 struct sata_hba_tran *sata_hba_tran; 1111 1112 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 1113 "ahci_register_sata_hba_tran enter", NULL); 1114 1115 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1116 1117 /* Allocate memory for the sata_hba_tran */ 1118 sata_hba_tran = kmem_zalloc(sizeof (sata_hba_tran_t), KM_SLEEP); 1119 1120 sata_hba_tran->sata_tran_hba_rev = SATA_TRAN_HBA_REV; 1121 sata_hba_tran->sata_tran_hba_dip = ahci_ctlp->ahcictl_dip; 1122 sata_hba_tran->sata_tran_hba_dma_attr = 1123 &ahci_ctlp->ahcictl_buffer_dma_attr; 1124 1125 /* Report the number of implemented ports */ 1126 sata_hba_tran->sata_tran_hba_num_cports = 1127 ahci_ctlp->ahcictl_num_implemented_ports; 1128 1129 /* Support ATAPI device */ 1130 sata_hba_tran->sata_tran_hba_features_support = SATA_CTLF_ATAPI; 1131 1132 /* Get the data transfer capability for PIO command by the HBA */ 1133 if (cap_status & AHCI_HBA_CAP_PMD) { 1134 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PIO_MDRQ; 1135 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "HBA supports multiple " 1136 "DRQ block data transfer for PIO command protocol", NULL); 1137 } 1138 1139 /* 1140 * According to the AHCI spec, the ATA/ATAPI-7 queued feature set 1141 * is not supported by AHCI (including the READ QUEUED (EXT), WRITE 1142 * QUEUED (EXT), and SERVICE commands). Queued operations are 1143 * supported in AHCI using the READ FPDMA QUEUED and WRITE FPDMA 1144 * QUEUED commands when the HBA and device support native command 1145 * queuing(NCQ). 1146 * 1147 * SATA_CTLF_NCQ will be set to sata_tran_hba_features_support if the 1148 * CAP register of the HBA indicates NCQ is supported. 1149 * 1150 * SATA_CTLF_NCQ cannot be set if AHCI_CAP_NO_MCMDLIST_NONQUEUE is 1151 * set because the previous register content of PxCI can be re-written 1152 * in the register write. 1153 */ 1154 if ((cap_status & AHCI_HBA_CAP_SNCQ) && 1155 !(ahci_ctlp->ahcictl_cap & AHCI_CAP_NO_MCMDLIST_NONQUEUE)) { 1156 sata_hba_tran->sata_tran_hba_features_support |= SATA_CTLF_NCQ; 1157 ahci_ctlp->ahcictl_cap |= AHCI_CAP_NCQ; 1158 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "HBA supports Native " 1159 "Command Queuing", NULL); 1160 } 1161 1162 /* Support port multiplier? */ 1163 if (cap_status & AHCI_HBA_CAP_SPM) { 1164 sata_hba_tran->sata_tran_hba_features_support |= 1165 SATA_CTLF_PORT_MULTIPLIER; 1166 1167 /* Support FIS-based switching for port multiplier? */ 1168 if (cap_status & AHCI_HBA_CAP_FBSS) { 1169 sata_hba_tran->sata_tran_hba_features_support |= 1170 SATA_CTLF_PMULT_FBS; 1171 } 1172 } 1173 1174 /* Report the number of command slots */ 1175 sata_hba_tran->sata_tran_hba_qdepth = ahci_ctlp->ahcictl_num_cmd_slots; 1176 1177 sata_hba_tran->sata_tran_probe_port = ahci_tran_probe_port; 1178 sata_hba_tran->sata_tran_start = ahci_tran_start; 1179 sata_hba_tran->sata_tran_abort = ahci_tran_abort; 1180 sata_hba_tran->sata_tran_reset_dport = ahci_tran_reset_dport; 1181 sata_hba_tran->sata_tran_hotplug_ops = &ahci_tran_hotplug_ops; 1182 #ifdef __lock_lint 1183 sata_hba_tran->sata_tran_selftest = ahci_selftest; 1184 #endif 1185 /* 1186 * When SATA framework adds support for pwrmgt the 1187 * pwrmgt_ops needs to be updated 1188 */ 1189 sata_hba_tran->sata_tran_pwrmgt_ops = NULL; 1190 sata_hba_tran->sata_tran_ioctl = NULL; 1191 1192 ahci_ctlp->ahcictl_sata_hba_tran = sata_hba_tran; 1193 1194 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1195 1196 /* Attach it to SATA framework */ 1197 if (sata_hba_attach(ahci_ctlp->ahcictl_dip, sata_hba_tran, DDI_ATTACH) 1198 != DDI_SUCCESS) { 1199 kmem_free((void *)sata_hba_tran, sizeof (sata_hba_tran_t)); 1200 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1201 ahci_ctlp->ahcictl_sata_hba_tran = NULL; 1202 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1203 return (AHCI_FAILURE); 1204 } 1205 1206 return (AHCI_SUCCESS); 1207 } 1208 1209 /* 1210 * Unregisters the ahci with sata framework. 1211 */ 1212 static int 1213 ahci_unregister_sata_hba_tran(ahci_ctl_t *ahci_ctlp) 1214 { 1215 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1216 "ahci_unregister_sata_hba_tran enter", NULL); 1217 1218 /* Detach from the SATA framework. */ 1219 if (sata_hba_detach(ahci_ctlp->ahcictl_dip, DDI_DETACH) != 1220 DDI_SUCCESS) { 1221 return (AHCI_FAILURE); 1222 } 1223 1224 /* Deallocate sata_hba_tran. */ 1225 kmem_free((void *)ahci_ctlp->ahcictl_sata_hba_tran, 1226 sizeof (sata_hba_tran_t)); 1227 1228 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1229 ahci_ctlp->ahcictl_sata_hba_tran = NULL; 1230 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1231 1232 return (AHCI_SUCCESS); 1233 } 1234 1235 #define SET_PORTSTR(str, addrp) \ 1236 if (AHCI_ADDR_IS_PORT(addrp)) \ 1237 (void) sprintf((str), "%d", (addrp)->aa_port); \ 1238 else if (AHCI_ADDR_IS_PMULT(addrp)) \ 1239 (void) sprintf((str), "%d (pmult)", (addrp)->aa_port); \ 1240 else \ 1241 (void) sprintf((str), "%d:%d", (addrp)->aa_port, \ 1242 (addrp)->aa_pmport); 1243 1244 /* 1245 * ahci_tran_probe_port is called by SATA framework. It returns port state, 1246 * port status registers and an attached device type via sata_device 1247 * structure. 1248 * 1249 * We return the cached information from a previous hardware probe. The 1250 * actual hardware probing itself was done either from within 1251 * ahci_initialize_controller() during the driver attach or from a phy 1252 * ready change interrupt handler. 1253 */ 1254 static int 1255 ahci_tran_probe_port(dev_info_t *dip, sata_device_t *sd) 1256 { 1257 ahci_ctl_t *ahci_ctlp; 1258 ahci_port_t *ahci_portp; 1259 ahci_addr_t addr, pmult_addr; 1260 uint8_t cport = sd->satadev_addr.cport; 1261 char portstr[10]; 1262 uint8_t device_type; 1263 uint32_t port_state; 1264 uint8_t port; 1265 int rval = SATA_SUCCESS, rval_init; 1266 1267 ahci_ctlp = ddi_get_soft_state(ahci_statep, ddi_get_instance(dip)); 1268 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 1269 1270 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 1271 1272 mutex_enter(&ahci_portp->ahciport_mutex); 1273 1274 ahci_get_ahci_addr(ahci_ctlp, sd, &addr); 1275 ASSERT(AHCI_ADDR_IS_VALID(&addr)); 1276 SET_PORTSTR(portstr, &addr); 1277 1278 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1279 "ahci_tran_probe_port enter: port %s", portstr); 1280 1281 if ((AHCI_ADDR_IS_PMULT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)) && 1282 (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT || 1283 ahci_portp->ahciport_pmult_info == NULL)) { 1284 /* port mutliplier is removed. */ 1285 AHCIDBG(AHCIDBG_PMULT, ahci_ctlp, 1286 "ahci_tran_probe_port: " 1287 "pmult is removed from port %s", portstr); 1288 mutex_exit(&ahci_portp->ahciport_mutex); 1289 return (SATA_FAILURE); 1290 } 1291 1292 /* 1293 * The sata_device may refer to 1294 * 1. A controller port. 1295 * A controller port should be ready here. 1296 * 2. A port multiplier. 1297 * SATA_ADDR_PMULT_SPEC - if it is not initialized yet, initialize 1298 * it and register the port multiplier to the framework. 1299 * SATA_ADDR_PMULT - check the status of all its device ports. 1300 * 3. A port multiplier port. 1301 * If it has not been initialized, initialized it. 1302 * 1303 * A port multiplier or a port multiplier port may require some 1304 * initialization because we cannot do these time-consuming jobs in an 1305 * interrupt context. 1306 */ 1307 if (sd->satadev_addr.qual & SATA_ADDR_PMULT_SPEC) { 1308 AHCI_ADDR_SET_PMULT(&pmult_addr, port); 1309 /* Initialize registers on a port multiplier */ 1310 rval_init = ahci_initialize_pmult(ahci_ctlp, 1311 ahci_portp, &pmult_addr, sd); 1312 if (rval_init != AHCI_SUCCESS) { 1313 AHCIDBG(AHCIDBG_PMULT, ahci_ctlp, 1314 "ahci_tran_probe_port: " 1315 "pmult initialization failed.", NULL); 1316 mutex_exit(&ahci_portp->ahciport_mutex); 1317 return (SATA_FAILURE); 1318 } 1319 } else if (sd->satadev_addr.qual & SATA_ADDR_PMULT) { 1320 /* Check pmports hotplug events */ 1321 (void) ahci_probe_pmult(ahci_ctlp, ahci_portp, &addr); 1322 } else if (sd->satadev_addr.qual & SATA_ADDR_PMPORT) { 1323 if (ahci_probe_pmport(ahci_ctlp, ahci_portp, 1324 &addr, sd) != AHCI_SUCCESS) { 1325 rval = SATA_FAILURE; 1326 goto out; 1327 } 1328 } 1329 1330 /* Update port state and device type */ 1331 port_state = AHCIPORT_GET_STATE(ahci_portp, &addr); 1332 1333 switch (port_state) { 1334 1335 case SATA_PSTATE_FAILED: 1336 sd->satadev_state = SATA_PSTATE_FAILED; 1337 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1338 "ahci_tran_probe_port: port %s PORT FAILED", portstr); 1339 goto out; 1340 1341 case SATA_PSTATE_SHUTDOWN: 1342 sd->satadev_state = SATA_PSTATE_SHUTDOWN; 1343 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1344 "ahci_tran_probe_port: port %s PORT SHUTDOWN", portstr); 1345 goto out; 1346 1347 case SATA_PSTATE_PWROFF: 1348 sd->satadev_state = SATA_PSTATE_PWROFF; 1349 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1350 "ahci_tran_probe_port: port %s PORT PWROFF", portstr); 1351 goto out; 1352 1353 case SATA_PSTATE_PWRON: 1354 sd->satadev_state = SATA_PSTATE_PWRON; 1355 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1356 "ahci_tran_probe_port: port %s PORT PWRON", portstr); 1357 break; 1358 1359 default: 1360 sd->satadev_state = port_state; 1361 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1362 "ahci_tran_probe_port: port %s PORT NORMAL %x", 1363 portstr, port_state); 1364 break; 1365 } 1366 1367 device_type = AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr); 1368 1369 switch (device_type) { 1370 1371 case SATA_DTYPE_ATADISK: 1372 sd->satadev_type = SATA_DTYPE_ATADISK; 1373 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1374 "ahci_tran_probe_port: port %s DISK found", portstr); 1375 break; 1376 1377 case SATA_DTYPE_ATAPI: 1378 /* 1379 * HBA driver only knows it's an ATAPI device, and don't know 1380 * it's CD/DVD, tape or ATAPI disk because the ATAPI device 1381 * type need to be determined by checking IDENTIFY PACKET 1382 * DEVICE data 1383 */ 1384 sd->satadev_type = SATA_DTYPE_ATAPI; 1385 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1386 "ahci_tran_probe_port: port %s ATAPI found", portstr); 1387 break; 1388 1389 case SATA_DTYPE_PMULT: 1390 ASSERT(AHCI_ADDR_IS_PORT(&addr)||AHCI_ADDR_IS_PMULT(&addr)); 1391 sd->satadev_type = SATA_DTYPE_PMULT; 1392 1393 /* Update the number of pmports. */ 1394 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1395 sd->satadev_add_info = ahci_portp-> 1396 ahciport_pmult_info->ahcipmi_num_dev_ports; 1397 1398 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1399 "ahci_tran_probe_port: port %s Port Multiplier found", 1400 portstr); 1401 break; 1402 1403 case SATA_DTYPE_UNKNOWN: 1404 sd->satadev_type = SATA_DTYPE_UNKNOWN; 1405 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1406 "ahci_tran_probe_port: port %s Unknown device found", 1407 portstr); 1408 break; 1409 1410 default: 1411 /* we don't support any other device types */ 1412 sd->satadev_type = SATA_DTYPE_NONE; 1413 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1414 "ahci_tran_probe_port: port %s No device found", portstr); 1415 break; 1416 } 1417 1418 out: 1419 /* Register update only fails while probing a pmult/pmport */ 1420 if (AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMULT(&addr)) { 1421 ahci_update_sata_registers(ahci_ctlp, port, sd); 1422 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 1423 if (port_state & SATA_STATE_READY) 1424 if (ahci_update_pmult_pscr(ahci_ctlp, 1425 &addr, sd) != AHCI_SUCCESS) 1426 rval = SATA_FAILURE; 1427 } 1428 1429 mutex_exit(&ahci_portp->ahciport_mutex); 1430 return (rval); 1431 } 1432 1433 /* 1434 * There are four operation modes in sata framework: 1435 * SATA_OPMODE_INTERRUPTS 1436 * SATA_OPMODE_POLLING 1437 * SATA_OPMODE_ASYNCH 1438 * SATA_OPMODE_SYNCH 1439 * 1440 * Their combined meanings as following: 1441 * 1442 * SATA_OPMODE_SYNCH 1443 * The command has to be completed before sata_tran_start functions returns. 1444 * Either interrupts or polling could be used - it's up to the driver. 1445 * Mode used currently for internal, sata-module initiated operations. 1446 * 1447 * SATA_OPMODE_SYNCH | SATA_OPMODE_INTERRUPTS 1448 * It is the same as the one above. 1449 * 1450 * SATA_OPMODE_SYNCH | SATA_OPMODE_POLLING 1451 * The command has to be completed before sata_tran_start function returns. 1452 * No interrupt used, polling only. This should be the mode used for scsi 1453 * packets with FLAG_NOINTR. 1454 * 1455 * SATA_OPMODE_ASYNCH | SATA_OPMODE_INTERRUPTS 1456 * The command may be queued (callback function specified). Interrupts could 1457 * be used. It's normal operation mode. 1458 */ 1459 /* 1460 * Called by sata framework to transport a sata packet down stream. 1461 */ 1462 static int 1463 ahci_tran_start(dev_info_t *dip, sata_pkt_t *spkt) 1464 { 1465 ahci_ctl_t *ahci_ctlp; 1466 ahci_port_t *ahci_portp; 1467 ahci_addr_t addr; 1468 uint8_t cport = spkt->satapkt_device.satadev_addr.cport; 1469 uint8_t port; 1470 char portstr[10]; 1471 1472 ahci_ctlp = ddi_get_soft_state(ahci_statep, ddi_get_instance(dip)); 1473 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 1474 1475 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1476 "ahci_tran_start enter: cport %d satapkt 0x%p", 1477 cport, (void *)spkt); 1478 1479 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 1480 1481 mutex_enter(&ahci_portp->ahciport_mutex); 1482 ahci_get_ahci_addr(ahci_ctlp, &spkt->satapkt_device, &addr); 1483 SET_PORTSTR(portstr, &addr); 1484 1485 /* Sanity check */ 1486 if (AHCI_ADDR_IS_PMPORT(&addr)) { 1487 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT || 1488 ahci_portp->ahciport_pmult_info == NULL) { 1489 1490 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1491 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 1492 spkt->satapkt_device.satadev_state = SATA_STATE_UNKNOWN; 1493 ahci_update_sata_registers(ahci_ctlp, port, 1494 &spkt->satapkt_device); 1495 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1496 "ahci_tran_start returning PORT_ERROR while " 1497 "pmult removed: port: %s", portstr); 1498 mutex_exit(&ahci_portp->ahciport_mutex); 1499 return (SATA_TRAN_PORT_ERROR); 1500 } 1501 1502 if (!(AHCIPORT_GET_STATE(ahci_portp, &addr) & 1503 SATA_STATE_READY)) { 1504 if (!ddi_in_panic() || 1505 ahci_initialize_pmport(ahci_ctlp, 1506 ahci_portp, &addr) != AHCI_SUCCESS) { 1507 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1508 spkt->satapkt_device.satadev_type = 1509 AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr); 1510 spkt->satapkt_device.satadev_state = 1511 AHCIPORT_GET_STATE(ahci_portp, &addr); 1512 ahci_update_sata_registers(ahci_ctlp, port, 1513 &spkt->satapkt_device); 1514 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1515 "ahci_tran_start returning PORT_ERROR " 1516 "while sub-link is not initialized " 1517 "at port: %s", portstr); 1518 mutex_exit(&ahci_portp->ahciport_mutex); 1519 return (SATA_TRAN_PORT_ERROR); 1520 } 1521 } 1522 } 1523 1524 if (AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_FAILED || 1525 AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_SHUTDOWN|| 1526 AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_PWROFF) { 1527 /* 1528 * In case the target driver would send the packet before 1529 * sata framework can have the opportunity to process those 1530 * event reports. 1531 */ 1532 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1533 spkt->satapkt_device.satadev_state = 1534 ahci_portp->ahciport_port_state; 1535 ahci_update_sata_registers(ahci_ctlp, port, 1536 &spkt->satapkt_device); 1537 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1538 "ahci_tran_start returning PORT_ERROR while " 1539 "port in FAILED/SHUTDOWN/PWROFF state: " 1540 "port: %s", portstr); 1541 mutex_exit(&ahci_portp->ahciport_mutex); 1542 return (SATA_TRAN_PORT_ERROR); 1543 } 1544 1545 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) == SATA_DTYPE_NONE) { 1546 /* 1547 * ahci_intr_phyrdy_change() may have rendered it to 1548 * SATA_DTYPE_NONE. 1549 */ 1550 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1551 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 1552 spkt->satapkt_device.satadev_state = 1553 ahci_portp->ahciport_port_state; 1554 ahci_update_sata_registers(ahci_ctlp, port, 1555 &spkt->satapkt_device); 1556 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1557 "ahci_tran_start returning PORT_ERROR while " 1558 "no device attached: port: %s", portstr); 1559 mutex_exit(&ahci_portp->ahciport_mutex); 1560 return (SATA_TRAN_PORT_ERROR); 1561 } 1562 1563 /* R/W PMULT command will occupy the whole HBA port */ 1564 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 1565 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1566 "ahci_tran_start returning BUSY while " 1567 "executing READ/WRITE PORT-MULT command: " 1568 "port: %s", portstr); 1569 spkt->satapkt_reason = SATA_PKT_BUSY; 1570 mutex_exit(&ahci_portp->ahciport_mutex); 1571 return (SATA_TRAN_BUSY); 1572 } 1573 1574 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) { 1575 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1576 "ahci_tran_start returning BUSY while " 1577 "hot-plug in progress: port: %s", portstr); 1578 spkt->satapkt_reason = SATA_PKT_BUSY; 1579 mutex_exit(&ahci_portp->ahciport_mutex); 1580 return (SATA_TRAN_BUSY); 1581 } 1582 1583 /* 1584 * SATA HBA driver should remember that a device was reset and it 1585 * is supposed to reject any packets which do not specify either 1586 * SATA_IGNORE_DEV_RESET_STATE or SATA_CLEAR_DEV_RESET_STATE. 1587 * 1588 * This is to prevent a race condition when a device was arbitrarily 1589 * reset by the HBA driver (and lost it's setting) and a target 1590 * driver sending some commands to a device before the sata framework 1591 * has a chance to restore the device setting (such as cache enable/ 1592 * disable or other resettable stuff). 1593 */ 1594 /* 1595 * It is unnecessary to use specific flags to indicate 1596 * reset_in_progress for a pmport. While mopping, all command will be 1597 * mopped so that the entire HBA port is being dealt as a single 1598 * object. 1599 */ 1600 if (spkt->satapkt_cmd.satacmd_flags.sata_clear_dev_reset) { 1601 ahci_portp->ahciport_reset_in_progress = 0; 1602 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1603 "ahci_tran_start [CLEAR] the " 1604 "reset_in_progress for port: %d", port); 1605 } 1606 1607 if (ahci_portp->ahciport_reset_in_progress && 1608 ! spkt->satapkt_cmd.satacmd_flags.sata_ignore_dev_reset && 1609 ! ddi_in_panic()) { 1610 spkt->satapkt_reason = SATA_PKT_BUSY; 1611 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1612 "ahci_tran_start returning BUSY while " 1613 "reset in progress: port: %d", port); 1614 mutex_exit(&ahci_portp->ahciport_mutex); 1615 return (SATA_TRAN_BUSY); 1616 } 1617 1618 #ifdef AHCI_DEBUG 1619 if (spkt->satapkt_cmd.satacmd_flags.sata_ignore_dev_reset) { 1620 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1621 "ahci_tran_start: packet 0x%p [PASSTHRU] at port %d", 1622 spkt, port); 1623 } 1624 #endif 1625 1626 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 1627 spkt->satapkt_reason = SATA_PKT_BUSY; 1628 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1629 "ahci_tran_start returning BUSY while " 1630 "mopping in progress: port: %d", port); 1631 mutex_exit(&ahci_portp->ahciport_mutex); 1632 return (SATA_TRAN_BUSY); 1633 } 1634 1635 if (spkt->satapkt_op_mode & 1636 (SATA_OPMODE_SYNCH | SATA_OPMODE_POLLING)) { 1637 /* 1638 * If a SYNC command to be executed in interrupt context, 1639 * bounce it back to sata module. 1640 */ 1641 if (!(spkt->satapkt_op_mode & SATA_OPMODE_POLLING) && 1642 servicing_interrupt()) { 1643 spkt->satapkt_reason = SATA_PKT_BUSY; 1644 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1645 "ahci_tran_start returning BUSY while " 1646 "sending SYNC mode under interrupt context: " 1647 "port : %d", port); 1648 mutex_exit(&ahci_portp->ahciport_mutex); 1649 return (SATA_TRAN_BUSY); 1650 } 1651 1652 /* We need to do the sync start now */ 1653 if (ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, 1654 spkt) == AHCI_FAILURE) { 1655 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_tran_start " 1656 "return QUEUE_FULL: port %d", port); 1657 mutex_exit(&ahci_portp->ahciport_mutex); 1658 return (SATA_TRAN_QUEUE_FULL); 1659 } 1660 } else { 1661 /* Async start, using interrupt */ 1662 if (ahci_deliver_satapkt(ahci_ctlp, ahci_portp, &addr, spkt) 1663 == AHCI_FAILURE) { 1664 spkt->satapkt_reason = SATA_PKT_QUEUE_FULL; 1665 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_tran_start " 1666 "returning QUEUE_FULL: port %d", port); 1667 mutex_exit(&ahci_portp->ahciport_mutex); 1668 return (SATA_TRAN_QUEUE_FULL); 1669 } 1670 } 1671 1672 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_tran_start " 1673 "sata tran accepted: port %s", portstr); 1674 1675 mutex_exit(&ahci_portp->ahciport_mutex); 1676 return (SATA_TRAN_ACCEPTED); 1677 } 1678 1679 /* 1680 * SATA_OPMODE_SYNCH flag is set 1681 * 1682 * If SATA_OPMODE_POLLING flag is set, then we must poll the command 1683 * without interrupt, otherwise we can still use the interrupt. 1684 * 1685 * WARNING!!! ahciport_mutex should be acquired before the function 1686 * is called. 1687 */ 1688 static int 1689 ahci_do_sync_start(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 1690 ahci_addr_t *addrp, sata_pkt_t *spkt) 1691 { 1692 int pkt_timeout_ticks; 1693 uint32_t timeout_tags; 1694 int rval; 1695 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 1696 uint8_t port = addrp->aa_port; 1697 1698 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_do_sync_start enter: " 1699 "port %d:%d spkt 0x%p", port, addrp->aa_pmport, spkt); 1700 1701 if (spkt->satapkt_op_mode & SATA_OPMODE_POLLING) { 1702 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_POLLING; 1703 if ((rval = ahci_deliver_satapkt(ahci_ctlp, ahci_portp, 1704 addrp, spkt)) == AHCI_FAILURE) { 1705 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_POLLING; 1706 return (rval); 1707 } 1708 1709 pkt_timeout_ticks = 1710 drv_usectohz((clock_t)spkt->satapkt_time * 1000000); 1711 1712 while (spkt->satapkt_reason == SATA_PKT_BUSY) { 1713 mutex_exit(&ahci_portp->ahciport_mutex); 1714 1715 /* Simulate the interrupt */ 1716 ahci_port_intr(ahci_ctlp, ahci_portp, port); 1717 1718 drv_usecwait(AHCI_10MS_USECS); 1719 1720 mutex_enter(&ahci_portp->ahciport_mutex); 1721 pkt_timeout_ticks -= AHCI_10MS_TICKS; 1722 if (pkt_timeout_ticks < 0) { 1723 cmn_err(CE_WARN, "!ahci%d: ahci_do_sync_start " 1724 "port %d satapkt 0x%p timed out\n", 1725 instance, port, (void *)spkt); 1726 timeout_tags = (0x1 << rval); 1727 mutex_exit(&ahci_portp->ahciport_mutex); 1728 ahci_timeout_pkts(ahci_ctlp, ahci_portp, 1729 port, timeout_tags); 1730 mutex_enter(&ahci_portp->ahciport_mutex); 1731 } 1732 } 1733 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_POLLING; 1734 return (AHCI_SUCCESS); 1735 1736 } else { 1737 if ((rval = ahci_deliver_satapkt(ahci_ctlp, ahci_portp, 1738 addrp, spkt)) == AHCI_FAILURE) 1739 return (rval); 1740 1741 #if AHCI_DEBUG 1742 /* 1743 * Note that the driver always uses the slot 0 to deliver 1744 * REQUEST SENSE or READ LOG EXT command 1745 */ 1746 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 1747 ASSERT(rval == 0); 1748 #endif 1749 1750 while (spkt->satapkt_reason == SATA_PKT_BUSY) 1751 cv_wait(&ahci_portp->ahciport_cv, 1752 &ahci_portp->ahciport_mutex); 1753 1754 return (AHCI_SUCCESS); 1755 } 1756 } 1757 1758 #define SENDUP_PACKET(ahci_portp, satapkt, reason) \ 1759 if (satapkt) { \ 1760 satapkt->satapkt_reason = reason; \ 1761 /* \ 1762 * We set the satapkt_reason in both sync and \ 1763 * non-sync cases. \ 1764 */ \ 1765 } \ 1766 if (satapkt && \ 1767 ! (satapkt->satapkt_op_mode & SATA_OPMODE_SYNCH) && \ 1768 satapkt->satapkt_comp) { \ 1769 mutex_exit(&ahci_portp->ahciport_mutex); \ 1770 (*satapkt->satapkt_comp)(satapkt); \ 1771 mutex_enter(&ahci_portp->ahciport_mutex); \ 1772 } else { \ 1773 if (satapkt && \ 1774 (satapkt->satapkt_op_mode & SATA_OPMODE_SYNCH) && \ 1775 ! (satapkt->satapkt_op_mode & SATA_OPMODE_POLLING)) \ 1776 cv_broadcast(&ahci_portp->ahciport_cv); \ 1777 } 1778 1779 /* 1780 * Searches for and claims a free command slot. 1781 * 1782 * Returns value: 1783 * 1784 * AHCI_FAILURE returned only if 1785 * 1. No empty slot left 1786 * 2. Non-queued command requested while queued command(s) is outstanding 1787 * 3. Queued command requested while non-queued command(s) is outstanding 1788 * 4. HBA doesn't support multiple-use of command list while already a 1789 * non-queued command is oustanding 1790 * 5. Queued command requested while some queued command(s) has been 1791 * outstanding on a different port multiplier port. (AHCI spec 1.2, 1792 * 9.1.2) 1793 * 1794 * claimed slot number returned if succeeded 1795 * 1796 * NOTE: it will always return slot 0 for following commands to simplify the 1797 * algorithm. 1798 * 1. REQUEST SENSE or READ LOG EXT command during error recovery process 1799 * 2. READ/WRITE PORTMULT command 1800 * 1801 * WARNING!!! ahciport_mutex should be acquired before the function 1802 * is called. 1803 */ 1804 static int 1805 ahci_claim_free_slot(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 1806 ahci_addr_t *addrp, int command_type) 1807 { 1808 uint32_t port_cmd_issue; 1809 uint32_t free_slots; 1810 int slot; 1811 1812 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_claim_free_slot enter " 1813 "ahciport_pending_tags = 0x%x " 1814 "ahciport_pending_ncq_tags = 0x%x", 1815 ahci_portp->ahciport_pending_tags, 1816 ahci_portp->ahciport_pending_ncq_tags); 1817 1818 /* 1819 * According to the AHCI spec, system software is responsible to 1820 * ensure that queued and non-queued commands are not mixed in 1821 * the command list. 1822 */ 1823 if (command_type == AHCI_NON_NCQ_CMD) { 1824 /* Non-NCQ command request */ 1825 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1826 AHCIDBG(AHCIDBG_INFO|AHCIDBG_NCQ, ahci_ctlp, 1827 "ahci_claim_free_slot: there is still pending " 1828 "queued command(s) in the command list, " 1829 "so no available slot for the non-queued " 1830 "command", NULL); 1831 return (AHCI_FAILURE); 1832 } 1833 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 1834 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 1835 "ahci_claim_free_slot: there is still pending " 1836 "read/write port-mult command(s) in command list, " 1837 "so no available slot for the non-queued command", 1838 NULL); 1839 return (AHCI_FAILURE); 1840 } 1841 if ((ahci_ctlp->ahcictl_cap & AHCI_CAP_NO_MCMDLIST_NONQUEUE) && 1842 NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1843 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1844 "ahci_claim_free_slot: HBA cannot support multiple-" 1845 "use of the command list for non-queued commands", 1846 NULL); 1847 return (AHCI_FAILURE); 1848 } 1849 free_slots = (~ahci_portp->ahciport_pending_tags) & 1850 AHCI_SLOT_MASK(ahci_ctlp); 1851 } else if (command_type == AHCI_NCQ_CMD) { 1852 /* NCQ command request */ 1853 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1854 AHCIDBG(AHCIDBG_INFO|AHCIDBG_NCQ, ahci_ctlp, 1855 "ahci_claim_free_slot: there is still pending " 1856 "non-queued command(s) in the command list, " 1857 "so no available slot for the queued command", 1858 NULL); 1859 return (AHCI_FAILURE); 1860 } 1861 1862 /* 1863 * NCQ commands cannot be sent to different port multiplier 1864 * ports in Command-Based Switching mode 1865 */ 1866 /* 1867 * NOTE: In Command-Based Switching mode, AHCI controller 1868 * usually reports a 'Handshake Error' when multiple NCQ 1869 * commands are outstanding simultaneously. 1870 */ 1871 if (AHCIPORT_DEV_TYPE(ahci_portp, addrp) == SATA_DTYPE_PMULT) { 1872 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1873 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_FBSS) && 1874 NCQ_CMD_IN_PROGRESS(ahci_portp) && 1875 AHCIPORT_NCQ_PMPORT(ahci_portp) != 1876 addrp->aa_pmport) { 1877 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1878 "ahci_claim_free_slot: there is still " 1879 "pending queued command(s) in the " 1880 "command list for another Port Multiplier " 1881 "port, so no available slot.", NULL); 1882 return (AHCI_FAILURE); 1883 } 1884 } 1885 1886 free_slots = (~ahci_portp->ahciport_pending_ncq_tags) & 1887 AHCI_NCQ_SLOT_MASK(ahci_portp); 1888 } else if (command_type == AHCI_ERR_RETRI_CMD) { 1889 /* Error retrieval command request */ 1890 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1891 "ahci_claim_free_slot: slot 0 is allocated for REQUEST " 1892 "SENSE or READ LOG EXT command", NULL); 1893 slot = 0; 1894 goto out; 1895 } else if (command_type == AHCI_RDWR_PMULT_CMD) { 1896 /* 1897 * An extra check on PxCI. Sometimes PxCI bits may not be 1898 * cleared during hot-plug or error recovery process. 1899 */ 1900 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 1901 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, addrp->aa_port)); 1902 1903 if (port_cmd_issue != 0) { 1904 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 1905 "ahci_claim_free_slot: there is still pending " 1906 "command(s) in command list (0x%x/0x%x, PxCI %x)," 1907 "so no available slot for R/W PMULT command.", 1908 NON_NCQ_CMD_IN_PROGRESS(ahci_portp), 1909 NCQ_CMD_IN_PROGRESS(ahci_portp), 1910 port_cmd_issue); 1911 return (AHCI_FAILURE); 1912 } 1913 1914 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1915 "ahci_claim_free_slot: slot 0 is allocated for " 1916 "READ/WRITE PORTMULT command", NULL); 1917 slot = 0; 1918 goto out; 1919 } 1920 1921 slot = ddi_ffs(free_slots) - 1; 1922 if (slot == -1) { 1923 AHCIDBG(AHCIDBG_VERBOSE, ahci_ctlp, 1924 "ahci_claim_free_slot: no empty slots", NULL); 1925 return (AHCI_FAILURE); 1926 } 1927 1928 /* 1929 * According to the AHCI spec, to allow a simple mechanism for the 1930 * HBA to map command list slots to queue entries, software must 1931 * match the tag number it uses to the slot it is placing the command 1932 * in. For example, if a queued command is placed in slot 5, the tag 1933 * for that command must be 5. 1934 */ 1935 if (command_type == AHCI_NCQ_CMD) { 1936 ahci_portp->ahciport_pending_ncq_tags |= (0x1 << slot); 1937 if (AHCI_ADDR_IS_PMPORT(addrp)) { 1938 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1939 AHCIPORT_NCQ_PMPORT(ahci_portp) = addrp->aa_pmport; 1940 } 1941 } 1942 1943 ahci_portp->ahciport_pending_tags |= (0x1 << slot); 1944 1945 out: 1946 AHCIDBG(AHCIDBG_VERBOSE, ahci_ctlp, 1947 "ahci_claim_free_slot: found slot: 0x%x", slot); 1948 1949 return (slot); 1950 } 1951 1952 /* 1953 * Builds the Command Table for the sata packet and delivers it to controller. 1954 * 1955 * Returns: 1956 * slot number if we can obtain a slot successfully 1957 * otherwise, return AHCI_FAILURE 1958 * 1959 * WARNING!!! ahciport_mutex should be acquired before the function is called. 1960 */ 1961 static int 1962 ahci_deliver_satapkt(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 1963 ahci_addr_t *addrp, sata_pkt_t *spkt) 1964 { 1965 int cmd_slot; 1966 sata_cmd_t *scmd; 1967 ahci_fis_h2d_register_t *h2d_register_fisp; 1968 ahci_cmd_table_t *cmd_table; 1969 ahci_cmd_header_t *cmd_header; 1970 int ncookies; 1971 int i; 1972 int command_type = AHCI_NON_NCQ_CMD; 1973 int ncq_qdepth; 1974 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 1975 uint8_t port, pmport; 1976 #if AHCI_DEBUG 1977 uint32_t *ptr; 1978 uint8_t *ptr2; 1979 #endif 1980 1981 port = addrp->aa_port; 1982 pmport = addrp->aa_pmport; 1983 1984 spkt->satapkt_reason = SATA_PKT_BUSY; 1985 1986 scmd = &spkt->satapkt_cmd; 1987 1988 /* Check if the command is a NCQ command */ 1989 if (scmd->satacmd_cmd_reg == SATAC_READ_FPDMA_QUEUED || 1990 scmd->satacmd_cmd_reg == SATAC_WRITE_FPDMA_QUEUED) { 1991 command_type = AHCI_NCQ_CMD; 1992 1993 /* 1994 * When NCQ is support, system software must determine the 1995 * maximum tag allowed by the device and the HBA, and it 1996 * must use a value not beyond of the lower bound of the two. 1997 * 1998 * Sata module is going to calculate the qdepth and send 1999 * down to HBA driver via sata_cmd. 2000 */ 2001 ncq_qdepth = scmd->satacmd_flags.sata_max_queue_depth + 1; 2002 2003 /* 2004 * At the moment, the driver doesn't support the dynamic 2005 * setting of the maximum ncq depth, and the value can be 2006 * set either during the attach or after hot-plug insertion. 2007 */ 2008 if (ahci_portp->ahciport_max_ncq_tags == 0) { 2009 ahci_portp->ahciport_max_ncq_tags = ncq_qdepth; 2010 AHCIDBG(AHCIDBG_NCQ, ahci_ctlp, 2011 "ahci_deliver_satapkt: port %d the max tags for " 2012 "NCQ command is %d", port, ncq_qdepth); 2013 } else { 2014 if (ncq_qdepth != ahci_portp->ahciport_max_ncq_tags) { 2015 cmn_err(CE_WARN, "!ahci%d: ahci_deliver_satapkt" 2016 " port %d the max tag for NCQ command is " 2017 "requested to change from %d to %d, at the" 2018 " moment the driver doesn't support the " 2019 "dynamic change so it's going to " 2020 "still use the previous tag value", 2021 instance, port, 2022 ahci_portp->ahciport_max_ncq_tags, 2023 ncq_qdepth); 2024 } 2025 } 2026 } 2027 2028 /* Check if the command is an error retrieval command */ 2029 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 2030 command_type = AHCI_ERR_RETRI_CMD; 2031 2032 /* Check if the command is an read/write pmult command */ 2033 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 2034 command_type = AHCI_RDWR_PMULT_CMD; 2035 2036 /* Check if there is an empty command slot */ 2037 cmd_slot = ahci_claim_free_slot(ahci_ctlp, ahci_portp, 2038 addrp, command_type); 2039 if (cmd_slot == AHCI_FAILURE) { 2040 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "no free command slot", NULL); 2041 return (AHCI_FAILURE); 2042 } 2043 2044 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INFO, ahci_ctlp, 2045 "ahci_deliver_satapkt enter: cmd_reg: 0x%x, cmd_slot: 0x%x, " 2046 "port: %d, satapkt: 0x%p", scmd->satacmd_cmd_reg, 2047 cmd_slot, port, (void *)spkt); 2048 2049 cmd_table = ahci_portp->ahciport_cmd_tables[cmd_slot]; 2050 bzero((void *)cmd_table, ahci_cmd_table_size); 2051 2052 /* For data transfer operations, it is the H2D Register FIS */ 2053 h2d_register_fisp = 2054 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 2055 2056 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 2057 2058 /* 2059 * PMP field only make sense when target is a port multiplier or a 2060 * device behind a port multiplier. Otherwise should set it to 0. 2061 */ 2062 if (AHCI_ADDR_IS_PMULT(addrp) || AHCI_ADDR_IS_PMPORT(addrp)) 2063 SET_FIS_PMP(h2d_register_fisp, pmport); 2064 2065 SET_FIS_CDMDEVCTL(h2d_register_fisp, 1); 2066 SET_FIS_COMMAND(h2d_register_fisp, scmd->satacmd_cmd_reg); 2067 SET_FIS_FEATURES(h2d_register_fisp, scmd->satacmd_features_reg); 2068 SET_FIS_SECTOR_COUNT(h2d_register_fisp, scmd->satacmd_sec_count_lsb); 2069 2070 switch (scmd->satacmd_addr_type) { 2071 2072 case 0: 2073 /* 2074 * satacmd_addr_type will be 0 for the commands below: 2075 * ATAPI command 2076 * SATAC_IDLE_IM 2077 * SATAC_STANDBY_IM 2078 * SATAC_DOWNLOAD_MICROCODE 2079 * SATAC_FLUSH_CACHE 2080 * SATAC_SET_FEATURES 2081 * SATAC_SMART 2082 * SATAC_ID_PACKET_DEVICE 2083 * SATAC_ID_DEVICE 2084 * SATAC_READ_PORTMULT 2085 * SATAC_WRITE_PORTMULT 2086 */ 2087 /* FALLTHRU */ 2088 2089 case ATA_ADDR_LBA: 2090 /* FALLTHRU */ 2091 2092 case ATA_ADDR_LBA28: 2093 /* LBA[7:0] */ 2094 SET_FIS_SECTOR(h2d_register_fisp, scmd->satacmd_lba_low_lsb); 2095 2096 /* LBA[15:8] */ 2097 SET_FIS_CYL_LOW(h2d_register_fisp, scmd->satacmd_lba_mid_lsb); 2098 2099 /* LBA[23:16] */ 2100 SET_FIS_CYL_HI(h2d_register_fisp, scmd->satacmd_lba_high_lsb); 2101 2102 /* LBA [27:24] (also called dev_head) */ 2103 SET_FIS_DEV_HEAD(h2d_register_fisp, scmd->satacmd_device_reg); 2104 2105 break; 2106 2107 case ATA_ADDR_LBA48: 2108 /* LBA[7:0] */ 2109 SET_FIS_SECTOR(h2d_register_fisp, scmd->satacmd_lba_low_lsb); 2110 2111 /* LBA[15:8] */ 2112 SET_FIS_CYL_LOW(h2d_register_fisp, scmd->satacmd_lba_mid_lsb); 2113 2114 /* LBA[23:16] */ 2115 SET_FIS_CYL_HI(h2d_register_fisp, scmd->satacmd_lba_high_lsb); 2116 2117 /* LBA [31:24] */ 2118 SET_FIS_SECTOR_EXP(h2d_register_fisp, 2119 scmd->satacmd_lba_low_msb); 2120 2121 /* LBA [39:32] */ 2122 SET_FIS_CYL_LOW_EXP(h2d_register_fisp, 2123 scmd->satacmd_lba_mid_msb); 2124 2125 /* LBA [47:40] */ 2126 SET_FIS_CYL_HI_EXP(h2d_register_fisp, 2127 scmd->satacmd_lba_high_msb); 2128 2129 /* Set dev_head */ 2130 SET_FIS_DEV_HEAD(h2d_register_fisp, 2131 scmd->satacmd_device_reg); 2132 2133 /* Set the extended sector count and features */ 2134 SET_FIS_SECTOR_COUNT_EXP(h2d_register_fisp, 2135 scmd->satacmd_sec_count_msb); 2136 SET_FIS_FEATURES_EXP(h2d_register_fisp, 2137 scmd->satacmd_features_reg_ext); 2138 break; 2139 } 2140 2141 /* 2142 * For NCQ command (READ/WRITE FPDMA QUEUED), sector count 7:0 is 2143 * filled into features field, and sector count 8:15 is filled into 2144 * features (exp) field. The hba driver doesn't need to anything 2145 * special with regard to this, since sata framework has already 2146 * done so. 2147 * 2148 * However the driver needs to make sure TAG is filled into sector 2149 * field. 2150 */ 2151 if (command_type == AHCI_NCQ_CMD) { 2152 SET_FIS_SECTOR_COUNT(h2d_register_fisp, 2153 (cmd_slot << SATA_TAG_QUEUING_SHIFT)); 2154 } 2155 2156 ncookies = scmd->satacmd_num_dma_cookies; 2157 AHCIDBG(AHCIDBG_PRDT, ahci_ctlp, 2158 "ncookies = 0x%x, ahci_dma_prdt_number = 0x%x", 2159 ncookies, ahci_dma_prdt_number); 2160 2161 ASSERT(ncookies <= ahci_dma_prdt_number); 2162 ahci_portp->ahciport_prd_bytecounts[cmd_slot] = 0; 2163 2164 /* *** now fill the scatter gather list ******* */ 2165 for (i = 0; i < ncookies; i++) { 2166 cmd_table->ahcict_prdt[i].ahcipi_data_base_addr = 2167 scmd->satacmd_dma_cookie_list[i]._dmu._dmac_la[0]; 2168 cmd_table->ahcict_prdt[i].ahcipi_data_base_addr_upper = 2169 scmd->satacmd_dma_cookie_list[i]._dmu._dmac_la[1]; 2170 cmd_table->ahcict_prdt[i].ahcipi_descr_info = 2171 scmd->satacmd_dma_cookie_list[i].dmac_size - 1; 2172 ahci_portp->ahciport_prd_bytecounts[cmd_slot] += 2173 scmd->satacmd_dma_cookie_list[i].dmac_size; 2174 } 2175 2176 AHCIDBG(AHCIDBG_PRDT, ahci_ctlp, 2177 "ahciport_prd_bytecounts 0x%x for cmd_slot 0x%x", 2178 ahci_portp->ahciport_prd_bytecounts[cmd_slot], cmd_slot); 2179 2180 /* The ACMD field is filled in for ATAPI command */ 2181 if (scmd->satacmd_cmd_reg == SATAC_PACKET) { 2182 bcopy(scmd->satacmd_acdb, cmd_table->ahcict_atapi_cmd, 2183 SATA_ATAPI_MAX_CDB_LEN); 2184 } 2185 2186 /* Set Command Header in Command List */ 2187 cmd_header = &ahci_portp->ahciport_cmd_list[cmd_slot]; 2188 BZERO_DESCR_INFO(cmd_header); 2189 BZERO_PRD_BYTE_COUNT(cmd_header); 2190 2191 /* Set the number of entries in the PRD table */ 2192 SET_PRD_TABLE_LENGTH(cmd_header, ncookies); 2193 2194 /* Set the length of the command in the CFIS area */ 2195 SET_COMMAND_FIS_LENGTH(cmd_header, AHCI_H2D_REGISTER_FIS_LENGTH); 2196 2197 /* 2198 * PMP field only make sense when target is a port multiplier or a 2199 * device behind a port multiplier. Otherwise should set it to 0. 2200 */ 2201 if (AHCI_ADDR_IS_PMULT(addrp) || AHCI_ADDR_IS_PMPORT(addrp)) 2202 SET_PORT_MULTI_PORT(cmd_header, pmport); 2203 2204 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "command data direction is " 2205 "sata_data_direction = 0x%x", 2206 scmd->satacmd_flags.sata_data_direction); 2207 2208 /* Set A bit if it is an ATAPI command */ 2209 if (scmd->satacmd_cmd_reg == SATAC_PACKET) 2210 SET_ATAPI(cmd_header, AHCI_CMDHEAD_ATAPI); 2211 2212 /* Set W bit if data is going to the device */ 2213 if (scmd->satacmd_flags.sata_data_direction == SATA_DIR_WRITE) 2214 SET_WRITE(cmd_header, AHCI_CMDHEAD_DATA_WRITE); 2215 2216 /* 2217 * Set the prefetchable bit - this bit is only valid if the PRDTL 2218 * field is non-zero or the ATAPI 'A' bit is set in the command 2219 * header. This bit cannot be set when using native command 2220 * queuing commands or when using FIS-based switching with a Port 2221 * multiplier. 2222 */ 2223 if (command_type != AHCI_NCQ_CMD) 2224 SET_PREFETCHABLE(cmd_header, AHCI_CMDHEAD_PREFETCHABLE); 2225 2226 /* 2227 * Now remember the sata packet in ahciport_slot_pkts[]. 2228 * Error retrieval command and r/w port multiplier command will 2229 * be stored specifically for each port. 2230 */ 2231 if (!ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 2232 !RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 2233 ahci_portp->ahciport_slot_pkts[cmd_slot] = spkt; 2234 2235 /* 2236 * We are overloading satapkt_hba_driver_private with 2237 * watched_cycle count. 2238 */ 2239 spkt->satapkt_hba_driver_private = (void *)(intptr_t)0; 2240 2241 #if AHCI_DEBUG 2242 if (ahci_debug_flags & AHCIDBG_ATACMD && 2243 scmd->satacmd_cmd_reg != SATAC_PACKET || 2244 ahci_debug_flags & AHCIDBG_ATAPICMD && 2245 scmd->satacmd_cmd_reg == SATAC_PACKET) { 2246 2247 /* Dump the command header and table */ 2248 ahci_log(ahci_ctlp, CE_WARN, "\n"); 2249 ahci_log(ahci_ctlp, CE_WARN, "Command header&table for spkt " 2250 "0x%p cmd_reg 0x%x port %d", spkt, 2251 scmd->satacmd_cmd_reg, port); 2252 ptr = (uint32_t *)cmd_header; 2253 ahci_log(ahci_ctlp, CE_WARN, 2254 " Command Header:%8x %8x %8x %8x", 2255 ptr[0], ptr[1], ptr[2], ptr[3]); 2256 2257 /* Dump the H2D register FIS */ 2258 ptr = (uint32_t *)h2d_register_fisp; 2259 ahci_log(ahci_ctlp, CE_WARN, 2260 " Command FIS: %8x %8x %8x %8x", 2261 ptr[0], ptr[1], ptr[2], ptr[3]); 2262 2263 /* Dump the ACMD register FIS */ 2264 ptr2 = (uint8_t *)&(cmd_table->ahcict_atapi_cmd); 2265 for (i = 0; i < SATA_ATAPI_MAX_CDB_LEN/8; i++) 2266 if (ahci_debug_flags & AHCIDBG_ATAPICMD) 2267 ahci_log(ahci_ctlp, CE_WARN, 2268 " ATAPI command: %2x %2x %2x %2x " 2269 "%2x %2x %2x %2x", 2270 ptr2[8 * i], ptr2[8 * i + 1], 2271 ptr2[8 * i + 2], ptr2[8 * i + 3], 2272 ptr2[8 * i + 4], ptr2[8 * i + 5], 2273 ptr2[8 * i + 6], ptr2[8 * i + 7]); 2274 2275 /* Dump the PRDT */ 2276 for (i = 0; i < ncookies; i++) { 2277 ptr = (uint32_t *)&(cmd_table->ahcict_prdt[i]); 2278 ahci_log(ahci_ctlp, CE_WARN, 2279 " Cookie %d: %8x %8x %8x %8x", 2280 i, ptr[0], ptr[1], ptr[2], ptr[3]); 2281 } 2282 } 2283 #endif 2284 2285 (void) ddi_dma_sync( 2286 ahci_portp->ahciport_cmd_tables_dma_handle[cmd_slot], 2287 0, 2288 ahci_cmd_table_size, 2289 DDI_DMA_SYNC_FORDEV); 2290 2291 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 2292 cmd_slot * sizeof (ahci_cmd_header_t), 2293 sizeof (ahci_cmd_header_t), 2294 DDI_DMA_SYNC_FORDEV); 2295 2296 /* Set the corresponding bit in the PxSACT.DS for queued command */ 2297 if (command_type == AHCI_NCQ_CMD) { 2298 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 2299 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port), 2300 (0x1 << cmd_slot)); 2301 } 2302 2303 /* Indicate to the HBA that a command is active. */ 2304 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 2305 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 2306 (0x1 << cmd_slot)); 2307 2308 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_deliver_satapkt " 2309 "exit: port %d", port); 2310 2311 return (cmd_slot); 2312 } 2313 2314 /* 2315 * Called by the sata framework to abort the previously sent packet(s). 2316 * 2317 * Reset device to abort commands. 2318 */ 2319 static int 2320 ahci_tran_abort(dev_info_t *dip, sata_pkt_t *spkt, int flag) 2321 { 2322 ahci_ctl_t *ahci_ctlp; 2323 ahci_port_t *ahci_portp; 2324 uint32_t slot_status = 0; 2325 uint32_t aborted_tags = 0; 2326 uint32_t finished_tags = 0; 2327 uint8_t cport = spkt->satapkt_device.satadev_addr.cport; 2328 uint8_t port; 2329 int tmp_slot; 2330 int instance = ddi_get_instance(dip); 2331 2332 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 2333 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 2334 2335 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2336 "ahci_tran_abort enter: port %d", port); 2337 2338 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2339 mutex_enter(&ahci_portp->ahciport_mutex); 2340 2341 /* 2342 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2343 * commands are being mopped, therefore there is nothing else to do 2344 */ 2345 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2346 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2347 "ahci_tran_abort: port %d is in " 2348 "mopping process, so just return directly ", port); 2349 mutex_exit(&ahci_portp->ahciport_mutex); 2350 return (SATA_SUCCESS); 2351 } 2352 2353 /* 2354 * If AHCI_PORT_FLAG_RDWR_PMULT flag is set, it means a R/W PMULT 2355 * command is being executed so no other commands is outstanding, 2356 * nothing to do. 2357 */ 2358 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_RDWR_PMULT) { 2359 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2360 "ahci_tran_abort: port %d is reading/writing " 2361 "port multiplier, so just return directly ", port); 2362 mutex_exit(&ahci_portp->ahciport_mutex); 2363 return (SATA_SUCCESS); 2364 } 2365 2366 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED | 2367 ahci_portp->ahciport_port_state & SATA_PSTATE_SHUTDOWN | 2368 ahci_portp->ahciport_port_state & SATA_PSTATE_PWROFF) { 2369 /* 2370 * In case the targer driver would send the request before 2371 * sata framework can have the opportunity to process those 2372 * event reports. 2373 */ 2374 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 2375 spkt->satapkt_device.satadev_state = 2376 ahci_portp->ahciport_port_state; 2377 ahci_update_sata_registers(ahci_ctlp, port, 2378 &spkt->satapkt_device); 2379 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2380 "ahci_tran_abort returning SATA_FAILURE while " 2381 "port in FAILED/SHUTDOWN/PWROFF state: " 2382 "port: %d", port); 2383 mutex_exit(&ahci_portp->ahciport_mutex); 2384 return (SATA_FAILURE); 2385 } 2386 2387 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 2388 /* 2389 * ahci_intr_phyrdy_change() may have rendered it to 2390 * AHCI_PORT_TYPE_NODEV. 2391 */ 2392 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 2393 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 2394 spkt->satapkt_device.satadev_state = 2395 ahci_portp->ahciport_port_state; 2396 ahci_update_sata_registers(ahci_ctlp, port, 2397 &spkt->satapkt_device); 2398 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2399 "ahci_tran_abort returning SATA_FAILURE while " 2400 "no device attached: port: %d", port); 2401 mutex_exit(&ahci_portp->ahciport_mutex); 2402 return (SATA_FAILURE); 2403 } 2404 2405 if (flag == SATA_ABORT_ALL_PACKETS) { 2406 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2407 aborted_tags = ahci_portp->ahciport_pending_tags; 2408 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2409 aborted_tags = ahci_portp->ahciport_pending_ncq_tags; 2410 2411 cmn_err(CE_NOTE, "!ahci%d: ahci port %d abort all packets", 2412 instance, port); 2413 } else { 2414 aborted_tags = 0xffffffff; 2415 /* 2416 * Aborting one specific packet, first search the 2417 * ahciport_slot_pkts[] list for matching spkt. 2418 */ 2419 for (tmp_slot = 0; 2420 tmp_slot < ahci_ctlp->ahcictl_num_cmd_slots; tmp_slot++) { 2421 if (ahci_portp->ahciport_slot_pkts[tmp_slot] == spkt) { 2422 aborted_tags = (0x1 << tmp_slot); 2423 break; 2424 } 2425 } 2426 2427 if (aborted_tags == 0xffffffff) { 2428 /* request packet is not on the pending list */ 2429 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2430 "Cannot find the aborting pkt 0x%p on the " 2431 "pending list", (void *)spkt); 2432 ahci_update_sata_registers(ahci_ctlp, port, 2433 &spkt->satapkt_device); 2434 mutex_exit(&ahci_portp->ahciport_mutex); 2435 return (SATA_FAILURE); 2436 } 2437 cmn_err(CE_NOTE, "!ahci%d: ahci port %d abort satapkt 0x%p", 2438 instance, port, (void *)spkt); 2439 } 2440 2441 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2442 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2443 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2444 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2445 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2446 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2447 2448 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2449 ahci_portp->ahciport_mop_in_progress++; 2450 2451 /* 2452 * To abort the packet(s), first we are trying to clear PxCMD.ST 2453 * to stop the port, and if the port can be stopped 2454 * successfully with PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0', 2455 * then we just send back the aborted packet(s) with ABORTED flag 2456 * and then restart the port by setting PxCMD.ST and PxCMD.FRE. 2457 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then we 2458 * perform a COMRESET. 2459 */ 2460 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, 2461 ahci_portp, port, NULL, NULL); 2462 2463 /* 2464 * Compute which have finished and which need to be retried. 2465 * 2466 * The finished tags are ahciport_pending_tags/ahciport_pending_ncq_tags 2467 * minus the slot_status. The aborted_tags has to be deducted by 2468 * finished_tags since we can't possibly abort a tag which had finished 2469 * already. 2470 */ 2471 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2472 finished_tags = ahci_portp->ahciport_pending_tags & 2473 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2474 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2475 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2476 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2477 2478 aborted_tags &= ~finished_tags; 2479 2480 ahci_mop_commands(ahci_ctlp, 2481 ahci_portp, 2482 slot_status, 2483 0, /* failed tags */ 2484 0, /* timeout tags */ 2485 aborted_tags, 2486 0); /* reset tags */ 2487 2488 ahci_update_sata_registers(ahci_ctlp, port, &spkt->satapkt_device); 2489 mutex_exit(&ahci_portp->ahciport_mutex); 2490 2491 return (SATA_SUCCESS); 2492 } 2493 2494 /* 2495 * Used to do device reset and reject all the pending packets on a device 2496 * during the reset operation. 2497 * 2498 * NOTE: ONLY called by ahci_tran_reset_dport 2499 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2500 */ 2501 static int 2502 ahci_reset_device_reject_pkts(ahci_ctl_t *ahci_ctlp, 2503 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2504 { 2505 uint32_t slot_status = 0; 2506 uint32_t reset_tags = 0; 2507 uint32_t finished_tags = 0; 2508 uint8_t port = addrp->aa_port; 2509 sata_device_t sdevice; 2510 int ret; 2511 2512 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2513 "ahci_reset_device_reject_pkts on port: %d", port); 2514 2515 /* 2516 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2517 * commands are being mopped, therefore there is nothing else to do 2518 */ 2519 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2520 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2521 "ahci_reset_device_reject_pkts: port %d is in " 2522 "mopping process, so return directly ", port); 2523 return (SATA_SUCCESS); 2524 } 2525 2526 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2527 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2528 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2529 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2530 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2531 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2532 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2533 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2534 } 2535 2536 if (ahci_software_reset(ahci_ctlp, ahci_portp, addrp) 2537 != AHCI_SUCCESS) { 2538 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2539 "Try to do a port reset after software " 2540 "reset failed", port); 2541 ret = ahci_port_reset(ahci_ctlp, ahci_portp, addrp); 2542 if (ret != AHCI_SUCCESS) { 2543 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2544 "ahci_reset_device_reject_pkts: port %d " 2545 "failed", port); 2546 return (SATA_FAILURE); 2547 } 2548 } 2549 /* Set the reset in progress flag */ 2550 ahci_portp->ahciport_reset_in_progress = 1; 2551 2552 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2553 ahci_portp->ahciport_mop_in_progress++; 2554 2555 /* Indicate to the framework that a reset has happened */ 2556 bzero((void *)&sdevice, sizeof (sata_device_t)); 2557 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 2558 sdevice.satadev_addr.pmport = 0; 2559 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 2560 sdevice.satadev_state = SATA_DSTATE_RESET | 2561 SATA_DSTATE_PWR_ACTIVE; 2562 mutex_exit(&ahci_portp->ahciport_mutex); 2563 sata_hba_event_notify( 2564 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 2565 &sdevice, 2566 SATA_EVNT_DEVICE_RESET); 2567 mutex_enter(&ahci_portp->ahciport_mutex); 2568 2569 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 2570 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 2571 2572 /* Next try to mop the pending commands */ 2573 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2574 finished_tags = ahci_portp->ahciport_pending_tags & 2575 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2576 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2577 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2578 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2579 2580 reset_tags &= ~finished_tags; 2581 2582 ahci_mop_commands(ahci_ctlp, 2583 ahci_portp, 2584 slot_status, 2585 0, /* failed tags */ 2586 0, /* timeout tags */ 2587 0, /* aborted tags */ 2588 reset_tags); /* reset tags */ 2589 2590 return (SATA_SUCCESS); 2591 } 2592 2593 /* 2594 * Used to do device reset and reject all the pending packets on a device 2595 * during the reset operation. 2596 * 2597 * NOTE: ONLY called by ahci_tran_reset_dport 2598 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2599 */ 2600 static int 2601 ahci_reset_pmdevice_reject_pkts(ahci_ctl_t *ahci_ctlp, 2602 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2603 { 2604 uint32_t finished_tags = 0, reset_tags = 0, slot_status = 0; 2605 uint8_t port = addrp->aa_port; 2606 uint8_t pmport = addrp->aa_pmport; 2607 sata_device_t sdevice; 2608 2609 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_PMULT, ahci_ctlp, 2610 "ahci_reset_pmdevice_reject_pkts at port %d:%d", port, pmport); 2611 2612 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2613 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2614 "ahci_reset_pmdevice_reject_pkts: port %d is in " 2615 "mopping process, so return directly ", port); 2616 return (SATA_SUCCESS); 2617 } 2618 2619 /* Checking for outstanding commands */ 2620 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2621 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2622 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2623 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2624 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2625 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2626 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2627 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2628 } 2629 2630 /* Issue SOFTWARE reset command. */ 2631 if (ahci_software_reset(ahci_ctlp, ahci_portp, addrp) 2632 != AHCI_SUCCESS) { 2633 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2634 "Try to do a port reset after software " 2635 "reset failed", port); 2636 return (SATA_FAILURE); 2637 } 2638 2639 /* Set the reset in progress flag */ 2640 ahci_portp->ahciport_reset_in_progress = 1; 2641 2642 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2643 ahci_portp->ahciport_mop_in_progress++; 2644 2645 /* Indicate to the framework that a reset has happened */ 2646 bzero((void *)&sdevice, sizeof (sata_device_t)); 2647 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 2648 sdevice.satadev_addr.pmport = pmport; 2649 if (AHCI_ADDR_IS_PMULT(addrp)) 2650 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 2651 else 2652 sdevice.satadev_addr.qual = SATA_ADDR_DPMPORT; 2653 sdevice.satadev_state = SATA_DSTATE_RESET | 2654 SATA_DSTATE_PWR_ACTIVE; 2655 mutex_exit(&ahci_portp->ahciport_mutex); 2656 sata_hba_event_notify( 2657 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 2658 &sdevice, 2659 SATA_EVNT_DEVICE_RESET); 2660 mutex_enter(&ahci_portp->ahciport_mutex); 2661 2662 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 2663 "port %d:%d sending event up: SATA_EVNT_DEVICE_RESET", 2664 port, pmport); 2665 2666 /* Next try to mop the pending commands */ 2667 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2668 finished_tags = ahci_portp->ahciport_pending_tags & 2669 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2670 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2671 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2672 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2673 reset_tags &= ~finished_tags; 2674 2675 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 2676 "reset_tags = %x, finished_tags = %x, slot_status = %x", 2677 reset_tags, finished_tags, slot_status); 2678 2679 /* 2680 * NOTE: Because PxCI be only erased by unset PxCMD.ST bit, so even we 2681 * try to reset a single device behind a port multiplier will 2682 * terminate all the commands on that HBA port. We need mop these 2683 * commands as well. 2684 */ 2685 ahci_mop_commands(ahci_ctlp, 2686 ahci_portp, 2687 slot_status, 2688 0, /* failed tags */ 2689 0, /* timeout tags */ 2690 0, /* aborted tags */ 2691 reset_tags); /* reset tags */ 2692 2693 return (SATA_SUCCESS); 2694 } 2695 2696 /* 2697 * Used to do port reset and reject all the pending packets on a port during 2698 * the reset operation. 2699 * 2700 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2701 */ 2702 static int 2703 ahci_reset_port_reject_pkts(ahci_ctl_t *ahci_ctlp, 2704 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2705 { 2706 uint32_t slot_status = 0; 2707 uint32_t reset_tags = 0; 2708 uint32_t finished_tags = 0; 2709 uint8_t port = addrp->aa_port; 2710 2711 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2712 "ahci_reset_port_reject_pkts at port: %d", port); 2713 2714 /* 2715 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2716 * commands are being mopped, therefore there is nothing else to do 2717 */ 2718 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2719 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2720 "ahci_reset_port_reject_pkts: port %d is in " 2721 "mopping process, so return directly ", port); 2722 return (SATA_SUCCESS); 2723 } 2724 2725 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2726 ahci_portp->ahciport_mop_in_progress++; 2727 2728 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2729 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2730 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2731 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2732 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2733 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2734 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2735 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2736 } 2737 2738 if (ahci_restart_port_wait_till_ready(ahci_ctlp, 2739 ahci_portp, port, AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, 2740 NULL) != AHCI_SUCCESS) { 2741 2742 /* Clear mop flag */ 2743 ahci_portp->ahciport_mop_in_progress--; 2744 if (ahci_portp->ahciport_mop_in_progress == 0) 2745 ahci_portp->ahciport_flags &= 2746 ~AHCI_PORT_FLAG_MOPPING; 2747 return (SATA_FAILURE); 2748 } 2749 2750 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2751 finished_tags = ahci_portp->ahciport_pending_tags & 2752 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2753 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2754 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2755 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2756 2757 reset_tags &= ~finished_tags; 2758 2759 ahci_mop_commands(ahci_ctlp, 2760 ahci_portp, 2761 slot_status, 2762 0, /* failed tags */ 2763 0, /* timeout tags */ 2764 0, /* aborted tags */ 2765 reset_tags); /* reset tags */ 2766 2767 return (SATA_SUCCESS); 2768 } 2769 2770 /* 2771 * Used to do hba reset and reject all the pending packets on all ports 2772 * during the reset operation. 2773 */ 2774 static int 2775 ahci_reset_hba_reject_pkts(ahci_ctl_t *ahci_ctlp) 2776 { 2777 ahci_port_t *ahci_portp; 2778 uint32_t slot_status[AHCI_MAX_PORTS]; 2779 uint32_t reset_tags[AHCI_MAX_PORTS]; 2780 uint32_t finished_tags[AHCI_MAX_PORTS]; 2781 int port; 2782 int ret = SATA_SUCCESS; 2783 2784 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2785 "ahci_reset_hba_reject_pkts enter", NULL); 2786 2787 bzero(slot_status, sizeof (slot_status)); 2788 bzero(reset_tags, sizeof (reset_tags)); 2789 bzero(finished_tags, sizeof (finished_tags)); 2790 2791 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 2792 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 2793 continue; 2794 } 2795 2796 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2797 2798 mutex_enter(&ahci_portp->ahciport_mutex); 2799 ahci_portp->ahciport_reset_in_progress = 1; 2800 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2801 slot_status[port] = ddi_get32( 2802 ahci_ctlp->ahcictl_ahci_acc_handle, 2803 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2804 reset_tags[port] = slot_status[port] & 2805 AHCI_SLOT_MASK(ahci_ctlp); 2806 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 2807 "port %d: reset_tags = 0x%x pending_tags = 0x%x", 2808 port, reset_tags[port], 2809 ahci_portp->ahciport_pending_tags); 2810 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2811 slot_status[port] = ddi_get32( 2812 ahci_ctlp->ahcictl_ahci_acc_handle, 2813 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2814 reset_tags[port] = slot_status[port] & 2815 AHCI_NCQ_SLOT_MASK(ahci_portp); 2816 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 2817 "port %d: reset_tags = 0x%x pending_tags = 0x%x", 2818 port, reset_tags[port], 2819 ahci_portp->ahciport_pending_tags); 2820 } 2821 mutex_exit(&ahci_portp->ahciport_mutex); 2822 } 2823 2824 if (ahci_hba_reset(ahci_ctlp) != AHCI_SUCCESS) { 2825 ret = SATA_FAILURE; 2826 } 2827 2828 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 2829 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 2830 continue; 2831 } 2832 2833 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2834 2835 mutex_enter(&ahci_portp->ahciport_mutex); 2836 /* 2837 * To prevent recursive enter to ahci_mop_commands, we need 2838 * check AHCI_PORT_FLAG_MOPPING flag. 2839 */ 2840 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2841 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2842 "ahci_reset_hba_reject_pkts: port %d is in " 2843 "mopping process, so return directly ", port); 2844 mutex_exit(&ahci_portp->ahciport_mutex); 2845 continue; 2846 } 2847 2848 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2849 ahci_portp->ahciport_mop_in_progress++; 2850 2851 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2852 finished_tags[port] = 2853 ahci_portp->ahciport_pending_tags & 2854 ~slot_status[port] & AHCI_SLOT_MASK(ahci_ctlp); 2855 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2856 finished_tags[port] = 2857 ahci_portp->ahciport_pending_ncq_tags & 2858 ~slot_status[port] & AHCI_NCQ_SLOT_MASK(ahci_portp); 2859 2860 reset_tags[port] &= ~finished_tags[port]; 2861 2862 ahci_mop_commands(ahci_ctlp, 2863 ahci_portp, 2864 slot_status[port], 2865 0, /* failed tags */ 2866 0, /* timeout tags */ 2867 0, /* aborted tags */ 2868 reset_tags[port]); /* reset tags */ 2869 mutex_exit(&ahci_portp->ahciport_mutex); 2870 } 2871 out: 2872 return (ret); 2873 } 2874 2875 /* 2876 * Called by sata framework to reset a port(s) or device. 2877 */ 2878 static int 2879 ahci_tran_reset_dport(dev_info_t *dip, sata_device_t *sd) 2880 { 2881 ahci_ctl_t *ahci_ctlp; 2882 ahci_port_t *ahci_portp; 2883 ahci_addr_t addr; 2884 uint8_t cport = sd->satadev_addr.cport; 2885 uint8_t pmport = sd->satadev_addr.pmport; 2886 uint8_t port; 2887 int ret = SATA_SUCCESS; 2888 int instance = ddi_get_instance(dip); 2889 2890 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 2891 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 2892 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2893 2894 ahci_get_ahci_addr(ahci_ctlp, sd, &addr); 2895 2896 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2897 "ahci_tran_reset_dport enter: cport %d", cport); 2898 2899 switch (sd->satadev_addr.qual) { 2900 case SATA_ADDR_PMPORT: 2901 /* 2902 * If we want to issue a COMRESET on a pmport, we need to 2903 * reject the outstanding commands on that pmport. According 2904 * to AHCI spec, PxCI register could only be cleared by 2905 * clearing PxCMD.ST, which will halt the controller port - as 2906 * well as other pmports. 2907 * 2908 * Therefore we directly reset the controller port for 2909 * simplicity. ahci_tran_probe_port() will handle reset stuff 2910 * like initializing the given pmport. 2911 */ 2912 /* FALLTHRU */ 2913 case SATA_ADDR_CPORT: 2914 /* Port reset */ 2915 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2916 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 2917 "port %d reset port", instance, port); 2918 2919 mutex_enter(&ahci_portp->ahciport_mutex); 2920 ret = ahci_reset_port_reject_pkts(ahci_ctlp, ahci_portp, &addr); 2921 mutex_exit(&ahci_portp->ahciport_mutex); 2922 2923 break; 2924 2925 case SATA_ADDR_DPMPORT: 2926 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 2927 "port %d:%d reset device", instance, port, pmport); 2928 /* FALLTHRU */ 2929 case SATA_ADDR_DCPORT: 2930 /* Device reset */ 2931 if (sd->satadev_addr.qual == SATA_ADDR_DCPORT) 2932 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 2933 "port %d reset device", instance, port); 2934 2935 mutex_enter(&ahci_portp->ahciport_mutex); 2936 /* 2937 * software reset request must be sent to SATA_PMULT_HOSTPORT 2938 * if target is a port multiplier: 2939 */ 2940 if (sd->satadev_addr.qual == SATA_ADDR_DCPORT && 2941 ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) 2942 AHCI_ADDR_SET_PMULT(&addr, port); 2943 2944 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED | 2945 ahci_portp->ahciport_port_state & SATA_PSTATE_SHUTDOWN | 2946 ahci_portp->ahciport_port_state & SATA_PSTATE_PWROFF) { 2947 /* 2948 * In case the targer driver would send the request 2949 * before sata framework can have the opportunity to 2950 * process those event reports. 2951 */ 2952 sd->satadev_state = ahci_portp->ahciport_port_state; 2953 ahci_update_sata_registers(ahci_ctlp, port, sd); 2954 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2955 "ahci_tran_reset_dport returning SATA_FAILURE " 2956 "while port in FAILED/SHUTDOWN/PWROFF state: " 2957 "port: %d", port); 2958 mutex_exit(&ahci_portp->ahciport_mutex); 2959 ret = SATA_FAILURE; 2960 break; 2961 } 2962 2963 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) == 2964 SATA_DTYPE_NONE) { 2965 /* 2966 * ahci_intr_phyrdy_change() may have rendered it to 2967 * AHCI_PORT_TYPE_NODEV. 2968 */ 2969 sd->satadev_type = SATA_DTYPE_NONE; 2970 sd->satadev_state = AHCIPORT_GET_STATE(ahci_portp, 2971 &addr); 2972 ahci_update_sata_registers(ahci_ctlp, port, sd); 2973 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2974 "ahci_tran_reset_dport returning SATA_FAILURE " 2975 "while no device attached: port: %d", port); 2976 mutex_exit(&ahci_portp->ahciport_mutex); 2977 ret = SATA_FAILURE; 2978 break; 2979 } 2980 2981 if (AHCI_ADDR_IS_PORT(&addr)) { 2982 ret = ahci_reset_device_reject_pkts(ahci_ctlp, 2983 ahci_portp, &addr); 2984 } else { 2985 ret = ahci_reset_pmdevice_reject_pkts(ahci_ctlp, 2986 ahci_portp, &addr); 2987 } 2988 2989 mutex_exit(&ahci_portp->ahciport_mutex); 2990 break; 2991 2992 case SATA_ADDR_CNTRL: 2993 /* Reset the whole controller */ 2994 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 2995 "reset the whole hba", instance); 2996 ret = ahci_reset_hba_reject_pkts(ahci_ctlp); 2997 break; 2998 2999 default: 3000 ret = SATA_FAILURE; 3001 } 3002 3003 return (ret); 3004 } 3005 3006 /* 3007 * Called by sata framework to activate a port as part of hotplug. 3008 * (cfgadm -c connect satax/y) 3009 * Support port multiplier. 3010 */ 3011 static int 3012 ahci_tran_hotplug_port_activate(dev_info_t *dip, sata_device_t *satadev) 3013 { 3014 ahci_ctl_t *ahci_ctlp; 3015 ahci_port_t *ahci_portp; 3016 ahci_addr_t addr; 3017 uint8_t cport = satadev->satadev_addr.cport; 3018 uint8_t pmport = satadev->satadev_addr.pmport; 3019 uint8_t port; 3020 int instance = ddi_get_instance(dip); 3021 3022 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 3023 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 3024 3025 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 3026 "ahci_tran_hotplug_port_activate enter: cport %d", cport); 3027 3028 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3029 3030 mutex_enter(&ahci_portp->ahciport_mutex); 3031 ahci_get_ahci_addr(ahci_ctlp, satadev, &addr); 3032 ASSERT(AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)); 3033 3034 if (AHCI_ADDR_IS_PORT(&addr)) { 3035 cmn_err(CE_NOTE, "!ahci%d: ahci port %d is activated", 3036 instance, port); 3037 3038 /* Enable the interrupts on the port */ 3039 ahci_enable_port_intrs(ahci_ctlp, port); 3040 3041 /* 3042 * Reset the port so that the PHY communication would be 3043 * re-established. But this reset is an internal operation 3044 * and the sata module doesn't need to know about it. 3045 * Moreover, the port with a device attached will be started 3046 * too. 3047 */ 3048 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, 3049 ahci_portp, port, 3050 AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, 3051 NULL); 3052 3053 /* 3054 * Need to check the link status and device status of the port 3055 * and consider raising power if the port was in D3 state 3056 */ 3057 ahci_portp->ahciport_port_state |= SATA_PSTATE_PWRON; 3058 ahci_portp->ahciport_port_state &= ~SATA_PSTATE_PWROFF; 3059 ahci_portp->ahciport_port_state &= ~SATA_PSTATE_SHUTDOWN; 3060 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 3061 cmn_err(CE_NOTE, "!ahci%d: ahci port %d:%d is activated", 3062 instance, port, pmport); 3063 /* AHCI_ADDR_PMPORT */ 3064 AHCIPORT_PMSTATE(ahci_portp, &addr) |= SATA_PSTATE_PWRON; 3065 AHCIPORT_PMSTATE(ahci_portp, &addr) &= 3066 ~(SATA_PSTATE_PWROFF|SATA_PSTATE_SHUTDOWN); 3067 } 3068 3069 satadev->satadev_state = ahci_portp->ahciport_port_state; 3070 3071 ahci_update_sata_registers(ahci_ctlp, port, satadev); 3072 3073 mutex_exit(&ahci_portp->ahciport_mutex); 3074 return (SATA_SUCCESS); 3075 } 3076 3077 /* 3078 * Called by sata framework to deactivate a port as part of hotplug. 3079 * (cfgadm -c disconnect satax/y) 3080 * Support port multiplier. 3081 */ 3082 static int 3083 ahci_tran_hotplug_port_deactivate(dev_info_t *dip, sata_device_t *satadev) 3084 { 3085 ahci_ctl_t *ahci_ctlp; 3086 ahci_port_t *ahci_portp; 3087 ahci_addr_t addr; 3088 uint8_t cport = satadev->satadev_addr.cport; 3089 uint8_t pmport = satadev->satadev_addr.pmport; 3090 uint8_t port; 3091 uint32_t port_scontrol; 3092 int instance = ddi_get_instance(dip); 3093 3094 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 3095 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 3096 3097 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 3098 "ahci_tran_hotplug_port_deactivate enter: cport %d", cport); 3099 3100 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3101 mutex_enter(&ahci_portp->ahciport_mutex); 3102 ahci_get_ahci_addr(ahci_ctlp, satadev, &addr); 3103 ASSERT(AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)); 3104 3105 if (AHCI_ADDR_IS_PORT(&addr)) { 3106 cmn_err(CE_NOTE, "!ahci%d: ahci port %d is deactivated", 3107 instance, port); 3108 3109 /* Disable the interrupts on the port */ 3110 ahci_disable_port_intrs(ahci_ctlp, port); 3111 3112 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) { 3113 3114 /* First to abort all the pending commands */ 3115 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 3116 3117 /* Then stop the port */ 3118 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3119 ahci_portp, port); 3120 } 3121 3122 /* Next put the PHY offline */ 3123 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3124 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 3125 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_DISABLE); 3126 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, (uint32_t *) 3127 AHCI_PORT_PxSCTL(ahci_ctlp, port), port_scontrol); 3128 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 3129 cmn_err(CE_NOTE, "!ahci%d: ahci port %d:%d is deactivated", 3130 instance, port, pmport); 3131 3132 ahci_disable_port_intrs(ahci_ctlp, port); 3133 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) 3134 != SATA_DTYPE_NONE) 3135 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 3136 3137 /* Re-enable the interrupts for the other pmports */ 3138 ahci_enable_port_intrs(ahci_ctlp, port); 3139 } 3140 3141 /* Update port state */ 3142 AHCIPORT_SET_STATE(ahci_portp, &addr, SATA_PSTATE_SHUTDOWN); 3143 satadev->satadev_state = SATA_PSTATE_SHUTDOWN; 3144 3145 ahci_update_sata_registers(ahci_ctlp, port, satadev); 3146 3147 mutex_exit(&ahci_portp->ahciport_mutex); 3148 return (SATA_SUCCESS); 3149 } 3150 3151 /* 3152 * To be used to mark all the outstanding pkts with SATA_PKT_ABORTED 3153 * when a device is unplugged or a port is deactivated. 3154 * 3155 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3156 */ 3157 static void 3158 ahci_reject_all_abort_pkts(ahci_ctl_t *ahci_ctlp, 3159 ahci_port_t *ahci_portp, uint8_t port) 3160 { 3161 uint32_t slot_status = 0; 3162 uint32_t abort_tags = 0; 3163 3164 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 3165 "ahci_reject_all_abort_pkts at port: %d", port); 3166 3167 /* Read/write port multiplier command takes highest priority */ 3168 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 3169 slot_status = 0x1; 3170 abort_tags = 0x1; 3171 goto out; 3172 } 3173 3174 /* 3175 * When AHCI_PORT_FLAG_MOPPING is set, we need to check whether a 3176 * REQUEST SENSE command or READ LOG EXT command is delivered to HBA 3177 * to get the error data, if yes when the device is removed, the 3178 * command needs to be aborted too. 3179 */ 3180 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 3181 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 3182 slot_status = 0x1; 3183 abort_tags = 0x1; 3184 goto out; 3185 } else { 3186 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3187 "ahci_reject_all_abort_pkts return directly " 3188 "port %d no needs to reject any outstanding " 3189 "commands", port); 3190 return; 3191 } 3192 } 3193 3194 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 3195 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3196 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 3197 abort_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 3198 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 3199 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3200 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 3201 abort_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 3202 } 3203 3204 out: 3205 /* No need to do mop when there is no outstanding commands */ 3206 if (slot_status != 0) { 3207 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 3208 ahci_portp->ahciport_mop_in_progress++; 3209 3210 ahci_mop_commands(ahci_ctlp, 3211 ahci_portp, 3212 slot_status, 3213 0, /* failed tags */ 3214 0, /* timeout tags */ 3215 abort_tags, /* aborting tags */ 3216 0); /* reset tags */ 3217 } 3218 } 3219 3220 #if defined(__lock_lint) 3221 static int 3222 ahci_selftest(dev_info_t *dip, sata_device_t *device) 3223 { 3224 return (SATA_SUCCESS); 3225 } 3226 #endif 3227 3228 /* 3229 * Allocate the ports structure, only called by ahci_attach 3230 */ 3231 static int 3232 ahci_alloc_ports_state(ahci_ctl_t *ahci_ctlp) 3233 { 3234 int port, cport = 0; 3235 3236 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3237 "ahci_alloc_ports_state enter", NULL); 3238 3239 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3240 3241 /* Allocate structures only for the implemented ports */ 3242 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3243 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3244 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3245 "hba port %d not implemented", port); 3246 continue; 3247 } 3248 3249 ahci_ctlp->ahcictl_cport_to_port[cport] = (uint8_t)port; 3250 ahci_ctlp->ahcictl_port_to_cport[port] = 3251 (uint8_t)cport++; 3252 3253 if (ahci_alloc_port_state(ahci_ctlp, port) != AHCI_SUCCESS) { 3254 goto err_out; 3255 } 3256 } 3257 3258 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3259 return (AHCI_SUCCESS); 3260 3261 err_out: 3262 for (port--; port >= 0; port--) { 3263 if (AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3264 ahci_dealloc_port_state(ahci_ctlp, port); 3265 } 3266 } 3267 3268 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3269 return (AHCI_FAILURE); 3270 } 3271 3272 /* 3273 * Reverse of ahci_alloc_ports_state(), only called by ahci_detach 3274 */ 3275 static void 3276 ahci_dealloc_ports_state(ahci_ctl_t *ahci_ctlp) 3277 { 3278 int port; 3279 3280 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3281 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3282 /* if this port is implemented by the HBA */ 3283 if (AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) 3284 ahci_dealloc_port_state(ahci_ctlp, port); 3285 } 3286 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3287 } 3288 3289 /* 3290 * Drain the taskq. 3291 */ 3292 static void 3293 ahci_drain_ports_taskq(ahci_ctl_t *ahci_ctlp) 3294 { 3295 ahci_port_t *ahci_portp; 3296 int port; 3297 3298 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3299 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3300 continue; 3301 } 3302 3303 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3304 3305 mutex_enter(&ahci_portp->ahciport_mutex); 3306 ddi_taskq_wait(ahci_portp->ahciport_event_taskq); 3307 mutex_exit(&ahci_portp->ahciport_mutex); 3308 } 3309 } 3310 3311 /* 3312 * Initialize the controller and all ports. And then try to start the ports 3313 * if there are devices attached. 3314 * 3315 * This routine can be called from three seperate cases: DDI_ATTACH, 3316 * PM_LEVEL_D0 and DDI_RESUME. The DDI_ATTACH case is different from 3317 * other two cases; device signature probing are attempted only during 3318 * DDI_ATTACH case. 3319 * 3320 * WARNING!!! Disable the whole controller's interrupts before calling and 3321 * the interrupts will be enabled upon successfully return. 3322 */ 3323 static int 3324 ahci_initialize_controller(ahci_ctl_t *ahci_ctlp) 3325 { 3326 ahci_port_t *ahci_portp; 3327 ahci_addr_t addr; 3328 uint32_t ghc_control; 3329 int port; 3330 3331 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3332 "ahci_initialize_controller enter", NULL); 3333 3334 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3335 3336 /* 3337 * Indicate that system software is AHCI aware by setting 3338 * GHC.AE to 1 3339 */ 3340 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3341 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 3342 3343 ghc_control |= AHCI_HBA_GHC_AE; 3344 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3345 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), 3346 ghc_control); 3347 3348 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3349 3350 /* Initialize the implemented ports and structures */ 3351 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3352 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3353 continue; 3354 } 3355 3356 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3357 mutex_enter(&ahci_portp->ahciport_mutex); 3358 3359 /* 3360 * Ensure that the controller is not in the running state 3361 * by checking every implemented port's PxCMD register 3362 */ 3363 AHCI_ADDR_SET_PORT(&addr, (uint8_t)port); 3364 3365 if (ahci_initialize_port(ahci_ctlp, ahci_portp, &addr) 3366 != AHCI_SUCCESS) { 3367 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3368 "ahci_initialize_controller: failed to " 3369 "initialize port %d", port); 3370 /* 3371 * Set the port state to SATA_PSTATE_FAILED if 3372 * failed to initialize it. 3373 */ 3374 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 3375 } 3376 3377 mutex_exit(&ahci_portp->ahciport_mutex); 3378 } 3379 3380 /* Enable the whole controller interrupts */ 3381 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3382 ahci_enable_all_intrs(ahci_ctlp); 3383 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3384 3385 return (AHCI_SUCCESS); 3386 } 3387 3388 /* 3389 * Reverse of ahci_initialize_controller() 3390 * 3391 * We only need to stop the ports and disable the interrupt. 3392 */ 3393 static void 3394 ahci_uninitialize_controller(ahci_ctl_t *ahci_ctlp) 3395 { 3396 ahci_port_t *ahci_portp; 3397 int port; 3398 3399 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3400 "ahci_uninitialize_controller enter", NULL); 3401 3402 /* disable all the interrupts. */ 3403 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3404 ahci_disable_all_intrs(ahci_ctlp); 3405 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3406 3407 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3408 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3409 continue; 3410 } 3411 3412 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3413 3414 /* Stop the port by clearing PxCMD.ST */ 3415 mutex_enter(&ahci_portp->ahciport_mutex); 3416 3417 /* 3418 * Here we must disable the port interrupt because 3419 * ahci_disable_all_intrs only clear GHC.IE, and IS 3420 * register will be still set if PxIE is enabled. 3421 * When ahci shares one IRQ with other drivers, the 3422 * intr handler may claim the intr mistakenly. 3423 */ 3424 ahci_disable_port_intrs(ahci_ctlp, port); 3425 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3426 ahci_portp, port); 3427 mutex_exit(&ahci_portp->ahciport_mutex); 3428 } 3429 } 3430 3431 /* 3432 * ahci_alloc_pmult() 3433 * 1. Setting HBA port registers which are necessary for a port multiplier. 3434 * (Set PxCMD.PMA while PxCMD.ST is '0') 3435 * 2. Allocate ahci_pmult_info structure. 3436 * 3437 * NOTE: Must stop port before the function is called. 3438 * WARNING!!! ahciport_mutex should be acquired before the function is 3439 * called. 3440 */ 3441 static void 3442 ahci_alloc_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 3443 { 3444 uint32_t port_cmd_status; 3445 uint8_t port = ahci_portp->ahciport_port_num; 3446 3447 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3448 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3449 3450 /* The port must have been stopped before. */ 3451 ASSERT(!(port_cmd_status & AHCI_CMD_STATUS_ST)); 3452 3453 if (!(port_cmd_status & AHCI_CMD_STATUS_PMA)) { 3454 /* set PMA bit */ 3455 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3456 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 3457 port_cmd_status|AHCI_CMD_STATUS_PMA); 3458 3459 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 3460 "ahci_alloc_pmult: " 3461 "PxCMD.PMA bit set at port %d.", port); 3462 } 3463 3464 /* Allocate port multiplier information structure */ 3465 if (ahci_portp->ahciport_pmult_info == NULL) { 3466 ahci_portp->ahciport_pmult_info = (ahci_pmult_info_t *) 3467 kmem_zalloc(sizeof (ahci_pmult_info_t), KM_SLEEP); 3468 } 3469 3470 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 3471 } 3472 3473 /* 3474 * ahci_dealloc_pmult() 3475 * 1. Clearing related registers when a port multiplier is detached. 3476 * (Clear PxCMD.PMA while PxCMD.ST is '0') 3477 * 2. Deallocate ahci_pmult_info structure. 3478 * 3479 * NOTE: Must stop port before the function is called. 3480 * WARNING!!! ahciport_mutex should be acquired before the function is 3481 * called. 3482 */ 3483 static void 3484 ahci_dealloc_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 3485 { 3486 uint32_t port_cmd_status; 3487 uint8_t port = ahci_portp->ahciport_port_num; 3488 3489 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3490 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3491 3492 if (port_cmd_status & AHCI_CMD_STATUS_PMA) { 3493 /* Clear PMA bit */ 3494 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3495 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 3496 (port_cmd_status & (~AHCI_CMD_STATUS_PMA))); 3497 3498 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 3499 "ahci_dealloc_pmult: " 3500 "PxCMD.PMA bit cleared at port %d.", port); 3501 } 3502 3503 /* Release port multiplier information structure */ 3504 if (ahci_portp->ahciport_pmult_info != NULL) { 3505 kmem_free(ahci_portp->ahciport_pmult_info, 3506 sizeof (ahci_pmult_info_t)); 3507 ahci_portp->ahciport_pmult_info = NULL; 3508 } 3509 } 3510 3511 /* 3512 * The routine is to initialize a port. First put the port in NOTRunning 3513 * state, then enable port interrupt and clear Serror register. And under 3514 * AHCI_ATTACH case, find device signature and then try to start the port. 3515 * 3516 * Called by 3517 * 1. ahci_initialize_controller 3518 * 2. ahci_intr_phyrdy_change (hotplug) 3519 * 3520 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3521 */ 3522 static int 3523 ahci_initialize_port(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 3524 ahci_addr_t *addrp) 3525 { 3526 uint32_t port_sstatus, port_task_file, port_cmd_status; 3527 uint8_t port = addrp->aa_port; 3528 boolean_t pm_mode = B_TRUE; /* Power Management mode */ 3529 int ret; 3530 3531 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 3532 3533 /* AHCI_ADDR_PORT: We've no idea of the attached device here. */ 3534 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 3535 3536 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3537 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3538 3539 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3540 "ahci_initialize_port: port %d ", port); 3541 3542 /* 3543 * Check whether the port is in NotRunning state, if not, 3544 * put the port in NotRunning state 3545 */ 3546 if (port_cmd_status & 3547 (AHCI_CMD_STATUS_ST | 3548 AHCI_CMD_STATUS_CR | 3549 AHCI_CMD_STATUS_FRE | 3550 AHCI_CMD_STATUS_FR)) { 3551 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3552 ahci_portp, port); 3553 } 3554 3555 /* Disable interrupt */ 3556 ahci_disable_port_intrs(ahci_ctlp, port); 3557 3558 /* Device is unknown at first */ 3559 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 3560 3561 /* Disable the interface power management */ 3562 ahci_disable_interface_pm(ahci_ctlp, port); 3563 3564 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3565 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 3566 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3567 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 3568 3569 /* Check physcial link status */ 3570 if (SSTATUS_GET_IPM(port_sstatus) == SSTATUS_IPM_NODEV_NOPHYCOM || 3571 SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_NOPHYCOM || 3572 3573 /* Check interface status */ 3574 port_task_file & AHCI_TFD_STS_BSY || 3575 port_task_file & AHCI_TFD_STS_DRQ || 3576 3577 /* Check whether port reset must be executed */ 3578 ahci_ctlp->ahcictl_cap & AHCI_CAP_INIT_PORT_RESET) { 3579 3580 /* Something went wrong, we need do some reset things */ 3581 ret = ahci_port_reset(ahci_ctlp, ahci_portp, addrp); 3582 3583 /* Does port reset succeed on HBA port? */ 3584 if (ret != AHCI_SUCCESS) { 3585 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 3586 "ahci_initialize_port:" 3587 "port reset faild at port %d", port); 3588 return (AHCI_FAILURE); 3589 } 3590 3591 /* Is port failed? */ 3592 if (AHCIPORT_GET_STATE(ahci_portp, addrp) & 3593 SATA_PSTATE_FAILED) { 3594 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 3595 "ahci_initialize_port: port %d state 0x%x", 3596 port, ahci_portp->ahciport_port_state); 3597 return (AHCI_FAILURE); 3598 } 3599 } 3600 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_READY); 3601 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "port %d is ready now.", port); 3602 3603 /* 3604 * At the time being, only probe ports/devices and get the types of 3605 * attached devices during DDI_ATTACH. In fact, the device can be 3606 * changed during power state changes, but at the time being, we 3607 * don't support the situation. 3608 */ 3609 mutex_exit(&ahci_portp->ahciport_mutex); 3610 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3611 if (ahci_ctlp->ahcictl_flags & AHCI_ATTACH) 3612 pm_mode = B_FALSE; 3613 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3614 mutex_enter(&ahci_portp->ahciport_mutex); 3615 3616 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) 3617 pm_mode = B_FALSE; 3618 3619 if (!pm_mode) { 3620 /* 3621 * Try to get the device signature if the port is 3622 * not empty. 3623 */ 3624 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) 3625 ahci_find_dev_signature(ahci_ctlp, ahci_portp, addrp); 3626 } else { 3627 3628 /* 3629 * During the resume, we need to set the PxCLB, PxCLBU, PxFB 3630 * and PxFBU registers in case these registers were cleared 3631 * during the suspend. 3632 */ 3633 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3634 "ahci_initialize_port: port %d " 3635 "reset the port during resume", port); 3636 (void) ahci_port_reset(ahci_ctlp, ahci_portp, addrp); 3637 3638 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3639 "ahci_initialize_port: port %d " 3640 "set PxCLB, PxCLBU, PxFB and PxFBU " 3641 "during resume", port); 3642 3643 /* Config Port Received FIS Base Address */ 3644 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 3645 (uint64_t *)AHCI_PORT_PxFB(ahci_ctlp, port), 3646 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_laddress); 3647 3648 /* Config Port Command List Base Address */ 3649 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 3650 (uint64_t *)AHCI_PORT_PxCLB(ahci_ctlp, port), 3651 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_laddress); 3652 } 3653 3654 /* Return directly if no device connected */ 3655 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 3656 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3657 "No device connected to port %d", port); 3658 goto out; 3659 } 3660 3661 /* If this is a port multiplier, we need do some initialization */ 3662 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 3663 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 3664 "Port multiplier found at port %d", port); 3665 ahci_alloc_pmult(ahci_ctlp, ahci_portp); 3666 } 3667 3668 /* Try to start the port */ 3669 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 3670 != AHCI_SUCCESS) { 3671 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3672 "failed to start port %d", port); 3673 return (AHCI_FAILURE); 3674 } 3675 out: 3676 /* Enable port interrupts */ 3677 ahci_enable_port_intrs(ahci_ctlp, port); 3678 3679 return (AHCI_SUCCESS); 3680 } 3681 3682 /* 3683 * Handle hardware defect, and check the capabilities. For example, 3684 * power management capabilty and MSI capability. 3685 */ 3686 static int 3687 ahci_config_space_init(ahci_ctl_t *ahci_ctlp) 3688 { 3689 ushort_t caps_ptr, cap_count, cap; 3690 #if AHCI_DEBUG 3691 ushort_t pmcap, pmcsr; 3692 ushort_t msimc; 3693 #endif 3694 uint8_t revision; 3695 3696 ahci_ctlp->ahcictl_venid = 3697 pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 3698 PCI_CONF_VENID); 3699 3700 ahci_ctlp->ahcictl_devid = 3701 pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 3702 PCI_CONF_DEVID); 3703 3704 /* 3705 * Modify dma_attr_align of ahcictl_buffer_dma_attr. For VT8251, those 3706 * controllers with 0x00 revision id work on 4-byte aligned buffer, 3707 * which is a bug and was fixed after 0x00 revision id controllers. 3708 * 3709 * Moreover, VT8251 cannot use multiple command slots in the command 3710 * list for non-queued commands because the previous register content 3711 * of PxCI can be re-written in the register write, so a flag will be 3712 * set to record this defect - AHCI_CAP_NO_MCMDLIST_NONQUEUE. 3713 */ 3714 if (ahci_ctlp->ahcictl_venid == VIA_VENID) { 3715 revision = pci_config_get8(ahci_ctlp->ahcictl_pci_conf_handle, 3716 PCI_CONF_REVID); 3717 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3718 "revision id = 0x%x", revision); 3719 if (revision == 0x00) { 3720 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_align = 0x4; 3721 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3722 "change ddi_attr_align to 0x4", NULL); 3723 } 3724 3725 ahci_ctlp->ahcictl_cap = AHCI_CAP_NO_MCMDLIST_NONQUEUE; 3726 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3727 "VT8251 cannot use multiple command lists for " 3728 "non-queued commands", NULL); 3729 } 3730 3731 /* 3732 * AMD/ATI SB600 (0x1002,0x4380) AHCI chipset doesn't support 64-bit 3733 * DMA addressing for communication memory descriptors though S64A bit 3734 * of CAP register declares it supports. Even though 64-bit DMA for 3735 * data buffer works on ASUS M2A-VM with newer BIOS, three other 3736 * motherboards are known not, so both AHCI_CAP_BUF_32BIT_DMA and 3737 * AHCI_CAP_COMMU_32BIT_DMA are set for this controller. 3738 * 3739 * Due to certain hardware issue, the chipset must do port reset during 3740 * initialization, otherwise, when retrieving device signature, 3741 * software reset will get time out. So AHCI_CAP_INIT_PORT_RESET flag 3742 * need to set. 3743 * 3744 * For this chipset software reset will get failure if the pmport of 3745 * Register FIS was set with SATA_PMULT_HOSTPORT (0xf) and no port 3746 * multiplier is connected to the port. In order to fix the issue, 3747 * AHCI_CAP_SRST_NO_HOSTPORT flag need to be set, and once software 3748 * reset got failure, the driver will try to do another software reset 3749 * with pmport 0. 3750 */ 3751 if (ahci_ctlp->ahcictl_venid == 0x1002 && 3752 ahci_ctlp->ahcictl_devid == 0x4380) { 3753 ahci_ctlp->ahcictl_cap |= AHCI_CAP_BUF_32BIT_DMA; 3754 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 3755 ahci_ctlp->ahcictl_cap |= AHCI_CAP_INIT_PORT_RESET; 3756 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT; 3757 3758 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3759 "ATI SB600 cannot do 64-bit DMA for both data buffer and " 3760 "communication memory descriptors though CAP indicates " 3761 "support, so force it to use 32-bit DMA", NULL); 3762 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3763 "ATI SB600 need to do a port reset during initialization", 3764 NULL); 3765 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3766 "ATI SB600 will get software reset failure if pmport " 3767 "is set 0xf and no port multiplier is attached", NULL); 3768 } 3769 3770 /* 3771 * AMD/ATI SB700/710/750/800 and SP5100 AHCI chipset share the same 3772 * vendor ID and device ID (0x1002,0x4391). 3773 * 3774 * SB700/750 AHCI chipset on some boards doesn't support 64-bit 3775 * DMA addressing for communication memory descriptors though S64A bit 3776 * of CAP register declares the support. However, it does support 3777 * 64-bit DMA for data buffer. So only AHCI_CAP_COMMU_32BIT_DMA is 3778 * set for this controller. 3779 * 3780 * SB710 has the same initialization issue as SB600, so it also need 3781 * a port reset. That is AHCI_CAP_INIT_PORT_RESET need to set for it. 3782 * 3783 * SB700 also has the same issue about software reset, and thus 3784 * AHCI_CAP_SRST_NO_HOSTPORT flag also is needed. 3785 */ 3786 if (ahci_ctlp->ahcictl_venid == 0x1002 && 3787 ahci_ctlp->ahcictl_devid == 0x4391) { 3788 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 3789 ahci_ctlp->ahcictl_cap |= AHCI_CAP_INIT_PORT_RESET; 3790 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT; 3791 3792 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3793 "ATI SB700/750 cannot do 64-bit DMA for communication " 3794 "memory descriptors though CAP indicates support, " 3795 "so force it to use 32-bit DMA", NULL); 3796 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3797 "ATI SB710 need to do a port reset during initialization", 3798 NULL); 3799 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3800 "ATI SB700 will get software reset failure if pmport " 3801 "is set 0xf and no port multiplier is attached", NULL); 3802 } 3803 3804 /* 3805 * Check if capabilities list is supported and if so, 3806 * get initial capabilities pointer and clear bits 0,1. 3807 */ 3808 if (pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 3809 PCI_CONF_STAT) & PCI_STAT_CAP) { 3810 caps_ptr = P2ALIGN(pci_config_get8( 3811 ahci_ctlp->ahcictl_pci_conf_handle, 3812 PCI_CONF_CAP_PTR), 4); 3813 } else { 3814 caps_ptr = PCI_CAP_NEXT_PTR_NULL; 3815 } 3816 3817 /* 3818 * Walk capabilities if supported. 3819 */ 3820 for (cap_count = 0; caps_ptr != PCI_CAP_NEXT_PTR_NULL; ) { 3821 3822 /* 3823 * Check that we haven't exceeded the maximum number of 3824 * capabilities and that the pointer is in a valid range. 3825 */ 3826 if (++cap_count > PCI_CAP_MAX_PTR) { 3827 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3828 "too many device capabilities", NULL); 3829 return (AHCI_FAILURE); 3830 } 3831 if (caps_ptr < PCI_CAP_PTR_OFF) { 3832 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3833 "capabilities pointer 0x%x out of range", 3834 caps_ptr); 3835 return (AHCI_FAILURE); 3836 } 3837 3838 /* 3839 * Get next capability and check that it is valid. 3840 * For now, we only support power management. 3841 */ 3842 cap = pci_config_get8(ahci_ctlp->ahcictl_pci_conf_handle, 3843 caps_ptr); 3844 switch (cap) { 3845 case PCI_CAP_ID_PM: 3846 3847 /* power management supported */ 3848 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PM; 3849 3850 /* Save PMCSR offset */ 3851 ahci_ctlp->ahcictl_pmcsr_offset = caps_ptr + PCI_PMCSR; 3852 3853 #if AHCI_DEBUG 3854 pmcap = pci_config_get16( 3855 ahci_ctlp->ahcictl_pci_conf_handle, 3856 caps_ptr + PCI_PMCAP); 3857 pmcsr = pci_config_get16( 3858 ahci_ctlp->ahcictl_pci_conf_handle, 3859 ahci_ctlp->ahcictl_pmcsr_offset); 3860 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3861 "Power Management capability found PCI_PMCAP " 3862 "= 0x%x PCI_PMCSR = 0x%x", pmcap, pmcsr); 3863 if ((pmcap & 0x3) == 0x3) 3864 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3865 "PCI Power Management Interface " 3866 "spec 1.2 compliant", NULL); 3867 #endif 3868 break; 3869 3870 case PCI_CAP_ID_MSI: 3871 #if AHCI_DEBUG 3872 msimc = pci_config_get16( 3873 ahci_ctlp->ahcictl_pci_conf_handle, 3874 caps_ptr + PCI_MSI_CTRL); 3875 AHCIDBG(AHCIDBG_MSI, ahci_ctlp, 3876 "Message Signaled Interrupt capability found " 3877 "MSICAP_MC.MMC = 0x%x", (msimc & 0xe) >> 1); 3878 #endif 3879 AHCIDBG(AHCIDBG_MSI, ahci_ctlp, 3880 "MSI capability found", NULL); 3881 break; 3882 3883 case PCI_CAP_ID_PCIX: 3884 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3885 "PCI-X capability found", NULL); 3886 break; 3887 3888 case PCI_CAP_ID_PCI_E: 3889 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3890 "PCI Express capability found", NULL); 3891 break; 3892 3893 case PCI_CAP_ID_MSI_X: 3894 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3895 "MSI-X capability found", NULL); 3896 break; 3897 3898 case PCI_CAP_ID_SATA: 3899 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3900 "SATA capability found", NULL); 3901 break; 3902 3903 case PCI_CAP_ID_VS: 3904 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3905 "Vendor Specific capability found", NULL); 3906 break; 3907 3908 default: 3909 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3910 "unrecognized capability 0x%x", cap); 3911 break; 3912 } 3913 3914 /* 3915 * Get next capabilities pointer and clear bits 0,1. 3916 */ 3917 caps_ptr = P2ALIGN(pci_config_get8( 3918 ahci_ctlp->ahcictl_pci_conf_handle, 3919 (caps_ptr + PCI_CAP_NEXT_PTR)), 4); 3920 } 3921 3922 return (AHCI_SUCCESS); 3923 } 3924 3925 /* 3926 * Read/Write a register at port multiplier by SATA READ PORTMULT / SATA WRITE 3927 * PORTMULT command. SYNC & POLLING mode is used. 3928 * 3929 * WARNING!!! ahciport_mutex should be acquired before the function 3930 * is called. 3931 */ 3932 static int 3933 ahci_rdwr_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 3934 uint8_t regn, uint32_t *pregv, uint8_t type) 3935 { 3936 ahci_port_t *ahci_portp; 3937 ahci_addr_t pmult_addr; 3938 sata_pkt_t *spkt; 3939 sata_cmd_t *scmd; 3940 sata_device_t sata_device; 3941 uint8_t port = addrp->aa_port; 3942 uint8_t pmport = addrp->aa_pmport; 3943 uint8_t cport; 3944 uint32_t intr_mask; 3945 int rval; 3946 char portstr[10]; 3947 3948 SET_PORTSTR(portstr, addrp); 3949 cport = ahci_ctlp->ahcictl_port_to_cport[port]; 3950 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3951 3952 ASSERT(AHCI_ADDR_IS_PMPORT(addrp) || AHCI_ADDR_IS_PMULT(addrp)); 3953 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 3954 3955 /* Check the existence of the port multiplier */ 3956 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) 3957 return (AHCI_FAILURE); 3958 3959 /* Request a READ/WRITE PORTMULT sata packet. */ 3960 bzero(&sata_device, sizeof (sata_device_t)); 3961 sata_device.satadev_addr.cport = cport; 3962 sata_device.satadev_addr.pmport = pmport; 3963 sata_device.satadev_addr.qual = SATA_ADDR_PMULT; 3964 sata_device.satadev_rev = SATA_DEVICE_REV; 3965 3966 /* 3967 * Make sure no command is outstanding here. All R/W PMULT requests 3968 * come from 3969 * 3970 * 1. ahci_attach() 3971 * The port should be empty. 3972 * 3973 * 2. ahci_tran_probe_port() 3974 * Any request from SATA framework (via ahci_tran_start) should be 3975 * rejected if R/W PMULT command is outstanding. 3976 * 3977 * If we are doing mopping, do not check those flags because no 3978 * command will be actually outstanding. 3979 * 3980 * If the port has been occupied by any other commands, the probe 3981 * function will return a SATA_RETRY. SATA framework will retry 3982 * later. 3983 */ 3984 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 3985 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 3986 "R/W PMULT failed: R/W PMULT in progress at port %d.", 3987 port, ahci_portp->ahciport_flags); 3988 return (AHCI_FAILURE); 3989 } 3990 3991 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) && ( 3992 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 3993 NCQ_CMD_IN_PROGRESS(ahci_portp) || 3994 NON_NCQ_CMD_IN_PROGRESS(ahci_portp))) { 3995 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 3996 "R/W PMULT failed: port %d is occupied (flags 0x%x).", 3997 port, ahci_portp->ahciport_flags); 3998 return (AHCI_FAILURE); 3999 } 4000 4001 /* 4002 * The port multiplier is gone. This may happen when 4003 * 1. Cutting off the power of an enclosure. The device lose the power 4004 * before port multiplier. 4005 * 2. Disconnecting the port multiplier during hot-plugging a sub-drive. 4006 * 4007 * The issued command should be aborted and the following command 4008 * should not be continued. 4009 */ 4010 if (!(ahci_portp->ahciport_port_state & SATA_STATE_READY)) { 4011 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4012 "READ/WRITE PMULT failed: " 4013 "port-mult is removed from port %d", port); 4014 return (AHCI_FAILURE); 4015 } 4016 4017 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RDWR_PMULT; 4018 4019 spkt = sata_get_rdwr_pmult_pkt(ahci_ctlp->ahcictl_dip, 4020 &sata_device, regn, *pregv, type); 4021 4022 /* 4023 * READ/WRITE PORTMULT command is intended to sent to the control port 4024 * of the port multiplier. 4025 */ 4026 AHCI_ADDR_SET_PMULT(&pmult_addr, addrp->aa_port); 4027 4028 ahci_portp->ahciport_rdwr_pmult_pkt = spkt; 4029 4030 /* No interrupt here. Store the interrupt enable mask. */ 4031 intr_mask = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4032 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port)); 4033 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4034 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 0); 4035 4036 rval = ahci_do_sync_start(ahci_ctlp, ahci_portp, &pmult_addr, spkt); 4037 4038 if (rval == AHCI_SUCCESS && 4039 spkt->satapkt_reason == SATA_PKT_COMPLETED) { 4040 if (type == SATA_RDWR_PMULT_PKT_TYPE_READ) { 4041 scmd = &spkt->satapkt_cmd; 4042 *pregv = scmd->satacmd_lba_high_lsb << 24 | 4043 scmd->satacmd_lba_mid_lsb << 16 | 4044 scmd->satacmd_lba_low_lsb << 8 | 4045 scmd->satacmd_sec_count_lsb; 4046 } 4047 } else { 4048 /* Failed or not completed. */ 4049 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4050 "ahci_rdwr_pmult: cannot [%s] %s[%d] at port %s", 4051 type == SATA_RDWR_PMULT_PKT_TYPE_READ?"Read":"Write", 4052 AHCI_ADDR_IS_PMULT(addrp)?"gscr":"pscr", regn, portstr); 4053 rval = AHCI_FAILURE; 4054 } 4055 out: 4056 /* Restore the interrupt mask */ 4057 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4058 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), intr_mask); 4059 4060 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_RDWR_PMULT; 4061 ahci_portp->ahciport_rdwr_pmult_pkt = NULL; 4062 sata_free_rdwr_pmult_pkt(spkt); 4063 return (rval); 4064 } 4065 4066 static int 4067 ahci_read_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4068 uint8_t regn, uint32_t *pregv) 4069 { 4070 return ahci_rdwr_pmult(ahci_ctlp, addrp, regn, pregv, 4071 SATA_RDWR_PMULT_PKT_TYPE_READ); 4072 } 4073 4074 static int 4075 ahci_write_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4076 uint8_t regn, uint32_t regv) 4077 { 4078 return ahci_rdwr_pmult(ahci_ctlp, addrp, regn, ®v, 4079 SATA_RDWR_PMULT_PKT_TYPE_WRITE); 4080 } 4081 4082 #define READ_PMULT(addrp, r, pv, out) \ 4083 if (ahci_read_pmult(ahci_ctlp, addrp, r, pv) != AHCI_SUCCESS) \ 4084 goto out; 4085 4086 #define WRITE_PMULT(addrp, r, v, out) \ 4087 if (ahci_write_pmult(ahci_ctlp, addrp, r, v) != AHCI_SUCCESS) \ 4088 goto out; 4089 4090 /* 4091 * Update sata registers on port multiplier, including GSCR/PSCR registers. 4092 * ahci_update_pmult_gscr() 4093 * ahci_update_pmult_pscr() 4094 * 4095 * WARNING!!! ahciport_mutex should be acquired before those functions 4096 * get called. 4097 */ 4098 static int 4099 ahci_update_pmult_gscr(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4100 sata_pmult_gscr_t *sg) 4101 { 4102 READ_PMULT(addrp, SATA_PMULT_GSCR0, &sg->gscr0, err); 4103 READ_PMULT(addrp, SATA_PMULT_GSCR1, &sg->gscr1, err); 4104 READ_PMULT(addrp, SATA_PMULT_GSCR2, &sg->gscr2, err); 4105 READ_PMULT(addrp, SATA_PMULT_GSCR64, &sg->gscr64, err); 4106 4107 return (AHCI_SUCCESS); 4108 4109 err: /* R/W PMULT error */ 4110 return (AHCI_FAILURE); 4111 } 4112 4113 static int 4114 ahci_update_pmult_pscr(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4115 sata_device_t *sd) 4116 { 4117 ASSERT(AHCI_ADDR_IS_PMPORT(addrp)); 4118 4119 READ_PMULT(addrp, SATA_PMULT_REG_SSTS, &sd->satadev_scr.sstatus, err); 4120 READ_PMULT(addrp, SATA_PMULT_REG_SERR, &sd->satadev_scr.serror, err); 4121 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &sd->satadev_scr.scontrol, err); 4122 READ_PMULT(addrp, SATA_PMULT_REG_SACT, &sd->satadev_scr.sactive, err); 4123 4124 return (AHCI_SUCCESS); 4125 4126 err: /* R/W PMULT error */ 4127 return (AHCI_FAILURE); 4128 } 4129 4130 /* 4131 * ahci_initialize_pmult() 4132 * 4133 * Initialize a port multiplier, including 4134 * 1. Enable FEATURES register at port multiplier. (SATA Chp.16) 4135 * 2. Redefine MASK register. (SATA Chap 16.?) 4136 * 4137 * WARNING!!! ahciport_mutex should be acquired before the function 4138 * is called. 4139 */ 4140 static int 4141 ahci_initialize_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4142 ahci_addr_t *addrp, sata_device_t *sd) 4143 { 4144 sata_pmult_gscr_t sg; 4145 uint32_t gscr64; 4146 uint8_t port = addrp->aa_port; 4147 4148 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 4149 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4150 "[Initialize] Port-multiplier at port %d.", port); 4151 4152 /* 4153 * Enable features of port multiplier. Currently only 4154 * Asynchronous Notification is enabled. 4155 */ 4156 /* Check gscr64 for supported features. */ 4157 READ_PMULT(addrp, SATA_PMULT_GSCR64, &gscr64, err); 4158 4159 if (gscr64 & SATA_PMULT_CAP_SNOTIF) { 4160 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4161 "port %d: Port Multiplier supports " 4162 "Asynchronous Notification.", port); 4163 4164 /* Write to gscr96 to enabled features */ 4165 WRITE_PMULT(addrp, SATA_PMULT_GSCR96, 4166 SATA_PMULT_CAP_SNOTIF, err); 4167 4168 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4169 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 4170 AHCI_SNOTIF_CLEAR_ALL); 4171 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4172 "port %d: PMult PxSNTF cleared.", port); 4173 4174 } 4175 4176 /* 4177 * Now we need to update gscr33 register to enable hot-plug interrupt 4178 * for sub devices behind port multiplier. 4179 */ 4180 WRITE_PMULT(addrp, SATA_PMULT_GSCR33, (0x1ffff), err); 4181 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4182 "port %d: gscr33 mask set to %x.", port, (0x1ffff)); 4183 4184 /* 4185 * Fetch the number of device ports of the port multiplier 4186 */ 4187 if (ahci_update_pmult_gscr(ahci_ctlp, addrp, &sg) != AHCI_SUCCESS) 4188 return (AHCI_FAILURE); 4189 4190 /* Register the port multiplier to SATA Framework. */ 4191 mutex_exit(&ahci_portp->ahciport_mutex); 4192 sata_register_pmult(ahci_ctlp->ahcictl_dip, sd, &sg); 4193 mutex_enter(&ahci_portp->ahciport_mutex); 4194 4195 ahci_portp->ahciport_pmult_info->ahcipmi_num_dev_ports = 4196 sd->satadev_add_info & SATA_PMULT_PORTNUM_MASK; 4197 4198 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4199 "port %d: pmult sub-port number updated to %x.", port, 4200 ahci_portp->ahciport_pmult_info->ahcipmi_num_dev_ports); 4201 4202 /* Till now port-mult is successfully initialized */ 4203 ahci_portp->ahciport_port_state |= SATA_DSTATE_PMULT_INIT; 4204 return (AHCI_SUCCESS); 4205 4206 err: /* R/W PMULT error */ 4207 return (AHCI_FAILURE); 4208 } 4209 4210 /* 4211 * Initialize a port multiplier port. According to spec, firstly we need 4212 * issue a COMRESET, then a software reset to get its signature. 4213 * 4214 * NOTE: This function should only be called in ahci_probe_pmport() 4215 * WARNING!!! ahciport_mutex should be acquired before the function. 4216 */ 4217 static int 4218 ahci_initialize_pmport(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4219 ahci_addr_t *addrp) 4220 { 4221 uint32_t finished_tags = 0, reset_tags = 0, slot_status = 0; 4222 uint8_t port = addrp->aa_port; 4223 uint8_t pmport = addrp->aa_pmport; 4224 int ret = AHCI_FAILURE; 4225 4226 ASSERT(AHCI_ADDR_IS_PMPORT(addrp)); 4227 4228 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 4229 "ahci_initialize_pmport: port %d:%d", port, pmport); 4230 4231 /* Check HBA port state */ 4232 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED) { 4233 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 4234 "ahci_initialize_pmport:" 4235 "port %d:%d Port Multiplier is failed.", 4236 port, pmport); 4237 return (AHCI_FAILURE); 4238 } 4239 4240 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) { 4241 return (AHCI_FAILURE); 4242 } 4243 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_HOTPLUG; 4244 4245 /* Checking for outstanding commands */ 4246 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 4247 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4248 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 4249 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 4250 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 4251 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4252 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 4253 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 4254 } 4255 4256 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 4257 ahci_portp->ahciport_mop_in_progress++; 4258 4259 /* Clear status */ 4260 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_UNKNOWN); 4261 4262 /* Firstly assume an unknown device */ 4263 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 4264 4265 ahci_disable_port_intrs(ahci_ctlp, port); 4266 4267 /* port reset is necessary for port multiplier port */ 4268 if (ahci_pmport_reset(ahci_ctlp, ahci_portp, addrp) != AHCI_SUCCESS) { 4269 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 4270 "ahci_initialize_pmport:" 4271 "port reset failed at port %d:%d", 4272 port, pmport); 4273 goto out; 4274 } 4275 4276 /* Is port failed? */ 4277 if (AHCIPORT_GET_STATE(ahci_portp, addrp) & 4278 SATA_PSTATE_FAILED) { 4279 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4280 "ahci_initialize_pmport: port %d:%d failed. " 4281 "state = 0x%x", port, pmport, 4282 ahci_portp->ahciport_port_state); 4283 goto out; 4284 } 4285 4286 /* Is there any device attached? */ 4287 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, addrp) 4288 == SATA_DTYPE_NONE) { 4289 /* Do not waste time on an empty port */ 4290 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 4291 "ahci_initialize_pmport: No device is found " 4292 "at port %d:%d", port, pmport); 4293 ret = AHCI_SUCCESS; 4294 goto out; 4295 } 4296 4297 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_READY); 4298 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4299 "port %d:%d is ready now.", port, pmport); 4300 4301 /* 4302 * Till now we can assure a device attached to that HBA port and work 4303 * correctly. Now try to get the device signature. This is an optional 4304 * step. If failed, unknown device is assumed, then SATA module will 4305 * continue to use IDENTIFY DEVICE to get the information of the 4306 * device. 4307 */ 4308 ahci_find_dev_signature(ahci_ctlp, ahci_portp, addrp); 4309 4310 ret = AHCI_SUCCESS; 4311 4312 out: 4313 /* Next try to mop the pending commands */ 4314 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 4315 finished_tags = ahci_portp->ahciport_pending_tags & 4316 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 4317 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 4318 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 4319 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 4320 reset_tags &= ~finished_tags; 4321 4322 ahci_mop_commands(ahci_ctlp, 4323 ahci_portp, 4324 slot_status, 4325 0, /* failed tags */ 4326 0, /* timeout tags */ 4327 0, /* aborted tags */ 4328 reset_tags); /* reset tags */ 4329 4330 /* Clear PxSNTF register if supported. */ 4331 if (ahci_ctlp->ahcictl_cap & AHCI_CAP_SNTF) { 4332 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4333 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 4334 AHCI_SNOTIF_CLEAR_ALL); 4335 } 4336 4337 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_HOTPLUG; 4338 ahci_enable_port_intrs(ahci_ctlp, port); 4339 return (ret); 4340 } 4341 4342 /* 4343 * ahci_probe_pmult() 4344 * 4345 * This function will be called to probe a port multiplier, which will 4346 * handle hotplug events on port multiplier ports. 4347 * 4348 * NOTE: Only called from ahci_tran_probe_port() 4349 * WARNING!!! ahciport_mutex should be acquired before the function is called. 4350 */ 4351 static int 4352 ahci_probe_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4353 ahci_addr_t *addrp) 4354 { 4355 sata_device_t sdevice; 4356 ahci_addr_t pmport_addr; 4357 uint32_t gscr32, port_hotplug_tags; 4358 uint32_t pmport_sstatus; 4359 int dev_exists_now = 0, dev_existed_previously = 0; 4360 uint8_t port = addrp->aa_port; 4361 int npmport; 4362 4363 /* The bits in GSCR32 refers to the pmport that has a hot-plug event. */ 4364 READ_PMULT(addrp, SATA_PMULT_GSCR32, &gscr32, err); 4365 port_hotplug_tags = gscr32 & AHCI_PMPORT_MASK(ahci_portp); 4366 4367 do { 4368 npmport = ddi_ffs(port_hotplug_tags) - 1; 4369 if (npmport == -1) 4370 /* no pending hot plug events. */ 4371 return (AHCI_SUCCESS); 4372 4373 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4374 "hot-plug event at port %d:%d", port, npmport); 4375 4376 AHCI_ADDR_SET_PMPORT(&pmport_addr, port, (uint8_t)npmport); 4377 4378 /* Check previous device at that port */ 4379 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &pmport_addr) 4380 != SATA_DTYPE_NONE) 4381 dev_existed_previously = 1; 4382 4383 /* PxSStatus tells the presence of device. */ 4384 READ_PMULT(&pmport_addr, SATA_PMULT_REG_SSTS, 4385 &pmport_sstatus, err); 4386 4387 if (SSTATUS_GET_DET(pmport_sstatus) == 4388 SSTATUS_DET_DEVPRE_PHYCOM) 4389 dev_exists_now = 1; 4390 4391 /* 4392 * Clear PxSERR is critical. The transition from 0 to 1 will 4393 * emit a FIS which generates an asynchronous notification 4394 * event at controller. If we fail to clear the PxSERR, the 4395 * Async Notif events will no longer be activated on this 4396 * pmport. 4397 */ 4398 WRITE_PMULT(&pmport_addr, SATA_PMULT_REG_SERR, 4399 AHCI_SERROR_CLEAR_ALL, err); 4400 4401 bzero((void *)&sdevice, sizeof (sata_device_t)); 4402 sdevice.satadev_addr.cport = ahci_ctlp-> 4403 ahcictl_port_to_cport[port]; 4404 sdevice.satadev_addr.qual = SATA_ADDR_PMPORT; 4405 sdevice.satadev_addr.pmport = (uint8_t)npmport; 4406 sdevice.satadev_state = SATA_PSTATE_PWRON; 4407 4408 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4409 "[Existence] %d -> %d", dev_existed_previously, 4410 dev_exists_now); 4411 4412 if (dev_exists_now) { 4413 if (dev_existed_previously) { 4414 /* Link (may) not change: Exist -> Exist * */ 4415 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 4416 "ahci_probe_pmult: port %d:%d " 4417 "device link lost/established", 4418 port, npmport); 4419 4420 mutex_exit(&ahci_portp->ahciport_mutex); 4421 sata_hba_event_notify( 4422 ahci_ctlp->ahcictl_sata_hba_tran-> 4423 sata_tran_hba_dip, 4424 &sdevice, 4425 SATA_EVNT_LINK_LOST| 4426 SATA_EVNT_LINK_ESTABLISHED); 4427 mutex_enter(&ahci_portp->ahciport_mutex); 4428 } else { 4429 /* Link change: None -> Exist */ 4430 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4431 "ahci_probe_pmult: port %d:%d " 4432 "device link established", port, npmport); 4433 4434 /* Clear port state */ 4435 AHCIPORT_SET_STATE(ahci_portp, &pmport_addr, 4436 SATA_STATE_UNKNOWN); 4437 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4438 "ahci_probe_pmult: port %d " 4439 "ahciport_port_state [Cleared].", port); 4440 4441 mutex_exit(&ahci_portp->ahciport_mutex); 4442 sata_hba_event_notify( 4443 ahci_ctlp->ahcictl_sata_hba_tran-> 4444 sata_tran_hba_dip, 4445 &sdevice, 4446 SATA_EVNT_LINK_ESTABLISHED); 4447 mutex_enter(&ahci_portp->ahciport_mutex); 4448 } 4449 } else { /* No device exists now */ 4450 if (dev_existed_previously) { 4451 4452 /* Link change: Exist -> None */ 4453 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4454 "ahci_probe_pmult: port %d:%d " 4455 "device link lost", port, npmport); 4456 4457 /* An existing device is lost. */ 4458 AHCIPORT_SET_STATE(ahci_portp, &pmport_addr, 4459 SATA_STATE_UNKNOWN); 4460 AHCIPORT_SET_DEV_TYPE(ahci_portp, &pmport_addr, 4461 SATA_DTYPE_NONE); 4462 4463 mutex_exit(&ahci_portp->ahciport_mutex); 4464 sata_hba_event_notify( 4465 ahci_ctlp->ahcictl_sata_hba_tran-> 4466 sata_tran_hba_dip, 4467 &sdevice, 4468 SATA_EVNT_LINK_LOST); 4469 mutex_enter(&ahci_portp->ahciport_mutex); 4470 } 4471 } 4472 4473 CLEAR_BIT(port_hotplug_tags, npmport); 4474 } while (port_hotplug_tags != 0); 4475 4476 return (AHCI_SUCCESS); 4477 4478 err: /* R/W PMULT error */ 4479 return (AHCI_FAILURE); 4480 } 4481 4482 /* 4483 * Probe and initialize a port multiplier port. 4484 * A port multiplier port could only be initilaizer here. 4485 * 4486 * WARNING!!! ahcictl_mutex should be acquired before the function 4487 * is called. 4488 */ 4489 static int 4490 ahci_probe_pmport(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4491 ahci_addr_t *addrp, sata_device_t *sd) 4492 { 4493 uint32_t port_state; 4494 uint8_t port = addrp->aa_port; 4495 ahci_addr_t addr_pmult; 4496 4497 /* 4498 * Check the parent - port multiplier first. 4499 */ 4500 4501 /* 4502 * Parent port multiplier might have been removed. This event will be 4503 * ignored and failure. 4504 */ 4505 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE || 4506 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 4507 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4508 "ahci_tran_probe_port: " 4509 "parent device removed, ignore event.", NULL); 4510 4511 return (AHCI_FAILURE); 4512 } 4513 4514 /* The port is ready? */ 4515 port_state = ahci_portp->ahciport_port_state; 4516 if (!(port_state & SATA_STATE_READY)) { 4517 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4518 "ahci_tran_probe_port: " 4519 "parent port-mult is NOT ready.", NULL); 4520 4521 if (ahci_restart_port_wait_till_ready(ahci_ctlp, 4522 ahci_portp, port, AHCI_PORT_RESET, NULL) != 4523 AHCI_SUCCESS) { 4524 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4525 "ahci_tran_probe_port: " 4526 "restart port-mult failed.", NULL); 4527 return (AHCI_FAILURE); 4528 } 4529 } 4530 4531 /* 4532 * If port-mult is restarted due to some reason, we need 4533 * re-initialized the PMult. 4534 */ 4535 if (!(port_state & SATA_DSTATE_PMULT_INIT)) { 4536 /* Initialize registers on a port multiplier */ 4537 AHCI_ADDR_SET_PMULT(&addr_pmult, addrp->aa_port); 4538 if (ahci_initialize_pmult(ahci_ctlp, ahci_portp, 4539 &addr_pmult, sd) != AHCI_SUCCESS) 4540 return (AHCI_FAILURE); 4541 } 4542 4543 /* 4544 * Then we check the port-mult port 4545 */ 4546 /* Is this pmport initialized? */ 4547 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 4548 if (!(port_state & SATA_STATE_READY)) { 4549 4550 /* ahci_initialize_pmport() will set READY state */ 4551 if (ahci_initialize_pmport(ahci_ctlp, 4552 ahci_portp, addrp) != AHCI_SUCCESS) 4553 return (AHCI_FAILURE); 4554 } 4555 4556 return (AHCI_SUCCESS); 4557 } 4558 4559 /* 4560 * AHCI device reset ...; a single device on one of the ports is reset, 4561 * but the HBA and physical communication remain intact. This is the 4562 * least intrusive. 4563 * 4564 * When issuing a software reset sequence, there should not be other 4565 * commands in the command list, so we will first clear and then re-set 4566 * PxCMD.ST to clear PxCI. And before issuing the software reset, 4567 * the port must be idle and PxTFD.STS.BSY and PxTFD.STS.DRQ must be 4568 * cleared unless command list override (PxCMD.CLO) is supported. 4569 * 4570 * WARNING!!! ahciport_mutex should be acquired and PxCMD.FRE should be 4571 * set before the function is called. 4572 */ 4573 static int 4574 ahci_software_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4575 ahci_addr_t *addrp) 4576 { 4577 ahci_fis_h2d_register_t *h2d_register_fisp; 4578 ahci_cmd_table_t *cmd_table; 4579 ahci_cmd_header_t *cmd_header; 4580 uint32_t port_cmd_status, port_cmd_issue, port_task_file; 4581 int slot, loop_count; 4582 uint8_t port = addrp->aa_port; 4583 uint8_t pmport = addrp->aa_pmport; 4584 int rval = AHCI_FAILURE; 4585 4586 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 4587 "port %d:%d device software resetting (FIS)", port, pmport); 4588 4589 /* First clear PxCMD.ST (AHCI v1.2 10.4.1) */ 4590 if (ahci_put_port_into_notrunning_state(ahci_ctlp, ahci_portp, 4591 port) != AHCI_SUCCESS) { 4592 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4593 "ahci_software_reset: cannot stop HBA port %d.", port); 4594 goto out; 4595 } 4596 4597 /* Check PxTFD.STS.BSY and PxTFD.STS.DRQ */ 4598 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4599 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 4600 4601 if (port_task_file & AHCI_TFD_STS_BSY || 4602 port_task_file & AHCI_TFD_STS_DRQ) { 4603 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_SCLO)) { 4604 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4605 "PxTFD.STS.BSY/DRQ is set (PxTFD=0x%x), " 4606 "cannot issue a software reset.", port_task_file); 4607 goto out; 4608 } 4609 4610 /* 4611 * If HBA Support CLO, as Command List Override (CAP.SCLO is 4612 * set), PxCMD.CLO bit should be set before set PxCMD.ST, in 4613 * order to clear PxTFD.STS.BSY and PxTFD.STS.DRQ. 4614 */ 4615 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4616 "PxTFD.STS.BSY/DRQ is set, try SCLO.", NULL) 4617 4618 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4619 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4620 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4621 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4622 port_cmd_status|AHCI_CMD_STATUS_CLO); 4623 4624 /* Waiting till PxCMD.SCLO bit is cleared */ 4625 loop_count = 0; 4626 do { 4627 /* Wait for 10 millisec */ 4628 drv_usecwait(AHCI_10MS_USECS); 4629 4630 /* We are effectively timing out after 1 sec. */ 4631 if (loop_count++ > 100) { 4632 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4633 "SCLO time out. port %d is busy.", port); 4634 goto out; 4635 } 4636 4637 port_cmd_status = 4638 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4639 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4640 } while (port_cmd_status & AHCI_CMD_STATUS_CLO); 4641 4642 /* Re-check */ 4643 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4644 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 4645 if (port_task_file & AHCI_TFD_STS_BSY || 4646 port_task_file & AHCI_TFD_STS_DRQ) { 4647 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4648 "SCLO cannot clear PxTFD.STS.BSY/DRQ (PxTFD=0x%x)", 4649 port_task_file); 4650 goto out; 4651 } 4652 } 4653 4654 /* Then start port */ 4655 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 4656 != AHCI_SUCCESS) { 4657 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4658 "ahci_software_reset: cannot start AHCI port %d.", port); 4659 goto out; 4660 } 4661 4662 /* 4663 * When ahci_port.ahciport_mop_in_progress is set, A non-zero 4664 * ahci_port.ahciport_pending_ncq_tags may fail 4665 * ahci_claim_free_slot(). Actually according to spec, by clearing 4666 * PxCMD.ST there is no command outstanding while executing software 4667 * reseting. Hence we directly use slot 0 instead of 4668 * ahci_claim_free_slot(). 4669 */ 4670 slot = 0; 4671 4672 /* Now send the first H2D Register FIS with SRST set to 1 */ 4673 cmd_table = ahci_portp->ahciport_cmd_tables[slot]; 4674 bzero((void *)cmd_table, ahci_cmd_table_size); 4675 4676 h2d_register_fisp = 4677 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 4678 4679 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 4680 SET_FIS_PMP(h2d_register_fisp, pmport); 4681 SET_FIS_DEVCTL(h2d_register_fisp, SATA_DEVCTL_SRST); 4682 4683 /* Set Command Header in Command List */ 4684 cmd_header = &ahci_portp->ahciport_cmd_list[slot]; 4685 BZERO_DESCR_INFO(cmd_header); 4686 BZERO_PRD_BYTE_COUNT(cmd_header); 4687 SET_COMMAND_FIS_LENGTH(cmd_header, 5); 4688 SET_PORT_MULTI_PORT(cmd_header, pmport); 4689 4690 SET_CLEAR_BUSY_UPON_R_OK(cmd_header, 1); 4691 SET_RESET(cmd_header, 1); 4692 SET_WRITE(cmd_header, 1); 4693 4694 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_tables_dma_handle[slot], 4695 0, 4696 ahci_cmd_table_size, 4697 DDI_DMA_SYNC_FORDEV); 4698 4699 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 4700 slot * sizeof (ahci_cmd_header_t), 4701 sizeof (ahci_cmd_header_t), 4702 DDI_DMA_SYNC_FORDEV); 4703 4704 /* Indicate to the HBA that a command is active. */ 4705 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4706 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 4707 (0x1 << slot)); 4708 4709 loop_count = 0; 4710 4711 /* Loop till the first command is finished */ 4712 do { 4713 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4714 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 4715 4716 /* We are effectively timing out after 1 sec. */ 4717 if (loop_count++ > AHCI_POLLRATE_PORT_SOFTRESET) { 4718 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4719 "the first SRST FIS is timed out, " 4720 "loop_count = %d", loop_count); 4721 goto out; 4722 } 4723 /* Wait for 10 millisec */ 4724 drv_usecwait(AHCI_10MS_USECS); 4725 } while (port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp) & (0x1 << slot)); 4726 4727 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 4728 "ahci_software_reset: 1st loop count: %d, " 4729 "port_cmd_issue = 0x%x, slot = 0x%x", 4730 loop_count, port_cmd_issue, slot); 4731 4732 /* According to ATA spec, we need wait at least 5 microsecs here. */ 4733 drv_usecwait(AHCI_1MS_USECS); 4734 4735 /* Now send the second H2D Register FIS with SRST cleard to zero */ 4736 cmd_table = ahci_portp->ahciport_cmd_tables[slot]; 4737 bzero((void *)cmd_table, ahci_cmd_table_size); 4738 4739 h2d_register_fisp = 4740 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 4741 4742 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 4743 SET_FIS_PMP(h2d_register_fisp, pmport); 4744 4745 /* Set Command Header in Command List */ 4746 cmd_header = &ahci_portp->ahciport_cmd_list[slot]; 4747 BZERO_DESCR_INFO(cmd_header); 4748 BZERO_PRD_BYTE_COUNT(cmd_header); 4749 SET_COMMAND_FIS_LENGTH(cmd_header, 5); 4750 SET_PORT_MULTI_PORT(cmd_header, pmport); 4751 4752 SET_WRITE(cmd_header, 1); 4753 4754 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_tables_dma_handle[slot], 4755 0, 4756 ahci_cmd_table_size, 4757 DDI_DMA_SYNC_FORDEV); 4758 4759 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 4760 slot * sizeof (ahci_cmd_header_t), 4761 sizeof (ahci_cmd_header_t), 4762 DDI_DMA_SYNC_FORDEV); 4763 4764 /* Indicate to the HBA that a command is active. */ 4765 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4766 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 4767 (0x1 << slot)); 4768 4769 loop_count = 0; 4770 4771 /* Loop till the second command is finished */ 4772 do { 4773 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4774 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 4775 4776 /* We are effectively timing out after 1 sec. */ 4777 if (loop_count++ > AHCI_POLLRATE_PORT_SOFTRESET) { 4778 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4779 "the second SRST FIS is timed out, " 4780 "loop_count = %d", loop_count); 4781 goto out; 4782 } 4783 4784 /* Wait for 10 millisec */ 4785 drv_usecwait(AHCI_10MS_USECS); 4786 } while (port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp) & (0x1 << slot)); 4787 4788 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 4789 "ahci_software_reset: 2nd loop count: %d, " 4790 "port_cmd_issue = 0x%x, slot = 0x%x", 4791 loop_count, port_cmd_issue, slot); 4792 4793 rval = AHCI_SUCCESS; 4794 out: 4795 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4796 "ahci_software_reset: %s at port %d:%d", 4797 rval == AHCI_SUCCESS ? "succeed" : "failed", 4798 port, pmport); 4799 4800 return (rval); 4801 } 4802 4803 /* 4804 * AHCI port reset ...; the physical communication between the HBA and device 4805 * on a port are disabled. This is more intrusive. 4806 * 4807 * When an HBA or port reset occurs, Phy communication is going to 4808 * be re-established with the device through a COMRESET followed by the 4809 * normal out-of-band communication sequence defined in Serial ATA. AT 4810 * the end of reset, the device, if working properly, will send a D2H 4811 * Register FIS, which contains the device signature. When the HBA receives 4812 * this FIS, it updates PxTFD.STS and PxTFD.ERR register fields, and updates 4813 * the PxSIG register with the signature. 4814 * 4815 * Staggered spin-up is an optional feature in SATA II, and it enables an HBA 4816 * to individually spin-up attached devices. Please refer to chapter 10.9 of 4817 * AHCI 1.0 spec. 4818 */ 4819 /* 4820 * WARNING!!! ahciport_mutex should be acquired, and PxCMD.ST should be also 4821 * cleared before the function is called. 4822 */ 4823 static int 4824 ahci_port_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4825 ahci_addr_t *addrp) 4826 { 4827 ahci_addr_t pmult_addr; 4828 uint32_t cap_status, port_cmd_status; 4829 uint32_t port_scontrol, port_sstatus, port_serror; 4830 uint32_t port_intr_status, port_task_file; 4831 uint32_t port_state; 4832 uint8_t port = addrp->aa_port; 4833 4834 int loop_count; 4835 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 4836 4837 /* Target is a port multiplier port? */ 4838 if (AHCI_ADDR_IS_PMPORT(addrp)) 4839 return (ahci_pmport_reset(ahci_ctlp, ahci_portp, addrp)); 4840 4841 /* Otherwise it must be an HBA port. */ 4842 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 4843 4844 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 4845 "Port %d port resetting...", port); 4846 ahci_portp->ahciport_port_state = 0; 4847 4848 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4849 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 4850 4851 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4852 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4853 4854 if (cap_status & AHCI_HBA_CAP_SSS) { 4855 /* 4856 * HBA support staggered spin-up, if the port has 4857 * not spin up yet, then force it to do spin-up 4858 */ 4859 if (!(port_cmd_status & AHCI_CMD_STATUS_SUD)) { 4860 if (!(ahci_portp->ahciport_flags 4861 & AHCI_PORT_FLAG_SPINUP)) { 4862 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4863 "Port %d PxCMD.SUD is zero, force " 4864 "it to do spin-up", port); 4865 ahci_portp->ahciport_flags |= 4866 AHCI_PORT_FLAG_SPINUP; 4867 } 4868 } 4869 } else { 4870 /* 4871 * HBA doesn't support stagger spin-up, force it 4872 * to do normal COMRESET 4873 */ 4874 if (ahci_portp->ahciport_flags & 4875 AHCI_PORT_FLAG_SPINUP) { 4876 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4877 "HBA does not support staggered spin-up " 4878 "force it to do normal COMRESET", NULL); 4879 ahci_portp->ahciport_flags &= 4880 ~AHCI_PORT_FLAG_SPINUP; 4881 } 4882 } 4883 4884 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_SPINUP)) { 4885 /* Do normal COMRESET */ 4886 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 4887 "ahci_port_reset: do normal COMRESET", port); 4888 4889 /* 4890 * According to the spec, SUD bit should be set here, 4891 * but JMicron JMB363 doesn't follow it, so remove 4892 * the assertion, and just print a debug message. 4893 */ 4894 #if AHCI_DEBUG 4895 if (!(port_cmd_status & AHCI_CMD_STATUS_SUD)) 4896 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4897 "port %d SUD bit not set", port) 4898 #endif 4899 4900 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4901 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 4902 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_COMRESET); 4903 4904 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4905 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 4906 port_scontrol); 4907 4908 /* Enable PxCMD.FRE to read device */ 4909 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4910 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4911 port_cmd_status|AHCI_CMD_STATUS_FRE); 4912 4913 /* 4914 * Give time for COMRESET to percolate, according to the AHCI 4915 * spec, software shall wait at least 1 millisecond before 4916 * clearing PxSCTL.DET 4917 */ 4918 drv_usecwait(AHCI_1MS_USECS*2); 4919 4920 /* Fetch the SCONTROL again and rewrite the DET part with 0 */ 4921 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4922 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 4923 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 4924 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4925 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 4926 port_scontrol); 4927 } else { 4928 /* Do staggered spin-up */ 4929 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4930 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 4931 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 4932 4933 /* PxSCTL.DET must be 0 */ 4934 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4935 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 4936 port_scontrol); 4937 4938 port_cmd_status &= ~AHCI_CMD_STATUS_SUD; 4939 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4940 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4941 port_cmd_status); 4942 4943 /* 0 -> 1 edge */ 4944 drv_usecwait(AHCI_1MS_USECS*2); 4945 4946 /* Set PxCMD.SUD to 1 */ 4947 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4948 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4949 port_cmd_status |= AHCI_CMD_STATUS_SUD; 4950 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4951 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4952 port_cmd_status); 4953 4954 /* Enable PxCMD.FRE to read device */ 4955 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4956 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4957 port_cmd_status|AHCI_CMD_STATUS_FRE); 4958 } 4959 4960 /* 4961 * The port enters P:StartComm state, and HBA tells link layer to 4962 * start communication, which involves sending COMRESET to device. 4963 * And the HBA resets PxTFD.STS to 7Fh. 4964 * 4965 * When a COMINIT is received from the device, then the port enters 4966 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets 4967 * PxSSTS.DET to 1h to indicate a device is detected but communication 4968 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate 4969 * a COMINIT has been received. 4970 */ 4971 /* 4972 * The DET field is valid only if IPM field indicates 4973 * that the interface is in active state. 4974 */ 4975 loop_count = 0; 4976 do { 4977 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4978 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 4979 4980 if (SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) { 4981 /* 4982 * If the interface is not active, the DET field 4983 * is considered not accurate. So we want to 4984 * continue looping. 4985 */ 4986 SSTATUS_SET_DET(port_sstatus, SSTATUS_DET_NODEV); 4987 } 4988 4989 if (loop_count++ > AHCI_POLLRATE_PORT_SSTATUS) { 4990 /* 4991 * We are effectively timing out after 0.1 sec. 4992 */ 4993 break; 4994 } 4995 4996 /* Wait for 10 millisec */ 4997 drv_usecwait(AHCI_10MS_USECS); 4998 } while (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM); 4999 5000 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 5001 "ahci_port_reset: 1st loop count: %d, " 5002 "port_sstatus = 0x%x port %d", 5003 loop_count, port_sstatus, port); 5004 5005 if ((SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) || 5006 (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM)) { 5007 /* 5008 * Either the port is not active or there 5009 * is no device present. 5010 */ 5011 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_NONE); 5012 return (AHCI_SUCCESS); 5013 } 5014 5015 /* Now we can make sure there is a device connected to the port */ 5016 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5017 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 5018 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5019 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 5020 5021 /* 5022 * A COMINIT signal is supposed to be received 5023 * PxSERR.DIAG.X or PxIS.PCS should be set 5024 */ 5025 if (!(port_intr_status & AHCI_INTR_STATUS_PCS) && 5026 !(port_serror & SERROR_EXCHANGED_ERR)) { 5027 cmn_err(CE_WARN, "!ahci%d: ahci_port_reset port %d " 5028 "COMINIT signal from the device not received", 5029 instance, port); 5030 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_PSTATE_FAILED); 5031 return (AHCI_FAILURE); 5032 } 5033 5034 /* 5035 * According to the spec, when PxSCTL.DET is set to 0h, upon 5036 * receiving a COMINIT from the attached device, PxTFD.STS.BSY 5037 * shall be set to '1' by the HBA. 5038 * 5039 * However, we found JMicron JMB363 doesn't follow this, so 5040 * remove this check, and just print a debug message. 5041 */ 5042 #if AHCI_DEBUG 5043 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5044 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 5045 if (!(port_task_file & AHCI_TFD_STS_BSY)) { 5046 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_port_reset: " 5047 "port %d BSY bit is not set after COMINIT signal " 5048 "is received", port); 5049 } 5050 #endif 5051 5052 /* 5053 * PxSERR.DIAG.X has to be cleared in order to update PxTFD with 5054 * the D2H FIS received by HBA. 5055 */ 5056 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5057 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5058 SERROR_EXCHANGED_ERR); 5059 5060 /* 5061 * Devices should return a FIS contains its signature to HBA after 5062 * COMINIT signal. Check whether a D2H FIS is received by polling 5063 * PxTFD.STS.ERR bit. 5064 */ 5065 loop_count = 0; 5066 do { 5067 /* Wait for 10 millisec */ 5068 drv_usecwait(AHCI_10MS_USECS); 5069 5070 if (loop_count++ > AHCI_POLLRATE_PORT_TFD_ERROR) { 5071 /* 5072 * We are effectively timing out after 11 sec. 5073 */ 5074 cmn_err(CE_WARN, "!ahci%d: ahci_port_reset port %d " 5075 "the device hardware has been initialized and " 5076 "the power-up diagnostics failed", 5077 instance, port); 5078 5079 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_port_reset: " 5080 "port %d PxTFD.STS.ERR is not set, we need another " 5081 "software reset.", port); 5082 5083 /* Clear port serror register for the port */ 5084 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5085 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5086 AHCI_SERROR_CLEAR_ALL); 5087 5088 AHCI_ADDR_SET_PMULT(&pmult_addr, port); 5089 5090 /* Try another software reset. */ 5091 if (ahci_software_reset(ahci_ctlp, ahci_portp, 5092 &pmult_addr) != AHCI_SUCCESS) { 5093 AHCIPORT_SET_STATE(ahci_portp, addrp, 5094 SATA_PSTATE_FAILED); 5095 return (AHCI_FAILURE); 5096 } 5097 break; 5098 } 5099 5100 /* Wait for 10 millisec */ 5101 drv_usecwait(AHCI_10MS_USECS); 5102 5103 /* 5104 * The Error bit '1' means COMRESET is finished successfully 5105 * The device hardware has been initialized and the power-up 5106 * diagnostics successfully completed. The device requests 5107 * that the Transport layer transmit a Register - D2H FIS to 5108 * the host. (SATA spec 11.5, v2.6) 5109 */ 5110 port_task_file = 5111 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5112 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 5113 } while (((port_task_file & AHCI_TFD_ERR_MASK) 5114 >> AHCI_TFD_ERR_SHIFT) != AHCI_TFD_ERR_SGS); 5115 5116 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 5117 "ahci_port_reset: 2nd loop count: %d, " 5118 "port_task_file = 0x%x port %d", 5119 loop_count, port_task_file, port); 5120 5121 /* Clear port serror register for the port */ 5122 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5123 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5124 AHCI_SERROR_CLEAR_ALL); 5125 5126 /* Set port as ready */ 5127 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 5128 AHCIPORT_SET_STATE(ahci_portp, addrp, port_state|SATA_STATE_READY); 5129 5130 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5131 "ahci_port_reset: succeed at port %d.", port); 5132 return (AHCI_SUCCESS); 5133 } 5134 5135 /* 5136 * COMRESET on a port multiplier port. 5137 * 5138 * NOTE: Only called in ahci_port_reset() 5139 */ 5140 static int 5141 ahci_pmport_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5142 ahci_addr_t *addrp) 5143 { 5144 uint32_t port_scontrol, port_sstatus, port_serror; 5145 uint32_t port_cmd_status, port_intr_status; 5146 uint32_t port_state; 5147 uint8_t port = addrp->aa_port; 5148 uint8_t pmport = addrp->aa_pmport; 5149 int loop_count; 5150 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 5151 5152 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 5153 "port %d:%d: pmport resetting", port, pmport); 5154 5155 /* Initialize pmport state */ 5156 AHCIPORT_SET_STATE(ahci_portp, addrp, 0); 5157 5158 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &port_scontrol, err); 5159 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_COMRESET); 5160 WRITE_PMULT(addrp, SATA_PMULT_REG_SCTL, port_scontrol, err); 5161 5162 /* PxCMD.FRE should be set before. */ 5163 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5164 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5165 ASSERT(port_cmd_status & AHCI_CMD_STATUS_FRE); 5166 if (!(port_cmd_status & AHCI_CMD_STATUS_FRE)) 5167 return (AHCI_FAILURE); 5168 5169 /* 5170 * Give time for COMRESET to percolate, according to the AHCI 5171 * spec, software shall wait at least 1 millisecond before 5172 * clearing PxSCTL.DET 5173 */ 5174 drv_usecwait(AHCI_1MS_USECS*2); 5175 5176 /* 5177 * Fetch the SCONTROL again and rewrite the DET part with 0 5178 * This will generate an Asychronous Notification events. 5179 */ 5180 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &port_scontrol, err); 5181 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 5182 WRITE_PMULT(addrp, SATA_PMULT_REG_SCTL, port_scontrol, err); 5183 5184 /* 5185 * The port enters P:StartComm state, and HBA tells link layer to 5186 * start communication, which involves sending COMRESET to device. 5187 * And the HBA resets PxTFD.STS to 7Fh. 5188 * 5189 * When a COMINIT is received from the device, then the port enters 5190 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets 5191 * PxSSTS.DET to 1h to indicate a device is detected but communication 5192 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate 5193 * a COMINIT has been received. 5194 */ 5195 /* 5196 * The DET field is valid only if IPM field indicates 5197 * that the interface is in active state. 5198 */ 5199 loop_count = 0; 5200 do { 5201 READ_PMULT(addrp, SATA_PMULT_REG_SSTS, &port_sstatus, err); 5202 5203 if (SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) { 5204 /* 5205 * If the interface is not active, the DET field 5206 * is considered not accurate. So we want to 5207 * continue looping. 5208 */ 5209 SSTATUS_SET_DET(port_sstatus, SSTATUS_DET_NODEV); 5210 } 5211 5212 if (loop_count++ > AHCI_POLLRATE_PORT_SSTATUS) { 5213 /* 5214 * We are effectively timing out after 0.1 sec. 5215 */ 5216 break; 5217 } 5218 5219 /* Wait for 10 millisec */ 5220 drv_usecwait(AHCI_10MS_USECS); 5221 5222 } while (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM); 5223 5224 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5225 "ahci_pmport_reset: 1st loop count: %d, " 5226 "port_sstatus = 0x%x port %d:%d", 5227 loop_count, port_sstatus, port, pmport); 5228 5229 if ((SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) || 5230 (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM)) { 5231 /* 5232 * Either the port is not active or there 5233 * is no device present. 5234 */ 5235 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO, ahci_ctlp, 5236 "ahci_pmport_reset: " 5237 "no device attached to port %d:%d", 5238 port, pmport); 5239 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_NONE); 5240 return (AHCI_SUCCESS); 5241 } 5242 5243 /* Now we can make sure there is a device connected to the port */ 5244 /* COMINIT signal is supposed to be received (PxSERR.DIAG.X = '1') */ 5245 READ_PMULT(addrp, SATA_PMULT_REG_SERR, &port_serror, err); 5246 5247 if (!(port_serror & (1 << 26))) { 5248 cmn_err(CE_WARN, "!ahci%d: ahci_pmport_reset: " 5249 "COMINIT signal from the device not received port %d:%d", 5250 instance, port, pmport); 5251 5252 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_PSTATE_FAILED); 5253 return (AHCI_FAILURE); 5254 } 5255 5256 /* 5257 * After clear PxSERR register, we will receive a D2H FIS. 5258 * Normally this FIS will cause a IPMS error according to AHCI spec 5259 * v1.2 because there is no command outstanding for it. So we need 5260 * to ignore this error. 5261 */ 5262 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_IGNORE_IPMS; 5263 WRITE_PMULT(addrp, SATA_PMULT_REG_SERR, AHCI_SERROR_CLEAR_ALL, err); 5264 5265 /* Now we need to check the D2H FIS by checking IPMS error. */ 5266 loop_count = 0; 5267 do { 5268 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5269 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 5270 5271 if (loop_count++ > AHCI_POLLRATE_PORT_TFD_ERROR) { 5272 /* 5273 * No D2H FIS received. This is possible according 5274 * to SATA 2.6 spec. 5275 */ 5276 cmn_err(CE_WARN, "ahci_port_reset: port %d:%d " 5277 "PxIS.IPMS is not set, we need another " 5278 "software reset.", port, pmport); 5279 5280 break; 5281 } 5282 5283 /* Wait for 10 millisec */ 5284 mutex_exit(&ahci_portp->ahciport_mutex); 5285 delay(AHCI_10MS_TICKS); 5286 mutex_enter(&ahci_portp->ahciport_mutex); 5287 5288 } while (!(port_intr_status & AHCI_INTR_STATUS_IPMS)); 5289 5290 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5291 "ahci_pmport_reset: 2st loop count: %d, " 5292 "port_sstatus = 0x%x port %d:%d", 5293 loop_count, port_sstatus, port, pmport); 5294 5295 /* Clear IPMS */ 5296 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5297 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 5298 AHCI_INTR_STATUS_IPMS); 5299 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_IGNORE_IPMS; 5300 5301 /* This pmport is now ready for ahci_tran_start() */ 5302 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 5303 AHCIPORT_SET_STATE(ahci_portp, addrp, port_state|SATA_STATE_READY); 5304 5305 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5306 "ahci_pmport_reset: succeed at port %d:%d", port, pmport); 5307 return (AHCI_SUCCESS); 5308 5309 err: /* R/W PMULT error */ 5310 /* IPMS flags might be set before. */ 5311 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_IGNORE_IPMS; 5312 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5313 "ahci_pmport_reset: failed at port %d:%d", port, pmport); 5314 5315 return (AHCI_FAILURE); 5316 } 5317 5318 /* 5319 * AHCI HBA reset ...; the entire HBA is reset, and all ports are disabled. 5320 * This is the most intrusive. 5321 * 5322 * When an HBA reset occurs, Phy communication will be re-established with 5323 * the device through a COMRESET followed by the normal out-of-band 5324 * communication sequence defined in Serial ATA. AT the end of reset, the 5325 * device, if working properly, will send a D2H Register FIS, which contains 5326 * the device signature. When the HBA receives this FIS, it updates PxTFD.STS 5327 * and PxTFD.ERR register fields, and updates the PxSIG register with the 5328 * signature. 5329 * 5330 * Remember to set GHC.AE to 1 before calling ahci_hba_reset. 5331 */ 5332 static int 5333 ahci_hba_reset(ahci_ctl_t *ahci_ctlp) 5334 { 5335 ahci_port_t *ahci_portp; 5336 ahci_addr_t addr; 5337 uint32_t ghc_control; 5338 uint8_t port; 5339 int loop_count; 5340 int rval = AHCI_SUCCESS; 5341 5342 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, "HBA resetting", 5343 NULL); 5344 5345 mutex_enter(&ahci_ctlp->ahcictl_mutex); 5346 5347 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5348 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5349 5350 /* Setting GHC.HR to 1, remember GHC.AE is already set to 1 before */ 5351 ghc_control |= AHCI_HBA_GHC_HR; 5352 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5353 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 5354 5355 /* 5356 * Wait until HBA Reset complete or timeout 5357 */ 5358 loop_count = 0; 5359 do { 5360 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5361 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5362 5363 if (loop_count++ > AHCI_POLLRATE_HBA_RESET) { 5364 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5365 "ahci hba reset is timing out, " 5366 "ghc_control = 0x%x", ghc_control); 5367 /* We are effectively timing out after 1 sec. */ 5368 break; 5369 } 5370 5371 /* Wait for 10 millisec */ 5372 drv_usecwait(AHCI_10MS_USECS); 5373 } while (ghc_control & AHCI_HBA_GHC_HR); 5374 5375 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5376 "ahci_hba_reset: 1st loop count: %d, " 5377 "ghc_control = 0x%x", loop_count, ghc_control); 5378 5379 if (ghc_control & AHCI_HBA_GHC_HR) { 5380 /* The hba is not reset for some reasons */ 5381 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5382 "hba reset failed: HBA in a hung or locked state", NULL); 5383 mutex_exit(&ahci_ctlp->ahcictl_mutex); 5384 return (AHCI_FAILURE); 5385 } 5386 5387 /* 5388 * HBA reset will clear (AHCI Spec v1.2 10.4.3) GHC.IE / GHC.AE 5389 */ 5390 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5391 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5392 ghc_control |= (AHCI_HBA_GHC_AE | AHCI_HBA_GHC_IE); 5393 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5394 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 5395 5396 mutex_exit(&ahci_ctlp->ahcictl_mutex); 5397 5398 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 5399 /* Only check implemented ports */ 5400 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 5401 continue; 5402 } 5403 5404 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 5405 mutex_enter(&ahci_portp->ahciport_mutex); 5406 5407 AHCI_ADDR_SET_PORT(&addr, port); 5408 5409 if (ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 5410 port, AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, NULL) != 5411 AHCI_SUCCESS) { 5412 rval = AHCI_FAILURE; 5413 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5414 "ahci_hba_reset: port %d failed", port); 5415 /* 5416 * Set the port state to SATA_PSTATE_FAILED if 5417 * failed to initialize it. 5418 */ 5419 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 5420 } 5421 5422 mutex_exit(&ahci_portp->ahciport_mutex); 5423 } 5424 5425 return (rval); 5426 } 5427 5428 /* 5429 * This routine is only called from AHCI_ATTACH or phyrdy change 5430 * case. It first calls software reset, then stop the port and try to 5431 * read PxSIG register to find the type of device attached to the port. 5432 * 5433 * The caller should make sure a valid device exists on specified port and 5434 * physical communication has been established so that the signature could 5435 * be retrieved by software reset. 5436 * 5437 * WARNING!!! ahciport_mutex should be acquired before the function 5438 * is called. And the port interrupt is disabled. 5439 */ 5440 static void 5441 ahci_find_dev_signature(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5442 ahci_addr_t *addrp) 5443 { 5444 ahci_addr_t dev_addr; 5445 uint32_t signature; 5446 uint8_t port = addrp->aa_port; 5447 uint8_t pmport = addrp->aa_pmport; 5448 ASSERT(AHCI_ADDR_IS_VALID(addrp)); 5449 int rval; 5450 5451 if (AHCI_ADDR_IS_PORT(addrp)) { 5452 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 5453 "ahci_find_dev_signature enter: port %d", port); 5454 5455 /* 5456 * NOTE: when the ahci address is a HBA port, we do not know 5457 * it is a device or a port multiplier that attached. we need 5458 * try a software reset at port multiplier address (0xf 5459 * pmport) 5460 */ 5461 AHCI_ADDR_SET_PMULT(&dev_addr, addrp->aa_port); 5462 } else { 5463 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 5464 "ahci_find_dev_signature enter: port %d:%d", 5465 port, pmport); 5466 dev_addr = *addrp; 5467 } 5468 5469 /* Assume it is unknown. */ 5470 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 5471 5472 /* Issue a software reset to get the signature */ 5473 rval = ahci_software_reset(ahci_ctlp, ahci_portp, &dev_addr); 5474 if (rval != AHCI_SUCCESS) { 5475 5476 /* 5477 * Try to do software reset again with pmport set with 0 if 5478 * the controller is set with AHCI_CAP_SRST_NO_HOSTPORT and 5479 * the original pmport is set with SATA_PMULT_HOSTPORT (0xf) 5480 */ 5481 if ((ahci_ctlp->ahcictl_cap & AHCI_CAP_SRST_NO_HOSTPORT) && 5482 (dev_addr.aa_pmport == SATA_PMULT_HOSTPORT)) { 5483 dev_addr.aa_pmport = 0; 5484 rval = ahci_software_reset(ahci_ctlp, ahci_portp, 5485 &dev_addr); 5486 } 5487 5488 if (rval != AHCI_SUCCESS) { 5489 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5490 "ahci_find_dev_signature: software reset failed " 5491 "at port %d:%d, cannot get signature.", 5492 port, pmport); 5493 5494 AHCIPORT_SET_STATE(ahci_portp, addrp, 5495 SATA_PSTATE_FAILED); 5496 return; 5497 } 5498 } 5499 5500 /* 5501 * ahci_software_reset has started the port, so we need manually stop 5502 * the port again. 5503 */ 5504 if (AHCI_ADDR_IS_PORT(addrp)) { 5505 if (ahci_put_port_into_notrunning_state(ahci_ctlp, 5506 ahci_portp, port) != AHCI_SUCCESS) { 5507 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5508 "ahci_find_dev_signature: cannot stop port %d.", 5509 port); 5510 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 5511 return; 5512 } 5513 } 5514 5515 /* Now we can make sure that a valid signature is received. */ 5516 signature = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5517 (uint32_t *)AHCI_PORT_PxSIG(ahci_ctlp, port)); 5518 5519 #ifdef AHCI_DEBUG 5520 if (AHCI_ADDR_IS_PMPORT(addrp)) { 5521 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 5522 "ahci_find_dev_signature: signature = 0x%x at port %d:%d", 5523 signature, port, pmport); 5524 } else { 5525 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO, ahci_ctlp, 5526 "ahci_find_dev_signature: signature = 0x%x at port %d", 5527 signature, port); 5528 } 5529 #endif 5530 5531 /* NOTE: Only support ATAPI device at controller port. */ 5532 if (signature == AHCI_SIGNATURE_ATAPI && !AHCI_ADDR_IS_PORT(addrp)) 5533 signature = SATA_DTYPE_UNKNOWN; 5534 5535 switch (signature) { 5536 5537 case AHCI_SIGNATURE_DISK: 5538 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_ATADISK); 5539 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5540 "Disk is found at port: %d", port); 5541 break; 5542 5543 case AHCI_SIGNATURE_ATAPI: 5544 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_ATAPI); 5545 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5546 "ATAPI device is found at port: %d", port); 5547 break; 5548 5549 case AHCI_SIGNATURE_PORT_MULTIPLIER: 5550 /* Port Multiplier cannot recursively attached. */ 5551 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 5552 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_PMULT); 5553 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5554 "Port Multiplier is found at port: %d", port); 5555 break; 5556 5557 default: 5558 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 5559 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5560 "Unknown device is found at port: %d", port); 5561 } 5562 } 5563 5564 /* 5565 * According to the spec, to reliably detect hot plug removals, software 5566 * must disable interface power management. Software should perform the 5567 * following initialization on a port after a device is attached: 5568 * Set PxSCTL.IPM to 3h to disable interface state transitions 5569 * Set PxCMD.ALPE to '0' to disable aggressive power management 5570 * Disable device initiated interface power management by SET FEATURE 5571 * 5572 * We can ignore the last item because by default the feature is disabled 5573 */ 5574 static void 5575 ahci_disable_interface_pm(ahci_ctl_t *ahci_ctlp, uint8_t port) 5576 { 5577 uint32_t port_scontrol, port_cmd_status; 5578 5579 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5580 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 5581 SCONTROL_SET_IPM(port_scontrol, SCONTROL_IPM_DISABLE_BOTH); 5582 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5583 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), port_scontrol); 5584 5585 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5586 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5587 port_cmd_status &= ~AHCI_CMD_STATUS_ALPE; 5588 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5589 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), port_cmd_status); 5590 } 5591 5592 /* 5593 * Start the port - set PxCMD.ST to 1, if PxCMD.FRE is not set 5594 * to 1, then set it firstly. 5595 * 5596 * Each port contains two major DMA engines. One DMA engine walks through 5597 * the command list, and is controlled by PxCMD.ST. The second DMA engine 5598 * copies received FISes into system memory, and is controlled by PxCMD.FRE. 5599 * 5600 * Software shall not set PxCMD.ST to '1' until it verifies that PxCMD.CR 5601 * is '0' and has set PxCMD.FRE is '1'. And software shall not clear 5602 * PxCMD.FRE while PxCMD.ST or PxCMD.CR is set '1'. 5603 * 5604 * Software shall not set PxCMD.ST to '1' unless a functional device is 5605 * present on the port(as determined by PxTFD.STS.BSY = '0', 5606 * PxTFD.STS.DRQ = '0', and PxSSTS.DET = 3h). 5607 * 5608 * WARNING!!! ahciport_mutex should be acquired before the function 5609 * is called. 5610 */ 5611 static int 5612 ahci_start_port(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, uint8_t port) 5613 { 5614 uint32_t port_cmd_status; 5615 5616 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_start_port: %d enter", port); 5617 5618 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED) { 5619 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port failed " 5620 "the state for port %d is 0x%x", 5621 port, ahci_portp->ahciport_port_state); 5622 return (AHCI_FAILURE); 5623 } 5624 5625 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 5626 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port failed " 5627 "no device is attached at port %d", port); 5628 return (AHCI_FAILURE); 5629 } 5630 5631 /* First to set PxCMD.FRE before setting PxCMD.ST. */ 5632 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5633 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5634 5635 if (!(port_cmd_status & AHCI_CMD_STATUS_FRE)) { 5636 port_cmd_status |= AHCI_CMD_STATUS_FRE; 5637 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5638 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5639 port_cmd_status); 5640 } 5641 5642 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5643 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5644 5645 port_cmd_status |= AHCI_CMD_STATUS_ST; 5646 5647 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5648 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5649 port_cmd_status); 5650 5651 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_STARTED; 5652 5653 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port: " 5654 "PxCMD.ST set to '1' at port %d", port); 5655 5656 return (AHCI_SUCCESS); 5657 } 5658 5659 /* 5660 * Allocate the ahci_port_t including Received FIS and Command List. 5661 * The argument - port is the physical port number, and not logical 5662 * port number seen by the SATA framework. 5663 * 5664 * WARNING!!! ahcictl_mutex should be acquired before the function 5665 * is called. 5666 */ 5667 static int 5668 ahci_alloc_port_state(ahci_ctl_t *ahci_ctlp, uint8_t port) 5669 { 5670 dev_info_t *dip = ahci_ctlp->ahcictl_dip; 5671 ahci_port_t *ahci_portp; 5672 char taskq_name[64] = "event_handle_taskq"; 5673 5674 ahci_portp = 5675 (ahci_port_t *)kmem_zalloc(sizeof (ahci_port_t), KM_SLEEP); 5676 5677 ahci_ctlp->ahcictl_ports[port] = ahci_portp; 5678 ahci_portp->ahciport_port_num = port; 5679 5680 /* Initialize the port condition variable */ 5681 cv_init(&ahci_portp->ahciport_cv, NULL, CV_DRIVER, NULL); 5682 5683 /* Initialize the port mutex */ 5684 mutex_init(&ahci_portp->ahciport_mutex, NULL, MUTEX_DRIVER, 5685 (void *)(uintptr_t)ahci_ctlp->ahcictl_intr_pri); 5686 5687 mutex_enter(&ahci_portp->ahciport_mutex); 5688 5689 /* 5690 * Allocate memory for received FIS structure and 5691 * command list for this port 5692 */ 5693 if (ahci_alloc_rcvd_fis(ahci_ctlp, ahci_portp, port) != AHCI_SUCCESS) { 5694 goto err_case1; 5695 } 5696 5697 if (ahci_alloc_cmd_list(ahci_ctlp, ahci_portp, port) != AHCI_SUCCESS) { 5698 goto err_case2; 5699 } 5700 5701 (void) snprintf(taskq_name + strlen(taskq_name), 5702 sizeof (taskq_name) - strlen(taskq_name), 5703 "_port%d", port); 5704 5705 /* Create the taskq for the port */ 5706 if ((ahci_portp->ahciport_event_taskq = ddi_taskq_create(dip, 5707 taskq_name, 2, TASKQ_DEFAULTPRI, 0)) == NULL) { 5708 cmn_err(CE_WARN, "!ahci%d: ddi_taskq_create failed for event " 5709 "handle", ddi_get_instance(ahci_ctlp->ahcictl_dip)); 5710 goto err_case3; 5711 } 5712 5713 /* Allocate the argument for the taskq */ 5714 ahci_portp->ahciport_event_args = 5715 kmem_zalloc(sizeof (ahci_event_arg_t), KM_SLEEP); 5716 5717 ahci_portp->ahciport_event_args->ahciea_addrp = 5718 kmem_zalloc(sizeof (ahci_addr_t), KM_SLEEP); 5719 5720 if (ahci_portp->ahciport_event_args == NULL) 5721 goto err_case4; 5722 5723 mutex_exit(&ahci_portp->ahciport_mutex); 5724 5725 return (AHCI_SUCCESS); 5726 5727 err_case4: 5728 ddi_taskq_destroy(ahci_portp->ahciport_event_taskq); 5729 5730 err_case3: 5731 ahci_dealloc_cmd_list(ahci_ctlp, ahci_portp); 5732 5733 err_case2: 5734 ahci_dealloc_rcvd_fis(ahci_portp); 5735 5736 err_case1: 5737 mutex_exit(&ahci_portp->ahciport_mutex); 5738 mutex_destroy(&ahci_portp->ahciport_mutex); 5739 cv_destroy(&ahci_portp->ahciport_cv); 5740 5741 kmem_free(ahci_portp, sizeof (ahci_port_t)); 5742 5743 return (AHCI_FAILURE); 5744 } 5745 5746 /* 5747 * Reverse of ahci_dealloc_port_state(). 5748 * 5749 * WARNING!!! ahcictl_mutex should be acquired before the function 5750 * is called. 5751 */ 5752 static void 5753 ahci_dealloc_port_state(ahci_ctl_t *ahci_ctlp, uint8_t port) 5754 { 5755 ahci_port_t *ahci_portp = ahci_ctlp->ahcictl_ports[port]; 5756 5757 ASSERT(ahci_portp != NULL); 5758 5759 mutex_enter(&ahci_portp->ahciport_mutex); 5760 kmem_free(ahci_portp->ahciport_event_args->ahciea_addrp, 5761 sizeof (ahci_addr_t)); 5762 ahci_portp->ahciport_event_args->ahciea_addrp = NULL; 5763 kmem_free(ahci_portp->ahciport_event_args, sizeof (ahci_event_arg_t)); 5764 ahci_portp->ahciport_event_args = NULL; 5765 ddi_taskq_destroy(ahci_portp->ahciport_event_taskq); 5766 ahci_dealloc_cmd_list(ahci_ctlp, ahci_portp); 5767 ahci_dealloc_rcvd_fis(ahci_portp); 5768 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 5769 mutex_exit(&ahci_portp->ahciport_mutex); 5770 5771 mutex_destroy(&ahci_portp->ahciport_mutex); 5772 cv_destroy(&ahci_portp->ahciport_cv); 5773 5774 kmem_free(ahci_portp, sizeof (ahci_port_t)); 5775 5776 ahci_ctlp->ahcictl_ports[port] = NULL; 5777 } 5778 5779 /* 5780 * Allocates memory for the Received FIS Structure 5781 * 5782 * WARNING!!! ahciport_mutex should be acquired before the function 5783 * is called. 5784 */ 5785 static int 5786 ahci_alloc_rcvd_fis(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5787 uint8_t port) 5788 { 5789 size_t rcvd_fis_size; 5790 size_t ret_len; 5791 uint_t cookie_count; 5792 5793 rcvd_fis_size = sizeof (ahci_rcvd_fis_t); 5794 5795 /* allocate rcvd FIS dma handle. */ 5796 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 5797 &ahci_ctlp->ahcictl_rcvd_fis_dma_attr, 5798 DDI_DMA_SLEEP, 5799 NULL, 5800 &ahci_portp->ahciport_rcvd_fis_dma_handle) != 5801 DDI_SUCCESS) { 5802 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5803 "rcvd FIS dma handle alloc failed", NULL); 5804 5805 return (AHCI_FAILURE); 5806 } 5807 5808 if (ddi_dma_mem_alloc(ahci_portp->ahciport_rcvd_fis_dma_handle, 5809 rcvd_fis_size, 5810 &accattr, 5811 DDI_DMA_CONSISTENT, 5812 DDI_DMA_SLEEP, 5813 NULL, 5814 (caddr_t *)&ahci_portp->ahciport_rcvd_fis, 5815 &ret_len, 5816 &ahci_portp->ahciport_rcvd_fis_acc_handle) != NULL) { 5817 5818 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5819 "rcvd FIS dma mem alloc fail", NULL); 5820 /* error.. free the dma handle. */ 5821 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 5822 return (AHCI_FAILURE); 5823 } 5824 5825 if (ddi_dma_addr_bind_handle(ahci_portp->ahciport_rcvd_fis_dma_handle, 5826 NULL, 5827 (caddr_t)ahci_portp->ahciport_rcvd_fis, 5828 rcvd_fis_size, 5829 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 5830 DDI_DMA_SLEEP, 5831 NULL, 5832 &ahci_portp->ahciport_rcvd_fis_dma_cookie, 5833 &cookie_count) != DDI_DMA_MAPPED) { 5834 5835 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5836 "rcvd FIS dma handle bind fail", NULL); 5837 /* error.. free the dma handle & free the memory. */ 5838 ddi_dma_mem_free(&ahci_portp->ahciport_rcvd_fis_acc_handle); 5839 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 5840 return (AHCI_FAILURE); 5841 } 5842 5843 bzero((void *)ahci_portp->ahciport_rcvd_fis, rcvd_fis_size); 5844 5845 /* Config Port Received FIS Base Address */ 5846 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 5847 (uint64_t *)AHCI_PORT_PxFB(ahci_ctlp, port), 5848 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_laddress); 5849 5850 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "64-bit, dma address: 0x%llx", 5851 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_laddress); 5852 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "32-bit, dma address: 0x%x", 5853 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_address); 5854 5855 return (AHCI_SUCCESS); 5856 } 5857 5858 /* 5859 * Deallocates the Received FIS Structure 5860 * 5861 * WARNING!!! ahciport_mutex should be acquired before the function 5862 * is called. 5863 */ 5864 static void 5865 ahci_dealloc_rcvd_fis(ahci_port_t *ahci_portp) 5866 { 5867 /* Unbind the cmd list dma handle first. */ 5868 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_rcvd_fis_dma_handle); 5869 5870 /* Then free the underlying memory. */ 5871 ddi_dma_mem_free(&ahci_portp->ahciport_rcvd_fis_acc_handle); 5872 5873 /* Now free the handle itself. */ 5874 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 5875 } 5876 5877 /* 5878 * Allocates memory for the Command List, which contains up to 32 entries. 5879 * Each entry contains a command header, which is a 32-byte structure that 5880 * includes the pointer to the command table. 5881 * 5882 * WARNING!!! ahciport_mutex should be acquired before the function 5883 * is called. 5884 */ 5885 static int 5886 ahci_alloc_cmd_list(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5887 uint8_t port) 5888 { 5889 size_t cmd_list_size; 5890 size_t ret_len; 5891 uint_t cookie_count; 5892 5893 cmd_list_size = 5894 ahci_ctlp->ahcictl_num_cmd_slots * sizeof (ahci_cmd_header_t); 5895 5896 /* allocate cmd list dma handle. */ 5897 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 5898 &ahci_ctlp->ahcictl_cmd_list_dma_attr, 5899 DDI_DMA_SLEEP, 5900 NULL, 5901 &ahci_portp->ahciport_cmd_list_dma_handle) != DDI_SUCCESS) { 5902 5903 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5904 "cmd list dma handle alloc failed", NULL); 5905 return (AHCI_FAILURE); 5906 } 5907 5908 if (ddi_dma_mem_alloc(ahci_portp->ahciport_cmd_list_dma_handle, 5909 cmd_list_size, 5910 &accattr, 5911 DDI_DMA_CONSISTENT, 5912 DDI_DMA_SLEEP, 5913 NULL, 5914 (caddr_t *)&ahci_portp->ahciport_cmd_list, 5915 &ret_len, 5916 &ahci_portp->ahciport_cmd_list_acc_handle) != NULL) { 5917 5918 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5919 "cmd list dma mem alloc fail", NULL); 5920 /* error.. free the dma handle. */ 5921 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 5922 return (AHCI_FAILURE); 5923 } 5924 5925 if (ddi_dma_addr_bind_handle(ahci_portp->ahciport_cmd_list_dma_handle, 5926 NULL, 5927 (caddr_t)ahci_portp->ahciport_cmd_list, 5928 cmd_list_size, 5929 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 5930 DDI_DMA_SLEEP, 5931 NULL, 5932 &ahci_portp->ahciport_cmd_list_dma_cookie, 5933 &cookie_count) != DDI_DMA_MAPPED) { 5934 5935 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5936 "cmd list dma handle bind fail", NULL); 5937 /* error.. free the dma handle & free the memory. */ 5938 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 5939 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 5940 return (AHCI_FAILURE); 5941 } 5942 5943 bzero((void *)ahci_portp->ahciport_cmd_list, cmd_list_size); 5944 5945 /* Config Port Command List Base Address */ 5946 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 5947 (uint64_t *)AHCI_PORT_PxCLB(ahci_ctlp, port), 5948 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_laddress); 5949 5950 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "64-bit, dma address: 0x%llx", 5951 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_laddress); 5952 5953 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "32-bit, dma address: 0x%x", 5954 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_address); 5955 5956 if (ahci_alloc_cmd_tables(ahci_ctlp, ahci_portp) != AHCI_SUCCESS) { 5957 goto err_out; 5958 } 5959 5960 return (AHCI_SUCCESS); 5961 5962 err_out: 5963 /* Unbind the cmd list dma handle first. */ 5964 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_cmd_list_dma_handle); 5965 5966 /* Then free the underlying memory. */ 5967 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 5968 5969 /* Now free the handle itself. */ 5970 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 5971 5972 return (AHCI_FAILURE); 5973 } 5974 5975 /* 5976 * Deallocates the Command List 5977 * 5978 * WARNING!!! ahciport_mutex should be acquired before the function 5979 * is called. 5980 */ 5981 static void 5982 ahci_dealloc_cmd_list(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 5983 { 5984 /* First dealloc command table */ 5985 ahci_dealloc_cmd_tables(ahci_ctlp, ahci_portp); 5986 5987 /* Unbind the cmd list dma handle first. */ 5988 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_cmd_list_dma_handle); 5989 5990 /* Then free the underlying memory. */ 5991 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 5992 5993 /* Now free the handle itself. */ 5994 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 5995 } 5996 5997 /* 5998 * Allocates memory for all Command Tables, which contains Command FIS, 5999 * ATAPI Command and Physical Region Descriptor Table. 6000 * 6001 * WARNING!!! ahciport_mutex should be acquired before the function 6002 * is called. 6003 */ 6004 static int 6005 ahci_alloc_cmd_tables(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 6006 { 6007 size_t ret_len; 6008 ddi_dma_cookie_t cmd_table_dma_cookie; 6009 uint_t cookie_count; 6010 int slot; 6011 6012 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 6013 "ahci_alloc_cmd_tables: port %d enter", 6014 ahci_portp->ahciport_port_num); 6015 6016 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; slot++) { 6017 /* Allocate cmd table dma handle. */ 6018 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 6019 &ahci_ctlp->ahcictl_cmd_table_dma_attr, 6020 DDI_DMA_SLEEP, 6021 NULL, 6022 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]) != 6023 DDI_SUCCESS) { 6024 6025 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6026 "cmd table dma handle alloc failed", NULL); 6027 6028 goto err_out; 6029 } 6030 6031 if (ddi_dma_mem_alloc( 6032 ahci_portp->ahciport_cmd_tables_dma_handle[slot], 6033 ahci_cmd_table_size, 6034 &accattr, 6035 DDI_DMA_CONSISTENT, 6036 DDI_DMA_SLEEP, 6037 NULL, 6038 (caddr_t *)&ahci_portp->ahciport_cmd_tables[slot], 6039 &ret_len, 6040 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]) != 6041 NULL) { 6042 6043 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6044 "cmd table dma mem alloc fail", NULL); 6045 6046 /* error.. free the dma handle. */ 6047 ddi_dma_free_handle( 6048 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6049 goto err_out; 6050 } 6051 6052 if (ddi_dma_addr_bind_handle( 6053 ahci_portp->ahciport_cmd_tables_dma_handle[slot], 6054 NULL, 6055 (caddr_t)ahci_portp->ahciport_cmd_tables[slot], 6056 ahci_cmd_table_size, 6057 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 6058 DDI_DMA_SLEEP, 6059 NULL, 6060 &cmd_table_dma_cookie, 6061 &cookie_count) != DDI_DMA_MAPPED) { 6062 6063 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6064 "cmd table dma handle bind fail", NULL); 6065 /* error.. free the dma handle & free the memory. */ 6066 ddi_dma_mem_free( 6067 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6068 ddi_dma_free_handle( 6069 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6070 goto err_out; 6071 } 6072 6073 bzero((void *)ahci_portp->ahciport_cmd_tables[slot], 6074 ahci_cmd_table_size); 6075 6076 /* Config Port Command Table Base Address */ 6077 SET_COMMAND_TABLE_BASE_ADDR( 6078 (&ahci_portp->ahciport_cmd_list[slot]), 6079 cmd_table_dma_cookie.dmac_laddress & 0xffffffffull); 6080 6081 #ifndef __lock_lint 6082 SET_COMMAND_TABLE_BASE_ADDR_UPPER( 6083 (&ahci_portp->ahciport_cmd_list[slot]), 6084 cmd_table_dma_cookie.dmac_laddress >> 32); 6085 #endif 6086 } 6087 6088 return (AHCI_SUCCESS); 6089 err_out: 6090 6091 for (slot--; slot >= 0; slot--) { 6092 /* Unbind the cmd table dma handle first */ 6093 (void) ddi_dma_unbind_handle( 6094 ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6095 6096 /* Then free the underlying memory */ 6097 ddi_dma_mem_free( 6098 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6099 6100 /* Now free the handle itself */ 6101 ddi_dma_free_handle( 6102 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6103 } 6104 6105 return (AHCI_FAILURE); 6106 } 6107 6108 /* 6109 * Deallocates memory for all Command Tables. 6110 * 6111 * WARNING!!! ahciport_mutex should be acquired before the function 6112 * is called. 6113 */ 6114 static void 6115 ahci_dealloc_cmd_tables(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 6116 { 6117 int slot; 6118 6119 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 6120 "ahci_dealloc_cmd_tables: %d enter", 6121 ahci_portp->ahciport_port_num); 6122 6123 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; slot++) { 6124 /* Unbind the cmd table dma handle first. */ 6125 (void) ddi_dma_unbind_handle( 6126 ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6127 6128 /* Then free the underlying memory. */ 6129 ddi_dma_mem_free( 6130 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6131 6132 /* Now free the handle itself. */ 6133 ddi_dma_free_handle( 6134 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6135 } 6136 } 6137 6138 /* 6139 * Update SATA registers at controller ports 6140 * 6141 * WARNING!!! ahciport_mutex should be acquired before those functions 6142 * get called. 6143 */ 6144 static void 6145 ahci_update_sata_registers(ahci_ctl_t *ahci_ctlp, uint8_t port, 6146 sata_device_t *sd) 6147 { 6148 sd->satadev_scr.sstatus = 6149 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6150 (uint32_t *)(AHCI_PORT_PxSSTS(ahci_ctlp, port))); 6151 sd->satadev_scr.serror = 6152 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6153 (uint32_t *)(AHCI_PORT_PxSERR(ahci_ctlp, port))); 6154 sd->satadev_scr.scontrol = 6155 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6156 (uint32_t *)(AHCI_PORT_PxSCTL(ahci_ctlp, port))); 6157 sd->satadev_scr.sactive = 6158 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6159 (uint32_t *)(AHCI_PORT_PxSACT(ahci_ctlp, port))); 6160 } 6161 6162 /* 6163 * For poll mode, ahci_port_intr will be called to emulate the interrupt 6164 */ 6165 static void 6166 ahci_port_intr(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, uint8_t port) 6167 { 6168 uint32_t port_intr_status; 6169 uint32_t port_intr_enable; 6170 6171 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6172 "ahci_port_intr enter: port %d", port); 6173 6174 mutex_enter(&ahci_portp->ahciport_mutex); 6175 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_POLLING) { 6176 /* For SATA_OPMODE_POLLING commands */ 6177 port_intr_enable = 6178 (AHCI_INTR_STATUS_DHRS | 6179 AHCI_INTR_STATUS_PSS | 6180 AHCI_INTR_STATUS_SDBS | 6181 AHCI_INTR_STATUS_UFS | 6182 AHCI_INTR_STATUS_PCS | 6183 AHCI_INTR_STATUS_PRCS | 6184 AHCI_INTR_STATUS_OFS | 6185 AHCI_INTR_STATUS_INFS | 6186 AHCI_INTR_STATUS_IFS | 6187 AHCI_INTR_STATUS_HBDS | 6188 AHCI_INTR_STATUS_HBFS | 6189 AHCI_INTR_STATUS_TFES); 6190 } else { 6191 /* 6192 * port_intr_enable indicates that the corresponding interrrupt 6193 * reporting is enabled. 6194 */ 6195 port_intr_enable = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6196 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port)); 6197 } 6198 6199 /* IPMS error in port reset should be ignored according AHCI spec. */ 6200 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_IGNORE_IPMS)) 6201 port_intr_enable |= AHCI_INTR_STATUS_IPMS; 6202 mutex_exit(&ahci_portp->ahciport_mutex); 6203 6204 /* 6205 * port_intr_stats indicates that the corresponding interrupt 6206 * condition is active. 6207 */ 6208 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6209 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 6210 6211 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6212 "ahci_port_intr: port %d, port_intr_status = 0x%x, " 6213 "port_intr_enable = 0x%x", 6214 port, port_intr_status, port_intr_enable); 6215 6216 port_intr_status &= port_intr_enable; 6217 6218 /* First clear the port interrupts status */ 6219 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6220 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 6221 port_intr_status); 6222 6223 /* Check the completed non-queued commands */ 6224 if (port_intr_status & (AHCI_INTR_STATUS_DHRS | 6225 AHCI_INTR_STATUS_PSS)) { 6226 (void) ahci_intr_cmd_cmplt(ahci_ctlp, 6227 ahci_portp, port); 6228 } 6229 6230 /* Check the completed queued commands */ 6231 if (port_intr_status & AHCI_INTR_STATUS_SDBS) { 6232 (void) ahci_intr_set_device_bits(ahci_ctlp, 6233 ahci_portp, port); 6234 } 6235 6236 /* Check the port connect change status interrupt bit */ 6237 if (port_intr_status & AHCI_INTR_STATUS_PCS) { 6238 (void) ahci_intr_port_connect_change(ahci_ctlp, 6239 ahci_portp, port); 6240 } 6241 6242 /* Check the device mechanical presence status interrupt bit */ 6243 if (port_intr_status & AHCI_INTR_STATUS_DMPS) { 6244 (void) ahci_intr_device_mechanical_presence_status( 6245 ahci_ctlp, ahci_portp, port); 6246 } 6247 6248 /* Check the PhyRdy change status interrupt bit */ 6249 if (port_intr_status & AHCI_INTR_STATUS_PRCS) { 6250 (void) ahci_intr_phyrdy_change(ahci_ctlp, ahci_portp, 6251 port); 6252 } 6253 6254 /* 6255 * Check the non-fatal error interrupt bits, there are four 6256 * kinds of non-fatal errors at the time being: 6257 * 6258 * PxIS.UFS - Unknown FIS Error 6259 * PxIS.OFS - Overflow Error 6260 * PxIS.INFS - Interface Non-Fatal Error 6261 * PxIS.IPMS - Incorrect Port Multiplier Status Error 6262 * 6263 * For these non-fatal errors, the HBA can continue to operate, 6264 * so the driver just log the error messages. 6265 */ 6266 if (port_intr_status & (AHCI_INTR_STATUS_UFS | 6267 AHCI_INTR_STATUS_OFS | 6268 AHCI_INTR_STATUS_IPMS | 6269 AHCI_INTR_STATUS_INFS)) { 6270 (void) ahci_intr_non_fatal_error(ahci_ctlp, ahci_portp, 6271 port, port_intr_status); 6272 } 6273 6274 /* 6275 * Check the fatal error interrupt bits, there are four kinds 6276 * of fatal errors for AHCI controllers: 6277 * 6278 * PxIS.HBFS - Host Bus Fatal Error 6279 * PxIS.HBDS - Host Bus Data Error 6280 * PxIS.IFS - Interface Fatal Error 6281 * PxIS.TFES - Task File Error 6282 * 6283 * The fatal error means the HBA can not recover from it by 6284 * itself, and it will try to abort the transfer, and the software 6285 * must intervene to restart the port. 6286 */ 6287 if (port_intr_status & (AHCI_INTR_STATUS_IFS | 6288 AHCI_INTR_STATUS_HBDS | 6289 AHCI_INTR_STATUS_HBFS | 6290 AHCI_INTR_STATUS_TFES)) 6291 (void) ahci_intr_fatal_error(ahci_ctlp, ahci_portp, 6292 port, port_intr_status); 6293 6294 /* Check the cold port detect interrupt bit */ 6295 if (port_intr_status & AHCI_INTR_STATUS_CPDS) { 6296 (void) ahci_intr_cold_port_detect(ahci_ctlp, ahci_portp, port); 6297 } 6298 6299 /* Second clear the corresponding bit in IS.IPS */ 6300 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6301 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp), (0x1 << port)); 6302 } 6303 6304 /* 6305 * Interrupt service handler 6306 */ 6307 static uint_t 6308 ahci_intr(caddr_t arg1, caddr_t arg2) 6309 { 6310 #ifndef __lock_lint 6311 _NOTE(ARGUNUSED(arg2)) 6312 #endif 6313 /* LINTED */ 6314 ahci_ctl_t *ahci_ctlp = (ahci_ctl_t *)arg1; 6315 ahci_port_t *ahci_portp; 6316 int32_t global_intr_status; 6317 uint8_t port; 6318 6319 /* 6320 * global_intr_status indicates that the corresponding port has 6321 * an interrupt pending. 6322 */ 6323 global_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6324 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp)); 6325 6326 if (!(global_intr_status & ahci_ctlp->ahcictl_ports_implemented)) { 6327 /* The interrupt is not ours */ 6328 return (DDI_INTR_UNCLAIMED); 6329 } 6330 6331 /* Loop for all the ports */ 6332 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 6333 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 6334 continue; 6335 } 6336 if (!((0x1 << port) & global_intr_status)) { 6337 continue; 6338 } 6339 6340 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 6341 6342 /* Call ahci_port_intr */ 6343 ahci_port_intr(ahci_ctlp, ahci_portp, port); 6344 } 6345 6346 return (DDI_INTR_CLAIMED); 6347 } 6348 6349 /* 6350 * For non-queued commands, when the corresponding bit in the PxCI register 6351 * is cleared, it means the command is completed successfully. And according 6352 * to the HBA state machine, there are three conditions which possibly will 6353 * try to clear the PxCI register bit. 6354 * 1. Receive one D2H Register FIS which is with 'I' bit set 6355 * 2. Update PIO Setup FIS 6356 * 3. Transmit a command and receive R_OK if CTBA.C is set (software reset) 6357 * 6358 * Process completed non-queued commands when the interrupt status bit - 6359 * AHCI_INTR_STATUS_DHRS or AHCI_INTR_STATUS_PSS is set. 6360 * 6361 * AHCI_INTR_STATUS_DHRS means a D2H Register FIS has been received 6362 * with the 'I' bit set. And the following commands will send thus 6363 * FIS with 'I' bit set upon the successful completion: 6364 * 1. Non-data commands 6365 * 2. DMA data-in command 6366 * 3. DMA data-out command 6367 * 4. PIO data-out command 6368 * 5. PACKET non-data commands 6369 * 6. PACKET PIO data-in command 6370 * 7. PACKET PIO data-out command 6371 * 8. PACKET DMA data-in command 6372 * 9. PACKET DMA data-out command 6373 * 6374 * AHCI_INTR_STATUS_PSS means a PIO Setup FIS has been received 6375 * with the 'I' bit set. And the following commands will send this 6376 * FIS upon the successful completion: 6377 * 1. PIO data-in command 6378 */ 6379 static int 6380 ahci_intr_cmd_cmplt(ahci_ctl_t *ahci_ctlp, 6381 ahci_port_t *ahci_portp, uint8_t port) 6382 { 6383 uint32_t port_cmd_issue = 0; 6384 uint32_t finished_tags; 6385 int finished_slot; 6386 sata_pkt_t *satapkt; 6387 ahci_fis_d2h_register_t *rcvd_fisp; 6388 #if AHCI_DEBUG 6389 ahci_cmd_header_t *cmd_header; 6390 uint32_t cmd_dmacount; 6391 #endif 6392 6393 mutex_enter(&ahci_portp->ahciport_mutex); 6394 6395 if (!ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 6396 !RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) && 6397 !NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 6398 /* 6399 * Spurious interrupt. Nothing to be done. 6400 */ 6401 mutex_exit(&ahci_portp->ahciport_mutex); 6402 return (AHCI_SUCCESS); 6403 } 6404 6405 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6406 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 6407 6408 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 6409 /* Slot 0 is always used during error recovery */ 6410 finished_tags = 0x1 & ~port_cmd_issue; 6411 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 6412 "ahci_intr_cmd_cmplt: port %d the sata pkt for error " 6413 "retrieval is finished, and finished_tags = 0x%x", 6414 port, finished_tags); 6415 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 6416 finished_tags = 0x1 & ~port_cmd_issue; 6417 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 6418 "ahci_intr_cmd_cmplt: port %d the sata pkt for r/w " 6419 "port multiplier is finished, and finished_tags = 0x%x", 6420 port, finished_tags); 6421 6422 } else { 6423 6424 finished_tags = ahci_portp->ahciport_pending_tags & 6425 ~port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp); 6426 } 6427 6428 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6429 "ahci_intr_cmd_cmplt: pending_tags = 0x%x, " 6430 "port_cmd_issue = 0x%x finished_tags = 0x%x", 6431 ahci_portp->ahciport_pending_tags, port_cmd_issue, 6432 finished_tags); 6433 6434 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 6435 (finished_tags == 0x1)) { 6436 satapkt = ahci_portp->ahciport_err_retri_pkt; 6437 ASSERT(satapkt != NULL); 6438 6439 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6440 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6441 "with SATA_PKT_COMPLETED", (void *)satapkt); 6442 6443 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6444 goto out; 6445 } 6446 6447 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) && 6448 (finished_tags == 0x1)) { 6449 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 6450 ASSERT(satapkt != NULL); 6451 6452 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6453 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6454 "with SATA_PKT_COMPLETED", (void *)satapkt); 6455 6456 /* READ PORTMULT need copy out FIS content. */ 6457 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 6458 rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 6459 ahcirf_d2h_register_fis); 6460 satapkt->satapkt_cmd.satacmd_status_reg = 6461 GET_RFIS_STATUS(rcvd_fisp); 6462 ahci_copy_out_regs(&satapkt->satapkt_cmd, rcvd_fisp); 6463 } 6464 6465 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6466 goto out; 6467 } 6468 6469 while (finished_tags) { 6470 finished_slot = ddi_ffs(finished_tags) - 1; 6471 if (finished_slot == -1) { 6472 goto out; 6473 } 6474 6475 satapkt = ahci_portp->ahciport_slot_pkts[finished_slot]; 6476 ASSERT(satapkt != NULL); 6477 #if AHCI_DEBUG 6478 /* 6479 * For non-native queued commands, the PRD byte count field 6480 * shall contain an accurate count of the number of bytes 6481 * transferred for the command before the PxCI bit is cleared 6482 * to '0' for the command. 6483 * 6484 * The purpose of this field is to let software know how many 6485 * bytes transferred for a given operation in order to 6486 * determine if underflow occurred. When issuing native command 6487 * queuing commands, this field should not be used and is not 6488 * required to be valid since in this case underflow is always 6489 * illegal. 6490 * 6491 * For data reads, the HBA will update its PRD byte count with 6492 * the total number of bytes received from the last FIS, and 6493 * may be able to continue normally. For data writes, the 6494 * device will detect an error, and HBA most likely will get 6495 * a fatal error. 6496 * 6497 * Therefore, here just put code to debug part. And please 6498 * refer to the comment above ahci_intr_fatal_error for the 6499 * definition of underflow error. 6500 */ 6501 cmd_dmacount = 6502 ahci_portp->ahciport_prd_bytecounts[finished_slot]; 6503 if (cmd_dmacount) { 6504 cmd_header = 6505 &ahci_portp->ahciport_cmd_list[finished_slot]; 6506 AHCIDBG(AHCIDBG_INTR|AHCIDBG_PRDT, ahci_ctlp, 6507 "ahci_intr_cmd_cmplt: port %d, " 6508 "PRD Byte Count = 0x%x, " 6509 "ahciport_prd_bytecounts = 0x%x", port, 6510 cmd_header->ahcich_prd_byte_count, 6511 cmd_dmacount); 6512 6513 if (cmd_header->ahcich_prd_byte_count != cmd_dmacount) { 6514 AHCIDBG(AHCIDBG_UNDERFLOW, ahci_ctlp, 6515 "ahci_intr_cmd_cmplt: port %d, " 6516 "an underflow occurred", port); 6517 } 6518 } 6519 #endif 6520 6521 /* 6522 * For SATAC_SMART command with SATA_SMART_RETURN_STATUS 6523 * feature, sata_special_regs flag will be set, and the 6524 * driver should copy the status and the other corresponding 6525 * register values in the D2H Register FIS received (It's 6526 * working on Non-data protocol) from the device back to 6527 * the sata_cmd. 6528 * 6529 * For every AHCI port, there is only one Received FIS 6530 * structure, which contains the FISes received from the 6531 * device, So we're trying to copy the content of D2H 6532 * Register FIS in the Received FIS structure back to 6533 * the sata_cmd. 6534 */ 6535 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 6536 rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 6537 ahcirf_d2h_register_fis); 6538 satapkt->satapkt_cmd.satacmd_status_reg = 6539 GET_RFIS_STATUS(rcvd_fisp); 6540 ahci_copy_out_regs(&satapkt->satapkt_cmd, rcvd_fisp); 6541 } 6542 6543 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6544 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6545 "with SATA_PKT_COMPLETED", (void *)satapkt); 6546 6547 CLEAR_BIT(ahci_portp->ahciport_pending_tags, finished_slot); 6548 CLEAR_BIT(finished_tags, finished_slot); 6549 ahci_portp->ahciport_slot_pkts[finished_slot] = NULL; 6550 6551 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6552 } 6553 out: 6554 AHCIDBG(AHCIDBG_PKTCOMP, ahci_ctlp, 6555 "ahci_intr_cmd_cmplt: pending_tags = 0x%x", 6556 ahci_portp->ahciport_pending_tags); 6557 6558 mutex_exit(&ahci_portp->ahciport_mutex); 6559 6560 return (AHCI_SUCCESS); 6561 } 6562 6563 /* 6564 * AHCI_INTR_STATUS_SDBS means a Set Device Bits FIS has been received 6565 * with the 'I' bit set and has been copied into system memory. It will 6566 * be sent under the following situations: 6567 * 6568 * 1. NCQ command is completed 6569 * 6570 * The completion of NCQ commands (READ/WRITE FPDMA QUEUED) is performed 6571 * via the Set Device Bits FIS. When such event is generated, the software 6572 * needs to read PxSACT register and compares the current value to the 6573 * list of commands previously issue by software. ahciport_pending_ncq_tags 6574 * keeps the tags of previously issued commands. 6575 * 6576 * 2. Asynchronous Notification 6577 * 6578 * Asynchronous Notification is a feature in SATA spec 2.6. 6579 * 6580 * 1) ATAPI device will send a signal to the host when media is inserted or 6581 * removed and avoids polling the device for media changes. The signal 6582 * sent to the host is a Set Device Bits FIS with the 'I' and 'N' bits 6583 * set to '1'. At the moment, it's not supported yet. 6584 * 6585 * 2) Port multiplier will send a signal to the host when a hot plug event 6586 * has occured on a port multiplier port. It is used when command based 6587 * switching is employed. This is handled by ahci_intr_pmult_sntf_events() 6588 */ 6589 static int 6590 ahci_intr_set_device_bits(ahci_ctl_t *ahci_ctlp, 6591 ahci_port_t *ahci_portp, uint8_t port) 6592 { 6593 ahci_addr_t addr; 6594 6595 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 6596 "ahci_intr_set_device_bits enter: port %d", port); 6597 6598 /* Initialize HBA port address */ 6599 AHCI_ADDR_SET_PORT(&addr, port); 6600 6601 /* NCQ plug handler */ 6602 (void) ahci_intr_ncq_events(ahci_ctlp, ahci_portp, &addr); 6603 6604 /* Check port multiplier's asynchronous notification events */ 6605 if (ahci_ctlp->ahcictl_cap & AHCI_CAP_SNTF) { 6606 (void) ahci_intr_pmult_sntf_events(ahci_ctlp, 6607 ahci_portp, port); 6608 } 6609 6610 /* ATAPI events is not supported yet */ 6611 6612 return (AHCI_SUCCESS); 6613 } 6614 /* 6615 * NCQ interrupt handler. Called upon a NCQ command is completed. 6616 * Only be called from ahci_intr_set_device_bits(). 6617 * 6618 * WARNING!!! ahciport_mutex should be acquired before the function is 6619 * called. 6620 */ 6621 static int 6622 ahci_intr_ncq_events(ahci_ctl_t *ahci_ctlp, 6623 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 6624 { 6625 uint32_t port_sactive; 6626 uint32_t port_cmd_issue; 6627 uint32_t issued_tags; 6628 int issued_slot; 6629 uint32_t finished_tags; 6630 int finished_slot; 6631 uint8_t port = addrp->aa_port; 6632 sata_pkt_t *satapkt; 6633 6634 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6635 "ahci_intr_set_device_bits enter: port %d", port); 6636 6637 mutex_enter(&ahci_portp->ahciport_mutex); 6638 if (!NCQ_CMD_IN_PROGRESS(ahci_portp)) { 6639 mutex_exit(&ahci_portp->ahciport_mutex); 6640 return (AHCI_SUCCESS); 6641 } 6642 6643 /* 6644 * First the handler got which commands are finished by checking 6645 * PxSACT register 6646 */ 6647 port_sactive = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6648 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 6649 6650 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 6651 ~port_sactive & AHCI_NCQ_SLOT_MASK(ahci_portp); 6652 6653 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6654 "ahci_intr_set_device_bits: port %d pending_ncq_tags = 0x%x " 6655 "port_sactive = 0x%x", port, 6656 ahci_portp->ahciport_pending_ncq_tags, port_sactive); 6657 6658 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6659 "ahci_intr_set_device_bits: finished_tags = 0x%x", finished_tags); 6660 6661 /* 6662 * For NCQ commands, the software can determine which command has 6663 * already been transmitted to the device by checking PxCI register. 6664 */ 6665 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6666 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 6667 6668 issued_tags = ahci_portp->ahciport_pending_tags & 6669 ~port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp); 6670 6671 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6672 "ahci_intr_set_device_bits: port %d pending_tags = 0x%x " 6673 "port_cmd_issue = 0x%x", port, 6674 ahci_portp->ahciport_pending_tags, port_cmd_issue); 6675 6676 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6677 "ahci_intr_set_device_bits: issued_tags = 0x%x", issued_tags); 6678 6679 /* 6680 * Clear ahciport_pending_tags bit when the corresponding command 6681 * is already sent down to the device. 6682 */ 6683 while (issued_tags) { 6684 issued_slot = ddi_ffs(issued_tags) - 1; 6685 if (issued_slot == -1) { 6686 goto next; 6687 } 6688 CLEAR_BIT(ahci_portp->ahciport_pending_tags, issued_slot); 6689 CLEAR_BIT(issued_tags, issued_slot); 6690 } 6691 6692 next: 6693 while (finished_tags) { 6694 finished_slot = ddi_ffs(finished_tags) - 1; 6695 if (finished_slot == -1) { 6696 goto out; 6697 } 6698 6699 /* The command is certainly transmitted to the device */ 6700 ASSERT(!(ahci_portp->ahciport_pending_tags & 6701 (0x1 << finished_slot))); 6702 6703 satapkt = ahci_portp->ahciport_slot_pkts[finished_slot]; 6704 ASSERT(satapkt != NULL); 6705 6706 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6707 "ahci_intr_set_device_bits: sending up pkt 0x%p " 6708 "with SATA_PKT_COMPLETED", (void *)satapkt); 6709 6710 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, finished_slot); 6711 CLEAR_BIT(finished_tags, finished_slot); 6712 ahci_portp->ahciport_slot_pkts[finished_slot] = NULL; 6713 6714 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6715 } 6716 out: 6717 AHCIDBG(AHCIDBG_PKTCOMP|AHCIDBG_NCQ, ahci_ctlp, 6718 "ahci_intr_set_device_bits: port %d " 6719 "pending_ncq_tags = 0x%x pending_tags = 0x%x", 6720 port, ahci_portp->ahciport_pending_ncq_tags, 6721 ahci_portp->ahciport_pending_tags); 6722 6723 mutex_exit(&ahci_portp->ahciport_mutex); 6724 6725 return (AHCI_SUCCESS); 6726 } 6727 6728 /* 6729 * Port multiplier asynchronous notification event handler. Called upon a 6730 * device is hot plugged/pulled. 6731 * 6732 * The async-notification event will only be recorded by ahcipmi_snotif_tags 6733 * here and will be handled by ahci_probe_pmult(). 6734 * 6735 * NOTE: called only from ahci_port_intr(). 6736 */ 6737 static int 6738 ahci_intr_pmult_sntf_events(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 6739 uint8_t port) 6740 { 6741 sata_device_t sdevice; 6742 6743 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 6744 "ahci_intr_pmult_sntf_events enter: port %d ", port); 6745 6746 /* no hot-plug while attaching process */ 6747 mutex_enter(&ahci_ctlp->ahcictl_mutex); 6748 if (ahci_ctlp->ahcictl_flags & AHCI_ATTACH) { 6749 mutex_exit(&ahci_ctlp->ahcictl_mutex); 6750 return (AHCI_SUCCESS); 6751 } 6752 mutex_exit(&ahci_ctlp->ahcictl_mutex); 6753 6754 mutex_enter(&ahci_portp->ahciport_mutex); 6755 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 6756 mutex_exit(&ahci_portp->ahciport_mutex); 6757 return (AHCI_SUCCESS); 6758 } 6759 6760 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 6761 6762 ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags = 6763 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6764 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port)); 6765 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6766 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 6767 AHCI_SNOTIF_CLEAR_ALL); 6768 6769 if (ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags == 0) { 6770 mutex_exit(&ahci_portp->ahciport_mutex); 6771 return (AHCI_SUCCESS); 6772 } 6773 6774 /* Port Multiplier sub-device hot-plug handler */ 6775 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 6776 mutex_exit(&ahci_portp->ahciport_mutex); 6777 return (AHCI_SUCCESS); 6778 } 6779 6780 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_PMULT_SNTF) { 6781 /* Not allowed to re-enter. */ 6782 mutex_exit(&ahci_portp->ahciport_mutex); 6783 return (AHCI_SUCCESS); 6784 } 6785 6786 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_PMULT_SNTF; 6787 6788 /* 6789 * NOTE: 6790 * Even if Asynchronous Notification is supported (and enabled) by 6791 * both controller and the port multiplier, the content of PxSNTF 6792 * register is always set to 0x8000 by async notification event. We 6793 * need to check GSCR[32] on the port multiplier to find out the 6794 * owner of this event. 6795 * This is not accord with SATA spec 2.6 and needs further 6796 * clarification. 6797 */ 6798 /* hot-plug will not reported while reseting. */ 6799 if (ahci_portp->ahciport_reset_in_progress == 1) { 6800 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 6801 "port %d snotif event ignored", port); 6802 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_PMULT_SNTF; 6803 mutex_exit(&ahci_portp->ahciport_mutex); 6804 return (AHCI_SUCCESS); 6805 } 6806 6807 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 6808 "PxSNTF is set to 0x%x by port multiplier", 6809 ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags); 6810 6811 /* 6812 * Now we need do some necessary operation and inform SATA framework 6813 * that link/device events has happened. 6814 */ 6815 bzero((void *)&sdevice, sizeof (sata_device_t)); 6816 sdevice.satadev_addr.cport = ahci_ctlp-> 6817 ahcictl_port_to_cport[port]; 6818 sdevice.satadev_addr.pmport = SATA_PMULT_HOSTPORT; 6819 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 6820 sdevice.satadev_state = SATA_PSTATE_PWRON; 6821 6822 /* Just reject packets, do not stop that port. */ 6823 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 6824 6825 mutex_exit(&ahci_portp->ahciport_mutex); 6826 sata_hba_event_notify( 6827 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 6828 &sdevice, 6829 SATA_EVNT_PMULT_LINK_CHANGED); 6830 mutex_enter(&ahci_portp->ahciport_mutex); 6831 6832 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_PMULT_SNTF; 6833 mutex_exit(&ahci_portp->ahciport_mutex); 6834 6835 return (AHCI_SUCCESS); 6836 } 6837 6838 /* 6839 * 1=Change in Current Connect Status. 0=No change in Current Connect Status. 6840 * This bit reflects the state of PxSERR.DIAG.X. This bit is only cleared 6841 * when PxSERR.DIAG.X is cleared. When PxSERR.DIAG.X is set to one, it 6842 * indicates a COMINIT signal was received. 6843 * 6844 * Hot plug insertion is detected by reception of a COMINIT signal from the 6845 * device. On reception of unsolicited COMINIT, the HBA shall generate a 6846 * COMRESET. If the COMINIT is in responce to a COMRESET, then the HBA shall 6847 * begin the normal communication negotiation sequence as outlined in the 6848 * Serial ATA 1.0a specification. When a COMRESET is sent to the device the 6849 * PxSSTS.DET field shall be cleared to 0h. When a COMINIT is received, the 6850 * PxSSTS.DET field shall be set to 1h. When the communication negotiation 6851 * sequence is complete and PhyRdy is true the PxSSTS.DET field shall be set 6852 * to 3h. Therefore, at the moment the ahci driver is going to check PhyRdy 6853 * to handle hot plug insertion. In this interrupt handler, just do nothing 6854 * but print some log message and clear the bit. 6855 */ 6856 static int 6857 ahci_intr_port_connect_change(ahci_ctl_t *ahci_ctlp, 6858 ahci_port_t *ahci_portp, uint8_t port) 6859 { 6860 #if AHCI_DEBUG 6861 uint32_t port_serror; 6862 #endif 6863 6864 mutex_enter(&ahci_portp->ahciport_mutex); 6865 6866 #if AHCI_DEBUG 6867 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6868 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 6869 6870 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6871 "ahci_intr_port_connect_change: port %d, " 6872 "port_serror = 0x%x", port, port_serror); 6873 #endif 6874 6875 /* Clear PxSERR.DIAG.X to clear the interrupt bit */ 6876 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6877 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 6878 SERROR_EXCHANGED_ERR); 6879 6880 mutex_exit(&ahci_portp->ahciport_mutex); 6881 6882 return (AHCI_SUCCESS); 6883 } 6884 6885 /* 6886 * Hot Plug Operation for platforms that support Mechanical Presence 6887 * Switches. 6888 * 6889 * When set, it indicates that a mechanical presence switch attached to this 6890 * port has been opened or closed, which may lead to a change in the connection 6891 * state of the device. This bit is only valid if both CAP.SMPS and PxCMD.MPSP 6892 * are set to '1'. 6893 * 6894 * At the moment, this interrupt is not needed and disabled and we just log 6895 * the debug message. 6896 */ 6897 static int 6898 ahci_intr_device_mechanical_presence_status(ahci_ctl_t *ahci_ctlp, 6899 ahci_port_t *ahci_portp, uint8_t port) 6900 { 6901 uint32_t cap_status, port_cmd_status; 6902 6903 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6904 "ahci_intr_device_mechanical_presence_status enter, " 6905 "port %d", port); 6906 6907 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6908 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 6909 6910 mutex_enter(&ahci_portp->ahciport_mutex); 6911 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6912 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 6913 6914 if (!(cap_status & AHCI_HBA_CAP_SMPS) || 6915 !(port_cmd_status & AHCI_CMD_STATUS_MPSP)) { 6916 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6917 "CAP.SMPS or PxCMD.MPSP is not set, so just ignore " 6918 "the interrupt: cap_status = 0x%x, " 6919 "port_cmd_status = 0x%x", cap_status, port_cmd_status); 6920 mutex_exit(&ahci_portp->ahciport_mutex); 6921 6922 return (AHCI_SUCCESS); 6923 } 6924 6925 #if AHCI_DEBUG 6926 if (port_cmd_status & AHCI_CMD_STATUS_MPSS) { 6927 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6928 "The mechanical presence switch is open: " 6929 "port %d, port_cmd_status = 0x%x", 6930 port, port_cmd_status); 6931 } else { 6932 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6933 "The mechanical presence switch is close: " 6934 "port %d, port_cmd_status = 0x%x", 6935 port, port_cmd_status); 6936 } 6937 #endif 6938 6939 mutex_exit(&ahci_portp->ahciport_mutex); 6940 6941 return (AHCI_SUCCESS); 6942 } 6943 6944 /* 6945 * Native Hot Plug Support. 6946 * 6947 * When set, it indicates that the internal PHYRDY signal changed state. 6948 * This bit reflects the state of PxSERR.DIAG.N. 6949 * 6950 * There are three kinds of conditions to generate this interrupt event: 6951 * 1. a device is inserted 6952 * 2. a device is disconnected 6953 * 3. when the link enters/exits a Partial or Slumber interface power 6954 * management state 6955 * 6956 * If inteface power management is enabled for a port, the PxSERR.DIAG.N 6957 * bit may be set due to the link entering the Partial or Slumber power 6958 * management state, rather than due to a hot plug insertion or removal 6959 * event. So far, the interface power management is disabled, so the 6960 * driver can reliably get removal detection notification via the 6961 * PxSERR.DIAG.N bit. 6962 */ 6963 static int 6964 ahci_intr_phyrdy_change(ahci_ctl_t *ahci_ctlp, 6965 ahci_port_t *ahci_portp, uint8_t port) 6966 { 6967 uint32_t port_sstatus = 0; /* No dev present & PHY not established. */ 6968 sata_device_t sdevice; 6969 int dev_exists_now = 0; 6970 int dev_existed_previously = 0; 6971 ahci_addr_t port_addr; 6972 6973 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6974 "ahci_intr_phyrdy_change enter, port %d", port); 6975 6976 /* Clear PxSERR.DIAG.N to clear the interrupt bit */ 6977 mutex_enter(&ahci_portp->ahciport_mutex); 6978 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6979 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 6980 SERROR_PHY_RDY_CHG); 6981 mutex_exit(&ahci_portp->ahciport_mutex); 6982 6983 mutex_enter(&ahci_ctlp->ahcictl_mutex); 6984 if ((ahci_ctlp->ahcictl_sata_hba_tran == NULL) || 6985 (ahci_portp == NULL)) { 6986 /* The whole controller setup is not yet done. */ 6987 mutex_exit(&ahci_ctlp->ahcictl_mutex); 6988 return (AHCI_SUCCESS); 6989 } 6990 mutex_exit(&ahci_ctlp->ahcictl_mutex); 6991 6992 mutex_enter(&ahci_portp->ahciport_mutex); 6993 6994 /* SStatus tells the presence of device. */ 6995 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6996 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 6997 6998 if (SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_PHYCOM) { 6999 dev_exists_now = 1; 7000 } 7001 7002 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) { 7003 dev_existed_previously = 1; 7004 } 7005 7006 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_NODEV) { 7007 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_NODEV; 7008 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7009 "ahci_intr_phyrdy_change: port %d " 7010 "AHCI_PORT_FLAG_NODEV is cleared", port); 7011 if (dev_exists_now == 0) 7012 dev_existed_previously = 1; 7013 } 7014 7015 bzero((void *)&sdevice, sizeof (sata_device_t)); 7016 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 7017 sdevice.satadev_addr.qual = SATA_ADDR_CPORT; 7018 sdevice.satadev_addr.pmport = 0; 7019 sdevice.satadev_state = SATA_PSTATE_PWRON; 7020 ahci_portp->ahciport_port_state = SATA_PSTATE_PWRON; 7021 7022 AHCI_ADDR_SET_PORT(&port_addr, port); 7023 7024 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_HOTPLUG; 7025 if (dev_exists_now) { 7026 if (dev_existed_previously) { /* 1 -> 1 */ 7027 /* Things are fine now. The loss was temporary. */ 7028 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7029 "ahci_intr_phyrdy_change port %d " 7030 "device link lost/established", port); 7031 7032 mutex_exit(&ahci_portp->ahciport_mutex); 7033 sata_hba_event_notify( 7034 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7035 &sdevice, 7036 SATA_EVNT_LINK_LOST|SATA_EVNT_LINK_ESTABLISHED); 7037 mutex_enter(&ahci_portp->ahciport_mutex); 7038 7039 } else { /* 0 -> 1 */ 7040 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7041 "ahci_intr_phyrdy_change: port %d " 7042 "device link established", port); 7043 7044 /* 7045 * A new device has been detected. The new device 7046 * might be a port multiplier instead of a drive, so 7047 * we cannot update the signature directly. 7048 */ 7049 (void) ahci_initialize_port(ahci_ctlp, 7050 ahci_portp, &port_addr); 7051 7052 /* Try to start the port */ 7053 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 7054 != AHCI_SUCCESS) { 7055 sdevice.satadev_state |= SATA_PSTATE_FAILED; 7056 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7057 "ahci_intr_phyrdy_change: port %d failed " 7058 "at start port", port); 7059 } 7060 7061 /* Clear the max queue depth for inserted device */ 7062 ahci_portp->ahciport_max_ncq_tags = 0; 7063 7064 mutex_exit(&ahci_portp->ahciport_mutex); 7065 sata_hba_event_notify( 7066 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7067 &sdevice, 7068 SATA_EVNT_LINK_ESTABLISHED); 7069 mutex_enter(&ahci_portp->ahciport_mutex); 7070 7071 } 7072 } else { /* No device exists now */ 7073 7074 if (dev_existed_previously) { /* 1 -> 0 */ 7075 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7076 "ahci_intr_phyrdy_change: port %d " 7077 "device link lost", port); 7078 7079 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 7080 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 7081 ahci_portp, port); 7082 7083 if (ahci_portp->ahciport_device_type == 7084 SATA_DTYPE_PMULT) { 7085 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 7086 } 7087 7088 /* An existing device is lost. */ 7089 ahci_portp->ahciport_device_type = SATA_DTYPE_NONE; 7090 ahci_portp->ahciport_port_state = SATA_STATE_UNKNOWN; 7091 7092 mutex_exit(&ahci_portp->ahciport_mutex); 7093 sata_hba_event_notify( 7094 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7095 &sdevice, 7096 SATA_EVNT_LINK_LOST); 7097 mutex_enter(&ahci_portp->ahciport_mutex); 7098 } 7099 } 7100 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_HOTPLUG; 7101 7102 mutex_exit(&ahci_portp->ahciport_mutex); 7103 7104 return (AHCI_SUCCESS); 7105 } 7106 7107 /* 7108 * PxIS.UFS - Unknown FIS Error 7109 * 7110 * This interrupt event means an unknown FIS was received and has been 7111 * copied into system memory. An unknown FIS is not considered an illegal 7112 * FIS, unless the length received is more than 64 bytes. If an unknown 7113 * FIS arrives with length <= 64 bytes, it is posted and the HBA continues 7114 * normal operation. If the unknown FIS is more than 64 bytes, then it 7115 * won't be posted to memory and PxSERR.ERR.P will be set, which is then 7116 * a fatal error. 7117 * 7118 * PxIS.IPMS - Incorrect Port Multiplier Status 7119 * 7120 * IPMS Indicates that the HBA received a FIS from a device that did not 7121 * have a command outstanding. The IPMS bit may be set during enumeration 7122 * of devices on a Port Multiplier due to the normal Port Multiplier 7123 * enumeration process. It is recommended that IPMS only be used after 7124 * enumeration is complete on the Port Multiplier (copied from spec). 7125 * 7126 * PxIS.OFS - Overflow Error 7127 * 7128 * Command list overflow is defined as software building a command table 7129 * that has fewer total bytes than the transaction given to the device. 7130 * On device writes, the HBA will run out of data, and on reads, there 7131 * will be no room to put the data. 7132 * 7133 * For an overflow on data read, either PIO or DMA, the HBA will set 7134 * PxIS.OFS, and the HBA will do a best effort to continue, and it's a 7135 * non-fatal error when the HBA can continues. Sometimes, it will cause 7136 * a fatal error and need the software to do something. 7137 * 7138 * For an overflow on data write, setting PxIS.OFS is optional for both 7139 * DMA and PIO, and it's a fatal error, and a COMRESET is required by 7140 * software to clean up from this serious error. 7141 * 7142 * PxIS.INFS - Interface Non-Fatal Error 7143 * 7144 * This interrupt event indicates that the HBA encountered an error on 7145 * the Serial ATA interface but was able to continue operation. The kind 7146 * of error usually occurred during a non-Data FIS, and under this condition 7147 * the FIS will be re-transmitted by HBA automatically. 7148 * 7149 * When the FMA is implemented, there should be a stat structure to 7150 * record how many every kind of error happens. 7151 */ 7152 static int 7153 ahci_intr_non_fatal_error(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 7154 uint8_t port, uint32_t intr_status) 7155 { 7156 uint32_t port_serror; 7157 #if AHCI_DEBUG 7158 uint32_t port_cmd_status; 7159 uint32_t port_cmd_issue; 7160 uint32_t port_sactive; 7161 int current_slot; 7162 uint32_t current_tags; 7163 sata_pkt_t *satapkt; 7164 ahci_cmd_header_t *cmd_header; 7165 uint32_t cmd_dmacount; 7166 #endif 7167 7168 mutex_enter(&ahci_portp->ahciport_mutex); 7169 7170 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7171 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 7172 7173 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY|AHCIDBG_ERRS, ahci_ctlp, 7174 "ahci_intr_non_fatal_error: port %d, " 7175 "PxSERR = 0x%x, PxIS = 0x%x ", port, port_serror, intr_status); 7176 7177 ahci_log_serror_message(ahci_ctlp, port, port_serror, 1); 7178 7179 if (intr_status & AHCI_INTR_STATUS_UFS) { 7180 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7181 "ahci port %d has unknown FIS error", port); 7182 7183 /* Clear the interrupt bit by clearing PxSERR.DIAG.F */ 7184 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7185 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 7186 SERROR_FIS_TYPE); 7187 } 7188 7189 #if AHCI_DEBUG 7190 if (intr_status & AHCI_INTR_STATUS_IPMS) { 7191 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci port %d " 7192 "has Incorrect Port Multiplier Status error", port); 7193 } 7194 7195 if (intr_status & AHCI_INTR_STATUS_OFS) { 7196 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7197 "ahci port %d has overflow error", port); 7198 } 7199 7200 if (intr_status & AHCI_INTR_STATUS_INFS) { 7201 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7202 "ahci port %d has interface non fatal error", port); 7203 } 7204 7205 /* 7206 * Record the error occurred command's slot. 7207 */ 7208 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 7209 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 7210 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7211 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7212 7213 current_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 7214 AHCI_CMD_STATUS_CCS_SHIFT; 7215 7216 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 7217 satapkt = ahci_portp->ahciport_err_retri_pkt; 7218 ASSERT(satapkt != NULL); 7219 ASSERT(current_slot == 0); 7220 } else { 7221 satapkt = ahci_portp->ahciport_slot_pkts[current_slot]; 7222 } 7223 7224 if (satapkt != NULL) { 7225 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7226 "ahci_intr_non_fatal_error: pending_tags = 0x%x " 7227 "cmd 0x%x", ahci_portp->ahciport_pending_tags, 7228 satapkt->satapkt_cmd.satacmd_cmd_reg); 7229 7230 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7231 "ahci_intr_non_fatal_error: port %d, " 7232 "satapkt 0x%p is being processed when error occurs", 7233 port, (void *)satapkt); 7234 7235 /* 7236 * PRD Byte Count field of command header is not 7237 * required to reflect the total number of bytes 7238 * transferred when an overflow occurs, so here 7239 * just log the value. 7240 */ 7241 cmd_dmacount = 7242 ahci_portp->ahciport_prd_bytecounts[current_slot]; 7243 if (cmd_dmacount) { 7244 cmd_header = &ahci_portp-> 7245 ahciport_cmd_list[current_slot]; 7246 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7247 "ahci_intr_non_fatal_error: port %d, " 7248 "PRD Byte Count = 0x%x, " 7249 "ahciport_prd_bytecounts = 0x%x", port, 7250 cmd_header->ahcich_prd_byte_count, 7251 cmd_dmacount); 7252 } 7253 } 7254 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 7255 /* 7256 * For queued command, list those command which have already 7257 * been transmitted to the device and still not completed. 7258 */ 7259 port_sactive = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7260 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 7261 7262 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7263 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 7264 7265 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ|AHCIDBG_ERRS, ahci_ctlp, 7266 "ahci_intr_non_fatal_error: pending_ncq_tags = 0x%x " 7267 "port_sactive = 0x%x port_cmd_issue = 0x%x", 7268 ahci_portp->ahciport_pending_ncq_tags, 7269 port_sactive, port_cmd_issue); 7270 7271 current_tags = ahci_portp->ahciport_pending_ncq_tags & 7272 port_sactive & ~port_cmd_issue & 7273 AHCI_NCQ_SLOT_MASK(ahci_portp); 7274 7275 while (current_tags) { 7276 current_slot = ddi_ffs(current_tags) - 1; 7277 if (current_slot == -1) { 7278 goto out; 7279 } 7280 7281 satapkt = ahci_portp->ahciport_slot_pkts[current_slot]; 7282 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ|AHCIDBG_ERRS, 7283 ahci_ctlp, "ahci_intr_non_fatal_error: " 7284 "port %d, satapkt 0x%p is outstanding when " 7285 "error occurs", port, (void *)satapkt); 7286 7287 CLEAR_BIT(current_tags, current_slot); 7288 } 7289 } 7290 out: 7291 #endif 7292 mutex_exit(&ahci_portp->ahciport_mutex); 7293 7294 return (AHCI_SUCCESS); 7295 } 7296 7297 /* 7298 * According to the AHCI spec, the error types include system memory 7299 * errors, interface errors, port multiplier errors, device errors, 7300 * command list overflow, command list underflow, native command 7301 * queuing tag errors and pio data transfer errors. 7302 * 7303 * System memory errors such as target abort, master abort, and parity 7304 * may cause the host to stop, and they are serious errors and needed 7305 * to be recovered with software intervention. When system software 7306 * has given a pointer to the HBA that doesn't exist in physical memory, 7307 * a master/target abort error occurs, and PxIS.HBFS will be set. A 7308 * data error such as CRC or parity occurs, the HBA aborts the transfer 7309 * (if necessary) and PxIS.HBDS will be set. 7310 * 7311 * Interface errors are errors that occur due to electrical issues on 7312 * the interface, or protocol miscommunication between the device and 7313 * HBA, and the respective PxSERR register bit will be set. And PxIS.IFS 7314 * (fatal) or PxIS.INFS (non-fatal) will be set. The conditions that 7315 * causes PxIS.IFS/PxIS.INFS to be set are 7316 * 1. in PxSERR.ERR, P bit is set to '1' 7317 * 2. in PxSERR.DIAG, C or H bit is set to '1' 7318 * 3. PhyRdy drop unexpectly, N bit is set to '1' 7319 * If the error occurred during a non-data FIS, the FIS must be 7320 * retransmitted, and the error is non-fatal and PxIS.INFS is set. If 7321 * the error occurred during a data FIS, the transfer will stop, so 7322 * the error is fatal and PxIS.IFS is set. 7323 * 7324 * When a FIS arrives that updates the taskfile, the HBA checks to see 7325 * if PxTFD.STS.ERR is set. If yes, PxIS.TFES will be set and the HBA 7326 * stops processing any more commands. 7327 * 7328 * Command list overflow is defined as software building a command table 7329 * that has fewer total bytes than the transaction given to the device. 7330 * On device writes, the HBA will run out of data, and on reads, there 7331 * will be no room to put the data. For an overflow on data read, either 7332 * PIO or DMA, the HBA will set PxIS.OFS, and it's a non-fatal error. 7333 * For an overflow on data write, setting PxIS.OFS is optional for both 7334 * DMA and PIO, and a COMRESET is required by software to clean up from 7335 * this serious error. 7336 * 7337 * Command list underflow is defined as software building a command 7338 * table that has more total bytes than the transaction given to the 7339 * device. For data writes, both PIO and DMA, the device will detect 7340 * an error and end the transfer. And these errors are most likely going 7341 * to be fatal errors that will cause the port to be restarted. For 7342 * data reads, the HBA updates its PRD byte count, and may be 7343 * able to continue normally, but is not required to. And The HBA is 7344 * not required to detect underflow conditions for native command 7345 * queuing command. 7346 * 7347 * The HBA does not actively check incoming DMA Setup FISes to ensure 7348 * that the PxSACT register bit for that slot is set. Existing error 7349 * mechanisms, such as host bus failure, or bad protocol, are used to 7350 * recover from this case. 7351 * 7352 * In accordance with Serial ATA 1.0a, DATA FISes prior to the final 7353 * DATA FIS must be an integral number of Dwords. If the HBA receives 7354 * a request which is not an integral number of Dwords, the HBA 7355 * set PxSERR.ERR.P to '1', set PxIS.IFS to '1' and stop running until 7356 * software restarts the port. And the HBA ensures that the size 7357 * of the DATA FIS received during a PIO command matches the size in 7358 * the Transfer Cound field of the preceding PIO Setup FIS, if not, the 7359 * HBA sets PxSERR.ERR.P to '1', set PxIS.IFS to '1', and then 7360 * stop running until software restarts the port. 7361 */ 7362 /* 7363 * the fatal errors include PxIS.IFS, PxIS.HBDS, PxIS.HBFS and PxIS.TFES. 7364 * 7365 * PxIS.IFS indicates that the hba encountered an error on the serial ata 7366 * interface which caused the transfer to stop. 7367 * 7368 * PxIS.HBDS indicates that the hba encountered a data error 7369 * (uncorrectable ecc/parity) when reading from or writing to system memory. 7370 * 7371 * PxIS.HBFS indicates that the hba encountered a host bus error that it 7372 * cannot recover from, such as a bad software pointer. 7373 * 7374 * PxIS.TFES is set whenever the status register is updated by the device 7375 * and the error bit (bit 0) is set. 7376 */ 7377 static int 7378 ahci_intr_fatal_error(ahci_ctl_t *ahci_ctlp, 7379 ahci_port_t *ahci_portp, uint8_t port, uint32_t intr_status) 7380 { 7381 uint32_t port_cmd_status; 7382 uint32_t port_serror; 7383 uint32_t task_file_status; 7384 int failed_slot; 7385 sata_pkt_t *spkt = NULL; 7386 uint8_t err_byte; 7387 ahci_event_arg_t *args; 7388 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 7389 7390 mutex_enter(&ahci_portp->ahciport_mutex); 7391 7392 /* 7393 * ahci_intr_phyrdy_change() may have rendered it to 7394 * SATA_DTYPE_NONE. 7395 */ 7396 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 7397 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 7398 "ahci_intr_fatal_error: port %d no device attached, " 7399 "and just return without doing anything", port); 7400 goto out0; 7401 } 7402 7403 if (intr_status & AHCI_INTR_STATUS_TFES) { 7404 task_file_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7405 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 7406 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7407 "ahci_intr_fatal_error: port %d " 7408 "task_file_status = 0x%x", port, task_file_status); 7409 } 7410 7411 /* 7412 * Here we just log the fatal error info in interrupt context. 7413 * Misc recovery processing will be handled in task queue. 7414 */ 7415 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 7416 /* 7417 * Read PxCMD.CCS to determine the slot that the HBA 7418 * was processing when the error occurred. 7419 */ 7420 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7421 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7422 failed_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 7423 AHCI_CMD_STATUS_CCS_SHIFT; 7424 7425 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 7426 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7427 "ahci_intr_fatal_error: spkt 0x%p is being processed when " 7428 "fatal error occurred for port %d", spkt, port); 7429 7430 /* A Task File Data error. */ 7431 if (intr_status & AHCI_INTR_STATUS_TFES) { 7432 err_byte = (task_file_status & AHCI_TFD_ERR_MASK) 7433 >> AHCI_TFD_ERR_SHIFT; 7434 7435 /* 7436 * Won't emit the error message if it is an IDENTIFY 7437 * DEVICE command sent to an ATAPI device. 7438 */ 7439 if ((spkt != NULL) && 7440 (spkt->satapkt_cmd.satacmd_cmd_reg == 7441 SATAC_ID_DEVICE) && 7442 (err_byte == SATA_ERROR_ABORT)) 7443 goto out1; 7444 7445 /* 7446 * Won't emit the error message if it is an ATAPI PACKET 7447 * command 7448 */ 7449 if ((spkt != NULL) && 7450 (spkt->satapkt_cmd.satacmd_cmd_reg == SATAC_PACKET)) 7451 goto out1; 7452 } 7453 } 7454 7455 /* print the fatal error type */ 7456 ahci_log_fatal_error_message(ahci_ctlp, port, intr_status); 7457 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7458 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 7459 7460 /* print PxSERR related error message */ 7461 ahci_log_serror_message(ahci_ctlp, port, port_serror, 0); 7462 7463 /* print task file register value */ 7464 if (intr_status & AHCI_INTR_STATUS_TFES) { 7465 cmn_err(CE_WARN, "!ahci%d: ahci port %d task_file_status " 7466 "= 0x%x", instance, port, task_file_status); 7467 } 7468 7469 out1: 7470 /* Prepare the argument for the taskq */ 7471 args = ahci_portp->ahciport_event_args; 7472 args->ahciea_ctlp = (void *)ahci_ctlp; 7473 args->ahciea_portp = (void *)ahci_portp; 7474 args->ahciea_event = intr_status; 7475 AHCI_ADDR_SET_PORT((ahci_addr_t *)args->ahciea_addrp, port); 7476 7477 /* Start the taskq to handle error recovery */ 7478 if ((ddi_taskq_dispatch(ahci_portp->ahciport_event_taskq, 7479 ahci_events_handler, 7480 (void *)args, DDI_NOSLEEP)) != DDI_SUCCESS) { 7481 cmn_err(CE_WARN, "!ahci%d: ahci start taskq for event handler " 7482 "failed", instance); 7483 } 7484 out0: 7485 mutex_exit(&ahci_portp->ahciport_mutex); 7486 7487 return (AHCI_SUCCESS); 7488 } 7489 7490 /* 7491 * Hot Plug Operation for platforms that support Cold Presence Detect. 7492 * 7493 * When set, a device status has changed as detected by the cold presence 7494 * detect logic. This bit can either be set due to a non-connected port 7495 * receiving a device, or a connected port having its device removed. 7496 * This bit is only valid if the port supports cold presence detect as 7497 * indicated by PxCMD.CPD set to '1'. 7498 * 7499 * At the moment, this interrupt is not needed and disabled and we just 7500 * log the debug message. 7501 */ 7502 static int 7503 ahci_intr_cold_port_detect(ahci_ctl_t *ahci_ctlp, 7504 ahci_port_t *ahci_portp, uint8_t port) 7505 { 7506 uint32_t port_cmd_status; 7507 sata_device_t sdevice; 7508 7509 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7510 "ahci_intr_cold_port_detect enter, port %d", port); 7511 7512 mutex_enter(&ahci_portp->ahciport_mutex); 7513 7514 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7515 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7516 if (!(port_cmd_status & AHCI_CMD_STATUS_CPD)) { 7517 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7518 "port %d does not support cold presence detect, so " 7519 "we just ignore this interrupt", port); 7520 mutex_exit(&ahci_portp->ahciport_mutex); 7521 return (AHCI_SUCCESS); 7522 } 7523 7524 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7525 "port %d device status has changed", port); 7526 7527 bzero((void *)&sdevice, sizeof (sata_device_t)); 7528 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 7529 sdevice.satadev_addr.qual = SATA_ADDR_CPORT; 7530 sdevice.satadev_addr.pmport = 0; 7531 sdevice.satadev_state = SATA_PSTATE_PWRON; 7532 7533 if (port_cmd_status & AHCI_CMD_STATUS_CPS) { 7534 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7535 "port %d: a device is hot plugged", port); 7536 mutex_exit(&ahci_portp->ahciport_mutex); 7537 sata_hba_event_notify( 7538 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7539 &sdevice, 7540 SATA_EVNT_DEVICE_ATTACHED); 7541 mutex_enter(&ahci_portp->ahciport_mutex); 7542 7543 } else { 7544 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7545 "port %d: a device is hot unplugged", port); 7546 mutex_exit(&ahci_portp->ahciport_mutex); 7547 sata_hba_event_notify( 7548 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7549 &sdevice, 7550 SATA_EVNT_DEVICE_DETACHED); 7551 mutex_enter(&ahci_portp->ahciport_mutex); 7552 } 7553 7554 mutex_exit(&ahci_portp->ahciport_mutex); 7555 7556 return (AHCI_SUCCESS); 7557 } 7558 7559 /* 7560 * Enable the interrupts for a particular port. 7561 * 7562 * WARNING!!! ahciport_mutex should be acquired before the function 7563 * is called. 7564 */ 7565 static void 7566 ahci_enable_port_intrs(ahci_ctl_t *ahci_ctlp, uint8_t port) 7567 { 7568 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 7569 "ahci_enable_port_intrs enter, port %d", port); 7570 7571 /* 7572 * Clear port interrupt status before enabling interrupt 7573 */ 7574 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7575 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 7576 AHCI_PORT_INTR_MASK); 7577 7578 /* 7579 * Clear the pending bit from IS.IPS 7580 */ 7581 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7582 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp), (1 << port)); 7583 7584 /* 7585 * Enable the following interrupts: 7586 * Device to Host Register FIS Interrupt (DHRS) 7587 * PIO Setup FIS Interrupt (PSS) 7588 * Set Device Bits Interrupt (SDBS) 7589 * Unknown FIS Interrupt (UFS) 7590 * Port Connect Change Status (PCS) 7591 * PhyRdy Change Status (PRCS) 7592 * Overflow Status (OFS) 7593 * Interface Non-fatal Error Status (INFS) 7594 * Interface Fatal Error Status (IFS) 7595 * Host Bus Data Error Status (HBDS) 7596 * Host Bus Fatal Error Status (HBFS) 7597 * Task File Error Status (TFES) 7598 */ 7599 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7600 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 7601 (AHCI_INTR_STATUS_DHRS | 7602 AHCI_INTR_STATUS_PSS | 7603 AHCI_INTR_STATUS_SDBS | 7604 AHCI_INTR_STATUS_UFS | 7605 AHCI_INTR_STATUS_DPS | 7606 AHCI_INTR_STATUS_PCS | 7607 AHCI_INTR_STATUS_PRCS | 7608 AHCI_INTR_STATUS_OFS | 7609 AHCI_INTR_STATUS_INFS | 7610 AHCI_INTR_STATUS_IFS | 7611 AHCI_INTR_STATUS_HBDS | 7612 AHCI_INTR_STATUS_HBFS | 7613 AHCI_INTR_STATUS_TFES)); 7614 } 7615 7616 /* 7617 * Enable interrupts for all the ports. 7618 * 7619 * WARNING!!! ahcictl_mutex should be acquired before the function 7620 * is called. 7621 */ 7622 static void 7623 ahci_enable_all_intrs(ahci_ctl_t *ahci_ctlp) 7624 { 7625 uint32_t ghc_control; 7626 7627 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_enable_all_intrs enter", NULL); 7628 7629 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7630 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 7631 7632 ghc_control |= AHCI_HBA_GHC_IE; 7633 7634 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7635 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 7636 } 7637 7638 /* 7639 * Disable interrupts for a particular port. 7640 * 7641 * WARNING!!! ahciport_mutex should be acquired before the function 7642 * is called. 7643 */ 7644 static void 7645 ahci_disable_port_intrs(ahci_ctl_t *ahci_ctlp, uint8_t port) 7646 { 7647 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 7648 "ahci_disable_port_intrs enter, port %d", port); 7649 7650 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7651 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 0); 7652 } 7653 7654 /* 7655 * Disable interrupts for the whole HBA. 7656 * 7657 * The global bit is cleared, then all interrupt sources from all 7658 * ports are disabled. 7659 * 7660 * WARNING!!! ahcictl_mutex should be acquired before the function 7661 * is called. 7662 */ 7663 static void 7664 ahci_disable_all_intrs(ahci_ctl_t *ahci_ctlp) 7665 { 7666 uint32_t ghc_control; 7667 7668 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_disable_all_intrs enter", 7669 NULL); 7670 7671 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7672 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 7673 7674 ghc_control &= ~ AHCI_HBA_GHC_IE; 7675 7676 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7677 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 7678 } 7679 7680 /* 7681 * Handle FIXED or MSI interrupts. 7682 */ 7683 /* 7684 * According to AHCI spec, the HBA may support several interrupt modes: 7685 * * pin based interrupts (FIXED) 7686 * * single MSI message interrupts 7687 * * multiple MSI based message interrupts 7688 * 7689 * For pin based interrupts, the software interrupt handler need to check IS 7690 * register to find out which port has pending interrupts. And then check 7691 * PxIS register to find out which interrupt events happened on that port. 7692 * 7693 * For single MSI message interrupts, MSICAP.MC.MSIE is set with '1', and 7694 * MSICAP.MC.MME is set with '0'. This mode is similar to pin based interrupts 7695 * in that software interrupt handler need to check IS register to determine 7696 * which port triggered the interrupts since it uses a single message for all 7697 * port interrupts. 7698 * 7699 * HBA may optionally support multiple MSI message for better performance. In 7700 * this mode, each port may have its own interrupt message, and thus generation 7701 * of interrupts is no longer controlled through the IS register. MSICAP.MC.MMC 7702 * represents a power-of-2 wrapper on the number of implemented ports, and 7703 * the mapping of ports to interrupts is done in a 1-1 relationship, up to the 7704 * maximum number of assigned interrupts. When the number of MSI messages 7705 * allocated is less than the number requested, then hardware may have two 7706 * implementation behaviors: 7707 * * assign each ports its own interrupt and then force all additional 7708 * ports to share the last interrupt message, and this condition is 7709 * indicated by clearing GHC.MRSM to '0' 7710 * * revert to single MSI mode, indicated by setting GHC.MRSM to '1' 7711 * When multiple-message MSI is enabled, hardware will still set IS register 7712 * as single message case. And this IS register may be used by software when 7713 * fewer than the requested number of messages is granted in order to determine 7714 * which port had the interrupt. 7715 * 7716 * Note: The current ahci driver only supports the first two interrupt modes: 7717 * pin based interrupts and single MSI message interrupts, and the reason 7718 * is indicated in below code. 7719 */ 7720 static int 7721 ahci_add_intrs(ahci_ctl_t *ahci_ctlp, int intr_type) 7722 { 7723 dev_info_t *dip = ahci_ctlp->ahcictl_dip; 7724 int count, avail, actual; 7725 int i, rc; 7726 7727 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 7728 "ahci_add_intrs enter interrupt type 0x%x", intr_type); 7729 7730 /* get number of interrupts. */ 7731 rc = ddi_intr_get_nintrs(dip, intr_type, &count); 7732 if ((rc != DDI_SUCCESS) || (count == 0)) { 7733 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7734 "ddi_intr_get_nintrs() failed, " 7735 "rc %d count %d\n", rc, count); 7736 return (DDI_FAILURE); 7737 } 7738 7739 /* get number of available interrupts. */ 7740 rc = ddi_intr_get_navail(dip, intr_type, &avail); 7741 if ((rc != DDI_SUCCESS) || (avail == 0)) { 7742 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7743 "ddi_intr_get_navail() failed, " 7744 "rc %d avail %d\n", rc, avail); 7745 return (DDI_FAILURE); 7746 } 7747 7748 #if AHCI_DEBUG 7749 if (avail < count) { 7750 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7751 "ddi_intr_get_nintrs returned %d, navail() returned %d", 7752 count, avail); 7753 } 7754 #endif 7755 7756 /* 7757 * Note: So far Solaris restricts the maximum number of messages for 7758 * x86 to 2, that is avail is 2, so here we set the count with 1 to 7759 * force the driver to use single MSI message interrupt. In future if 7760 * Solaris remove the restriction, then we need to delete the below 7761 * code and try to use multiple interrupt routine to gain better 7762 * performance. 7763 */ 7764 if ((intr_type == DDI_INTR_TYPE_MSI) && (count > 1)) { 7765 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7766 "force to use one interrupt routine though the " 7767 "HBA supports %d interrupt", count); 7768 count = 1; 7769 } 7770 7771 /* Allocate an array of interrupt handles. */ 7772 ahci_ctlp->ahcictl_intr_size = count * sizeof (ddi_intr_handle_t); 7773 ahci_ctlp->ahcictl_intr_htable = 7774 kmem_alloc(ahci_ctlp->ahcictl_intr_size, KM_SLEEP); 7775 7776 /* call ddi_intr_alloc(). */ 7777 rc = ddi_intr_alloc(dip, ahci_ctlp->ahcictl_intr_htable, 7778 intr_type, 0, count, &actual, DDI_INTR_ALLOC_NORMAL); 7779 7780 if ((rc != DDI_SUCCESS) || (actual == 0)) { 7781 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7782 "ddi_intr_alloc() failed, rc %d count %d actual %d " 7783 "avail %d\n", rc, count, actual, avail); 7784 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7785 ahci_ctlp->ahcictl_intr_size); 7786 return (DDI_FAILURE); 7787 } 7788 7789 /* use interrupt count returned */ 7790 #if AHCI_DEBUG 7791 if (actual < count) { 7792 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7793 "Requested: %d, Received: %d", count, actual); 7794 } 7795 #endif 7796 7797 ahci_ctlp->ahcictl_intr_cnt = actual; 7798 7799 /* 7800 * Get priority for first, assume remaining are all the same. 7801 */ 7802 if (ddi_intr_get_pri(ahci_ctlp->ahcictl_intr_htable[0], 7803 &ahci_ctlp->ahcictl_intr_pri) != DDI_SUCCESS) { 7804 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7805 "ddi_intr_get_pri() failed", NULL); 7806 7807 /* Free already allocated intr. */ 7808 for (i = 0; i < actual; i++) { 7809 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[i]); 7810 } 7811 7812 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7813 ahci_ctlp->ahcictl_intr_size); 7814 return (DDI_FAILURE); 7815 } 7816 7817 /* Test for high level interrupt. */ 7818 if (ahci_ctlp->ahcictl_intr_pri >= ddi_intr_get_hilevel_pri()) { 7819 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7820 "ahci_add_intrs: Hi level intr not supported", NULL); 7821 7822 /* Free already allocated intr. */ 7823 for (i = 0; i < actual; i++) { 7824 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[i]); 7825 } 7826 7827 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7828 sizeof (ddi_intr_handle_t)); 7829 7830 return (DDI_FAILURE); 7831 } 7832 7833 /* Call ddi_intr_add_handler(). */ 7834 for (i = 0; i < actual; i++) { 7835 if (ddi_intr_add_handler(ahci_ctlp->ahcictl_intr_htable[i], 7836 ahci_intr, (caddr_t)ahci_ctlp, NULL) != DDI_SUCCESS) { 7837 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7838 "ddi_intr_add_handler() failed", NULL); 7839 7840 /* Free already allocated intr. */ 7841 for (i = 0; i < actual; i++) { 7842 (void) ddi_intr_free( 7843 ahci_ctlp->ahcictl_intr_htable[i]); 7844 } 7845 7846 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7847 ahci_ctlp->ahcictl_intr_size); 7848 return (DDI_FAILURE); 7849 } 7850 } 7851 7852 if (ddi_intr_get_cap(ahci_ctlp->ahcictl_intr_htable[0], 7853 &ahci_ctlp->ahcictl_intr_cap) != DDI_SUCCESS) { 7854 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7855 "ddi_intr_get_cap() failed", NULL); 7856 7857 /* Free already allocated intr. */ 7858 for (i = 0; i < actual; i++) { 7859 (void) ddi_intr_free( 7860 ahci_ctlp->ahcictl_intr_htable[i]); 7861 } 7862 7863 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7864 ahci_ctlp->ahcictl_intr_size); 7865 return (DDI_FAILURE); 7866 } 7867 7868 if (ahci_ctlp->ahcictl_intr_cap & DDI_INTR_FLAG_BLOCK) { 7869 /* Call ddi_intr_block_enable() for MSI. */ 7870 (void) ddi_intr_block_enable(ahci_ctlp->ahcictl_intr_htable, 7871 ahci_ctlp->ahcictl_intr_cnt); 7872 } else { 7873 /* Call ddi_intr_enable() for FIXED or MSI non block enable. */ 7874 for (i = 0; i < ahci_ctlp->ahcictl_intr_cnt; i++) { 7875 (void) ddi_intr_enable( 7876 ahci_ctlp->ahcictl_intr_htable[i]); 7877 } 7878 } 7879 7880 return (DDI_SUCCESS); 7881 } 7882 7883 /* 7884 * Removes the registered interrupts irrespective of whether they 7885 * were legacy or MSI. 7886 * 7887 * WARNING!!! The controller interrupts must be disabled before calling 7888 * this routine. 7889 */ 7890 static void 7891 ahci_rem_intrs(ahci_ctl_t *ahci_ctlp) 7892 { 7893 int x; 7894 7895 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_rem_intrs entered", NULL); 7896 7897 /* Disable all interrupts. */ 7898 if ((ahci_ctlp->ahcictl_intr_type == DDI_INTR_TYPE_MSI) && 7899 (ahci_ctlp->ahcictl_intr_cap & DDI_INTR_FLAG_BLOCK)) { 7900 /* Call ddi_intr_block_disable(). */ 7901 (void) ddi_intr_block_disable(ahci_ctlp->ahcictl_intr_htable, 7902 ahci_ctlp->ahcictl_intr_cnt); 7903 } else { 7904 for (x = 0; x < ahci_ctlp->ahcictl_intr_cnt; x++) { 7905 (void) ddi_intr_disable( 7906 ahci_ctlp->ahcictl_intr_htable[x]); 7907 } 7908 } 7909 7910 /* Call ddi_intr_remove_handler(). */ 7911 for (x = 0; x < ahci_ctlp->ahcictl_intr_cnt; x++) { 7912 (void) ddi_intr_remove_handler( 7913 ahci_ctlp->ahcictl_intr_htable[x]); 7914 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[x]); 7915 } 7916 7917 kmem_free(ahci_ctlp->ahcictl_intr_htable, ahci_ctlp->ahcictl_intr_size); 7918 } 7919 7920 /* 7921 * This routine tries to put port into P:NotRunning state by clearing 7922 * PxCMD.ST. HBA will clear PxCI to 0h, PxSACT to 0h, PxCMD.CCS to 0h 7923 * and PxCMD.CR to '0'. 7924 * 7925 * WARNING!!! ahciport_mutex should be acquired before the function 7926 * is called. 7927 */ 7928 static int 7929 ahci_put_port_into_notrunning_state(ahci_ctl_t *ahci_ctlp, 7930 ahci_port_t *ahci_portp, uint8_t port) 7931 { 7932 uint32_t port_cmd_status; 7933 int loop_count; 7934 7935 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 7936 "ahci_put_port_into_notrunning_state enter: port %d", port); 7937 7938 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7939 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7940 7941 port_cmd_status &= ~AHCI_CMD_STATUS_ST; 7942 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7943 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), port_cmd_status); 7944 7945 /* Wait until PxCMD.CR is cleared */ 7946 loop_count = 0; 7947 do { 7948 port_cmd_status = 7949 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7950 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7951 7952 if (loop_count++ > AHCI_POLLRATE_PORT_IDLE) { 7953 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 7954 "clearing port %d CMD.CR timeout, " 7955 "port_cmd_status = 0x%x", port, 7956 port_cmd_status); 7957 /* 7958 * We are effectively timing out after 0.5 sec. 7959 * This value is specified in AHCI spec. 7960 */ 7961 break; 7962 } 7963 7964 /* Wait for 10 millisec */ 7965 drv_usecwait(AHCI_10MS_USECS); 7966 } while (port_cmd_status & AHCI_CMD_STATUS_CR); 7967 7968 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_STARTED; 7969 7970 if (port_cmd_status & AHCI_CMD_STATUS_CR) { 7971 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 7972 "ahci_put_port_into_notrunning_state: failed to clear " 7973 "PxCMD.CR to '0' after loop count: %d, and " 7974 "port_cmd_status = 0x%x", loop_count, port_cmd_status); 7975 return (AHCI_FAILURE); 7976 } else { 7977 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 7978 "ahci_put_port_into_notrunning_state: succeeded to clear " 7979 "PxCMD.CR to '0' after loop count: %d, and " 7980 "port_cmd_status = 0x%x", loop_count, port_cmd_status); 7981 return (AHCI_SUCCESS); 7982 } 7983 } 7984 7985 /* 7986 * First clear PxCMD.ST, and then check PxTFD. If both PxTFD.STS.BSY 7987 * and PxTFD.STS.DRQ cleared to '0', it means the device is in a 7988 * stable state, then set PxCMD.ST to '1' to start the port directly. 7989 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue a 7990 * COMRESET to the device to put it in an idle state. 7991 * 7992 * The fifth argument returns whether the port reset is involved during 7993 * the process. 7994 * 7995 * The routine will be called under following scenarios: 7996 * + To reset the HBA 7997 * + To abort the packet(s) 7998 * + To reset the port 7999 * + To activate the port 8000 * + Fatal error recovery 8001 * + To abort the timeout packet(s) 8002 * 8003 * WARNING!!! ahciport_mutex should be acquired before the function 8004 * is called. And ahciport_mutex will be released before the reset 8005 * event is reported to sata module by calling sata_hba_event_notify, 8006 * and then be acquired again later. 8007 * 8008 * NOTES!!! During this procedure, PxSERR register will be cleared, and 8009 * according to the spec, the clearance of three bits will also clear 8010 * three interrupt status bits. 8011 * 1. PxSERR.DIAG.F will clear PxIS.UFS 8012 * 2. PxSERR.DIAG.X will clear PxIS.PCS 8013 * 3. PxSERR.DIAG.N will clear PxIS.PRCS 8014 * 8015 * Among these three interrupt events, the driver needs to take care of 8016 * PxIS.PRCS, which is the hot plug event. When the driver found out 8017 * a device was unplugged, it will call the interrupt handler. 8018 */ 8019 static int 8020 ahci_restart_port_wait_till_ready(ahci_ctl_t *ahci_ctlp, 8021 ahci_port_t *ahci_portp, uint8_t port, int flag, int *reset_flag) 8022 { 8023 uint32_t port_sstatus; 8024 uint32_t task_file_status; 8025 sata_device_t sdevice; 8026 int rval; 8027 ahci_addr_t addr_port; 8028 ahci_pmult_info_t *pminfo = NULL; 8029 int dev_exists_begin = 0; 8030 int dev_exists_end = 0; 8031 uint32_t previous_dev_type = ahci_portp->ahciport_device_type; 8032 int npmport = 0; 8033 uint8_t cport = ahci_ctlp->ahcictl_port_to_cport[port]; 8034 8035 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8036 "ahci_restart_port_wait_till_ready: port %d enter", port); 8037 8038 AHCI_ADDR_SET_PORT(&addr_port, port); 8039 8040 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) 8041 dev_exists_begin = 1; 8042 8043 /* First clear PxCMD.ST */ 8044 rval = ahci_put_port_into_notrunning_state(ahci_ctlp, ahci_portp, 8045 port); 8046 if (rval != AHCI_SUCCESS) 8047 /* 8048 * If PxCMD.CR does not clear within a reasonable time, it 8049 * may assume the interface is in a hung condition and may 8050 * continue with issuing the port reset. 8051 */ 8052 goto reset; 8053 8054 /* Then clear PxSERR */ 8055 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8056 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 8057 AHCI_SERROR_CLEAR_ALL); 8058 8059 /* Then get PxTFD */ 8060 task_file_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8061 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 8062 8063 /* 8064 * Check whether the device is in a stable status, if yes, 8065 * then start the port directly. However for ahci_tran_reset_dport, 8066 * we may have to perform a port reset. 8067 */ 8068 if (!(task_file_status & (AHCI_TFD_STS_BSY | AHCI_TFD_STS_DRQ)) && 8069 !(flag & AHCI_PORT_RESET)) 8070 goto out; 8071 8072 reset: 8073 /* 8074 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue 8075 * a COMRESET to the device 8076 */ 8077 ahci_disable_port_intrs(ahci_ctlp, port); 8078 rval = ahci_port_reset(ahci_ctlp, ahci_portp, &addr_port); 8079 ahci_enable_port_intrs(ahci_ctlp, port); 8080 8081 #ifdef AHCI_DEBUG 8082 if (rval != AHCI_SUCCESS) 8083 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8084 "ahci_restart_port_wait_till_ready: port %d failed", 8085 port); 8086 #endif 8087 8088 if (reset_flag != NULL) 8089 *reset_flag = 1; 8090 8091 /* Indicate to the framework that a reset has happened. */ 8092 if ((ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) && 8093 (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) && 8094 !(flag & AHCI_RESET_NO_EVENTS_UP)) { 8095 /* Set the reset in progress flag */ 8096 ahci_portp->ahciport_reset_in_progress = 1; 8097 8098 bzero((void *)&sdevice, sizeof (sata_device_t)); 8099 sdevice.satadev_addr.cport = 8100 ahci_ctlp->ahcictl_port_to_cport[port]; 8101 sdevice.satadev_addr.pmport = 0; 8102 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8103 8104 sdevice.satadev_state = SATA_DSTATE_RESET | 8105 SATA_DSTATE_PWR_ACTIVE; 8106 if (ahci_ctlp->ahcictl_sata_hba_tran) { 8107 mutex_exit(&ahci_portp->ahciport_mutex); 8108 sata_hba_event_notify( 8109 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 8110 &sdevice, 8111 SATA_EVNT_DEVICE_RESET); 8112 mutex_enter(&ahci_portp->ahciport_mutex); 8113 } 8114 8115 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 8116 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 8117 } else { 8118 ahci_portp->ahciport_reset_in_progress = 0; 8119 } 8120 8121 out: 8122 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8123 8124 /* SStatus tells the presence of device. */ 8125 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8126 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 8127 8128 if (SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_PHYCOM) { 8129 dev_exists_end = 1; 8130 } 8131 8132 if (dev_exists_begin == 0 && dev_exists_end == 0) /* 0 -> 0 */ 8133 return (rval); 8134 8135 /* Check whether a hot plug event happened */ 8136 if (dev_exists_begin == 1 && dev_exists_end == 0) { /* 1 -> 0 */ 8137 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8138 "ahci_restart_port_wait_till_ready: port %d " 8139 "device is removed", port); 8140 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_NODEV; 8141 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8142 "ahci_restart_port_wait_till_ready: port %d " 8143 "AHCI_PORT_FLAG_NODEV flag is set", port); 8144 mutex_exit(&ahci_portp->ahciport_mutex); 8145 (void) ahci_intr_phyrdy_change(ahci_ctlp, ahci_portp, port); 8146 mutex_enter(&ahci_portp->ahciport_mutex); 8147 8148 return (rval); 8149 } 8150 8151 8152 /* 0/1 -> 1 : device may change */ 8153 /* 8154 * May be called by ahci_fatal_error_recovery_handler, so 8155 * don't issue software if the previous device is ATAPI. 8156 */ 8157 if (ahci_portp->ahciport_device_type == SATA_DTYPE_ATAPI) 8158 return (rval); 8159 8160 /* 8161 * The COMRESET will make port multiplier enter legacy mode. 8162 * Issue a software reset to make it work again. 8163 */ 8164 ahci_find_dev_signature(ahci_ctlp, ahci_portp, &addr_port); 8165 8166 /* 8167 * Following codes are specific for the port multiplier 8168 */ 8169 if (previous_dev_type != SATA_DTYPE_PMULT && 8170 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 8171 /* in case previous_dev_type is corrupt */ 8172 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 8173 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8174 return (rval); 8175 } 8176 8177 /* Device change: PMult -> Non-PMult */ 8178 if (previous_dev_type == SATA_DTYPE_PMULT && 8179 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 8180 /* 8181 * This might happen because 8182 * 1. Software reset failed. Port multiplier is not correctly 8183 * enumerated. 8184 * 2. Another non-port-multiplier device is attached. Perhaps 8185 * the port multiplier was replaced by another device by 8186 * whatever reason, but AHCI driver missed hot-plug event. 8187 * 8188 * Now that the port has been initialized, we just need to 8189 * update the port structure according new device, then report 8190 * and wait SATA framework to probe new device. 8191 */ 8192 8193 /* Force to release pmult resource */ 8194 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 8195 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8196 8197 bzero((void *)&sdevice, sizeof (sata_device_t)); 8198 sdevice.satadev_addr.cport = 8199 ahci_ctlp->ahcictl_port_to_cport[port]; 8200 sdevice.satadev_addr.pmport = 0; 8201 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8202 8203 sdevice.satadev_state = SATA_DSTATE_RESET | 8204 SATA_DSTATE_PWR_ACTIVE; 8205 8206 mutex_exit(&ahci_portp->ahciport_mutex); 8207 sata_hba_event_notify( 8208 ahci_ctlp->ahcictl_dip, 8209 &sdevice, 8210 SATA_EVNT_DEVICE_RESET); 8211 mutex_enter(&ahci_portp->ahciport_mutex); 8212 8213 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8214 "Port multiplier is [Gone] at port %d ", port); 8215 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 8216 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 8217 8218 return (AHCI_SUCCESS); 8219 } 8220 8221 /* Device change: Non-PMult -> PMult */ 8222 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 8223 8224 /* NOTE: The PxCMD.PMA may be cleared by HBA reset. */ 8225 ahci_alloc_pmult(ahci_ctlp, ahci_portp); 8226 8227 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8228 } 8229 pminfo = ahci_portp->ahciport_pmult_info; 8230 ASSERT(pminfo != NULL); 8231 8232 /* Device (may) change: PMult -> PMult */ 8233 /* 8234 * First initialize port multiplier. Set state to READY and wait for 8235 * probe entry point to initialize it 8236 */ 8237 ahci_portp->ahciport_port_state = SATA_STATE_READY; 8238 8239 /* 8240 * It's a little complicated while target is a port multiplier. we 8241 * need to COMRESET all pmports behind that PMult otherwise those 8242 * sub-links between the PMult and the sub-devices will be in an 8243 * inactive state (indicated by PSCR0/PxSSTS) and the following access 8244 * to those sub-devices will be rejected by Link-Fatal-Error. 8245 */ 8246 /* 8247 * The PxSNTF will be set soon after the pmult is plugged. While the 8248 * pmult itself is attaching, sata_hba_event_notfiy will fail. so we 8249 * simply mark every sub-port as 'unknown', then ahci_probe_pmport 8250 * will initialized it. 8251 */ 8252 for (npmport = 0; npmport < pminfo->ahcipmi_num_dev_ports; npmport++) 8253 pminfo->ahcipmi_port_state[npmport] = SATA_STATE_UNKNOWN; 8254 8255 /* Report reset event. */ 8256 ahci_portp->ahciport_reset_in_progress = 1; 8257 8258 bzero((void *)&sdevice, sizeof (sata_device_t)); 8259 sdevice.satadev_addr.cport = cport; 8260 sdevice.satadev_addr.pmport = SATA_PMULT_HOSTPORT; 8261 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 8262 sdevice.satadev_state = SATA_DSTATE_RESET | SATA_DSTATE_PWR_ACTIVE; 8263 sata_hba_event_notify(ahci_ctlp->ahcictl_dip, &sdevice, 8264 SATA_EVNT_DEVICE_RESET); 8265 8266 return (rval); 8267 } 8268 8269 /* 8270 * This routine may be called under four scenarios: 8271 * a) do the recovery from fatal error 8272 * b) or we need to timeout some commands 8273 * c) or we need to abort some commands 8274 * d) or we need reset device/port/controller 8275 * 8276 * In all these scenarios, we need to send any pending unfinished 8277 * commands up to sata framework. 8278 * 8279 * WARNING!!! ahciport_mutex should be acquired before the function is called. 8280 */ 8281 static void 8282 ahci_mop_commands(ahci_ctl_t *ahci_ctlp, 8283 ahci_port_t *ahci_portp, 8284 uint32_t slot_status, 8285 uint32_t failed_tags, 8286 uint32_t timeout_tags, 8287 uint32_t aborted_tags, 8288 uint32_t reset_tags) 8289 { 8290 uint32_t finished_tags = 0; 8291 uint32_t unfinished_tags = 0; 8292 int tmp_slot; 8293 sata_pkt_t *satapkt; 8294 int ncq_cmd_in_progress = 0; 8295 int err_retri_cmd_in_progress = 0; 8296 int rdwr_pmult_cmd_in_progress = 0; 8297 8298 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8299 "ahci_mop_commands entered: port: %d slot_status: 0x%x", 8300 ahci_portp->ahciport_port_num, slot_status); 8301 8302 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8303 "ahci_mop_commands: failed_tags: 0x%x, " 8304 "timeout_tags: 0x%x aborted_tags: 0x%x, " 8305 "reset_tags: 0x%x", failed_tags, 8306 timeout_tags, aborted_tags, reset_tags); 8307 8308 #ifdef AHCI_DEBUG 8309 if (ahci_debug_flags & AHCIDBG_ERRS) { 8310 int i; 8311 char msg_buf[200] = {0, }; 8312 for (i = 0x1f; i >= 0; i--) { 8313 if (ahci_portp->ahciport_slot_pkts[i] != NULL) 8314 msg_buf[i] = 'X'; 8315 else 8316 msg_buf[i] = '.'; 8317 } 8318 msg_buf[0x20] = '\0'; 8319 cmn_err(CE_NOTE, "port[%d] slots: %s", 8320 ahci_portp->ahciport_port_num, msg_buf); 8321 cmn_err(CE_NOTE, "[ERR-RT] %p [RW-PM] %p ", 8322 (void *)ahci_portp->ahciport_err_retri_pkt, 8323 (void *)ahci_portp->ahciport_rdwr_pmult_pkt); 8324 } 8325 #endif 8326 8327 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8328 finished_tags = ahci_portp->ahciport_pending_tags & 8329 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 8330 8331 unfinished_tags = slot_status & 8332 AHCI_SLOT_MASK(ahci_ctlp) & 8333 ~failed_tags & 8334 ~aborted_tags & 8335 ~reset_tags & 8336 ~timeout_tags; 8337 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8338 ncq_cmd_in_progress = 1; 8339 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 8340 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 8341 8342 unfinished_tags = slot_status & 8343 AHCI_NCQ_SLOT_MASK(ahci_portp) & 8344 ~failed_tags & 8345 ~aborted_tags & 8346 ~reset_tags & 8347 ~timeout_tags; 8348 } else if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8349 8350 /* 8351 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT is 8352 * set, it means REQUEST SENSE or READ LOG EXT command doesn't 8353 * complete successfully due to one of the following three 8354 * conditions: 8355 * 8356 * 1. Fatal error - failed_tags includes its slot 8357 * 2. Timed out - timeout_tags includes its slot 8358 * 3. Aborted when hot unplug - aborted_tags includes its 8359 * slot 8360 * 8361 * Please note that the command is always sent down in Slot 0 8362 */ 8363 err_retri_cmd_in_progress = 1; 8364 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_NCQ, ahci_ctlp, 8365 "ahci_mop_commands is called for port %d while " 8366 "REQUEST SENSE or READ LOG EXT for error retrieval " 8367 "is being executed slot_status = 0x%x", 8368 ahci_portp->ahciport_port_num, slot_status); 8369 ASSERT(ahci_portp->ahciport_mop_in_progress > 1); 8370 ASSERT(slot_status == 0x1); 8371 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 8372 rdwr_pmult_cmd_in_progress = 1; 8373 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 8374 "ahci_mop_commands is called for port %d while " 8375 "READ/WRITE PORTMULT command is being executed", 8376 ahci_portp->ahciport_port_num); 8377 8378 ASSERT(slot_status == 0x1); 8379 } 8380 8381 #ifdef AHCI_DEBUG 8382 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8383 "ahci_mop_commands: finished_tags: 0x%x, " 8384 "unfinished_tags 0x%x", finished_tags, unfinished_tags); 8385 #endif 8386 8387 /* Send up finished packets with SATA_PKT_COMPLETED */ 8388 while (finished_tags) { 8389 tmp_slot = ddi_ffs(finished_tags) - 1; 8390 if (tmp_slot == -1) { 8391 break; 8392 } 8393 8394 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8395 ASSERT(satapkt != NULL); 8396 8397 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_mop_commands: " 8398 "sending up pkt 0x%p with SATA_PKT_COMPLETED", 8399 (void *)satapkt); 8400 8401 /* 8402 * Cannot fetch the return register content since the port 8403 * was restarted, so the corresponding tag will be set to 8404 * aborted tags. 8405 */ 8406 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 8407 CLEAR_BIT(finished_tags, tmp_slot); 8408 aborted_tags |= tmp_slot; 8409 continue; 8410 } 8411 8412 if (ncq_cmd_in_progress) 8413 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8414 tmp_slot); 8415 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8416 CLEAR_BIT(finished_tags, tmp_slot); 8417 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8418 8419 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 8420 } 8421 8422 /* Send up failed packets with SATA_PKT_DEV_ERROR. */ 8423 while (failed_tags) { 8424 if (err_retri_cmd_in_progress) { 8425 satapkt = ahci_portp->ahciport_err_retri_pkt; 8426 ASSERT(satapkt != NULL); 8427 ASSERT(failed_tags == 0x1); 8428 8429 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8430 "sending up pkt 0x%p with SATA_PKT_DEV_ERROR", 8431 (void *)satapkt); 8432 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8433 break; 8434 } 8435 if (rdwr_pmult_cmd_in_progress) { 8436 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8437 ASSERT(satapkt != NULL); 8438 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8439 "ahci_mop_commands: sending up " 8440 "rdwr pmult pkt 0x%p with SATA_PKT_DEV_ERROR", 8441 (void *)satapkt); 8442 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8443 break; 8444 } 8445 8446 tmp_slot = ddi_ffs(failed_tags) - 1; 8447 if (tmp_slot == -1) { 8448 break; 8449 } 8450 8451 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8452 ASSERT(satapkt != NULL); 8453 8454 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8455 "sending up pkt 0x%p with SATA_PKT_DEV_ERROR", 8456 (void *)satapkt); 8457 8458 if (ncq_cmd_in_progress) 8459 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8460 tmp_slot); 8461 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8462 CLEAR_BIT(failed_tags, tmp_slot); 8463 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8464 8465 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8466 } 8467 8468 /* Send up timeout packets with SATA_PKT_TIMEOUT. */ 8469 while (timeout_tags) { 8470 if (err_retri_cmd_in_progress) { 8471 satapkt = ahci_portp->ahciport_err_retri_pkt; 8472 ASSERT(satapkt != NULL); 8473 ASSERT(timeout_tags == 0x1); 8474 8475 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8476 "sending up pkt 0x%p with SATA_PKT_TIMEOUT", 8477 (void *)satapkt); 8478 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8479 break; 8480 } 8481 if (rdwr_pmult_cmd_in_progress) { 8482 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8483 ASSERT(satapkt != NULL); 8484 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8485 "ahci_mop_commands: sending up " 8486 "rdwr pmult pkt 0x%p with SATA_PKT_TIMEOUT", 8487 (void *)satapkt); 8488 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8489 break; 8490 } 8491 8492 tmp_slot = ddi_ffs(timeout_tags) - 1; 8493 if (tmp_slot == -1) { 8494 break; 8495 } 8496 8497 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8498 ASSERT(satapkt != NULL); 8499 8500 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8501 "sending up pkt 0x%p with SATA_PKT_TIMEOUT", 8502 (void *)satapkt); 8503 8504 if (ncq_cmd_in_progress) 8505 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8506 tmp_slot); 8507 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8508 CLEAR_BIT(timeout_tags, tmp_slot); 8509 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8510 8511 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8512 } 8513 8514 /* Send up aborted packets with SATA_PKT_ABORTED */ 8515 while (aborted_tags) { 8516 if (err_retri_cmd_in_progress) { 8517 satapkt = ahci_portp->ahciport_err_retri_pkt; 8518 ASSERT(satapkt != NULL); 8519 ASSERT(aborted_tags == 0x1); 8520 8521 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8522 "sending up pkt 0x%p with SATA_PKT_ABORTED", 8523 (void *)satapkt); 8524 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_ABORTED); 8525 break; 8526 } 8527 if (rdwr_pmult_cmd_in_progress) { 8528 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8529 ASSERT(satapkt != NULL); 8530 ASSERT(aborted_tags == 0x1); 8531 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8532 "ahci_mop_commands: sending up " 8533 "rdwr pmult pkt 0x%p with SATA_PKT_ABORTED", 8534 (void *)satapkt); 8535 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_ABORTED); 8536 break; 8537 } 8538 8539 tmp_slot = ddi_ffs(aborted_tags) - 1; 8540 if (tmp_slot == -1) { 8541 break; 8542 } 8543 8544 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8545 ASSERT(satapkt != NULL); 8546 8547 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8548 "sending up pkt 0x%p with SATA_PKT_ABORTED", 8549 (void *)satapkt); 8550 8551 if (ncq_cmd_in_progress) 8552 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8553 tmp_slot); 8554 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8555 CLEAR_BIT(aborted_tags, tmp_slot); 8556 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8557 8558 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_ABORTED); 8559 } 8560 8561 /* Send up reset packets with SATA_PKT_RESET. */ 8562 while (reset_tags) { 8563 if (rdwr_pmult_cmd_in_progress) { 8564 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8565 ASSERT(satapkt != NULL); 8566 ASSERT(aborted_tags == 0x1); 8567 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8568 "ahci_mop_commands: sending up " 8569 "rdwr pmult pkt 0x%p with SATA_PKT_RESET", 8570 (void *)satapkt); 8571 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_RESET); 8572 break; 8573 } 8574 8575 tmp_slot = ddi_ffs(reset_tags) - 1; 8576 if (tmp_slot == -1) { 8577 break; 8578 } 8579 8580 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8581 ASSERT(satapkt != NULL); 8582 8583 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8584 "sending up pkt 0x%p with SATA_PKT_RESET", 8585 (void *)satapkt); 8586 8587 if (ncq_cmd_in_progress) 8588 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8589 tmp_slot); 8590 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8591 CLEAR_BIT(reset_tags, tmp_slot); 8592 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8593 8594 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_RESET); 8595 } 8596 8597 /* Send up unfinished packets with SATA_PKT_RESET */ 8598 while (unfinished_tags) { 8599 tmp_slot = ddi_ffs(unfinished_tags) - 1; 8600 if (tmp_slot == -1) { 8601 break; 8602 } 8603 8604 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8605 ASSERT(satapkt != NULL); 8606 8607 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8608 "sending up pkt 0x%p with SATA_PKT_RESET", 8609 (void *)satapkt); 8610 8611 if (ncq_cmd_in_progress) 8612 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8613 tmp_slot); 8614 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8615 CLEAR_BIT(unfinished_tags, tmp_slot); 8616 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8617 8618 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_RESET); 8619 } 8620 8621 ahci_portp->ahciport_mop_in_progress--; 8622 ASSERT(ahci_portp->ahciport_mop_in_progress >= 0); 8623 8624 if (ahci_portp->ahciport_mop_in_progress == 0) 8625 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_MOPPING; 8626 } 8627 8628 /* 8629 * This routine is going to first request a READ LOG EXT sata pkt from sata 8630 * module, and then deliver it to the HBA to get the ncq failure context. 8631 * The return value is the exactly failed tags. 8632 */ 8633 static uint32_t 8634 ahci_get_rdlogext_data(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 8635 uint8_t port) 8636 { 8637 sata_device_t sdevice; 8638 sata_pkt_t *rdlog_spkt, *spkt; 8639 ddi_dma_handle_t buf_dma_handle; 8640 ahci_addr_t addr; 8641 int loop_count; 8642 int rval; 8643 int failed_slot; 8644 uint32_t failed_tags = 0; 8645 struct sata_ncq_error_recovery_page *ncq_err_page; 8646 8647 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_NCQ, ahci_ctlp, 8648 "ahci_get_rdlogext_data enter: port %d", port); 8649 8650 /* Prepare the sdevice data */ 8651 bzero((void *)&sdevice, sizeof (sata_device_t)); 8652 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 8653 8654 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8655 sdevice.satadev_addr.pmport = 0; 8656 8657 /* Translate sata_device.satadev_addr -> ahci_addr */ 8658 ahci_get_ahci_addr(ahci_ctlp, &sdevice, &addr); 8659 8660 /* 8661 * Call the sata hba interface to get a rdlog spkt 8662 */ 8663 loop_count = 0; 8664 loop: 8665 rdlog_spkt = sata_get_error_retrieval_pkt(ahci_ctlp->ahcictl_dip, 8666 &sdevice, SATA_ERR_RETR_PKT_TYPE_NCQ); 8667 if (rdlog_spkt == NULL) { 8668 if (loop_count++ < AHCI_POLLRATE_GET_SPKT) { 8669 /* Sleep for a while */ 8670 drv_usecwait(AHCI_10MS_USECS); 8671 goto loop; 8672 } 8673 /* Timed out after 1s */ 8674 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8675 "failed to get rdlog spkt for port %d", port); 8676 return (failed_tags); 8677 } 8678 8679 ASSERT(rdlog_spkt->satapkt_op_mode & SATA_OPMODE_SYNCH); 8680 8681 /* 8682 * This flag is used to handle the specific error recovery when the 8683 * READ LOG EXT command gets a failure (fatal error or time-out). 8684 */ 8685 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RDLOGEXT; 8686 8687 /* 8688 * This start is not supposed to fail because after port is restarted, 8689 * the whole command list is empty. 8690 */ 8691 ahci_portp->ahciport_err_retri_pkt = rdlog_spkt; 8692 (void) ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, rdlog_spkt); 8693 ahci_portp->ahciport_err_retri_pkt = NULL; 8694 8695 /* Remove the flag after READ LOG EXT command is completed */ 8696 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_RDLOGEXT; 8697 8698 if (rdlog_spkt->satapkt_reason == SATA_PKT_COMPLETED) { 8699 /* Update the request log data */ 8700 buf_dma_handle = *(ddi_dma_handle_t *) 8701 (rdlog_spkt->satapkt_cmd.satacmd_err_ret_buf_handle); 8702 rval = ddi_dma_sync(buf_dma_handle, 0, 0, 8703 DDI_DMA_SYNC_FORKERNEL); 8704 if (rval == DDI_SUCCESS) { 8705 ncq_err_page = 8706 (struct sata_ncq_error_recovery_page *)rdlog_spkt-> 8707 satapkt_cmd.satacmd_bp->b_un.b_addr; 8708 8709 /* Get the failed tag */ 8710 failed_slot = ncq_err_page->ncq_tag; 8711 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8712 "ahci_get_rdlogext_data: port %d " 8713 "failed slot %d", port, failed_slot); 8714 if (failed_slot & NQ) { 8715 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8716 "the failed slot is not a valid tag", NULL); 8717 goto out; 8718 } 8719 8720 failed_slot &= NCQ_TAG_MASK; 8721 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 8722 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8723 "ahci_get_rdlogext_data: failed spkt 0x%p", 8724 (void *)spkt); 8725 if (spkt == NULL) { 8726 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8727 "the failed slot spkt is NULL", NULL); 8728 goto out; 8729 } 8730 8731 failed_tags = 0x1 << failed_slot; 8732 8733 /* Fill out the error context */ 8734 ahci_copy_ncq_err_page(&spkt->satapkt_cmd, 8735 ncq_err_page); 8736 ahci_update_sata_registers(ahci_ctlp, port, 8737 &spkt->satapkt_device); 8738 } 8739 } 8740 out: 8741 sata_free_error_retrieval_pkt(rdlog_spkt); 8742 8743 return (failed_tags); 8744 } 8745 8746 /* 8747 * This routine is going to first request a REQUEST SENSE sata pkt from sata 8748 * module, and then deliver it to the HBA to get the sense data and copy 8749 * the sense data back to the orignal failed sata pkt, and free the REQUEST 8750 * SENSE sata pkt later. 8751 */ 8752 static void 8753 ahci_get_rqsense_data(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 8754 uint8_t port, sata_pkt_t *spkt) 8755 { 8756 sata_device_t sdevice; 8757 sata_pkt_t *rs_spkt; 8758 sata_cmd_t *sata_cmd; 8759 ddi_dma_handle_t buf_dma_handle; 8760 ahci_addr_t addr; 8761 int loop_count; 8762 #if AHCI_DEBUG 8763 struct scsi_extended_sense *rqsense; 8764 #endif 8765 8766 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8767 "ahci_get_rqsense_data enter: port %d", port); 8768 8769 /* Prepare the sdevice data */ 8770 bzero((void *)&sdevice, sizeof (sata_device_t)); 8771 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 8772 8773 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8774 sdevice.satadev_addr.pmport = 0; 8775 8776 /* Translate sata_device.satadev_addr -> ahci_addr */ 8777 ahci_get_ahci_addr(ahci_ctlp, &sdevice, &addr); 8778 8779 sata_cmd = &spkt->satapkt_cmd; 8780 8781 /* 8782 * Call the sata hba interface to get a rs spkt 8783 */ 8784 loop_count = 0; 8785 loop: 8786 rs_spkt = sata_get_error_retrieval_pkt(ahci_ctlp->ahcictl_dip, 8787 &sdevice, SATA_ERR_RETR_PKT_TYPE_ATAPI); 8788 if (rs_spkt == NULL) { 8789 if (loop_count++ < AHCI_POLLRATE_GET_SPKT) { 8790 /* Sleep for a while */ 8791 drv_usecwait(AHCI_10MS_USECS); 8792 goto loop; 8793 8794 } 8795 /* Timed out after 1s */ 8796 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8797 "failed to get rs spkt for port %d", port); 8798 return; 8799 } 8800 8801 ASSERT(rs_spkt->satapkt_op_mode & SATA_OPMODE_SYNCH); 8802 8803 /* 8804 * This flag is used to handle the specific error recovery when the 8805 * REQUEST SENSE command gets a faiure (fatal error or time-out). 8806 */ 8807 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RQSENSE; 8808 8809 /* 8810 * This start is not supposed to fail because after port is restarted, 8811 * the whole command list is empty. 8812 */ 8813 ahci_portp->ahciport_err_retri_pkt = rs_spkt; 8814 (void) ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, rs_spkt); 8815 ahci_portp->ahciport_err_retri_pkt = NULL; 8816 8817 /* Remove the flag after REQUEST SENSE command is completed */ 8818 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_RQSENSE; 8819 8820 if (rs_spkt->satapkt_reason == SATA_PKT_COMPLETED) { 8821 /* Update the request sense data */ 8822 buf_dma_handle = *(ddi_dma_handle_t *) 8823 (rs_spkt->satapkt_cmd.satacmd_err_ret_buf_handle); 8824 (void) ddi_dma_sync(buf_dma_handle, 0, 0, 8825 DDI_DMA_SYNC_FORKERNEL); 8826 /* Copy the request sense data */ 8827 bcopy(rs_spkt-> 8828 satapkt_cmd.satacmd_bp->b_un.b_addr, 8829 &sata_cmd->satacmd_rqsense, 8830 SATA_ATAPI_MIN_RQSENSE_LEN); 8831 #if AHCI_DEBUG 8832 rqsense = (struct scsi_extended_sense *) 8833 sata_cmd->satacmd_rqsense; 8834 8835 /* Dump the sense data */ 8836 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, "\n", NULL); 8837 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, 8838 "Sense data for satapkt %p ATAPI cmd 0x%x", 8839 spkt, sata_cmd->satacmd_acdb[0]); 8840 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, 8841 " es_code 0x%x es_class 0x%x " 8842 "es_key 0x%x es_add_code 0x%x " 8843 "es_qual_code 0x%x", 8844 rqsense->es_code, rqsense->es_class, 8845 rqsense->es_key, rqsense->es_add_code, 8846 rqsense->es_qual_code); 8847 #endif 8848 } 8849 8850 sata_free_error_retrieval_pkt(rs_spkt); 8851 } 8852 8853 /* 8854 * Fatal errors will cause the HBA to enter the ERR: Fatal state. To recover, 8855 * the port must be restarted. When the HBA detects thus error, it may try 8856 * to abort a transfer. And if the transfer was aborted, the device is 8857 * expected to send a D2H Register FIS with PxTFD.STS.ERR set to '1' and both 8858 * PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0'. Then system software knows 8859 * that the device is in a stable status and transfers may be restarted without 8860 * issuing a COMRESET to the device. If PxTFD.STS.BSY or PxTFD.STS.DRQ is set, 8861 * then the software will send the COMRESET to do the port reset. 8862 * 8863 * Software should perform the appropriate error recovery actions based on 8864 * whether non-queued commands were being issued or natived command queuing 8865 * commands were being issued. 8866 * 8867 * And software will complete the command that had the error with error mark 8868 * to higher level software. 8869 * 8870 * Fatal errors include the following: 8871 * PxIS.IFS - Interface Fatal Error Status 8872 * PxIS.HBDS - Host Bus Data Error Status 8873 * PxIS.HBFS - Host Bus Fatal Error Status 8874 * PxIS.TFES - Task File Error Status 8875 * 8876 * WARNING!!! ahciport_mutex should be acquired before the function is called. 8877 */ 8878 static void 8879 ahci_fatal_error_recovery_handler(ahci_ctl_t *ahci_ctlp, 8880 ahci_port_t *ahci_portp, ahci_addr_t *addrp, uint32_t intr_status) 8881 { 8882 uint32_t port_cmd_status; 8883 uint32_t slot_status = 0; 8884 uint32_t failed_tags = 0; 8885 int failed_slot; 8886 int reset_flag = 0, flag = 0; 8887 ahci_fis_d2h_register_t *ahci_rcvd_fisp; 8888 sata_cmd_t *sata_cmd = NULL; 8889 sata_pkt_t *spkt = NULL; 8890 #if AHCI_DEBUG 8891 ahci_cmd_header_t *cmd_header; 8892 #endif 8893 uint8_t port = addrp->aa_port; 8894 8895 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8896 "ahci_fatal_error_recovery_handler enter: port %d", port); 8897 8898 /* Port multiplier error */ 8899 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 8900 /* FBS code is neither completed nor tested. */ 8901 ahci_pmult_error_recovery_handler(ahci_ctlp, ahci_portp, 8902 port, intr_status); 8903 8904 /* Force a port reset */ 8905 flag = AHCI_PORT_RESET; 8906 } 8907 8908 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 8909 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8910 8911 /* Read PxCI to see which commands are still outstanding */ 8912 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8913 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 8914 8915 /* 8916 * Read PxCMD.CCS to determine the slot that the HBA 8917 * was processing when the error occurred. 8918 */ 8919 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8920 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 8921 failed_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 8922 AHCI_CMD_STATUS_CCS_SHIFT; 8923 8924 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8925 spkt = ahci_portp->ahciport_err_retri_pkt; 8926 ASSERT(spkt != NULL); 8927 } else { 8928 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 8929 if (spkt == NULL) { 8930 /* May happen when interface errors occur? */ 8931 goto next; 8932 } 8933 } 8934 8935 #if AHCI_DEBUG 8936 /* 8937 * Debugging purpose... 8938 */ 8939 if (ahci_portp->ahciport_prd_bytecounts[failed_slot]) { 8940 cmd_header = 8941 &ahci_portp->ahciport_cmd_list[failed_slot]; 8942 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 8943 "ahci_fatal_error_recovery_handler: port %d, " 8944 "PRD Byte Count = 0x%x, " 8945 "ahciport_prd_bytecounts = 0x%x", port, 8946 cmd_header->ahcich_prd_byte_count, 8947 ahci_portp->ahciport_prd_bytecounts[failed_slot]); 8948 } 8949 #endif 8950 8951 sata_cmd = &spkt->satapkt_cmd; 8952 8953 /* Fill out the status and error registers for PxIS.TFES */ 8954 if (intr_status & AHCI_INTR_STATUS_TFES) { 8955 ahci_rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 8956 ahcirf_d2h_register_fis); 8957 8958 /* Copy the error context back to the sata_cmd */ 8959 ahci_copy_err_cnxt(sata_cmd, ahci_rcvd_fisp); 8960 } 8961 8962 /* The failed command must be one of the outstanding commands */ 8963 failed_tags = 0x1 << failed_slot; 8964 ASSERT(failed_tags & slot_status); 8965 8966 /* Update the sata registers, especially PxSERR register */ 8967 ahci_update_sata_registers(ahci_ctlp, port, 8968 &spkt->satapkt_device); 8969 8970 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8971 /* Read PxSACT to see which commands are still outstanding */ 8972 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8973 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 8974 } 8975 next: 8976 8977 #if AHCI_DEBUG 8978 /* 8979 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is 8980 * set, it means a fatal error happened after REQUEST SENSE command 8981 * or READ LOG EXT command is delivered to the HBA during the error 8982 * recovery process. At this time, the only outstanding command is 8983 * supposed to be REQUEST SENSE command or READ LOG EXT command. 8984 */ 8985 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8986 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8987 "ahci_fatal_error_recovery_handler: port %d REQUEST SENSE " 8988 "command or READ LOG EXT command for error data retrieval " 8989 "failed", port); 8990 ASSERT(slot_status == 0x1); 8991 ASSERT(failed_slot == 0); 8992 ASSERT(spkt->satapkt_cmd.satacmd_acdb[0] == 8993 SCMD_REQUEST_SENSE || 8994 spkt->satapkt_cmd.satacmd_cmd_reg == 8995 SATAC_READ_LOG_EXT); 8996 } 8997 #endif 8998 8999 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 9000 ahci_portp->ahciport_mop_in_progress++; 9001 9002 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 9003 port, flag, &reset_flag); 9004 9005 /* 9006 * Won't retrieve error information: 9007 * 1. Port reset was involved to recover 9008 * 2. Device is gone 9009 * 3. IDENTIFY DEVICE command sent to ATAPI device 9010 * 4. REQUEST SENSE or READ LOG EXT command during error recovery 9011 */ 9012 if (reset_flag || 9013 ahci_portp->ahciport_device_type == SATA_DTYPE_NONE || 9014 spkt && spkt->satapkt_cmd.satacmd_cmd_reg == SATAC_ID_DEVICE || 9015 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 9016 goto out; 9017 9018 /* 9019 * Deliver READ LOG EXT to gather information about the error when 9020 * a COMRESET has not been performed as part of the error recovery 9021 * during NCQ command processing. 9022 */ 9023 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9024 failed_tags = ahci_get_rdlogext_data(ahci_ctlp, 9025 ahci_portp, port); 9026 goto out; 9027 } 9028 9029 /* 9030 * Deliver REQUEST SENSE for ATAPI command to gather information about 9031 * the error when a COMRESET has not been performed as part of the 9032 * error recovery. 9033 */ 9034 if (spkt && ahci_portp->ahciport_device_type == SATA_DTYPE_ATAPI) 9035 ahci_get_rqsense_data(ahci_ctlp, ahci_portp, port, spkt); 9036 out: 9037 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9038 "ahci_fatal_error_recovery_handler: port %d fatal error " 9039 "occurred slot_status = 0x%x, pending_tags = 0x%x, " 9040 "pending_ncq_tags = 0x%x failed_tags = 0x%x", 9041 port, slot_status, ahci_portp->ahciport_pending_tags, 9042 ahci_portp->ahciport_pending_ncq_tags, failed_tags); 9043 9044 ahci_mop_commands(ahci_ctlp, 9045 ahci_portp, 9046 slot_status, 9047 failed_tags, /* failed tags */ 9048 0, /* timeout tags */ 9049 0, /* aborted tags */ 9050 0); /* reset tags */ 9051 } 9052 9053 /* 9054 * Used to recovery a PMULT pmport fatal error under FIS-based switching. 9055 * 1. device specific.PxFBS.SDE=1 9056 * 2. Non-Deivce specific. 9057 * Nothing will be done when Command-based switching is employed. 9058 * 9059 * Currently code is neither completed nor tested. 9060 * 9061 * WARNING!!! ahciport_mutex should be acquired before the function 9062 * is called. 9063 */ 9064 static void 9065 ahci_pmult_error_recovery_handler(ahci_ctl_t *ahci_ctlp, 9066 ahci_port_t *ahci_portp, uint8_t port, uint32_t intr_status) 9067 { 9068 #ifndef __lock_lint 9069 _NOTE(ARGUNUSED(intr_status)) 9070 #endif 9071 uint32_t port_fbs_ctrl; 9072 int loop_count = 0; 9073 ahci_addr_t addr; 9074 9075 /* Nothing will be done under Command-based switching. */ 9076 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_FBSS)) 9077 return; 9078 9079 port_fbs_ctrl = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9080 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port)); 9081 9082 if (!(port_fbs_ctrl & AHCI_FBS_EN)) 9083 /* FBS is not enabled. */ 9084 return; 9085 9086 /* Problem's getting complicated now. */ 9087 /* 9088 * If FIS-based switching is used, we need to check 9089 * the PxFBS to see the error type. 9090 */ 9091 port_fbs_ctrl = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9092 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port)); 9093 9094 /* Refer to spec(v1.2) 9.3.6.1 */ 9095 if (port_fbs_ctrl & AHCI_FBS_SDE) { 9096 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9097 "A Device Sepcific Error: port %d", port); 9098 /* 9099 * Controller has paused commands for all other 9100 * sub-devices until PxFBS.DEC is set. 9101 */ 9102 ahci_reject_all_abort_pkts(ahci_ctlp, 9103 ahci_portp, 0); 9104 9105 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 9106 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port), 9107 port_fbs_ctrl | AHCI_FBS_DEC); 9108 9109 /* 9110 * Wait controller clear PxFBS.DEC, 9111 * then we can continue. 9112 */ 9113 loop_count = 0; 9114 do { 9115 port_fbs_ctrl = ddi_get32(ahci_ctlp-> 9116 ahcictl_ahci_acc_handle, (uint32_t *) 9117 AHCI_PORT_PxFBS(ahci_ctlp, port)); 9118 9119 if (loop_count++ > 1000) 9120 /* 9121 * Esclate the error. Follow 9122 * non-device specific error 9123 * procedure. 9124 */ 9125 return; 9126 9127 drv_usecwait(AHCI_100US_USECS); 9128 } while (port_fbs_ctrl & AHCI_FBS_DEC); 9129 9130 /* 9131 * Issue a software reset to ensure drive is in 9132 * a known state. 9133 */ 9134 (void) ahci_software_reset(ahci_ctlp, 9135 ahci_portp, &addr); 9136 9137 } else { 9138 9139 /* Process Non-Device Specific Error. */ 9140 /* This will be handled later on. */ 9141 cmn_err(CE_NOTE, "!FBS is not supported now."); 9142 } 9143 } 9144 /* 9145 * Handle events - fatal error recovery 9146 */ 9147 static void 9148 ahci_events_handler(void *args) 9149 { 9150 ahci_event_arg_t *ahci_event_arg; 9151 ahci_ctl_t *ahci_ctlp; 9152 ahci_port_t *ahci_portp; 9153 ahci_addr_t *addrp; 9154 uint32_t event; 9155 9156 ahci_event_arg = (ahci_event_arg_t *)args; 9157 9158 ahci_ctlp = ahci_event_arg->ahciea_ctlp; 9159 ahci_portp = ahci_event_arg->ahciea_portp; 9160 addrp = ahci_event_arg->ahciea_addrp; 9161 event = ahci_event_arg->ahciea_event; 9162 9163 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 9164 "ahci_events_handler enter: port %d intr_status = 0x%x", 9165 ahci_portp->ahciport_port_num, event); 9166 9167 mutex_enter(&ahci_portp->ahciport_mutex); 9168 9169 /* 9170 * ahci_intr_phyrdy_change() may have rendered it to 9171 * SATA_DTYPE_NONE. 9172 */ 9173 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 9174 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 9175 "ahci_events_handler: port %d no device attached, " 9176 "and just return without doing anything", 9177 ahci_portp->ahciport_port_num); 9178 goto out; 9179 } 9180 9181 if (event & (AHCI_INTR_STATUS_IFS | 9182 AHCI_INTR_STATUS_HBDS | 9183 AHCI_INTR_STATUS_HBFS | 9184 AHCI_INTR_STATUS_TFES)) 9185 ahci_fatal_error_recovery_handler(ahci_ctlp, ahci_portp, 9186 addrp, event); 9187 9188 out: 9189 mutex_exit(&ahci_portp->ahciport_mutex); 9190 } 9191 9192 /* 9193 * ahci_watchdog_handler() and ahci_do_sync_start will call us if they 9194 * detect there are some commands which are timed out. 9195 */ 9196 static void 9197 ahci_timeout_pkts(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 9198 uint8_t port, uint32_t tmp_timeout_tags) 9199 { 9200 uint32_t slot_status = 0; 9201 uint32_t finished_tags = 0; 9202 uint32_t timeout_tags = 0; 9203 9204 AHCIDBG(AHCIDBG_TIMEOUT|AHCIDBG_ENTRY, ahci_ctlp, 9205 "ahci_timeout_pkts enter: port %d", port); 9206 9207 mutex_enter(&ahci_portp->ahciport_mutex); 9208 9209 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 9210 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) || 9211 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9212 /* Read PxCI to see which commands are still outstanding */ 9213 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9214 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 9215 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9216 /* Read PxSACT to see which commands are still outstanding */ 9217 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9218 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 9219 } 9220 9221 #if AHCI_DEBUG 9222 /* 9223 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is 9224 * set, it means a fatal error happened after REQUEST SENSE command 9225 * or READ LOG EXT command is delivered to the HBA during the error 9226 * recovery process. At this time, the only outstanding command is 9227 * supposed to be REQUEST SENSE command or READ LOG EXT command. 9228 */ 9229 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9230 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, ahci_ctlp, 9231 "ahci_timeout_pkts called while REQUEST SENSE " 9232 "command or READ LOG EXT command for error recovery " 9233 "timed out timeout_tags = 0x%x, slot_status = 0x%x, " 9234 "pending_tags = 0x%x, pending_ncq_tags = 0x%x", 9235 tmp_timeout_tags, slot_status, 9236 ahci_portp->ahciport_pending_tags, 9237 ahci_portp->ahciport_pending_ncq_tags); 9238 ASSERT(slot_status == 0x1); 9239 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9240 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, ahci_ctlp, 9241 "ahci_timeout_pkts called while executing R/W PMULT " 9242 "command timeout_tags = 0x%x, slot_status = 0x%x", 9243 tmp_timeout_tags, slot_status); 9244 ASSERT(slot_status == 0x1); 9245 } 9246 #endif 9247 9248 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 9249 ahci_portp->ahciport_mop_in_progress++; 9250 9251 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 9252 port, AHCI_PORT_RESET, NULL); 9253 9254 /* 9255 * Re-identify timeout tags because some previously checked commands 9256 * could already complete. 9257 */ 9258 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9259 finished_tags = ahci_portp->ahciport_pending_tags & 9260 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 9261 timeout_tags = tmp_timeout_tags & ~finished_tags; 9262 9263 AHCIDBG(AHCIDBG_TIMEOUT, ahci_ctlp, 9264 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, " 9265 "timeout_tags = 0x%x, port_cmd_issue = 0x%x, " 9266 "pending_tags = 0x%x ", 9267 port, finished_tags, timeout_tags, 9268 slot_status, ahci_portp->ahciport_pending_tags); 9269 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9270 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 9271 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 9272 timeout_tags = tmp_timeout_tags & ~finished_tags; 9273 9274 AHCIDBG(AHCIDBG_TIMEOUT|AHCIDBG_NCQ, ahci_ctlp, 9275 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, " 9276 "timeout_tags = 0x%x, port_sactive = 0x%x, " 9277 "pending_ncq_tags = 0x%x ", 9278 port, finished_tags, timeout_tags, 9279 slot_status, ahci_portp->ahciport_pending_ncq_tags); 9280 } else if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 9281 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9282 timeout_tags = tmp_timeout_tags; 9283 } 9284 9285 ahci_mop_commands(ahci_ctlp, 9286 ahci_portp, 9287 slot_status, 9288 0, /* failed tags */ 9289 timeout_tags, /* timeout tags */ 9290 0, /* aborted tags */ 9291 0); /* reset tags */ 9292 9293 mutex_exit(&ahci_portp->ahciport_mutex); 9294 } 9295 9296 /* 9297 * Watchdog handler kicks in every 5 seconds to timeout any commands pending 9298 * for long time. 9299 */ 9300 static void 9301 ahci_watchdog_handler(ahci_ctl_t *ahci_ctlp) 9302 { 9303 ahci_port_t *ahci_portp; 9304 sata_pkt_t *spkt; 9305 uint32_t pending_tags; 9306 uint32_t timeout_tags; 9307 uint32_t port_cmd_status; 9308 uint32_t port_sactive; 9309 uint8_t port; 9310 int tmp_slot; 9311 int current_slot; 9312 uint32_t current_tags; 9313 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 9314 /* max number of cycles this packet should survive */ 9315 int max_life_cycles; 9316 9317 /* how many cycles this packet survived so far */ 9318 int watched_cycles; 9319 9320 mutex_enter(&ahci_ctlp->ahcictl_mutex); 9321 9322 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 9323 "ahci_watchdog_handler entered", NULL); 9324 9325 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 9326 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 9327 continue; 9328 } 9329 9330 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 9331 9332 mutex_enter(&ahci_portp->ahciport_mutex); 9333 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 9334 mutex_exit(&ahci_portp->ahciport_mutex); 9335 continue; 9336 } 9337 9338 /* Skip the check for those ports in error recovery */ 9339 if ((ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) && 9340 !(ERR_RETRI_CMD_IN_PROGRESS(ahci_portp))) { 9341 mutex_exit(&ahci_portp->ahciport_mutex); 9342 continue; 9343 } 9344 9345 pending_tags = 0; 9346 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9347 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 9348 9349 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 9350 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9351 current_slot = 0; 9352 pending_tags = 0x1; 9353 } else if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9354 current_slot = 9355 (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 9356 AHCI_CMD_STATUS_CCS_SHIFT; 9357 pending_tags = ahci_portp->ahciport_pending_tags; 9358 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9359 port_sactive = ddi_get32( 9360 ahci_ctlp->ahcictl_ahci_acc_handle, 9361 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 9362 current_tags = port_sactive & 9363 ~port_cmd_status & 9364 AHCI_NCQ_SLOT_MASK(ahci_portp); 9365 pending_tags = ahci_portp->ahciport_pending_ncq_tags; 9366 } 9367 9368 timeout_tags = 0; 9369 while (pending_tags) { 9370 tmp_slot = ddi_ffs(pending_tags) - 1; 9371 if (tmp_slot == -1) { 9372 break; 9373 } 9374 9375 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 9376 spkt = ahci_portp->ahciport_err_retri_pkt; 9377 else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 9378 spkt = ahci_portp->ahciport_rdwr_pmult_pkt; 9379 else 9380 spkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 9381 9382 if ((spkt != NULL) && spkt->satapkt_time && 9383 !(spkt->satapkt_op_mode & SATA_OPMODE_POLLING)) { 9384 /* 9385 * We are overloading satapkt_hba_driver_private 9386 * with watched_cycle count. 9387 * 9388 * If a packet has survived for more than it's 9389 * max life cycles, it is a candidate for time 9390 * out. 9391 */ 9392 watched_cycles = (int)(intptr_t) 9393 spkt->satapkt_hba_driver_private; 9394 watched_cycles++; 9395 max_life_cycles = (spkt->satapkt_time + 9396 ahci_watchdog_timeout - 1) / 9397 ahci_watchdog_timeout; 9398 9399 spkt->satapkt_hba_driver_private = 9400 (void *)(intptr_t)watched_cycles; 9401 9402 if (watched_cycles <= max_life_cycles) 9403 goto next; 9404 9405 #if AHCI_DEBUG 9406 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9407 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, 9408 ahci_ctlp, "watchdog: the current " 9409 "tags is 0x%x", current_tags); 9410 } else { 9411 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, 9412 ahci_ctlp, "watchdog: the current " 9413 "slot is %d", current_slot); 9414 } 9415 #endif 9416 9417 /* 9418 * We need to check whether the HBA has 9419 * begun to execute the command, if not, 9420 * then re-set the timer of the command. 9421 */ 9422 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) && 9423 (tmp_slot != current_slot) || 9424 NCQ_CMD_IN_PROGRESS(ahci_portp) && 9425 ((0x1 << tmp_slot) & current_tags)) { 9426 spkt->satapkt_hba_driver_private = 9427 (void *)(intptr_t)0; 9428 } else { 9429 timeout_tags |= (0x1 << tmp_slot); 9430 cmn_err(CE_WARN, "!ahci%d: watchdog " 9431 "port %d satapkt 0x%p timed out\n", 9432 instance, port, (void *)spkt); 9433 } 9434 } 9435 next: 9436 CLEAR_BIT(pending_tags, tmp_slot); 9437 } 9438 9439 if (timeout_tags) { 9440 mutex_exit(&ahci_portp->ahciport_mutex); 9441 mutex_exit(&ahci_ctlp->ahcictl_mutex); 9442 ahci_timeout_pkts(ahci_ctlp, ahci_portp, 9443 port, timeout_tags); 9444 mutex_enter(&ahci_ctlp->ahcictl_mutex); 9445 mutex_enter(&ahci_portp->ahciport_mutex); 9446 } 9447 9448 mutex_exit(&ahci_portp->ahciport_mutex); 9449 } 9450 9451 /* Re-install the watchdog timeout handler */ 9452 if (ahci_ctlp->ahcictl_timeout_id != 0) { 9453 ahci_ctlp->ahcictl_timeout_id = 9454 timeout((void (*)(void *))ahci_watchdog_handler, 9455 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 9456 } 9457 9458 mutex_exit(&ahci_ctlp->ahcictl_mutex); 9459 } 9460 9461 /* 9462 * Fill the error context into sata_cmd for non-queued command error. 9463 */ 9464 static void 9465 ahci_copy_err_cnxt(sata_cmd_t *scmd, ahci_fis_d2h_register_t *rfisp) 9466 { 9467 scmd->satacmd_status_reg = GET_RFIS_STATUS(rfisp); 9468 scmd->satacmd_error_reg = GET_RFIS_ERROR(rfisp); 9469 scmd->satacmd_sec_count_lsb = GET_RFIS_SECTOR_COUNT(rfisp); 9470 scmd->satacmd_lba_low_lsb = GET_RFIS_CYL_LOW(rfisp); 9471 scmd->satacmd_lba_mid_lsb = GET_RFIS_CYL_MID(rfisp); 9472 scmd->satacmd_lba_high_lsb = GET_RFIS_CYL_HI(rfisp); 9473 scmd->satacmd_device_reg = GET_RFIS_DEV_HEAD(rfisp); 9474 9475 if (scmd->satacmd_addr_type == ATA_ADDR_LBA48) { 9476 scmd->satacmd_sec_count_msb = GET_RFIS_SECTOR_COUNT_EXP(rfisp); 9477 scmd->satacmd_lba_low_msb = GET_RFIS_CYL_LOW_EXP(rfisp); 9478 scmd->satacmd_lba_mid_msb = GET_RFIS_CYL_MID_EXP(rfisp); 9479 scmd->satacmd_lba_high_msb = GET_RFIS_CYL_HI_EXP(rfisp); 9480 } 9481 } 9482 9483 /* 9484 * Fill the ncq error page into sata_cmd for queued command error. 9485 */ 9486 static void 9487 ahci_copy_ncq_err_page(sata_cmd_t *scmd, 9488 struct sata_ncq_error_recovery_page *ncq_err_page) 9489 { 9490 scmd->satacmd_sec_count_msb = ncq_err_page->ncq_sector_count_ext; 9491 scmd->satacmd_sec_count_lsb = ncq_err_page->ncq_sector_count; 9492 scmd->satacmd_lba_low_msb = ncq_err_page->ncq_sector_number_ext; 9493 scmd->satacmd_lba_low_lsb = ncq_err_page->ncq_sector_number; 9494 scmd->satacmd_lba_mid_msb = ncq_err_page->ncq_cyl_low_ext; 9495 scmd->satacmd_lba_mid_lsb = ncq_err_page->ncq_cyl_low; 9496 scmd->satacmd_lba_high_msb = ncq_err_page->ncq_cyl_high_ext; 9497 scmd->satacmd_lba_high_lsb = ncq_err_page->ncq_cyl_high; 9498 scmd->satacmd_device_reg = ncq_err_page->ncq_dev_head; 9499 scmd->satacmd_status_reg = ncq_err_page->ncq_status; 9500 scmd->satacmd_error_reg = ncq_err_page->ncq_error; 9501 } 9502 9503 /* 9504 * Put the respective register value to sata_cmd_t for satacmd_flags. 9505 */ 9506 static void 9507 ahci_copy_out_regs(sata_cmd_t *scmd, ahci_fis_d2h_register_t *rfisp) 9508 { 9509 if (scmd->satacmd_flags.sata_copy_out_sec_count_msb) 9510 scmd->satacmd_sec_count_msb = GET_RFIS_SECTOR_COUNT_EXP(rfisp); 9511 if (scmd->satacmd_flags.sata_copy_out_lba_low_msb) 9512 scmd->satacmd_lba_low_msb = GET_RFIS_CYL_LOW_EXP(rfisp); 9513 if (scmd->satacmd_flags.sata_copy_out_lba_mid_msb) 9514 scmd->satacmd_lba_mid_msb = GET_RFIS_CYL_MID_EXP(rfisp); 9515 if (scmd->satacmd_flags.sata_copy_out_lba_high_msb) 9516 scmd->satacmd_lba_high_msb = GET_RFIS_CYL_HI_EXP(rfisp); 9517 if (scmd->satacmd_flags.sata_copy_out_sec_count_lsb) 9518 scmd->satacmd_sec_count_lsb = GET_RFIS_SECTOR_COUNT(rfisp); 9519 if (scmd->satacmd_flags.sata_copy_out_lba_low_lsb) 9520 scmd->satacmd_lba_low_lsb = GET_RFIS_CYL_LOW(rfisp); 9521 if (scmd->satacmd_flags.sata_copy_out_lba_mid_lsb) 9522 scmd->satacmd_lba_mid_lsb = GET_RFIS_CYL_MID(rfisp); 9523 if (scmd->satacmd_flags.sata_copy_out_lba_high_lsb) 9524 scmd->satacmd_lba_high_lsb = GET_RFIS_CYL_HI(rfisp); 9525 if (scmd->satacmd_flags.sata_copy_out_device_reg) 9526 scmd->satacmd_device_reg = GET_RFIS_DEV_HEAD(rfisp); 9527 if (scmd->satacmd_flags.sata_copy_out_error_reg) 9528 scmd->satacmd_error_reg = GET_RFIS_ERROR(rfisp); 9529 } 9530 9531 static void 9532 ahci_log_fatal_error_message(ahci_ctl_t *ahci_ctlp, uint8_t port, 9533 uint32_t intr_status) 9534 { 9535 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 9536 9537 if (intr_status & AHCI_INTR_STATUS_IFS) 9538 cmn_err(CE_WARN, "!ahci%d: ahci port %d has interface fatal " 9539 "error", instance, port); 9540 9541 if (intr_status & AHCI_INTR_STATUS_HBDS) 9542 cmn_err(CE_WARN, "!ahci%d: ahci port %d has bus data error", 9543 instance, port); 9544 9545 if (intr_status & AHCI_INTR_STATUS_HBFS) 9546 cmn_err(CE_WARN, "!ahci%d: ahci port %d has bus fatal error", 9547 instance, port); 9548 9549 if (intr_status & AHCI_INTR_STATUS_TFES) 9550 cmn_err(CE_WARN, "!ahci%d: ahci port %d has task file error", 9551 instance, port); 9552 9553 cmn_err(CE_WARN, "!ahci%d: ahci port %d is trying to do error " 9554 "recovery", instance, port); 9555 } 9556 9557 /* 9558 * Dump the serror message to the log. 9559 */ 9560 static void 9561 ahci_log_serror_message(ahci_ctl_t *ahci_ctlp, uint8_t port, 9562 uint32_t port_serror, int debug_only) 9563 { 9564 static char err_buf[512]; 9565 static char err_msg_header[16]; 9566 char *err_msg = err_buf; 9567 9568 *err_buf = '\0'; 9569 *err_msg_header = '\0'; 9570 9571 if (port_serror & SERROR_DATA_ERR_FIXED) { 9572 err_msg = strcat(err_msg, 9573 "\tRecovered Data Integrity Error (I)\n"); 9574 } 9575 9576 if (port_serror & SERROR_COMM_ERR_FIXED) { 9577 err_msg = strcat(err_msg, 9578 "\tRecovered Communication Error (M)\n"); 9579 } 9580 9581 if (port_serror & SERROR_DATA_ERR) { 9582 err_msg = strcat(err_msg, 9583 "\tTransient Data Integrity Error (T)\n"); 9584 } 9585 9586 if (port_serror & SERROR_PERSISTENT_ERR) { 9587 err_msg = strcat(err_msg, 9588 "\tPersistent Communication or Data Integrity Error (C)\n"); 9589 } 9590 9591 if (port_serror & SERROR_PROTOCOL_ERR) { 9592 err_msg = strcat(err_msg, "\tProtocol Error (P)\n"); 9593 } 9594 9595 if (port_serror & SERROR_INT_ERR) { 9596 err_msg = strcat(err_msg, "\tInternal Error (E)\n"); 9597 } 9598 9599 if (port_serror & SERROR_PHY_RDY_CHG) { 9600 err_msg = strcat(err_msg, "\tPhyRdy Change (N)\n"); 9601 } 9602 9603 if (port_serror & SERROR_PHY_INT_ERR) { 9604 err_msg = strcat(err_msg, "\tPhy Internal Error (I)\n"); 9605 } 9606 9607 if (port_serror & SERROR_COMM_WAKE) { 9608 err_msg = strcat(err_msg, "\tComm Wake (W)\n"); 9609 } 9610 9611 if (port_serror & SERROR_10B_TO_8B_ERR) { 9612 err_msg = strcat(err_msg, "\t10B to 8B Decode Error (B)\n"); 9613 } 9614 9615 if (port_serror & SERROR_DISPARITY_ERR) { 9616 err_msg = strcat(err_msg, "\tDisparity Error (D)\n"); 9617 } 9618 9619 if (port_serror & SERROR_CRC_ERR) { 9620 err_msg = strcat(err_msg, "\tCRC Error (C)\n"); 9621 } 9622 9623 if (port_serror & SERROR_HANDSHAKE_ERR) { 9624 err_msg = strcat(err_msg, "\tHandshake Error (H)\n"); 9625 } 9626 9627 if (port_serror & SERROR_LINK_SEQ_ERR) { 9628 err_msg = strcat(err_msg, "\tLink Sequence Error (S)\n"); 9629 } 9630 9631 if (port_serror & SERROR_TRANS_ERR) { 9632 err_msg = strcat(err_msg, 9633 "\tTransport state transition error (T)\n"); 9634 } 9635 9636 if (port_serror & SERROR_FIS_TYPE) { 9637 err_msg = strcat(err_msg, "\tUnknown FIS Type (F)\n"); 9638 } 9639 9640 if (port_serror & SERROR_EXCHANGED_ERR) { 9641 err_msg = strcat(err_msg, "\tExchanged (X)\n"); 9642 } 9643 9644 if (err_msg == NULL) 9645 return; 9646 9647 if (debug_only) { 9648 (void) sprintf(err_msg_header, "port %d", port); 9649 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, err_msg_header, NULL); 9650 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, err_msg, NULL); 9651 } else if (ahci_ctlp) { 9652 cmn_err(CE_WARN, "!ahci%d: %s %s", 9653 ddi_get_instance(ahci_ctlp->ahcictl_dip), 9654 err_msg_header, err_msg); 9655 9656 /* sata trace debug */ 9657 sata_trace_debug(ahci_ctlp->ahcictl_dip, 9658 "ahci%d: %s %s", ddi_get_instance(ahci_ctlp->ahcictl_dip), 9659 err_msg_header, err_msg); 9660 } else { 9661 cmn_err(CE_WARN, "!ahci: %s %s", err_msg_header, err_msg); 9662 9663 /* sata trace debug */ 9664 sata_trace_debug(NULL, "ahci: %s %s", err_msg_header, err_msg); 9665 } 9666 } 9667 9668 /* 9669 * Translate the sata_address_t type into the ahci_addr_t type. 9670 * sata_device.satadev_addr structure is used as source. 9671 */ 9672 static void 9673 ahci_get_ahci_addr(ahci_ctl_t *ahci_ctlp, sata_device_t *sd, 9674 ahci_addr_t *ahci_addrp) 9675 { 9676 sata_address_t *sata_addrp = &sd->satadev_addr; 9677 ahci_addrp->aa_port = 9678 ahci_ctlp->ahcictl_cport_to_port[sata_addrp->cport]; 9679 ahci_addrp->aa_pmport = sata_addrp->pmport; 9680 9681 switch (sata_addrp->qual) { 9682 case SATA_ADDR_DCPORT: 9683 case SATA_ADDR_CPORT: 9684 ahci_addrp->aa_qual = AHCI_ADDR_PORT; 9685 break; 9686 case SATA_ADDR_PMULT: 9687 case SATA_ADDR_PMULT_SPEC: 9688 ahci_addrp->aa_qual = AHCI_ADDR_PMULT; 9689 break; 9690 case SATA_ADDR_DPMPORT: 9691 case SATA_ADDR_PMPORT: 9692 ahci_addrp->aa_qual = AHCI_ADDR_PMPORT; 9693 break; 9694 case SATA_ADDR_NULL: 9695 default: 9696 /* something went wrong */ 9697 ahci_addrp->aa_qual = AHCI_ADDR_NULL; 9698 break; 9699 } 9700 } 9701 9702 /* 9703 * This routine is to calculate the total number of ports implemented 9704 * by the HBA. 9705 */ 9706 static int 9707 ahci_get_num_implemented_ports(uint32_t ports_implemented) 9708 { 9709 uint8_t i; 9710 int num = 0; 9711 9712 for (i = 0; i < AHCI_MAX_PORTS; i++) { 9713 if (((uint32_t)0x1 << i) & ports_implemented) 9714 num++; 9715 } 9716 9717 return (num); 9718 } 9719 9720 #if AHCI_DEBUG 9721 static void 9722 ahci_log(ahci_ctl_t *ahci_ctlp, uint_t level, char *fmt, ...) 9723 { 9724 static char name[16]; 9725 va_list ap; 9726 9727 mutex_enter(&ahci_log_mutex); 9728 9729 va_start(ap, fmt); 9730 if (ahci_ctlp) { 9731 (void) sprintf(name, "ahci%d: ", 9732 ddi_get_instance(ahci_ctlp->ahcictl_dip)); 9733 } else { 9734 (void) sprintf(name, "ahci: "); 9735 } 9736 9737 (void) vsprintf(ahci_log_buf, fmt, ap); 9738 va_end(ap); 9739 9740 cmn_err(level, "%s%s", name, ahci_log_buf); 9741 9742 mutex_exit(&ahci_log_mutex); 9743 } 9744 #endif 9745 9746 /* 9747 * quiesce(9E) entry point. 9748 * 9749 * This function is called when the system is single-threaded at high 9750 * PIL with preemption disabled. Therefore, this function must not be 9751 * blocked. 9752 * 9753 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure. 9754 * DDI_FAILURE indicates an error condition and should almost never happen. 9755 */ 9756 static int 9757 ahci_quiesce(dev_info_t *dip) 9758 { 9759 ahci_ctl_t *ahci_ctlp; 9760 ahci_port_t *ahci_portp; 9761 int instance, port; 9762 9763 instance = ddi_get_instance(dip); 9764 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 9765 9766 if (ahci_ctlp == NULL) 9767 return (DDI_FAILURE); 9768 9769 #if AHCI_DEBUG 9770 ahci_debug_flags = 0; 9771 #endif 9772 9773 /* disable all the interrupts. */ 9774 ahci_disable_all_intrs(ahci_ctlp); 9775 9776 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 9777 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 9778 continue; 9779 } 9780 9781 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 9782 9783 /* 9784 * Stop the port by clearing PxCMD.ST 9785 * 9786 * Here we must disable the port interrupt because 9787 * ahci_disable_all_intrs only clear GHC.IE, and IS 9788 * register will be still set if PxIE is enabled. 9789 * When ahci shares one IRQ with other drivers, the 9790 * intr handler may claim the intr mistakenly. 9791 */ 9792 ahci_disable_port_intrs(ahci_ctlp, port); 9793 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 9794 ahci_portp, port); 9795 } 9796 9797 return (DDI_SUCCESS); 9798 } 9799