1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. 24 * Copyright 2013 Nexenta Systems, Inc. All rights reserved. 25 */ 26 27 /* 28 * AHCI (Advanced Host Controller Interface) SATA HBA Driver 29 * 30 * Power Management Support 31 * ------------------------ 32 * 33 * At the moment, the ahci driver only implements suspend/resume to 34 * support Suspend to RAM on X86 feature. Device power management isn't 35 * implemented, link power management is disabled, and hot plug isn't 36 * allowed during the period from suspend to resume. 37 * 38 * For s/r support, the ahci driver only need to implement DDI_SUSPEND 39 * and DDI_RESUME entries, and don't need to take care of new requests 40 * sent down after suspend because the target driver (sd) has already 41 * handled these conditions, and blocked these requests. For the detailed 42 * information, please check with sdopen, sdclose and sdioctl routines. 43 * 44 */ 45 46 #include <sys/note.h> 47 #include <sys/scsi/scsi.h> 48 #include <sys/pci.h> 49 #include <sys/disp.h> 50 #include <sys/sata/sata_hba.h> 51 #include <sys/sata/adapters/ahci/ahcireg.h> 52 #include <sys/sata/adapters/ahci/ahcivar.h> 53 54 /* 55 * FMA header files 56 */ 57 #include <sys/ddifm.h> 58 #include <sys/fm/protocol.h> 59 #include <sys/fm/util.h> 60 #include <sys/fm/io/ddi.h> 61 62 /* 63 * This is the string displayed by modinfo, etc. 64 * Make sure you keep the version ID up to date! 65 */ 66 static char ahci_ident[] = "ahci driver"; 67 68 /* 69 * Function prototypes for driver entry points 70 */ 71 static int ahci_attach(dev_info_t *, ddi_attach_cmd_t); 72 static int ahci_detach(dev_info_t *, ddi_detach_cmd_t); 73 static int ahci_getinfo(dev_info_t *, ddi_info_cmd_t, void *, void **); 74 static int ahci_quiesce(dev_info_t *); 75 76 /* 77 * Function prototypes for SATA Framework interfaces 78 */ 79 static int ahci_register_sata_hba_tran(ahci_ctl_t *, uint32_t); 80 static int ahci_unregister_sata_hba_tran(ahci_ctl_t *); 81 82 static int ahci_tran_probe_port(dev_info_t *, sata_device_t *); 83 static int ahci_tran_start(dev_info_t *, sata_pkt_t *spkt); 84 static int ahci_tran_abort(dev_info_t *, sata_pkt_t *, int); 85 static int ahci_tran_reset_dport(dev_info_t *, sata_device_t *); 86 static int ahci_tran_hotplug_port_activate(dev_info_t *, sata_device_t *); 87 static int ahci_tran_hotplug_port_deactivate(dev_info_t *, sata_device_t *); 88 #if defined(__lock_lint) 89 static int ahci_selftest(dev_info_t *, sata_device_t *); 90 #endif 91 92 /* 93 * FMA Prototypes 94 */ 95 static void ahci_fm_init(ahci_ctl_t *); 96 static void ahci_fm_fini(ahci_ctl_t *); 97 static int ahci_fm_error_cb(dev_info_t *, ddi_fm_error_t *, const void*); 98 int ahci_check_acc_handle(ddi_acc_handle_t); 99 int ahci_check_dma_handle(ddi_dma_handle_t); 100 void ahci_fm_ereport(ahci_ctl_t *, char *); 101 static int ahci_check_all_handle(ahci_ctl_t *); 102 static int ahci_check_ctl_handle(ahci_ctl_t *); 103 static int ahci_check_port_handle(ahci_ctl_t *, int); 104 static int ahci_check_slot_handle(ahci_port_t *, int); 105 106 /* 107 * Local function prototypes 108 */ 109 static int ahci_setup_port_base_addresses(ahci_ctl_t *, ahci_port_t *); 110 static int ahci_alloc_ports_state(ahci_ctl_t *); 111 static void ahci_dealloc_ports_state(ahci_ctl_t *); 112 static int ahci_alloc_port_state(ahci_ctl_t *, uint8_t); 113 static void ahci_dealloc_port_state(ahci_ctl_t *, uint8_t); 114 static int ahci_alloc_rcvd_fis(ahci_ctl_t *, ahci_port_t *); 115 static void ahci_dealloc_rcvd_fis(ahci_port_t *); 116 static int ahci_alloc_cmd_list(ahci_ctl_t *, ahci_port_t *); 117 static void ahci_dealloc_cmd_list(ahci_ctl_t *, ahci_port_t *); 118 static int ahci_alloc_cmd_tables(ahci_ctl_t *, ahci_port_t *); 119 static void ahci_dealloc_cmd_tables(ahci_ctl_t *, ahci_port_t *); 120 static void ahci_alloc_pmult(ahci_ctl_t *, ahci_port_t *); 121 static void ahci_dealloc_pmult(ahci_ctl_t *, ahci_port_t *); 122 123 static int ahci_initialize_controller(ahci_ctl_t *); 124 static void ahci_uninitialize_controller(ahci_ctl_t *); 125 static int ahci_initialize_port(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 126 static int ahci_config_space_init(ahci_ctl_t *); 127 static void ahci_staggered_spin_up(ahci_ctl_t *, uint8_t); 128 129 static void ahci_drain_ports_taskq(ahci_ctl_t *); 130 static int ahci_rdwr_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t *, 131 uint8_t); 132 static int ahci_read_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t *); 133 static int ahci_write_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t); 134 static int ahci_update_pmult_pscr(ahci_ctl_t *, ahci_addr_t *, 135 sata_device_t *); 136 static int ahci_update_pmult_gscr(ahci_ctl_t *, ahci_addr_t *, 137 sata_pmult_gscr_t *); 138 static int ahci_initialize_pmult(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *, 139 sata_device_t *); 140 static int ahci_initialize_pmport(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 141 static int ahci_probe_pmult(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 142 static int ahci_probe_pmport(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *, 143 sata_device_t *); 144 145 static void ahci_disable_interface_pm(ahci_ctl_t *, uint8_t); 146 static int ahci_start_port(ahci_ctl_t *, ahci_port_t *, uint8_t); 147 static void ahci_find_dev_signature(ahci_ctl_t *, ahci_port_t *, 148 ahci_addr_t *); 149 static void ahci_update_sata_registers(ahci_ctl_t *, uint8_t, sata_device_t *); 150 static int ahci_deliver_satapkt(ahci_ctl_t *, ahci_port_t *, 151 ahci_addr_t *, sata_pkt_t *); 152 static int ahci_do_sync_start(ahci_ctl_t *, ahci_port_t *, 153 ahci_addr_t *, sata_pkt_t *); 154 static int ahci_claim_free_slot(ahci_ctl_t *, ahci_port_t *, 155 ahci_addr_t *, int); 156 static void ahci_copy_err_cnxt(sata_cmd_t *, ahci_fis_d2h_register_t *); 157 static void ahci_copy_ncq_err_page(sata_cmd_t *, 158 struct sata_ncq_error_recovery_page *); 159 static void ahci_copy_out_regs(sata_cmd_t *, ahci_fis_d2h_register_t *); 160 static void ahci_add_doneq(ahci_port_t *, sata_pkt_t *, int); 161 static void ahci_flush_doneq(ahci_port_t *); 162 163 static int ahci_software_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 164 static int ahci_hba_reset(ahci_ctl_t *); 165 static int ahci_port_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 166 static int ahci_pmport_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 167 static void ahci_reject_all_abort_pkts(ahci_ctl_t *, ahci_port_t *, uint8_t); 168 static int ahci_reset_device_reject_pkts(ahci_ctl_t *, ahci_port_t *, 169 ahci_addr_t *); 170 static int ahci_reset_pmdevice_reject_pkts(ahci_ctl_t *, ahci_port_t *, 171 ahci_addr_t *); 172 static int ahci_reset_port_reject_pkts(ahci_ctl_t *, ahci_port_t *, 173 ahci_addr_t *); 174 static int ahci_reset_hba_reject_pkts(ahci_ctl_t *); 175 static int ahci_put_port_into_notrunning_state(ahci_ctl_t *, ahci_port_t *, 176 uint8_t); 177 static int ahci_restart_port_wait_till_ready(ahci_ctl_t *, ahci_port_t *, 178 uint8_t, int, int *); 179 static void ahci_mop_commands(ahci_ctl_t *, ahci_port_t *, uint32_t, 180 uint32_t, uint32_t, uint32_t, uint32_t); 181 static uint32_t ahci_get_rdlogext_data(ahci_ctl_t *, ahci_port_t *, uint8_t); 182 static void ahci_get_rqsense_data(ahci_ctl_t *, ahci_port_t *, 183 uint8_t, sata_pkt_t *); 184 static void ahci_fatal_error_recovery_handler(ahci_ctl_t *, ahci_port_t *, 185 ahci_addr_t *, uint32_t); 186 static void ahci_pmult_error_recovery_handler(ahci_ctl_t *, ahci_port_t *, 187 uint8_t, uint32_t); 188 static void ahci_timeout_pkts(ahci_ctl_t *, ahci_port_t *, 189 uint8_t, uint32_t); 190 static void ahci_events_handler(void *); 191 static void ahci_watchdog_handler(ahci_ctl_t *); 192 193 static uint_t ahci_intr(caddr_t, caddr_t); 194 static void ahci_port_intr(ahci_ctl_t *, ahci_port_t *, uint8_t); 195 static int ahci_add_intrs(ahci_ctl_t *, int); 196 static void ahci_rem_intrs(ahci_ctl_t *); 197 static void ahci_enable_all_intrs(ahci_ctl_t *); 198 static void ahci_disable_all_intrs(ahci_ctl_t *); 199 static void ahci_enable_port_intrs(ahci_ctl_t *, uint8_t); 200 static void ahci_disable_port_intrs(ahci_ctl_t *, uint8_t); 201 202 static int ahci_intr_cmd_cmplt(ahci_ctl_t *, ahci_port_t *, uint8_t); 203 static int ahci_intr_set_device_bits(ahci_ctl_t *, ahci_port_t *, uint8_t); 204 static int ahci_intr_ncq_events(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 205 static int ahci_intr_pmult_sntf_events(ahci_ctl_t *, ahci_port_t *, uint8_t); 206 static int ahci_intr_port_connect_change(ahci_ctl_t *, ahci_port_t *, uint8_t); 207 static int ahci_intr_device_mechanical_presence_status(ahci_ctl_t *, 208 ahci_port_t *, uint8_t); 209 static int ahci_intr_phyrdy_change(ahci_ctl_t *, ahci_port_t *, uint8_t); 210 static int ahci_intr_non_fatal_error(ahci_ctl_t *, ahci_port_t *, 211 uint8_t, uint32_t); 212 static int ahci_intr_fatal_error(ahci_ctl_t *, ahci_port_t *, 213 uint8_t, uint32_t); 214 static int ahci_intr_cold_port_detect(ahci_ctl_t *, ahci_port_t *, uint8_t); 215 216 static void ahci_get_ahci_addr(ahci_ctl_t *, sata_device_t *, ahci_addr_t *); 217 static int ahci_get_num_implemented_ports(uint32_t); 218 static void ahci_log_fatal_error_message(ahci_ctl_t *, uint8_t, uint32_t); 219 static void ahci_dump_commands(ahci_ctl_t *, uint8_t, uint32_t); 220 static void ahci_log_serror_message(ahci_ctl_t *, uint8_t, uint32_t, int); 221 #if AHCI_DEBUG 222 static void ahci_log(ahci_ctl_t *, uint_t, char *, ...); 223 #endif 224 225 226 /* 227 * DMA attributes for the data buffer 228 * 229 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 230 * does not support 64-bit addressing 231 */ 232 static ddi_dma_attr_t buffer_dma_attr = { 233 DMA_ATTR_V0, /* dma_attr_version */ 234 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 235 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 236 0x3fffffull, /* dma_attr_count_max i.e. for one cookie */ 237 0x2ull, /* dma_attr_align: word aligned */ 238 1, /* dma_attr_burstsizes */ 239 1, /* dma_attr_minxfer */ 240 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 241 0xffffffffull, /* dma_attr_seg */ 242 AHCI_PRDT_NUMBER, /* dma_attr_sgllen */ 243 512, /* dma_attr_granular */ 244 0, /* dma_attr_flags */ 245 }; 246 247 /* 248 * DMA attributes for the rcvd FIS 249 * 250 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 251 * does not support 64-bit addressing 252 */ 253 static ddi_dma_attr_t rcvd_fis_dma_attr = { 254 DMA_ATTR_V0, /* dma_attr_version */ 255 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 256 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 257 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 258 0x100ull, /* dma_attr_align: 256-byte aligned */ 259 1, /* dma_attr_burstsizes */ 260 1, /* dma_attr_minxfer */ 261 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 262 0xffffffffull, /* dma_attr_seg */ 263 1, /* dma_attr_sgllen */ 264 1, /* dma_attr_granular */ 265 0, /* dma_attr_flags */ 266 }; 267 268 /* 269 * DMA attributes for the command list 270 * 271 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 272 * does not support 64-bit addressing 273 */ 274 static ddi_dma_attr_t cmd_list_dma_attr = { 275 DMA_ATTR_V0, /* dma_attr_version */ 276 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 277 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 278 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 279 0x400ull, /* dma_attr_align: 1K-byte aligned */ 280 1, /* dma_attr_burstsizes */ 281 1, /* dma_attr_minxfer */ 282 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 283 0xffffffffull, /* dma_attr_seg */ 284 1, /* dma_attr_sgllen */ 285 1, /* dma_attr_granular */ 286 0, /* dma_attr_flags */ 287 }; 288 289 /* 290 * DMA attributes for cmd tables 291 * 292 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 293 * does not support 64-bit addressing 294 */ 295 static ddi_dma_attr_t cmd_table_dma_attr = { 296 DMA_ATTR_V0, /* dma_attr_version */ 297 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 298 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 299 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 300 0x80ull, /* dma_attr_align: 128-byte aligned */ 301 1, /* dma_attr_burstsizes */ 302 1, /* dma_attr_minxfer */ 303 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 304 0xffffffffull, /* dma_attr_seg */ 305 1, /* dma_attr_sgllen */ 306 1, /* dma_attr_granular */ 307 0, /* dma_attr_flags */ 308 }; 309 310 311 /* Device access attributes */ 312 static ddi_device_acc_attr_t accattr = { 313 DDI_DEVICE_ATTR_V1, 314 DDI_STRUCTURE_LE_ACC, 315 DDI_STRICTORDER_ACC, 316 DDI_DEFAULT_ACC 317 }; 318 319 320 static struct dev_ops ahcictl_dev_ops = { 321 DEVO_REV, /* devo_rev */ 322 0, /* refcnt */ 323 ahci_getinfo, /* info */ 324 nulldev, /* identify */ 325 nulldev, /* probe */ 326 ahci_attach, /* attach */ 327 ahci_detach, /* detach */ 328 nodev, /* no reset */ 329 (struct cb_ops *)0, /* driver operations */ 330 NULL, /* bus operations */ 331 NULL, /* power */ 332 ahci_quiesce, /* quiesce */ 333 }; 334 335 static sata_tran_hotplug_ops_t ahci_tran_hotplug_ops = { 336 SATA_TRAN_HOTPLUG_OPS_REV_1, 337 ahci_tran_hotplug_port_activate, 338 ahci_tran_hotplug_port_deactivate 339 }; 340 341 extern struct mod_ops mod_driverops; 342 343 static struct modldrv modldrv = { 344 &mod_driverops, /* driverops */ 345 ahci_ident, /* short description */ 346 &ahcictl_dev_ops, /* driver ops */ 347 }; 348 349 static struct modlinkage modlinkage = { 350 MODREV_1, 351 &modldrv, 352 NULL 353 }; 354 355 /* The following variables are watchdog handler related */ 356 static clock_t ahci_watchdog_timeout = 5; /* 5 seconds */ 357 static clock_t ahci_watchdog_tick; 358 359 /* 360 * This static variable indicates the size of command table, 361 * and it's changeable with prdt number, which ahci_dma_prdt_number 362 * indicates. 363 */ 364 static size_t ahci_cmd_table_size; 365 366 /* 367 * The below global variables are tunable via /etc/system 368 * 369 * ahci_dma_prdt_number 370 * ahci_msi_enabled 371 * ahci_buf_64bit_dma 372 * ahci_commu_64bit_dma 373 */ 374 375 /* The number of Physical Region Descriptor Table(PRDT) in Command Table */ 376 int ahci_dma_prdt_number = AHCI_PRDT_NUMBER; 377 378 /* AHCI MSI is tunable */ 379 boolean_t ahci_msi_enabled = B_TRUE; 380 381 /* 382 * 64-bit dma addressing for data buffer is tunable 383 * 384 * The variable controls only the below value: 385 * DBAU (upper 32-bits physical address of data block) 386 */ 387 boolean_t ahci_buf_64bit_dma = B_TRUE; 388 389 /* 390 * 64-bit dma addressing for communication system descriptors is tunable 391 * 392 * The variable controls the below three values: 393 * 394 * PxCLBU (upper 32-bits for the command list base physical address) 395 * PxFBU (upper 32-bits for the received FIS base physical address) 396 * CTBAU (upper 32-bits of command table base) 397 */ 398 boolean_t ahci_commu_64bit_dma = B_TRUE; 399 400 /* 401 * By default, 64-bit dma for data buffer will be disabled for AMD/ATI SB600 402 * chipset. If the users want to have a try with 64-bit dma, please change 403 * the below variable value to enable it. 404 */ 405 boolean_t sb600_buf_64bit_dma_disable = B_TRUE; 406 407 /* 408 * By default, 64-bit dma for command buffer will be disabled for AMD/ATI 409 * SB600/700/710/750/800. If the users want to have a try with 64-bit dma, 410 * please change the below value to enable it. 411 */ 412 boolean_t sbxxx_commu_64bit_dma_disable = B_TRUE; 413 414 415 /* 416 * End of global tunable variable definition 417 */ 418 419 #if AHCI_DEBUG 420 uint32_t ahci_debug_flags = 0; 421 #else 422 uint32_t ahci_debug_flags = (AHCIDBG_ERRS|AHCIDBG_TIMEOUT); 423 #endif 424 425 426 #if AHCI_DEBUG 427 /* The following is needed for ahci_log() */ 428 static kmutex_t ahci_log_mutex; 429 static char ahci_log_buf[512]; 430 #endif 431 432 /* Opaque state pointer initialized by ddi_soft_state_init() */ 433 static void *ahci_statep = NULL; 434 435 /* 436 * ahci module initialization. 437 */ 438 int 439 _init(void) 440 { 441 int ret; 442 443 ret = ddi_soft_state_init(&ahci_statep, sizeof (ahci_ctl_t), 0); 444 if (ret != 0) { 445 goto err_out; 446 } 447 448 #if AHCI_DEBUG 449 mutex_init(&ahci_log_mutex, NULL, MUTEX_DRIVER, NULL); 450 #endif 451 452 if ((ret = sata_hba_init(&modlinkage)) != 0) { 453 #if AHCI_DEBUG 454 mutex_destroy(&ahci_log_mutex); 455 #endif 456 ddi_soft_state_fini(&ahci_statep); 457 goto err_out; 458 } 459 460 /* watchdog tick */ 461 ahci_watchdog_tick = drv_usectohz( 462 (clock_t)ahci_watchdog_timeout * 1000000); 463 464 ret = mod_install(&modlinkage); 465 if (ret != 0) { 466 sata_hba_fini(&modlinkage); 467 #if AHCI_DEBUG 468 mutex_destroy(&ahci_log_mutex); 469 #endif 470 ddi_soft_state_fini(&ahci_statep); 471 goto err_out; 472 } 473 474 return (ret); 475 476 err_out: 477 cmn_err(CE_WARN, "!ahci: Module init failed"); 478 return (ret); 479 } 480 481 /* 482 * ahci module uninitialize. 483 */ 484 int 485 _fini(void) 486 { 487 int ret; 488 489 ret = mod_remove(&modlinkage); 490 if (ret != 0) { 491 return (ret); 492 } 493 494 /* Remove the resources allocated in _init(). */ 495 sata_hba_fini(&modlinkage); 496 #if AHCI_DEBUG 497 mutex_destroy(&ahci_log_mutex); 498 #endif 499 ddi_soft_state_fini(&ahci_statep); 500 501 return (ret); 502 } 503 504 /* 505 * _info entry point 506 */ 507 int 508 _info(struct modinfo *modinfop) 509 { 510 return (mod_info(&modlinkage, modinfop)); 511 } 512 513 /* 514 * The attach entry point for dev_ops. 515 */ 516 static int 517 ahci_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 518 { 519 ahci_ctl_t *ahci_ctlp = NULL; 520 int instance = ddi_get_instance(dip); 521 int status; 522 int attach_state; 523 uint32_t cap_status, ahci_version; 524 uint32_t ghc_control; 525 int intr_types; 526 int i; 527 pci_regspec_t *regs; 528 int regs_length; 529 int rnumber; 530 #if AHCI_DEBUG 531 int speed; 532 #endif 533 534 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, "ahci_attach enter", 535 NULL); 536 537 switch (cmd) { 538 case DDI_ATTACH: 539 break; 540 541 case DDI_RESUME: 542 543 /* 544 * During DDI_RESUME, the hardware state of the device 545 * (power may have been removed from the device) must be 546 * restored, allow pending requests to continue, and 547 * service new requests. 548 */ 549 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 550 mutex_enter(&ahci_ctlp->ahcictl_mutex); 551 552 /* 553 * GHC.AE must be set to 1 before any other AHCI register 554 * is accessed 555 */ 556 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 557 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 558 ghc_control |= AHCI_HBA_GHC_AE; 559 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 560 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 561 562 /* Restart watch thread */ 563 if (ahci_ctlp->ahcictl_timeout_id == 0) 564 ahci_ctlp->ahcictl_timeout_id = timeout( 565 (void (*)(void *))ahci_watchdog_handler, 566 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 567 568 mutex_exit(&ahci_ctlp->ahcictl_mutex); 569 570 /* 571 * Re-initialize the controller and enable the interrupts and 572 * restart all the ports. 573 * 574 * Note that so far we don't support hot-plug during 575 * suspend/resume. 576 */ 577 if (ahci_initialize_controller(ahci_ctlp) != AHCI_SUCCESS) { 578 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PM, ahci_ctlp, 579 "Failed to initialize the controller " 580 "during DDI_RESUME", NULL); 581 return (DDI_FAILURE); 582 } 583 584 mutex_enter(&ahci_ctlp->ahcictl_mutex); 585 ahci_ctlp->ahcictl_flags &= ~ AHCI_SUSPEND; 586 mutex_exit(&ahci_ctlp->ahcictl_mutex); 587 588 return (DDI_SUCCESS); 589 590 default: 591 return (DDI_FAILURE); 592 } 593 594 attach_state = AHCI_ATTACH_STATE_NONE; 595 596 /* Allocate soft state */ 597 status = ddi_soft_state_zalloc(ahci_statep, instance); 598 if (status != DDI_SUCCESS) { 599 cmn_err(CE_WARN, "!ahci%d: Cannot allocate soft state", 600 instance); 601 goto err_out; 602 } 603 604 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 605 ahci_ctlp->ahcictl_flags |= AHCI_ATTACH; 606 ahci_ctlp->ahcictl_dip = dip; 607 608 /* Initialize the cport/port mapping */ 609 for (i = 0; i < AHCI_MAX_PORTS; i++) { 610 ahci_ctlp->ahcictl_port_to_cport[i] = 0xff; 611 ahci_ctlp->ahcictl_cport_to_port[i] = 0xff; 612 } 613 614 attach_state |= AHCI_ATTACH_STATE_STATEP_ALLOC; 615 616 /* Initialize FMA properties */ 617 ahci_fm_init(ahci_ctlp); 618 619 attach_state |= AHCI_ATTACH_STATE_FMA; 620 621 /* 622 * Now map the AHCI base address; which includes global 623 * registers and port control registers 624 * 625 * According to the spec, the AHCI Base Address is BAR5, 626 * but BAR0-BAR4 are optional, so we need to check which 627 * rnumber is used for BAR5. 628 */ 629 630 /* 631 * search through DDI "reg" property for the AHCI register set 632 */ 633 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, dip, 634 DDI_PROP_DONTPASS, "reg", (int **)®s, 635 (uint_t *)®s_length) != DDI_PROP_SUCCESS) { 636 cmn_err(CE_WARN, "!ahci%d: Cannot lookup reg property", 637 instance); 638 goto err_out; 639 } 640 641 /* AHCI Base Address is located at 0x24 offset */ 642 for (rnumber = 0; rnumber < regs_length; ++rnumber) { 643 if ((regs[rnumber].pci_phys_hi & PCI_REG_REG_M) 644 == AHCI_PCI_RNUM) 645 break; 646 } 647 648 ddi_prop_free(regs); 649 650 if (rnumber == regs_length) { 651 cmn_err(CE_WARN, "!ahci%d: Cannot find AHCI register set", 652 instance); 653 goto err_out; 654 } 655 656 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "rnumber = %d", rnumber); 657 658 status = ddi_regs_map_setup(dip, 659 rnumber, 660 (caddr_t *)&ahci_ctlp->ahcictl_ahci_addr, 661 0, 662 0, 663 &accattr, 664 &ahci_ctlp->ahcictl_ahci_acc_handle); 665 if (status != DDI_SUCCESS) { 666 cmn_err(CE_WARN, "!ahci%d: Cannot map register space", 667 instance); 668 goto err_out; 669 } 670 671 attach_state |= AHCI_ATTACH_STATE_REG_MAP; 672 673 /* 674 * GHC.AE must be set to 1 before any other AHCI register 675 * is accessed 676 */ 677 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 678 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 679 ghc_control |= AHCI_HBA_GHC_AE; 680 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 681 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 682 683 /* Get the AHCI version information */ 684 ahci_version = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 685 (uint32_t *)AHCI_GLOBAL_VS(ahci_ctlp)); 686 687 cmn_err(CE_NOTE, "!ahci%d: hba AHCI version = %x.%x", instance, 688 (ahci_version & 0xffff0000) >> 16, 689 ((ahci_version & 0x0000ff00) >> 4 | 690 (ahci_version & 0x000000ff))); 691 692 /* We don't support controllers whose versions are lower than 1.0 */ 693 if (!(ahci_version & 0xffff0000)) { 694 cmn_err(CE_WARN, "ahci%d: Don't support AHCI HBA with lower " 695 "than version 1.0", instance); 696 goto err_out; 697 } 698 699 /* Get the HBA capabilities information */ 700 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 701 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 702 703 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba capabilities = 0x%x", 704 cap_status); 705 706 /* CAP2 (HBA Capabilities Extended) is available since AHCI spec 1.2 */ 707 if (ahci_version >= 0x00010200) { 708 uint32_t cap2_status; 709 710 /* Get the HBA capabilities extended information */ 711 cap2_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 712 (uint32_t *)AHCI_GLOBAL_CAP2(ahci_ctlp)); 713 714 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 715 "hba capabilities extended = 0x%x", cap2_status); 716 } 717 718 #if AHCI_DEBUG 719 /* Get the interface speed supported by the HBA */ 720 speed = (cap_status & AHCI_HBA_CAP_ISS) >> AHCI_HBA_CAP_ISS_SHIFT; 721 if (speed == 0x01) { 722 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 723 "hba interface speed support: Gen 1 (1.5Gbps)", NULL); 724 } else if (speed == 0x10) { 725 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 726 "hba interface speed support: Gen 2 (3 Gbps)", NULL); 727 } else if (speed == 0x11) { 728 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 729 "hba interface speed support: Gen 3 (6 Gbps)", NULL); 730 } 731 #endif 732 733 /* Get the number of command slots supported by the HBA */ 734 ahci_ctlp->ahcictl_num_cmd_slots = 735 ((cap_status & AHCI_HBA_CAP_NCS) >> 736 AHCI_HBA_CAP_NCS_SHIFT) + 1; 737 738 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba number of cmd slots: %d", 739 ahci_ctlp->ahcictl_num_cmd_slots); 740 741 /* Get the bit map which indicates ports implemented by the HBA */ 742 ahci_ctlp->ahcictl_ports_implemented = 743 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 744 (uint32_t *)AHCI_GLOBAL_PI(ahci_ctlp)); 745 746 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba implementation of ports: 0x%x", 747 ahci_ctlp->ahcictl_ports_implemented); 748 749 /* Max port number implemented */ 750 ahci_ctlp->ahcictl_num_ports = 751 ddi_fls(ahci_ctlp->ahcictl_ports_implemented); 752 753 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba number of ports: %d", 754 (cap_status & AHCI_HBA_CAP_NP) + 1); 755 756 /* Get the number of implemented ports by the HBA */ 757 ahci_ctlp->ahcictl_num_implemented_ports = 758 ahci_get_num_implemented_ports( 759 ahci_ctlp->ahcictl_ports_implemented); 760 761 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 762 "hba number of implemented ports: %d", 763 ahci_ctlp->ahcictl_num_implemented_ports); 764 765 /* Check whether HBA supports 64bit DMA addressing */ 766 if (!(cap_status & AHCI_HBA_CAP_S64A)) { 767 ahci_ctlp->ahcictl_cap |= AHCI_CAP_BUF_32BIT_DMA; 768 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 769 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 770 "hba does not support 64-bit addressing", NULL); 771 } 772 773 /* Checking for the support of Port Multiplier */ 774 if (cap_status & AHCI_HBA_CAP_SPM) { 775 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PMULT_CBSS; 776 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 777 "hba supports port multiplier (CBSS)", NULL); 778 779 /* Support FIS-based switching ? */ 780 if (cap_status & AHCI_HBA_CAP_FBSS) { 781 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PMULT_FBSS; 782 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 783 "hba supports FIS-based switching (FBSS)", NULL); 784 } 785 } 786 787 /* Checking for Support Command List Override */ 788 if (cap_status & AHCI_HBA_CAP_SCLO) { 789 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SCLO; 790 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 791 "hba supports command list override.", NULL); 792 } 793 794 /* Checking for Asynchronous Notification */ 795 if (cap_status & AHCI_HBA_CAP_SSNTF) { 796 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SNTF; 797 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 798 "hba supports asynchronous notification.", NULL); 799 } 800 801 if (pci_config_setup(dip, &ahci_ctlp->ahcictl_pci_conf_handle) 802 != DDI_SUCCESS) { 803 cmn_err(CE_WARN, "!ahci%d: Cannot set up pci configure space", 804 instance); 805 goto err_out; 806 } 807 808 attach_state |= AHCI_ATTACH_STATE_PCICFG_SETUP; 809 810 /* 811 * Check the pci configuration space, and set caps. We also 812 * handle the hardware defect in this function. 813 * 814 * For example, force ATI SB600 to use 32-bit dma addressing 815 * since it doesn't support 64-bit dma though its CAP register 816 * declares it support. 817 */ 818 if (ahci_config_space_init(ahci_ctlp) == AHCI_FAILURE) { 819 cmn_err(CE_WARN, "!ahci%d: ahci_config_space_init failed", 820 instance); 821 goto err_out; 822 } 823 824 /* 825 * Disable the whole controller interrupts before adding 826 * interrupt handlers(s). 827 */ 828 ahci_disable_all_intrs(ahci_ctlp); 829 830 /* Get supported interrupt types */ 831 if (ddi_intr_get_supported_types(dip, &intr_types) != DDI_SUCCESS) { 832 cmn_err(CE_WARN, "!ahci%d: ddi_intr_get_supported_types failed", 833 instance); 834 goto err_out; 835 } 836 837 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 838 "ddi_intr_get_supported_types() returned: 0x%x", 839 intr_types); 840 841 if (ahci_msi_enabled && (intr_types & DDI_INTR_TYPE_MSI)) { 842 /* 843 * Try MSI first, but fall back to FIXED if failed 844 */ 845 if (ahci_add_intrs(ahci_ctlp, DDI_INTR_TYPE_MSI) == 846 DDI_SUCCESS) { 847 ahci_ctlp->ahcictl_intr_type = DDI_INTR_TYPE_MSI; 848 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 849 "Using MSI interrupt type", NULL); 850 goto intr_done; 851 } 852 853 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 854 "MSI registration failed, " 855 "trying FIXED interrupts", NULL); 856 } 857 858 if (intr_types & DDI_INTR_TYPE_FIXED) { 859 if (ahci_add_intrs(ahci_ctlp, DDI_INTR_TYPE_FIXED) == 860 DDI_SUCCESS) { 861 ahci_ctlp->ahcictl_intr_type = DDI_INTR_TYPE_FIXED; 862 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 863 "Using FIXED interrupt type", NULL); 864 goto intr_done; 865 } 866 867 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 868 "FIXED interrupt registration failed", NULL); 869 } 870 871 cmn_err(CE_WARN, "!ahci%d: Interrupt registration failed", instance); 872 873 goto err_out; 874 875 intr_done: 876 877 attach_state |= AHCI_ATTACH_STATE_INTR_ADDED; 878 879 /* Initialize the controller mutex */ 880 mutex_init(&ahci_ctlp->ahcictl_mutex, NULL, MUTEX_DRIVER, 881 (void *)(uintptr_t)ahci_ctlp->ahcictl_intr_pri); 882 883 attach_state |= AHCI_ATTACH_STATE_MUTEX_INIT; 884 885 if (ahci_dma_prdt_number < AHCI_MIN_PRDT_NUMBER) { 886 ahci_dma_prdt_number = AHCI_MIN_PRDT_NUMBER; 887 } else if (ahci_dma_prdt_number > AHCI_MAX_PRDT_NUMBER) { 888 ahci_dma_prdt_number = AHCI_MAX_PRDT_NUMBER; 889 } 890 891 ahci_cmd_table_size = (sizeof (ahci_cmd_table_t) + 892 (ahci_dma_prdt_number - AHCI_PRDT_NUMBER) * 893 sizeof (ahci_prdt_item_t)); 894 895 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 896 "ahci_attach: ahci_dma_prdt_number set by user is 0x%x," 897 " ahci_cmd_table_size is 0x%x", 898 ahci_dma_prdt_number, ahci_cmd_table_size); 899 900 if (ahci_dma_prdt_number != AHCI_PRDT_NUMBER) 901 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_sgllen = 902 ahci_dma_prdt_number; 903 904 ahci_ctlp->ahcictl_buffer_dma_attr = buffer_dma_attr; 905 ahci_ctlp->ahcictl_rcvd_fis_dma_attr = rcvd_fis_dma_attr; 906 ahci_ctlp->ahcictl_cmd_list_dma_attr = cmd_list_dma_attr; 907 ahci_ctlp->ahcictl_cmd_table_dma_attr = cmd_table_dma_attr; 908 909 /* 910 * enable 64bit dma for data buffer for SB600 if 911 * sb600_buf_64bit_dma_disable is B_FALSE 912 */ 913 if ((ahci_buf_64bit_dma == B_FALSE) || 914 ((ahci_ctlp->ahcictl_cap & AHCI_CAP_BUF_32BIT_DMA) && 915 !(sb600_buf_64bit_dma_disable == B_FALSE && 916 ahci_ctlp->ahcictl_venid == 0x1002 && 917 ahci_ctlp->ahcictl_devid == 0x4380))) { 918 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_addr_hi = 919 0xffffffffull; 920 } 921 922 /* 923 * enable 64bit dma for command buffer for SB600/700/710/800 924 * if sbxxx_commu_64bit_dma_disable is B_FALSE 925 */ 926 if ((ahci_commu_64bit_dma == B_FALSE) || 927 ((ahci_ctlp->ahcictl_cap & AHCI_CAP_COMMU_32BIT_DMA) && 928 !(sbxxx_commu_64bit_dma_disable == B_FALSE && 929 ahci_ctlp->ahcictl_venid == 0x1002 && 930 (ahci_ctlp->ahcictl_devid == 0x4380 || 931 ahci_ctlp->ahcictl_devid == 0x4391)))) { 932 ahci_ctlp->ahcictl_rcvd_fis_dma_attr.dma_attr_addr_hi = 933 0xffffffffull; 934 ahci_ctlp->ahcictl_cmd_list_dma_attr.dma_attr_addr_hi = 935 0xffffffffull; 936 ahci_ctlp->ahcictl_cmd_table_dma_attr.dma_attr_addr_hi = 937 0xffffffffull; 938 } 939 940 /* Allocate the ports structure */ 941 status = ahci_alloc_ports_state(ahci_ctlp); 942 if (status != AHCI_SUCCESS) { 943 cmn_err(CE_WARN, "!ahci%d: Cannot allocate ports structure", 944 instance); 945 goto err_out; 946 } 947 948 attach_state |= AHCI_ATTACH_STATE_PORT_ALLOC; 949 950 /* 951 * Initialize the controller and ports. 952 */ 953 status = ahci_initialize_controller(ahci_ctlp); 954 if (status != AHCI_SUCCESS) { 955 cmn_err(CE_WARN, "!ahci%d: HBA initialization failed", 956 instance); 957 goto err_out; 958 } 959 960 attach_state |= AHCI_ATTACH_STATE_HW_INIT; 961 962 /* Start one thread to check packet timeouts */ 963 ahci_ctlp->ahcictl_timeout_id = timeout( 964 (void (*)(void *))ahci_watchdog_handler, 965 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 966 967 attach_state |= AHCI_ATTACH_STATE_TIMEOUT_ENABLED; 968 969 if (ahci_register_sata_hba_tran(ahci_ctlp, cap_status)) { 970 cmn_err(CE_WARN, "!ahci%d: sata hba tran registration failed", 971 instance); 972 goto err_out; 973 } 974 975 /* Check all handles at the end of the attach operation. */ 976 if (ahci_check_all_handle(ahci_ctlp) != DDI_SUCCESS) { 977 cmn_err(CE_WARN, "!ahci%d: invalid dma/acc handles", 978 instance); 979 goto err_out; 980 } 981 982 ahci_ctlp->ahcictl_flags &= ~AHCI_ATTACH; 983 984 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "ahci_attach success!", NULL); 985 986 return (DDI_SUCCESS); 987 988 err_out: 989 /* FMA message */ 990 ahci_fm_ereport(ahci_ctlp, DDI_FM_DEVICE_NO_RESPONSE); 991 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, DDI_SERVICE_LOST); 992 993 if (attach_state & AHCI_ATTACH_STATE_TIMEOUT_ENABLED) { 994 mutex_enter(&ahci_ctlp->ahcictl_mutex); 995 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 996 ahci_ctlp->ahcictl_timeout_id = 0; 997 mutex_exit(&ahci_ctlp->ahcictl_mutex); 998 } 999 1000 if (attach_state & AHCI_ATTACH_STATE_HW_INIT) { 1001 ahci_uninitialize_controller(ahci_ctlp); 1002 } 1003 1004 if (attach_state & AHCI_ATTACH_STATE_PORT_ALLOC) { 1005 ahci_dealloc_ports_state(ahci_ctlp); 1006 } 1007 1008 if (attach_state & AHCI_ATTACH_STATE_MUTEX_INIT) { 1009 mutex_destroy(&ahci_ctlp->ahcictl_mutex); 1010 } 1011 1012 if (attach_state & AHCI_ATTACH_STATE_INTR_ADDED) { 1013 ahci_rem_intrs(ahci_ctlp); 1014 } 1015 1016 if (attach_state & AHCI_ATTACH_STATE_PCICFG_SETUP) { 1017 pci_config_teardown(&ahci_ctlp->ahcictl_pci_conf_handle); 1018 } 1019 1020 if (attach_state & AHCI_ATTACH_STATE_REG_MAP) { 1021 ddi_regs_map_free(&ahci_ctlp->ahcictl_ahci_acc_handle); 1022 } 1023 1024 if (attach_state & AHCI_ATTACH_STATE_FMA) { 1025 ahci_fm_fini(ahci_ctlp); 1026 } 1027 1028 if (attach_state & AHCI_ATTACH_STATE_STATEP_ALLOC) { 1029 ddi_soft_state_free(ahci_statep, instance); 1030 } 1031 1032 return (DDI_FAILURE); 1033 } 1034 1035 /* 1036 * The detach entry point for dev_ops. 1037 */ 1038 static int 1039 ahci_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 1040 { 1041 ahci_ctl_t *ahci_ctlp; 1042 int instance; 1043 int ret; 1044 1045 instance = ddi_get_instance(dip); 1046 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 1047 1048 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_detach enter", NULL); 1049 1050 switch (cmd) { 1051 case DDI_DETACH: 1052 1053 /* disable the interrupts for an uninterrupted detach */ 1054 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1055 ahci_disable_all_intrs(ahci_ctlp); 1056 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1057 1058 /* unregister from the sata framework. */ 1059 ret = ahci_unregister_sata_hba_tran(ahci_ctlp); 1060 if (ret != AHCI_SUCCESS) { 1061 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1062 ahci_enable_all_intrs(ahci_ctlp); 1063 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1064 return (DDI_FAILURE); 1065 } 1066 1067 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1068 1069 /* stop the watchdog handler */ 1070 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 1071 ahci_ctlp->ahcictl_timeout_id = 0; 1072 1073 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1074 1075 /* uninitialize the controller */ 1076 ahci_uninitialize_controller(ahci_ctlp); 1077 1078 /* remove the interrupts */ 1079 ahci_rem_intrs(ahci_ctlp); 1080 1081 /* deallocate the ports structures */ 1082 ahci_dealloc_ports_state(ahci_ctlp); 1083 1084 /* destroy mutex */ 1085 mutex_destroy(&ahci_ctlp->ahcictl_mutex); 1086 1087 /* teardown the pci config */ 1088 pci_config_teardown(&ahci_ctlp->ahcictl_pci_conf_handle); 1089 1090 /* remove the reg maps. */ 1091 ddi_regs_map_free(&ahci_ctlp->ahcictl_ahci_acc_handle); 1092 1093 /* release fma resource */ 1094 ahci_fm_fini(ahci_ctlp); 1095 1096 /* free the soft state. */ 1097 ddi_soft_state_free(ahci_statep, instance); 1098 1099 return (DDI_SUCCESS); 1100 1101 case DDI_SUSPEND: 1102 1103 /* 1104 * The steps associated with suspension must include putting 1105 * the underlying device into a quiescent state so that it 1106 * will not generate interrupts or modify or access memory. 1107 */ 1108 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1109 if (ahci_ctlp->ahcictl_flags & AHCI_SUSPEND) { 1110 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1111 return (DDI_SUCCESS); 1112 } 1113 1114 ahci_ctlp->ahcictl_flags |= AHCI_SUSPEND; 1115 1116 /* stop the watchdog handler */ 1117 if (ahci_ctlp->ahcictl_timeout_id) { 1118 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 1119 ahci_ctlp->ahcictl_timeout_id = 0; 1120 } 1121 1122 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1123 1124 /* 1125 * drain the taskq 1126 */ 1127 ahci_drain_ports_taskq(ahci_ctlp); 1128 1129 /* 1130 * Disable the interrupts and stop all the ports. 1131 */ 1132 ahci_uninitialize_controller(ahci_ctlp); 1133 1134 return (DDI_SUCCESS); 1135 1136 default: 1137 return (DDI_FAILURE); 1138 } 1139 } 1140 1141 /* 1142 * The info entry point for dev_ops. 1143 * 1144 */ 1145 static int 1146 ahci_getinfo(dev_info_t *dip, ddi_info_cmd_t infocmd, 1147 void *arg, void **result) 1148 { 1149 #ifndef __lock_lint 1150 _NOTE(ARGUNUSED(dip)) 1151 #endif /* __lock_lint */ 1152 1153 ahci_ctl_t *ahci_ctlp; 1154 int instance; 1155 dev_t dev; 1156 1157 dev = (dev_t)arg; 1158 instance = getminor(dev); 1159 1160 switch (infocmd) { 1161 case DDI_INFO_DEVT2DEVINFO: 1162 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 1163 if (ahci_ctlp != NULL) { 1164 *result = ahci_ctlp->ahcictl_dip; 1165 return (DDI_SUCCESS); 1166 } else { 1167 *result = NULL; 1168 return (DDI_FAILURE); 1169 } 1170 case DDI_INFO_DEVT2INSTANCE: 1171 *(int *)result = instance; 1172 break; 1173 default: 1174 break; 1175 } 1176 1177 return (DDI_SUCCESS); 1178 } 1179 1180 /* 1181 * Registers the ahci with sata framework. 1182 */ 1183 static int 1184 ahci_register_sata_hba_tran(ahci_ctl_t *ahci_ctlp, uint32_t cap_status) 1185 { 1186 struct sata_hba_tran *sata_hba_tran; 1187 1188 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 1189 "ahci_register_sata_hba_tran enter", NULL); 1190 1191 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1192 1193 /* Allocate memory for the sata_hba_tran */ 1194 sata_hba_tran = kmem_zalloc(sizeof (sata_hba_tran_t), KM_SLEEP); 1195 1196 sata_hba_tran->sata_tran_hba_rev = SATA_TRAN_HBA_REV; 1197 sata_hba_tran->sata_tran_hba_dip = ahci_ctlp->ahcictl_dip; 1198 sata_hba_tran->sata_tran_hba_dma_attr = 1199 &ahci_ctlp->ahcictl_buffer_dma_attr; 1200 1201 /* Report the number of implemented ports */ 1202 sata_hba_tran->sata_tran_hba_num_cports = 1203 ahci_ctlp->ahcictl_num_implemented_ports; 1204 1205 /* Support ATAPI device */ 1206 sata_hba_tran->sata_tran_hba_features_support = SATA_CTLF_ATAPI; 1207 1208 /* Get the data transfer capability for PIO command by the HBA */ 1209 if (cap_status & AHCI_HBA_CAP_PMD) { 1210 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PIO_MDRQ; 1211 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "HBA supports multiple " 1212 "DRQ block data transfer for PIO command protocol", NULL); 1213 } 1214 1215 /* 1216 * According to the AHCI spec, the ATA/ATAPI-7 queued feature set 1217 * is not supported by AHCI (including the READ QUEUED (EXT), WRITE 1218 * QUEUED (EXT), and SERVICE commands). Queued operations are 1219 * supported in AHCI using the READ FPDMA QUEUED and WRITE FPDMA 1220 * QUEUED commands when the HBA and device support native command 1221 * queuing(NCQ). 1222 * 1223 * SATA_CTLF_NCQ will be set to sata_tran_hba_features_support if the 1224 * CAP register of the HBA indicates NCQ is supported. 1225 * 1226 * SATA_CTLF_NCQ cannot be set if AHCI_CAP_NO_MCMDLIST_NONQUEUE is 1227 * set because the previous register content of PxCI can be re-written 1228 * in the register write. 1229 */ 1230 if ((cap_status & AHCI_HBA_CAP_SNCQ) && 1231 !(ahci_ctlp->ahcictl_cap & AHCI_CAP_NO_MCMDLIST_NONQUEUE)) { 1232 sata_hba_tran->sata_tran_hba_features_support |= SATA_CTLF_NCQ; 1233 ahci_ctlp->ahcictl_cap |= AHCI_CAP_NCQ; 1234 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "HBA supports Native " 1235 "Command Queuing", NULL); 1236 } 1237 1238 /* Support port multiplier? */ 1239 if (cap_status & AHCI_HBA_CAP_SPM) { 1240 sata_hba_tran->sata_tran_hba_features_support |= 1241 SATA_CTLF_PORT_MULTIPLIER; 1242 1243 /* Support FIS-based switching for port multiplier? */ 1244 if (cap_status & AHCI_HBA_CAP_FBSS) { 1245 sata_hba_tran->sata_tran_hba_features_support |= 1246 SATA_CTLF_PMULT_FBS; 1247 } 1248 } 1249 1250 /* Report the number of command slots */ 1251 sata_hba_tran->sata_tran_hba_qdepth = ahci_ctlp->ahcictl_num_cmd_slots; 1252 1253 sata_hba_tran->sata_tran_probe_port = ahci_tran_probe_port; 1254 sata_hba_tran->sata_tran_start = ahci_tran_start; 1255 sata_hba_tran->sata_tran_abort = ahci_tran_abort; 1256 sata_hba_tran->sata_tran_reset_dport = ahci_tran_reset_dport; 1257 sata_hba_tran->sata_tran_hotplug_ops = &ahci_tran_hotplug_ops; 1258 #ifdef __lock_lint 1259 sata_hba_tran->sata_tran_selftest = ahci_selftest; 1260 #endif 1261 /* 1262 * When SATA framework adds support for pwrmgt the 1263 * pwrmgt_ops needs to be updated 1264 */ 1265 sata_hba_tran->sata_tran_pwrmgt_ops = NULL; 1266 sata_hba_tran->sata_tran_ioctl = NULL; 1267 1268 ahci_ctlp->ahcictl_sata_hba_tran = sata_hba_tran; 1269 1270 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1271 1272 /* Attach it to SATA framework */ 1273 if (sata_hba_attach(ahci_ctlp->ahcictl_dip, sata_hba_tran, DDI_ATTACH) 1274 != DDI_SUCCESS) { 1275 kmem_free((void *)sata_hba_tran, sizeof (sata_hba_tran_t)); 1276 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1277 ahci_ctlp->ahcictl_sata_hba_tran = NULL; 1278 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1279 return (AHCI_FAILURE); 1280 } 1281 1282 return (AHCI_SUCCESS); 1283 } 1284 1285 /* 1286 * Unregisters the ahci with sata framework. 1287 */ 1288 static int 1289 ahci_unregister_sata_hba_tran(ahci_ctl_t *ahci_ctlp) 1290 { 1291 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1292 "ahci_unregister_sata_hba_tran enter", NULL); 1293 1294 /* Detach from the SATA framework. */ 1295 if (sata_hba_detach(ahci_ctlp->ahcictl_dip, DDI_DETACH) != 1296 DDI_SUCCESS) { 1297 return (AHCI_FAILURE); 1298 } 1299 1300 /* Deallocate sata_hba_tran. */ 1301 kmem_free((void *)ahci_ctlp->ahcictl_sata_hba_tran, 1302 sizeof (sata_hba_tran_t)); 1303 1304 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1305 ahci_ctlp->ahcictl_sata_hba_tran = NULL; 1306 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1307 1308 return (AHCI_SUCCESS); 1309 } 1310 1311 #define SET_PORTSTR(str, addrp) \ 1312 if (AHCI_ADDR_IS_PORT(addrp)) \ 1313 (void) sprintf((str), "%d", (addrp)->aa_port); \ 1314 else if (AHCI_ADDR_IS_PMULT(addrp)) \ 1315 (void) sprintf((str), "%d (pmult)", (addrp)->aa_port); \ 1316 else \ 1317 (void) sprintf((str), "%d:%d", (addrp)->aa_port, \ 1318 (addrp)->aa_pmport); 1319 1320 /* 1321 * ahci_tran_probe_port is called by SATA framework. It returns port state, 1322 * port status registers and an attached device type via sata_device 1323 * structure. 1324 * 1325 * We return the cached information from a previous hardware probe. The 1326 * actual hardware probing itself was done either from within 1327 * ahci_initialize_controller() during the driver attach or from a phy 1328 * ready change interrupt handler. 1329 */ 1330 static int 1331 ahci_tran_probe_port(dev_info_t *dip, sata_device_t *sd) 1332 { 1333 ahci_ctl_t *ahci_ctlp; 1334 ahci_port_t *ahci_portp; 1335 ahci_addr_t addr, pmult_addr; 1336 uint8_t cport = sd->satadev_addr.cport; 1337 char portstr[10]; 1338 uint8_t device_type; 1339 uint32_t port_state; 1340 uint8_t port; 1341 int rval = SATA_SUCCESS, rval_init; 1342 1343 ahci_ctlp = ddi_get_soft_state(ahci_statep, ddi_get_instance(dip)); 1344 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 1345 1346 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 1347 1348 mutex_enter(&ahci_portp->ahciport_mutex); 1349 1350 ahci_get_ahci_addr(ahci_ctlp, sd, &addr); 1351 ASSERT(AHCI_ADDR_IS_VALID(&addr)); 1352 SET_PORTSTR(portstr, &addr); 1353 1354 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1355 "ahci_tran_probe_port enter: port %s", portstr); 1356 1357 if ((AHCI_ADDR_IS_PMULT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)) && 1358 (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT || 1359 ahci_portp->ahciport_pmult_info == NULL)) { 1360 /* port mutliplier is removed. */ 1361 AHCIDBG(AHCIDBG_PMULT, ahci_ctlp, 1362 "ahci_tran_probe_port: " 1363 "pmult is removed from port %s", portstr); 1364 mutex_exit(&ahci_portp->ahciport_mutex); 1365 return (SATA_FAILURE); 1366 } 1367 1368 /* 1369 * The sata_device may refer to 1370 * 1. A controller port. 1371 * A controller port should be ready here. 1372 * 2. A port multiplier. 1373 * SATA_ADDR_PMULT_SPEC - if it is not initialized yet, initialize 1374 * it and register the port multiplier to the framework. 1375 * SATA_ADDR_PMULT - check the status of all its device ports. 1376 * 3. A port multiplier port. 1377 * If it has not been initialized, initialized it. 1378 * 1379 * A port multiplier or a port multiplier port may require some 1380 * initialization because we cannot do these time-consuming jobs in an 1381 * interrupt context. 1382 */ 1383 if (sd->satadev_addr.qual & SATA_ADDR_PMULT_SPEC) { 1384 AHCI_ADDR_SET_PMULT(&pmult_addr, port); 1385 /* Initialize registers on a port multiplier */ 1386 rval_init = ahci_initialize_pmult(ahci_ctlp, 1387 ahci_portp, &pmult_addr, sd); 1388 if (rval_init != AHCI_SUCCESS) { 1389 AHCIDBG(AHCIDBG_PMULT, ahci_ctlp, 1390 "ahci_tran_probe_port: " 1391 "pmult initialization failed.", NULL); 1392 mutex_exit(&ahci_portp->ahciport_mutex); 1393 return (SATA_FAILURE); 1394 } 1395 } else if (sd->satadev_addr.qual & SATA_ADDR_PMULT) { 1396 /* Check pmports hotplug events */ 1397 (void) ahci_probe_pmult(ahci_ctlp, ahci_portp, &addr); 1398 } else if (sd->satadev_addr.qual & (SATA_ADDR_PMPORT | 1399 SATA_ADDR_DPMPORT)) { 1400 if (ahci_probe_pmport(ahci_ctlp, ahci_portp, 1401 &addr, sd) != AHCI_SUCCESS) { 1402 rval = SATA_FAILURE; 1403 goto out; 1404 } 1405 } 1406 1407 /* Update port state and device type */ 1408 port_state = AHCIPORT_GET_STATE(ahci_portp, &addr); 1409 1410 switch (port_state) { 1411 1412 case SATA_PSTATE_FAILED: 1413 sd->satadev_state = SATA_PSTATE_FAILED; 1414 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1415 "ahci_tran_probe_port: port %s PORT FAILED", portstr); 1416 goto out; 1417 1418 case SATA_PSTATE_SHUTDOWN: 1419 sd->satadev_state = SATA_PSTATE_SHUTDOWN; 1420 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1421 "ahci_tran_probe_port: port %s PORT SHUTDOWN", portstr); 1422 goto out; 1423 1424 case SATA_PSTATE_PWROFF: 1425 sd->satadev_state = SATA_PSTATE_PWROFF; 1426 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1427 "ahci_tran_probe_port: port %s PORT PWROFF", portstr); 1428 goto out; 1429 1430 case SATA_PSTATE_PWRON: 1431 sd->satadev_state = SATA_PSTATE_PWRON; 1432 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1433 "ahci_tran_probe_port: port %s PORT PWRON", portstr); 1434 break; 1435 1436 default: 1437 sd->satadev_state = port_state; 1438 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1439 "ahci_tran_probe_port: port %s PORT NORMAL %x", 1440 portstr, port_state); 1441 break; 1442 } 1443 1444 device_type = AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr); 1445 1446 switch (device_type) { 1447 1448 case SATA_DTYPE_ATADISK: 1449 sd->satadev_type = SATA_DTYPE_ATADISK; 1450 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1451 "ahci_tran_probe_port: port %s DISK found", portstr); 1452 break; 1453 1454 case SATA_DTYPE_ATAPI: 1455 /* 1456 * HBA driver only knows it's an ATAPI device, and don't know 1457 * it's CD/DVD, tape or ATAPI disk because the ATAPI device 1458 * type need to be determined by checking IDENTIFY PACKET 1459 * DEVICE data 1460 */ 1461 sd->satadev_type = SATA_DTYPE_ATAPI; 1462 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1463 "ahci_tran_probe_port: port %s ATAPI found", portstr); 1464 break; 1465 1466 case SATA_DTYPE_PMULT: 1467 ASSERT(AHCI_ADDR_IS_PORT(&addr)||AHCI_ADDR_IS_PMULT(&addr)); 1468 sd->satadev_type = SATA_DTYPE_PMULT; 1469 1470 /* Update the number of pmports. */ 1471 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1472 sd->satadev_add_info = ahci_portp-> 1473 ahciport_pmult_info->ahcipmi_num_dev_ports; 1474 1475 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1476 "ahci_tran_probe_port: port %s Port Multiplier found", 1477 portstr); 1478 break; 1479 1480 case SATA_DTYPE_UNKNOWN: 1481 sd->satadev_type = SATA_DTYPE_UNKNOWN; 1482 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1483 "ahci_tran_probe_port: port %s Unknown device found", 1484 portstr); 1485 break; 1486 1487 default: 1488 /* we don't support any other device types */ 1489 sd->satadev_type = SATA_DTYPE_NONE; 1490 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1491 "ahci_tran_probe_port: port %s No device found", portstr); 1492 break; 1493 } 1494 1495 out: 1496 /* Register update only fails while probing a pmult/pmport */ 1497 if (AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMULT(&addr)) { 1498 ahci_update_sata_registers(ahci_ctlp, port, sd); 1499 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 1500 if (port_state & SATA_STATE_READY) 1501 if (ahci_update_pmult_pscr(ahci_ctlp, 1502 &addr, sd) != AHCI_SUCCESS) 1503 rval = SATA_FAILURE; 1504 } 1505 1506 /* Check handles for the sata registers access */ 1507 if ((ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) || 1508 (ahci_check_port_handle(ahci_ctlp, port) != DDI_SUCCESS)) { 1509 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 1510 DDI_SERVICE_UNAFFECTED); 1511 rval = SATA_FAILURE; 1512 } 1513 1514 mutex_exit(&ahci_portp->ahciport_mutex); 1515 return (rval); 1516 } 1517 1518 /* 1519 * There are four operation modes in sata framework: 1520 * SATA_OPMODE_INTERRUPTS 1521 * SATA_OPMODE_POLLING 1522 * SATA_OPMODE_ASYNCH 1523 * SATA_OPMODE_SYNCH 1524 * 1525 * Their combined meanings as following: 1526 * 1527 * SATA_OPMODE_SYNCH 1528 * The command has to be completed before sata_tran_start functions returns. 1529 * Either interrupts or polling could be used - it's up to the driver. 1530 * Mode used currently for internal, sata-module initiated operations. 1531 * 1532 * SATA_OPMODE_SYNCH | SATA_OPMODE_INTERRUPTS 1533 * It is the same as the one above. 1534 * 1535 * SATA_OPMODE_SYNCH | SATA_OPMODE_POLLING 1536 * The command has to be completed before sata_tran_start function returns. 1537 * No interrupt used, polling only. This should be the mode used for scsi 1538 * packets with FLAG_NOINTR. 1539 * 1540 * SATA_OPMODE_ASYNCH | SATA_OPMODE_INTERRUPTS 1541 * The command may be queued (callback function specified). Interrupts could 1542 * be used. It's normal operation mode. 1543 */ 1544 /* 1545 * Called by sata framework to transport a sata packet down stream. 1546 */ 1547 static int 1548 ahci_tran_start(dev_info_t *dip, sata_pkt_t *spkt) 1549 { 1550 ahci_ctl_t *ahci_ctlp; 1551 ahci_port_t *ahci_portp; 1552 ahci_addr_t addr; 1553 uint8_t cport = spkt->satapkt_device.satadev_addr.cport; 1554 uint8_t port; 1555 char portstr[10]; 1556 1557 ahci_ctlp = ddi_get_soft_state(ahci_statep, ddi_get_instance(dip)); 1558 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 1559 1560 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1561 "ahci_tran_start enter: cport %d satapkt 0x%p", 1562 cport, (void *)spkt); 1563 1564 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 1565 1566 mutex_enter(&ahci_portp->ahciport_mutex); 1567 ahci_get_ahci_addr(ahci_ctlp, &spkt->satapkt_device, &addr); 1568 SET_PORTSTR(portstr, &addr); 1569 1570 /* Sanity check */ 1571 if (AHCI_ADDR_IS_PMPORT(&addr)) { 1572 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT || 1573 ahci_portp->ahciport_pmult_info == NULL) { 1574 1575 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1576 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 1577 spkt->satapkt_device.satadev_state = SATA_STATE_UNKNOWN; 1578 ahci_update_sata_registers(ahci_ctlp, port, 1579 &spkt->satapkt_device); 1580 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1581 "ahci_tran_start returning PORT_ERROR while " 1582 "pmult removed: port: %s", portstr); 1583 mutex_exit(&ahci_portp->ahciport_mutex); 1584 return (SATA_TRAN_PORT_ERROR); 1585 } 1586 1587 if (!(AHCIPORT_GET_STATE(ahci_portp, &addr) & 1588 SATA_STATE_READY)) { 1589 if (!ddi_in_panic() || 1590 ahci_initialize_pmport(ahci_ctlp, 1591 ahci_portp, &addr) != AHCI_SUCCESS) { 1592 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1593 spkt->satapkt_device.satadev_type = 1594 AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr); 1595 spkt->satapkt_device.satadev_state = 1596 AHCIPORT_GET_STATE(ahci_portp, &addr); 1597 ahci_update_sata_registers(ahci_ctlp, port, 1598 &spkt->satapkt_device); 1599 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1600 "ahci_tran_start returning PORT_ERROR " 1601 "while sub-link is not initialized " 1602 "at port: %s", portstr); 1603 mutex_exit(&ahci_portp->ahciport_mutex); 1604 return (SATA_TRAN_PORT_ERROR); 1605 } 1606 } 1607 } 1608 1609 if (AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_FAILED || 1610 AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_SHUTDOWN|| 1611 AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_PWROFF) { 1612 /* 1613 * In case the target driver would send the packet before 1614 * sata framework can have the opportunity to process those 1615 * event reports. 1616 */ 1617 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1618 spkt->satapkt_device.satadev_state = 1619 ahci_portp->ahciport_port_state; 1620 ahci_update_sata_registers(ahci_ctlp, port, 1621 &spkt->satapkt_device); 1622 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1623 "ahci_tran_start returning PORT_ERROR while " 1624 "port in FAILED/SHUTDOWN/PWROFF state: " 1625 "port: %s", portstr); 1626 mutex_exit(&ahci_portp->ahciport_mutex); 1627 return (SATA_TRAN_PORT_ERROR); 1628 } 1629 1630 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) == SATA_DTYPE_NONE) { 1631 /* 1632 * ahci_intr_phyrdy_change() may have rendered it to 1633 * SATA_DTYPE_NONE. 1634 */ 1635 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1636 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 1637 spkt->satapkt_device.satadev_state = 1638 ahci_portp->ahciport_port_state; 1639 ahci_update_sata_registers(ahci_ctlp, port, 1640 &spkt->satapkt_device); 1641 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1642 "ahci_tran_start returning PORT_ERROR while " 1643 "no device attached: port: %s", portstr); 1644 mutex_exit(&ahci_portp->ahciport_mutex); 1645 return (SATA_TRAN_PORT_ERROR); 1646 } 1647 1648 /* R/W PMULT command will occupy the whole HBA port */ 1649 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 1650 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1651 "ahci_tran_start returning BUSY while " 1652 "executing READ/WRITE PORT-MULT command: " 1653 "port: %s", portstr); 1654 spkt->satapkt_reason = SATA_PKT_BUSY; 1655 mutex_exit(&ahci_portp->ahciport_mutex); 1656 return (SATA_TRAN_BUSY); 1657 } 1658 1659 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) { 1660 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1661 "ahci_tran_start returning BUSY while " 1662 "hot-plug in progress: port: %s", portstr); 1663 spkt->satapkt_reason = SATA_PKT_BUSY; 1664 mutex_exit(&ahci_portp->ahciport_mutex); 1665 return (SATA_TRAN_BUSY); 1666 } 1667 1668 /* 1669 * SATA HBA driver should remember that a device was reset and it 1670 * is supposed to reject any packets which do not specify either 1671 * SATA_IGNORE_DEV_RESET_STATE or SATA_CLEAR_DEV_RESET_STATE. 1672 * 1673 * This is to prevent a race condition when a device was arbitrarily 1674 * reset by the HBA driver (and lost it's setting) and a target 1675 * driver sending some commands to a device before the sata framework 1676 * has a chance to restore the device setting (such as cache enable/ 1677 * disable or other resettable stuff). 1678 */ 1679 /* 1680 * It is unnecessary to use specific flags to indicate 1681 * reset_in_progress for a pmport. While mopping, all command will be 1682 * mopped so that the entire HBA port is being dealt as a single 1683 * object. 1684 */ 1685 if (spkt->satapkt_cmd.satacmd_flags.sata_clear_dev_reset) { 1686 ahci_portp->ahciport_reset_in_progress = 0; 1687 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1688 "ahci_tran_start [CLEAR] the " 1689 "reset_in_progress for port: %d", port); 1690 } 1691 1692 if (ahci_portp->ahciport_reset_in_progress && 1693 ! spkt->satapkt_cmd.satacmd_flags.sata_ignore_dev_reset && 1694 ! ddi_in_panic()) { 1695 spkt->satapkt_reason = SATA_PKT_BUSY; 1696 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1697 "ahci_tran_start returning BUSY while " 1698 "reset in progress: port: %d", port); 1699 mutex_exit(&ahci_portp->ahciport_mutex); 1700 return (SATA_TRAN_BUSY); 1701 } 1702 1703 #ifdef AHCI_DEBUG 1704 if (spkt->satapkt_cmd.satacmd_flags.sata_ignore_dev_reset) { 1705 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1706 "ahci_tran_start: packet 0x%p [PASSTHRU] at port %d", 1707 spkt, port); 1708 } 1709 #endif 1710 1711 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 1712 spkt->satapkt_reason = SATA_PKT_BUSY; 1713 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1714 "ahci_tran_start returning BUSY while " 1715 "mopping in progress: port: %d", port); 1716 mutex_exit(&ahci_portp->ahciport_mutex); 1717 return (SATA_TRAN_BUSY); 1718 } 1719 1720 if (ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) { 1721 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 1722 DDI_SERVICE_UNAFFECTED); 1723 mutex_exit(&ahci_portp->ahciport_mutex); 1724 return (SATA_TRAN_BUSY); 1725 } 1726 1727 if (spkt->satapkt_op_mode & 1728 (SATA_OPMODE_SYNCH | SATA_OPMODE_POLLING)) { 1729 /* 1730 * If a SYNC command to be executed in interrupt context, 1731 * bounce it back to sata module. 1732 */ 1733 if (!(spkt->satapkt_op_mode & SATA_OPMODE_POLLING) && 1734 servicing_interrupt()) { 1735 spkt->satapkt_reason = SATA_PKT_BUSY; 1736 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1737 "ahci_tran_start returning BUSY while " 1738 "sending SYNC mode under interrupt context: " 1739 "port : %d", port); 1740 mutex_exit(&ahci_portp->ahciport_mutex); 1741 return (SATA_TRAN_BUSY); 1742 } 1743 1744 /* We need to do the sync start now */ 1745 if (ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, 1746 spkt) == AHCI_FAILURE) { 1747 goto fail_out; 1748 } 1749 } else { 1750 /* Async start, using interrupt */ 1751 if (ahci_deliver_satapkt(ahci_ctlp, ahci_portp, &addr, spkt) 1752 == AHCI_FAILURE) { 1753 spkt->satapkt_reason = SATA_PKT_QUEUE_FULL; 1754 goto fail_out; 1755 } 1756 } 1757 1758 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_tran_start " 1759 "sata tran accepted: port %s", portstr); 1760 1761 mutex_exit(&ahci_portp->ahciport_mutex); 1762 return (SATA_TRAN_ACCEPTED); 1763 1764 fail_out: 1765 /* 1766 * Failed to deliver packet to the controller. 1767 * Check if it's caused by invalid handles. 1768 */ 1769 if (ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS || 1770 ahci_check_port_handle(ahci_ctlp, port) != DDI_SUCCESS) { 1771 spkt->satapkt_device.satadev_type = 1772 AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr); 1773 spkt->satapkt_device.satadev_state = 1774 AHCIPORT_GET_STATE(ahci_portp, &addr); 1775 spkt->satapkt_reason = SATA_PKT_DEV_ERROR; 1776 mutex_exit(&ahci_portp->ahciport_mutex); 1777 return (SATA_TRAN_PORT_ERROR); 1778 } 1779 1780 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_tran_start " 1781 "return QUEUE_FULL: port %d", port); 1782 mutex_exit(&ahci_portp->ahciport_mutex); 1783 return (SATA_TRAN_QUEUE_FULL); 1784 } 1785 1786 /* 1787 * SATA_OPMODE_SYNCH flag is set 1788 * 1789 * If SATA_OPMODE_POLLING flag is set, then we must poll the command 1790 * without interrupt, otherwise we can still use the interrupt. 1791 * 1792 * WARNING!!! ahciport_mutex should be acquired before the function 1793 * is called. 1794 */ 1795 static int 1796 ahci_do_sync_start(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 1797 ahci_addr_t *addrp, sata_pkt_t *spkt) 1798 { 1799 int pkt_timeout_ticks; 1800 uint32_t timeout_tags; 1801 int rval; 1802 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 1803 uint8_t port = addrp->aa_port; 1804 1805 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_do_sync_start enter: " 1806 "port %d:%d spkt 0x%p", port, addrp->aa_pmport, spkt); 1807 1808 if (spkt->satapkt_op_mode & SATA_OPMODE_POLLING) { 1809 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_POLLING; 1810 if ((rval = ahci_deliver_satapkt(ahci_ctlp, ahci_portp, 1811 addrp, spkt)) == AHCI_FAILURE) { 1812 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_POLLING; 1813 return (rval); 1814 } 1815 1816 pkt_timeout_ticks = 1817 drv_usectohz((clock_t)spkt->satapkt_time * 1000000); 1818 1819 while (spkt->satapkt_reason == SATA_PKT_BUSY) { 1820 mutex_exit(&ahci_portp->ahciport_mutex); 1821 1822 /* Simulate the interrupt */ 1823 ahci_port_intr(ahci_ctlp, ahci_portp, port); 1824 1825 drv_usecwait(AHCI_10MS_USECS); 1826 1827 mutex_enter(&ahci_portp->ahciport_mutex); 1828 pkt_timeout_ticks -= AHCI_10MS_TICKS; 1829 if (pkt_timeout_ticks < 0) { 1830 cmn_err(CE_WARN, "!ahci%d: ahci_do_sync_start " 1831 "port %d satapkt 0x%p timed out\n", 1832 instance, port, (void *)spkt); 1833 timeout_tags = (0x1 << rval); 1834 mutex_exit(&ahci_portp->ahciport_mutex); 1835 ahci_timeout_pkts(ahci_ctlp, ahci_portp, 1836 port, timeout_tags); 1837 mutex_enter(&ahci_portp->ahciport_mutex); 1838 } 1839 } 1840 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_POLLING; 1841 return (AHCI_SUCCESS); 1842 1843 } else { 1844 if ((rval = ahci_deliver_satapkt(ahci_ctlp, ahci_portp, 1845 addrp, spkt)) == AHCI_FAILURE) 1846 return (rval); 1847 1848 #if AHCI_DEBUG 1849 /* 1850 * Note that the driver always uses the slot 0 to deliver 1851 * REQUEST SENSE or READ LOG EXT command 1852 */ 1853 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 1854 ASSERT(rval == 0); 1855 #endif 1856 1857 while (spkt->satapkt_reason == SATA_PKT_BUSY) 1858 cv_wait(&ahci_portp->ahciport_cv, 1859 &ahci_portp->ahciport_mutex); 1860 1861 return (AHCI_SUCCESS); 1862 } 1863 } 1864 1865 /* 1866 * Searches for and claims a free command slot. 1867 * 1868 * Returns value: 1869 * 1870 * AHCI_FAILURE returned only if 1871 * 1. No empty slot left 1872 * 2. Non-queued command requested while queued command(s) is outstanding 1873 * 3. Queued command requested while non-queued command(s) is outstanding 1874 * 4. HBA doesn't support multiple-use of command list while already a 1875 * non-queued command is oustanding 1876 * 5. Queued command requested while some queued command(s) has been 1877 * outstanding on a different port multiplier port. (AHCI spec 1.2, 1878 * 9.1.2) 1879 * 1880 * claimed slot number returned if succeeded 1881 * 1882 * NOTE: it will always return slot 0 for following commands to simplify the 1883 * algorithm. 1884 * 1. REQUEST SENSE or READ LOG EXT command during error recovery process 1885 * 2. READ/WRITE PORTMULT command 1886 * 1887 * WARNING!!! ahciport_mutex should be acquired before the function 1888 * is called. 1889 */ 1890 static int 1891 ahci_claim_free_slot(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 1892 ahci_addr_t *addrp, int command_type) 1893 { 1894 uint32_t port_cmd_issue; 1895 uint32_t free_slots; 1896 int slot; 1897 1898 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_claim_free_slot enter " 1899 "ahciport_pending_tags = 0x%x " 1900 "ahciport_pending_ncq_tags = 0x%x", 1901 ahci_portp->ahciport_pending_tags, 1902 ahci_portp->ahciport_pending_ncq_tags); 1903 1904 /* 1905 * According to the AHCI spec, system software is responsible to 1906 * ensure that queued and non-queued commands are not mixed in 1907 * the command list. 1908 */ 1909 if (command_type == AHCI_NON_NCQ_CMD) { 1910 /* Non-NCQ command request */ 1911 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1912 AHCIDBG(AHCIDBG_INFO|AHCIDBG_NCQ, ahci_ctlp, 1913 "ahci_claim_free_slot: there is still pending " 1914 "queued command(s) in the command list, " 1915 "so no available slot for the non-queued " 1916 "command", NULL); 1917 return (AHCI_FAILURE); 1918 } 1919 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 1920 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 1921 "ahci_claim_free_slot: there is still pending " 1922 "read/write port-mult command(s) in command list, " 1923 "so no available slot for the non-queued command", 1924 NULL); 1925 return (AHCI_FAILURE); 1926 } 1927 if ((ahci_ctlp->ahcictl_cap & AHCI_CAP_NO_MCMDLIST_NONQUEUE) && 1928 NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1929 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1930 "ahci_claim_free_slot: HBA cannot support multiple-" 1931 "use of the command list for non-queued commands", 1932 NULL); 1933 return (AHCI_FAILURE); 1934 } 1935 free_slots = (~ahci_portp->ahciport_pending_tags) & 1936 AHCI_SLOT_MASK(ahci_ctlp); 1937 } else if (command_type == AHCI_NCQ_CMD) { 1938 /* NCQ command request */ 1939 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1940 AHCIDBG(AHCIDBG_INFO|AHCIDBG_NCQ, ahci_ctlp, 1941 "ahci_claim_free_slot: there is still pending " 1942 "non-queued command(s) in the command list, " 1943 "so no available slot for the queued command", 1944 NULL); 1945 return (AHCI_FAILURE); 1946 } 1947 1948 /* 1949 * NCQ commands cannot be sent to different port multiplier 1950 * ports in Command-Based Switching mode 1951 */ 1952 /* 1953 * NOTE: In Command-Based Switching mode, AHCI controller 1954 * usually reports a 'Handshake Error' when multiple NCQ 1955 * commands are outstanding simultaneously. 1956 */ 1957 if (AHCIPORT_DEV_TYPE(ahci_portp, addrp) == SATA_DTYPE_PMULT) { 1958 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1959 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_FBSS) && 1960 NCQ_CMD_IN_PROGRESS(ahci_portp) && 1961 AHCIPORT_NCQ_PMPORT(ahci_portp) != 1962 addrp->aa_pmport) { 1963 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1964 "ahci_claim_free_slot: there is still " 1965 "pending queued command(s) in the " 1966 "command list for another Port Multiplier " 1967 "port, so no available slot.", NULL); 1968 return (AHCI_FAILURE); 1969 } 1970 } 1971 1972 free_slots = (~ahci_portp->ahciport_pending_ncq_tags) & 1973 AHCI_NCQ_SLOT_MASK(ahci_portp); 1974 } else if (command_type == AHCI_ERR_RETRI_CMD) { 1975 /* Error retrieval command request */ 1976 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1977 "ahci_claim_free_slot: slot 0 is allocated for REQUEST " 1978 "SENSE or READ LOG EXT command", NULL); 1979 slot = 0; 1980 goto out; 1981 } else if (command_type == AHCI_RDWR_PMULT_CMD) { 1982 /* 1983 * An extra check on PxCI. Sometimes PxCI bits may not be 1984 * cleared during hot-plug or error recovery process. 1985 */ 1986 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 1987 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, addrp->aa_port)); 1988 1989 if (port_cmd_issue != 0) { 1990 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 1991 "ahci_claim_free_slot: there is still pending " 1992 "command(s) in command list (0x%x/0x%x, PxCI %x)," 1993 "so no available slot for R/W PMULT command.", 1994 NON_NCQ_CMD_IN_PROGRESS(ahci_portp), 1995 NCQ_CMD_IN_PROGRESS(ahci_portp), 1996 port_cmd_issue); 1997 return (AHCI_FAILURE); 1998 } 1999 2000 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2001 "ahci_claim_free_slot: slot 0 is allocated for " 2002 "READ/WRITE PORTMULT command", NULL); 2003 slot = 0; 2004 goto out; 2005 } 2006 2007 slot = ddi_ffs(free_slots) - 1; 2008 if (slot == -1) { 2009 AHCIDBG(AHCIDBG_VERBOSE, ahci_ctlp, 2010 "ahci_claim_free_slot: no empty slots", NULL); 2011 return (AHCI_FAILURE); 2012 } 2013 2014 /* 2015 * According to the AHCI spec, to allow a simple mechanism for the 2016 * HBA to map command list slots to queue entries, software must 2017 * match the tag number it uses to the slot it is placing the command 2018 * in. For example, if a queued command is placed in slot 5, the tag 2019 * for that command must be 5. 2020 */ 2021 if (command_type == AHCI_NCQ_CMD) { 2022 ahci_portp->ahciport_pending_ncq_tags |= (0x1 << slot); 2023 if (AHCI_ADDR_IS_PMPORT(addrp)) { 2024 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 2025 AHCIPORT_NCQ_PMPORT(ahci_portp) = addrp->aa_pmport; 2026 } 2027 } 2028 2029 ahci_portp->ahciport_pending_tags |= (0x1 << slot); 2030 2031 out: 2032 AHCIDBG(AHCIDBG_VERBOSE, ahci_ctlp, 2033 "ahci_claim_free_slot: found slot: 0x%x", slot); 2034 2035 return (slot); 2036 } 2037 2038 /* 2039 * Builds the Command Table for the sata packet and delivers it to controller. 2040 * 2041 * Returns: 2042 * slot number if we can obtain a slot successfully 2043 * otherwise, return AHCI_FAILURE 2044 * 2045 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2046 */ 2047 static int 2048 ahci_deliver_satapkt(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 2049 ahci_addr_t *addrp, sata_pkt_t *spkt) 2050 { 2051 int cmd_slot; 2052 sata_cmd_t *scmd; 2053 ahci_fis_h2d_register_t *h2d_register_fisp; 2054 ahci_cmd_table_t *cmd_table; 2055 ahci_cmd_header_t *cmd_header; 2056 int ncookies; 2057 int i; 2058 int command_type = AHCI_NON_NCQ_CMD; 2059 int ncq_qdepth; 2060 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 2061 uint8_t port, pmport; 2062 #if AHCI_DEBUG 2063 uint32_t *ptr; 2064 uint8_t *ptr2; 2065 #endif 2066 2067 port = addrp->aa_port; 2068 pmport = addrp->aa_pmport; 2069 2070 spkt->satapkt_reason = SATA_PKT_BUSY; 2071 2072 scmd = &spkt->satapkt_cmd; 2073 2074 /* Check if the command is a NCQ command */ 2075 if (scmd->satacmd_cmd_reg == SATAC_READ_FPDMA_QUEUED || 2076 scmd->satacmd_cmd_reg == SATAC_WRITE_FPDMA_QUEUED) { 2077 command_type = AHCI_NCQ_CMD; 2078 2079 /* 2080 * When NCQ is support, system software must determine the 2081 * maximum tag allowed by the device and the HBA, and it 2082 * must use a value not beyond of the lower bound of the two. 2083 * 2084 * Sata module is going to calculate the qdepth and send 2085 * down to HBA driver via sata_cmd. 2086 */ 2087 ncq_qdepth = scmd->satacmd_flags.sata_max_queue_depth + 1; 2088 2089 /* 2090 * At the moment, the driver doesn't support the dynamic 2091 * setting of the maximum ncq depth, and the value can be 2092 * set either during the attach or after hot-plug insertion. 2093 */ 2094 if (ahci_portp->ahciport_max_ncq_tags == 0) { 2095 ahci_portp->ahciport_max_ncq_tags = ncq_qdepth; 2096 AHCIDBG(AHCIDBG_NCQ, ahci_ctlp, 2097 "ahci_deliver_satapkt: port %d the max tags for " 2098 "NCQ command is %d", port, ncq_qdepth); 2099 } else { 2100 if (ncq_qdepth != ahci_portp->ahciport_max_ncq_tags) { 2101 cmn_err(CE_WARN, "!ahci%d: ahci_deliver_satapkt" 2102 " port %d the max tag for NCQ command is " 2103 "requested to change from %d to %d, at the" 2104 " moment the driver doesn't support the " 2105 "dynamic change so it's going to " 2106 "still use the previous tag value", 2107 instance, port, 2108 ahci_portp->ahciport_max_ncq_tags, 2109 ncq_qdepth); 2110 } 2111 } 2112 } 2113 2114 /* Check if the command is an error retrieval command */ 2115 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 2116 command_type = AHCI_ERR_RETRI_CMD; 2117 2118 /* Check if the command is an read/write pmult command */ 2119 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 2120 command_type = AHCI_RDWR_PMULT_CMD; 2121 2122 /* Check if there is an empty command slot */ 2123 cmd_slot = ahci_claim_free_slot(ahci_ctlp, ahci_portp, 2124 addrp, command_type); 2125 if (cmd_slot == AHCI_FAILURE) { 2126 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "no free command slot", NULL); 2127 return (AHCI_FAILURE); 2128 } 2129 2130 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INFO, ahci_ctlp, 2131 "ahci_deliver_satapkt enter: cmd_reg: 0x%x, cmd_slot: 0x%x, " 2132 "port: %d, satapkt: 0x%p", scmd->satacmd_cmd_reg, 2133 cmd_slot, port, (void *)spkt); 2134 2135 cmd_table = ahci_portp->ahciport_cmd_tables[cmd_slot]; 2136 bzero((void *)cmd_table, ahci_cmd_table_size); 2137 2138 /* For data transfer operations, it is the H2D Register FIS */ 2139 h2d_register_fisp = 2140 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 2141 2142 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 2143 2144 /* 2145 * PMP field only make sense when target is a port multiplier or a 2146 * device behind a port multiplier. Otherwise should set it to 0. 2147 */ 2148 if (AHCI_ADDR_IS_PMULT(addrp) || AHCI_ADDR_IS_PMPORT(addrp)) 2149 SET_FIS_PMP(h2d_register_fisp, pmport); 2150 2151 SET_FIS_CDMDEVCTL(h2d_register_fisp, 1); 2152 SET_FIS_COMMAND(h2d_register_fisp, scmd->satacmd_cmd_reg); 2153 SET_FIS_FEATURES(h2d_register_fisp, scmd->satacmd_features_reg); 2154 SET_FIS_SECTOR_COUNT(h2d_register_fisp, scmd->satacmd_sec_count_lsb); 2155 2156 switch (scmd->satacmd_addr_type) { 2157 2158 case 0: 2159 /* 2160 * satacmd_addr_type will be 0 for the commands below: 2161 * ATAPI command 2162 * SATAC_IDLE_IM 2163 * SATAC_STANDBY_IM 2164 * SATAC_DOWNLOAD_MICROCODE 2165 * SATAC_FLUSH_CACHE 2166 * SATAC_SET_FEATURES 2167 * SATAC_SMART 2168 * SATAC_ID_PACKET_DEVICE 2169 * SATAC_ID_DEVICE 2170 * SATAC_READ_PORTMULT 2171 * SATAC_WRITE_PORTMULT 2172 */ 2173 /* FALLTHRU */ 2174 2175 case ATA_ADDR_LBA: 2176 /* FALLTHRU */ 2177 2178 case ATA_ADDR_LBA28: 2179 /* LBA[7:0] */ 2180 SET_FIS_SECTOR(h2d_register_fisp, scmd->satacmd_lba_low_lsb); 2181 2182 /* LBA[15:8] */ 2183 SET_FIS_CYL_LOW(h2d_register_fisp, scmd->satacmd_lba_mid_lsb); 2184 2185 /* LBA[23:16] */ 2186 SET_FIS_CYL_HI(h2d_register_fisp, scmd->satacmd_lba_high_lsb); 2187 2188 /* LBA [27:24] (also called dev_head) */ 2189 SET_FIS_DEV_HEAD(h2d_register_fisp, scmd->satacmd_device_reg); 2190 2191 break; 2192 2193 case ATA_ADDR_LBA48: 2194 /* LBA[7:0] */ 2195 SET_FIS_SECTOR(h2d_register_fisp, scmd->satacmd_lba_low_lsb); 2196 2197 /* LBA[15:8] */ 2198 SET_FIS_CYL_LOW(h2d_register_fisp, scmd->satacmd_lba_mid_lsb); 2199 2200 /* LBA[23:16] */ 2201 SET_FIS_CYL_HI(h2d_register_fisp, scmd->satacmd_lba_high_lsb); 2202 2203 /* LBA [31:24] */ 2204 SET_FIS_SECTOR_EXP(h2d_register_fisp, 2205 scmd->satacmd_lba_low_msb); 2206 2207 /* LBA [39:32] */ 2208 SET_FIS_CYL_LOW_EXP(h2d_register_fisp, 2209 scmd->satacmd_lba_mid_msb); 2210 2211 /* LBA [47:40] */ 2212 SET_FIS_CYL_HI_EXP(h2d_register_fisp, 2213 scmd->satacmd_lba_high_msb); 2214 2215 /* Set dev_head */ 2216 SET_FIS_DEV_HEAD(h2d_register_fisp, 2217 scmd->satacmd_device_reg); 2218 2219 /* Set the extended sector count and features */ 2220 SET_FIS_SECTOR_COUNT_EXP(h2d_register_fisp, 2221 scmd->satacmd_sec_count_msb); 2222 SET_FIS_FEATURES_EXP(h2d_register_fisp, 2223 scmd->satacmd_features_reg_ext); 2224 break; 2225 } 2226 2227 /* 2228 * For NCQ command (READ/WRITE FPDMA QUEUED), sector count 7:0 is 2229 * filled into features field, and sector count 8:15 is filled into 2230 * features (exp) field. The hba driver doesn't need to anything 2231 * special with regard to this, since sata framework has already 2232 * done so. 2233 * 2234 * However the driver needs to make sure TAG is filled into sector 2235 * field. 2236 */ 2237 if (command_type == AHCI_NCQ_CMD) { 2238 SET_FIS_SECTOR_COUNT(h2d_register_fisp, 2239 (cmd_slot << SATA_TAG_QUEUING_SHIFT)); 2240 } 2241 2242 ncookies = scmd->satacmd_num_dma_cookies; 2243 AHCIDBG(AHCIDBG_PRDT, ahci_ctlp, 2244 "ncookies = 0x%x, ahci_dma_prdt_number = 0x%x", 2245 ncookies, ahci_dma_prdt_number); 2246 2247 ASSERT(ncookies <= ahci_dma_prdt_number); 2248 ahci_portp->ahciport_prd_bytecounts[cmd_slot] = 0; 2249 2250 /* *** now fill the scatter gather list ******* */ 2251 for (i = 0; i < ncookies; i++) { 2252 cmd_table->ahcict_prdt[i].ahcipi_data_base_addr = 2253 scmd->satacmd_dma_cookie_list[i]._dmu._dmac_la[0]; 2254 cmd_table->ahcict_prdt[i].ahcipi_data_base_addr_upper = 2255 scmd->satacmd_dma_cookie_list[i]._dmu._dmac_la[1]; 2256 cmd_table->ahcict_prdt[i].ahcipi_descr_info = 2257 scmd->satacmd_dma_cookie_list[i].dmac_size - 1; 2258 ahci_portp->ahciport_prd_bytecounts[cmd_slot] += 2259 scmd->satacmd_dma_cookie_list[i].dmac_size; 2260 } 2261 2262 AHCIDBG(AHCIDBG_PRDT, ahci_ctlp, 2263 "ahciport_prd_bytecounts 0x%x for cmd_slot 0x%x", 2264 ahci_portp->ahciport_prd_bytecounts[cmd_slot], cmd_slot); 2265 2266 /* The ACMD field is filled in for ATAPI command */ 2267 if (scmd->satacmd_cmd_reg == SATAC_PACKET) { 2268 bcopy(scmd->satacmd_acdb, cmd_table->ahcict_atapi_cmd, 2269 SATA_ATAPI_MAX_CDB_LEN); 2270 } 2271 2272 /* Set Command Header in Command List */ 2273 cmd_header = &ahci_portp->ahciport_cmd_list[cmd_slot]; 2274 BZERO_DESCR_INFO(cmd_header); 2275 BZERO_PRD_BYTE_COUNT(cmd_header); 2276 2277 /* Set the number of entries in the PRD table */ 2278 SET_PRD_TABLE_LENGTH(cmd_header, ncookies); 2279 2280 /* Set the length of the command in the CFIS area */ 2281 SET_COMMAND_FIS_LENGTH(cmd_header, AHCI_H2D_REGISTER_FIS_LENGTH); 2282 2283 /* 2284 * PMP field only make sense when target is a port multiplier or a 2285 * device behind a port multiplier. Otherwise should set it to 0. 2286 */ 2287 if (AHCI_ADDR_IS_PMULT(addrp) || AHCI_ADDR_IS_PMPORT(addrp)) 2288 SET_PORT_MULTI_PORT(cmd_header, pmport); 2289 2290 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "command data direction is " 2291 "sata_data_direction = 0x%x", 2292 scmd->satacmd_flags.sata_data_direction); 2293 2294 /* Set A bit if it is an ATAPI command */ 2295 if (scmd->satacmd_cmd_reg == SATAC_PACKET) 2296 SET_ATAPI(cmd_header, AHCI_CMDHEAD_ATAPI); 2297 2298 /* Set W bit if data is going to the device */ 2299 if (scmd->satacmd_flags.sata_data_direction == SATA_DIR_WRITE) 2300 SET_WRITE(cmd_header, AHCI_CMDHEAD_DATA_WRITE); 2301 2302 /* 2303 * Set the prefetchable bit - this bit is only valid if the PRDTL 2304 * field is non-zero or the ATAPI 'A' bit is set in the command 2305 * header. This bit cannot be set when using native command 2306 * queuing commands or when using FIS-based switching with a Port 2307 * multiplier. 2308 */ 2309 if (command_type != AHCI_NCQ_CMD) 2310 SET_PREFETCHABLE(cmd_header, AHCI_CMDHEAD_PREFETCHABLE); 2311 2312 /* 2313 * Now remember the sata packet in ahciport_slot_pkts[]. 2314 * Error retrieval command and r/w port multiplier command will 2315 * be stored specifically for each port. 2316 */ 2317 if (!ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 2318 !RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 2319 ahci_portp->ahciport_slot_pkts[cmd_slot] = spkt; 2320 2321 /* 2322 * Keep the timeout value 2323 */ 2324 ahci_portp->ahciport_slot_timeout[cmd_slot] = spkt->satapkt_time; 2325 2326 /* 2327 * If the intial timout is less than 1 tick, then make it longer by 2328 * 1 tick to avoid immediate timeout 2329 */ 2330 if (ahci_portp->ahciport_slot_timeout[cmd_slot] <= 2331 ahci_watchdog_timeout) 2332 ahci_portp->ahciport_slot_timeout[cmd_slot] += 2333 ahci_watchdog_timeout; 2334 2335 #if AHCI_DEBUG 2336 if (ahci_debug_flags & AHCIDBG_ATACMD && 2337 scmd->satacmd_cmd_reg != SATAC_PACKET || 2338 ahci_debug_flags & AHCIDBG_ATAPICMD && 2339 scmd->satacmd_cmd_reg == SATAC_PACKET) { 2340 2341 /* Dump the command header and table */ 2342 ahci_log(ahci_ctlp, CE_WARN, "\n"); 2343 ahci_log(ahci_ctlp, CE_WARN, "Command header&table for spkt " 2344 "0x%p cmd_reg 0x%x port %d", spkt, 2345 scmd->satacmd_cmd_reg, port); 2346 ptr = (uint32_t *)cmd_header; 2347 ahci_log(ahci_ctlp, CE_WARN, 2348 " Command Header:%8x %8x %8x %8x", 2349 ptr[0], ptr[1], ptr[2], ptr[3]); 2350 2351 /* Dump the H2D register FIS */ 2352 ptr = (uint32_t *)h2d_register_fisp; 2353 ahci_log(ahci_ctlp, CE_WARN, 2354 " Command FIS: %8x %8x %8x %8x", 2355 ptr[0], ptr[1], ptr[2], ptr[3]); 2356 2357 /* Dump the ACMD register FIS */ 2358 ptr2 = (uint8_t *)&(cmd_table->ahcict_atapi_cmd); 2359 for (i = 0; i < SATA_ATAPI_MAX_CDB_LEN/8; i++) 2360 if (ahci_debug_flags & AHCIDBG_ATAPICMD) 2361 ahci_log(ahci_ctlp, CE_WARN, 2362 " ATAPI command: %2x %2x %2x %2x " 2363 "%2x %2x %2x %2x", 2364 ptr2[8 * i], ptr2[8 * i + 1], 2365 ptr2[8 * i + 2], ptr2[8 * i + 3], 2366 ptr2[8 * i + 4], ptr2[8 * i + 5], 2367 ptr2[8 * i + 6], ptr2[8 * i + 7]); 2368 2369 /* Dump the PRDT */ 2370 for (i = 0; i < ncookies; i++) { 2371 ptr = (uint32_t *)&(cmd_table->ahcict_prdt[i]); 2372 ahci_log(ahci_ctlp, CE_WARN, 2373 " Cookie %d: %8x %8x %8x %8x", 2374 i, ptr[0], ptr[1], ptr[2], ptr[3]); 2375 } 2376 } 2377 #endif 2378 2379 (void) ddi_dma_sync( 2380 ahci_portp->ahciport_cmd_tables_dma_handle[cmd_slot], 2381 0, 2382 ahci_cmd_table_size, 2383 DDI_DMA_SYNC_FORDEV); 2384 2385 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 2386 cmd_slot * sizeof (ahci_cmd_header_t), 2387 sizeof (ahci_cmd_header_t), 2388 DDI_DMA_SYNC_FORDEV); 2389 2390 if ((ahci_check_dma_handle(ahci_portp-> 2391 ahciport_cmd_tables_dma_handle[cmd_slot]) != DDI_FM_OK) || 2392 ahci_check_dma_handle(ahci_portp-> 2393 ahciport_cmd_list_dma_handle) != DDI_FM_OK) { 2394 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 2395 DDI_SERVICE_UNAFFECTED); 2396 return (AHCI_FAILURE); 2397 } 2398 2399 /* Set the corresponding bit in the PxSACT.DS for queued command */ 2400 if (command_type == AHCI_NCQ_CMD) { 2401 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 2402 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port), 2403 (0x1 << cmd_slot)); 2404 } 2405 2406 /* Indicate to the HBA that a command is active. */ 2407 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 2408 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 2409 (0x1 << cmd_slot)); 2410 2411 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_deliver_satapkt " 2412 "exit: port %d", port); 2413 2414 /* Make sure the command is started by the PxSACT/PxCI */ 2415 if (ahci_check_acc_handle(ahci_ctlp-> 2416 ahcictl_ahci_acc_handle) != DDI_FM_OK) { 2417 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 2418 DDI_SERVICE_UNAFFECTED); 2419 return (AHCI_FAILURE); 2420 } 2421 2422 return (cmd_slot); 2423 } 2424 2425 /* 2426 * Called by the sata framework to abort the previously sent packet(s). 2427 * 2428 * Reset device to abort commands. 2429 */ 2430 static int 2431 ahci_tran_abort(dev_info_t *dip, sata_pkt_t *spkt, int flag) 2432 { 2433 ahci_ctl_t *ahci_ctlp; 2434 ahci_port_t *ahci_portp; 2435 uint32_t slot_status = 0; 2436 uint32_t aborted_tags = 0; 2437 uint32_t finished_tags = 0; 2438 uint8_t cport = spkt->satapkt_device.satadev_addr.cport; 2439 uint8_t port; 2440 int tmp_slot; 2441 int instance = ddi_get_instance(dip); 2442 2443 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 2444 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 2445 2446 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2447 "ahci_tran_abort enter: port %d", port); 2448 2449 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2450 mutex_enter(&ahci_portp->ahciport_mutex); 2451 2452 /* 2453 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2454 * commands are being mopped, therefore there is nothing else to do 2455 */ 2456 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2457 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2458 "ahci_tran_abort: port %d is in " 2459 "mopping process, so just return directly ", port); 2460 mutex_exit(&ahci_portp->ahciport_mutex); 2461 return (SATA_SUCCESS); 2462 } 2463 2464 /* 2465 * If AHCI_PORT_FLAG_RDWR_PMULT flag is set, it means a R/W PMULT 2466 * command is being executed so no other commands is outstanding, 2467 * nothing to do. 2468 */ 2469 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_RDWR_PMULT) { 2470 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2471 "ahci_tran_abort: port %d is reading/writing " 2472 "port multiplier, so just return directly ", port); 2473 mutex_exit(&ahci_portp->ahciport_mutex); 2474 return (SATA_SUCCESS); 2475 } 2476 2477 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED | 2478 ahci_portp->ahciport_port_state & SATA_PSTATE_SHUTDOWN | 2479 ahci_portp->ahciport_port_state & SATA_PSTATE_PWROFF) { 2480 /* 2481 * In case the targer driver would send the request before 2482 * sata framework can have the opportunity to process those 2483 * event reports. 2484 */ 2485 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 2486 spkt->satapkt_device.satadev_state = 2487 ahci_portp->ahciport_port_state; 2488 ahci_update_sata_registers(ahci_ctlp, port, 2489 &spkt->satapkt_device); 2490 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2491 "ahci_tran_abort returning SATA_FAILURE while " 2492 "port in FAILED/SHUTDOWN/PWROFF state: " 2493 "port: %d", port); 2494 mutex_exit(&ahci_portp->ahciport_mutex); 2495 return (SATA_FAILURE); 2496 } 2497 2498 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 2499 /* 2500 * ahci_intr_phyrdy_change() may have rendered it to 2501 * AHCI_PORT_TYPE_NODEV. 2502 */ 2503 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 2504 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 2505 spkt->satapkt_device.satadev_state = 2506 ahci_portp->ahciport_port_state; 2507 ahci_update_sata_registers(ahci_ctlp, port, 2508 &spkt->satapkt_device); 2509 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2510 "ahci_tran_abort returning SATA_FAILURE while " 2511 "no device attached: port: %d", port); 2512 mutex_exit(&ahci_portp->ahciport_mutex); 2513 return (SATA_FAILURE); 2514 } 2515 2516 if (flag == SATA_ABORT_ALL_PACKETS) { 2517 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2518 aborted_tags = ahci_portp->ahciport_pending_tags; 2519 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2520 aborted_tags = ahci_portp->ahciport_pending_ncq_tags; 2521 2522 cmn_err(CE_NOTE, "!ahci%d: ahci port %d abort all packets", 2523 instance, port); 2524 } else { 2525 aborted_tags = 0xffffffff; 2526 /* 2527 * Aborting one specific packet, first search the 2528 * ahciport_slot_pkts[] list for matching spkt. 2529 */ 2530 for (tmp_slot = 0; 2531 tmp_slot < ahci_ctlp->ahcictl_num_cmd_slots; tmp_slot++) { 2532 if (ahci_portp->ahciport_slot_pkts[tmp_slot] == spkt) { 2533 aborted_tags = (0x1 << tmp_slot); 2534 break; 2535 } 2536 } 2537 2538 if (aborted_tags == 0xffffffff) { 2539 /* request packet is not on the pending list */ 2540 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2541 "Cannot find the aborting pkt 0x%p on the " 2542 "pending list", (void *)spkt); 2543 ahci_update_sata_registers(ahci_ctlp, port, 2544 &spkt->satapkt_device); 2545 mutex_exit(&ahci_portp->ahciport_mutex); 2546 return (SATA_FAILURE); 2547 } 2548 cmn_err(CE_NOTE, "!ahci%d: ahci port %d abort satapkt 0x%p", 2549 instance, port, (void *)spkt); 2550 } 2551 2552 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2553 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2554 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2555 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2556 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2557 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2558 2559 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2560 ahci_portp->ahciport_mop_in_progress++; 2561 2562 /* 2563 * To abort the packet(s), first we are trying to clear PxCMD.ST 2564 * to stop the port, and if the port can be stopped 2565 * successfully with PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0', 2566 * then we just send back the aborted packet(s) with ABORTED flag 2567 * and then restart the port by setting PxCMD.ST and PxCMD.FRE. 2568 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then we 2569 * perform a COMRESET. 2570 */ 2571 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, 2572 ahci_portp, port, NULL, NULL); 2573 2574 /* 2575 * Compute which have finished and which need to be retried. 2576 * 2577 * The finished tags are ahciport_pending_tags/ahciport_pending_ncq_tags 2578 * minus the slot_status. The aborted_tags has to be deducted by 2579 * finished_tags since we can't possibly abort a tag which had finished 2580 * already. 2581 */ 2582 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2583 finished_tags = ahci_portp->ahciport_pending_tags & 2584 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2585 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2586 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2587 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2588 2589 aborted_tags &= ~finished_tags; 2590 2591 ahci_mop_commands(ahci_ctlp, 2592 ahci_portp, 2593 slot_status, 2594 0, /* failed tags */ 2595 0, /* timeout tags */ 2596 aborted_tags, 2597 0); /* reset tags */ 2598 2599 ahci_update_sata_registers(ahci_ctlp, port, &spkt->satapkt_device); 2600 mutex_exit(&ahci_portp->ahciport_mutex); 2601 2602 return (SATA_SUCCESS); 2603 } 2604 2605 /* 2606 * Used to do device reset and reject all the pending packets on a device 2607 * during the reset operation. 2608 * 2609 * NOTE: ONLY called by ahci_tran_reset_dport 2610 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2611 */ 2612 static int 2613 ahci_reset_device_reject_pkts(ahci_ctl_t *ahci_ctlp, 2614 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2615 { 2616 uint32_t slot_status = 0; 2617 uint32_t reset_tags = 0; 2618 uint32_t finished_tags = 0; 2619 uint8_t port = addrp->aa_port; 2620 sata_device_t sdevice; 2621 int ret; 2622 2623 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2624 "ahci_reset_device_reject_pkts on port: %d", port); 2625 2626 /* 2627 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2628 * commands are being mopped, therefore there is nothing else to do 2629 */ 2630 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2631 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2632 "ahci_reset_device_reject_pkts: port %d is in " 2633 "mopping process, so return directly ", port); 2634 return (SATA_SUCCESS); 2635 } 2636 2637 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2638 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2639 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2640 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2641 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2642 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2643 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2644 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2645 } 2646 2647 if (ahci_software_reset(ahci_ctlp, ahci_portp, addrp) 2648 != AHCI_SUCCESS) { 2649 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2650 "Try to do a port reset after software " 2651 "reset failed", port); 2652 ret = ahci_port_reset(ahci_ctlp, ahci_portp, addrp); 2653 if (ret != AHCI_SUCCESS) { 2654 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2655 "ahci_reset_device_reject_pkts: port %d " 2656 "failed", port); 2657 return (SATA_FAILURE); 2658 } 2659 } 2660 /* Set the reset in progress flag */ 2661 ahci_portp->ahciport_reset_in_progress = 1; 2662 2663 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2664 ahci_portp->ahciport_mop_in_progress++; 2665 2666 /* Indicate to the framework that a reset has happened */ 2667 bzero((void *)&sdevice, sizeof (sata_device_t)); 2668 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 2669 sdevice.satadev_addr.pmport = 0; 2670 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 2671 sdevice.satadev_state = SATA_DSTATE_RESET | 2672 SATA_DSTATE_PWR_ACTIVE; 2673 mutex_exit(&ahci_portp->ahciport_mutex); 2674 sata_hba_event_notify( 2675 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 2676 &sdevice, 2677 SATA_EVNT_DEVICE_RESET); 2678 mutex_enter(&ahci_portp->ahciport_mutex); 2679 2680 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 2681 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 2682 2683 /* Next try to mop the pending commands */ 2684 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2685 finished_tags = ahci_portp->ahciport_pending_tags & 2686 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2687 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2688 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2689 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2690 2691 reset_tags &= ~finished_tags; 2692 2693 ahci_mop_commands(ahci_ctlp, 2694 ahci_portp, 2695 slot_status, 2696 0, /* failed tags */ 2697 0, /* timeout tags */ 2698 0, /* aborted tags */ 2699 reset_tags); /* reset tags */ 2700 2701 return (SATA_SUCCESS); 2702 } 2703 2704 /* 2705 * Used to do device reset and reject all the pending packets on a device 2706 * during the reset operation. 2707 * 2708 * NOTE: ONLY called by ahci_tran_reset_dport 2709 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2710 */ 2711 static int 2712 ahci_reset_pmdevice_reject_pkts(ahci_ctl_t *ahci_ctlp, 2713 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2714 { 2715 uint32_t finished_tags = 0, reset_tags = 0, slot_status = 0; 2716 uint8_t port = addrp->aa_port; 2717 uint8_t pmport = addrp->aa_pmport; 2718 sata_device_t sdevice; 2719 2720 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_PMULT, ahci_ctlp, 2721 "ahci_reset_pmdevice_reject_pkts at port %d:%d", port, pmport); 2722 2723 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2724 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2725 "ahci_reset_pmdevice_reject_pkts: port %d is in " 2726 "mopping process, so return directly ", port); 2727 return (SATA_SUCCESS); 2728 } 2729 2730 /* Checking for outstanding commands */ 2731 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2732 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2733 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2734 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2735 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2736 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2737 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2738 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2739 } 2740 2741 /* Issue SOFTWARE reset command. */ 2742 if (ahci_software_reset(ahci_ctlp, ahci_portp, addrp) 2743 != AHCI_SUCCESS) { 2744 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2745 "Try to do a port reset after software " 2746 "reset failed", port); 2747 return (SATA_FAILURE); 2748 } 2749 2750 /* Set the reset in progress flag */ 2751 ahci_portp->ahciport_reset_in_progress = 1; 2752 2753 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2754 ahci_portp->ahciport_mop_in_progress++; 2755 2756 /* Indicate to the framework that a reset has happened */ 2757 bzero((void *)&sdevice, sizeof (sata_device_t)); 2758 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 2759 sdevice.satadev_addr.pmport = pmport; 2760 if (AHCI_ADDR_IS_PMULT(addrp)) 2761 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 2762 else 2763 sdevice.satadev_addr.qual = SATA_ADDR_DPMPORT; 2764 sdevice.satadev_state = SATA_DSTATE_RESET | 2765 SATA_DSTATE_PWR_ACTIVE; 2766 mutex_exit(&ahci_portp->ahciport_mutex); 2767 sata_hba_event_notify( 2768 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 2769 &sdevice, 2770 SATA_EVNT_DEVICE_RESET); 2771 mutex_enter(&ahci_portp->ahciport_mutex); 2772 2773 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 2774 "port %d:%d sending event up: SATA_EVNT_DEVICE_RESET", 2775 port, pmport); 2776 2777 /* Next try to mop the pending commands */ 2778 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2779 finished_tags = ahci_portp->ahciport_pending_tags & 2780 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2781 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2782 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2783 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2784 reset_tags &= ~finished_tags; 2785 2786 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 2787 "reset_tags = %x, finished_tags = %x, slot_status = %x", 2788 reset_tags, finished_tags, slot_status); 2789 2790 /* 2791 * NOTE: Because PxCI be only erased by unset PxCMD.ST bit, so even we 2792 * try to reset a single device behind a port multiplier will 2793 * terminate all the commands on that HBA port. We need mop these 2794 * commands as well. 2795 */ 2796 ahci_mop_commands(ahci_ctlp, 2797 ahci_portp, 2798 slot_status, 2799 0, /* failed tags */ 2800 0, /* timeout tags */ 2801 0, /* aborted tags */ 2802 reset_tags); /* reset tags */ 2803 2804 return (SATA_SUCCESS); 2805 } 2806 2807 /* 2808 * Used to do port reset and reject all the pending packets on a port during 2809 * the reset operation. 2810 * 2811 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2812 */ 2813 static int 2814 ahci_reset_port_reject_pkts(ahci_ctl_t *ahci_ctlp, 2815 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2816 { 2817 uint32_t slot_status = 0; 2818 uint32_t reset_tags = 0; 2819 uint32_t finished_tags = 0; 2820 uint8_t port = addrp->aa_port; 2821 2822 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2823 "ahci_reset_port_reject_pkts at port: %d", port); 2824 2825 /* 2826 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2827 * commands are being mopped, therefore there is nothing else to do 2828 */ 2829 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2830 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2831 "ahci_reset_port_reject_pkts: port %d is in " 2832 "mopping process, so return directly ", port); 2833 return (SATA_SUCCESS); 2834 } 2835 2836 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2837 ahci_portp->ahciport_mop_in_progress++; 2838 2839 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2840 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2841 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2842 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2843 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2844 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2845 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2846 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2847 } 2848 2849 if (ahci_restart_port_wait_till_ready(ahci_ctlp, 2850 ahci_portp, port, AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, 2851 NULL) != AHCI_SUCCESS) { 2852 2853 /* Clear mop flag */ 2854 ahci_portp->ahciport_mop_in_progress--; 2855 if (ahci_portp->ahciport_mop_in_progress == 0) 2856 ahci_portp->ahciport_flags &= 2857 ~AHCI_PORT_FLAG_MOPPING; 2858 return (SATA_FAILURE); 2859 } 2860 2861 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2862 finished_tags = ahci_portp->ahciport_pending_tags & 2863 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2864 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2865 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2866 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2867 2868 reset_tags &= ~finished_tags; 2869 2870 ahci_mop_commands(ahci_ctlp, 2871 ahci_portp, 2872 slot_status, 2873 0, /* failed tags */ 2874 0, /* timeout tags */ 2875 0, /* aborted tags */ 2876 reset_tags); /* reset tags */ 2877 2878 return (SATA_SUCCESS); 2879 } 2880 2881 /* 2882 * Used to do hba reset and reject all the pending packets on all ports 2883 * during the reset operation. 2884 */ 2885 static int 2886 ahci_reset_hba_reject_pkts(ahci_ctl_t *ahci_ctlp) 2887 { 2888 ahci_port_t *ahci_portp; 2889 uint32_t slot_status[AHCI_MAX_PORTS]; 2890 uint32_t reset_tags[AHCI_MAX_PORTS]; 2891 uint32_t finished_tags[AHCI_MAX_PORTS]; 2892 int port; 2893 int ret = SATA_SUCCESS; 2894 2895 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2896 "ahci_reset_hba_reject_pkts enter", NULL); 2897 2898 bzero(slot_status, sizeof (slot_status)); 2899 bzero(reset_tags, sizeof (reset_tags)); 2900 bzero(finished_tags, sizeof (finished_tags)); 2901 2902 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 2903 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 2904 continue; 2905 } 2906 2907 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2908 2909 mutex_enter(&ahci_portp->ahciport_mutex); 2910 ahci_portp->ahciport_reset_in_progress = 1; 2911 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2912 slot_status[port] = ddi_get32( 2913 ahci_ctlp->ahcictl_ahci_acc_handle, 2914 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2915 reset_tags[port] = slot_status[port] & 2916 AHCI_SLOT_MASK(ahci_ctlp); 2917 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 2918 "port %d: reset_tags = 0x%x pending_tags = 0x%x", 2919 port, reset_tags[port], 2920 ahci_portp->ahciport_pending_tags); 2921 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2922 slot_status[port] = ddi_get32( 2923 ahci_ctlp->ahcictl_ahci_acc_handle, 2924 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2925 reset_tags[port] = slot_status[port] & 2926 AHCI_NCQ_SLOT_MASK(ahci_portp); 2927 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 2928 "port %d: reset_tags = 0x%x pending_tags = 0x%x", 2929 port, reset_tags[port], 2930 ahci_portp->ahciport_pending_tags); 2931 } 2932 mutex_exit(&ahci_portp->ahciport_mutex); 2933 } 2934 2935 if (ahci_hba_reset(ahci_ctlp) != AHCI_SUCCESS) { 2936 ret = SATA_FAILURE; 2937 } 2938 2939 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 2940 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 2941 continue; 2942 } 2943 2944 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2945 2946 mutex_enter(&ahci_portp->ahciport_mutex); 2947 /* 2948 * To prevent recursive enter to ahci_mop_commands, we need 2949 * check AHCI_PORT_FLAG_MOPPING flag. 2950 */ 2951 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2952 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2953 "ahci_reset_hba_reject_pkts: port %d is in " 2954 "mopping process, so return directly ", port); 2955 mutex_exit(&ahci_portp->ahciport_mutex); 2956 continue; 2957 } 2958 2959 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2960 ahci_portp->ahciport_mop_in_progress++; 2961 2962 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2963 finished_tags[port] = 2964 ahci_portp->ahciport_pending_tags & 2965 ~slot_status[port] & AHCI_SLOT_MASK(ahci_ctlp); 2966 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2967 finished_tags[port] = 2968 ahci_portp->ahciport_pending_ncq_tags & 2969 ~slot_status[port] & AHCI_NCQ_SLOT_MASK(ahci_portp); 2970 2971 reset_tags[port] &= ~finished_tags[port]; 2972 2973 ahci_mop_commands(ahci_ctlp, 2974 ahci_portp, 2975 slot_status[port], 2976 0, /* failed tags */ 2977 0, /* timeout tags */ 2978 0, /* aborted tags */ 2979 reset_tags[port]); /* reset tags */ 2980 mutex_exit(&ahci_portp->ahciport_mutex); 2981 } 2982 out: 2983 return (ret); 2984 } 2985 2986 /* 2987 * Called by sata framework to reset a port(s) or device. 2988 */ 2989 static int 2990 ahci_tran_reset_dport(dev_info_t *dip, sata_device_t *sd) 2991 { 2992 ahci_ctl_t *ahci_ctlp; 2993 ahci_port_t *ahci_portp; 2994 ahci_addr_t addr; 2995 uint8_t cport = sd->satadev_addr.cport; 2996 uint8_t pmport = sd->satadev_addr.pmport; 2997 uint8_t port; 2998 int ret = SATA_SUCCESS; 2999 int instance = ddi_get_instance(dip); 3000 3001 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 3002 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 3003 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3004 3005 ahci_get_ahci_addr(ahci_ctlp, sd, &addr); 3006 3007 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 3008 "ahci_tran_reset_dport enter: cport %d", cport); 3009 3010 switch (sd->satadev_addr.qual) { 3011 case SATA_ADDR_PMPORT: 3012 /* 3013 * If we want to issue a COMRESET on a pmport, we need to 3014 * reject the outstanding commands on that pmport. According 3015 * to AHCI spec, PxCI register could only be cleared by 3016 * clearing PxCMD.ST, which will halt the controller port - as 3017 * well as other pmports. 3018 * 3019 * Therefore we directly reset the controller port for 3020 * simplicity. ahci_tran_probe_port() will handle reset stuff 3021 * like initializing the given pmport. 3022 */ 3023 /* FALLTHRU */ 3024 case SATA_ADDR_CPORT: 3025 /* Port reset */ 3026 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3027 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 3028 "port %d reset port", instance, port); 3029 3030 mutex_enter(&ahci_portp->ahciport_mutex); 3031 ret = ahci_reset_port_reject_pkts(ahci_ctlp, ahci_portp, &addr); 3032 mutex_exit(&ahci_portp->ahciport_mutex); 3033 3034 break; 3035 3036 case SATA_ADDR_DPMPORT: 3037 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 3038 "port %d:%d reset device", instance, port, pmport); 3039 /* FALLTHRU */ 3040 case SATA_ADDR_DCPORT: 3041 /* Device reset */ 3042 if (sd->satadev_addr.qual == SATA_ADDR_DCPORT) 3043 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 3044 "port %d reset device", instance, port); 3045 3046 mutex_enter(&ahci_portp->ahciport_mutex); 3047 /* 3048 * software reset request must be sent to SATA_PMULT_HOSTPORT 3049 * if target is a port multiplier: 3050 */ 3051 if (sd->satadev_addr.qual == SATA_ADDR_DCPORT && 3052 ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) 3053 AHCI_ADDR_SET_PMULT(&addr, port); 3054 3055 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED | 3056 ahci_portp->ahciport_port_state & SATA_PSTATE_SHUTDOWN | 3057 ahci_portp->ahciport_port_state & SATA_PSTATE_PWROFF) { 3058 /* 3059 * In case the targer driver would send the request 3060 * before sata framework can have the opportunity to 3061 * process those event reports. 3062 */ 3063 sd->satadev_state = ahci_portp->ahciport_port_state; 3064 ahci_update_sata_registers(ahci_ctlp, port, sd); 3065 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3066 "ahci_tran_reset_dport returning SATA_FAILURE " 3067 "while port in FAILED/SHUTDOWN/PWROFF state: " 3068 "port: %d", port); 3069 mutex_exit(&ahci_portp->ahciport_mutex); 3070 ret = SATA_FAILURE; 3071 break; 3072 } 3073 3074 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) == 3075 SATA_DTYPE_NONE) { 3076 /* 3077 * ahci_intr_phyrdy_change() may have rendered it to 3078 * AHCI_PORT_TYPE_NODEV. 3079 */ 3080 sd->satadev_type = SATA_DTYPE_NONE; 3081 sd->satadev_state = AHCIPORT_GET_STATE(ahci_portp, 3082 &addr); 3083 ahci_update_sata_registers(ahci_ctlp, port, sd); 3084 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3085 "ahci_tran_reset_dport returning SATA_FAILURE " 3086 "while no device attached: port: %d", port); 3087 mutex_exit(&ahci_portp->ahciport_mutex); 3088 ret = SATA_FAILURE; 3089 break; 3090 } 3091 3092 if (AHCI_ADDR_IS_PORT(&addr)) { 3093 ret = ahci_reset_device_reject_pkts(ahci_ctlp, 3094 ahci_portp, &addr); 3095 } else { 3096 ret = ahci_reset_pmdevice_reject_pkts(ahci_ctlp, 3097 ahci_portp, &addr); 3098 } 3099 3100 mutex_exit(&ahci_portp->ahciport_mutex); 3101 break; 3102 3103 case SATA_ADDR_CNTRL: 3104 /* Reset the whole controller */ 3105 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 3106 "reset the whole hba", instance); 3107 ret = ahci_reset_hba_reject_pkts(ahci_ctlp); 3108 break; 3109 3110 default: 3111 ret = SATA_FAILURE; 3112 } 3113 3114 return (ret); 3115 } 3116 3117 /* 3118 * Called by sata framework to activate a port as part of hotplug. 3119 * (cfgadm -c connect satax/y) 3120 * Support port multiplier. 3121 */ 3122 static int 3123 ahci_tran_hotplug_port_activate(dev_info_t *dip, sata_device_t *satadev) 3124 { 3125 ahci_ctl_t *ahci_ctlp; 3126 ahci_port_t *ahci_portp; 3127 ahci_addr_t addr; 3128 uint8_t cport = satadev->satadev_addr.cport; 3129 uint8_t pmport = satadev->satadev_addr.pmport; 3130 uint8_t port; 3131 int instance = ddi_get_instance(dip); 3132 3133 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 3134 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 3135 3136 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 3137 "ahci_tran_hotplug_port_activate enter: cport %d", cport); 3138 3139 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3140 3141 mutex_enter(&ahci_portp->ahciport_mutex); 3142 ahci_get_ahci_addr(ahci_ctlp, satadev, &addr); 3143 ASSERT(AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)); 3144 3145 if (AHCI_ADDR_IS_PORT(&addr)) { 3146 cmn_err(CE_NOTE, "!ahci%d: ahci port %d is activated", 3147 instance, port); 3148 3149 /* Enable the interrupts on the port */ 3150 ahci_enable_port_intrs(ahci_ctlp, port); 3151 3152 /* 3153 * Reset the port so that the PHY communication would be 3154 * re-established. But this reset is an internal operation 3155 * and the sata module doesn't need to know about it. 3156 * Moreover, the port with a device attached will be started 3157 * too. 3158 */ 3159 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, 3160 ahci_portp, port, 3161 AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, 3162 NULL); 3163 3164 /* 3165 * Need to check the link status and device status of the port 3166 * and consider raising power if the port was in D3 state 3167 */ 3168 ahci_portp->ahciport_port_state |= SATA_PSTATE_PWRON; 3169 ahci_portp->ahciport_port_state &= ~SATA_PSTATE_PWROFF; 3170 ahci_portp->ahciport_port_state &= ~SATA_PSTATE_SHUTDOWN; 3171 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 3172 cmn_err(CE_NOTE, "!ahci%d: ahci port %d:%d is activated", 3173 instance, port, pmport); 3174 /* AHCI_ADDR_PMPORT */ 3175 AHCIPORT_PMSTATE(ahci_portp, &addr) |= SATA_PSTATE_PWRON; 3176 AHCIPORT_PMSTATE(ahci_portp, &addr) &= 3177 ~(SATA_PSTATE_PWROFF|SATA_PSTATE_SHUTDOWN); 3178 } 3179 3180 satadev->satadev_state = ahci_portp->ahciport_port_state; 3181 3182 ahci_update_sata_registers(ahci_ctlp, port, satadev); 3183 3184 mutex_exit(&ahci_portp->ahciport_mutex); 3185 return (SATA_SUCCESS); 3186 } 3187 3188 /* 3189 * Called by sata framework to deactivate a port as part of hotplug. 3190 * (cfgadm -c disconnect satax/y) 3191 * Support port multiplier. 3192 */ 3193 static int 3194 ahci_tran_hotplug_port_deactivate(dev_info_t *dip, sata_device_t *satadev) 3195 { 3196 ahci_ctl_t *ahci_ctlp; 3197 ahci_port_t *ahci_portp; 3198 ahci_addr_t addr; 3199 uint8_t cport = satadev->satadev_addr.cport; 3200 uint8_t pmport = satadev->satadev_addr.pmport; 3201 uint8_t port; 3202 uint32_t port_scontrol; 3203 int instance = ddi_get_instance(dip); 3204 3205 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 3206 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 3207 3208 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 3209 "ahci_tran_hotplug_port_deactivate enter: cport %d", cport); 3210 3211 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3212 mutex_enter(&ahci_portp->ahciport_mutex); 3213 ahci_get_ahci_addr(ahci_ctlp, satadev, &addr); 3214 ASSERT(AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)); 3215 3216 if (AHCI_ADDR_IS_PORT(&addr)) { 3217 cmn_err(CE_NOTE, "!ahci%d: ahci port %d is deactivated", 3218 instance, port); 3219 3220 /* Disable the interrupts on the port */ 3221 ahci_disable_port_intrs(ahci_ctlp, port); 3222 3223 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) { 3224 3225 /* First to abort all the pending commands */ 3226 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 3227 3228 /* Then stop the port */ 3229 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3230 ahci_portp, port); 3231 } 3232 3233 /* Next put the PHY offline */ 3234 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3235 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 3236 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_DISABLE); 3237 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, (uint32_t *) 3238 AHCI_PORT_PxSCTL(ahci_ctlp, port), port_scontrol); 3239 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 3240 cmn_err(CE_NOTE, "!ahci%d: ahci port %d:%d is deactivated", 3241 instance, port, pmport); 3242 3243 ahci_disable_port_intrs(ahci_ctlp, port); 3244 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) 3245 != SATA_DTYPE_NONE) 3246 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 3247 3248 /* Re-enable the interrupts for the other pmports */ 3249 ahci_enable_port_intrs(ahci_ctlp, port); 3250 } 3251 3252 /* Update port state */ 3253 AHCIPORT_SET_STATE(ahci_portp, &addr, SATA_PSTATE_SHUTDOWN); 3254 satadev->satadev_state = SATA_PSTATE_SHUTDOWN; 3255 3256 ahci_update_sata_registers(ahci_ctlp, port, satadev); 3257 3258 mutex_exit(&ahci_portp->ahciport_mutex); 3259 return (SATA_SUCCESS); 3260 } 3261 3262 /* 3263 * To be used to mark all the outstanding pkts with SATA_PKT_ABORTED 3264 * when a device is unplugged or a port is deactivated. 3265 * 3266 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3267 */ 3268 static void 3269 ahci_reject_all_abort_pkts(ahci_ctl_t *ahci_ctlp, 3270 ahci_port_t *ahci_portp, uint8_t port) 3271 { 3272 uint32_t slot_status = 0; 3273 uint32_t abort_tags = 0; 3274 3275 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 3276 "ahci_reject_all_abort_pkts at port: %d", port); 3277 3278 /* Read/write port multiplier command takes highest priority */ 3279 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 3280 slot_status = 0x1; 3281 abort_tags = 0x1; 3282 goto out; 3283 } 3284 3285 /* 3286 * When AHCI_PORT_FLAG_MOPPING is set, we need to check whether a 3287 * REQUEST SENSE command or READ LOG EXT command is delivered to HBA 3288 * to get the error data, if yes when the device is removed, the 3289 * command needs to be aborted too. 3290 */ 3291 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 3292 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 3293 slot_status = 0x1; 3294 abort_tags = 0x1; 3295 goto out; 3296 } else { 3297 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3298 "ahci_reject_all_abort_pkts return directly " 3299 "port %d no needs to reject any outstanding " 3300 "commands", port); 3301 return; 3302 } 3303 } 3304 3305 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 3306 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3307 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 3308 abort_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 3309 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 3310 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3311 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 3312 abort_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 3313 } 3314 3315 out: 3316 /* No need to do mop when there is no outstanding commands */ 3317 if (slot_status != 0) { 3318 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 3319 ahci_portp->ahciport_mop_in_progress++; 3320 3321 ahci_mop_commands(ahci_ctlp, 3322 ahci_portp, 3323 slot_status, 3324 0, /* failed tags */ 3325 0, /* timeout tags */ 3326 abort_tags, /* aborting tags */ 3327 0); /* reset tags */ 3328 } 3329 } 3330 3331 #if defined(__lock_lint) 3332 static int 3333 ahci_selftest(dev_info_t *dip, sata_device_t *device) 3334 { 3335 return (SATA_SUCCESS); 3336 } 3337 #endif 3338 3339 /* 3340 * Initialize fma capabilities and register with IO fault services. 3341 */ 3342 static void 3343 ahci_fm_init(ahci_ctl_t *ahci_ctlp) 3344 { 3345 /* 3346 * Need to change iblock to priority for new MSI intr 3347 */ 3348 ddi_iblock_cookie_t fm_ibc; 3349 3350 ahci_ctlp->ahcictl_fm_cap = ddi_getprop(DDI_DEV_T_ANY, 3351 ahci_ctlp->ahcictl_dip, 3352 DDI_PROP_CANSLEEP | DDI_PROP_DONTPASS, "fm-capable", 3353 DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE | 3354 DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE); 3355 3356 /* Only register with IO Fault Services if we have some capability */ 3357 if (ahci_ctlp->ahcictl_fm_cap) { 3358 /* Adjust access and dma attributes for FMA */ 3359 accattr.devacc_attr_access = DDI_FLAGERR_ACC; 3360 buffer_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; 3361 rcvd_fis_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; 3362 cmd_list_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; 3363 cmd_table_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; 3364 3365 /* 3366 * Register capabilities with IO Fault Services. 3367 * ahcictl_fm_cap will be updated to indicate 3368 * capabilities actually supported (not requested.) 3369 */ 3370 ddi_fm_init(ahci_ctlp->ahcictl_dip, 3371 &ahci_ctlp->ahcictl_fm_cap, &fm_ibc); 3372 3373 if (ahci_ctlp->ahcictl_fm_cap == DDI_FM_NOT_CAPABLE) { 3374 cmn_err(CE_WARN, "!ahci%d: fma init failed.", 3375 ddi_get_instance(ahci_ctlp->ahcictl_dip)); 3376 return; 3377 } 3378 /* 3379 * Initialize pci ereport capabilities if ereport 3380 * capable (should always be.) 3381 */ 3382 if (DDI_FM_EREPORT_CAP(ahci_ctlp->ahcictl_fm_cap) || 3383 DDI_FM_ERRCB_CAP(ahci_ctlp->ahcictl_fm_cap)) { 3384 pci_ereport_setup(ahci_ctlp->ahcictl_dip); 3385 } 3386 3387 /* 3388 * Register error callback if error callback capable. 3389 */ 3390 if (DDI_FM_ERRCB_CAP(ahci_ctlp->ahcictl_fm_cap)) { 3391 ddi_fm_handler_register(ahci_ctlp->ahcictl_dip, 3392 ahci_fm_error_cb, (void *) ahci_ctlp); 3393 } 3394 3395 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3396 "ahci_fm_fini: fma enabled.", NULL); 3397 } 3398 } 3399 3400 /* 3401 * Releases fma capabilities and un-registers with IO fault services. 3402 */ 3403 static void 3404 ahci_fm_fini(ahci_ctl_t *ahci_ctlp) 3405 { 3406 /* Only unregister FMA capabilities if registered */ 3407 if (ahci_ctlp->ahcictl_fm_cap) { 3408 /* 3409 * Un-register error callback if error callback capable. 3410 */ 3411 if (DDI_FM_ERRCB_CAP(ahci_ctlp->ahcictl_fm_cap)) { 3412 ddi_fm_handler_unregister(ahci_ctlp->ahcictl_dip); 3413 } 3414 3415 /* 3416 * Release any resources allocated by pci_ereport_setup() 3417 */ 3418 if (DDI_FM_EREPORT_CAP(ahci_ctlp->ahcictl_fm_cap) || 3419 DDI_FM_ERRCB_CAP(ahci_ctlp->ahcictl_fm_cap)) { 3420 pci_ereport_teardown(ahci_ctlp->ahcictl_dip); 3421 } 3422 3423 /* Unregister from IO Fault Services */ 3424 ddi_fm_fini(ahci_ctlp->ahcictl_dip); 3425 3426 /* Adjust access and dma attributes for FMA */ 3427 accattr.devacc_attr_access = DDI_DEFAULT_ACC; 3428 buffer_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR; 3429 rcvd_fis_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR; 3430 cmd_list_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR; 3431 cmd_table_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR; 3432 3433 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3434 "ahci_fm_fini: fma disabled.", NULL); 3435 } 3436 } 3437 3438 /*ARGSUSED*/ 3439 static int 3440 ahci_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data) 3441 { 3442 /* 3443 * as the driver can always deal with an error in any dma or 3444 * access handle, we can just return the fme_status value. 3445 */ 3446 pci_ereport_post(dip, err, NULL); 3447 return (err->fme_status); 3448 } 3449 3450 int 3451 ahci_check_acc_handle(ddi_acc_handle_t handle) 3452 { 3453 ddi_fm_error_t de; 3454 3455 ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION); 3456 return (de.fme_status); 3457 } 3458 3459 int 3460 ahci_check_dma_handle(ddi_dma_handle_t handle) 3461 { 3462 ddi_fm_error_t de; 3463 3464 ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION); 3465 return (de.fme_status); 3466 } 3467 3468 /* 3469 * Generate an ereport 3470 */ 3471 void 3472 ahci_fm_ereport(ahci_ctl_t *ahci_ctlp, char *detail) 3473 { 3474 uint64_t ena; 3475 char buf[FM_MAX_CLASS]; 3476 3477 (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", DDI_FM_DEVICE, detail); 3478 ena = fm_ena_generate(0, FM_ENA_FMT1); 3479 if (DDI_FM_EREPORT_CAP(ahci_ctlp->ahcictl_fm_cap)) { 3480 ddi_fm_ereport_post(ahci_ctlp->ahcictl_dip, buf, ena, 3481 DDI_NOSLEEP, FM_VERSION, DATA_TYPE_UINT8, 3482 FM_EREPORT_VERSION, NULL); 3483 } 3484 } 3485 3486 /* 3487 * Check if all handles are correctly allocated. This function is only called 3488 * by ahci_attach(), so we do not need hold any mutex here. 3489 */ 3490 static int 3491 ahci_check_all_handle(ahci_ctl_t *ahci_ctlp) 3492 { 3493 int port; 3494 if (ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) { 3495 return (DDI_FAILURE); 3496 } 3497 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3498 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) 3499 continue; 3500 if (ahci_check_port_handle(ahci_ctlp, port) != DDI_SUCCESS) { 3501 return (DDI_FAILURE); 3502 } 3503 } 3504 return (DDI_SUCCESS); 3505 } 3506 3507 /* 3508 * Check the access handles for the controller. Note that 3509 * ahcictl_pci_conf_handle is only used in attach process. 3510 */ 3511 static int 3512 ahci_check_ctl_handle(ahci_ctl_t *ahci_ctlp) 3513 { 3514 if ((ahci_check_acc_handle(ahci_ctlp-> 3515 ahcictl_pci_conf_handle) != DDI_FM_OK) || 3516 (ahci_check_acc_handle(ahci_ctlp-> 3517 ahcictl_ahci_acc_handle) != DDI_FM_OK)) { 3518 return (DDI_FAILURE); 3519 } 3520 return (DDI_SUCCESS); 3521 } 3522 3523 /* 3524 * Check the DMA handles and the access handles of a controller port. 3525 * 3526 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3527 */ 3528 static int 3529 ahci_check_port_handle(ahci_ctl_t *ahci_ctlp, int port) 3530 { 3531 ahci_port_t *ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3532 int slot; 3533 if ((ahci_check_dma_handle(ahci_portp-> 3534 ahciport_rcvd_fis_dma_handle) != DDI_FM_OK) || 3535 (ahci_check_dma_handle(ahci_portp-> 3536 ahciport_cmd_list_dma_handle) != DDI_FM_OK) || 3537 (ahci_check_acc_handle(ahci_portp-> 3538 ahciport_rcvd_fis_acc_handle) != DDI_FM_OK) || 3539 (ahci_check_acc_handle(ahci_portp-> 3540 ahciport_cmd_list_acc_handle) != DDI_FM_OK)) { 3541 return (DDI_FAILURE); 3542 } 3543 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; 3544 slot ++) { 3545 if (ahci_check_slot_handle(ahci_portp, slot) 3546 != DDI_SUCCESS) { 3547 return (DDI_FAILURE); 3548 } 3549 } 3550 return (DDI_SUCCESS); 3551 } 3552 3553 /* 3554 * Check the DMA handles and the access handles of a cmd table slot. 3555 * 3556 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3557 */ 3558 static int 3559 ahci_check_slot_handle(ahci_port_t *ahci_portp, int slot) 3560 { 3561 if ((ahci_check_acc_handle(ahci_portp-> 3562 ahciport_cmd_tables_acc_handle[slot]) != DDI_FM_OK) || 3563 (ahci_check_dma_handle(ahci_portp-> 3564 ahciport_cmd_tables_dma_handle[slot]) != DDI_FM_OK)) { 3565 return (DDI_FAILURE); 3566 } 3567 return (DDI_SUCCESS); 3568 } 3569 3570 /* 3571 * Allocate the ports structure, only called by ahci_attach 3572 */ 3573 static int 3574 ahci_alloc_ports_state(ahci_ctl_t *ahci_ctlp) 3575 { 3576 int port, cport = 0; 3577 3578 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3579 "ahci_alloc_ports_state enter", NULL); 3580 3581 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3582 3583 /* Allocate structures only for the implemented ports */ 3584 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3585 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3586 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3587 "hba port %d not implemented", port); 3588 continue; 3589 } 3590 3591 ahci_ctlp->ahcictl_cport_to_port[cport] = (uint8_t)port; 3592 ahci_ctlp->ahcictl_port_to_cport[port] = 3593 (uint8_t)cport++; 3594 3595 if (ahci_alloc_port_state(ahci_ctlp, port) != AHCI_SUCCESS) { 3596 goto err_out; 3597 } 3598 } 3599 3600 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3601 return (AHCI_SUCCESS); 3602 3603 err_out: 3604 for (port--; port >= 0; port--) { 3605 if (AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3606 ahci_dealloc_port_state(ahci_ctlp, port); 3607 } 3608 } 3609 3610 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3611 return (AHCI_FAILURE); 3612 } 3613 3614 /* 3615 * Reverse of ahci_alloc_ports_state(), only called by ahci_detach 3616 */ 3617 static void 3618 ahci_dealloc_ports_state(ahci_ctl_t *ahci_ctlp) 3619 { 3620 int port; 3621 3622 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3623 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3624 /* if this port is implemented by the HBA */ 3625 if (AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) 3626 ahci_dealloc_port_state(ahci_ctlp, port); 3627 } 3628 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3629 } 3630 3631 /* 3632 * Drain the taskq. 3633 */ 3634 static void 3635 ahci_drain_ports_taskq(ahci_ctl_t *ahci_ctlp) 3636 { 3637 ahci_port_t *ahci_portp; 3638 int port; 3639 3640 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3641 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3642 continue; 3643 } 3644 3645 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3646 3647 mutex_enter(&ahci_portp->ahciport_mutex); 3648 ddi_taskq_wait(ahci_portp->ahciport_event_taskq); 3649 mutex_exit(&ahci_portp->ahciport_mutex); 3650 } 3651 } 3652 3653 /* 3654 * Initialize the controller and all ports. And then try to start the ports 3655 * if there are devices attached. 3656 * 3657 * This routine can be called from three seperate cases: DDI_ATTACH, 3658 * PM_LEVEL_D0 and DDI_RESUME. The DDI_ATTACH case is different from 3659 * other two cases; device signature probing are attempted only during 3660 * DDI_ATTACH case. 3661 * 3662 * WARNING!!! Disable the whole controller's interrupts before calling and 3663 * the interrupts will be enabled upon successfully return. 3664 */ 3665 static int 3666 ahci_initialize_controller(ahci_ctl_t *ahci_ctlp) 3667 { 3668 ahci_port_t *ahci_portp; 3669 ahci_addr_t addr; 3670 int port; 3671 3672 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3673 "ahci_initialize_controller enter", NULL); 3674 3675 /* Initialize the implemented ports and structures */ 3676 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3677 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3678 continue; 3679 } 3680 3681 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3682 mutex_enter(&ahci_portp->ahciport_mutex); 3683 3684 /* 3685 * Ensure that the controller is not in the running state 3686 * by checking every implemented port's PxCMD register 3687 */ 3688 AHCI_ADDR_SET_PORT(&addr, (uint8_t)port); 3689 3690 if (ahci_initialize_port(ahci_ctlp, ahci_portp, &addr) 3691 != AHCI_SUCCESS) { 3692 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3693 "ahci_initialize_controller: failed to " 3694 "initialize port %d", port); 3695 /* 3696 * Set the port state to SATA_PSTATE_FAILED if 3697 * failed to initialize it. 3698 */ 3699 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 3700 } 3701 3702 mutex_exit(&ahci_portp->ahciport_mutex); 3703 } 3704 3705 /* Enable the whole controller interrupts */ 3706 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3707 ahci_enable_all_intrs(ahci_ctlp); 3708 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3709 3710 return (AHCI_SUCCESS); 3711 } 3712 3713 /* 3714 * Reverse of ahci_initialize_controller() 3715 * 3716 * We only need to stop the ports and disable the interrupt. 3717 */ 3718 static void 3719 ahci_uninitialize_controller(ahci_ctl_t *ahci_ctlp) 3720 { 3721 ahci_port_t *ahci_portp; 3722 int port; 3723 3724 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3725 "ahci_uninitialize_controller enter", NULL); 3726 3727 /* disable all the interrupts. */ 3728 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3729 ahci_disable_all_intrs(ahci_ctlp); 3730 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3731 3732 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3733 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3734 continue; 3735 } 3736 3737 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3738 3739 /* Stop the port by clearing PxCMD.ST */ 3740 mutex_enter(&ahci_portp->ahciport_mutex); 3741 3742 /* 3743 * Here we must disable the port interrupt because 3744 * ahci_disable_all_intrs only clear GHC.IE, and IS 3745 * register will be still set if PxIE is enabled. 3746 * When ahci shares one IRQ with other drivers, the 3747 * intr handler may claim the intr mistakenly. 3748 */ 3749 ahci_disable_port_intrs(ahci_ctlp, port); 3750 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3751 ahci_portp, port); 3752 mutex_exit(&ahci_portp->ahciport_mutex); 3753 } 3754 } 3755 3756 /* 3757 * ahci_alloc_pmult() 3758 * 1. Setting HBA port registers which are necessary for a port multiplier. 3759 * (Set PxCMD.PMA while PxCMD.ST is '0') 3760 * 2. Allocate ahci_pmult_info structure. 3761 * 3762 * NOTE: Must stop port before the function is called. 3763 * WARNING!!! ahciport_mutex should be acquired before the function is 3764 * called. 3765 */ 3766 static void 3767 ahci_alloc_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 3768 { 3769 uint32_t port_cmd_status; 3770 uint8_t port = ahci_portp->ahciport_port_num; 3771 3772 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3773 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3774 3775 /* The port must have been stopped before. */ 3776 ASSERT(!(port_cmd_status & AHCI_CMD_STATUS_ST)); 3777 3778 if (!(port_cmd_status & AHCI_CMD_STATUS_PMA)) { 3779 /* set PMA bit */ 3780 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3781 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 3782 port_cmd_status|AHCI_CMD_STATUS_PMA); 3783 3784 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 3785 "ahci_alloc_pmult: " 3786 "PxCMD.PMA bit set at port %d.", port); 3787 } 3788 3789 /* Allocate port multiplier information structure */ 3790 if (ahci_portp->ahciport_pmult_info == NULL) { 3791 ahci_portp->ahciport_pmult_info = (ahci_pmult_info_t *) 3792 kmem_zalloc(sizeof (ahci_pmult_info_t), KM_SLEEP); 3793 } 3794 3795 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 3796 } 3797 3798 /* 3799 * ahci_dealloc_pmult() 3800 * 1. Clearing related registers when a port multiplier is detached. 3801 * (Clear PxCMD.PMA while PxCMD.ST is '0') 3802 * 2. Deallocate ahci_pmult_info structure. 3803 * 3804 * NOTE: Must stop port before the function is called. 3805 * WARNING!!! ahciport_mutex should be acquired before the function is 3806 * called. 3807 */ 3808 static void 3809 ahci_dealloc_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 3810 { 3811 uint32_t port_cmd_status; 3812 uint8_t port = ahci_portp->ahciport_port_num; 3813 3814 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3815 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3816 3817 if (port_cmd_status & AHCI_CMD_STATUS_PMA) { 3818 /* Clear PMA bit */ 3819 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3820 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 3821 (port_cmd_status & (~AHCI_CMD_STATUS_PMA))); 3822 3823 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 3824 "ahci_dealloc_pmult: " 3825 "PxCMD.PMA bit cleared at port %d.", port); 3826 } 3827 3828 /* Release port multiplier information structure */ 3829 if (ahci_portp->ahciport_pmult_info != NULL) { 3830 kmem_free(ahci_portp->ahciport_pmult_info, 3831 sizeof (ahci_pmult_info_t)); 3832 ahci_portp->ahciport_pmult_info = NULL; 3833 } 3834 } 3835 3836 /* 3837 * Staggered Spin-up. 3838 * 3839 * WARNING!!! ahciport_mutex should be acquired before the function 3840 * is called. 3841 */ 3842 static void 3843 ahci_staggered_spin_up(ahci_ctl_t *ahci_ctlp, uint8_t port) 3844 { 3845 uint32_t cap_status; 3846 uint32_t port_cmd_status; 3847 3848 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3849 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 3850 3851 /* Check for staggered spin-up support */ 3852 if (!(cap_status & AHCI_HBA_CAP_SSS)) 3853 return; 3854 3855 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3856 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3857 3858 /* If PxCMD.SUD == 1, no staggered spin-up is needed */ 3859 if (port_cmd_status & AHCI_CMD_STATUS_SUD) 3860 return; 3861 3862 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "Spin-up at port %d", port); 3863 3864 /* Set PxCMD.SUD */ 3865 port_cmd_status |= AHCI_CMD_STATUS_SUD; 3866 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3867 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 3868 port_cmd_status); 3869 } 3870 3871 /* 3872 * The routine is to initialize a port. First put the port in NOTRunning 3873 * state, then enable port interrupt and clear Serror register. And under 3874 * AHCI_ATTACH case, find device signature and then try to start the port. 3875 * 3876 * Called by 3877 * 1. ahci_initialize_controller 3878 * 2. ahci_intr_phyrdy_change (hotplug) 3879 * 3880 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3881 */ 3882 static int 3883 ahci_initialize_port(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 3884 ahci_addr_t *addrp) 3885 { 3886 uint32_t port_sstatus, port_task_file, port_cmd_status; 3887 uint8_t port = addrp->aa_port; 3888 boolean_t resuming = B_TRUE; /* processing DDI_RESUME */ 3889 int ret; 3890 3891 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 3892 3893 /* AHCI_ADDR_PORT: We've no idea of the attached device here. */ 3894 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 3895 3896 /* 3897 * At the time being, only probe ports/devices and get the types of 3898 * attached devices during DDI_ATTACH. In fact, the device can be 3899 * changed during power state changes, but at the time being, we 3900 * don't support the situation. 3901 */ 3902 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) { 3903 resuming = B_FALSE; 3904 } else { 3905 /* check for DDI_RESUME case */ 3906 mutex_exit(&ahci_portp->ahciport_mutex); 3907 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3908 if (ahci_ctlp->ahcictl_flags & AHCI_ATTACH) 3909 resuming = B_FALSE; 3910 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3911 mutex_enter(&ahci_portp->ahciport_mutex); 3912 } 3913 3914 if (resuming) { 3915 /* 3916 * During the resume, we need to set the PxCLB, PxCLBU, PxFB 3917 * and PxFBU registers in case these registers were cleared 3918 * during the suspend. 3919 */ 3920 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3921 "ahci_initialize_port: port %d " 3922 "set PxCLB, PxCLBU, PxFB and PxFBU " 3923 "during resume", port); 3924 3925 if (ahci_setup_port_base_addresses(ahci_ctlp, ahci_portp) != 3926 AHCI_SUCCESS) 3927 return (AHCI_FAILURE); 3928 } 3929 3930 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3931 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3932 3933 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3934 "ahci_initialize_port: port %d ", port); 3935 3936 /* 3937 * Check whether the port is in NotRunning state, if not, 3938 * put the port in NotRunning state 3939 */ 3940 if (port_cmd_status & 3941 (AHCI_CMD_STATUS_ST | 3942 AHCI_CMD_STATUS_CR | 3943 AHCI_CMD_STATUS_FRE | 3944 AHCI_CMD_STATUS_FR)) { 3945 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3946 ahci_portp, port); 3947 } 3948 3949 /* Make sure the drive is spun-up */ 3950 ahci_staggered_spin_up(ahci_ctlp, port); 3951 3952 /* Disable interrupt */ 3953 ahci_disable_port_intrs(ahci_ctlp, port); 3954 3955 /* Device is unknown at first */ 3956 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 3957 3958 /* Disable the interface power management */ 3959 ahci_disable_interface_pm(ahci_ctlp, port); 3960 3961 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3962 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 3963 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3964 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 3965 3966 /* Check physcial link status */ 3967 if (SSTATUS_GET_IPM(port_sstatus) == SSTATUS_IPM_NODEV_NOPHYCOM || 3968 SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_NOPHYCOM || 3969 3970 /* Check interface status */ 3971 port_task_file & AHCI_TFD_STS_BSY || 3972 port_task_file & AHCI_TFD_STS_DRQ || 3973 3974 /* Check whether port reset must be executed */ 3975 ahci_ctlp->ahcictl_cap & AHCI_CAP_INIT_PORT_RESET || 3976 3977 /* Always reset port on RESUME */ 3978 resuming != B_FALSE) { 3979 3980 /* Something went wrong, we need do some reset things */ 3981 ret = ahci_port_reset(ahci_ctlp, ahci_portp, addrp); 3982 3983 /* Does port reset succeed on HBA port? */ 3984 if (ret != AHCI_SUCCESS) { 3985 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 3986 "ahci_initialize_port:" 3987 "port reset failed at port %d", port); 3988 return (AHCI_FAILURE); 3989 } 3990 3991 /* Is port failed? */ 3992 if (AHCIPORT_GET_STATE(ahci_portp, addrp) & 3993 SATA_PSTATE_FAILED) { 3994 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 3995 "ahci_initialize_port: port %d state 0x%x", 3996 port, ahci_portp->ahciport_port_state); 3997 return (AHCI_FAILURE); 3998 } 3999 } 4000 4001 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_READY); 4002 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "port %d is ready now.", port); 4003 4004 /* 4005 * Try to get the device signature if the port is not empty. 4006 */ 4007 if (!resuming && AHCIPORT_DEV_TYPE(ahci_portp, addrp) != 4008 SATA_DTYPE_NONE) 4009 ahci_find_dev_signature(ahci_ctlp, ahci_portp, addrp); 4010 4011 /* Return directly if no device connected */ 4012 if (AHCIPORT_DEV_TYPE(ahci_portp, addrp) == SATA_DTYPE_NONE) { 4013 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4014 "No device connected to port %d", port); 4015 goto out; 4016 } 4017 4018 /* If this is a port multiplier, we need do some initialization */ 4019 if (AHCIPORT_DEV_TYPE(ahci_portp, addrp) == SATA_DTYPE_PMULT) { 4020 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4021 "Port multiplier found at port %d", port); 4022 ahci_alloc_pmult(ahci_ctlp, ahci_portp); 4023 } 4024 4025 /* Try to start the port */ 4026 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 4027 != AHCI_SUCCESS) { 4028 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4029 "failed to start port %d", port); 4030 return (AHCI_FAILURE); 4031 } 4032 out: 4033 /* Enable port interrupts */ 4034 ahci_enable_port_intrs(ahci_ctlp, port); 4035 4036 return (AHCI_SUCCESS); 4037 } 4038 4039 /* 4040 * Handle hardware defect, and check the capabilities. For example, 4041 * power management capabilty and MSI capability. 4042 */ 4043 static int 4044 ahci_config_space_init(ahci_ctl_t *ahci_ctlp) 4045 { 4046 ushort_t caps_ptr, cap_count, cap; 4047 #if AHCI_DEBUG 4048 ushort_t pmcap, pmcsr; 4049 ushort_t msimc; 4050 #endif 4051 uint8_t revision; 4052 4053 ahci_ctlp->ahcictl_venid = 4054 pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 4055 PCI_CONF_VENID); 4056 4057 ahci_ctlp->ahcictl_devid = 4058 pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 4059 PCI_CONF_DEVID); 4060 4061 /* 4062 * Modify dma_attr_align of ahcictl_buffer_dma_attr. For VT8251, those 4063 * controllers with 0x00 revision id work on 4-byte aligned buffer, 4064 * which is a bug and was fixed after 0x00 revision id controllers. 4065 * 4066 * Moreover, VT8251 cannot use multiple command slots in the command 4067 * list for non-queued commands because the previous register content 4068 * of PxCI can be re-written in the register write, so a flag will be 4069 * set to record this defect - AHCI_CAP_NO_MCMDLIST_NONQUEUE. 4070 * 4071 * For VT8251, software reset also has the same defect as the below 4072 * AMD/ATI chipset. That is, software reset will get failed if 0xf 4073 * is filled in pmport field. Therefore, another software reset need 4074 * to be done with 0 filled in pmport field. 4075 */ 4076 if (ahci_ctlp->ahcictl_venid == VIA_VENID) { 4077 revision = pci_config_get8(ahci_ctlp->ahcictl_pci_conf_handle, 4078 PCI_CONF_REVID); 4079 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4080 "revision id = 0x%x", revision); 4081 if (revision == 0x00) { 4082 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_align = 0x4; 4083 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4084 "change ddi_attr_align to 0x4", NULL); 4085 } 4086 4087 ahci_ctlp->ahcictl_cap |= AHCI_CAP_NO_MCMDLIST_NONQUEUE; 4088 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4089 "VT8251 cannot use multiple command lists for " 4090 "non-queued commands", NULL); 4091 4092 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT; 4093 } 4094 4095 /* 4096 * AMD/ATI SB600 (0x1002,0x4380) AHCI chipset doesn't support 64-bit 4097 * DMA addressing for communication memory descriptors though S64A bit 4098 * of CAP register declares it supports. Even though 64-bit DMA for 4099 * data buffer works on ASUS M2A-VM with newer BIOS, three other 4100 * motherboards are known not, so both AHCI_CAP_BUF_32BIT_DMA and 4101 * AHCI_CAP_COMMU_32BIT_DMA are set for this controller. 4102 * 4103 * Due to certain hardware issue, the chipset must do port reset during 4104 * initialization, otherwise, when retrieving device signature, 4105 * software reset will get time out. So AHCI_CAP_INIT_PORT_RESET flag 4106 * need to set. 4107 * 4108 * For this chipset software reset will get failure if the pmport of 4109 * Register FIS was set with SATA_PMULT_HOSTPORT (0xf) and no port 4110 * multiplier is connected to the port. In order to fix the issue, 4111 * AHCI_CAP_SRST_NO_HOSTPORT flag need to be set, and once software 4112 * reset got failure, the driver will try to do another software reset 4113 * with pmport 0. 4114 */ 4115 if (ahci_ctlp->ahcictl_venid == 0x1002 && 4116 ahci_ctlp->ahcictl_devid == 0x4380) { 4117 ahci_ctlp->ahcictl_cap |= AHCI_CAP_BUF_32BIT_DMA; 4118 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 4119 ahci_ctlp->ahcictl_cap |= AHCI_CAP_INIT_PORT_RESET; 4120 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT; 4121 4122 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4123 "ATI SB600 cannot do 64-bit DMA for both data buffer and " 4124 "communication memory descriptors though CAP indicates " 4125 "support, so force it to use 32-bit DMA", NULL); 4126 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4127 "ATI SB600 need to do a port reset during initialization", 4128 NULL); 4129 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4130 "ATI SB600 will get software reset failure if pmport " 4131 "is set 0xf and no port multiplier is attached", NULL); 4132 } 4133 4134 /* 4135 * AMD/ATI SB700/710/750/800 and SP5100 AHCI chipset share the same 4136 * vendor ID and device ID (0x1002,0x4391). 4137 * 4138 * SB700/750 AHCI chipset on some boards doesn't support 64-bit 4139 * DMA addressing for communication memory descriptors though S64A bit 4140 * of CAP register declares the support. However, it does support 4141 * 64-bit DMA for data buffer. So only AHCI_CAP_COMMU_32BIT_DMA is 4142 * set for this controller. 4143 * 4144 * SB710 has the same initialization issue as SB600, so it also need 4145 * a port reset. That is AHCI_CAP_INIT_PORT_RESET need to set for it. 4146 * 4147 * SB700 also has the same issue about software reset, and thus 4148 * AHCI_CAP_SRST_NO_HOSTPORT flag also is needed. 4149 */ 4150 if (ahci_ctlp->ahcictl_venid == 0x1002 && 4151 ahci_ctlp->ahcictl_devid == 0x4391) { 4152 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 4153 ahci_ctlp->ahcictl_cap |= AHCI_CAP_INIT_PORT_RESET; 4154 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT; 4155 4156 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4157 "ATI SB700/750 cannot do 64-bit DMA for communication " 4158 "memory descriptors though CAP indicates support, " 4159 "so force it to use 32-bit DMA", NULL); 4160 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4161 "ATI SB710 need to do a port reset during initialization", 4162 NULL); 4163 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4164 "ATI SB700 will get software reset failure if pmport " 4165 "is set 0xf and no port multiplier is attached", NULL); 4166 } 4167 4168 /* 4169 * Check if capabilities list is supported and if so, 4170 * get initial capabilities pointer and clear bits 0,1. 4171 */ 4172 if (pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 4173 PCI_CONF_STAT) & PCI_STAT_CAP) { 4174 caps_ptr = P2ALIGN(pci_config_get8( 4175 ahci_ctlp->ahcictl_pci_conf_handle, 4176 PCI_CONF_CAP_PTR), 4); 4177 } else { 4178 caps_ptr = PCI_CAP_NEXT_PTR_NULL; 4179 } 4180 4181 /* 4182 * Walk capabilities if supported. 4183 */ 4184 for (cap_count = 0; caps_ptr != PCI_CAP_NEXT_PTR_NULL; ) { 4185 4186 /* 4187 * Check that we haven't exceeded the maximum number of 4188 * capabilities and that the pointer is in a valid range. 4189 */ 4190 if (++cap_count > PCI_CAP_MAX_PTR) { 4191 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4192 "too many device capabilities", NULL); 4193 return (AHCI_FAILURE); 4194 } 4195 if (caps_ptr < PCI_CAP_PTR_OFF) { 4196 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4197 "capabilities pointer 0x%x out of range", 4198 caps_ptr); 4199 return (AHCI_FAILURE); 4200 } 4201 4202 /* 4203 * Get next capability and check that it is valid. 4204 * For now, we only support power management. 4205 */ 4206 cap = pci_config_get8(ahci_ctlp->ahcictl_pci_conf_handle, 4207 caps_ptr); 4208 switch (cap) { 4209 case PCI_CAP_ID_PM: 4210 4211 /* power management supported */ 4212 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PM; 4213 4214 /* Save PMCSR offset */ 4215 ahci_ctlp->ahcictl_pmcsr_offset = caps_ptr + PCI_PMCSR; 4216 4217 #if AHCI_DEBUG 4218 pmcap = pci_config_get16( 4219 ahci_ctlp->ahcictl_pci_conf_handle, 4220 caps_ptr + PCI_PMCAP); 4221 pmcsr = pci_config_get16( 4222 ahci_ctlp->ahcictl_pci_conf_handle, 4223 ahci_ctlp->ahcictl_pmcsr_offset); 4224 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4225 "Power Management capability found PCI_PMCAP " 4226 "= 0x%x PCI_PMCSR = 0x%x", pmcap, pmcsr); 4227 if ((pmcap & 0x3) == 0x3) 4228 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4229 "PCI Power Management Interface " 4230 "spec 1.2 compliant", NULL); 4231 #endif 4232 break; 4233 4234 case PCI_CAP_ID_MSI: 4235 #if AHCI_DEBUG 4236 msimc = pci_config_get16( 4237 ahci_ctlp->ahcictl_pci_conf_handle, 4238 caps_ptr + PCI_MSI_CTRL); 4239 AHCIDBG(AHCIDBG_MSI, ahci_ctlp, 4240 "Message Signaled Interrupt capability found " 4241 "MSICAP_MC.MMC = 0x%x", (msimc & 0xe) >> 1); 4242 #endif 4243 AHCIDBG(AHCIDBG_MSI, ahci_ctlp, 4244 "MSI capability found", NULL); 4245 break; 4246 4247 case PCI_CAP_ID_PCIX: 4248 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4249 "PCI-X capability found", NULL); 4250 break; 4251 4252 case PCI_CAP_ID_PCI_E: 4253 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4254 "PCI Express capability found", NULL); 4255 break; 4256 4257 case PCI_CAP_ID_MSI_X: 4258 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4259 "MSI-X capability found", NULL); 4260 break; 4261 4262 case PCI_CAP_ID_SATA: 4263 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4264 "SATA capability found", NULL); 4265 break; 4266 4267 case PCI_CAP_ID_VS: 4268 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4269 "Vendor Specific capability found", NULL); 4270 break; 4271 4272 default: 4273 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4274 "unrecognized capability 0x%x", cap); 4275 break; 4276 } 4277 4278 /* 4279 * Get next capabilities pointer and clear bits 0,1. 4280 */ 4281 caps_ptr = P2ALIGN(pci_config_get8( 4282 ahci_ctlp->ahcictl_pci_conf_handle, 4283 (caps_ptr + PCI_CAP_NEXT_PTR)), 4); 4284 } 4285 4286 return (AHCI_SUCCESS); 4287 } 4288 4289 /* 4290 * Read/Write a register at port multiplier by SATA READ PORTMULT / SATA WRITE 4291 * PORTMULT command. SYNC & POLLING mode is used. 4292 * 4293 * WARNING!!! ahciport_mutex should be acquired before the function 4294 * is called. 4295 */ 4296 static int 4297 ahci_rdwr_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4298 uint8_t regn, uint32_t *pregv, uint8_t type) 4299 { 4300 ahci_port_t *ahci_portp; 4301 ahci_addr_t pmult_addr; 4302 sata_pkt_t *spkt; 4303 sata_cmd_t *scmd; 4304 sata_device_t sata_device; 4305 uint8_t port = addrp->aa_port; 4306 uint8_t pmport = addrp->aa_pmport; 4307 uint8_t cport; 4308 uint32_t intr_mask; 4309 int rval; 4310 char portstr[10]; 4311 4312 SET_PORTSTR(portstr, addrp); 4313 cport = ahci_ctlp->ahcictl_port_to_cport[port]; 4314 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 4315 4316 ASSERT(AHCI_ADDR_IS_PMPORT(addrp) || AHCI_ADDR_IS_PMULT(addrp)); 4317 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 4318 4319 /* Check the existence of the port multiplier */ 4320 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) 4321 return (AHCI_FAILURE); 4322 4323 /* Request a READ/WRITE PORTMULT sata packet. */ 4324 bzero(&sata_device, sizeof (sata_device_t)); 4325 sata_device.satadev_addr.cport = cport; 4326 sata_device.satadev_addr.pmport = pmport; 4327 sata_device.satadev_addr.qual = SATA_ADDR_PMULT; 4328 sata_device.satadev_rev = SATA_DEVICE_REV; 4329 4330 /* 4331 * Make sure no command is outstanding here. All R/W PMULT requests 4332 * come from 4333 * 4334 * 1. ahci_attach() 4335 * The port should be empty. 4336 * 4337 * 2. ahci_tran_probe_port() 4338 * Any request from SATA framework (via ahci_tran_start) should be 4339 * rejected if R/W PMULT command is outstanding. 4340 * 4341 * If we are doing mopping, do not check those flags because no 4342 * command will be actually outstanding. 4343 * 4344 * If the port has been occupied by any other commands, the probe 4345 * function will return a SATA_RETRY. SATA framework will retry 4346 * later. 4347 */ 4348 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 4349 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4350 "R/W PMULT failed: R/W PMULT in progress at port %d.", 4351 port, ahci_portp->ahciport_flags); 4352 return (AHCI_FAILURE); 4353 } 4354 4355 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) && ( 4356 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 4357 NCQ_CMD_IN_PROGRESS(ahci_portp) || 4358 NON_NCQ_CMD_IN_PROGRESS(ahci_portp))) { 4359 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4360 "R/W PMULT failed: port %d is occupied (flags 0x%x).", 4361 port, ahci_portp->ahciport_flags); 4362 return (AHCI_FAILURE); 4363 } 4364 4365 /* 4366 * The port multiplier is gone. This may happen when 4367 * 1. Cutting off the power of an enclosure. The device lose the power 4368 * before port multiplier. 4369 * 2. Disconnecting the port multiplier during hot-plugging a sub-drive. 4370 * 4371 * The issued command should be aborted and the following command 4372 * should not be continued. 4373 */ 4374 if (!(ahci_portp->ahciport_port_state & SATA_STATE_READY)) { 4375 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4376 "READ/WRITE PMULT failed: " 4377 "port-mult is removed from port %d", port); 4378 return (AHCI_FAILURE); 4379 } 4380 4381 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RDWR_PMULT; 4382 4383 spkt = sata_get_rdwr_pmult_pkt(ahci_ctlp->ahcictl_dip, 4384 &sata_device, regn, *pregv, type); 4385 4386 /* 4387 * READ/WRITE PORTMULT command is intended to sent to the control port 4388 * of the port multiplier. 4389 */ 4390 AHCI_ADDR_SET_PMULT(&pmult_addr, addrp->aa_port); 4391 4392 ahci_portp->ahciport_rdwr_pmult_pkt = spkt; 4393 4394 /* No interrupt here. Store the interrupt enable mask. */ 4395 intr_mask = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4396 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port)); 4397 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4398 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 0); 4399 4400 rval = ahci_do_sync_start(ahci_ctlp, ahci_portp, &pmult_addr, spkt); 4401 4402 if (rval == AHCI_SUCCESS && 4403 spkt->satapkt_reason == SATA_PKT_COMPLETED) { 4404 if (type == SATA_RDWR_PMULT_PKT_TYPE_READ) { 4405 scmd = &spkt->satapkt_cmd; 4406 *pregv = scmd->satacmd_lba_high_lsb << 24 | 4407 scmd->satacmd_lba_mid_lsb << 16 | 4408 scmd->satacmd_lba_low_lsb << 8 | 4409 scmd->satacmd_sec_count_lsb; 4410 } 4411 } else { 4412 /* Failed or not completed. */ 4413 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4414 "ahci_rdwr_pmult: cannot [%s] %s[%d] at port %s", 4415 type == SATA_RDWR_PMULT_PKT_TYPE_READ?"Read":"Write", 4416 AHCI_ADDR_IS_PMULT(addrp)?"gscr":"pscr", regn, portstr); 4417 rval = AHCI_FAILURE; 4418 } 4419 out: 4420 /* Restore the interrupt mask */ 4421 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4422 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), intr_mask); 4423 4424 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_RDWR_PMULT; 4425 ahci_portp->ahciport_rdwr_pmult_pkt = NULL; 4426 sata_free_rdwr_pmult_pkt(spkt); 4427 return (rval); 4428 } 4429 4430 static int 4431 ahci_read_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4432 uint8_t regn, uint32_t *pregv) 4433 { 4434 return ahci_rdwr_pmult(ahci_ctlp, addrp, regn, pregv, 4435 SATA_RDWR_PMULT_PKT_TYPE_READ); 4436 } 4437 4438 static int 4439 ahci_write_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4440 uint8_t regn, uint32_t regv) 4441 { 4442 return ahci_rdwr_pmult(ahci_ctlp, addrp, regn, ®v, 4443 SATA_RDWR_PMULT_PKT_TYPE_WRITE); 4444 } 4445 4446 #define READ_PMULT(addrp, r, pv, out) \ 4447 if (ahci_read_pmult(ahci_ctlp, addrp, r, pv) != AHCI_SUCCESS) \ 4448 goto out; 4449 4450 #define WRITE_PMULT(addrp, r, v, out) \ 4451 if (ahci_write_pmult(ahci_ctlp, addrp, r, v) != AHCI_SUCCESS) \ 4452 goto out; 4453 4454 /* 4455 * Update sata registers on port multiplier, including GSCR/PSCR registers. 4456 * ahci_update_pmult_gscr() 4457 * ahci_update_pmult_pscr() 4458 * 4459 * WARNING!!! ahciport_mutex should be acquired before those functions 4460 * get called. 4461 */ 4462 static int 4463 ahci_update_pmult_gscr(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4464 sata_pmult_gscr_t *sg) 4465 { 4466 READ_PMULT(addrp, SATA_PMULT_GSCR0, &sg->gscr0, err); 4467 READ_PMULT(addrp, SATA_PMULT_GSCR1, &sg->gscr1, err); 4468 READ_PMULT(addrp, SATA_PMULT_GSCR2, &sg->gscr2, err); 4469 READ_PMULT(addrp, SATA_PMULT_GSCR64, &sg->gscr64, err); 4470 4471 return (AHCI_SUCCESS); 4472 4473 err: /* R/W PMULT error */ 4474 return (AHCI_FAILURE); 4475 } 4476 4477 static int 4478 ahci_update_pmult_pscr(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4479 sata_device_t *sd) 4480 { 4481 ASSERT(AHCI_ADDR_IS_PMPORT(addrp)); 4482 4483 READ_PMULT(addrp, SATA_PMULT_REG_SSTS, &sd->satadev_scr.sstatus, err); 4484 READ_PMULT(addrp, SATA_PMULT_REG_SERR, &sd->satadev_scr.serror, err); 4485 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &sd->satadev_scr.scontrol, err); 4486 READ_PMULT(addrp, SATA_PMULT_REG_SACT, &sd->satadev_scr.sactive, err); 4487 4488 return (AHCI_SUCCESS); 4489 4490 err: /* R/W PMULT error */ 4491 return (AHCI_FAILURE); 4492 } 4493 4494 /* 4495 * ahci_initialize_pmult() 4496 * 4497 * Initialize a port multiplier, including 4498 * 1. Enable FEATURES register at port multiplier. (SATA Chp.16) 4499 * 2. Redefine MASK register. (SATA Chap 16.?) 4500 * 4501 * WARNING!!! ahciport_mutex should be acquired before the function 4502 * is called. 4503 */ 4504 static int 4505 ahci_initialize_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4506 ahci_addr_t *addrp, sata_device_t *sd) 4507 { 4508 sata_pmult_gscr_t sg; 4509 uint32_t gscr64; 4510 uint8_t port = addrp->aa_port; 4511 4512 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 4513 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4514 "[Initialize] Port-multiplier at port %d.", port); 4515 4516 /* 4517 * Enable features of port multiplier. Currently only 4518 * Asynchronous Notification is enabled. 4519 */ 4520 /* Check gscr64 for supported features. */ 4521 READ_PMULT(addrp, SATA_PMULT_GSCR64, &gscr64, err); 4522 4523 if (gscr64 & SATA_PMULT_CAP_SNOTIF) { 4524 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4525 "port %d: Port Multiplier supports " 4526 "Asynchronous Notification.", port); 4527 4528 /* Write to gscr96 to enabled features */ 4529 WRITE_PMULT(addrp, SATA_PMULT_GSCR96, 4530 SATA_PMULT_CAP_SNOTIF, err); 4531 4532 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4533 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 4534 AHCI_SNOTIF_CLEAR_ALL); 4535 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4536 "port %d: PMult PxSNTF cleared.", port); 4537 4538 } 4539 4540 /* 4541 * Now we need to update gscr33 register to enable hot-plug interrupt 4542 * for sub devices behind port multiplier. 4543 */ 4544 WRITE_PMULT(addrp, SATA_PMULT_GSCR33, (0x1ffff), err); 4545 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4546 "port %d: gscr33 mask set to %x.", port, (0x1ffff)); 4547 4548 /* 4549 * Fetch the number of device ports of the port multiplier 4550 */ 4551 if (ahci_update_pmult_gscr(ahci_ctlp, addrp, &sg) != AHCI_SUCCESS) 4552 return (AHCI_FAILURE); 4553 4554 /* Register the port multiplier to SATA Framework. */ 4555 mutex_exit(&ahci_portp->ahciport_mutex); 4556 sata_register_pmult(ahci_ctlp->ahcictl_dip, sd, &sg); 4557 mutex_enter(&ahci_portp->ahciport_mutex); 4558 4559 ahci_portp->ahciport_pmult_info->ahcipmi_num_dev_ports = 4560 sd->satadev_add_info & SATA_PMULT_PORTNUM_MASK; 4561 4562 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4563 "port %d: pmult sub-port number updated to %x.", port, 4564 ahci_portp->ahciport_pmult_info->ahcipmi_num_dev_ports); 4565 4566 /* Till now port-mult is successfully initialized */ 4567 ahci_portp->ahciport_port_state |= SATA_DSTATE_PMULT_INIT; 4568 return (AHCI_SUCCESS); 4569 4570 err: /* R/W PMULT error */ 4571 return (AHCI_FAILURE); 4572 } 4573 4574 /* 4575 * Initialize a port multiplier port. According to spec, firstly we need 4576 * issue a COMRESET, then a software reset to get its signature. 4577 * 4578 * NOTE: This function should only be called in ahci_probe_pmport() 4579 * WARNING!!! ahciport_mutex should be acquired before the function. 4580 */ 4581 static int 4582 ahci_initialize_pmport(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4583 ahci_addr_t *addrp) 4584 { 4585 uint32_t finished_tags = 0, reset_tags = 0, slot_status = 0; 4586 uint8_t port = addrp->aa_port; 4587 uint8_t pmport = addrp->aa_pmport; 4588 int ret = AHCI_FAILURE; 4589 4590 ASSERT(AHCI_ADDR_IS_PMPORT(addrp)); 4591 4592 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 4593 "ahci_initialize_pmport: port %d:%d", port, pmport); 4594 4595 /* Check HBA port state */ 4596 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED) { 4597 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 4598 "ahci_initialize_pmport:" 4599 "port %d:%d Port Multiplier is failed.", 4600 port, pmport); 4601 return (AHCI_FAILURE); 4602 } 4603 4604 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) { 4605 return (AHCI_FAILURE); 4606 } 4607 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_HOTPLUG; 4608 4609 /* Checking for outstanding commands */ 4610 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 4611 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4612 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 4613 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 4614 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 4615 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4616 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 4617 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 4618 } 4619 4620 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 4621 ahci_portp->ahciport_mop_in_progress++; 4622 4623 /* Clear status */ 4624 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_UNKNOWN); 4625 4626 /* Firstly assume an unknown device */ 4627 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 4628 4629 ahci_disable_port_intrs(ahci_ctlp, port); 4630 4631 /* port reset is necessary for port multiplier port */ 4632 if (ahci_pmport_reset(ahci_ctlp, ahci_portp, addrp) != AHCI_SUCCESS) { 4633 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 4634 "ahci_initialize_pmport:" 4635 "port reset failed at port %d:%d", 4636 port, pmport); 4637 goto out; 4638 } 4639 4640 /* Is port failed? */ 4641 if (AHCIPORT_GET_STATE(ahci_portp, addrp) & 4642 SATA_PSTATE_FAILED) { 4643 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4644 "ahci_initialize_pmport: port %d:%d failed. " 4645 "state = 0x%x", port, pmport, 4646 ahci_portp->ahciport_port_state); 4647 goto out; 4648 } 4649 4650 /* Is there any device attached? */ 4651 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, addrp) 4652 == SATA_DTYPE_NONE) { 4653 /* Do not waste time on an empty port */ 4654 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 4655 "ahci_initialize_pmport: No device is found " 4656 "at port %d:%d", port, pmport); 4657 ret = AHCI_SUCCESS; 4658 goto out; 4659 } 4660 4661 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_READY); 4662 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4663 "port %d:%d is ready now.", port, pmport); 4664 4665 /* 4666 * Till now we can assure a device attached to that HBA port and work 4667 * correctly. Now try to get the device signature. This is an optional 4668 * step. If failed, unknown device is assumed, then SATA module will 4669 * continue to use IDENTIFY DEVICE to get the information of the 4670 * device. 4671 */ 4672 ahci_find_dev_signature(ahci_ctlp, ahci_portp, addrp); 4673 4674 ret = AHCI_SUCCESS; 4675 4676 out: 4677 /* Next try to mop the pending commands */ 4678 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 4679 finished_tags = ahci_portp->ahciport_pending_tags & 4680 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 4681 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 4682 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 4683 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 4684 reset_tags &= ~finished_tags; 4685 4686 ahci_mop_commands(ahci_ctlp, 4687 ahci_portp, 4688 slot_status, 4689 0, /* failed tags */ 4690 0, /* timeout tags */ 4691 0, /* aborted tags */ 4692 reset_tags); /* reset tags */ 4693 4694 /* Clear PxSNTF register if supported. */ 4695 if (ahci_ctlp->ahcictl_cap & AHCI_CAP_SNTF) { 4696 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4697 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 4698 AHCI_SNOTIF_CLEAR_ALL); 4699 } 4700 4701 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_HOTPLUG; 4702 ahci_enable_port_intrs(ahci_ctlp, port); 4703 return (ret); 4704 } 4705 4706 /* 4707 * ahci_probe_pmult() 4708 * 4709 * This function will be called to probe a port multiplier, which will 4710 * handle hotplug events on port multiplier ports. 4711 * 4712 * NOTE: Only called from ahci_tran_probe_port() 4713 * WARNING!!! ahciport_mutex should be acquired before the function is called. 4714 */ 4715 static int 4716 ahci_probe_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4717 ahci_addr_t *addrp) 4718 { 4719 sata_device_t sdevice; 4720 ahci_addr_t pmport_addr; 4721 uint32_t gscr32, port_hotplug_tags; 4722 uint32_t pmport_sstatus; 4723 int dev_exists_now = 0, dev_existed_previously = 0; 4724 uint8_t port = addrp->aa_port; 4725 int npmport; 4726 4727 /* The bits in GSCR32 refers to the pmport that has a hot-plug event. */ 4728 READ_PMULT(addrp, SATA_PMULT_GSCR32, &gscr32, err); 4729 port_hotplug_tags = gscr32 & AHCI_PMPORT_MASK(ahci_portp); 4730 4731 do { 4732 npmport = ddi_ffs(port_hotplug_tags) - 1; 4733 if (npmport == -1) 4734 /* no pending hot plug events. */ 4735 return (AHCI_SUCCESS); 4736 4737 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4738 "hot-plug event at port %d:%d", port, npmport); 4739 4740 AHCI_ADDR_SET_PMPORT(&pmport_addr, port, (uint8_t)npmport); 4741 4742 /* Check previous device at that port */ 4743 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &pmport_addr) 4744 != SATA_DTYPE_NONE) 4745 dev_existed_previously = 1; 4746 4747 /* PxSStatus tells the presence of device. */ 4748 READ_PMULT(&pmport_addr, SATA_PMULT_REG_SSTS, 4749 &pmport_sstatus, err); 4750 4751 if (SSTATUS_GET_DET(pmport_sstatus) == 4752 SSTATUS_DET_DEVPRE_PHYCOM) 4753 dev_exists_now = 1; 4754 4755 /* 4756 * Clear PxSERR is critical. The transition from 0 to 1 will 4757 * emit a FIS which generates an asynchronous notification 4758 * event at controller. If we fail to clear the PxSERR, the 4759 * Async Notif events will no longer be activated on this 4760 * pmport. 4761 */ 4762 WRITE_PMULT(&pmport_addr, SATA_PMULT_REG_SERR, 4763 AHCI_SERROR_CLEAR_ALL, err); 4764 4765 bzero((void *)&sdevice, sizeof (sata_device_t)); 4766 sdevice.satadev_addr.cport = ahci_ctlp-> 4767 ahcictl_port_to_cport[port]; 4768 sdevice.satadev_addr.qual = SATA_ADDR_PMPORT; 4769 sdevice.satadev_addr.pmport = (uint8_t)npmport; 4770 sdevice.satadev_state = SATA_PSTATE_PWRON; 4771 4772 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4773 "[Existence] %d -> %d", dev_existed_previously, 4774 dev_exists_now); 4775 4776 if (dev_exists_now) { 4777 if (dev_existed_previously) { 4778 /* Link (may) not change: Exist -> Exist * */ 4779 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 4780 "ahci_probe_pmult: port %d:%d " 4781 "device link lost/established", 4782 port, npmport); 4783 4784 mutex_exit(&ahci_portp->ahciport_mutex); 4785 sata_hba_event_notify( 4786 ahci_ctlp->ahcictl_sata_hba_tran-> 4787 sata_tran_hba_dip, 4788 &sdevice, 4789 SATA_EVNT_LINK_LOST| 4790 SATA_EVNT_LINK_ESTABLISHED); 4791 mutex_enter(&ahci_portp->ahciport_mutex); 4792 } else { 4793 /* Link change: None -> Exist */ 4794 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4795 "ahci_probe_pmult: port %d:%d " 4796 "device link established", port, npmport); 4797 4798 /* Clear port state */ 4799 AHCIPORT_SET_STATE(ahci_portp, &pmport_addr, 4800 SATA_STATE_UNKNOWN); 4801 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4802 "ahci_probe_pmult: port %d " 4803 "ahciport_port_state [Cleared].", port); 4804 4805 mutex_exit(&ahci_portp->ahciport_mutex); 4806 sata_hba_event_notify( 4807 ahci_ctlp->ahcictl_sata_hba_tran-> 4808 sata_tran_hba_dip, 4809 &sdevice, 4810 SATA_EVNT_LINK_ESTABLISHED); 4811 mutex_enter(&ahci_portp->ahciport_mutex); 4812 } 4813 } else { /* No device exists now */ 4814 if (dev_existed_previously) { 4815 4816 /* Link change: Exist -> None */ 4817 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4818 "ahci_probe_pmult: port %d:%d " 4819 "device link lost", port, npmport); 4820 4821 /* An existing device is lost. */ 4822 AHCIPORT_SET_STATE(ahci_portp, &pmport_addr, 4823 SATA_STATE_UNKNOWN); 4824 AHCIPORT_SET_DEV_TYPE(ahci_portp, &pmport_addr, 4825 SATA_DTYPE_NONE); 4826 4827 mutex_exit(&ahci_portp->ahciport_mutex); 4828 sata_hba_event_notify( 4829 ahci_ctlp->ahcictl_sata_hba_tran-> 4830 sata_tran_hba_dip, 4831 &sdevice, 4832 SATA_EVNT_LINK_LOST); 4833 mutex_enter(&ahci_portp->ahciport_mutex); 4834 } 4835 } 4836 4837 CLEAR_BIT(port_hotplug_tags, npmport); 4838 } while (port_hotplug_tags != 0); 4839 4840 return (AHCI_SUCCESS); 4841 4842 err: /* R/W PMULT error */ 4843 return (AHCI_FAILURE); 4844 } 4845 4846 /* 4847 * Probe and initialize a port multiplier port. 4848 * A port multiplier port could only be initilaizer here. 4849 * 4850 * WARNING!!! ahcictl_mutex should be acquired before the function 4851 * is called. 4852 */ 4853 static int 4854 ahci_probe_pmport(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4855 ahci_addr_t *addrp, sata_device_t *sd) 4856 { 4857 uint32_t port_state; 4858 uint8_t port = addrp->aa_port; 4859 ahci_addr_t addr_pmult; 4860 4861 /* 4862 * Check the parent - port multiplier first. 4863 */ 4864 4865 /* 4866 * Parent port multiplier might have been removed. This event will be 4867 * ignored and failure. 4868 */ 4869 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE || 4870 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 4871 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4872 "ahci_tran_probe_port: " 4873 "parent device removed, ignore event.", NULL); 4874 4875 return (AHCI_FAILURE); 4876 } 4877 4878 /* The port is ready? */ 4879 port_state = ahci_portp->ahciport_port_state; 4880 if (!(port_state & SATA_STATE_READY)) { 4881 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4882 "ahci_tran_probe_port: " 4883 "parent port-mult is NOT ready.", NULL); 4884 4885 if (ahci_restart_port_wait_till_ready(ahci_ctlp, 4886 ahci_portp, port, AHCI_PORT_RESET, NULL) != 4887 AHCI_SUCCESS) { 4888 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4889 "ahci_tran_probe_port: " 4890 "restart port-mult failed.", NULL); 4891 return (AHCI_FAILURE); 4892 } 4893 } 4894 4895 /* 4896 * If port-mult is restarted due to some reason, we need 4897 * re-initialized the PMult. 4898 */ 4899 if (!(port_state & SATA_DSTATE_PMULT_INIT)) { 4900 /* Initialize registers on a port multiplier */ 4901 AHCI_ADDR_SET_PMULT(&addr_pmult, addrp->aa_port); 4902 if (ahci_initialize_pmult(ahci_ctlp, ahci_portp, 4903 &addr_pmult, sd) != AHCI_SUCCESS) 4904 return (AHCI_FAILURE); 4905 } 4906 4907 /* 4908 * Then we check the port-mult port 4909 */ 4910 /* Is this pmport initialized? */ 4911 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 4912 if (!(port_state & SATA_STATE_READY)) { 4913 4914 /* ahci_initialize_pmport() will set READY state */ 4915 if (ahci_initialize_pmport(ahci_ctlp, 4916 ahci_portp, addrp) != AHCI_SUCCESS) 4917 return (AHCI_FAILURE); 4918 } 4919 4920 return (AHCI_SUCCESS); 4921 } 4922 4923 /* 4924 * AHCI device reset ...; a single device on one of the ports is reset, 4925 * but the HBA and physical communication remain intact. This is the 4926 * least intrusive. 4927 * 4928 * When issuing a software reset sequence, there should not be other 4929 * commands in the command list, so we will first clear and then re-set 4930 * PxCMD.ST to clear PxCI. And before issuing the software reset, 4931 * the port must be idle and PxTFD.STS.BSY and PxTFD.STS.DRQ must be 4932 * cleared unless command list override (PxCMD.CLO) is supported. 4933 * 4934 * WARNING!!! ahciport_mutex should be acquired before the function 4935 * is called. 4936 */ 4937 static int 4938 ahci_software_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4939 ahci_addr_t *addrp) 4940 { 4941 ahci_fis_h2d_register_t *h2d_register_fisp; 4942 ahci_cmd_table_t *cmd_table; 4943 ahci_cmd_header_t *cmd_header; 4944 uint32_t port_cmd_status, port_cmd_issue, port_task_file; 4945 int slot, loop_count; 4946 uint8_t port = addrp->aa_port; 4947 uint8_t pmport = addrp->aa_pmport; 4948 int rval = AHCI_FAILURE; 4949 4950 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 4951 "port %d:%d device software resetting (FIS)", port, pmport); 4952 4953 /* First clear PxCMD.ST (AHCI v1.2 10.4.1) */ 4954 if (ahci_put_port_into_notrunning_state(ahci_ctlp, ahci_portp, 4955 port) != AHCI_SUCCESS) { 4956 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4957 "ahci_software_reset: cannot stop HBA port %d.", port); 4958 goto out; 4959 } 4960 4961 /* Check PxTFD.STS.BSY and PxTFD.STS.DRQ */ 4962 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4963 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 4964 4965 if (port_task_file & AHCI_TFD_STS_BSY || 4966 port_task_file & AHCI_TFD_STS_DRQ) { 4967 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_SCLO)) { 4968 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4969 "PxTFD.STS.BSY/DRQ is set (PxTFD=0x%x), " 4970 "cannot issue a software reset.", port_task_file); 4971 goto out; 4972 } 4973 4974 /* 4975 * If HBA Support CLO, as Command List Override (CAP.SCLO is 4976 * set), PxCMD.CLO bit should be set before set PxCMD.ST, in 4977 * order to clear PxTFD.STS.BSY and PxTFD.STS.DRQ. 4978 */ 4979 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4980 "PxTFD.STS.BSY/DRQ is set, try SCLO.", NULL) 4981 4982 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4983 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4984 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4985 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4986 port_cmd_status|AHCI_CMD_STATUS_CLO); 4987 4988 /* Waiting till PxCMD.SCLO bit is cleared */ 4989 loop_count = 0; 4990 do { 4991 /* Wait for 10 millisec */ 4992 drv_usecwait(AHCI_10MS_USECS); 4993 4994 /* We are effectively timing out after 1 sec. */ 4995 if (loop_count++ > 100) { 4996 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4997 "SCLO time out. port %d is busy.", port); 4998 goto out; 4999 } 5000 5001 port_cmd_status = 5002 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5003 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5004 } while (port_cmd_status & AHCI_CMD_STATUS_CLO); 5005 5006 /* Re-check */ 5007 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5008 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 5009 if (port_task_file & AHCI_TFD_STS_BSY || 5010 port_task_file & AHCI_TFD_STS_DRQ) { 5011 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5012 "SCLO cannot clear PxTFD.STS.BSY/DRQ (PxTFD=0x%x)", 5013 port_task_file); 5014 goto out; 5015 } 5016 } 5017 5018 /* Then start port */ 5019 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 5020 != AHCI_SUCCESS) { 5021 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5022 "ahci_software_reset: cannot start AHCI port %d.", port); 5023 goto out; 5024 } 5025 5026 /* 5027 * When ahci_port.ahciport_mop_in_progress is set, A non-zero 5028 * ahci_port.ahciport_pending_ncq_tags may fail 5029 * ahci_claim_free_slot(). Actually according to spec, by clearing 5030 * PxCMD.ST there is no command outstanding while executing software 5031 * reseting. Hence we directly use slot 0 instead of 5032 * ahci_claim_free_slot(). 5033 */ 5034 slot = 0; 5035 5036 /* Now send the first H2D Register FIS with SRST set to 1 */ 5037 cmd_table = ahci_portp->ahciport_cmd_tables[slot]; 5038 bzero((void *)cmd_table, ahci_cmd_table_size); 5039 5040 h2d_register_fisp = 5041 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 5042 5043 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 5044 SET_FIS_PMP(h2d_register_fisp, pmport); 5045 SET_FIS_DEVCTL(h2d_register_fisp, SATA_DEVCTL_SRST); 5046 5047 /* Set Command Header in Command List */ 5048 cmd_header = &ahci_portp->ahciport_cmd_list[slot]; 5049 BZERO_DESCR_INFO(cmd_header); 5050 BZERO_PRD_BYTE_COUNT(cmd_header); 5051 SET_COMMAND_FIS_LENGTH(cmd_header, 5); 5052 SET_PORT_MULTI_PORT(cmd_header, pmport); 5053 5054 SET_CLEAR_BUSY_UPON_R_OK(cmd_header, 1); 5055 SET_RESET(cmd_header, 1); 5056 SET_WRITE(cmd_header, 1); 5057 5058 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_tables_dma_handle[slot], 5059 0, 5060 ahci_cmd_table_size, 5061 DDI_DMA_SYNC_FORDEV); 5062 5063 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 5064 slot * sizeof (ahci_cmd_header_t), 5065 sizeof (ahci_cmd_header_t), 5066 DDI_DMA_SYNC_FORDEV); 5067 5068 /* Indicate to the HBA that a command is active. */ 5069 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5070 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 5071 (0x1 << slot)); 5072 5073 loop_count = 0; 5074 5075 /* Loop till the first command is finished */ 5076 do { 5077 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5078 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 5079 5080 /* We are effectively timing out after 1 sec. */ 5081 if (loop_count++ > AHCI_POLLRATE_PORT_SOFTRESET) { 5082 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5083 "the first SRST FIS is timed out, " 5084 "loop_count = %d", loop_count); 5085 goto out; 5086 } 5087 /* Wait for 10 millisec */ 5088 drv_usecwait(AHCI_10MS_USECS); 5089 } while (port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp) & (0x1 << slot)); 5090 5091 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5092 "ahci_software_reset: 1st loop count: %d, " 5093 "port_cmd_issue = 0x%x, slot = 0x%x", 5094 loop_count, port_cmd_issue, slot); 5095 5096 /* According to ATA spec, we need wait at least 5 microsecs here. */ 5097 drv_usecwait(AHCI_1MS_USECS); 5098 5099 /* Now send the second H2D Register FIS with SRST cleard to zero */ 5100 cmd_table = ahci_portp->ahciport_cmd_tables[slot]; 5101 bzero((void *)cmd_table, ahci_cmd_table_size); 5102 5103 h2d_register_fisp = 5104 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 5105 5106 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 5107 SET_FIS_PMP(h2d_register_fisp, pmport); 5108 5109 /* Set Command Header in Command List */ 5110 cmd_header = &ahci_portp->ahciport_cmd_list[slot]; 5111 BZERO_DESCR_INFO(cmd_header); 5112 BZERO_PRD_BYTE_COUNT(cmd_header); 5113 SET_COMMAND_FIS_LENGTH(cmd_header, 5); 5114 SET_PORT_MULTI_PORT(cmd_header, pmport); 5115 5116 SET_WRITE(cmd_header, 1); 5117 5118 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_tables_dma_handle[slot], 5119 0, 5120 ahci_cmd_table_size, 5121 DDI_DMA_SYNC_FORDEV); 5122 5123 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 5124 slot * sizeof (ahci_cmd_header_t), 5125 sizeof (ahci_cmd_header_t), 5126 DDI_DMA_SYNC_FORDEV); 5127 5128 /* Indicate to the HBA that a command is active. */ 5129 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5130 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 5131 (0x1 << slot)); 5132 5133 loop_count = 0; 5134 5135 /* Loop till the second command is finished */ 5136 do { 5137 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5138 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 5139 5140 /* We are effectively timing out after 1 sec. */ 5141 if (loop_count++ > AHCI_POLLRATE_PORT_SOFTRESET) { 5142 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5143 "the second SRST FIS is timed out, " 5144 "loop_count = %d", loop_count); 5145 goto out; 5146 } 5147 5148 /* Wait for 10 millisec */ 5149 drv_usecwait(AHCI_10MS_USECS); 5150 } while (port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp) & (0x1 << slot)); 5151 5152 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5153 "ahci_software_reset: 2nd loop count: %d, " 5154 "port_cmd_issue = 0x%x, slot = 0x%x", 5155 loop_count, port_cmd_issue, slot); 5156 5157 if ((ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) || 5158 (ahci_check_port_handle(ahci_ctlp, port) != DDI_SUCCESS)) { 5159 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 5160 DDI_SERVICE_UNAFFECTED); 5161 goto out; 5162 } 5163 5164 rval = AHCI_SUCCESS; 5165 out: 5166 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5167 "ahci_software_reset: %s at port %d:%d", 5168 rval == AHCI_SUCCESS ? "succeed" : "failed", 5169 port, pmport); 5170 5171 return (rval); 5172 } 5173 5174 /* 5175 * AHCI port reset ...; the physical communication between the HBA and device 5176 * on a port are disabled. This is more intrusive. 5177 * 5178 * When an HBA or port reset occurs, Phy communication is going to 5179 * be re-established with the device through a COMRESET followed by the 5180 * normal out-of-band communication sequence defined in Serial ATA. At 5181 * the end of reset, the device, if working properly, will send a D2H 5182 * Register FIS, which contains the device signature. When the HBA receives 5183 * this FIS, it updates PxTFD.STS and PxTFD.ERR register fields, and updates 5184 * the PxSIG register with the signature. 5185 * 5186 * WARNING!!! ahciport_mutex should be acquired, and PxCMD.ST should be also 5187 * cleared before the function is called. 5188 */ 5189 static int 5190 ahci_port_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5191 ahci_addr_t *addrp) 5192 { 5193 ahci_addr_t pmult_addr; 5194 uint32_t port_cmd_status; 5195 uint32_t port_scontrol, port_sstatus, port_serror; 5196 uint32_t port_intr_status, port_task_file; 5197 uint32_t port_state; 5198 uint8_t port = addrp->aa_port; 5199 5200 int loop_count; 5201 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 5202 5203 /* Target is a port multiplier port? */ 5204 if (AHCI_ADDR_IS_PMPORT(addrp)) 5205 return (ahci_pmport_reset(ahci_ctlp, ahci_portp, addrp)); 5206 5207 /* Otherwise it must be an HBA port. */ 5208 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 5209 5210 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 5211 "Port %d port resetting...", port); 5212 ahci_portp->ahciport_port_state = 0; 5213 5214 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5215 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5216 5217 /* 5218 * According to the spec, SUD bit should be set here, 5219 * but JMicron JMB363 doesn't follow it, so print 5220 * a debug message. 5221 */ 5222 if (!(port_cmd_status & AHCI_CMD_STATUS_SUD)) 5223 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5224 "ahci_port_reset: port %d SUD bit not set", port); 5225 5226 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5227 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 5228 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_COMRESET); 5229 5230 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5231 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 5232 port_scontrol); 5233 5234 /* Enable PxCMD.FRE to read device */ 5235 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5236 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5237 port_cmd_status|AHCI_CMD_STATUS_FRE); 5238 5239 /* 5240 * Give time for COMRESET to percolate, according to the AHCI 5241 * spec, software shall wait at least 1 millisecond before 5242 * clearing PxSCTL.DET 5243 */ 5244 drv_usecwait(AHCI_1MS_USECS * 2); 5245 5246 /* Fetch the SCONTROL again and rewrite the DET part with 0 */ 5247 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5248 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 5249 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 5250 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5251 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 5252 port_scontrol); 5253 5254 /* 5255 * The port enters P:StartComm state, and HBA tells link layer to 5256 * start communication, which involves sending COMRESET to device. 5257 * And the HBA resets PxTFD.STS to 7Fh. 5258 * 5259 * When a COMINIT is received from the device, then the port enters 5260 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets 5261 * PxSSTS.DET to 1h to indicate a device is detected but communication 5262 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate 5263 * a COMINIT has been received. 5264 */ 5265 /* 5266 * The DET field is valid only if IPM field indicates 5267 * that the interface is in active state. 5268 */ 5269 loop_count = 0; 5270 do { 5271 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5272 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 5273 5274 if (SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) { 5275 /* 5276 * If the interface is not active, the DET field 5277 * is considered not accurate. So we want to 5278 * continue looping. 5279 */ 5280 SSTATUS_SET_DET(port_sstatus, SSTATUS_DET_NODEV); 5281 } 5282 5283 if (loop_count++ > AHCI_POLLRATE_PORT_SSTATUS) { 5284 /* 5285 * We are effectively timing out after 0.1 sec. 5286 */ 5287 break; 5288 } 5289 5290 /* Wait for 10 millisec */ 5291 drv_usecwait(AHCI_10MS_USECS); 5292 } while (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM); 5293 5294 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 5295 "ahci_port_reset: 1st loop count: %d, " 5296 "port_sstatus = 0x%x port %d", 5297 loop_count, port_sstatus, port); 5298 5299 if ((SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) || 5300 (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM)) { 5301 /* 5302 * Either the port is not active or there 5303 * is no device present. 5304 */ 5305 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_NONE); 5306 return (AHCI_SUCCESS); 5307 } 5308 5309 /* Now we can make sure there is a device connected to the port */ 5310 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5311 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 5312 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5313 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 5314 5315 /* 5316 * A COMINIT signal is supposed to be received 5317 * PxSERR.DIAG.X or PxIS.PCS should be set 5318 */ 5319 if (!(port_intr_status & AHCI_INTR_STATUS_PCS) && 5320 !(port_serror & SERROR_EXCHANGED_ERR)) { 5321 cmn_err(CE_WARN, "!ahci%d: ahci_port_reset port %d " 5322 "COMINIT signal from the device not received", 5323 instance, port); 5324 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_PSTATE_FAILED); 5325 return (AHCI_FAILURE); 5326 } 5327 5328 /* 5329 * According to the spec, when PxSCTL.DET is set to 0h, upon 5330 * receiving a COMINIT from the attached device, PxTFD.STS.BSY 5331 * shall be set to '1' by the HBA. 5332 * 5333 * However, we found JMicron JMB363 doesn't follow this, so 5334 * remove this check, and just print a debug message. 5335 */ 5336 #if AHCI_DEBUG 5337 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5338 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 5339 if (!(port_task_file & AHCI_TFD_STS_BSY)) { 5340 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_port_reset: " 5341 "port %d BSY bit is not set after COMINIT signal " 5342 "is received", port); 5343 } 5344 #endif 5345 5346 /* 5347 * PxSERR.DIAG.X has to be cleared in order to update PxTFD with 5348 * the D2H FIS received by HBA. 5349 */ 5350 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5351 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5352 SERROR_EXCHANGED_ERR); 5353 5354 /* 5355 * Devices should return a FIS contains its signature to HBA after 5356 * COMINIT signal. Check whether a D2H FIS is received by polling 5357 * PxTFD.STS.ERR bit. 5358 */ 5359 loop_count = 0; 5360 do { 5361 /* Wait for 10 millisec */ 5362 drv_usecwait(AHCI_10MS_USECS); 5363 5364 if (loop_count++ > AHCI_POLLRATE_PORT_TFD_ERROR) { 5365 /* 5366 * We are effectively timing out after 11 sec. 5367 */ 5368 cmn_err(CE_WARN, "!ahci%d: ahci_port_reset port %d " 5369 "the device hardware has been initialized and " 5370 "the power-up diagnostics failed", 5371 instance, port); 5372 5373 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_port_reset: " 5374 "port %d PxTFD.STS.ERR is not set, we need another " 5375 "software reset.", port); 5376 5377 /* Clear port serror register for the port */ 5378 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5379 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5380 AHCI_SERROR_CLEAR_ALL); 5381 5382 AHCI_ADDR_SET_PMULT(&pmult_addr, port); 5383 5384 /* Try another software reset. */ 5385 if (ahci_software_reset(ahci_ctlp, ahci_portp, 5386 &pmult_addr) != AHCI_SUCCESS) { 5387 AHCIPORT_SET_STATE(ahci_portp, addrp, 5388 SATA_PSTATE_FAILED); 5389 return (AHCI_FAILURE); 5390 } 5391 break; 5392 } 5393 5394 /* Wait for 10 millisec */ 5395 drv_usecwait(AHCI_10MS_USECS); 5396 5397 /* 5398 * The Error bit '1' means COMRESET is finished successfully 5399 * The device hardware has been initialized and the power-up 5400 * diagnostics successfully completed. The device requests 5401 * that the Transport layer transmit a Register - D2H FIS to 5402 * the host. (SATA spec 11.5, v2.6) 5403 */ 5404 port_task_file = 5405 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5406 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 5407 } while (((port_task_file & AHCI_TFD_ERR_MASK) 5408 >> AHCI_TFD_ERR_SHIFT) != AHCI_TFD_ERR_SGS); 5409 5410 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 5411 "ahci_port_reset: 2nd loop count: %d, " 5412 "port_task_file = 0x%x port %d", 5413 loop_count, port_task_file, port); 5414 5415 /* Clear port serror register for the port */ 5416 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5417 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5418 AHCI_SERROR_CLEAR_ALL); 5419 5420 /* Set port as ready */ 5421 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 5422 AHCIPORT_SET_STATE(ahci_portp, addrp, port_state|SATA_STATE_READY); 5423 5424 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5425 "ahci_port_reset: succeed at port %d.", port); 5426 return (AHCI_SUCCESS); 5427 } 5428 5429 /* 5430 * COMRESET on a port multiplier port. 5431 * 5432 * NOTE: Only called in ahci_port_reset() 5433 */ 5434 static int 5435 ahci_pmport_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5436 ahci_addr_t *addrp) 5437 { 5438 uint32_t port_scontrol, port_sstatus, port_serror; 5439 uint32_t port_cmd_status, port_intr_status; 5440 uint32_t port_state; 5441 uint8_t port = addrp->aa_port; 5442 uint8_t pmport = addrp->aa_pmport; 5443 int loop_count; 5444 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 5445 5446 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 5447 "port %d:%d: pmport resetting", port, pmport); 5448 5449 /* Initialize pmport state */ 5450 AHCIPORT_SET_STATE(ahci_portp, addrp, 0); 5451 5452 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &port_scontrol, err); 5453 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_COMRESET); 5454 WRITE_PMULT(addrp, SATA_PMULT_REG_SCTL, port_scontrol, err); 5455 5456 /* PxCMD.FRE should be set before. */ 5457 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5458 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5459 ASSERT(port_cmd_status & AHCI_CMD_STATUS_FRE); 5460 if (!(port_cmd_status & AHCI_CMD_STATUS_FRE)) 5461 return (AHCI_FAILURE); 5462 5463 /* 5464 * Give time for COMRESET to percolate, according to the AHCI 5465 * spec, software shall wait at least 1 millisecond before 5466 * clearing PxSCTL.DET 5467 */ 5468 drv_usecwait(AHCI_1MS_USECS*2); 5469 5470 /* 5471 * Fetch the SCONTROL again and rewrite the DET part with 0 5472 * This will generate an Asychronous Notification events. 5473 */ 5474 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &port_scontrol, err); 5475 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 5476 WRITE_PMULT(addrp, SATA_PMULT_REG_SCTL, port_scontrol, err); 5477 5478 /* 5479 * The port enters P:StartComm state, and HBA tells link layer to 5480 * start communication, which involves sending COMRESET to device. 5481 * And the HBA resets PxTFD.STS to 7Fh. 5482 * 5483 * When a COMINIT is received from the device, then the port enters 5484 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets 5485 * PxSSTS.DET to 1h to indicate a device is detected but communication 5486 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate 5487 * a COMINIT has been received. 5488 */ 5489 /* 5490 * The DET field is valid only if IPM field indicates 5491 * that the interface is in active state. 5492 */ 5493 loop_count = 0; 5494 do { 5495 READ_PMULT(addrp, SATA_PMULT_REG_SSTS, &port_sstatus, err); 5496 5497 if (SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) { 5498 /* 5499 * If the interface is not active, the DET field 5500 * is considered not accurate. So we want to 5501 * continue looping. 5502 */ 5503 SSTATUS_SET_DET(port_sstatus, SSTATUS_DET_NODEV); 5504 } 5505 5506 if (loop_count++ > AHCI_POLLRATE_PORT_SSTATUS) { 5507 /* 5508 * We are effectively timing out after 0.1 sec. 5509 */ 5510 break; 5511 } 5512 5513 /* Wait for 10 millisec */ 5514 drv_usecwait(AHCI_10MS_USECS); 5515 5516 } while (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM); 5517 5518 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5519 "ahci_pmport_reset: 1st loop count: %d, " 5520 "port_sstatus = 0x%x port %d:%d", 5521 loop_count, port_sstatus, port, pmport); 5522 5523 if ((SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) || 5524 (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM)) { 5525 /* 5526 * Either the port is not active or there 5527 * is no device present. 5528 */ 5529 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO, ahci_ctlp, 5530 "ahci_pmport_reset: " 5531 "no device attached to port %d:%d", 5532 port, pmport); 5533 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_NONE); 5534 return (AHCI_SUCCESS); 5535 } 5536 5537 /* Now we can make sure there is a device connected to the port */ 5538 /* COMINIT signal is supposed to be received (PxSERR.DIAG.X = '1') */ 5539 READ_PMULT(addrp, SATA_PMULT_REG_SERR, &port_serror, err); 5540 5541 if (!(port_serror & (1 << 26))) { 5542 cmn_err(CE_WARN, "!ahci%d: ahci_pmport_reset: " 5543 "COMINIT signal from the device not received port %d:%d", 5544 instance, port, pmport); 5545 5546 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_PSTATE_FAILED); 5547 return (AHCI_FAILURE); 5548 } 5549 5550 /* 5551 * After clear PxSERR register, we will receive a D2H FIS. 5552 * Normally this FIS will cause a IPMS error according to AHCI spec 5553 * v1.2 because there is no command outstanding for it. So we need 5554 * to ignore this error. 5555 */ 5556 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_IGNORE_IPMS; 5557 WRITE_PMULT(addrp, SATA_PMULT_REG_SERR, AHCI_SERROR_CLEAR_ALL, err); 5558 5559 /* Now we need to check the D2H FIS by checking IPMS error. */ 5560 loop_count = 0; 5561 do { 5562 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5563 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 5564 5565 if (loop_count++ > AHCI_POLLRATE_PORT_TFD_ERROR) { 5566 /* 5567 * No D2H FIS received. This is possible according 5568 * to SATA 2.6 spec. 5569 */ 5570 cmn_err(CE_WARN, "ahci_port_reset: port %d:%d " 5571 "PxIS.IPMS is not set, we need another " 5572 "software reset.", port, pmport); 5573 5574 break; 5575 } 5576 5577 /* Wait for 10 millisec */ 5578 mutex_exit(&ahci_portp->ahciport_mutex); 5579 delay(AHCI_10MS_TICKS); 5580 mutex_enter(&ahci_portp->ahciport_mutex); 5581 5582 } while (!(port_intr_status & AHCI_INTR_STATUS_IPMS)); 5583 5584 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5585 "ahci_pmport_reset: 2st loop count: %d, " 5586 "port_sstatus = 0x%x port %d:%d", 5587 loop_count, port_sstatus, port, pmport); 5588 5589 /* Clear IPMS */ 5590 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5591 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 5592 AHCI_INTR_STATUS_IPMS); 5593 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_IGNORE_IPMS; 5594 5595 /* This pmport is now ready for ahci_tran_start() */ 5596 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 5597 AHCIPORT_SET_STATE(ahci_portp, addrp, port_state|SATA_STATE_READY); 5598 5599 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5600 "ahci_pmport_reset: succeed at port %d:%d", port, pmport); 5601 return (AHCI_SUCCESS); 5602 5603 err: /* R/W PMULT error */ 5604 /* IPMS flags might be set before. */ 5605 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_IGNORE_IPMS; 5606 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5607 "ahci_pmport_reset: failed at port %d:%d", port, pmport); 5608 5609 return (AHCI_FAILURE); 5610 } 5611 5612 /* 5613 * AHCI HBA reset ...; the entire HBA is reset, and all ports are disabled. 5614 * This is the most intrusive. 5615 * 5616 * When an HBA reset occurs, Phy communication will be re-established with 5617 * the device through a COMRESET followed by the normal out-of-band 5618 * communication sequence defined in Serial ATA. At the end of reset, the 5619 * device, if working properly, will send a D2H Register FIS, which contains 5620 * the device signature. When the HBA receives this FIS, it updates PxTFD.STS 5621 * and PxTFD.ERR register fields, and updates the PxSIG register with the 5622 * signature. 5623 * 5624 * Remember to set GHC.AE to 1 before calling ahci_hba_reset. 5625 */ 5626 static int 5627 ahci_hba_reset(ahci_ctl_t *ahci_ctlp) 5628 { 5629 ahci_port_t *ahci_portp; 5630 uint32_t ghc_control; 5631 uint8_t port; 5632 int loop_count; 5633 int rval = AHCI_SUCCESS; 5634 5635 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, "HBA resetting", 5636 NULL); 5637 5638 mutex_enter(&ahci_ctlp->ahcictl_mutex); 5639 5640 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5641 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5642 5643 /* Setting GHC.HR to 1, remember GHC.AE is already set to 1 before */ 5644 ghc_control |= AHCI_HBA_GHC_HR; 5645 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5646 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 5647 5648 /* 5649 * Wait until HBA Reset complete or timeout 5650 */ 5651 loop_count = 0; 5652 do { 5653 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5654 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5655 5656 if (loop_count++ > AHCI_POLLRATE_HBA_RESET) { 5657 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5658 "ahci hba reset is timing out, " 5659 "ghc_control = 0x%x", ghc_control); 5660 /* We are effectively timing out after 1 sec. */ 5661 break; 5662 } 5663 5664 /* Wait for 10 millisec */ 5665 drv_usecwait(AHCI_10MS_USECS); 5666 } while (ghc_control & AHCI_HBA_GHC_HR); 5667 5668 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5669 "ahci_hba_reset: 1st loop count: %d, " 5670 "ghc_control = 0x%x", loop_count, ghc_control); 5671 5672 if (ghc_control & AHCI_HBA_GHC_HR) { 5673 /* The hba is not reset for some reasons */ 5674 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5675 "hba reset failed: HBA in a hung or locked state", NULL); 5676 mutex_exit(&ahci_ctlp->ahcictl_mutex); 5677 return (AHCI_FAILURE); 5678 } 5679 5680 /* 5681 * HBA reset will clear (AHCI Spec v1.2 10.4.3) GHC.IE / GHC.AE 5682 */ 5683 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5684 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5685 ghc_control |= (AHCI_HBA_GHC_AE | AHCI_HBA_GHC_IE); 5686 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5687 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 5688 5689 mutex_exit(&ahci_ctlp->ahcictl_mutex); 5690 5691 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 5692 /* Only check implemented ports */ 5693 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 5694 continue; 5695 } 5696 5697 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 5698 mutex_enter(&ahci_portp->ahciport_mutex); 5699 5700 /* Make sure the drive is spun-up */ 5701 ahci_staggered_spin_up(ahci_ctlp, port); 5702 5703 if (ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 5704 port, AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, NULL) != 5705 AHCI_SUCCESS) { 5706 rval = AHCI_FAILURE; 5707 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5708 "ahci_hba_reset: port %d failed", port); 5709 /* 5710 * Set the port state to SATA_PSTATE_FAILED if 5711 * failed to initialize it. 5712 */ 5713 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 5714 } 5715 5716 mutex_exit(&ahci_portp->ahciport_mutex); 5717 } 5718 5719 return (rval); 5720 } 5721 5722 /* 5723 * This routine is only called from AHCI_ATTACH or phyrdy change 5724 * case. It first calls software reset, then stop the port and try to 5725 * read PxSIG register to find the type of device attached to the port. 5726 * 5727 * The caller should make sure a valid device exists on specified port and 5728 * physical communication has been established so that the signature could 5729 * be retrieved by software reset. 5730 * 5731 * WARNING!!! ahciport_mutex should be acquired before the function 5732 * is called. And the port interrupt is disabled. 5733 */ 5734 static void 5735 ahci_find_dev_signature(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5736 ahci_addr_t *addrp) 5737 { 5738 ahci_addr_t dev_addr; 5739 uint32_t signature; 5740 uint8_t port = addrp->aa_port; 5741 uint8_t pmport = addrp->aa_pmport; 5742 int rval; 5743 5744 ASSERT(AHCI_ADDR_IS_VALID(addrp)); 5745 5746 /* 5747 * If the HBA doesn't support port multiplier, then the driver 5748 * doesn't need to bother to check port multiplier device. 5749 * 5750 * The second port of ICH7 on ASUS P5W DH deluxe motherboard is 5751 * connected to Silicon Image 4723, to which the two sata drives 5752 * attached can be set with RAID1, RAID0 or Spanning mode. 5753 * 5754 * We found software reset will get failure if port multiplier address 5755 * 0xf is used by software reset, so just ignore the check since 5756 * ICH7 doesn't support port multiplier device at all. 5757 */ 5758 if (AHCI_ADDR_IS_PORT(addrp) && 5759 (ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_CBSS)) { 5760 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 5761 "ahci_find_dev_signature enter: port %d", port); 5762 5763 /* 5764 * NOTE: when the ahci address is a HBA port, we do not know 5765 * it is a device or a port multiplier that attached. we need 5766 * try a software reset at port multiplier address (0xf 5767 * pmport) 5768 */ 5769 AHCI_ADDR_SET_PMULT(&dev_addr, addrp->aa_port); 5770 } else { 5771 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 5772 "ahci_find_dev_signature enter: port %d:%d", 5773 port, pmport); 5774 dev_addr = *addrp; 5775 } 5776 5777 /* Assume it is unknown. */ 5778 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 5779 5780 /* Issue a software reset to get the signature */ 5781 rval = ahci_software_reset(ahci_ctlp, ahci_portp, &dev_addr); 5782 if (rval != AHCI_SUCCESS) { 5783 5784 /* 5785 * Try to do software reset again with pmport set with 0 if 5786 * the controller is set with AHCI_CAP_SRST_NO_HOSTPORT and 5787 * the original pmport is set with SATA_PMULT_HOSTPORT (0xf) 5788 */ 5789 if ((ahci_ctlp->ahcictl_cap & AHCI_CAP_SRST_NO_HOSTPORT) && 5790 (dev_addr.aa_pmport == SATA_PMULT_HOSTPORT)) { 5791 dev_addr.aa_pmport = 0; 5792 rval = ahci_software_reset(ahci_ctlp, ahci_portp, 5793 &dev_addr); 5794 } 5795 5796 if (rval != AHCI_SUCCESS) { 5797 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5798 "ahci_find_dev_signature: software reset failed " 5799 "at port %d:%d, cannot get signature.", 5800 port, pmport); 5801 5802 AHCIPORT_SET_STATE(ahci_portp, addrp, 5803 SATA_PSTATE_FAILED); 5804 return; 5805 } 5806 } 5807 5808 /* 5809 * ahci_software_reset has started the port, so we need manually stop 5810 * the port again. 5811 */ 5812 if (AHCI_ADDR_IS_PORT(addrp)) { 5813 if (ahci_put_port_into_notrunning_state(ahci_ctlp, 5814 ahci_portp, port) != AHCI_SUCCESS) { 5815 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5816 "ahci_find_dev_signature: cannot stop port %d.", 5817 port); 5818 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 5819 return; 5820 } 5821 } 5822 5823 /* Now we can make sure that a valid signature is received. */ 5824 signature = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5825 (uint32_t *)AHCI_PORT_PxSIG(ahci_ctlp, port)); 5826 5827 if (AHCI_ADDR_IS_PMPORT(addrp)) { 5828 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 5829 "ahci_find_dev_signature: signature = 0x%x at port %d:%d", 5830 signature, port, pmport); 5831 } else { 5832 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO, ahci_ctlp, 5833 "ahci_find_dev_signature: signature = 0x%x at port %d", 5834 signature, port); 5835 } 5836 5837 /* NOTE: Only support ATAPI device at controller port. */ 5838 if (signature == AHCI_SIGNATURE_ATAPI && !AHCI_ADDR_IS_PORT(addrp)) 5839 signature = SATA_DTYPE_UNKNOWN; 5840 5841 switch (signature) { 5842 5843 case AHCI_SIGNATURE_DISK: 5844 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_ATADISK); 5845 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5846 "Disk is found at port: %d", port); 5847 break; 5848 5849 case AHCI_SIGNATURE_ATAPI: 5850 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_ATAPI); 5851 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5852 "ATAPI device is found at port: %d", port); 5853 break; 5854 5855 case AHCI_SIGNATURE_PORT_MULTIPLIER: 5856 /* Port Multiplier cannot recursively attached. */ 5857 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 5858 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_PMULT); 5859 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5860 "Port Multiplier is found at port: %d", port); 5861 break; 5862 5863 default: 5864 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 5865 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5866 "Unknown device is found at port: %d", port); 5867 } 5868 } 5869 5870 /* 5871 * According to the spec, to reliably detect hot plug removals, software 5872 * must disable interface power management. Software should perform the 5873 * following initialization on a port after a device is attached: 5874 * Set PxSCTL.IPM to 3h to disable interface state transitions 5875 * Set PxCMD.ALPE to '0' to disable aggressive power management 5876 * Disable device initiated interface power management by SET FEATURE 5877 * 5878 * We can ignore the last item because by default the feature is disabled 5879 */ 5880 static void 5881 ahci_disable_interface_pm(ahci_ctl_t *ahci_ctlp, uint8_t port) 5882 { 5883 uint32_t port_scontrol, port_cmd_status; 5884 5885 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5886 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 5887 SCONTROL_SET_IPM(port_scontrol, SCONTROL_IPM_DISABLE_BOTH); 5888 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5889 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), port_scontrol); 5890 5891 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5892 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5893 port_cmd_status &= ~AHCI_CMD_STATUS_ALPE; 5894 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5895 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), port_cmd_status); 5896 } 5897 5898 /* 5899 * Start the port - set PxCMD.ST to 1, if PxCMD.FRE is not set 5900 * to 1, then set it firstly. 5901 * 5902 * Each port contains two major DMA engines. One DMA engine walks through 5903 * the command list, and is controlled by PxCMD.ST. The second DMA engine 5904 * copies received FISes into system memory, and is controlled by PxCMD.FRE. 5905 * 5906 * Software shall not set PxCMD.ST to '1' until it verifies that PxCMD.CR 5907 * is '0' and has set PxCMD.FRE is '1'. And software shall not clear 5908 * PxCMD.FRE while PxCMD.ST or PxCMD.CR is set '1'. 5909 * 5910 * Software shall not set PxCMD.ST to '1' unless a functional device is 5911 * present on the port(as determined by PxTFD.STS.BSY = '0', 5912 * PxTFD.STS.DRQ = '0', and PxSSTS.DET = 3h). 5913 * 5914 * WARNING!!! ahciport_mutex should be acquired before the function 5915 * is called. 5916 */ 5917 static int 5918 ahci_start_port(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, uint8_t port) 5919 { 5920 uint32_t port_cmd_status; 5921 5922 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_start_port: %d enter", port); 5923 5924 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED) { 5925 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port failed " 5926 "the state for port %d is 0x%x", 5927 port, ahci_portp->ahciport_port_state); 5928 return (AHCI_FAILURE); 5929 } 5930 5931 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 5932 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port failed " 5933 "no device is attached at port %d", port); 5934 return (AHCI_FAILURE); 5935 } 5936 5937 /* First to set PxCMD.FRE before setting PxCMD.ST. */ 5938 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5939 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5940 5941 if (!(port_cmd_status & AHCI_CMD_STATUS_FRE)) { 5942 port_cmd_status |= AHCI_CMD_STATUS_FRE; 5943 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5944 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5945 port_cmd_status); 5946 } 5947 5948 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5949 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5950 5951 port_cmd_status |= AHCI_CMD_STATUS_ST; 5952 5953 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5954 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5955 port_cmd_status); 5956 5957 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_STARTED; 5958 5959 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port: " 5960 "PxCMD.ST set to '1' at port %d", port); 5961 5962 return (AHCI_SUCCESS); 5963 } 5964 5965 /* 5966 * Setup PxCLB, PxCLBU, PxFB, and PxFBU for particular port. First, we need 5967 * to make sure PxCMD.ST, PxCMD.CR, PxCMD.FRE, and PxCMD.FR are all cleared. 5968 * Then set PxCLB, PxCLBU, PxFB, and PxFBU. 5969 * 5970 * WARNING!!! ahciport_mutex should be acquired before the function is called. 5971 */ 5972 static int 5973 ahci_setup_port_base_addresses(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 5974 { 5975 uint8_t port = ahci_portp->ahciport_port_num; 5976 uint32_t port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5977 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5978 5979 /* Step 1: Make sure both PxCMD.ST and PxCMD.CR are cleared. */ 5980 if (port_cmd_status & (AHCI_CMD_STATUS_ST | AHCI_CMD_STATUS_CR)) { 5981 if (ahci_put_port_into_notrunning_state(ahci_ctlp, ahci_portp, 5982 port) != AHCI_SUCCESS) 5983 return (AHCI_FAILURE); 5984 5985 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5986 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5987 } 5988 5989 /* Step 2: Make sure both PxCMD.FRE and PxCMD.FR are cleared. */ 5990 if (port_cmd_status & (AHCI_CMD_STATUS_FRE | AHCI_CMD_STATUS_FR)) { 5991 int loop_count = 0; 5992 5993 /* Clear PxCMD.FRE */ 5994 port_cmd_status &= ~AHCI_CMD_STATUS_FRE; 5995 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5996 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5997 port_cmd_status); 5998 5999 /* Wait until PxCMD.FR is cleared */ 6000 for (;;) { 6001 port_cmd_status = 6002 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6003 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 6004 6005 if (!(port_cmd_status & AHCI_CMD_STATUS_FR)) 6006 break; 6007 6008 if (loop_count++ >= AHCI_POLLRATE_PORT_IDLE_FR) { 6009 AHCIDBG(AHCIDBG_INIT | AHCIDBG_ERRS, ahci_ctlp, 6010 "ahci_setup_port_base_addresses: cannot " 6011 "clear PxCMD.FR for port %d.", port); 6012 6013 /* 6014 * We are effectively timing out after 0.5 sec. 6015 * This value is specified in AHCI spec. 6016 */ 6017 return (AHCI_FAILURE); 6018 } 6019 6020 /* Wait for 1 millisec */ 6021 drv_usecwait(AHCI_1MS_USECS); 6022 } 6023 } 6024 6025 /* Step 3: Config Port Command List Base Address */ 6026 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6027 (uint32_t *)AHCI_PORT_PxCLB(ahci_ctlp, port), 6028 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_address); 6029 6030 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6031 (uint32_t *)AHCI_PORT_PxCLBU(ahci_ctlp, port), 6032 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_notused); 6033 6034 /* Step 4: Config Port Received FIS Base Address */ 6035 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6036 (uint32_t *)AHCI_PORT_PxFB(ahci_ctlp, port), 6037 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_address); 6038 6039 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6040 (uint32_t *)AHCI_PORT_PxFBU(ahci_ctlp, port), 6041 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_notused); 6042 6043 return (AHCI_SUCCESS); 6044 } 6045 6046 /* 6047 * Allocate the ahci_port_t including Received FIS and Command List. 6048 * The argument - port is the physical port number, and not logical 6049 * port number seen by the SATA framework. 6050 * 6051 * WARNING!!! ahcictl_mutex should be acquired before the function 6052 * is called. 6053 */ 6054 static int 6055 ahci_alloc_port_state(ahci_ctl_t *ahci_ctlp, uint8_t port) 6056 { 6057 dev_info_t *dip = ahci_ctlp->ahcictl_dip; 6058 ahci_port_t *ahci_portp; 6059 char taskq_name[64] = "event_handle_taskq"; 6060 6061 ahci_portp = 6062 (ahci_port_t *)kmem_zalloc(sizeof (ahci_port_t), KM_SLEEP); 6063 6064 ahci_ctlp->ahcictl_ports[port] = ahci_portp; 6065 ahci_portp->ahciport_port_num = port; 6066 6067 /* Initialize the port condition variable */ 6068 cv_init(&ahci_portp->ahciport_cv, NULL, CV_DRIVER, NULL); 6069 6070 /* Initialize the port mutex */ 6071 mutex_init(&ahci_portp->ahciport_mutex, NULL, MUTEX_DRIVER, 6072 (void *)(uintptr_t)ahci_ctlp->ahcictl_intr_pri); 6073 6074 mutex_enter(&ahci_portp->ahciport_mutex); 6075 6076 /* 6077 * Allocate memory for received FIS structure and 6078 * command list for this port 6079 */ 6080 if (ahci_alloc_rcvd_fis(ahci_ctlp, ahci_portp) != AHCI_SUCCESS) { 6081 goto err_case1; 6082 } 6083 6084 if (ahci_alloc_cmd_list(ahci_ctlp, ahci_portp) != AHCI_SUCCESS) { 6085 goto err_case2; 6086 } 6087 6088 /* Setup PxCMD.CLB, PxCMD.CLBU, PxCMD.FB, and PxCMD.FBU */ 6089 if (ahci_setup_port_base_addresses(ahci_ctlp, ahci_portp) != 6090 AHCI_SUCCESS) { 6091 goto err_case3; 6092 } 6093 6094 (void) snprintf(taskq_name + strlen(taskq_name), 6095 sizeof (taskq_name) - strlen(taskq_name), 6096 "_port%d", port); 6097 6098 /* Create the taskq for the port */ 6099 if ((ahci_portp->ahciport_event_taskq = ddi_taskq_create(dip, 6100 taskq_name, 2, TASKQ_DEFAULTPRI, 0)) == NULL) { 6101 cmn_err(CE_WARN, "!ahci%d: ddi_taskq_create failed for event " 6102 "handle", ddi_get_instance(ahci_ctlp->ahcictl_dip)); 6103 goto err_case3; 6104 } 6105 6106 /* Allocate the argument for the taskq */ 6107 ahci_portp->ahciport_event_args = 6108 kmem_zalloc(sizeof (ahci_event_arg_t), KM_SLEEP); 6109 6110 ahci_portp->ahciport_event_args->ahciea_addrp = 6111 kmem_zalloc(sizeof (ahci_addr_t), KM_SLEEP); 6112 6113 if (ahci_portp->ahciport_event_args == NULL) 6114 goto err_case4; 6115 6116 /* Initialize the done queue */ 6117 ahci_portp->ahciport_doneq = NULL; 6118 ahci_portp->ahciport_doneqtail = &ahci_portp->ahciport_doneq; 6119 ahci_portp->ahciport_doneq_len = 0; 6120 6121 mutex_exit(&ahci_portp->ahciport_mutex); 6122 6123 return (AHCI_SUCCESS); 6124 6125 err_case4: 6126 ddi_taskq_destroy(ahci_portp->ahciport_event_taskq); 6127 6128 err_case3: 6129 ahci_dealloc_cmd_list(ahci_ctlp, ahci_portp); 6130 6131 err_case2: 6132 ahci_dealloc_rcvd_fis(ahci_portp); 6133 6134 err_case1: 6135 mutex_exit(&ahci_portp->ahciport_mutex); 6136 mutex_destroy(&ahci_portp->ahciport_mutex); 6137 cv_destroy(&ahci_portp->ahciport_cv); 6138 6139 kmem_free(ahci_portp, sizeof (ahci_port_t)); 6140 6141 return (AHCI_FAILURE); 6142 } 6143 6144 /* 6145 * Reverse of ahci_alloc_port_state(). 6146 * 6147 * WARNING!!! ahcictl_mutex should be acquired before the function 6148 * is called. 6149 */ 6150 static void 6151 ahci_dealloc_port_state(ahci_ctl_t *ahci_ctlp, uint8_t port) 6152 { 6153 ahci_port_t *ahci_portp = ahci_ctlp->ahcictl_ports[port]; 6154 6155 ASSERT(ahci_portp != NULL); 6156 6157 mutex_enter(&ahci_portp->ahciport_mutex); 6158 kmem_free(ahci_portp->ahciport_event_args->ahciea_addrp, 6159 sizeof (ahci_addr_t)); 6160 ahci_portp->ahciport_event_args->ahciea_addrp = NULL; 6161 kmem_free(ahci_portp->ahciport_event_args, sizeof (ahci_event_arg_t)); 6162 ahci_portp->ahciport_event_args = NULL; 6163 ddi_taskq_destroy(ahci_portp->ahciport_event_taskq); 6164 ahci_dealloc_cmd_list(ahci_ctlp, ahci_portp); 6165 ahci_dealloc_rcvd_fis(ahci_portp); 6166 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 6167 mutex_exit(&ahci_portp->ahciport_mutex); 6168 6169 mutex_destroy(&ahci_portp->ahciport_mutex); 6170 cv_destroy(&ahci_portp->ahciport_cv); 6171 6172 kmem_free(ahci_portp, sizeof (ahci_port_t)); 6173 6174 ahci_ctlp->ahcictl_ports[port] = NULL; 6175 } 6176 6177 /* 6178 * Allocates memory for the Received FIS Structure 6179 * 6180 * WARNING!!! ahciport_mutex should be acquired before the function 6181 * is called. 6182 */ 6183 static int 6184 ahci_alloc_rcvd_fis(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 6185 { 6186 size_t rcvd_fis_size; 6187 size_t ret_len; 6188 uint_t cookie_count; 6189 6190 rcvd_fis_size = sizeof (ahci_rcvd_fis_t); 6191 6192 /* allocate rcvd FIS dma handle. */ 6193 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 6194 &ahci_ctlp->ahcictl_rcvd_fis_dma_attr, 6195 DDI_DMA_SLEEP, 6196 NULL, 6197 &ahci_portp->ahciport_rcvd_fis_dma_handle) != 6198 DDI_SUCCESS) { 6199 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6200 "rcvd FIS dma handle alloc failed", NULL); 6201 6202 return (AHCI_FAILURE); 6203 } 6204 6205 if (ddi_dma_mem_alloc(ahci_portp->ahciport_rcvd_fis_dma_handle, 6206 rcvd_fis_size, 6207 &accattr, 6208 DDI_DMA_CONSISTENT, 6209 DDI_DMA_SLEEP, 6210 NULL, 6211 (caddr_t *)&ahci_portp->ahciport_rcvd_fis, 6212 &ret_len, 6213 &ahci_portp->ahciport_rcvd_fis_acc_handle) != NULL) { 6214 6215 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6216 "rcvd FIS dma mem alloc fail", NULL); 6217 /* error.. free the dma handle. */ 6218 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 6219 return (AHCI_FAILURE); 6220 } 6221 6222 if (ddi_dma_addr_bind_handle(ahci_portp->ahciport_rcvd_fis_dma_handle, 6223 NULL, 6224 (caddr_t)ahci_portp->ahciport_rcvd_fis, 6225 rcvd_fis_size, 6226 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 6227 DDI_DMA_SLEEP, 6228 NULL, 6229 &ahci_portp->ahciport_rcvd_fis_dma_cookie, 6230 &cookie_count) != DDI_DMA_MAPPED) { 6231 6232 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6233 "rcvd FIS dma handle bind fail", NULL); 6234 /* error.. free the dma handle & free the memory. */ 6235 ddi_dma_mem_free(&ahci_portp->ahciport_rcvd_fis_acc_handle); 6236 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 6237 return (AHCI_FAILURE); 6238 } 6239 6240 bzero((void *)ahci_portp->ahciport_rcvd_fis, rcvd_fis_size); 6241 6242 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "64-bit, dma address: 0x%llx", 6243 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_laddress); 6244 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "32-bit, dma address: 0x%x", 6245 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_address); 6246 6247 return (AHCI_SUCCESS); 6248 } 6249 6250 /* 6251 * Deallocates the Received FIS Structure 6252 * 6253 * WARNING!!! ahciport_mutex should be acquired before the function 6254 * is called. 6255 */ 6256 static void 6257 ahci_dealloc_rcvd_fis(ahci_port_t *ahci_portp) 6258 { 6259 /* Unbind the cmd list dma handle first. */ 6260 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_rcvd_fis_dma_handle); 6261 6262 /* Then free the underlying memory. */ 6263 ddi_dma_mem_free(&ahci_portp->ahciport_rcvd_fis_acc_handle); 6264 6265 /* Now free the handle itself. */ 6266 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 6267 } 6268 6269 /* 6270 * Allocates memory for the Command List, which contains up to 32 entries. 6271 * Each entry contains a command header, which is a 32-byte structure that 6272 * includes the pointer to the command table. 6273 * 6274 * WARNING!!! ahciport_mutex should be acquired before the function 6275 * is called. 6276 */ 6277 static int 6278 ahci_alloc_cmd_list(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 6279 { 6280 size_t cmd_list_size; 6281 size_t ret_len; 6282 uint_t cookie_count; 6283 6284 cmd_list_size = 6285 ahci_ctlp->ahcictl_num_cmd_slots * sizeof (ahci_cmd_header_t); 6286 6287 /* allocate cmd list dma handle. */ 6288 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 6289 &ahci_ctlp->ahcictl_cmd_list_dma_attr, 6290 DDI_DMA_SLEEP, 6291 NULL, 6292 &ahci_portp->ahciport_cmd_list_dma_handle) != DDI_SUCCESS) { 6293 6294 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6295 "cmd list dma handle alloc failed", NULL); 6296 return (AHCI_FAILURE); 6297 } 6298 6299 if (ddi_dma_mem_alloc(ahci_portp->ahciport_cmd_list_dma_handle, 6300 cmd_list_size, 6301 &accattr, 6302 DDI_DMA_CONSISTENT, 6303 DDI_DMA_SLEEP, 6304 NULL, 6305 (caddr_t *)&ahci_portp->ahciport_cmd_list, 6306 &ret_len, 6307 &ahci_portp->ahciport_cmd_list_acc_handle) != NULL) { 6308 6309 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6310 "cmd list dma mem alloc fail", NULL); 6311 /* error.. free the dma handle. */ 6312 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 6313 return (AHCI_FAILURE); 6314 } 6315 6316 if (ddi_dma_addr_bind_handle(ahci_portp->ahciport_cmd_list_dma_handle, 6317 NULL, 6318 (caddr_t)ahci_portp->ahciport_cmd_list, 6319 cmd_list_size, 6320 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 6321 DDI_DMA_SLEEP, 6322 NULL, 6323 &ahci_portp->ahciport_cmd_list_dma_cookie, 6324 &cookie_count) != DDI_DMA_MAPPED) { 6325 6326 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6327 "cmd list dma handle bind fail", NULL); 6328 /* error.. free the dma handle & free the memory. */ 6329 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 6330 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 6331 return (AHCI_FAILURE); 6332 } 6333 6334 bzero((void *)ahci_portp->ahciport_cmd_list, cmd_list_size); 6335 6336 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "64-bit, dma address: 0x%llx", 6337 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_laddress); 6338 6339 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "32-bit, dma address: 0x%x", 6340 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_address); 6341 6342 if (ahci_alloc_cmd_tables(ahci_ctlp, ahci_portp) != AHCI_SUCCESS) { 6343 goto err_out; 6344 } 6345 6346 return (AHCI_SUCCESS); 6347 6348 err_out: 6349 /* Unbind the cmd list dma handle first. */ 6350 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_cmd_list_dma_handle); 6351 6352 /* Then free the underlying memory. */ 6353 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 6354 6355 /* Now free the handle itself. */ 6356 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 6357 6358 return (AHCI_FAILURE); 6359 } 6360 6361 /* 6362 * Deallocates the Command List 6363 * 6364 * WARNING!!! ahciport_mutex should be acquired before the function 6365 * is called. 6366 */ 6367 static void 6368 ahci_dealloc_cmd_list(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 6369 { 6370 /* First dealloc command table */ 6371 ahci_dealloc_cmd_tables(ahci_ctlp, ahci_portp); 6372 6373 /* Unbind the cmd list dma handle first. */ 6374 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_cmd_list_dma_handle); 6375 6376 /* Then free the underlying memory. */ 6377 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 6378 6379 /* Now free the handle itself. */ 6380 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 6381 } 6382 6383 /* 6384 * Allocates memory for all Command Tables, which contains Command FIS, 6385 * ATAPI Command and Physical Region Descriptor Table. 6386 * 6387 * WARNING!!! ahciport_mutex should be acquired before the function 6388 * is called. 6389 */ 6390 static int 6391 ahci_alloc_cmd_tables(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 6392 { 6393 size_t ret_len; 6394 ddi_dma_cookie_t cmd_table_dma_cookie; 6395 uint_t cookie_count; 6396 int slot; 6397 6398 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 6399 "ahci_alloc_cmd_tables: port %d enter", 6400 ahci_portp->ahciport_port_num); 6401 6402 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; slot++) { 6403 /* Allocate cmd table dma handle. */ 6404 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 6405 &ahci_ctlp->ahcictl_cmd_table_dma_attr, 6406 DDI_DMA_SLEEP, 6407 NULL, 6408 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]) != 6409 DDI_SUCCESS) { 6410 6411 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6412 "cmd table dma handle alloc failed", NULL); 6413 6414 goto err_out; 6415 } 6416 6417 if (ddi_dma_mem_alloc( 6418 ahci_portp->ahciport_cmd_tables_dma_handle[slot], 6419 ahci_cmd_table_size, 6420 &accattr, 6421 DDI_DMA_CONSISTENT, 6422 DDI_DMA_SLEEP, 6423 NULL, 6424 (caddr_t *)&ahci_portp->ahciport_cmd_tables[slot], 6425 &ret_len, 6426 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]) != 6427 NULL) { 6428 6429 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6430 "cmd table dma mem alloc fail", NULL); 6431 6432 /* error.. free the dma handle. */ 6433 ddi_dma_free_handle( 6434 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6435 goto err_out; 6436 } 6437 6438 if (ddi_dma_addr_bind_handle( 6439 ahci_portp->ahciport_cmd_tables_dma_handle[slot], 6440 NULL, 6441 (caddr_t)ahci_portp->ahciport_cmd_tables[slot], 6442 ahci_cmd_table_size, 6443 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 6444 DDI_DMA_SLEEP, 6445 NULL, 6446 &cmd_table_dma_cookie, 6447 &cookie_count) != DDI_DMA_MAPPED) { 6448 6449 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6450 "cmd table dma handle bind fail", NULL); 6451 /* error.. free the dma handle & free the memory. */ 6452 ddi_dma_mem_free( 6453 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6454 ddi_dma_free_handle( 6455 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6456 goto err_out; 6457 } 6458 6459 bzero((void *)ahci_portp->ahciport_cmd_tables[slot], 6460 ahci_cmd_table_size); 6461 6462 /* Config Port Command Table Base Address */ 6463 SET_COMMAND_TABLE_BASE_ADDR( 6464 (&ahci_portp->ahciport_cmd_list[slot]), 6465 cmd_table_dma_cookie.dmac_laddress & 0xffffffffull); 6466 6467 #ifndef __lock_lint 6468 SET_COMMAND_TABLE_BASE_ADDR_UPPER( 6469 (&ahci_portp->ahciport_cmd_list[slot]), 6470 cmd_table_dma_cookie.dmac_laddress >> 32); 6471 #endif 6472 } 6473 6474 return (AHCI_SUCCESS); 6475 err_out: 6476 6477 for (slot--; slot >= 0; slot--) { 6478 /* Unbind the cmd table dma handle first */ 6479 (void) ddi_dma_unbind_handle( 6480 ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6481 6482 /* Then free the underlying memory */ 6483 ddi_dma_mem_free( 6484 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6485 6486 /* Now free the handle itself */ 6487 ddi_dma_free_handle( 6488 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6489 } 6490 6491 return (AHCI_FAILURE); 6492 } 6493 6494 /* 6495 * Deallocates memory for all Command Tables. 6496 * 6497 * WARNING!!! ahciport_mutex should be acquired before the function 6498 * is called. 6499 */ 6500 static void 6501 ahci_dealloc_cmd_tables(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 6502 { 6503 int slot; 6504 6505 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 6506 "ahci_dealloc_cmd_tables: %d enter", 6507 ahci_portp->ahciport_port_num); 6508 6509 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; slot++) { 6510 /* Unbind the cmd table dma handle first. */ 6511 (void) ddi_dma_unbind_handle( 6512 ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6513 6514 /* Then free the underlying memory. */ 6515 ddi_dma_mem_free( 6516 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6517 6518 /* Now free the handle itself. */ 6519 ddi_dma_free_handle( 6520 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6521 } 6522 } 6523 6524 /* 6525 * Update SATA registers at controller ports 6526 * 6527 * WARNING!!! ahciport_mutex should be acquired before those functions 6528 * get called. 6529 */ 6530 static void 6531 ahci_update_sata_registers(ahci_ctl_t *ahci_ctlp, uint8_t port, 6532 sata_device_t *sd) 6533 { 6534 sd->satadev_scr.sstatus = 6535 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6536 (uint32_t *)(AHCI_PORT_PxSSTS(ahci_ctlp, port))); 6537 sd->satadev_scr.serror = 6538 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6539 (uint32_t *)(AHCI_PORT_PxSERR(ahci_ctlp, port))); 6540 sd->satadev_scr.scontrol = 6541 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6542 (uint32_t *)(AHCI_PORT_PxSCTL(ahci_ctlp, port))); 6543 sd->satadev_scr.sactive = 6544 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6545 (uint32_t *)(AHCI_PORT_PxSACT(ahci_ctlp, port))); 6546 } 6547 6548 /* 6549 * For poll mode, ahci_port_intr will be called to emulate the interrupt 6550 */ 6551 static void 6552 ahci_port_intr(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, uint8_t port) 6553 { 6554 uint32_t port_intr_status; 6555 uint32_t port_intr_enable; 6556 6557 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6558 "ahci_port_intr enter: port %d", port); 6559 6560 mutex_enter(&ahci_portp->ahciport_mutex); 6561 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_POLLING) { 6562 /* For SATA_OPMODE_POLLING commands */ 6563 port_intr_enable = 6564 (AHCI_INTR_STATUS_DHRS | 6565 AHCI_INTR_STATUS_PSS | 6566 AHCI_INTR_STATUS_SDBS | 6567 AHCI_INTR_STATUS_UFS | 6568 AHCI_INTR_STATUS_PCS | 6569 AHCI_INTR_STATUS_PRCS | 6570 AHCI_INTR_STATUS_OFS | 6571 AHCI_INTR_STATUS_INFS | 6572 AHCI_INTR_STATUS_IFS | 6573 AHCI_INTR_STATUS_HBDS | 6574 AHCI_INTR_STATUS_HBFS | 6575 AHCI_INTR_STATUS_TFES); 6576 } else { 6577 /* 6578 * port_intr_enable indicates that the corresponding interrrupt 6579 * reporting is enabled. 6580 */ 6581 port_intr_enable = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6582 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port)); 6583 } 6584 6585 /* IPMS error in port reset should be ignored according AHCI spec. */ 6586 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_IGNORE_IPMS)) 6587 port_intr_enable |= AHCI_INTR_STATUS_IPMS; 6588 mutex_exit(&ahci_portp->ahciport_mutex); 6589 6590 /* 6591 * port_intr_stats indicates that the corresponding interrupt 6592 * condition is active. 6593 */ 6594 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6595 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 6596 6597 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6598 "ahci_port_intr: port %d, port_intr_status = 0x%x, " 6599 "port_intr_enable = 0x%x", 6600 port, port_intr_status, port_intr_enable); 6601 6602 port_intr_status &= port_intr_enable; 6603 6604 /* 6605 * Pending interrupt events are indicated by the PxIS register. 6606 * Make sure we don't miss any event. 6607 */ 6608 if (ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) { 6609 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 6610 DDI_SERVICE_UNAFFECTED); 6611 ddi_fm_acc_err_clear(ahci_ctlp->ahcictl_ahci_acc_handle, 6612 DDI_FME_VERSION); 6613 return; 6614 } 6615 6616 /* First clear the port interrupts status */ 6617 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6618 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 6619 port_intr_status); 6620 6621 /* Check the completed non-queued commands */ 6622 if (port_intr_status & (AHCI_INTR_STATUS_DHRS | 6623 AHCI_INTR_STATUS_PSS)) { 6624 (void) ahci_intr_cmd_cmplt(ahci_ctlp, 6625 ahci_portp, port); 6626 } 6627 6628 /* Check the completed queued commands */ 6629 if (port_intr_status & AHCI_INTR_STATUS_SDBS) { 6630 (void) ahci_intr_set_device_bits(ahci_ctlp, 6631 ahci_portp, port); 6632 } 6633 6634 /* Check the port connect change status interrupt bit */ 6635 if (port_intr_status & AHCI_INTR_STATUS_PCS) { 6636 (void) ahci_intr_port_connect_change(ahci_ctlp, 6637 ahci_portp, port); 6638 } 6639 6640 /* Check the device mechanical presence status interrupt bit */ 6641 if (port_intr_status & AHCI_INTR_STATUS_DMPS) { 6642 (void) ahci_intr_device_mechanical_presence_status( 6643 ahci_ctlp, ahci_portp, port); 6644 } 6645 6646 /* Check the PhyRdy change status interrupt bit */ 6647 if (port_intr_status & AHCI_INTR_STATUS_PRCS) { 6648 (void) ahci_intr_phyrdy_change(ahci_ctlp, ahci_portp, 6649 port); 6650 } 6651 6652 /* 6653 * Check the non-fatal error interrupt bits, there are four 6654 * kinds of non-fatal errors at the time being: 6655 * 6656 * PxIS.UFS - Unknown FIS Error 6657 * PxIS.OFS - Overflow Error 6658 * PxIS.INFS - Interface Non-Fatal Error 6659 * PxIS.IPMS - Incorrect Port Multiplier Status Error 6660 * 6661 * For these non-fatal errors, the HBA can continue to operate, 6662 * so the driver just log the error messages. 6663 */ 6664 if (port_intr_status & (AHCI_INTR_STATUS_UFS | 6665 AHCI_INTR_STATUS_OFS | 6666 AHCI_INTR_STATUS_IPMS | 6667 AHCI_INTR_STATUS_INFS)) { 6668 (void) ahci_intr_non_fatal_error(ahci_ctlp, ahci_portp, 6669 port, port_intr_status); 6670 } 6671 6672 /* 6673 * Check the fatal error interrupt bits, there are four kinds 6674 * of fatal errors for AHCI controllers: 6675 * 6676 * PxIS.HBFS - Host Bus Fatal Error 6677 * PxIS.HBDS - Host Bus Data Error 6678 * PxIS.IFS - Interface Fatal Error 6679 * PxIS.TFES - Task File Error 6680 * 6681 * The fatal error means the HBA can not recover from it by 6682 * itself, and it will try to abort the transfer, and the software 6683 * must intervene to restart the port. 6684 */ 6685 if (port_intr_status & (AHCI_INTR_STATUS_IFS | 6686 AHCI_INTR_STATUS_HBDS | 6687 AHCI_INTR_STATUS_HBFS | 6688 AHCI_INTR_STATUS_TFES)) 6689 (void) ahci_intr_fatal_error(ahci_ctlp, ahci_portp, 6690 port, port_intr_status); 6691 6692 /* Check the cold port detect interrupt bit */ 6693 if (port_intr_status & AHCI_INTR_STATUS_CPDS) { 6694 (void) ahci_intr_cold_port_detect(ahci_ctlp, ahci_portp, port); 6695 } 6696 6697 /* Second clear the corresponding bit in IS.IPS */ 6698 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6699 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp), (0x1 << port)); 6700 6701 /* Try to recover at the end of the interrupt handler. */ 6702 if (ahci_check_acc_handle(ahci_ctlp->ahcictl_ahci_acc_handle) != 6703 DDI_FM_OK) { 6704 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 6705 DDI_SERVICE_UNAFFECTED); 6706 ddi_fm_acc_err_clear(ahci_ctlp->ahcictl_ahci_acc_handle, 6707 DDI_FME_VERSION); 6708 } 6709 } 6710 6711 /* 6712 * Interrupt service handler 6713 */ 6714 static uint_t 6715 ahci_intr(caddr_t arg1, caddr_t arg2) 6716 { 6717 #ifndef __lock_lint 6718 _NOTE(ARGUNUSED(arg2)) 6719 #endif 6720 /* LINTED */ 6721 ahci_ctl_t *ahci_ctlp = (ahci_ctl_t *)arg1; 6722 ahci_port_t *ahci_portp; 6723 int32_t global_intr_status; 6724 uint8_t port; 6725 6726 /* 6727 * global_intr_status indicates that the corresponding port has 6728 * an interrupt pending. 6729 */ 6730 global_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6731 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp)); 6732 6733 if (!(global_intr_status & ahci_ctlp->ahcictl_ports_implemented)) { 6734 /* The interrupt is not ours */ 6735 return (DDI_INTR_UNCLAIMED); 6736 } 6737 6738 /* 6739 * Check the handle after reading global_intr_status - we don't want 6740 * to miss any port with pending interrupts. 6741 */ 6742 if (ahci_check_acc_handle(ahci_ctlp->ahcictl_ahci_acc_handle) != 6743 DDI_FM_OK) { 6744 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 6745 DDI_SERVICE_UNAFFECTED); 6746 ddi_fm_acc_err_clear(ahci_ctlp->ahcictl_ahci_acc_handle, 6747 DDI_FME_VERSION); 6748 return (DDI_INTR_UNCLAIMED); 6749 } 6750 6751 /* Loop for all the ports */ 6752 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 6753 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 6754 continue; 6755 } 6756 if (!((0x1 << port) & global_intr_status)) { 6757 continue; 6758 } 6759 6760 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 6761 6762 /* Call ahci_port_intr */ 6763 ahci_port_intr(ahci_ctlp, ahci_portp, port); 6764 } 6765 6766 return (DDI_INTR_CLAIMED); 6767 } 6768 6769 /* 6770 * For non-queued commands, when the corresponding bit in the PxCI register 6771 * is cleared, it means the command is completed successfully. And according 6772 * to the HBA state machine, there are three conditions which possibly will 6773 * try to clear the PxCI register bit. 6774 * 1. Receive one D2H Register FIS which is with 'I' bit set 6775 * 2. Update PIO Setup FIS 6776 * 3. Transmit a command and receive R_OK if CTBA.C is set (software reset) 6777 * 6778 * Process completed non-queued commands when the interrupt status bit - 6779 * AHCI_INTR_STATUS_DHRS or AHCI_INTR_STATUS_PSS is set. 6780 * 6781 * AHCI_INTR_STATUS_DHRS means a D2H Register FIS has been received 6782 * with the 'I' bit set. And the following commands will send thus 6783 * FIS with 'I' bit set upon the successful completion: 6784 * 1. Non-data commands 6785 * 2. DMA data-in command 6786 * 3. DMA data-out command 6787 * 4. PIO data-out command 6788 * 5. PACKET non-data commands 6789 * 6. PACKET PIO data-in command 6790 * 7. PACKET PIO data-out command 6791 * 8. PACKET DMA data-in command 6792 * 9. PACKET DMA data-out command 6793 * 6794 * AHCI_INTR_STATUS_PSS means a PIO Setup FIS has been received 6795 * with the 'I' bit set. And the following commands will send this 6796 * FIS upon the successful completion: 6797 * 1. PIO data-in command 6798 */ 6799 static int 6800 ahci_intr_cmd_cmplt(ahci_ctl_t *ahci_ctlp, 6801 ahci_port_t *ahci_portp, uint8_t port) 6802 { 6803 uint32_t port_cmd_issue = 0; 6804 uint32_t finished_tags; 6805 int finished_slot; 6806 sata_pkt_t *satapkt; 6807 ahci_fis_d2h_register_t *rcvd_fisp; 6808 #if AHCI_DEBUG 6809 ahci_cmd_header_t *cmd_header; 6810 uint32_t cmd_dmacount; 6811 #endif 6812 6813 mutex_enter(&ahci_portp->ahciport_mutex); 6814 6815 if (!ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 6816 !RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) && 6817 !NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 6818 /* 6819 * Spurious interrupt. Nothing to be done. 6820 */ 6821 mutex_exit(&ahci_portp->ahciport_mutex); 6822 return (AHCI_SUCCESS); 6823 } 6824 6825 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6826 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 6827 6828 /* If the PxCI corrupts, don't complete the commmands. */ 6829 if (ahci_check_acc_handle(ahci_ctlp->ahcictl_ahci_acc_handle) 6830 != DDI_FM_OK) { 6831 mutex_exit(&ahci_portp->ahciport_mutex); 6832 return (AHCI_FAILURE); 6833 } 6834 6835 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 6836 /* Slot 0 is always used during error recovery */ 6837 finished_tags = 0x1 & ~port_cmd_issue; 6838 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 6839 "ahci_intr_cmd_cmplt: port %d the sata pkt for error " 6840 "retrieval is finished, and finished_tags = 0x%x", 6841 port, finished_tags); 6842 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 6843 finished_tags = 0x1 & ~port_cmd_issue; 6844 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 6845 "ahci_intr_cmd_cmplt: port %d the sata pkt for r/w " 6846 "port multiplier is finished, and finished_tags = 0x%x", 6847 port, finished_tags); 6848 6849 } else { 6850 6851 finished_tags = ahci_portp->ahciport_pending_tags & 6852 ~port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp); 6853 } 6854 6855 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6856 "ahci_intr_cmd_cmplt: pending_tags = 0x%x, " 6857 "port_cmd_issue = 0x%x finished_tags = 0x%x", 6858 ahci_portp->ahciport_pending_tags, port_cmd_issue, 6859 finished_tags); 6860 6861 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 6862 (finished_tags == 0x1)) { 6863 satapkt = ahci_portp->ahciport_err_retri_pkt; 6864 ASSERT(satapkt != NULL); 6865 6866 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6867 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6868 "with SATA_PKT_COMPLETED", (void *)satapkt); 6869 6870 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6871 goto out; 6872 } 6873 6874 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) && 6875 (finished_tags == 0x1)) { 6876 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 6877 ASSERT(satapkt != NULL); 6878 6879 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6880 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6881 "with SATA_PKT_COMPLETED", (void *)satapkt); 6882 6883 /* READ PORTMULT need copy out FIS content. */ 6884 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 6885 rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 6886 ahcirf_d2h_register_fis); 6887 satapkt->satapkt_cmd.satacmd_status_reg = 6888 GET_RFIS_STATUS(rcvd_fisp); 6889 ahci_copy_out_regs(&satapkt->satapkt_cmd, rcvd_fisp); 6890 } 6891 6892 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6893 goto out; 6894 } 6895 6896 while (finished_tags) { 6897 finished_slot = ddi_ffs(finished_tags) - 1; 6898 if (finished_slot == -1) { 6899 goto out; 6900 } 6901 6902 satapkt = ahci_portp->ahciport_slot_pkts[finished_slot]; 6903 ASSERT(satapkt != NULL); 6904 #if AHCI_DEBUG 6905 /* 6906 * For non-native queued commands, the PRD byte count field 6907 * shall contain an accurate count of the number of bytes 6908 * transferred for the command before the PxCI bit is cleared 6909 * to '0' for the command. 6910 * 6911 * The purpose of this field is to let software know how many 6912 * bytes transferred for a given operation in order to 6913 * determine if underflow occurred. When issuing native command 6914 * queuing commands, this field should not be used and is not 6915 * required to be valid since in this case underflow is always 6916 * illegal. 6917 * 6918 * For data reads, the HBA will update its PRD byte count with 6919 * the total number of bytes received from the last FIS, and 6920 * may be able to continue normally. For data writes, the 6921 * device will detect an error, and HBA most likely will get 6922 * a fatal error. 6923 * 6924 * Therefore, here just put code to debug part. And please 6925 * refer to the comment above ahci_intr_fatal_error for the 6926 * definition of underflow error. 6927 */ 6928 cmd_dmacount = 6929 ahci_portp->ahciport_prd_bytecounts[finished_slot]; 6930 if (cmd_dmacount) { 6931 cmd_header = 6932 &ahci_portp->ahciport_cmd_list[finished_slot]; 6933 AHCIDBG(AHCIDBG_INTR|AHCIDBG_PRDT, ahci_ctlp, 6934 "ahci_intr_cmd_cmplt: port %d, " 6935 "PRD Byte Count = 0x%x, " 6936 "ahciport_prd_bytecounts = 0x%x", port, 6937 cmd_header->ahcich_prd_byte_count, 6938 cmd_dmacount); 6939 6940 if (cmd_header->ahcich_prd_byte_count != cmd_dmacount) { 6941 AHCIDBG(AHCIDBG_UNDERFLOW, ahci_ctlp, 6942 "ahci_intr_cmd_cmplt: port %d, " 6943 "an underflow occurred", port); 6944 } 6945 } 6946 #endif 6947 6948 /* 6949 * For SATAC_SMART command with SATA_SMART_RETURN_STATUS 6950 * feature, sata_special_regs flag will be set, and the 6951 * driver should copy the status and the other corresponding 6952 * register values in the D2H Register FIS received (It's 6953 * working on Non-data protocol) from the device back to 6954 * the sata_cmd. 6955 * 6956 * For every AHCI port, there is only one Received FIS 6957 * structure, which contains the FISes received from the 6958 * device, So we're trying to copy the content of D2H 6959 * Register FIS in the Received FIS structure back to 6960 * the sata_cmd. 6961 */ 6962 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 6963 rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 6964 ahcirf_d2h_register_fis); 6965 satapkt->satapkt_cmd.satacmd_status_reg = 6966 GET_RFIS_STATUS(rcvd_fisp); 6967 ahci_copy_out_regs(&satapkt->satapkt_cmd, rcvd_fisp); 6968 } 6969 6970 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6971 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6972 "with SATA_PKT_COMPLETED", (void *)satapkt); 6973 6974 CLEAR_BIT(ahci_portp->ahciport_pending_tags, finished_slot); 6975 CLEAR_BIT(finished_tags, finished_slot); 6976 ahci_portp->ahciport_slot_pkts[finished_slot] = NULL; 6977 6978 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6979 } 6980 out: 6981 AHCIDBG(AHCIDBG_PKTCOMP, ahci_ctlp, 6982 "ahci_intr_cmd_cmplt: pending_tags = 0x%x", 6983 ahci_portp->ahciport_pending_tags); 6984 6985 ahci_flush_doneq(ahci_portp); 6986 6987 mutex_exit(&ahci_portp->ahciport_mutex); 6988 6989 return (AHCI_SUCCESS); 6990 } 6991 6992 /* 6993 * AHCI_INTR_STATUS_SDBS means a Set Device Bits FIS has been received 6994 * with the 'I' bit set and has been copied into system memory. It will 6995 * be sent under the following situations: 6996 * 6997 * 1. NCQ command is completed 6998 * 6999 * The completion of NCQ commands (READ/WRITE FPDMA QUEUED) is performed 7000 * via the Set Device Bits FIS. When such event is generated, the software 7001 * needs to read PxSACT register and compares the current value to the 7002 * list of commands previously issue by software. ahciport_pending_ncq_tags 7003 * keeps the tags of previously issued commands. 7004 * 7005 * 2. Asynchronous Notification 7006 * 7007 * Asynchronous Notification is a feature in SATA spec 2.6. 7008 * 7009 * 1) ATAPI device will send a signal to the host when media is inserted or 7010 * removed and avoids polling the device for media changes. The signal 7011 * sent to the host is a Set Device Bits FIS with the 'I' and 'N' bits 7012 * set to '1'. At the moment, it's not supported yet. 7013 * 7014 * 2) Port multiplier will send a signal to the host when a hot plug event 7015 * has occured on a port multiplier port. It is used when command based 7016 * switching is employed. This is handled by ahci_intr_pmult_sntf_events() 7017 */ 7018 static int 7019 ahci_intr_set_device_bits(ahci_ctl_t *ahci_ctlp, 7020 ahci_port_t *ahci_portp, uint8_t port) 7021 { 7022 ahci_addr_t addr; 7023 7024 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 7025 "ahci_intr_set_device_bits enter: port %d", port); 7026 7027 /* Initialize HBA port address */ 7028 AHCI_ADDR_SET_PORT(&addr, port); 7029 7030 /* NCQ plug handler */ 7031 (void) ahci_intr_ncq_events(ahci_ctlp, ahci_portp, &addr); 7032 7033 /* Check port multiplier's asynchronous notification events */ 7034 if (ahci_ctlp->ahcictl_cap & AHCI_CAP_SNTF) { 7035 (void) ahci_intr_pmult_sntf_events(ahci_ctlp, 7036 ahci_portp, port); 7037 } 7038 7039 /* ATAPI events is not supported yet */ 7040 7041 return (AHCI_SUCCESS); 7042 } 7043 /* 7044 * NCQ interrupt handler. Called upon a NCQ command is completed. 7045 * Only be called from ahci_intr_set_device_bits(). 7046 * 7047 * WARNING!!! ahciport_mutex should be acquired before the function is 7048 * called. 7049 */ 7050 static int 7051 ahci_intr_ncq_events(ahci_ctl_t *ahci_ctlp, 7052 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 7053 { 7054 uint32_t port_sactive; 7055 uint32_t port_cmd_issue; 7056 uint32_t issued_tags; 7057 int issued_slot; 7058 uint32_t finished_tags; 7059 int finished_slot; 7060 uint8_t port = addrp->aa_port; 7061 sata_pkt_t *satapkt; 7062 7063 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 7064 "ahci_intr_set_device_bits enter: port %d", port); 7065 7066 mutex_enter(&ahci_portp->ahciport_mutex); 7067 if (!NCQ_CMD_IN_PROGRESS(ahci_portp)) { 7068 mutex_exit(&ahci_portp->ahciport_mutex); 7069 return (AHCI_SUCCESS); 7070 } 7071 7072 /* 7073 * First the handler got which commands are finished by checking 7074 * PxSACT register 7075 */ 7076 port_sactive = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7077 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 7078 7079 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 7080 ~port_sactive & AHCI_NCQ_SLOT_MASK(ahci_portp); 7081 7082 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 7083 "ahci_intr_set_device_bits: port %d pending_ncq_tags = 0x%x " 7084 "port_sactive = 0x%x", port, 7085 ahci_portp->ahciport_pending_ncq_tags, port_sactive); 7086 7087 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 7088 "ahci_intr_set_device_bits: finished_tags = 0x%x", finished_tags); 7089 7090 /* 7091 * For NCQ commands, the software can determine which command has 7092 * already been transmitted to the device by checking PxCI register. 7093 */ 7094 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7095 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 7096 7097 issued_tags = ahci_portp->ahciport_pending_tags & 7098 ~port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp); 7099 7100 /* If the PxSACT/PxCI corrupts, don't complete the NCQ commmands. */ 7101 if (ahci_check_acc_handle(ahci_ctlp->ahcictl_ahci_acc_handle) 7102 != DDI_FM_OK) { 7103 mutex_exit(&ahci_portp->ahciport_mutex); 7104 return (AHCI_FAILURE); 7105 } 7106 7107 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 7108 "ahci_intr_set_device_bits: port %d pending_tags = 0x%x " 7109 "port_cmd_issue = 0x%x", port, 7110 ahci_portp->ahciport_pending_tags, port_cmd_issue); 7111 7112 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 7113 "ahci_intr_set_device_bits: issued_tags = 0x%x", issued_tags); 7114 7115 /* 7116 * Clear ahciport_pending_tags bit when the corresponding command 7117 * is already sent down to the device. 7118 */ 7119 while (issued_tags) { 7120 issued_slot = ddi_ffs(issued_tags) - 1; 7121 if (issued_slot == -1) { 7122 goto next; 7123 } 7124 CLEAR_BIT(ahci_portp->ahciport_pending_tags, issued_slot); 7125 CLEAR_BIT(issued_tags, issued_slot); 7126 } 7127 7128 next: 7129 while (finished_tags) { 7130 finished_slot = ddi_ffs(finished_tags) - 1; 7131 if (finished_slot == -1) { 7132 goto out; 7133 } 7134 7135 /* The command is certainly transmitted to the device */ 7136 ASSERT(!(ahci_portp->ahciport_pending_tags & 7137 (0x1 << finished_slot))); 7138 7139 satapkt = ahci_portp->ahciport_slot_pkts[finished_slot]; 7140 ASSERT(satapkt != NULL); 7141 7142 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 7143 "ahci_intr_set_device_bits: sending up pkt 0x%p " 7144 "with SATA_PKT_COMPLETED", (void *)satapkt); 7145 7146 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, finished_slot); 7147 CLEAR_BIT(finished_tags, finished_slot); 7148 ahci_portp->ahciport_slot_pkts[finished_slot] = NULL; 7149 7150 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_COMPLETED); 7151 } 7152 out: 7153 AHCIDBG(AHCIDBG_PKTCOMP|AHCIDBG_NCQ, ahci_ctlp, 7154 "ahci_intr_set_device_bits: port %d " 7155 "pending_ncq_tags = 0x%x pending_tags = 0x%x", 7156 port, ahci_portp->ahciport_pending_ncq_tags, 7157 ahci_portp->ahciport_pending_tags); 7158 7159 ahci_flush_doneq(ahci_portp); 7160 7161 mutex_exit(&ahci_portp->ahciport_mutex); 7162 7163 return (AHCI_SUCCESS); 7164 } 7165 7166 /* 7167 * Port multiplier asynchronous notification event handler. Called upon a 7168 * device is hot plugged/pulled. 7169 * 7170 * The async-notification event will only be recorded by ahcipmi_snotif_tags 7171 * here and will be handled by ahci_probe_pmult(). 7172 * 7173 * NOTE: called only from ahci_port_intr(). 7174 */ 7175 static int 7176 ahci_intr_pmult_sntf_events(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 7177 uint8_t port) 7178 { 7179 sata_device_t sdevice; 7180 7181 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 7182 "ahci_intr_pmult_sntf_events enter: port %d ", port); 7183 7184 /* no hot-plug while attaching process */ 7185 mutex_enter(&ahci_ctlp->ahcictl_mutex); 7186 if (ahci_ctlp->ahcictl_flags & AHCI_ATTACH) { 7187 mutex_exit(&ahci_ctlp->ahcictl_mutex); 7188 return (AHCI_SUCCESS); 7189 } 7190 mutex_exit(&ahci_ctlp->ahcictl_mutex); 7191 7192 mutex_enter(&ahci_portp->ahciport_mutex); 7193 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 7194 mutex_exit(&ahci_portp->ahciport_mutex); 7195 return (AHCI_SUCCESS); 7196 } 7197 7198 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 7199 7200 ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags = 7201 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7202 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port)); 7203 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7204 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 7205 AHCI_SNOTIF_CLEAR_ALL); 7206 7207 if (ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags == 0) { 7208 mutex_exit(&ahci_portp->ahciport_mutex); 7209 return (AHCI_SUCCESS); 7210 } 7211 7212 /* Port Multiplier sub-device hot-plug handler */ 7213 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 7214 mutex_exit(&ahci_portp->ahciport_mutex); 7215 return (AHCI_SUCCESS); 7216 } 7217 7218 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_PMULT_SNTF) { 7219 /* Not allowed to re-enter. */ 7220 mutex_exit(&ahci_portp->ahciport_mutex); 7221 return (AHCI_SUCCESS); 7222 } 7223 7224 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_PMULT_SNTF; 7225 7226 /* 7227 * NOTE: 7228 * Even if Asynchronous Notification is supported (and enabled) by 7229 * both controller and the port multiplier, the content of PxSNTF 7230 * register is always set to 0x8000 by async notification event. We 7231 * need to check GSCR[32] on the port multiplier to find out the 7232 * owner of this event. 7233 * This is not accord with SATA spec 2.6 and needs further 7234 * clarification. 7235 */ 7236 /* hot-plug will not reported while reseting. */ 7237 if (ahci_portp->ahciport_reset_in_progress == 1) { 7238 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 7239 "port %d snotif event ignored", port); 7240 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_PMULT_SNTF; 7241 mutex_exit(&ahci_portp->ahciport_mutex); 7242 return (AHCI_SUCCESS); 7243 } 7244 7245 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 7246 "PxSNTF is set to 0x%x by port multiplier", 7247 ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags); 7248 7249 /* 7250 * Now we need do some necessary operation and inform SATA framework 7251 * that link/device events has happened. 7252 */ 7253 bzero((void *)&sdevice, sizeof (sata_device_t)); 7254 sdevice.satadev_addr.cport = ahci_ctlp-> 7255 ahcictl_port_to_cport[port]; 7256 sdevice.satadev_addr.pmport = SATA_PMULT_HOSTPORT; 7257 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 7258 sdevice.satadev_state = SATA_PSTATE_PWRON; 7259 7260 /* Just reject packets, do not stop that port. */ 7261 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 7262 7263 mutex_exit(&ahci_portp->ahciport_mutex); 7264 sata_hba_event_notify( 7265 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7266 &sdevice, 7267 SATA_EVNT_PMULT_LINK_CHANGED); 7268 mutex_enter(&ahci_portp->ahciport_mutex); 7269 7270 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_PMULT_SNTF; 7271 mutex_exit(&ahci_portp->ahciport_mutex); 7272 7273 return (AHCI_SUCCESS); 7274 } 7275 7276 /* 7277 * 1=Change in Current Connect Status. 0=No change in Current Connect Status. 7278 * This bit reflects the state of PxSERR.DIAG.X. This bit is only cleared 7279 * when PxSERR.DIAG.X is cleared. When PxSERR.DIAG.X is set to one, it 7280 * indicates a COMINIT signal was received. 7281 * 7282 * Hot plug insertion is detected by reception of a COMINIT signal from the 7283 * device. On reception of unsolicited COMINIT, the HBA shall generate a 7284 * COMRESET. If the COMINIT is in responce to a COMRESET, then the HBA shall 7285 * begin the normal communication negotiation sequence as outlined in the 7286 * Serial ATA 1.0a specification. When a COMRESET is sent to the device the 7287 * PxSSTS.DET field shall be cleared to 0h. When a COMINIT is received, the 7288 * PxSSTS.DET field shall be set to 1h. When the communication negotiation 7289 * sequence is complete and PhyRdy is true the PxSSTS.DET field shall be set 7290 * to 3h. Therefore, at the moment the ahci driver is going to check PhyRdy 7291 * to handle hot plug insertion. In this interrupt handler, just do nothing 7292 * but print some log message and clear the bit. 7293 */ 7294 static int 7295 ahci_intr_port_connect_change(ahci_ctl_t *ahci_ctlp, 7296 ahci_port_t *ahci_portp, uint8_t port) 7297 { 7298 #if AHCI_DEBUG 7299 uint32_t port_serror; 7300 #endif 7301 7302 mutex_enter(&ahci_portp->ahciport_mutex); 7303 7304 #if AHCI_DEBUG 7305 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7306 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 7307 7308 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 7309 "ahci_intr_port_connect_change: port %d, " 7310 "port_serror = 0x%x", port, port_serror); 7311 #endif 7312 7313 /* Clear PxSERR.DIAG.X to clear the interrupt bit */ 7314 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7315 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 7316 SERROR_EXCHANGED_ERR); 7317 7318 mutex_exit(&ahci_portp->ahciport_mutex); 7319 7320 return (AHCI_SUCCESS); 7321 } 7322 7323 /* 7324 * Hot Plug Operation for platforms that support Mechanical Presence 7325 * Switches. 7326 * 7327 * When set, it indicates that a mechanical presence switch attached to this 7328 * port has been opened or closed, which may lead to a change in the connection 7329 * state of the device. This bit is only valid if both CAP.SMPS and PxCMD.MPSP 7330 * are set to '1'. 7331 * 7332 * At the moment, this interrupt is not needed and disabled and we just log 7333 * the debug message. 7334 */ 7335 static int 7336 ahci_intr_device_mechanical_presence_status(ahci_ctl_t *ahci_ctlp, 7337 ahci_port_t *ahci_portp, uint8_t port) 7338 { 7339 uint32_t cap_status, port_cmd_status; 7340 7341 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 7342 "ahci_intr_device_mechanical_presence_status enter, " 7343 "port %d", port); 7344 7345 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7346 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 7347 7348 mutex_enter(&ahci_portp->ahciport_mutex); 7349 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7350 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7351 7352 if (!(cap_status & AHCI_HBA_CAP_SMPS) || 7353 !(port_cmd_status & AHCI_CMD_STATUS_MPSP)) { 7354 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7355 "CAP.SMPS or PxCMD.MPSP is not set, so just ignore " 7356 "the interrupt: cap_status = 0x%x, " 7357 "port_cmd_status = 0x%x", cap_status, port_cmd_status); 7358 mutex_exit(&ahci_portp->ahciport_mutex); 7359 7360 return (AHCI_SUCCESS); 7361 } 7362 7363 #if AHCI_DEBUG 7364 if (port_cmd_status & AHCI_CMD_STATUS_MPSS) { 7365 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7366 "The mechanical presence switch is open: " 7367 "port %d, port_cmd_status = 0x%x", 7368 port, port_cmd_status); 7369 } else { 7370 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7371 "The mechanical presence switch is close: " 7372 "port %d, port_cmd_status = 0x%x", 7373 port, port_cmd_status); 7374 } 7375 #endif 7376 7377 mutex_exit(&ahci_portp->ahciport_mutex); 7378 7379 return (AHCI_SUCCESS); 7380 } 7381 7382 /* 7383 * Native Hot Plug Support. 7384 * 7385 * When set, it indicates that the internal PHYRDY signal changed state. 7386 * This bit reflects the state of PxSERR.DIAG.N. 7387 * 7388 * There are three kinds of conditions to generate this interrupt event: 7389 * 1. a device is inserted 7390 * 2. a device is disconnected 7391 * 3. when the link enters/exits a Partial or Slumber interface power 7392 * management state 7393 * 7394 * If inteface power management is enabled for a port, the PxSERR.DIAG.N 7395 * bit may be set due to the link entering the Partial or Slumber power 7396 * management state, rather than due to a hot plug insertion or removal 7397 * event. So far, the interface power management is disabled, so the 7398 * driver can reliably get removal detection notification via the 7399 * PxSERR.DIAG.N bit. 7400 */ 7401 static int 7402 ahci_intr_phyrdy_change(ahci_ctl_t *ahci_ctlp, 7403 ahci_port_t *ahci_portp, uint8_t port) 7404 { 7405 uint32_t port_sstatus = 0; /* No dev present & PHY not established. */ 7406 sata_device_t sdevice; 7407 int dev_exists_now = 0; 7408 int dev_existed_previously = 0; 7409 ahci_addr_t port_addr; 7410 7411 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 7412 "ahci_intr_phyrdy_change enter, port %d", port); 7413 7414 /* Clear PxSERR.DIAG.N to clear the interrupt bit */ 7415 mutex_enter(&ahci_portp->ahciport_mutex); 7416 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7417 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 7418 SERROR_PHY_RDY_CHG); 7419 mutex_exit(&ahci_portp->ahciport_mutex); 7420 7421 mutex_enter(&ahci_ctlp->ahcictl_mutex); 7422 if ((ahci_ctlp->ahcictl_sata_hba_tran == NULL) || 7423 (ahci_portp == NULL)) { 7424 /* The whole controller setup is not yet done. */ 7425 mutex_exit(&ahci_ctlp->ahcictl_mutex); 7426 return (AHCI_SUCCESS); 7427 } 7428 mutex_exit(&ahci_ctlp->ahcictl_mutex); 7429 7430 mutex_enter(&ahci_portp->ahciport_mutex); 7431 7432 /* SStatus tells the presence of device. */ 7433 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7434 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 7435 7436 if (SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_PHYCOM) { 7437 dev_exists_now = 1; 7438 } 7439 7440 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) { 7441 dev_existed_previously = 1; 7442 } 7443 7444 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_NODEV) { 7445 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_NODEV; 7446 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7447 "ahci_intr_phyrdy_change: port %d " 7448 "AHCI_PORT_FLAG_NODEV is cleared", port); 7449 if (dev_exists_now == 0) 7450 dev_existed_previously = 1; 7451 } 7452 7453 bzero((void *)&sdevice, sizeof (sata_device_t)); 7454 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 7455 sdevice.satadev_addr.qual = SATA_ADDR_CPORT; 7456 sdevice.satadev_addr.pmport = 0; 7457 sdevice.satadev_state = SATA_PSTATE_PWRON; 7458 ahci_portp->ahciport_port_state = SATA_PSTATE_PWRON; 7459 7460 AHCI_ADDR_SET_PORT(&port_addr, port); 7461 7462 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_HOTPLUG; 7463 if (dev_exists_now) { 7464 if (dev_existed_previously) { /* 1 -> 1 */ 7465 /* Things are fine now. The loss was temporary. */ 7466 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7467 "ahci_intr_phyrdy_change port %d " 7468 "device link lost/established", port); 7469 7470 mutex_exit(&ahci_portp->ahciport_mutex); 7471 sata_hba_event_notify( 7472 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7473 &sdevice, 7474 SATA_EVNT_LINK_LOST|SATA_EVNT_LINK_ESTABLISHED); 7475 mutex_enter(&ahci_portp->ahciport_mutex); 7476 7477 } else { /* 0 -> 1 */ 7478 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7479 "ahci_intr_phyrdy_change: port %d " 7480 "device link established", port); 7481 7482 /* 7483 * A new device has been detected. The new device 7484 * might be a port multiplier instead of a drive, so 7485 * we cannot update the signature directly. 7486 */ 7487 (void) ahci_initialize_port(ahci_ctlp, 7488 ahci_portp, &port_addr); 7489 7490 /* Try to start the port */ 7491 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 7492 != AHCI_SUCCESS) { 7493 sdevice.satadev_state |= SATA_PSTATE_FAILED; 7494 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7495 "ahci_intr_phyrdy_change: port %d failed " 7496 "at start port", port); 7497 } 7498 7499 /* Clear the max queue depth for inserted device */ 7500 ahci_portp->ahciport_max_ncq_tags = 0; 7501 7502 mutex_exit(&ahci_portp->ahciport_mutex); 7503 sata_hba_event_notify( 7504 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7505 &sdevice, 7506 SATA_EVNT_LINK_ESTABLISHED); 7507 mutex_enter(&ahci_portp->ahciport_mutex); 7508 7509 } 7510 } else { /* No device exists now */ 7511 7512 if (dev_existed_previously) { /* 1 -> 0 */ 7513 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7514 "ahci_intr_phyrdy_change: port %d " 7515 "device link lost", port); 7516 7517 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 7518 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 7519 ahci_portp, port); 7520 7521 if (ahci_portp->ahciport_device_type == 7522 SATA_DTYPE_PMULT) { 7523 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 7524 } 7525 7526 /* An existing device is lost. */ 7527 ahci_portp->ahciport_device_type = SATA_DTYPE_NONE; 7528 ahci_portp->ahciport_port_state = SATA_STATE_UNKNOWN; 7529 7530 mutex_exit(&ahci_portp->ahciport_mutex); 7531 sata_hba_event_notify( 7532 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7533 &sdevice, 7534 SATA_EVNT_LINK_LOST); 7535 mutex_enter(&ahci_portp->ahciport_mutex); 7536 } 7537 } 7538 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_HOTPLUG; 7539 7540 mutex_exit(&ahci_portp->ahciport_mutex); 7541 7542 return (AHCI_SUCCESS); 7543 } 7544 7545 /* 7546 * PxIS.UFS - Unknown FIS Error 7547 * 7548 * This interrupt event means an unknown FIS was received and has been 7549 * copied into system memory. An unknown FIS is not considered an illegal 7550 * FIS, unless the length received is more than 64 bytes. If an unknown 7551 * FIS arrives with length <= 64 bytes, it is posted and the HBA continues 7552 * normal operation. If the unknown FIS is more than 64 bytes, then it 7553 * won't be posted to memory and PxSERR.ERR.P will be set, which is then 7554 * a fatal error. 7555 * 7556 * PxIS.IPMS - Incorrect Port Multiplier Status 7557 * 7558 * IPMS Indicates that the HBA received a FIS from a device that did not 7559 * have a command outstanding. The IPMS bit may be set during enumeration 7560 * of devices on a Port Multiplier due to the normal Port Multiplier 7561 * enumeration process. It is recommended that IPMS only be used after 7562 * enumeration is complete on the Port Multiplier (copied from spec). 7563 * 7564 * PxIS.OFS - Overflow Error 7565 * 7566 * Command list overflow is defined as software building a command table 7567 * that has fewer total bytes than the transaction given to the device. 7568 * On device writes, the HBA will run out of data, and on reads, there 7569 * will be no room to put the data. 7570 * 7571 * For an overflow on data read, either PIO or DMA, the HBA will set 7572 * PxIS.OFS, and the HBA will do a best effort to continue, and it's a 7573 * non-fatal error when the HBA can continues. Sometimes, it will cause 7574 * a fatal error and need the software to do something. 7575 * 7576 * For an overflow on data write, setting PxIS.OFS is optional for both 7577 * DMA and PIO, and it's a fatal error, and a COMRESET is required by 7578 * software to clean up from this serious error. 7579 * 7580 * PxIS.INFS - Interface Non-Fatal Error 7581 * 7582 * This interrupt event indicates that the HBA encountered an error on 7583 * the Serial ATA interface but was able to continue operation. The kind 7584 * of error usually occurred during a non-Data FIS, and under this condition 7585 * the FIS will be re-transmitted by HBA automatically. 7586 * 7587 * When the FMA is implemented, there should be a stat structure to 7588 * record how many every kind of error happens. 7589 */ 7590 static int 7591 ahci_intr_non_fatal_error(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 7592 uint8_t port, uint32_t intr_status) 7593 { 7594 uint32_t port_serror; 7595 #if AHCI_DEBUG 7596 uint32_t port_cmd_status; 7597 uint32_t port_cmd_issue; 7598 uint32_t port_sactive; 7599 int current_slot; 7600 uint32_t current_tags; 7601 sata_pkt_t *satapkt; 7602 ahci_cmd_header_t *cmd_header; 7603 uint32_t cmd_dmacount; 7604 #endif 7605 7606 mutex_enter(&ahci_portp->ahciport_mutex); 7607 7608 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7609 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 7610 7611 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY|AHCIDBG_ERRS, ahci_ctlp, 7612 "ahci_intr_non_fatal_error: port %d, " 7613 "PxSERR = 0x%x, PxIS = 0x%x ", port, port_serror, intr_status); 7614 7615 ahci_log_serror_message(ahci_ctlp, port, port_serror, 1); 7616 7617 if (intr_status & AHCI_INTR_STATUS_UFS) { 7618 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7619 "ahci port %d has unknown FIS error", port); 7620 7621 /* Clear the interrupt bit by clearing PxSERR.DIAG.F */ 7622 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7623 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 7624 SERROR_FIS_TYPE); 7625 } 7626 7627 #if AHCI_DEBUG 7628 if (intr_status & AHCI_INTR_STATUS_IPMS) { 7629 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci port %d " 7630 "has Incorrect Port Multiplier Status error", port); 7631 } 7632 7633 if (intr_status & AHCI_INTR_STATUS_OFS) { 7634 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7635 "ahci port %d has overflow error", port); 7636 } 7637 7638 if (intr_status & AHCI_INTR_STATUS_INFS) { 7639 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7640 "ahci port %d has interface non fatal error", port); 7641 } 7642 7643 /* 7644 * Record the error occurred command's slot. 7645 */ 7646 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 7647 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 7648 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7649 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7650 7651 current_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 7652 AHCI_CMD_STATUS_CCS_SHIFT; 7653 7654 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 7655 satapkt = ahci_portp->ahciport_err_retri_pkt; 7656 ASSERT(satapkt != NULL); 7657 ASSERT(current_slot == 0); 7658 } else { 7659 satapkt = ahci_portp->ahciport_slot_pkts[current_slot]; 7660 } 7661 7662 if (satapkt != NULL) { 7663 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7664 "ahci_intr_non_fatal_error: pending_tags = 0x%x " 7665 "cmd 0x%x", ahci_portp->ahciport_pending_tags, 7666 satapkt->satapkt_cmd.satacmd_cmd_reg); 7667 7668 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7669 "ahci_intr_non_fatal_error: port %d, " 7670 "satapkt 0x%p is being processed when error occurs", 7671 port, (void *)satapkt); 7672 7673 /* 7674 * PRD Byte Count field of command header is not 7675 * required to reflect the total number of bytes 7676 * transferred when an overflow occurs, so here 7677 * just log the value. 7678 */ 7679 cmd_dmacount = 7680 ahci_portp->ahciport_prd_bytecounts[current_slot]; 7681 if (cmd_dmacount) { 7682 cmd_header = &ahci_portp-> 7683 ahciport_cmd_list[current_slot]; 7684 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7685 "ahci_intr_non_fatal_error: port %d, " 7686 "PRD Byte Count = 0x%x, " 7687 "ahciport_prd_bytecounts = 0x%x", port, 7688 cmd_header->ahcich_prd_byte_count, 7689 cmd_dmacount); 7690 } 7691 } 7692 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 7693 /* 7694 * For queued command, list those command which have already 7695 * been transmitted to the device and still not completed. 7696 */ 7697 port_sactive = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7698 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 7699 7700 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7701 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 7702 7703 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ|AHCIDBG_ERRS, ahci_ctlp, 7704 "ahci_intr_non_fatal_error: pending_ncq_tags = 0x%x " 7705 "port_sactive = 0x%x port_cmd_issue = 0x%x", 7706 ahci_portp->ahciport_pending_ncq_tags, 7707 port_sactive, port_cmd_issue); 7708 7709 current_tags = ahci_portp->ahciport_pending_ncq_tags & 7710 port_sactive & ~port_cmd_issue & 7711 AHCI_NCQ_SLOT_MASK(ahci_portp); 7712 7713 while (current_tags) { 7714 current_slot = ddi_ffs(current_tags) - 1; 7715 if (current_slot == -1) { 7716 goto out; 7717 } 7718 7719 satapkt = ahci_portp->ahciport_slot_pkts[current_slot]; 7720 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ|AHCIDBG_ERRS, 7721 ahci_ctlp, "ahci_intr_non_fatal_error: " 7722 "port %d, satapkt 0x%p is outstanding when " 7723 "error occurs", port, (void *)satapkt); 7724 7725 CLEAR_BIT(current_tags, current_slot); 7726 } 7727 } 7728 out: 7729 #endif 7730 mutex_exit(&ahci_portp->ahciport_mutex); 7731 7732 return (AHCI_SUCCESS); 7733 } 7734 7735 /* 7736 * According to the AHCI spec, the error types include system memory 7737 * errors, interface errors, port multiplier errors, device errors, 7738 * command list overflow, command list underflow, native command 7739 * queuing tag errors and pio data transfer errors. 7740 * 7741 * System memory errors such as target abort, master abort, and parity 7742 * may cause the host to stop, and they are serious errors and needed 7743 * to be recovered with software intervention. When system software 7744 * has given a pointer to the HBA that doesn't exist in physical memory, 7745 * a master/target abort error occurs, and PxIS.HBFS will be set. A 7746 * data error such as CRC or parity occurs, the HBA aborts the transfer 7747 * (if necessary) and PxIS.HBDS will be set. 7748 * 7749 * Interface errors are errors that occur due to electrical issues on 7750 * the interface, or protocol miscommunication between the device and 7751 * HBA, and the respective PxSERR register bit will be set. And PxIS.IFS 7752 * (fatal) or PxIS.INFS (non-fatal) will be set. The conditions that 7753 * causes PxIS.IFS/PxIS.INFS to be set are 7754 * 1. in PxSERR.ERR, P bit is set to '1' 7755 * 2. in PxSERR.DIAG, C or H bit is set to '1' 7756 * 3. PhyRdy drop unexpectly, N bit is set to '1' 7757 * If the error occurred during a non-data FIS, the FIS must be 7758 * retransmitted, and the error is non-fatal and PxIS.INFS is set. If 7759 * the error occurred during a data FIS, the transfer will stop, so 7760 * the error is fatal and PxIS.IFS is set. 7761 * 7762 * When a FIS arrives that updates the taskfile, the HBA checks to see 7763 * if PxTFD.STS.ERR is set. If yes, PxIS.TFES will be set and the HBA 7764 * stops processing any more commands. 7765 * 7766 * Command list overflow is defined as software building a command table 7767 * that has fewer total bytes than the transaction given to the device. 7768 * On device writes, the HBA will run out of data, and on reads, there 7769 * will be no room to put the data. For an overflow on data read, either 7770 * PIO or DMA, the HBA will set PxIS.OFS, and it's a non-fatal error. 7771 * For an overflow on data write, setting PxIS.OFS is optional for both 7772 * DMA and PIO, and a COMRESET is required by software to clean up from 7773 * this serious error. 7774 * 7775 * Command list underflow is defined as software building a command 7776 * table that has more total bytes than the transaction given to the 7777 * device. For data writes, both PIO and DMA, the device will detect 7778 * an error and end the transfer. And these errors are most likely going 7779 * to be fatal errors that will cause the port to be restarted. For 7780 * data reads, the HBA updates its PRD byte count, and may be 7781 * able to continue normally, but is not required to. And The HBA is 7782 * not required to detect underflow conditions for native command 7783 * queuing command. 7784 * 7785 * The HBA does not actively check incoming DMA Setup FISes to ensure 7786 * that the PxSACT register bit for that slot is set. Existing error 7787 * mechanisms, such as host bus failure, or bad protocol, are used to 7788 * recover from this case. 7789 * 7790 * In accordance with Serial ATA 1.0a, DATA FISes prior to the final 7791 * DATA FIS must be an integral number of Dwords. If the HBA receives 7792 * a request which is not an integral number of Dwords, the HBA 7793 * set PxSERR.ERR.P to '1', set PxIS.IFS to '1' and stop running until 7794 * software restarts the port. And the HBA ensures that the size 7795 * of the DATA FIS received during a PIO command matches the size in 7796 * the Transfer Cound field of the preceding PIO Setup FIS, if not, the 7797 * HBA sets PxSERR.ERR.P to '1', set PxIS.IFS to '1', and then 7798 * stop running until software restarts the port. 7799 */ 7800 /* 7801 * the fatal errors include PxIS.IFS, PxIS.HBDS, PxIS.HBFS and PxIS.TFES. 7802 * 7803 * PxIS.IFS indicates that the hba encountered an error on the serial ata 7804 * interface which caused the transfer to stop. 7805 * 7806 * PxIS.HBDS indicates that the hba encountered a data error 7807 * (uncorrectable ecc/parity) when reading from or writing to system memory. 7808 * 7809 * PxIS.HBFS indicates that the hba encountered a host bus error that it 7810 * cannot recover from, such as a bad software pointer. 7811 * 7812 * PxIS.TFES is set whenever the status register is updated by the device 7813 * and the error bit (bit 0) is set. 7814 */ 7815 static int 7816 ahci_intr_fatal_error(ahci_ctl_t *ahci_ctlp, 7817 ahci_port_t *ahci_portp, uint8_t port, uint32_t intr_status) 7818 { 7819 uint32_t port_cmd_status; 7820 uint32_t port_serror; 7821 uint32_t task_file_status; 7822 int failed_slot; 7823 sata_pkt_t *spkt = NULL; 7824 uint8_t err_byte; 7825 ahci_event_arg_t *args; 7826 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 7827 uint32_t failed_tags = 0; 7828 int task_fail_flag = 0, task_abort_flag = 0; 7829 uint32_t slot_status; 7830 7831 mutex_enter(&ahci_portp->ahciport_mutex); 7832 7833 /* 7834 * ahci_intr_phyrdy_change() may have rendered it to 7835 * SATA_DTYPE_NONE. 7836 */ 7837 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 7838 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 7839 "ahci_intr_fatal_error: port %d no device attached, " 7840 "and just return without doing anything", port); 7841 goto out0; 7842 } 7843 7844 if (intr_status & AHCI_INTR_STATUS_TFES) { 7845 task_file_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7846 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 7847 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7848 "ahci_intr_fatal_error: port %d " 7849 "task_file_status = 0x%x", port, task_file_status); 7850 task_fail_flag = 1; 7851 7852 err_byte = (task_file_status & AHCI_TFD_ERR_MASK) 7853 >> AHCI_TFD_ERR_SHIFT; 7854 if (err_byte == SATA_ERROR_ABORT) 7855 task_abort_flag = 1; 7856 } 7857 7858 /* 7859 * Here we just log the fatal error info in interrupt context. 7860 * Misc recovery processing will be handled in task queue. 7861 */ 7862 if (task_fail_flag == 1) { 7863 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 7864 /* 7865 * Read PxCMD.CCS to determine the slot that the HBA 7866 * was processing when the error occurred. 7867 */ 7868 port_cmd_status = ddi_get32( 7869 ahci_ctlp->ahcictl_ahci_acc_handle, 7870 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7871 failed_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 7872 AHCI_CMD_STATUS_CCS_SHIFT; 7873 failed_tags = 0x1 << failed_slot; 7874 7875 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 7876 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7877 "ahci_intr_fatal_error: spkt 0x%p is being " 7878 "processed when fatal error occurred for port %d", 7879 spkt, port); 7880 7881 /* 7882 * Won't emit the error message if it is an IDENTIFY 7883 * DEVICE command sent to an ATAPI device. 7884 */ 7885 if ((spkt != NULL) && 7886 (spkt->satapkt_cmd.satacmd_cmd_reg == 7887 SATAC_ID_DEVICE) && 7888 (task_abort_flag == 1)) 7889 goto out1; 7890 7891 /* 7892 * Won't emit the error message if it is an ATAPI PACKET 7893 * command 7894 */ 7895 if ((spkt != NULL) && 7896 (spkt->satapkt_cmd.satacmd_cmd_reg == SATAC_PACKET)) 7897 goto out1; 7898 7899 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 7900 slot_status = ddi_get32( 7901 ahci_ctlp->ahcictl_ahci_acc_handle, 7902 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 7903 failed_tags = slot_status & 7904 AHCI_NCQ_SLOT_MASK(ahci_portp); 7905 } 7906 } 7907 7908 /* print the fatal error type */ 7909 ahci_log_fatal_error_message(ahci_ctlp, port, intr_status); 7910 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_ERRPRINT; 7911 7912 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7913 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 7914 7915 /* print PxSERR related error message */ 7916 ahci_log_serror_message(ahci_ctlp, port, port_serror, 0); 7917 7918 /* print task file register value */ 7919 if (task_fail_flag == 1) { 7920 cmn_err(CE_WARN, "!ahci%d: ahci port %d task_file_status " 7921 "= 0x%x", instance, port, task_file_status); 7922 if (task_abort_flag == 1) { 7923 cmn_err(CE_WARN, "!ahci%d: the below command (s) on " 7924 "port %d are aborted", instance, port); 7925 ahci_dump_commands(ahci_ctlp, port, failed_tags); 7926 } 7927 } 7928 7929 out1: 7930 /* Prepare the argument for the taskq */ 7931 args = ahci_portp->ahciport_event_args; 7932 args->ahciea_ctlp = (void *)ahci_ctlp; 7933 args->ahciea_portp = (void *)ahci_portp; 7934 args->ahciea_event = intr_status; 7935 AHCI_ADDR_SET_PORT((ahci_addr_t *)args->ahciea_addrp, port); 7936 7937 /* Start the taskq to handle error recovery */ 7938 if ((ddi_taskq_dispatch(ahci_portp->ahciport_event_taskq, 7939 ahci_events_handler, 7940 (void *)args, DDI_NOSLEEP)) != DDI_SUCCESS) { 7941 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_ERRPRINT; 7942 cmn_err(CE_WARN, "!ahci%d: start taskq for error recovery " 7943 "port %d failed", instance, port); 7944 } 7945 out0: 7946 mutex_exit(&ahci_portp->ahciport_mutex); 7947 7948 return (AHCI_SUCCESS); 7949 } 7950 7951 /* 7952 * Hot Plug Operation for platforms that support Cold Presence Detect. 7953 * 7954 * When set, a device status has changed as detected by the cold presence 7955 * detect logic. This bit can either be set due to a non-connected port 7956 * receiving a device, or a connected port having its device removed. 7957 * This bit is only valid if the port supports cold presence detect as 7958 * indicated by PxCMD.CPD set to '1'. 7959 * 7960 * At the moment, this interrupt is not needed and disabled and we just 7961 * log the debug message. 7962 */ 7963 static int 7964 ahci_intr_cold_port_detect(ahci_ctl_t *ahci_ctlp, 7965 ahci_port_t *ahci_portp, uint8_t port) 7966 { 7967 uint32_t port_cmd_status; 7968 sata_device_t sdevice; 7969 7970 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7971 "ahci_intr_cold_port_detect enter, port %d", port); 7972 7973 mutex_enter(&ahci_portp->ahciport_mutex); 7974 7975 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7976 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7977 if (!(port_cmd_status & AHCI_CMD_STATUS_CPD)) { 7978 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7979 "port %d does not support cold presence detect, so " 7980 "we just ignore this interrupt", port); 7981 mutex_exit(&ahci_portp->ahciport_mutex); 7982 return (AHCI_SUCCESS); 7983 } 7984 7985 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7986 "port %d device status has changed", port); 7987 7988 bzero((void *)&sdevice, sizeof (sata_device_t)); 7989 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 7990 sdevice.satadev_addr.qual = SATA_ADDR_CPORT; 7991 sdevice.satadev_addr.pmport = 0; 7992 sdevice.satadev_state = SATA_PSTATE_PWRON; 7993 7994 if (port_cmd_status & AHCI_CMD_STATUS_CPS) { 7995 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7996 "port %d: a device is hot plugged", port); 7997 mutex_exit(&ahci_portp->ahciport_mutex); 7998 sata_hba_event_notify( 7999 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 8000 &sdevice, 8001 SATA_EVNT_DEVICE_ATTACHED); 8002 mutex_enter(&ahci_portp->ahciport_mutex); 8003 8004 } else { 8005 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 8006 "port %d: a device is hot unplugged", port); 8007 mutex_exit(&ahci_portp->ahciport_mutex); 8008 sata_hba_event_notify( 8009 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 8010 &sdevice, 8011 SATA_EVNT_DEVICE_DETACHED); 8012 mutex_enter(&ahci_portp->ahciport_mutex); 8013 } 8014 8015 mutex_exit(&ahci_portp->ahciport_mutex); 8016 8017 return (AHCI_SUCCESS); 8018 } 8019 8020 /* 8021 * Enable the interrupts for a particular port. 8022 * 8023 * WARNING!!! ahciport_mutex should be acquired before the function 8024 * is called. 8025 */ 8026 static void 8027 ahci_enable_port_intrs(ahci_ctl_t *ahci_ctlp, uint8_t port) 8028 { 8029 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8030 "ahci_enable_port_intrs enter, port %d", port); 8031 8032 /* 8033 * Clear port interrupt status before enabling interrupt 8034 */ 8035 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8036 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 8037 AHCI_PORT_INTR_MASK); 8038 8039 /* 8040 * Clear the pending bit from IS.IPS 8041 */ 8042 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8043 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp), (1 << port)); 8044 8045 /* 8046 * Enable the following interrupts: 8047 * Device to Host Register FIS Interrupt (DHRS) 8048 * PIO Setup FIS Interrupt (PSS) 8049 * Set Device Bits Interrupt (SDBS) 8050 * Unknown FIS Interrupt (UFS) 8051 * Port Connect Change Status (PCS) 8052 * PhyRdy Change Status (PRCS) 8053 * Overflow Status (OFS) 8054 * Interface Non-fatal Error Status (INFS) 8055 * Interface Fatal Error Status (IFS) 8056 * Host Bus Data Error Status (HBDS) 8057 * Host Bus Fatal Error Status (HBFS) 8058 * Task File Error Status (TFES) 8059 */ 8060 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8061 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 8062 (AHCI_INTR_STATUS_DHRS | 8063 AHCI_INTR_STATUS_PSS | 8064 AHCI_INTR_STATUS_SDBS | 8065 AHCI_INTR_STATUS_UFS | 8066 AHCI_INTR_STATUS_DPS | 8067 AHCI_INTR_STATUS_PCS | 8068 AHCI_INTR_STATUS_PRCS | 8069 AHCI_INTR_STATUS_OFS | 8070 AHCI_INTR_STATUS_INFS | 8071 AHCI_INTR_STATUS_IFS | 8072 AHCI_INTR_STATUS_HBDS | 8073 AHCI_INTR_STATUS_HBFS | 8074 AHCI_INTR_STATUS_TFES)); 8075 } 8076 8077 /* 8078 * Enable interrupts for all the ports. 8079 * 8080 * WARNING!!! ahcictl_mutex should be acquired before the function 8081 * is called. 8082 */ 8083 static void 8084 ahci_enable_all_intrs(ahci_ctl_t *ahci_ctlp) 8085 { 8086 uint32_t ghc_control; 8087 8088 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_enable_all_intrs enter", NULL); 8089 8090 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8091 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 8092 8093 ghc_control |= AHCI_HBA_GHC_IE; 8094 8095 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8096 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 8097 } 8098 8099 /* 8100 * Disable interrupts for a particular port. 8101 * 8102 * WARNING!!! ahciport_mutex should be acquired before the function 8103 * is called. 8104 */ 8105 static void 8106 ahci_disable_port_intrs(ahci_ctl_t *ahci_ctlp, uint8_t port) 8107 { 8108 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8109 "ahci_disable_port_intrs enter, port %d", port); 8110 8111 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8112 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 0); 8113 } 8114 8115 /* 8116 * Disable interrupts for the whole HBA. 8117 * 8118 * The global bit is cleared, then all interrupt sources from all 8119 * ports are disabled. 8120 * 8121 * WARNING!!! ahcictl_mutex should be acquired before the function 8122 * is called. 8123 */ 8124 static void 8125 ahci_disable_all_intrs(ahci_ctl_t *ahci_ctlp) 8126 { 8127 uint32_t ghc_control; 8128 8129 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_disable_all_intrs enter", 8130 NULL); 8131 8132 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8133 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 8134 8135 ghc_control &= ~ AHCI_HBA_GHC_IE; 8136 8137 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8138 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 8139 } 8140 8141 /* 8142 * Handle FIXED or MSI interrupts. 8143 */ 8144 /* 8145 * According to AHCI spec, the HBA may support several interrupt modes: 8146 * * pin based interrupts (FIXED) 8147 * * single MSI message interrupts 8148 * * multiple MSI based message interrupts 8149 * 8150 * For pin based interrupts, the software interrupt handler need to check IS 8151 * register to find out which port has pending interrupts. And then check 8152 * PxIS register to find out which interrupt events happened on that port. 8153 * 8154 * For single MSI message interrupts, MSICAP.MC.MSIE is set with '1', and 8155 * MSICAP.MC.MME is set with '0'. This mode is similar to pin based interrupts 8156 * in that software interrupt handler need to check IS register to determine 8157 * which port triggered the interrupts since it uses a single message for all 8158 * port interrupts. 8159 * 8160 * HBA may optionally support multiple MSI message for better performance. In 8161 * this mode, each port may have its own interrupt message, and thus generation 8162 * of interrupts is no longer controlled through the IS register. MSICAP.MC.MMC 8163 * represents a power-of-2 wrapper on the number of implemented ports, and 8164 * the mapping of ports to interrupts is done in a 1-1 relationship, up to the 8165 * maximum number of assigned interrupts. When the number of MSI messages 8166 * allocated is less than the number requested, then hardware may have two 8167 * implementation behaviors: 8168 * * assign each ports its own interrupt and then force all additional 8169 * ports to share the last interrupt message, and this condition is 8170 * indicated by clearing GHC.MRSM to '0' 8171 * * revert to single MSI mode, indicated by setting GHC.MRSM to '1' 8172 * When multiple-message MSI is enabled, hardware will still set IS register 8173 * as single message case. And this IS register may be used by software when 8174 * fewer than the requested number of messages is granted in order to determine 8175 * which port had the interrupt. 8176 * 8177 * Note: The current ahci driver only supports the first two interrupt modes: 8178 * pin based interrupts and single MSI message interrupts, and the reason 8179 * is indicated in below code. 8180 */ 8181 static int 8182 ahci_add_intrs(ahci_ctl_t *ahci_ctlp, int intr_type) 8183 { 8184 dev_info_t *dip = ahci_ctlp->ahcictl_dip; 8185 int count, avail, actual; 8186 int i, rc; 8187 8188 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 8189 "ahci_add_intrs enter interrupt type 0x%x", intr_type); 8190 8191 /* get number of interrupts. */ 8192 rc = ddi_intr_get_nintrs(dip, intr_type, &count); 8193 if ((rc != DDI_SUCCESS) || (count == 0)) { 8194 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8195 "ddi_intr_get_nintrs() failed, " 8196 "rc %d count %d\n", rc, count); 8197 return (DDI_FAILURE); 8198 } 8199 8200 /* get number of available interrupts. */ 8201 rc = ddi_intr_get_navail(dip, intr_type, &avail); 8202 if ((rc != DDI_SUCCESS) || (avail == 0)) { 8203 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8204 "ddi_intr_get_navail() failed, " 8205 "rc %d avail %d\n", rc, avail); 8206 return (DDI_FAILURE); 8207 } 8208 8209 #if AHCI_DEBUG 8210 if (avail < count) { 8211 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8212 "ddi_intr_get_nintrs returned %d, navail() returned %d", 8213 count, avail); 8214 } 8215 #endif 8216 8217 /* 8218 * Note: So far Solaris restricts the maximum number of messages for 8219 * x86 to 2, that is avail is 2, so here we set the count with 1 to 8220 * force the driver to use single MSI message interrupt. In future if 8221 * Solaris remove the restriction, then we need to delete the below 8222 * code and try to use multiple interrupt routine to gain better 8223 * performance. 8224 */ 8225 if ((intr_type == DDI_INTR_TYPE_MSI) && (count > 1)) { 8226 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 8227 "force to use one interrupt routine though the " 8228 "HBA supports %d interrupt", count); 8229 count = 1; 8230 } 8231 8232 /* Allocate an array of interrupt handles. */ 8233 ahci_ctlp->ahcictl_intr_size = count * sizeof (ddi_intr_handle_t); 8234 ahci_ctlp->ahcictl_intr_htable = 8235 kmem_alloc(ahci_ctlp->ahcictl_intr_size, KM_SLEEP); 8236 8237 /* call ddi_intr_alloc(). */ 8238 rc = ddi_intr_alloc(dip, ahci_ctlp->ahcictl_intr_htable, 8239 intr_type, 0, count, &actual, DDI_INTR_ALLOC_NORMAL); 8240 8241 if ((rc != DDI_SUCCESS) || (actual == 0)) { 8242 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8243 "ddi_intr_alloc() failed, rc %d count %d actual %d " 8244 "avail %d\n", rc, count, actual, avail); 8245 kmem_free(ahci_ctlp->ahcictl_intr_htable, 8246 ahci_ctlp->ahcictl_intr_size); 8247 return (DDI_FAILURE); 8248 } 8249 8250 /* use interrupt count returned */ 8251 #if AHCI_DEBUG 8252 if (actual < count) { 8253 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8254 "Requested: %d, Received: %d", count, actual); 8255 } 8256 #endif 8257 8258 ahci_ctlp->ahcictl_intr_cnt = actual; 8259 8260 /* 8261 * Get priority for first, assume remaining are all the same. 8262 */ 8263 if (ddi_intr_get_pri(ahci_ctlp->ahcictl_intr_htable[0], 8264 &ahci_ctlp->ahcictl_intr_pri) != DDI_SUCCESS) { 8265 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8266 "ddi_intr_get_pri() failed", NULL); 8267 8268 /* Free already allocated intr. */ 8269 for (i = 0; i < actual; i++) { 8270 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[i]); 8271 } 8272 8273 kmem_free(ahci_ctlp->ahcictl_intr_htable, 8274 ahci_ctlp->ahcictl_intr_size); 8275 return (DDI_FAILURE); 8276 } 8277 8278 /* Test for high level interrupt. */ 8279 if (ahci_ctlp->ahcictl_intr_pri >= ddi_intr_get_hilevel_pri()) { 8280 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8281 "ahci_add_intrs: Hi level intr not supported", NULL); 8282 8283 /* Free already allocated intr. */ 8284 for (i = 0; i < actual; i++) { 8285 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[i]); 8286 } 8287 8288 kmem_free(ahci_ctlp->ahcictl_intr_htable, 8289 sizeof (ddi_intr_handle_t)); 8290 8291 return (DDI_FAILURE); 8292 } 8293 8294 /* Call ddi_intr_add_handler(). */ 8295 for (i = 0; i < actual; i++) { 8296 if (ddi_intr_add_handler(ahci_ctlp->ahcictl_intr_htable[i], 8297 ahci_intr, (caddr_t)ahci_ctlp, NULL) != DDI_SUCCESS) { 8298 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8299 "ddi_intr_add_handler() failed", NULL); 8300 8301 /* Free already allocated intr. */ 8302 for (i = 0; i < actual; i++) { 8303 (void) ddi_intr_free( 8304 ahci_ctlp->ahcictl_intr_htable[i]); 8305 } 8306 8307 kmem_free(ahci_ctlp->ahcictl_intr_htable, 8308 ahci_ctlp->ahcictl_intr_size); 8309 return (DDI_FAILURE); 8310 } 8311 } 8312 8313 if (ddi_intr_get_cap(ahci_ctlp->ahcictl_intr_htable[0], 8314 &ahci_ctlp->ahcictl_intr_cap) != DDI_SUCCESS) { 8315 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8316 "ddi_intr_get_cap() failed", NULL); 8317 8318 /* Free already allocated intr. */ 8319 for (i = 0; i < actual; i++) { 8320 (void) ddi_intr_free( 8321 ahci_ctlp->ahcictl_intr_htable[i]); 8322 } 8323 8324 kmem_free(ahci_ctlp->ahcictl_intr_htable, 8325 ahci_ctlp->ahcictl_intr_size); 8326 return (DDI_FAILURE); 8327 } 8328 8329 if (ahci_ctlp->ahcictl_intr_cap & DDI_INTR_FLAG_BLOCK) { 8330 /* Call ddi_intr_block_enable() for MSI. */ 8331 (void) ddi_intr_block_enable(ahci_ctlp->ahcictl_intr_htable, 8332 ahci_ctlp->ahcictl_intr_cnt); 8333 } else { 8334 /* Call ddi_intr_enable() for FIXED or MSI non block enable. */ 8335 for (i = 0; i < ahci_ctlp->ahcictl_intr_cnt; i++) { 8336 (void) ddi_intr_enable( 8337 ahci_ctlp->ahcictl_intr_htable[i]); 8338 } 8339 } 8340 8341 return (DDI_SUCCESS); 8342 } 8343 8344 /* 8345 * Removes the registered interrupts irrespective of whether they 8346 * were legacy or MSI. 8347 * 8348 * WARNING!!! The controller interrupts must be disabled before calling 8349 * this routine. 8350 */ 8351 static void 8352 ahci_rem_intrs(ahci_ctl_t *ahci_ctlp) 8353 { 8354 int x; 8355 8356 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_rem_intrs entered", NULL); 8357 8358 /* Disable all interrupts. */ 8359 if ((ahci_ctlp->ahcictl_intr_type == DDI_INTR_TYPE_MSI) && 8360 (ahci_ctlp->ahcictl_intr_cap & DDI_INTR_FLAG_BLOCK)) { 8361 /* Call ddi_intr_block_disable(). */ 8362 (void) ddi_intr_block_disable(ahci_ctlp->ahcictl_intr_htable, 8363 ahci_ctlp->ahcictl_intr_cnt); 8364 } else { 8365 for (x = 0; x < ahci_ctlp->ahcictl_intr_cnt; x++) { 8366 (void) ddi_intr_disable( 8367 ahci_ctlp->ahcictl_intr_htable[x]); 8368 } 8369 } 8370 8371 /* Call ddi_intr_remove_handler(). */ 8372 for (x = 0; x < ahci_ctlp->ahcictl_intr_cnt; x++) { 8373 (void) ddi_intr_remove_handler( 8374 ahci_ctlp->ahcictl_intr_htable[x]); 8375 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[x]); 8376 } 8377 8378 kmem_free(ahci_ctlp->ahcictl_intr_htable, ahci_ctlp->ahcictl_intr_size); 8379 } 8380 8381 /* 8382 * This routine tries to put port into P:NotRunning state by clearing 8383 * PxCMD.ST. HBA will clear PxCI to 0h, PxSACT to 0h, PxCMD.CCS to 0h 8384 * and PxCMD.CR to '0'. 8385 * 8386 * WARNING!!! ahciport_mutex should be acquired before the function 8387 * is called. 8388 */ 8389 static int 8390 ahci_put_port_into_notrunning_state(ahci_ctl_t *ahci_ctlp, 8391 ahci_port_t *ahci_portp, uint8_t port) 8392 { 8393 uint32_t port_cmd_status; 8394 int loop_count; 8395 8396 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8397 "ahci_put_port_into_notrunning_state enter: port %d", port); 8398 8399 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8400 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 8401 8402 port_cmd_status &= ~AHCI_CMD_STATUS_ST; 8403 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8404 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), port_cmd_status); 8405 8406 /* Wait until PxCMD.CR is cleared */ 8407 loop_count = 0; 8408 do { 8409 port_cmd_status = 8410 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8411 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 8412 8413 if (loop_count++ > AHCI_POLLRATE_PORT_IDLE) { 8414 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 8415 "clearing port %d CMD.CR timeout, " 8416 "port_cmd_status = 0x%x", port, 8417 port_cmd_status); 8418 /* 8419 * We are effectively timing out after 0.5 sec. 8420 * This value is specified in AHCI spec. 8421 */ 8422 break; 8423 } 8424 8425 /* Wait for 10 millisec */ 8426 drv_usecwait(AHCI_10MS_USECS); 8427 } while (port_cmd_status & AHCI_CMD_STATUS_CR); 8428 8429 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_STARTED; 8430 8431 if (port_cmd_status & AHCI_CMD_STATUS_CR) { 8432 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 8433 "ahci_put_port_into_notrunning_state: failed to clear " 8434 "PxCMD.CR to '0' after loop count: %d, and " 8435 "port_cmd_status = 0x%x", loop_count, port_cmd_status); 8436 return (AHCI_FAILURE); 8437 } else { 8438 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 8439 "ahci_put_port_into_notrunning_state: succeeded to clear " 8440 "PxCMD.CR to '0' after loop count: %d, and " 8441 "port_cmd_status = 0x%x", loop_count, port_cmd_status); 8442 return (AHCI_SUCCESS); 8443 } 8444 } 8445 8446 /* 8447 * First clear PxCMD.ST, and then check PxTFD. If both PxTFD.STS.BSY 8448 * and PxTFD.STS.DRQ cleared to '0', it means the device is in a 8449 * stable state, then set PxCMD.ST to '1' to start the port directly. 8450 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue a 8451 * COMRESET to the device to put it in an idle state. 8452 * 8453 * The fifth argument returns whether the port reset is involved during 8454 * the process. 8455 * 8456 * The routine will be called under following scenarios: 8457 * + To reset the HBA 8458 * + To abort the packet(s) 8459 * + To reset the port 8460 * + To activate the port 8461 * + Fatal error recovery 8462 * + To abort the timeout packet(s) 8463 * 8464 * WARNING!!! ahciport_mutex should be acquired before the function 8465 * is called. And ahciport_mutex will be released before the reset 8466 * event is reported to sata module by calling sata_hba_event_notify, 8467 * and then be acquired again later. 8468 * 8469 * NOTES!!! During this procedure, PxSERR register will be cleared, and 8470 * according to the spec, the clearance of three bits will also clear 8471 * three interrupt status bits. 8472 * 1. PxSERR.DIAG.F will clear PxIS.UFS 8473 * 2. PxSERR.DIAG.X will clear PxIS.PCS 8474 * 3. PxSERR.DIAG.N will clear PxIS.PRCS 8475 * 8476 * Among these three interrupt events, the driver needs to take care of 8477 * PxIS.PRCS, which is the hot plug event. When the driver found out 8478 * a device was unplugged, it will call the interrupt handler. 8479 */ 8480 static int 8481 ahci_restart_port_wait_till_ready(ahci_ctl_t *ahci_ctlp, 8482 ahci_port_t *ahci_portp, uint8_t port, int flag, int *reset_flag) 8483 { 8484 uint32_t port_sstatus; 8485 uint32_t task_file_status; 8486 sata_device_t sdevice; 8487 int rval; 8488 ahci_addr_t addr_port; 8489 ahci_pmult_info_t *pminfo = NULL; 8490 int dev_exists_begin = 0; 8491 int dev_exists_end = 0; 8492 uint32_t previous_dev_type = ahci_portp->ahciport_device_type; 8493 int npmport = 0; 8494 uint8_t cport = ahci_ctlp->ahcictl_port_to_cport[port]; 8495 8496 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8497 "ahci_restart_port_wait_till_ready: port %d enter", port); 8498 8499 AHCI_ADDR_SET_PORT(&addr_port, port); 8500 8501 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) 8502 dev_exists_begin = 1; 8503 8504 /* First clear PxCMD.ST */ 8505 rval = ahci_put_port_into_notrunning_state(ahci_ctlp, ahci_portp, 8506 port); 8507 if (rval != AHCI_SUCCESS) 8508 /* 8509 * If PxCMD.CR does not clear within a reasonable time, it 8510 * may assume the interface is in a hung condition and may 8511 * continue with issuing the port reset. 8512 */ 8513 goto reset; 8514 8515 /* Then clear PxSERR */ 8516 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8517 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 8518 AHCI_SERROR_CLEAR_ALL); 8519 8520 /* Then get PxTFD */ 8521 task_file_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8522 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 8523 8524 /* 8525 * Check whether the device is in a stable status, if yes, 8526 * then start the port directly. However for ahci_tran_reset_dport, 8527 * we may have to perform a port reset. 8528 */ 8529 if (!(task_file_status & (AHCI_TFD_STS_BSY | AHCI_TFD_STS_DRQ)) && 8530 !(flag & AHCI_PORT_RESET)) 8531 goto out; 8532 8533 reset: 8534 /* 8535 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue 8536 * a COMRESET to the device 8537 */ 8538 ahci_disable_port_intrs(ahci_ctlp, port); 8539 rval = ahci_port_reset(ahci_ctlp, ahci_portp, &addr_port); 8540 ahci_enable_port_intrs(ahci_ctlp, port); 8541 8542 #ifdef AHCI_DEBUG 8543 if (rval != AHCI_SUCCESS) 8544 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8545 "ahci_restart_port_wait_till_ready: port %d failed", 8546 port); 8547 #endif 8548 8549 if (reset_flag != NULL) 8550 *reset_flag = 1; 8551 8552 /* Indicate to the framework that a reset has happened. */ 8553 if ((ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) && 8554 (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) && 8555 !(flag & AHCI_RESET_NO_EVENTS_UP)) { 8556 /* Set the reset in progress flag */ 8557 ahci_portp->ahciport_reset_in_progress = 1; 8558 8559 bzero((void *)&sdevice, sizeof (sata_device_t)); 8560 sdevice.satadev_addr.cport = 8561 ahci_ctlp->ahcictl_port_to_cport[port]; 8562 sdevice.satadev_addr.pmport = 0; 8563 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8564 8565 sdevice.satadev_state = SATA_DSTATE_RESET | 8566 SATA_DSTATE_PWR_ACTIVE; 8567 if (ahci_ctlp->ahcictl_sata_hba_tran) { 8568 mutex_exit(&ahci_portp->ahciport_mutex); 8569 sata_hba_event_notify( 8570 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 8571 &sdevice, 8572 SATA_EVNT_DEVICE_RESET); 8573 mutex_enter(&ahci_portp->ahciport_mutex); 8574 } 8575 8576 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 8577 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 8578 } else { 8579 ahci_portp->ahciport_reset_in_progress = 0; 8580 } 8581 8582 out: 8583 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8584 8585 /* SStatus tells the presence of device. */ 8586 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8587 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 8588 8589 if (SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_PHYCOM) { 8590 dev_exists_end = 1; 8591 } 8592 8593 if (dev_exists_begin == 0 && dev_exists_end == 0) /* 0 -> 0 */ 8594 return (rval); 8595 8596 /* Check whether a hot plug event happened */ 8597 if (dev_exists_begin == 1 && dev_exists_end == 0) { /* 1 -> 0 */ 8598 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8599 "ahci_restart_port_wait_till_ready: port %d " 8600 "device is removed", port); 8601 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_NODEV; 8602 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8603 "ahci_restart_port_wait_till_ready: port %d " 8604 "AHCI_PORT_FLAG_NODEV flag is set", port); 8605 mutex_exit(&ahci_portp->ahciport_mutex); 8606 (void) ahci_intr_phyrdy_change(ahci_ctlp, ahci_portp, port); 8607 mutex_enter(&ahci_portp->ahciport_mutex); 8608 8609 return (rval); 8610 } 8611 8612 8613 /* 0/1 -> 1 : device may change */ 8614 /* 8615 * May be called by ahci_fatal_error_recovery_handler, so 8616 * don't issue software if the previous device is ATAPI. 8617 */ 8618 if (ahci_portp->ahciport_device_type == SATA_DTYPE_ATAPI) 8619 return (rval); 8620 8621 /* 8622 * The COMRESET will make port multiplier enter legacy mode. 8623 * Issue a software reset to make it work again. 8624 */ 8625 ahci_find_dev_signature(ahci_ctlp, ahci_portp, &addr_port); 8626 8627 /* 8628 * Following codes are specific for the port multiplier 8629 */ 8630 if (previous_dev_type != SATA_DTYPE_PMULT && 8631 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 8632 /* in case previous_dev_type is corrupt */ 8633 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 8634 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8635 return (rval); 8636 } 8637 8638 /* Device change: PMult -> Non-PMult */ 8639 if (previous_dev_type == SATA_DTYPE_PMULT && 8640 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 8641 /* 8642 * This might happen because 8643 * 1. Software reset failed. Port multiplier is not correctly 8644 * enumerated. 8645 * 2. Another non-port-multiplier device is attached. Perhaps 8646 * the port multiplier was replaced by another device by 8647 * whatever reason, but AHCI driver missed hot-plug event. 8648 * 8649 * Now that the port has been initialized, we just need to 8650 * update the port structure according new device, then report 8651 * and wait SATA framework to probe new device. 8652 */ 8653 8654 /* Force to release pmult resource */ 8655 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 8656 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8657 8658 bzero((void *)&sdevice, sizeof (sata_device_t)); 8659 sdevice.satadev_addr.cport = 8660 ahci_ctlp->ahcictl_port_to_cport[port]; 8661 sdevice.satadev_addr.pmport = 0; 8662 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8663 8664 sdevice.satadev_state = SATA_DSTATE_RESET | 8665 SATA_DSTATE_PWR_ACTIVE; 8666 8667 mutex_exit(&ahci_portp->ahciport_mutex); 8668 sata_hba_event_notify( 8669 ahci_ctlp->ahcictl_dip, 8670 &sdevice, 8671 SATA_EVNT_DEVICE_RESET); 8672 mutex_enter(&ahci_portp->ahciport_mutex); 8673 8674 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8675 "Port multiplier is [Gone] at port %d ", port); 8676 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 8677 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 8678 8679 return (AHCI_SUCCESS); 8680 } 8681 8682 /* Device change: Non-PMult -> PMult */ 8683 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 8684 8685 /* NOTE: The PxCMD.PMA may be cleared by HBA reset. */ 8686 ahci_alloc_pmult(ahci_ctlp, ahci_portp); 8687 8688 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8689 } 8690 pminfo = ahci_portp->ahciport_pmult_info; 8691 ASSERT(pminfo != NULL); 8692 8693 /* Device (may) change: PMult -> PMult */ 8694 /* 8695 * First initialize port multiplier. Set state to READY and wait for 8696 * probe entry point to initialize it 8697 */ 8698 ahci_portp->ahciport_port_state = SATA_STATE_READY; 8699 8700 /* 8701 * It's a little complicated while target is a port multiplier. we 8702 * need to COMRESET all pmports behind that PMult otherwise those 8703 * sub-links between the PMult and the sub-devices will be in an 8704 * inactive state (indicated by PSCR0/PxSSTS) and the following access 8705 * to those sub-devices will be rejected by Link-Fatal-Error. 8706 */ 8707 /* 8708 * The PxSNTF will be set soon after the pmult is plugged. While the 8709 * pmult itself is attaching, sata_hba_event_notfiy will fail. so we 8710 * simply mark every sub-port as 'unknown', then ahci_probe_pmport 8711 * will initialized it. 8712 */ 8713 for (npmport = 0; npmport < pminfo->ahcipmi_num_dev_ports; npmport++) 8714 pminfo->ahcipmi_port_state[npmport] = SATA_STATE_UNKNOWN; 8715 8716 /* Report reset event. */ 8717 ahci_portp->ahciport_reset_in_progress = 1; 8718 8719 bzero((void *)&sdevice, sizeof (sata_device_t)); 8720 sdevice.satadev_addr.cport = cport; 8721 sdevice.satadev_addr.pmport = SATA_PMULT_HOSTPORT; 8722 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 8723 sdevice.satadev_state = SATA_DSTATE_RESET | SATA_DSTATE_PWR_ACTIVE; 8724 sata_hba_event_notify(ahci_ctlp->ahcictl_dip, &sdevice, 8725 SATA_EVNT_DEVICE_RESET); 8726 8727 return (rval); 8728 } 8729 8730 /* 8731 * This routine may be called under four scenarios: 8732 * a) do the recovery from fatal error 8733 * b) or we need to timeout some commands 8734 * c) or we need to abort some commands 8735 * d) or we need reset device/port/controller 8736 * 8737 * In all these scenarios, we need to send any pending unfinished 8738 * commands up to sata framework. 8739 * 8740 * WARNING!!! ahciport_mutex should be acquired before the function is called. 8741 */ 8742 static void 8743 ahci_mop_commands(ahci_ctl_t *ahci_ctlp, 8744 ahci_port_t *ahci_portp, 8745 uint32_t slot_status, 8746 uint32_t failed_tags, 8747 uint32_t timeout_tags, 8748 uint32_t aborted_tags, 8749 uint32_t reset_tags) 8750 { 8751 uint32_t finished_tags = 0; 8752 uint32_t unfinished_tags = 0; 8753 int tmp_slot; 8754 sata_pkt_t *satapkt; 8755 int ncq_cmd_in_progress = 0; 8756 int err_retri_cmd_in_progress = 0; 8757 int rdwr_pmult_cmd_in_progress = 0; 8758 8759 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8760 "ahci_mop_commands entered: port: %d slot_status: 0x%x", 8761 ahci_portp->ahciport_port_num, slot_status); 8762 8763 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8764 "ahci_mop_commands: failed_tags: 0x%x, " 8765 "timeout_tags: 0x%x aborted_tags: 0x%x, " 8766 "reset_tags: 0x%x", failed_tags, 8767 timeout_tags, aborted_tags, reset_tags); 8768 8769 #ifdef AHCI_DEBUG 8770 if (ahci_debug_flags & AHCIDBG_ERRS) { 8771 int i; 8772 char msg_buf[200] = {0, }; 8773 for (i = 0x1f; i >= 0; i--) { 8774 if (ahci_portp->ahciport_slot_pkts[i] != NULL) 8775 msg_buf[i] = 'X'; 8776 else 8777 msg_buf[i] = '.'; 8778 } 8779 msg_buf[0x20] = '\0'; 8780 cmn_err(CE_NOTE, "port[%d] slots: %s", 8781 ahci_portp->ahciport_port_num, msg_buf); 8782 cmn_err(CE_NOTE, "[ERR-RT] %p [RW-PM] %p ", 8783 (void *)ahci_portp->ahciport_err_retri_pkt, 8784 (void *)ahci_portp->ahciport_rdwr_pmult_pkt); 8785 } 8786 #endif 8787 8788 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8789 finished_tags = ahci_portp->ahciport_pending_tags & 8790 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 8791 8792 unfinished_tags = slot_status & 8793 AHCI_SLOT_MASK(ahci_ctlp) & 8794 ~failed_tags & 8795 ~aborted_tags & 8796 ~reset_tags & 8797 ~timeout_tags; 8798 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8799 ncq_cmd_in_progress = 1; 8800 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 8801 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 8802 8803 unfinished_tags = slot_status & 8804 AHCI_NCQ_SLOT_MASK(ahci_portp) & 8805 ~failed_tags & 8806 ~aborted_tags & 8807 ~reset_tags & 8808 ~timeout_tags; 8809 } else if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8810 8811 /* 8812 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT is 8813 * set, it means REQUEST SENSE or READ LOG EXT command doesn't 8814 * complete successfully due to one of the following three 8815 * conditions: 8816 * 8817 * 1. Fatal error - failed_tags includes its slot 8818 * 2. Timed out - timeout_tags includes its slot 8819 * 3. Aborted when hot unplug - aborted_tags includes its 8820 * slot 8821 * 8822 * Please note that the command is always sent down in Slot 0 8823 */ 8824 err_retri_cmd_in_progress = 1; 8825 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_NCQ, ahci_ctlp, 8826 "ahci_mop_commands is called for port %d while " 8827 "REQUEST SENSE or READ LOG EXT for error retrieval " 8828 "is being executed slot_status = 0x%x", 8829 ahci_portp->ahciport_port_num, slot_status); 8830 ASSERT(ahci_portp->ahciport_mop_in_progress > 1); 8831 ASSERT(slot_status == 0x1); 8832 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 8833 rdwr_pmult_cmd_in_progress = 1; 8834 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 8835 "ahci_mop_commands is called for port %d while " 8836 "READ/WRITE PORTMULT command is being executed", 8837 ahci_portp->ahciport_port_num); 8838 8839 ASSERT(slot_status == 0x1); 8840 } 8841 8842 #ifdef AHCI_DEBUG 8843 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8844 "ahci_mop_commands: finished_tags: 0x%x, " 8845 "unfinished_tags 0x%x", finished_tags, unfinished_tags); 8846 #endif 8847 8848 /* Send up finished packets with SATA_PKT_COMPLETED */ 8849 while (finished_tags) { 8850 tmp_slot = ddi_ffs(finished_tags) - 1; 8851 if (tmp_slot == -1) { 8852 break; 8853 } 8854 8855 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8856 ASSERT(satapkt != NULL); 8857 8858 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_mop_commands: " 8859 "sending up pkt 0x%p with SATA_PKT_COMPLETED", 8860 (void *)satapkt); 8861 8862 /* 8863 * Cannot fetch the return register content since the port 8864 * was restarted, so the corresponding tag will be set to 8865 * aborted tags. 8866 */ 8867 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 8868 CLEAR_BIT(finished_tags, tmp_slot); 8869 aborted_tags |= tmp_slot; 8870 continue; 8871 } 8872 8873 if (ncq_cmd_in_progress) 8874 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8875 tmp_slot); 8876 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8877 CLEAR_BIT(finished_tags, tmp_slot); 8878 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8879 8880 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_COMPLETED); 8881 } 8882 8883 /* Send up failed packets with SATA_PKT_DEV_ERROR. */ 8884 while (failed_tags) { 8885 if (err_retri_cmd_in_progress) { 8886 satapkt = ahci_portp->ahciport_err_retri_pkt; 8887 ASSERT(satapkt != NULL); 8888 ASSERT(failed_tags == 0x1); 8889 8890 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8891 "sending up pkt 0x%p with SATA_PKT_DEV_ERROR", 8892 (void *)satapkt); 8893 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8894 break; 8895 } 8896 if (rdwr_pmult_cmd_in_progress) { 8897 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8898 ASSERT(satapkt != NULL); 8899 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8900 "ahci_mop_commands: sending up " 8901 "rdwr pmult pkt 0x%p with SATA_PKT_DEV_ERROR", 8902 (void *)satapkt); 8903 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8904 break; 8905 } 8906 8907 tmp_slot = ddi_ffs(failed_tags) - 1; 8908 if (tmp_slot == -1) { 8909 break; 8910 } 8911 8912 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8913 ASSERT(satapkt != NULL); 8914 8915 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8916 "sending up pkt 0x%p with SATA_PKT_DEV_ERROR", 8917 (void *)satapkt); 8918 8919 if (ncq_cmd_in_progress) 8920 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8921 tmp_slot); 8922 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8923 CLEAR_BIT(failed_tags, tmp_slot); 8924 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8925 8926 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8927 } 8928 8929 /* Send up timeout packets with SATA_PKT_TIMEOUT. */ 8930 while (timeout_tags) { 8931 if (err_retri_cmd_in_progress) { 8932 satapkt = ahci_portp->ahciport_err_retri_pkt; 8933 ASSERT(satapkt != NULL); 8934 ASSERT(timeout_tags == 0x1); 8935 8936 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8937 "sending up pkt 0x%p with SATA_PKT_TIMEOUT", 8938 (void *)satapkt); 8939 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8940 break; 8941 } 8942 if (rdwr_pmult_cmd_in_progress) { 8943 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8944 ASSERT(satapkt != NULL); 8945 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8946 "ahci_mop_commands: sending up " 8947 "rdwr pmult pkt 0x%p with SATA_PKT_TIMEOUT", 8948 (void *)satapkt); 8949 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8950 break; 8951 } 8952 8953 tmp_slot = ddi_ffs(timeout_tags) - 1; 8954 if (tmp_slot == -1) { 8955 break; 8956 } 8957 8958 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8959 ASSERT(satapkt != NULL); 8960 8961 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8962 "sending up pkt 0x%p with SATA_PKT_TIMEOUT", 8963 (void *)satapkt); 8964 8965 if (ncq_cmd_in_progress) 8966 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8967 tmp_slot); 8968 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8969 CLEAR_BIT(timeout_tags, tmp_slot); 8970 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8971 8972 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8973 } 8974 8975 /* Send up aborted packets with SATA_PKT_ABORTED */ 8976 while (aborted_tags) { 8977 if (err_retri_cmd_in_progress) { 8978 satapkt = ahci_portp->ahciport_err_retri_pkt; 8979 ASSERT(satapkt != NULL); 8980 ASSERT(aborted_tags == 0x1); 8981 8982 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8983 "sending up pkt 0x%p with SATA_PKT_ABORTED", 8984 (void *)satapkt); 8985 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_ABORTED); 8986 break; 8987 } 8988 if (rdwr_pmult_cmd_in_progress) { 8989 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8990 ASSERT(satapkt != NULL); 8991 ASSERT(aborted_tags == 0x1); 8992 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8993 "ahci_mop_commands: sending up " 8994 "rdwr pmult pkt 0x%p with SATA_PKT_ABORTED", 8995 (void *)satapkt); 8996 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_ABORTED); 8997 break; 8998 } 8999 9000 tmp_slot = ddi_ffs(aborted_tags) - 1; 9001 if (tmp_slot == -1) { 9002 break; 9003 } 9004 9005 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 9006 ASSERT(satapkt != NULL); 9007 9008 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 9009 "sending up pkt 0x%p with SATA_PKT_ABORTED", 9010 (void *)satapkt); 9011 9012 if (ncq_cmd_in_progress) 9013 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 9014 tmp_slot); 9015 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 9016 CLEAR_BIT(aborted_tags, tmp_slot); 9017 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 9018 9019 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_ABORTED); 9020 } 9021 9022 /* Send up reset packets with SATA_PKT_RESET. */ 9023 while (reset_tags) { 9024 if (rdwr_pmult_cmd_in_progress) { 9025 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 9026 ASSERT(satapkt != NULL); 9027 ASSERT(aborted_tags == 0x1); 9028 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9029 "ahci_mop_commands: sending up " 9030 "rdwr pmult pkt 0x%p with SATA_PKT_RESET", 9031 (void *)satapkt); 9032 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_RESET); 9033 break; 9034 } 9035 9036 tmp_slot = ddi_ffs(reset_tags) - 1; 9037 if (tmp_slot == -1) { 9038 break; 9039 } 9040 9041 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 9042 ASSERT(satapkt != NULL); 9043 9044 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 9045 "sending up pkt 0x%p with SATA_PKT_RESET", 9046 (void *)satapkt); 9047 9048 if (ncq_cmd_in_progress) 9049 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 9050 tmp_slot); 9051 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 9052 CLEAR_BIT(reset_tags, tmp_slot); 9053 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 9054 9055 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_RESET); 9056 } 9057 9058 /* Send up unfinished packets with SATA_PKT_RESET */ 9059 while (unfinished_tags) { 9060 tmp_slot = ddi_ffs(unfinished_tags) - 1; 9061 if (tmp_slot == -1) { 9062 break; 9063 } 9064 9065 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 9066 ASSERT(satapkt != NULL); 9067 9068 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 9069 "sending up pkt 0x%p with SATA_PKT_RESET", 9070 (void *)satapkt); 9071 9072 if (ncq_cmd_in_progress) 9073 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 9074 tmp_slot); 9075 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 9076 CLEAR_BIT(unfinished_tags, tmp_slot); 9077 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 9078 9079 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_RESET); 9080 } 9081 9082 ahci_portp->ahciport_mop_in_progress--; 9083 ASSERT(ahci_portp->ahciport_mop_in_progress >= 0); 9084 9085 if (ahci_portp->ahciport_mop_in_progress == 0) 9086 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_MOPPING; 9087 9088 ahci_flush_doneq(ahci_portp); 9089 } 9090 9091 /* 9092 * This routine is going to first request a READ LOG EXT sata pkt from sata 9093 * module, and then deliver it to the HBA to get the ncq failure context. 9094 * The return value is the exactly failed tags. 9095 */ 9096 static uint32_t 9097 ahci_get_rdlogext_data(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 9098 uint8_t port) 9099 { 9100 sata_device_t sdevice; 9101 sata_pkt_t *rdlog_spkt, *spkt; 9102 ddi_dma_handle_t buf_dma_handle; 9103 ahci_addr_t addr; 9104 int loop_count; 9105 int rval; 9106 int failed_slot; 9107 uint32_t failed_tags = 0; 9108 struct sata_ncq_error_recovery_page *ncq_err_page; 9109 9110 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_NCQ, ahci_ctlp, 9111 "ahci_get_rdlogext_data enter: port %d", port); 9112 9113 /* Prepare the sdevice data */ 9114 bzero((void *)&sdevice, sizeof (sata_device_t)); 9115 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 9116 9117 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 9118 sdevice.satadev_addr.pmport = 0; 9119 9120 /* Translate sata_device.satadev_addr -> ahci_addr */ 9121 ahci_get_ahci_addr(ahci_ctlp, &sdevice, &addr); 9122 9123 /* 9124 * Call the sata hba interface to get a rdlog spkt 9125 */ 9126 loop_count = 0; 9127 loop: 9128 rdlog_spkt = sata_get_error_retrieval_pkt(ahci_ctlp->ahcictl_dip, 9129 &sdevice, SATA_ERR_RETR_PKT_TYPE_NCQ); 9130 if (rdlog_spkt == NULL) { 9131 if (loop_count++ < AHCI_POLLRATE_GET_SPKT) { 9132 /* Sleep for a while */ 9133 drv_usecwait(AHCI_10MS_USECS); 9134 goto loop; 9135 } 9136 /* Timed out after 1s */ 9137 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9138 "failed to get rdlog spkt for port %d", port); 9139 return (failed_tags); 9140 } 9141 9142 ASSERT(rdlog_spkt->satapkt_op_mode & SATA_OPMODE_SYNCH); 9143 9144 /* 9145 * This flag is used to handle the specific error recovery when the 9146 * READ LOG EXT command gets a failure (fatal error or time-out). 9147 */ 9148 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RDLOGEXT; 9149 9150 /* 9151 * This start is not supposed to fail because after port is restarted, 9152 * the whole command list is empty. 9153 */ 9154 ahci_portp->ahciport_err_retri_pkt = rdlog_spkt; 9155 (void) ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, rdlog_spkt); 9156 ahci_portp->ahciport_err_retri_pkt = NULL; 9157 9158 /* Remove the flag after READ LOG EXT command is completed */ 9159 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_RDLOGEXT; 9160 9161 if (rdlog_spkt->satapkt_reason == SATA_PKT_COMPLETED) { 9162 /* Update the request log data */ 9163 buf_dma_handle = *(ddi_dma_handle_t *) 9164 (rdlog_spkt->satapkt_cmd.satacmd_err_ret_buf_handle); 9165 rval = ddi_dma_sync(buf_dma_handle, 0, 0, 9166 DDI_DMA_SYNC_FORKERNEL); 9167 if (rval == DDI_SUCCESS) { 9168 ncq_err_page = 9169 (struct sata_ncq_error_recovery_page *)rdlog_spkt-> 9170 satapkt_cmd.satacmd_bp->b_un.b_addr; 9171 9172 /* Get the failed tag */ 9173 failed_slot = ncq_err_page->ncq_tag; 9174 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9175 "ahci_get_rdlogext_data: port %d " 9176 "failed slot %d", port, failed_slot); 9177 if (failed_slot & NQ) { 9178 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9179 "the failed slot is not a valid tag", NULL); 9180 goto out; 9181 } 9182 9183 failed_slot &= NCQ_TAG_MASK; 9184 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 9185 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9186 "ahci_get_rdlogext_data: failed spkt 0x%p", 9187 (void *)spkt); 9188 if (spkt == NULL) { 9189 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9190 "the failed slot spkt is NULL", NULL); 9191 goto out; 9192 } 9193 9194 failed_tags = 0x1 << failed_slot; 9195 9196 /* Fill out the error context */ 9197 ahci_copy_ncq_err_page(&spkt->satapkt_cmd, 9198 ncq_err_page); 9199 ahci_update_sata_registers(ahci_ctlp, port, 9200 &spkt->satapkt_device); 9201 } 9202 } 9203 out: 9204 sata_free_error_retrieval_pkt(rdlog_spkt); 9205 9206 return (failed_tags); 9207 } 9208 9209 /* 9210 * This routine is going to first request a REQUEST SENSE sata pkt from sata 9211 * module, and then deliver it to the HBA to get the sense data and copy 9212 * the sense data back to the orignal failed sata pkt, and free the REQUEST 9213 * SENSE sata pkt later. 9214 */ 9215 static void 9216 ahci_get_rqsense_data(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 9217 uint8_t port, sata_pkt_t *spkt) 9218 { 9219 sata_device_t sdevice; 9220 sata_pkt_t *rs_spkt; 9221 sata_cmd_t *sata_cmd; 9222 ddi_dma_handle_t buf_dma_handle; 9223 ahci_addr_t addr; 9224 int loop_count; 9225 #if AHCI_DEBUG 9226 struct scsi_extended_sense *rqsense; 9227 #endif 9228 9229 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 9230 "ahci_get_rqsense_data enter: port %d", port); 9231 9232 /* Prepare the sdevice data */ 9233 bzero((void *)&sdevice, sizeof (sata_device_t)); 9234 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 9235 9236 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 9237 sdevice.satadev_addr.pmport = 0; 9238 9239 /* Translate sata_device.satadev_addr -> ahci_addr */ 9240 ahci_get_ahci_addr(ahci_ctlp, &sdevice, &addr); 9241 9242 sata_cmd = &spkt->satapkt_cmd; 9243 9244 /* 9245 * Call the sata hba interface to get a rs spkt 9246 */ 9247 loop_count = 0; 9248 loop: 9249 rs_spkt = sata_get_error_retrieval_pkt(ahci_ctlp->ahcictl_dip, 9250 &sdevice, SATA_ERR_RETR_PKT_TYPE_ATAPI); 9251 if (rs_spkt == NULL) { 9252 if (loop_count++ < AHCI_POLLRATE_GET_SPKT) { 9253 /* Sleep for a while */ 9254 drv_usecwait(AHCI_10MS_USECS); 9255 goto loop; 9256 9257 } 9258 /* Timed out after 1s */ 9259 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9260 "failed to get rs spkt for port %d", port); 9261 return; 9262 } 9263 9264 ASSERT(rs_spkt->satapkt_op_mode & SATA_OPMODE_SYNCH); 9265 9266 /* 9267 * This flag is used to handle the specific error recovery when the 9268 * REQUEST SENSE command gets a faiure (fatal error or time-out). 9269 */ 9270 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RQSENSE; 9271 9272 /* 9273 * This start is not supposed to fail because after port is restarted, 9274 * the whole command list is empty. 9275 */ 9276 ahci_portp->ahciport_err_retri_pkt = rs_spkt; 9277 (void) ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, rs_spkt); 9278 ahci_portp->ahciport_err_retri_pkt = NULL; 9279 9280 /* Remove the flag after REQUEST SENSE command is completed */ 9281 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_RQSENSE; 9282 9283 if (rs_spkt->satapkt_reason == SATA_PKT_COMPLETED) { 9284 /* Update the request sense data */ 9285 buf_dma_handle = *(ddi_dma_handle_t *) 9286 (rs_spkt->satapkt_cmd.satacmd_err_ret_buf_handle); 9287 (void) ddi_dma_sync(buf_dma_handle, 0, 0, 9288 DDI_DMA_SYNC_FORKERNEL); 9289 /* Copy the request sense data */ 9290 bcopy(rs_spkt-> 9291 satapkt_cmd.satacmd_bp->b_un.b_addr, 9292 &sata_cmd->satacmd_rqsense, 9293 SATA_ATAPI_MIN_RQSENSE_LEN); 9294 #if AHCI_DEBUG 9295 rqsense = (struct scsi_extended_sense *) 9296 sata_cmd->satacmd_rqsense; 9297 9298 /* Dump the sense data */ 9299 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, "\n", NULL); 9300 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, 9301 "Sense data for satapkt %p ATAPI cmd 0x%x", 9302 spkt, sata_cmd->satacmd_acdb[0]); 9303 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, 9304 " es_code 0x%x es_class 0x%x " 9305 "es_key 0x%x es_add_code 0x%x " 9306 "es_qual_code 0x%x", 9307 rqsense->es_code, rqsense->es_class, 9308 rqsense->es_key, rqsense->es_add_code, 9309 rqsense->es_qual_code); 9310 #endif 9311 } 9312 9313 sata_free_error_retrieval_pkt(rs_spkt); 9314 } 9315 9316 /* 9317 * Fatal errors will cause the HBA to enter the ERR: Fatal state. To recover, 9318 * the port must be restarted. When the HBA detects thus error, it may try 9319 * to abort a transfer. And if the transfer was aborted, the device is 9320 * expected to send a D2H Register FIS with PxTFD.STS.ERR set to '1' and both 9321 * PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0'. Then system software knows 9322 * that the device is in a stable status and transfers may be restarted without 9323 * issuing a COMRESET to the device. If PxTFD.STS.BSY or PxTFD.STS.DRQ is set, 9324 * then the software will send the COMRESET to do the port reset. 9325 * 9326 * Software should perform the appropriate error recovery actions based on 9327 * whether non-queued commands were being issued or natived command queuing 9328 * commands were being issued. 9329 * 9330 * And software will complete the command that had the error with error mark 9331 * to higher level software. 9332 * 9333 * Fatal errors include the following: 9334 * PxIS.IFS - Interface Fatal Error Status 9335 * PxIS.HBDS - Host Bus Data Error Status 9336 * PxIS.HBFS - Host Bus Fatal Error Status 9337 * PxIS.TFES - Task File Error Status 9338 * 9339 * WARNING!!! ahciport_mutex should be acquired before the function is called. 9340 */ 9341 static void 9342 ahci_fatal_error_recovery_handler(ahci_ctl_t *ahci_ctlp, 9343 ahci_port_t *ahci_portp, ahci_addr_t *addrp, uint32_t intr_status) 9344 { 9345 uint32_t port_cmd_status; 9346 uint32_t slot_status = 0; 9347 uint32_t failed_tags = 0; 9348 int failed_slot; 9349 int reset_flag = 0, flag = 0; 9350 ahci_fis_d2h_register_t *ahci_rcvd_fisp; 9351 sata_cmd_t *sata_cmd = NULL; 9352 sata_pkt_t *spkt = NULL; 9353 #if AHCI_DEBUG 9354 ahci_cmd_header_t *cmd_header; 9355 #endif 9356 uint8_t port = addrp->aa_port; 9357 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 9358 int rval; 9359 9360 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 9361 "ahci_fatal_error_recovery_handler enter: port %d", port); 9362 9363 /* Port multiplier error */ 9364 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 9365 /* FBS code is neither completed nor tested. */ 9366 ahci_pmult_error_recovery_handler(ahci_ctlp, ahci_portp, 9367 port, intr_status); 9368 9369 /* Force a port reset */ 9370 flag = AHCI_PORT_RESET; 9371 } 9372 9373 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 9374 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9375 9376 /* Read PxCI to see which commands are still outstanding */ 9377 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9378 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 9379 9380 /* 9381 * Read PxCMD.CCS to determine the slot that the HBA 9382 * was processing when the error occurred. 9383 */ 9384 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9385 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 9386 failed_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 9387 AHCI_CMD_STATUS_CCS_SHIFT; 9388 9389 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9390 spkt = ahci_portp->ahciport_err_retri_pkt; 9391 ASSERT(spkt != NULL); 9392 } else { 9393 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 9394 if (spkt == NULL) { 9395 /* May happen when interface errors occur? */ 9396 goto next; 9397 } 9398 } 9399 9400 #if AHCI_DEBUG 9401 /* 9402 * Debugging purpose... 9403 */ 9404 if (ahci_portp->ahciport_prd_bytecounts[failed_slot]) { 9405 cmd_header = 9406 &ahci_portp->ahciport_cmd_list[failed_slot]; 9407 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 9408 "ahci_fatal_error_recovery_handler: port %d, " 9409 "PRD Byte Count = 0x%x, " 9410 "ahciport_prd_bytecounts = 0x%x", port, 9411 cmd_header->ahcich_prd_byte_count, 9412 ahci_portp->ahciport_prd_bytecounts[failed_slot]); 9413 } 9414 #endif 9415 9416 sata_cmd = &spkt->satapkt_cmd; 9417 9418 /* Fill out the status and error registers for PxIS.TFES */ 9419 if (intr_status & AHCI_INTR_STATUS_TFES) { 9420 ahci_rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 9421 ahcirf_d2h_register_fis); 9422 9423 /* Copy the error context back to the sata_cmd */ 9424 ahci_copy_err_cnxt(sata_cmd, ahci_rcvd_fisp); 9425 } 9426 9427 /* The failed command must be one of the outstanding commands */ 9428 failed_tags = 0x1 << failed_slot; 9429 ASSERT(failed_tags & slot_status); 9430 9431 /* Update the sata registers, especially PxSERR register */ 9432 ahci_update_sata_registers(ahci_ctlp, port, 9433 &spkt->satapkt_device); 9434 9435 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9436 /* Read PxSACT to see which commands are still outstanding */ 9437 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9438 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 9439 } 9440 next: 9441 9442 #if AHCI_DEBUG 9443 /* 9444 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is 9445 * set, it means a fatal error happened after REQUEST SENSE command 9446 * or READ LOG EXT command is delivered to the HBA during the error 9447 * recovery process. At this time, the only outstanding command is 9448 * supposed to be REQUEST SENSE command or READ LOG EXT command. 9449 */ 9450 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9451 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9452 "ahci_fatal_error_recovery_handler: port %d REQUEST SENSE " 9453 "command or READ LOG EXT command for error data retrieval " 9454 "failed", port); 9455 ASSERT(slot_status == 0x1); 9456 ASSERT(failed_slot == 0); 9457 ASSERT(spkt->satapkt_cmd.satacmd_acdb[0] == 9458 SCMD_REQUEST_SENSE || 9459 spkt->satapkt_cmd.satacmd_cmd_reg == 9460 SATAC_READ_LOG_EXT); 9461 } 9462 #endif 9463 9464 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 9465 ahci_portp->ahciport_mop_in_progress++; 9466 9467 rval = ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 9468 port, flag, &reset_flag); 9469 9470 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_ERRPRINT) { 9471 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_ERRPRINT; 9472 if (rval == AHCI_SUCCESS) 9473 cmn_err(CE_WARN, "!ahci%d: error recovery for port %d " 9474 "succeed", instance, port); 9475 else 9476 cmn_err(CE_WARN, "!ahci%d: error recovery for port %d " 9477 "failed", instance, port); 9478 } 9479 9480 /* 9481 * Won't retrieve error information: 9482 * 1. Port reset was involved to recover 9483 * 2. Device is gone 9484 * 3. IDENTIFY DEVICE command sent to ATAPI device 9485 * 4. REQUEST SENSE or READ LOG EXT command during error recovery 9486 */ 9487 if (reset_flag || 9488 ahci_portp->ahciport_device_type == SATA_DTYPE_NONE || 9489 spkt && spkt->satapkt_cmd.satacmd_cmd_reg == SATAC_ID_DEVICE || 9490 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 9491 goto out; 9492 9493 /* 9494 * Deliver READ LOG EXT to gather information about the error when 9495 * a COMRESET has not been performed as part of the error recovery 9496 * during NCQ command processing. 9497 */ 9498 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9499 failed_tags = ahci_get_rdlogext_data(ahci_ctlp, 9500 ahci_portp, port); 9501 goto out; 9502 } 9503 9504 /* 9505 * Deliver REQUEST SENSE for ATAPI command to gather information about 9506 * the error when a COMRESET has not been performed as part of the 9507 * error recovery. 9508 */ 9509 if (spkt && ahci_portp->ahciport_device_type == SATA_DTYPE_ATAPI) 9510 ahci_get_rqsense_data(ahci_ctlp, ahci_portp, port, spkt); 9511 out: 9512 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9513 "ahci_fatal_error_recovery_handler: port %d fatal error " 9514 "occurred slot_status = 0x%x, pending_tags = 0x%x, " 9515 "pending_ncq_tags = 0x%x failed_tags = 0x%x", 9516 port, slot_status, ahci_portp->ahciport_pending_tags, 9517 ahci_portp->ahciport_pending_ncq_tags, failed_tags); 9518 9519 ahci_mop_commands(ahci_ctlp, 9520 ahci_portp, 9521 slot_status, 9522 failed_tags, /* failed tags */ 9523 0, /* timeout tags */ 9524 0, /* aborted tags */ 9525 0); /* reset tags */ 9526 } 9527 9528 /* 9529 * Used to recovery a PMULT pmport fatal error under FIS-based switching. 9530 * 1. device specific.PxFBS.SDE=1 9531 * 2. Non-Deivce specific. 9532 * Nothing will be done when Command-based switching is employed. 9533 * 9534 * Currently code is neither completed nor tested. 9535 * 9536 * WARNING!!! ahciport_mutex should be acquired before the function 9537 * is called. 9538 */ 9539 static void 9540 ahci_pmult_error_recovery_handler(ahci_ctl_t *ahci_ctlp, 9541 ahci_port_t *ahci_portp, uint8_t port, uint32_t intr_status) 9542 { 9543 #ifndef __lock_lint 9544 _NOTE(ARGUNUSED(intr_status)) 9545 #endif 9546 uint32_t port_fbs_ctrl; 9547 int loop_count = 0; 9548 ahci_addr_t addr; 9549 9550 /* Nothing will be done under Command-based switching. */ 9551 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_FBSS)) 9552 return; 9553 9554 port_fbs_ctrl = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9555 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port)); 9556 9557 if (!(port_fbs_ctrl & AHCI_FBS_EN)) 9558 /* FBS is not enabled. */ 9559 return; 9560 9561 /* Problem's getting complicated now. */ 9562 /* 9563 * If FIS-based switching is used, we need to check 9564 * the PxFBS to see the error type. 9565 */ 9566 port_fbs_ctrl = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9567 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port)); 9568 9569 /* Refer to spec(v1.2) 9.3.6.1 */ 9570 if (port_fbs_ctrl & AHCI_FBS_SDE) { 9571 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9572 "A Device Sepcific Error: port %d", port); 9573 /* 9574 * Controller has paused commands for all other 9575 * sub-devices until PxFBS.DEC is set. 9576 */ 9577 ahci_reject_all_abort_pkts(ahci_ctlp, 9578 ahci_portp, 0); 9579 9580 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 9581 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port), 9582 port_fbs_ctrl | AHCI_FBS_DEC); 9583 9584 /* 9585 * Wait controller clear PxFBS.DEC, 9586 * then we can continue. 9587 */ 9588 loop_count = 0; 9589 do { 9590 port_fbs_ctrl = ddi_get32(ahci_ctlp-> 9591 ahcictl_ahci_acc_handle, (uint32_t *) 9592 AHCI_PORT_PxFBS(ahci_ctlp, port)); 9593 9594 if (loop_count++ > 1000) 9595 /* 9596 * Esclate the error. Follow 9597 * non-device specific error 9598 * procedure. 9599 */ 9600 return; 9601 9602 drv_usecwait(AHCI_100US_USECS); 9603 } while (port_fbs_ctrl & AHCI_FBS_DEC); 9604 9605 /* 9606 * Issue a software reset to ensure drive is in 9607 * a known state. 9608 */ 9609 (void) ahci_software_reset(ahci_ctlp, 9610 ahci_portp, &addr); 9611 9612 } else { 9613 9614 /* Process Non-Device Specific Error. */ 9615 /* This will be handled later on. */ 9616 cmn_err(CE_NOTE, "!FBS is not supported now."); 9617 } 9618 } 9619 /* 9620 * Handle events - fatal error recovery 9621 */ 9622 static void 9623 ahci_events_handler(void *args) 9624 { 9625 ahci_event_arg_t *ahci_event_arg; 9626 ahci_ctl_t *ahci_ctlp; 9627 ahci_port_t *ahci_portp; 9628 ahci_addr_t *addrp; 9629 uint32_t event; 9630 int instance; 9631 9632 ahci_event_arg = (ahci_event_arg_t *)args; 9633 9634 ahci_ctlp = ahci_event_arg->ahciea_ctlp; 9635 ahci_portp = ahci_event_arg->ahciea_portp; 9636 addrp = ahci_event_arg->ahciea_addrp; 9637 event = ahci_event_arg->ahciea_event; 9638 instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 9639 9640 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 9641 "ahci_events_handler enter: port %d intr_status = 0x%x", 9642 ahci_portp->ahciport_port_num, event); 9643 9644 mutex_enter(&ahci_portp->ahciport_mutex); 9645 9646 /* 9647 * ahci_intr_phyrdy_change() may have rendered it to 9648 * SATA_DTYPE_NONE. 9649 */ 9650 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 9651 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 9652 "ahci_events_handler: port %d no device attached, " 9653 "and just return without doing anything", 9654 ahci_portp->ahciport_port_num); 9655 9656 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_ERRPRINT) { 9657 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_ERRPRINT; 9658 cmn_err(CE_WARN, "!ahci%d: error recovery for port %d " 9659 "succeed", instance, ahci_portp->ahciport_port_num); 9660 } 9661 9662 goto out; 9663 } 9664 9665 if (event & (AHCI_INTR_STATUS_IFS | 9666 AHCI_INTR_STATUS_HBDS | 9667 AHCI_INTR_STATUS_HBFS | 9668 AHCI_INTR_STATUS_TFES)) 9669 ahci_fatal_error_recovery_handler(ahci_ctlp, ahci_portp, 9670 addrp, event); 9671 9672 out: 9673 mutex_exit(&ahci_portp->ahciport_mutex); 9674 } 9675 9676 /* 9677 * ahci_watchdog_handler() and ahci_do_sync_start will call us if they 9678 * detect there are some commands which are timed out. 9679 */ 9680 static void 9681 ahci_timeout_pkts(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 9682 uint8_t port, uint32_t tmp_timeout_tags) 9683 { 9684 uint32_t slot_status = 0; 9685 uint32_t finished_tags = 0; 9686 uint32_t timeout_tags = 0; 9687 9688 AHCIDBG(AHCIDBG_TIMEOUT|AHCIDBG_ENTRY, ahci_ctlp, 9689 "ahci_timeout_pkts enter: port %d", port); 9690 9691 mutex_enter(&ahci_portp->ahciport_mutex); 9692 9693 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 9694 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) || 9695 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9696 /* Read PxCI to see which commands are still outstanding */ 9697 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9698 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 9699 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9700 /* Read PxSACT to see which commands are still outstanding */ 9701 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9702 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 9703 } 9704 9705 #if AHCI_DEBUG 9706 /* 9707 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is 9708 * set, it means a fatal error happened after REQUEST SENSE command 9709 * or READ LOG EXT command is delivered to the HBA during the error 9710 * recovery process. At this time, the only outstanding command is 9711 * supposed to be REQUEST SENSE command or READ LOG EXT command. 9712 */ 9713 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9714 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, ahci_ctlp, 9715 "ahci_timeout_pkts called while REQUEST SENSE " 9716 "command or READ LOG EXT command for error recovery " 9717 "timed out timeout_tags = 0x%x, slot_status = 0x%x, " 9718 "pending_tags = 0x%x, pending_ncq_tags = 0x%x", 9719 tmp_timeout_tags, slot_status, 9720 ahci_portp->ahciport_pending_tags, 9721 ahci_portp->ahciport_pending_ncq_tags); 9722 ASSERT(slot_status == 0x1); 9723 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9724 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, ahci_ctlp, 9725 "ahci_timeout_pkts called while executing R/W PMULT " 9726 "command timeout_tags = 0x%x, slot_status = 0x%x", 9727 tmp_timeout_tags, slot_status); 9728 ASSERT(slot_status == 0x1); 9729 } 9730 #endif 9731 9732 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 9733 ahci_portp->ahciport_mop_in_progress++; 9734 9735 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 9736 port, AHCI_PORT_RESET, NULL); 9737 9738 /* 9739 * Re-identify timeout tags because some previously checked commands 9740 * could already complete. 9741 */ 9742 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9743 finished_tags = ahci_portp->ahciport_pending_tags & 9744 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 9745 timeout_tags = tmp_timeout_tags & ~finished_tags; 9746 9747 AHCIDBG(AHCIDBG_TIMEOUT, ahci_ctlp, 9748 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, " 9749 "timeout_tags = 0x%x, port_cmd_issue = 0x%x, " 9750 "pending_tags = 0x%x ", 9751 port, finished_tags, timeout_tags, 9752 slot_status, ahci_portp->ahciport_pending_tags); 9753 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9754 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 9755 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 9756 timeout_tags = tmp_timeout_tags & ~finished_tags; 9757 9758 AHCIDBG(AHCIDBG_TIMEOUT|AHCIDBG_NCQ, ahci_ctlp, 9759 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, " 9760 "timeout_tags = 0x%x, port_sactive = 0x%x, " 9761 "pending_ncq_tags = 0x%x ", 9762 port, finished_tags, timeout_tags, 9763 slot_status, ahci_portp->ahciport_pending_ncq_tags); 9764 } else if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 9765 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9766 timeout_tags = tmp_timeout_tags; 9767 } 9768 9769 ahci_mop_commands(ahci_ctlp, 9770 ahci_portp, 9771 slot_status, 9772 0, /* failed tags */ 9773 timeout_tags, /* timeout tags */ 9774 0, /* aborted tags */ 9775 0); /* reset tags */ 9776 9777 mutex_exit(&ahci_portp->ahciport_mutex); 9778 } 9779 9780 /* 9781 * Watchdog handler kicks in every 5 seconds to timeout any commands pending 9782 * for long time. 9783 */ 9784 static void 9785 ahci_watchdog_handler(ahci_ctl_t *ahci_ctlp) 9786 { 9787 ahci_port_t *ahci_portp; 9788 sata_pkt_t *spkt; 9789 uint32_t pending_tags; 9790 uint32_t timeout_tags; 9791 uint32_t port_cmd_status; 9792 uint32_t port_sactive; 9793 uint8_t port; 9794 int tmp_slot; 9795 int current_slot; 9796 uint32_t current_tags; 9797 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 9798 9799 mutex_enter(&ahci_ctlp->ahcictl_mutex); 9800 9801 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 9802 "ahci_watchdog_handler entered", NULL); 9803 9804 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 9805 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 9806 continue; 9807 } 9808 9809 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 9810 9811 mutex_enter(&ahci_portp->ahciport_mutex); 9812 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 9813 mutex_exit(&ahci_portp->ahciport_mutex); 9814 continue; 9815 } 9816 9817 /* Skip the check for those ports in error recovery */ 9818 if ((ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) && 9819 !(ERR_RETRI_CMD_IN_PROGRESS(ahci_portp))) { 9820 mutex_exit(&ahci_portp->ahciport_mutex); 9821 continue; 9822 } 9823 9824 pending_tags = 0; 9825 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9826 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 9827 9828 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 9829 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9830 current_slot = 0; 9831 pending_tags = 0x1; 9832 } else if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9833 current_slot = 9834 (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 9835 AHCI_CMD_STATUS_CCS_SHIFT; 9836 pending_tags = ahci_portp->ahciport_pending_tags; 9837 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9838 port_sactive = ddi_get32( 9839 ahci_ctlp->ahcictl_ahci_acc_handle, 9840 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 9841 current_tags = port_sactive & 9842 ~port_cmd_status & 9843 AHCI_NCQ_SLOT_MASK(ahci_portp); 9844 pending_tags = ahci_portp->ahciport_pending_ncq_tags; 9845 } 9846 9847 timeout_tags = 0; 9848 while (pending_tags) { 9849 tmp_slot = ddi_ffs(pending_tags) - 1; 9850 if (tmp_slot == -1) { 9851 break; 9852 } 9853 9854 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 9855 spkt = ahci_portp->ahciport_err_retri_pkt; 9856 else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 9857 spkt = ahci_portp->ahciport_rdwr_pmult_pkt; 9858 else 9859 spkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 9860 9861 if ((spkt != NULL) && spkt->satapkt_time && 9862 !(spkt->satapkt_op_mode & SATA_OPMODE_POLLING)) { 9863 /* 9864 * If a packet has survived for more than it's 9865 * max life cycles, it is a candidate for time 9866 * out. 9867 */ 9868 ahci_portp->ahciport_slot_timeout[tmp_slot] -= 9869 ahci_watchdog_timeout; 9870 9871 if (ahci_portp->ahciport_slot_timeout[tmp_slot] 9872 > 0) 9873 goto next; 9874 9875 #if AHCI_DEBUG 9876 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9877 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, 9878 ahci_ctlp, "watchdog: the current " 9879 "tags is 0x%x", current_tags); 9880 } else { 9881 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, 9882 ahci_ctlp, "watchdog: the current " 9883 "slot is %d", current_slot); 9884 } 9885 #endif 9886 9887 /* 9888 * We need to check whether the HBA has 9889 * begun to execute the command, if not, 9890 * then re-set the timer of the command. 9891 */ 9892 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) && 9893 (tmp_slot != current_slot) || 9894 NCQ_CMD_IN_PROGRESS(ahci_portp) && 9895 ((0x1 << tmp_slot) & current_tags)) { 9896 ahci_portp->ahciport_slot_timeout \ 9897 [tmp_slot] = spkt->satapkt_time; 9898 } else { 9899 timeout_tags |= (0x1 << tmp_slot); 9900 cmn_err(CE_WARN, "!ahci%d: watchdog " 9901 "port %d satapkt 0x%p timed out\n", 9902 instance, port, (void *)spkt); 9903 } 9904 } 9905 next: 9906 CLEAR_BIT(pending_tags, tmp_slot); 9907 } 9908 9909 if (timeout_tags) { 9910 mutex_exit(&ahci_portp->ahciport_mutex); 9911 mutex_exit(&ahci_ctlp->ahcictl_mutex); 9912 ahci_timeout_pkts(ahci_ctlp, ahci_portp, 9913 port, timeout_tags); 9914 mutex_enter(&ahci_ctlp->ahcictl_mutex); 9915 mutex_enter(&ahci_portp->ahciport_mutex); 9916 } 9917 9918 mutex_exit(&ahci_portp->ahciport_mutex); 9919 } 9920 9921 /* Re-install the watchdog timeout handler */ 9922 if (ahci_ctlp->ahcictl_timeout_id != 0) { 9923 ahci_ctlp->ahcictl_timeout_id = 9924 timeout((void (*)(void *))ahci_watchdog_handler, 9925 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 9926 } 9927 9928 mutex_exit(&ahci_ctlp->ahcictl_mutex); 9929 } 9930 9931 /* 9932 * Fill the error context into sata_cmd for non-queued command error. 9933 */ 9934 static void 9935 ahci_copy_err_cnxt(sata_cmd_t *scmd, ahci_fis_d2h_register_t *rfisp) 9936 { 9937 scmd->satacmd_status_reg = GET_RFIS_STATUS(rfisp); 9938 scmd->satacmd_error_reg = GET_RFIS_ERROR(rfisp); 9939 scmd->satacmd_sec_count_lsb = GET_RFIS_SECTOR_COUNT(rfisp); 9940 scmd->satacmd_lba_low_lsb = GET_RFIS_CYL_LOW(rfisp); 9941 scmd->satacmd_lba_mid_lsb = GET_RFIS_CYL_MID(rfisp); 9942 scmd->satacmd_lba_high_lsb = GET_RFIS_CYL_HI(rfisp); 9943 scmd->satacmd_device_reg = GET_RFIS_DEV_HEAD(rfisp); 9944 9945 if (scmd->satacmd_addr_type == ATA_ADDR_LBA48) { 9946 scmd->satacmd_sec_count_msb = GET_RFIS_SECTOR_COUNT_EXP(rfisp); 9947 scmd->satacmd_lba_low_msb = GET_RFIS_CYL_LOW_EXP(rfisp); 9948 scmd->satacmd_lba_mid_msb = GET_RFIS_CYL_MID_EXP(rfisp); 9949 scmd->satacmd_lba_high_msb = GET_RFIS_CYL_HI_EXP(rfisp); 9950 } 9951 } 9952 9953 /* 9954 * Fill the ncq error page into sata_cmd for queued command error. 9955 */ 9956 static void 9957 ahci_copy_ncq_err_page(sata_cmd_t *scmd, 9958 struct sata_ncq_error_recovery_page *ncq_err_page) 9959 { 9960 scmd->satacmd_sec_count_msb = ncq_err_page->ncq_sector_count_ext; 9961 scmd->satacmd_sec_count_lsb = ncq_err_page->ncq_sector_count; 9962 scmd->satacmd_lba_low_msb = ncq_err_page->ncq_sector_number_ext; 9963 scmd->satacmd_lba_low_lsb = ncq_err_page->ncq_sector_number; 9964 scmd->satacmd_lba_mid_msb = ncq_err_page->ncq_cyl_low_ext; 9965 scmd->satacmd_lba_mid_lsb = ncq_err_page->ncq_cyl_low; 9966 scmd->satacmd_lba_high_msb = ncq_err_page->ncq_cyl_high_ext; 9967 scmd->satacmd_lba_high_lsb = ncq_err_page->ncq_cyl_high; 9968 scmd->satacmd_device_reg = ncq_err_page->ncq_dev_head; 9969 scmd->satacmd_status_reg = ncq_err_page->ncq_status; 9970 scmd->satacmd_error_reg = ncq_err_page->ncq_error; 9971 } 9972 9973 /* 9974 * Put the respective register value to sata_cmd_t for satacmd_flags. 9975 */ 9976 static void 9977 ahci_copy_out_regs(sata_cmd_t *scmd, ahci_fis_d2h_register_t *rfisp) 9978 { 9979 if (scmd->satacmd_flags.sata_copy_out_sec_count_msb) 9980 scmd->satacmd_sec_count_msb = GET_RFIS_SECTOR_COUNT_EXP(rfisp); 9981 if (scmd->satacmd_flags.sata_copy_out_lba_low_msb) 9982 scmd->satacmd_lba_low_msb = GET_RFIS_CYL_LOW_EXP(rfisp); 9983 if (scmd->satacmd_flags.sata_copy_out_lba_mid_msb) 9984 scmd->satacmd_lba_mid_msb = GET_RFIS_CYL_MID_EXP(rfisp); 9985 if (scmd->satacmd_flags.sata_copy_out_lba_high_msb) 9986 scmd->satacmd_lba_high_msb = GET_RFIS_CYL_HI_EXP(rfisp); 9987 if (scmd->satacmd_flags.sata_copy_out_sec_count_lsb) 9988 scmd->satacmd_sec_count_lsb = GET_RFIS_SECTOR_COUNT(rfisp); 9989 if (scmd->satacmd_flags.sata_copy_out_lba_low_lsb) 9990 scmd->satacmd_lba_low_lsb = GET_RFIS_CYL_LOW(rfisp); 9991 if (scmd->satacmd_flags.sata_copy_out_lba_mid_lsb) 9992 scmd->satacmd_lba_mid_lsb = GET_RFIS_CYL_MID(rfisp); 9993 if (scmd->satacmd_flags.sata_copy_out_lba_high_lsb) 9994 scmd->satacmd_lba_high_lsb = GET_RFIS_CYL_HI(rfisp); 9995 if (scmd->satacmd_flags.sata_copy_out_device_reg) 9996 scmd->satacmd_device_reg = GET_RFIS_DEV_HEAD(rfisp); 9997 if (scmd->satacmd_flags.sata_copy_out_error_reg) 9998 scmd->satacmd_error_reg = GET_RFIS_ERROR(rfisp); 9999 } 10000 10001 static void 10002 ahci_log_fatal_error_message(ahci_ctl_t *ahci_ctlp, uint8_t port, 10003 uint32_t intr_status) 10004 { 10005 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 10006 10007 if (intr_status & AHCI_INTR_STATUS_IFS) 10008 cmn_err(CE_WARN, "!ahci%d: ahci port %d has interface fatal " 10009 "error", instance, port); 10010 10011 if (intr_status & AHCI_INTR_STATUS_HBDS) 10012 cmn_err(CE_WARN, "!ahci%d: ahci port %d has bus data error", 10013 instance, port); 10014 10015 if (intr_status & AHCI_INTR_STATUS_HBFS) 10016 cmn_err(CE_WARN, "!ahci%d: ahci port %d has bus fatal error", 10017 instance, port); 10018 10019 if (intr_status & AHCI_INTR_STATUS_TFES) 10020 cmn_err(CE_WARN, "!ahci%d: ahci port %d has task file error", 10021 instance, port); 10022 10023 cmn_err(CE_WARN, "!ahci%d: ahci port %d is trying to do error " 10024 "recovery", instance, port); 10025 } 10026 10027 static void 10028 ahci_dump_commands(ahci_ctl_t *ahci_ctlp, uint8_t port, 10029 uint32_t slot_tags) 10030 { 10031 ahci_port_t *ahci_portp; 10032 int tmp_slot; 10033 sata_pkt_t *spkt; 10034 sata_cmd_t cmd; 10035 10036 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 10037 ASSERT(ahci_portp != NULL); 10038 10039 while (slot_tags) { 10040 tmp_slot = ddi_ffs(slot_tags) - 1; 10041 if (tmp_slot == -1) { 10042 break; 10043 } 10044 10045 spkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 10046 ASSERT(spkt != NULL); 10047 cmd = spkt->satapkt_cmd; 10048 10049 cmn_err(CE_WARN, "!satapkt 0x%p: cmd_reg = 0x%x " 10050 "features_reg = 0x%x sec_count_msb = 0x%x " 10051 "lba_low_msb = 0x%x lba_mid_msb = 0x%x " 10052 "lba_high_msb = 0x%x sec_count_lsb = 0x%x " 10053 "lba_low_lsb = 0x%x lba_mid_lsb = 0x%x " 10054 "lba_high_lsb = 0x%x device_reg = 0x%x " 10055 "addr_type = 0x%x cmd_flags = 0x%x", (void *)spkt, 10056 cmd.satacmd_cmd_reg, cmd.satacmd_features_reg, 10057 cmd.satacmd_sec_count_msb, cmd.satacmd_lba_low_msb, 10058 cmd.satacmd_lba_mid_msb, cmd.satacmd_lba_high_msb, 10059 cmd.satacmd_sec_count_lsb, cmd.satacmd_lba_low_lsb, 10060 cmd.satacmd_lba_mid_lsb, cmd.satacmd_lba_high_lsb, 10061 cmd.satacmd_device_reg, cmd.satacmd_addr_type, 10062 *((uint32_t *)&(cmd.satacmd_flags))); 10063 10064 CLEAR_BIT(slot_tags, tmp_slot); 10065 } 10066 } 10067 10068 /* 10069 * Dump the serror message to the log. 10070 */ 10071 static void 10072 ahci_log_serror_message(ahci_ctl_t *ahci_ctlp, uint8_t port, 10073 uint32_t port_serror, int debug_only) 10074 { 10075 static char err_buf[512]; 10076 static char err_msg_header[16]; 10077 char *err_msg = err_buf; 10078 10079 *err_buf = '\0'; 10080 *err_msg_header = '\0'; 10081 10082 if (port_serror & SERROR_DATA_ERR_FIXED) { 10083 err_msg = strcat(err_msg, 10084 "\tRecovered Data Integrity Error (I)\n"); 10085 } 10086 10087 if (port_serror & SERROR_COMM_ERR_FIXED) { 10088 err_msg = strcat(err_msg, 10089 "\tRecovered Communication Error (M)\n"); 10090 } 10091 10092 if (port_serror & SERROR_DATA_ERR) { 10093 err_msg = strcat(err_msg, 10094 "\tTransient Data Integrity Error (T)\n"); 10095 } 10096 10097 if (port_serror & SERROR_PERSISTENT_ERR) { 10098 err_msg = strcat(err_msg, 10099 "\tPersistent Communication or Data Integrity Error (C)\n"); 10100 } 10101 10102 if (port_serror & SERROR_PROTOCOL_ERR) { 10103 err_msg = strcat(err_msg, "\tProtocol Error (P)\n"); 10104 } 10105 10106 if (port_serror & SERROR_INT_ERR) { 10107 err_msg = strcat(err_msg, "\tInternal Error (E)\n"); 10108 } 10109 10110 if (port_serror & SERROR_PHY_RDY_CHG) { 10111 err_msg = strcat(err_msg, "\tPhyRdy Change (N)\n"); 10112 } 10113 10114 if (port_serror & SERROR_PHY_INT_ERR) { 10115 err_msg = strcat(err_msg, "\tPhy Internal Error (I)\n"); 10116 } 10117 10118 if (port_serror & SERROR_COMM_WAKE) { 10119 err_msg = strcat(err_msg, "\tComm Wake (W)\n"); 10120 } 10121 10122 if (port_serror & SERROR_10B_TO_8B_ERR) { 10123 err_msg = strcat(err_msg, "\t10B to 8B Decode Error (B)\n"); 10124 } 10125 10126 if (port_serror & SERROR_DISPARITY_ERR) { 10127 err_msg = strcat(err_msg, "\tDisparity Error (D)\n"); 10128 } 10129 10130 if (port_serror & SERROR_CRC_ERR) { 10131 err_msg = strcat(err_msg, "\tCRC Error (C)\n"); 10132 } 10133 10134 if (port_serror & SERROR_HANDSHAKE_ERR) { 10135 err_msg = strcat(err_msg, "\tHandshake Error (H)\n"); 10136 } 10137 10138 if (port_serror & SERROR_LINK_SEQ_ERR) { 10139 err_msg = strcat(err_msg, "\tLink Sequence Error (S)\n"); 10140 } 10141 10142 if (port_serror & SERROR_TRANS_ERR) { 10143 err_msg = strcat(err_msg, 10144 "\tTransport state transition error (T)\n"); 10145 } 10146 10147 if (port_serror & SERROR_FIS_TYPE) { 10148 err_msg = strcat(err_msg, "\tUnknown FIS Type (F)\n"); 10149 } 10150 10151 if (port_serror & SERROR_EXCHANGED_ERR) { 10152 err_msg = strcat(err_msg, "\tExchanged (X)\n"); 10153 } 10154 10155 if (*err_msg == '\0') 10156 return; 10157 10158 if (debug_only) { 10159 (void) sprintf(err_msg_header, "port %d", port); 10160 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, err_msg_header, NULL); 10161 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, err_msg, NULL); 10162 } else if (ahci_ctlp) { 10163 cmn_err(CE_WARN, "!ahci%d: %s %s", 10164 ddi_get_instance(ahci_ctlp->ahcictl_dip), 10165 err_msg_header, err_msg); 10166 10167 /* sata trace debug */ 10168 sata_trace_debug(ahci_ctlp->ahcictl_dip, 10169 "ahci%d: %s %s", ddi_get_instance(ahci_ctlp->ahcictl_dip), 10170 err_msg_header, err_msg); 10171 } else { 10172 cmn_err(CE_WARN, "!ahci: %s %s", err_msg_header, err_msg); 10173 10174 /* sata trace debug */ 10175 sata_trace_debug(NULL, "ahci: %s %s", err_msg_header, err_msg); 10176 } 10177 } 10178 10179 /* 10180 * Translate the sata_address_t type into the ahci_addr_t type. 10181 * sata_device.satadev_addr structure is used as source. 10182 */ 10183 static void 10184 ahci_get_ahci_addr(ahci_ctl_t *ahci_ctlp, sata_device_t *sd, 10185 ahci_addr_t *ahci_addrp) 10186 { 10187 sata_address_t *sata_addrp = &sd->satadev_addr; 10188 ahci_addrp->aa_port = 10189 ahci_ctlp->ahcictl_cport_to_port[sata_addrp->cport]; 10190 ahci_addrp->aa_pmport = sata_addrp->pmport; 10191 10192 switch (sata_addrp->qual) { 10193 case SATA_ADDR_DCPORT: 10194 case SATA_ADDR_CPORT: 10195 ahci_addrp->aa_qual = AHCI_ADDR_PORT; 10196 break; 10197 case SATA_ADDR_PMULT: 10198 case SATA_ADDR_PMULT_SPEC: 10199 ahci_addrp->aa_qual = AHCI_ADDR_PMULT; 10200 break; 10201 case SATA_ADDR_DPMPORT: 10202 case SATA_ADDR_PMPORT: 10203 ahci_addrp->aa_qual = AHCI_ADDR_PMPORT; 10204 break; 10205 case SATA_ADDR_NULL: 10206 default: 10207 /* something went wrong */ 10208 ahci_addrp->aa_qual = AHCI_ADDR_NULL; 10209 break; 10210 } 10211 } 10212 10213 /* 10214 * This routine is to calculate the total number of ports implemented 10215 * by the HBA. 10216 */ 10217 static int 10218 ahci_get_num_implemented_ports(uint32_t ports_implemented) 10219 { 10220 uint8_t i; 10221 int num = 0; 10222 10223 for (i = 0; i < AHCI_MAX_PORTS; i++) { 10224 if (((uint32_t)0x1 << i) & ports_implemented) 10225 num++; 10226 } 10227 10228 return (num); 10229 } 10230 10231 #if AHCI_DEBUG 10232 static void 10233 ahci_log(ahci_ctl_t *ahci_ctlp, uint_t level, char *fmt, ...) 10234 { 10235 static char name[16]; 10236 va_list ap; 10237 10238 mutex_enter(&ahci_log_mutex); 10239 10240 va_start(ap, fmt); 10241 if (ahci_ctlp) { 10242 (void) sprintf(name, "ahci%d: ", 10243 ddi_get_instance(ahci_ctlp->ahcictl_dip)); 10244 } else { 10245 (void) sprintf(name, "ahci: "); 10246 } 10247 10248 (void) vsprintf(ahci_log_buf, fmt, ap); 10249 va_end(ap); 10250 10251 cmn_err(level, "%s%s", name, ahci_log_buf); 10252 10253 mutex_exit(&ahci_log_mutex); 10254 } 10255 #endif 10256 10257 /* 10258 * quiesce(9E) entry point. 10259 * 10260 * This function is called when the system is single-threaded at high 10261 * PIL with preemption disabled. Therefore, this function must not be 10262 * blocked. 10263 * 10264 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure. 10265 * DDI_FAILURE indicates an error condition and should almost never happen. 10266 */ 10267 static int 10268 ahci_quiesce(dev_info_t *dip) 10269 { 10270 ahci_ctl_t *ahci_ctlp; 10271 ahci_port_t *ahci_portp; 10272 int instance, port; 10273 10274 instance = ddi_get_instance(dip); 10275 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 10276 10277 if (ahci_ctlp == NULL) 10278 return (DDI_FAILURE); 10279 10280 #if AHCI_DEBUG 10281 ahci_debug_flags = 0; 10282 #endif 10283 10284 /* disable all the interrupts. */ 10285 ahci_disable_all_intrs(ahci_ctlp); 10286 10287 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 10288 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 10289 continue; 10290 } 10291 10292 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 10293 10294 /* 10295 * Stop the port by clearing PxCMD.ST 10296 * 10297 * Here we must disable the port interrupt because 10298 * ahci_disable_all_intrs only clear GHC.IE, and IS 10299 * register will be still set if PxIE is enabled. 10300 * When ahci shares one IRQ with other drivers, the 10301 * intr handler may claim the intr mistakenly. 10302 */ 10303 ahci_disable_port_intrs(ahci_ctlp, port); 10304 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 10305 ahci_portp, port); 10306 } 10307 10308 return (DDI_SUCCESS); 10309 } 10310 10311 /* 10312 * The function will add a sata packet to the done queue. 10313 * 10314 * WARNING!!! ahciport_mutex should be acquired before the function 10315 * is called. 10316 */ 10317 static void 10318 ahci_add_doneq(ahci_port_t *ahci_portp, sata_pkt_t *satapkt, int reason) 10319 { 10320 ASSERT(satapkt != NULL); 10321 10322 /* set the reason for all packets */ 10323 satapkt->satapkt_reason = reason; 10324 satapkt->satapkt_hba_driver_private = NULL; 10325 10326 if (! (satapkt->satapkt_op_mode & SATA_OPMODE_SYNCH) && 10327 satapkt->satapkt_comp) { 10328 /* 10329 * only add to queue when mode is not synch and there is 10330 * completion callback 10331 */ 10332 *ahci_portp->ahciport_doneqtail = satapkt; 10333 ahci_portp->ahciport_doneqtail = 10334 (sata_pkt_t **)&(satapkt->satapkt_hba_driver_private); 10335 ahci_portp->ahciport_doneq_len ++; 10336 10337 } else if ((satapkt->satapkt_op_mode & SATA_OPMODE_SYNCH) && 10338 ! (satapkt->satapkt_op_mode & SATA_OPMODE_POLLING)) 10339 /* 10340 * for sync/non-poll mode, just call cv_broadcast 10341 */ 10342 cv_broadcast(&ahci_portp->ahciport_cv); 10343 } 10344 10345 /* 10346 * The function will call completion callback of sata packet on the 10347 * completed queue 10348 * 10349 * WARNING!!! ahciport_mutex should be acquired before the function 10350 * is called. 10351 */ 10352 static void 10353 ahci_flush_doneq(ahci_port_t *ahci_portp) 10354 { 10355 sata_pkt_t *satapkt, *next; 10356 10357 if (ahci_portp->ahciport_doneq) { 10358 satapkt = ahci_portp->ahciport_doneq; 10359 10360 ahci_portp->ahciport_doneq = NULL; 10361 ahci_portp->ahciport_doneqtail = &ahci_portp->ahciport_doneq; 10362 ahci_portp->ahciport_doneq_len = 0; 10363 10364 mutex_exit(&ahci_portp->ahciport_mutex); 10365 10366 while (satapkt != NULL) { 10367 next = satapkt->satapkt_hba_driver_private; 10368 satapkt->satapkt_hba_driver_private = NULL; 10369 10370 /* Call the callback */ 10371 (*satapkt->satapkt_comp)(satapkt); 10372 10373 satapkt = next; 10374 } 10375 10376 mutex_enter(&ahci_portp->ahciport_mutex); 10377 } 10378 } 10379