1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 /* 28 * AHCI (Advanced Host Controller Interface) SATA HBA Driver 29 * 30 * Power Management Support 31 * ------------------------ 32 * 33 * At the moment, the ahci driver only implements suspend/resume to 34 * support Suspend to RAM on X86 feature. Device power management isn't 35 * implemented, link power management is disabled, and hot plug isn't 36 * allowed during the period from suspend to resume. 37 * 38 * For s/r support, the ahci driver only need to implement DDI_SUSPEND 39 * and DDI_RESUME entries, and don't need to take care of new requests 40 * sent down after suspend because the target driver (sd) has already 41 * handled these conditions, and blocked these requests. For the detailed 42 * information, please check with sdopen, sdclose and sdioctl routines. 43 * 44 */ 45 46 #include <sys/note.h> 47 #include <sys/scsi/scsi.h> 48 #include <sys/pci.h> 49 #include <sys/disp.h> 50 #include <sys/sata/sata_hba.h> 51 #include <sys/sata/adapters/ahci/ahcireg.h> 52 #include <sys/sata/adapters/ahci/ahcivar.h> 53 54 /* 55 * This is the string displayed by modinfo, etc. 56 * Make sure you keep the version ID up to date! 57 */ 58 static char ahci_ident[] = "ahci driver"; 59 60 /* 61 * Function prototypes for driver entry points 62 */ 63 static int ahci_attach(dev_info_t *, ddi_attach_cmd_t); 64 static int ahci_detach(dev_info_t *, ddi_detach_cmd_t); 65 static int ahci_getinfo(dev_info_t *, ddi_info_cmd_t, void *, void **); 66 static int ahci_quiesce(dev_info_t *); 67 68 /* 69 * Function prototypes for SATA Framework interfaces 70 */ 71 static int ahci_register_sata_hba_tran(ahci_ctl_t *, uint32_t); 72 static int ahci_unregister_sata_hba_tran(ahci_ctl_t *); 73 74 static int ahci_tran_probe_port(dev_info_t *, sata_device_t *); 75 static int ahci_tran_start(dev_info_t *, sata_pkt_t *spkt); 76 static int ahci_tran_abort(dev_info_t *, sata_pkt_t *, int); 77 static int ahci_tran_reset_dport(dev_info_t *, sata_device_t *); 78 static int ahci_tran_hotplug_port_activate(dev_info_t *, sata_device_t *); 79 static int ahci_tran_hotplug_port_deactivate(dev_info_t *, sata_device_t *); 80 #if defined(__lock_lint) 81 static int ahci_selftest(dev_info_t *, sata_device_t *); 82 #endif 83 84 /* 85 * Local function prototypes 86 */ 87 static int ahci_alloc_ports_state(ahci_ctl_t *); 88 static void ahci_dealloc_ports_state(ahci_ctl_t *); 89 static int ahci_alloc_port_state(ahci_ctl_t *, uint8_t); 90 static void ahci_dealloc_port_state(ahci_ctl_t *, uint8_t); 91 static int ahci_alloc_rcvd_fis(ahci_ctl_t *, ahci_port_t *, uint8_t); 92 static void ahci_dealloc_rcvd_fis(ahci_port_t *); 93 static int ahci_alloc_cmd_list(ahci_ctl_t *, ahci_port_t *, uint8_t); 94 static void ahci_dealloc_cmd_list(ahci_ctl_t *, ahci_port_t *); 95 static int ahci_alloc_cmd_tables(ahci_ctl_t *, ahci_port_t *); 96 static void ahci_dealloc_cmd_tables(ahci_ctl_t *, ahci_port_t *); 97 static void ahci_alloc_pmult(ahci_ctl_t *, ahci_port_t *); 98 static void ahci_dealloc_pmult(ahci_ctl_t *, ahci_port_t *); 99 100 static int ahci_initialize_controller(ahci_ctl_t *); 101 static void ahci_uninitialize_controller(ahci_ctl_t *); 102 static int ahci_initialize_port(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 103 static int ahci_config_space_init(ahci_ctl_t *); 104 105 static void ahci_drain_ports_taskq(ahci_ctl_t *); 106 static int ahci_rdwr_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t *, 107 uint8_t); 108 static int ahci_read_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t *); 109 static int ahci_write_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t); 110 static int ahci_update_pmult_pscr(ahci_ctl_t *, ahci_addr_t *, 111 sata_device_t *); 112 static int ahci_update_pmult_gscr(ahci_ctl_t *, ahci_addr_t *, 113 sata_device_t *); 114 static int ahci_initialize_pmult(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *, 115 sata_device_t *); 116 static int ahci_initialize_pmport(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 117 static int ahci_probe_pmult(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 118 static int ahci_probe_pmport(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *, 119 sata_device_t *); 120 121 static void ahci_disable_interface_pm(ahci_ctl_t *, uint8_t); 122 static int ahci_start_port(ahci_ctl_t *, ahci_port_t *, uint8_t); 123 static void ahci_find_dev_signature(ahci_ctl_t *, ahci_port_t *, 124 ahci_addr_t *); 125 static void ahci_update_sata_registers(ahci_ctl_t *, uint8_t, sata_device_t *); 126 static int ahci_deliver_satapkt(ahci_ctl_t *, ahci_port_t *, 127 ahci_addr_t *, sata_pkt_t *); 128 static int ahci_do_sync_start(ahci_ctl_t *, ahci_port_t *, 129 ahci_addr_t *, sata_pkt_t *); 130 static int ahci_claim_free_slot(ahci_ctl_t *, ahci_port_t *, 131 ahci_addr_t *, int); 132 static void ahci_copy_err_cnxt(sata_cmd_t *, ahci_fis_d2h_register_t *); 133 static void ahci_copy_ncq_err_page(sata_cmd_t *, 134 struct sata_ncq_error_recovery_page *); 135 static void ahci_copy_out_regs(sata_cmd_t *, ahci_fis_d2h_register_t *); 136 137 static int ahci_software_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 138 static int ahci_hba_reset(ahci_ctl_t *); 139 static int ahci_port_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 140 static int ahci_pmport_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 141 static void ahci_reject_all_abort_pkts(ahci_ctl_t *, ahci_port_t *, uint8_t); 142 static int ahci_reset_device_reject_pkts(ahci_ctl_t *, ahci_port_t *, 143 ahci_addr_t *); 144 static int ahci_reset_pmdevice_reject_pkts(ahci_ctl_t *, ahci_port_t *, 145 ahci_addr_t *); 146 static int ahci_reset_port_reject_pkts(ahci_ctl_t *, ahci_port_t *, 147 ahci_addr_t *); 148 static int ahci_reset_hba_reject_pkts(ahci_ctl_t *); 149 static int ahci_put_port_into_notrunning_state(ahci_ctl_t *, ahci_port_t *, 150 uint8_t); 151 static int ahci_restart_port_wait_till_ready(ahci_ctl_t *, ahci_port_t *, 152 uint8_t, int, int *); 153 static void ahci_mop_commands(ahci_ctl_t *, ahci_port_t *, uint32_t, 154 uint32_t, uint32_t, uint32_t, uint32_t); 155 static uint32_t ahci_get_rdlogext_data(ahci_ctl_t *, ahci_port_t *, uint8_t); 156 static void ahci_get_rqsense_data(ahci_ctl_t *, ahci_port_t *, 157 uint8_t, sata_pkt_t *); 158 static void ahci_fatal_error_recovery_handler(ahci_ctl_t *, ahci_port_t *, 159 ahci_addr_t *, uint32_t); 160 static void ahci_pmult_error_recovery_handler(ahci_ctl_t *, ahci_port_t *, 161 uint8_t, uint32_t); 162 static void ahci_timeout_pkts(ahci_ctl_t *, ahci_port_t *, 163 uint8_t, uint32_t); 164 static void ahci_events_handler(void *); 165 static void ahci_watchdog_handler(ahci_ctl_t *); 166 167 static uint_t ahci_intr(caddr_t, caddr_t); 168 static void ahci_port_intr(ahci_ctl_t *, ahci_port_t *, uint8_t); 169 static int ahci_add_intrs(ahci_ctl_t *, int); 170 static void ahci_rem_intrs(ahci_ctl_t *); 171 static void ahci_enable_all_intrs(ahci_ctl_t *); 172 static void ahci_disable_all_intrs(ahci_ctl_t *); 173 static void ahci_enable_port_intrs(ahci_ctl_t *, uint8_t); 174 static void ahci_disable_port_intrs(ahci_ctl_t *, uint8_t); 175 176 static int ahci_intr_cmd_cmplt(ahci_ctl_t *, ahci_port_t *, uint8_t); 177 static int ahci_intr_set_device_bits(ahci_ctl_t *, ahci_port_t *, uint8_t); 178 static int ahci_intr_ncq_events(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 179 static int ahci_intr_pmult_sntf_events(ahci_ctl_t *, ahci_port_t *, uint8_t); 180 static int ahci_intr_port_connect_change(ahci_ctl_t *, ahci_port_t *, uint8_t); 181 static int ahci_intr_device_mechanical_presence_status(ahci_ctl_t *, 182 ahci_port_t *, uint8_t); 183 static int ahci_intr_phyrdy_change(ahci_ctl_t *, ahci_port_t *, uint8_t); 184 static int ahci_intr_non_fatal_error(ahci_ctl_t *, ahci_port_t *, 185 uint8_t, uint32_t); 186 static int ahci_intr_fatal_error(ahci_ctl_t *, ahci_port_t *, 187 uint8_t, uint32_t); 188 static int ahci_intr_cold_port_detect(ahci_ctl_t *, ahci_port_t *, uint8_t); 189 190 static void ahci_get_ahci_addr(ahci_ctl_t *, sata_device_t *, ahci_addr_t *); 191 static int ahci_get_num_implemented_ports(uint32_t); 192 static void ahci_log_fatal_error_message(ahci_ctl_t *, uint8_t port, 193 uint32_t); 194 static void ahci_log_serror_message(ahci_ctl_t *, uint8_t, uint32_t, int); 195 #if AHCI_DEBUG 196 static void ahci_log(ahci_ctl_t *, uint_t, char *, ...); 197 #endif 198 199 200 /* 201 * DMA attributes for the data buffer 202 * 203 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 204 * does not support 64-bit addressing 205 */ 206 static ddi_dma_attr_t buffer_dma_attr = { 207 DMA_ATTR_V0, /* dma_attr_version */ 208 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 209 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 210 0x3fffffull, /* dma_attr_count_max i.e. for one cookie */ 211 0x2ull, /* dma_attr_align: word aligned */ 212 1, /* dma_attr_burstsizes */ 213 1, /* dma_attr_minxfer */ 214 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 215 0xffffffffull, /* dma_attr_seg */ 216 AHCI_PRDT_NUMBER, /* dma_attr_sgllen */ 217 512, /* dma_attr_granular */ 218 0, /* dma_attr_flags */ 219 }; 220 221 /* 222 * DMA attributes for the rcvd FIS 223 * 224 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 225 * does not support 64-bit addressing 226 */ 227 static ddi_dma_attr_t rcvd_fis_dma_attr = { 228 DMA_ATTR_V0, /* dma_attr_version */ 229 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 230 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 231 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 232 0x100ull, /* dma_attr_align: 256-byte aligned */ 233 1, /* dma_attr_burstsizes */ 234 1, /* dma_attr_minxfer */ 235 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 236 0xffffffffull, /* dma_attr_seg */ 237 1, /* dma_attr_sgllen */ 238 1, /* dma_attr_granular */ 239 0, /* dma_attr_flags */ 240 }; 241 242 /* 243 * DMA attributes for the command list 244 * 245 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 246 * does not support 64-bit addressing 247 */ 248 static ddi_dma_attr_t cmd_list_dma_attr = { 249 DMA_ATTR_V0, /* dma_attr_version */ 250 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 251 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 252 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 253 0x400ull, /* dma_attr_align: 1K-byte aligned */ 254 1, /* dma_attr_burstsizes */ 255 1, /* dma_attr_minxfer */ 256 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 257 0xffffffffull, /* dma_attr_seg */ 258 1, /* dma_attr_sgllen */ 259 1, /* dma_attr_granular */ 260 0, /* dma_attr_flags */ 261 }; 262 263 /* 264 * DMA attributes for cmd tables 265 * 266 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 267 * does not support 64-bit addressing 268 */ 269 static ddi_dma_attr_t cmd_table_dma_attr = { 270 DMA_ATTR_V0, /* dma_attr_version */ 271 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 272 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 273 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 274 0x80ull, /* dma_attr_align: 128-byte aligned */ 275 1, /* dma_attr_burstsizes */ 276 1, /* dma_attr_minxfer */ 277 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 278 0xffffffffull, /* dma_attr_seg */ 279 1, /* dma_attr_sgllen */ 280 1, /* dma_attr_granular */ 281 0, /* dma_attr_flags */ 282 }; 283 284 285 /* Device access attributes */ 286 static ddi_device_acc_attr_t accattr = { 287 DDI_DEVICE_ATTR_V0, 288 DDI_STRUCTURE_LE_ACC, 289 DDI_STRICTORDER_ACC 290 }; 291 292 293 static struct dev_ops ahcictl_dev_ops = { 294 DEVO_REV, /* devo_rev */ 295 0, /* refcnt */ 296 ahci_getinfo, /* info */ 297 nulldev, /* identify */ 298 nulldev, /* probe */ 299 ahci_attach, /* attach */ 300 ahci_detach, /* detach */ 301 nodev, /* no reset */ 302 (struct cb_ops *)0, /* driver operations */ 303 NULL, /* bus operations */ 304 NULL, /* power */ 305 ahci_quiesce, /* quiesce */ 306 }; 307 308 static sata_tran_hotplug_ops_t ahci_tran_hotplug_ops = { 309 SATA_TRAN_HOTPLUG_OPS_REV_1, 310 ahci_tran_hotplug_port_activate, 311 ahci_tran_hotplug_port_deactivate 312 }; 313 314 extern struct mod_ops mod_driverops; 315 316 static struct modldrv modldrv = { 317 &mod_driverops, /* driverops */ 318 ahci_ident, /* short description */ 319 &ahcictl_dev_ops, /* driver ops */ 320 }; 321 322 static struct modlinkage modlinkage = { 323 MODREV_1, 324 &modldrv, 325 NULL 326 }; 327 328 /* The following variables are watchdog handler related */ 329 static int ahci_watchdog_timeout = 5; /* 5 seconds */ 330 static int ahci_watchdog_tick; 331 332 /* 333 * This static variable indicates the size of command table, 334 * and it's changeable with prdt number, which ahci_dma_prdt_number 335 * indicates. 336 */ 337 static size_t ahci_cmd_table_size; 338 339 /* 340 * The below global variables are tunable via /etc/system 341 * 342 * ahci_dma_prdt_number 343 * ahci_msi_enabled 344 * ahci_buf_64bit_dma 345 * ahci_commu_64bit_dma 346 */ 347 348 /* The number of Physical Region Descriptor Table(PRDT) in Command Table */ 349 int ahci_dma_prdt_number = AHCI_PRDT_NUMBER; 350 351 /* AHCI MSI is tunable */ 352 boolean_t ahci_msi_enabled = B_TRUE; 353 354 /* 355 * 64-bit dma addressing for data buffer is tunable 356 * 357 * The variable controls only the below value: 358 * DBAU (upper 32-bits physical address of data block) 359 */ 360 boolean_t ahci_buf_64bit_dma = B_TRUE; 361 362 /* 363 * 64-bit dma addressing for communication system descriptors is tunable 364 * 365 * The variable controls the below three values: 366 * 367 * PxCLBU (upper 32-bits for the command list base physical address) 368 * PxFBU (upper 32-bits for the received FIS base physical address) 369 * CTBAU (upper 32-bits of command table base) 370 */ 371 boolean_t ahci_commu_64bit_dma = B_TRUE; 372 373 /* 374 * End of global tunable variable definition 375 */ 376 377 #if AHCI_DEBUG 378 uint32_t ahci_debug_flags = 0; 379 #else 380 uint32_t ahci_debug_flags = (AHCIDBG_ERRS|AHCIDBG_TIMEOUT); 381 #endif 382 383 384 #if AHCI_DEBUG 385 /* The following is needed for ahci_log() */ 386 static kmutex_t ahci_log_mutex; 387 static char ahci_log_buf[512]; 388 #endif 389 390 /* Opaque state pointer initialized by ddi_soft_state_init() */ 391 static void *ahci_statep = NULL; 392 393 /* 394 * ahci module initialization. 395 */ 396 int 397 _init(void) 398 { 399 int ret; 400 401 ret = ddi_soft_state_init(&ahci_statep, sizeof (ahci_ctl_t), 0); 402 if (ret != 0) { 403 goto err_out; 404 } 405 406 #if AHCI_DEBUG 407 mutex_init(&ahci_log_mutex, NULL, MUTEX_DRIVER, NULL); 408 #endif 409 410 if ((ret = sata_hba_init(&modlinkage)) != 0) { 411 #if AHCI_DEBUG 412 mutex_destroy(&ahci_log_mutex); 413 #endif 414 ddi_soft_state_fini(&ahci_statep); 415 goto err_out; 416 } 417 418 ret = mod_install(&modlinkage); 419 if (ret != 0) { 420 sata_hba_fini(&modlinkage); 421 #if AHCI_DEBUG 422 mutex_destroy(&ahci_log_mutex); 423 #endif 424 ddi_soft_state_fini(&ahci_statep); 425 goto err_out; 426 } 427 428 /* watchdog tick */ 429 ahci_watchdog_tick = drv_usectohz( 430 (clock_t)ahci_watchdog_timeout * 1000000); 431 return (ret); 432 433 err_out: 434 cmn_err(CE_WARN, "!ahci: Module init failed"); 435 return (ret); 436 } 437 438 /* 439 * ahci module uninitialize. 440 */ 441 int 442 _fini(void) 443 { 444 int ret; 445 446 ret = mod_remove(&modlinkage); 447 if (ret != 0) { 448 return (ret); 449 } 450 451 /* Remove the resources allocated in _init(). */ 452 sata_hba_fini(&modlinkage); 453 #if AHCI_DEBUG 454 mutex_destroy(&ahci_log_mutex); 455 #endif 456 ddi_soft_state_fini(&ahci_statep); 457 458 return (ret); 459 } 460 461 /* 462 * _info entry point 463 */ 464 int 465 _info(struct modinfo *modinfop) 466 { 467 return (mod_info(&modlinkage, modinfop)); 468 } 469 470 /* 471 * The attach entry point for dev_ops. 472 */ 473 static int 474 ahci_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 475 { 476 ahci_ctl_t *ahci_ctlp = NULL; 477 int instance = ddi_get_instance(dip); 478 int status; 479 int attach_state; 480 uint32_t cap_status, ahci_version; 481 int intr_types; 482 int i; 483 pci_regspec_t *regs; 484 int regs_length; 485 int rnumber; 486 #if AHCI_DEBUG 487 int speed; 488 #endif 489 490 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, "ahci_attach enter", 491 NULL); 492 493 switch (cmd) { 494 case DDI_ATTACH: 495 break; 496 497 case DDI_RESUME: 498 499 /* 500 * During DDI_RESUME, the hardware state of the device 501 * (power may have been removed from the device) must be 502 * restored, allow pending requests to continue, and 503 * service new requests. 504 */ 505 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 506 mutex_enter(&ahci_ctlp->ahcictl_mutex); 507 508 /* Restart watch thread */ 509 if (ahci_ctlp->ahcictl_timeout_id == 0) 510 ahci_ctlp->ahcictl_timeout_id = timeout( 511 (void (*)(void *))ahci_watchdog_handler, 512 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 513 514 mutex_exit(&ahci_ctlp->ahcictl_mutex); 515 516 /* 517 * Re-initialize the controller and enable the interrupts and 518 * restart all the ports. 519 * 520 * Note that so far we don't support hot-plug during 521 * suspend/resume. 522 */ 523 if (ahci_initialize_controller(ahci_ctlp) != AHCI_SUCCESS) { 524 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PM, ahci_ctlp, 525 "Failed to initialize the controller " 526 "during DDI_RESUME", NULL); 527 return (DDI_FAILURE); 528 } 529 530 mutex_enter(&ahci_ctlp->ahcictl_mutex); 531 ahci_ctlp->ahcictl_flags &= ~ AHCI_SUSPEND; 532 mutex_exit(&ahci_ctlp->ahcictl_mutex); 533 534 return (DDI_SUCCESS); 535 536 default: 537 return (DDI_FAILURE); 538 } 539 540 attach_state = AHCI_ATTACH_STATE_NONE; 541 542 /* Allocate soft state */ 543 status = ddi_soft_state_zalloc(ahci_statep, instance); 544 if (status != DDI_SUCCESS) { 545 cmn_err(CE_WARN, "!ahci%d: Cannot allocate soft state", 546 instance); 547 goto err_out; 548 } 549 550 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 551 ahci_ctlp->ahcictl_flags |= AHCI_ATTACH; 552 ahci_ctlp->ahcictl_dip = dip; 553 554 /* Initialize the cport/port mapping */ 555 for (i = 0; i < AHCI_MAX_PORTS; i++) { 556 ahci_ctlp->ahcictl_port_to_cport[i] = 0xff; 557 ahci_ctlp->ahcictl_cport_to_port[i] = 0xff; 558 } 559 560 attach_state |= AHCI_ATTACH_STATE_STATEP_ALLOC; 561 562 /* 563 * Now map the AHCI base address; which includes global 564 * registers and port control registers 565 * 566 * According to the spec, the AHCI Base Address is BAR5, 567 * but BAR0-BAR4 are optional, so we need to check which 568 * rnumber is used for BAR5. 569 */ 570 571 /* 572 * search through DDI "reg" property for the AHCI register set 573 */ 574 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, dip, 575 DDI_PROP_DONTPASS, "reg", (int **)®s, 576 (uint_t *)®s_length) != DDI_PROP_SUCCESS) { 577 cmn_err(CE_WARN, "!ahci%d: Cannot lookup reg property", 578 instance); 579 goto err_out; 580 } 581 582 /* AHCI Base Address is located at 0x24 offset */ 583 for (rnumber = 0; rnumber < regs_length; ++rnumber) { 584 if ((regs[rnumber].pci_phys_hi & PCI_REG_REG_M) 585 == AHCI_PCI_RNUM) 586 break; 587 } 588 589 ddi_prop_free(regs); 590 591 if (rnumber == regs_length) { 592 cmn_err(CE_WARN, "!ahci%d: Cannot find AHCI register set", 593 instance); 594 goto err_out; 595 } 596 597 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "rnumber = %d", rnumber); 598 599 status = ddi_regs_map_setup(dip, 600 rnumber, 601 (caddr_t *)&ahci_ctlp->ahcictl_ahci_addr, 602 0, 603 0, 604 &accattr, 605 &ahci_ctlp->ahcictl_ahci_acc_handle); 606 if (status != DDI_SUCCESS) { 607 cmn_err(CE_WARN, "!ahci%d: Cannot map register space", 608 instance); 609 goto err_out; 610 } 611 612 attach_state |= AHCI_ATTACH_STATE_REG_MAP; 613 614 /* Get the AHCI version information */ 615 ahci_version = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 616 (uint32_t *)AHCI_GLOBAL_VS(ahci_ctlp)); 617 618 cmn_err(CE_NOTE, "!ahci%d: hba AHCI version = %x.%x", instance, 619 (ahci_version & 0xffff0000) >> 16, 620 ((ahci_version & 0x0000ff00) >> 4 | 621 (ahci_version & 0x000000ff))); 622 623 /* We don't support controllers whose versions are lower than 1.0 */ 624 if (!(ahci_version & 0xffff0000)) { 625 cmn_err(CE_WARN, "ahci%d: Don't support AHCI HBA with lower " 626 "than version 1.0", instance); 627 goto err_out; 628 } 629 630 /* Get the HBA capabilities information */ 631 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 632 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 633 634 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba capabilites = 0x%x", 635 cap_status); 636 637 #if AHCI_DEBUG 638 /* Get the interface speed supported by the HBA */ 639 speed = (cap_status & AHCI_HBA_CAP_ISS) >> AHCI_HBA_CAP_ISS_SHIFT; 640 if (speed == 0x01) { 641 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 642 "hba interface speed support: Gen 1 (1.5Gbps)", NULL); 643 } else if (speed == 0x10) { 644 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 645 "hba interface speed support: Gen 2 (3 Gbps)", NULL); 646 } else if (speed == 0x11) { 647 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 648 "hba interface speed support: Gen 3 (6 Gbps)", NULL); 649 } 650 #endif 651 652 /* Get the number of command slots supported by the HBA */ 653 ahci_ctlp->ahcictl_num_cmd_slots = 654 ((cap_status & AHCI_HBA_CAP_NCS) >> 655 AHCI_HBA_CAP_NCS_SHIFT) + 1; 656 657 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba number of cmd slots: %d", 658 ahci_ctlp->ahcictl_num_cmd_slots); 659 660 /* Get the bit map which indicates ports implemented by the HBA */ 661 ahci_ctlp->ahcictl_ports_implemented = 662 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 663 (uint32_t *)AHCI_GLOBAL_PI(ahci_ctlp)); 664 665 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba implementation of ports: 0x%x", 666 ahci_ctlp->ahcictl_ports_implemented); 667 668 /* 669 * According to the AHCI spec, CAP.NP should indicate the maximum 670 * number of ports supported by the HBA silicon, but we found 671 * this value of ICH8 chipset only indicates the number of ports 672 * implemented (exposed) by it. Therefore, the driver should calculate 673 * the potential maximum value by checking PI register, and use 674 * the maximum of this value and CAP.NP. 675 */ 676 ahci_ctlp->ahcictl_num_ports = max( 677 (cap_status & AHCI_HBA_CAP_NP) + 1, 678 ddi_fls(ahci_ctlp->ahcictl_ports_implemented)); 679 680 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba number of ports: %d", 681 ahci_ctlp->ahcictl_num_ports); 682 683 /* Get the number of implemented ports by the HBA */ 684 ahci_ctlp->ahcictl_num_implemented_ports = 685 ahci_get_num_implemented_ports( 686 ahci_ctlp->ahcictl_ports_implemented); 687 688 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 689 "hba number of implemented ports: %d", 690 ahci_ctlp->ahcictl_num_implemented_ports); 691 692 /* Check whether HBA supports 64bit DMA addressing */ 693 if (!(cap_status & AHCI_HBA_CAP_S64A)) { 694 ahci_ctlp->ahcictl_cap |= AHCI_CAP_BUF_32BIT_DMA; 695 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 696 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 697 "hba does not support 64-bit addressing", NULL); 698 } 699 700 /* Checking for the support of Port Multiplier */ 701 if (cap_status & AHCI_HBA_CAP_SPM) { 702 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PMULT_CBSS; 703 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 704 "hba supports port multiplier (CBSS)", NULL); 705 706 /* Support FIS-based switching ? */ 707 if (cap_status & AHCI_HBA_CAP_FBSS) { 708 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PMULT_FBSS; 709 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 710 "hba supports FIS-based switching (FBSS)", NULL); 711 } 712 } 713 714 /* Checking for Support Command List Override */ 715 if (cap_status & AHCI_HBA_CAP_SCLO) { 716 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SCLO; 717 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 718 "hba supports command list override.", NULL); 719 } 720 721 /* Checking for Asynchronous Notification */ 722 if (cap_status & AHCI_HBA_CAP_SSNTF) { 723 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SNTF; 724 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 725 "hba supports asynchronous notification.", NULL); 726 } 727 728 if (pci_config_setup(dip, &ahci_ctlp->ahcictl_pci_conf_handle) 729 != DDI_SUCCESS) { 730 cmn_err(CE_WARN, "!ahci%d: Cannot set up pci configure space", 731 instance); 732 goto err_out; 733 } 734 735 attach_state |= AHCI_ATTACH_STATE_PCICFG_SETUP; 736 737 /* 738 * Check the pci configuration space, and set caps. We also 739 * handle the hardware defect in this function. 740 * 741 * For example, force ATI SB600 to use 32-bit dma addressing 742 * since it doesn't support 64-bit dma though its CAP register 743 * declares it support. 744 */ 745 if (ahci_config_space_init(ahci_ctlp) == AHCI_FAILURE) { 746 cmn_err(CE_WARN, "!ahci%d: ahci_config_space_init failed", 747 instance); 748 goto err_out; 749 } 750 751 /* 752 * Disable the whole controller interrupts before adding 753 * interrupt handlers(s). 754 */ 755 ahci_disable_all_intrs(ahci_ctlp); 756 757 /* Get supported interrupt types */ 758 if (ddi_intr_get_supported_types(dip, &intr_types) != DDI_SUCCESS) { 759 cmn_err(CE_WARN, "!ahci%d: ddi_intr_get_supported_types failed", 760 instance); 761 goto err_out; 762 } 763 764 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 765 "ddi_intr_get_supported_types() returned: 0x%x", 766 intr_types); 767 768 if (ahci_msi_enabled && (intr_types & DDI_INTR_TYPE_MSI)) { 769 /* 770 * Try MSI first, but fall back to FIXED if failed 771 */ 772 if (ahci_add_intrs(ahci_ctlp, DDI_INTR_TYPE_MSI) == 773 DDI_SUCCESS) { 774 ahci_ctlp->ahcictl_intr_type = DDI_INTR_TYPE_MSI; 775 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 776 "Using MSI interrupt type", NULL); 777 goto intr_done; 778 } 779 780 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 781 "MSI registration failed, " 782 "trying FIXED interrupts", NULL); 783 } 784 785 if (intr_types & DDI_INTR_TYPE_FIXED) { 786 if (ahci_add_intrs(ahci_ctlp, DDI_INTR_TYPE_FIXED) == 787 DDI_SUCCESS) { 788 ahci_ctlp->ahcictl_intr_type = DDI_INTR_TYPE_FIXED; 789 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 790 "Using FIXED interrupt type", NULL); 791 goto intr_done; 792 } 793 794 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 795 "FIXED interrupt registration failed", NULL); 796 } 797 798 cmn_err(CE_WARN, "!ahci%d: Interrupt registration failed", instance); 799 800 goto err_out; 801 802 intr_done: 803 804 attach_state |= AHCI_ATTACH_STATE_INTR_ADDED; 805 806 /* Initialize the controller mutex */ 807 mutex_init(&ahci_ctlp->ahcictl_mutex, NULL, MUTEX_DRIVER, 808 (void *)(uintptr_t)ahci_ctlp->ahcictl_intr_pri); 809 810 attach_state |= AHCI_ATTACH_STATE_MUTEX_INIT; 811 812 if (ahci_dma_prdt_number < AHCI_MIN_PRDT_NUMBER) { 813 ahci_dma_prdt_number = AHCI_MIN_PRDT_NUMBER; 814 } else if (ahci_dma_prdt_number > AHCI_MAX_PRDT_NUMBER) { 815 ahci_dma_prdt_number = AHCI_MAX_PRDT_NUMBER; 816 } 817 818 ahci_cmd_table_size = (sizeof (ahci_cmd_table_t) + 819 (ahci_dma_prdt_number - AHCI_PRDT_NUMBER) * 820 sizeof (ahci_prdt_item_t)); 821 822 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 823 "ahci_attach: ahci_dma_prdt_number set by user is 0x%x," 824 " ahci_cmd_table_size is 0x%x", 825 ahci_dma_prdt_number, ahci_cmd_table_size); 826 827 if (ahci_dma_prdt_number != AHCI_PRDT_NUMBER) 828 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_sgllen = 829 ahci_dma_prdt_number; 830 831 ahci_ctlp->ahcictl_buffer_dma_attr = buffer_dma_attr; 832 ahci_ctlp->ahcictl_rcvd_fis_dma_attr = rcvd_fis_dma_attr; 833 ahci_ctlp->ahcictl_cmd_list_dma_attr = cmd_list_dma_attr; 834 ahci_ctlp->ahcictl_cmd_table_dma_attr = cmd_table_dma_attr; 835 836 if ((ahci_buf_64bit_dma == B_FALSE) || 837 (ahci_ctlp->ahcictl_cap & AHCI_CAP_BUF_32BIT_DMA)) { 838 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_addr_hi = 839 0xffffffffull; 840 } 841 842 if ((ahci_commu_64bit_dma == B_FALSE) || 843 (ahci_ctlp->ahcictl_cap & AHCI_CAP_COMMU_32BIT_DMA)) { 844 ahci_ctlp->ahcictl_rcvd_fis_dma_attr.dma_attr_addr_hi = 845 0xffffffffull; 846 ahci_ctlp->ahcictl_cmd_list_dma_attr.dma_attr_addr_hi = 847 0xffffffffull; 848 ahci_ctlp->ahcictl_cmd_table_dma_attr.dma_attr_addr_hi = 849 0xffffffffull; 850 } 851 852 /* Allocate the ports structure */ 853 status = ahci_alloc_ports_state(ahci_ctlp); 854 if (status != AHCI_SUCCESS) { 855 cmn_err(CE_WARN, "!ahci%d: Cannot allocate ports structure", 856 instance); 857 goto err_out; 858 } 859 860 attach_state |= AHCI_ATTACH_STATE_PORT_ALLOC; 861 862 /* 863 * Initialize the controller and ports. 864 */ 865 status = ahci_initialize_controller(ahci_ctlp); 866 if (status != AHCI_SUCCESS) { 867 cmn_err(CE_WARN, "!ahci%d: HBA initialization failed", 868 instance); 869 goto err_out; 870 } 871 872 attach_state |= AHCI_ATTACH_STATE_HW_INIT; 873 874 /* Start one thread to check packet timeouts */ 875 ahci_ctlp->ahcictl_timeout_id = timeout( 876 (void (*)(void *))ahci_watchdog_handler, 877 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 878 879 attach_state |= AHCI_ATTACH_STATE_TIMEOUT_ENABLED; 880 881 if (ahci_register_sata_hba_tran(ahci_ctlp, cap_status)) { 882 cmn_err(CE_WARN, "!ahci%d: sata hba tran registration failed", 883 instance); 884 goto err_out; 885 } 886 887 ahci_ctlp->ahcictl_flags &= ~AHCI_ATTACH; 888 889 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "ahci_attach success!", NULL); 890 891 return (DDI_SUCCESS); 892 893 err_out: 894 if (attach_state & AHCI_ATTACH_STATE_TIMEOUT_ENABLED) { 895 mutex_enter(&ahci_ctlp->ahcictl_mutex); 896 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 897 ahci_ctlp->ahcictl_timeout_id = 0; 898 mutex_exit(&ahci_ctlp->ahcictl_mutex); 899 } 900 901 if (attach_state & AHCI_ATTACH_STATE_HW_INIT) { 902 ahci_uninitialize_controller(ahci_ctlp); 903 } 904 905 if (attach_state & AHCI_ATTACH_STATE_PORT_ALLOC) { 906 ahci_dealloc_ports_state(ahci_ctlp); 907 } 908 909 if (attach_state & AHCI_ATTACH_STATE_MUTEX_INIT) { 910 mutex_destroy(&ahci_ctlp->ahcictl_mutex); 911 } 912 913 if (attach_state & AHCI_ATTACH_STATE_INTR_ADDED) { 914 ahci_rem_intrs(ahci_ctlp); 915 } 916 917 if (attach_state & AHCI_ATTACH_STATE_PCICFG_SETUP) { 918 pci_config_teardown(&ahci_ctlp->ahcictl_pci_conf_handle); 919 } 920 921 if (attach_state & AHCI_ATTACH_STATE_REG_MAP) { 922 ddi_regs_map_free(&ahci_ctlp->ahcictl_ahci_acc_handle); 923 } 924 925 if (attach_state & AHCI_ATTACH_STATE_STATEP_ALLOC) { 926 ddi_soft_state_free(ahci_statep, instance); 927 } 928 929 return (DDI_FAILURE); 930 } 931 932 /* 933 * The detach entry point for dev_ops. 934 */ 935 static int 936 ahci_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 937 { 938 ahci_ctl_t *ahci_ctlp; 939 int instance; 940 int ret; 941 942 instance = ddi_get_instance(dip); 943 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 944 945 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_detach enter", NULL); 946 947 switch (cmd) { 948 case DDI_DETACH: 949 950 /* disable the interrupts for an uninterrupted detach */ 951 mutex_enter(&ahci_ctlp->ahcictl_mutex); 952 ahci_disable_all_intrs(ahci_ctlp); 953 mutex_exit(&ahci_ctlp->ahcictl_mutex); 954 955 /* unregister from the sata framework. */ 956 ret = ahci_unregister_sata_hba_tran(ahci_ctlp); 957 if (ret != AHCI_SUCCESS) { 958 mutex_enter(&ahci_ctlp->ahcictl_mutex); 959 ahci_enable_all_intrs(ahci_ctlp); 960 mutex_exit(&ahci_ctlp->ahcictl_mutex); 961 return (DDI_FAILURE); 962 } 963 964 mutex_enter(&ahci_ctlp->ahcictl_mutex); 965 966 /* stop the watchdog handler */ 967 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 968 ahci_ctlp->ahcictl_timeout_id = 0; 969 970 mutex_exit(&ahci_ctlp->ahcictl_mutex); 971 972 /* uninitialize the controller */ 973 ahci_uninitialize_controller(ahci_ctlp); 974 975 /* remove the interrupts */ 976 ahci_rem_intrs(ahci_ctlp); 977 978 /* deallocate the ports structures */ 979 ahci_dealloc_ports_state(ahci_ctlp); 980 981 /* destroy mutex */ 982 mutex_destroy(&ahci_ctlp->ahcictl_mutex); 983 984 /* teardown the pci config */ 985 pci_config_teardown(&ahci_ctlp->ahcictl_pci_conf_handle); 986 987 /* remove the reg maps. */ 988 ddi_regs_map_free(&ahci_ctlp->ahcictl_ahci_acc_handle); 989 990 /* free the soft state. */ 991 ddi_soft_state_free(ahci_statep, instance); 992 993 return (DDI_SUCCESS); 994 995 case DDI_SUSPEND: 996 997 /* 998 * The steps associated with suspension must include putting 999 * the underlying device into a quiescent state so that it 1000 * will not generate interrupts or modify or access memory. 1001 */ 1002 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1003 if (ahci_ctlp->ahcictl_flags & AHCI_SUSPEND) { 1004 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1005 return (DDI_SUCCESS); 1006 } 1007 1008 ahci_ctlp->ahcictl_flags |= AHCI_SUSPEND; 1009 1010 /* stop the watchdog handler */ 1011 if (ahci_ctlp->ahcictl_timeout_id) { 1012 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 1013 ahci_ctlp->ahcictl_timeout_id = 0; 1014 } 1015 1016 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1017 1018 /* 1019 * drain the taskq 1020 */ 1021 ahci_drain_ports_taskq(ahci_ctlp); 1022 1023 /* 1024 * Disable the interrupts and stop all the ports. 1025 */ 1026 ahci_uninitialize_controller(ahci_ctlp); 1027 1028 return (DDI_SUCCESS); 1029 1030 default: 1031 return (DDI_FAILURE); 1032 } 1033 } 1034 1035 /* 1036 * The info entry point for dev_ops. 1037 * 1038 */ 1039 static int 1040 ahci_getinfo(dev_info_t *dip, ddi_info_cmd_t infocmd, 1041 void *arg, void **result) 1042 { 1043 #ifndef __lock_lint 1044 _NOTE(ARGUNUSED(dip)) 1045 #endif /* __lock_lint */ 1046 1047 ahci_ctl_t *ahci_ctlp; 1048 int instance; 1049 dev_t dev; 1050 1051 dev = (dev_t)arg; 1052 instance = getminor(dev); 1053 1054 switch (infocmd) { 1055 case DDI_INFO_DEVT2DEVINFO: 1056 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 1057 if (ahci_ctlp != NULL) { 1058 *result = ahci_ctlp->ahcictl_dip; 1059 return (DDI_SUCCESS); 1060 } else { 1061 *result = NULL; 1062 return (DDI_FAILURE); 1063 } 1064 case DDI_INFO_DEVT2INSTANCE: 1065 *(int *)result = instance; 1066 break; 1067 default: 1068 break; 1069 } 1070 1071 return (DDI_SUCCESS); 1072 } 1073 1074 /* 1075 * Registers the ahci with sata framework. 1076 */ 1077 static int 1078 ahci_register_sata_hba_tran(ahci_ctl_t *ahci_ctlp, uint32_t cap_status) 1079 { 1080 struct sata_hba_tran *sata_hba_tran; 1081 1082 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 1083 "ahci_register_sata_hba_tran enter", NULL); 1084 1085 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1086 1087 /* Allocate memory for the sata_hba_tran */ 1088 sata_hba_tran = kmem_zalloc(sizeof (sata_hba_tran_t), KM_SLEEP); 1089 1090 sata_hba_tran->sata_tran_hba_rev = SATA_TRAN_HBA_REV_3; 1091 sata_hba_tran->sata_tran_hba_dip = ahci_ctlp->ahcictl_dip; 1092 sata_hba_tran->sata_tran_hba_dma_attr = 1093 &ahci_ctlp->ahcictl_buffer_dma_attr; 1094 1095 /* Report the number of implemented ports */ 1096 sata_hba_tran->sata_tran_hba_num_cports = 1097 ahci_ctlp->ahcictl_num_implemented_ports; 1098 1099 /* Support ATAPI device */ 1100 sata_hba_tran->sata_tran_hba_features_support = SATA_CTLF_ATAPI; 1101 1102 /* Get the data transfer capability for PIO command by the HBA */ 1103 if (cap_status & AHCI_HBA_CAP_PMD) { 1104 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PIO_MDRQ; 1105 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "HBA supports multiple " 1106 "DRQ block data transfer for PIO command protocol", NULL); 1107 } 1108 1109 /* 1110 * According to the AHCI spec, the ATA/ATAPI-7 queued feature set 1111 * is not supported by AHCI (including the READ QUEUED (EXT), WRITE 1112 * QUEUED (EXT), and SERVICE commands). Queued operations are 1113 * supported in AHCI using the READ FPDMA QUEUED and WRITE FPDMA 1114 * QUEUED commands when the HBA and device support native command 1115 * queuing(NCQ). 1116 * 1117 * SATA_CTLF_NCQ will be set to sata_tran_hba_features_support if the 1118 * CAP register of the HBA indicates NCQ is supported. 1119 * 1120 * SATA_CTLF_NCQ cannot be set if AHCI_CAP_NO_MCMDLIST_NONQUEUE is 1121 * set because the previous register content of PxCI can be re-written 1122 * in the register write. 1123 */ 1124 if ((cap_status & AHCI_HBA_CAP_SNCQ) && 1125 !(ahci_ctlp->ahcictl_cap & AHCI_CAP_NO_MCMDLIST_NONQUEUE)) { 1126 sata_hba_tran->sata_tran_hba_features_support |= SATA_CTLF_NCQ; 1127 ahci_ctlp->ahcictl_cap |= AHCI_CAP_NCQ; 1128 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "HBA supports Native " 1129 "Command Queuing", NULL); 1130 } 1131 1132 /* Support port multiplier? */ 1133 if (cap_status & AHCI_HBA_CAP_SPM) { 1134 sata_hba_tran->sata_tran_hba_features_support |= 1135 SATA_CTLF_PORT_MULTIPLIER; 1136 1137 /* Support FIS-based switching for port multiplier? */ 1138 if (cap_status & AHCI_HBA_CAP_FBSS) { 1139 sata_hba_tran->sata_tran_hba_features_support |= 1140 SATA_CTLF_PMULT_FBS; 1141 } 1142 } 1143 1144 /* Report the number of command slots */ 1145 sata_hba_tran->sata_tran_hba_qdepth = ahci_ctlp->ahcictl_num_cmd_slots; 1146 1147 sata_hba_tran->sata_tran_probe_port = ahci_tran_probe_port; 1148 sata_hba_tran->sata_tran_start = ahci_tran_start; 1149 sata_hba_tran->sata_tran_abort = ahci_tran_abort; 1150 sata_hba_tran->sata_tran_reset_dport = ahci_tran_reset_dport; 1151 sata_hba_tran->sata_tran_hotplug_ops = &ahci_tran_hotplug_ops; 1152 #ifdef __lock_lint 1153 sata_hba_tran->sata_tran_selftest = ahci_selftest; 1154 #endif 1155 /* 1156 * When SATA framework adds support for pwrmgt the 1157 * pwrmgt_ops needs to be updated 1158 */ 1159 sata_hba_tran->sata_tran_pwrmgt_ops = NULL; 1160 sata_hba_tran->sata_tran_ioctl = NULL; 1161 1162 ahci_ctlp->ahcictl_sata_hba_tran = sata_hba_tran; 1163 1164 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1165 1166 /* Attach it to SATA framework */ 1167 if (sata_hba_attach(ahci_ctlp->ahcictl_dip, sata_hba_tran, DDI_ATTACH) 1168 != DDI_SUCCESS) { 1169 kmem_free((void *)sata_hba_tran, sizeof (sata_hba_tran_t)); 1170 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1171 ahci_ctlp->ahcictl_sata_hba_tran = NULL; 1172 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1173 return (AHCI_FAILURE); 1174 } 1175 1176 return (AHCI_SUCCESS); 1177 } 1178 1179 /* 1180 * Unregisters the ahci with sata framework. 1181 */ 1182 static int 1183 ahci_unregister_sata_hba_tran(ahci_ctl_t *ahci_ctlp) 1184 { 1185 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1186 "ahci_unregister_sata_hba_tran enter", NULL); 1187 1188 /* Detach from the SATA framework. */ 1189 if (sata_hba_detach(ahci_ctlp->ahcictl_dip, DDI_DETACH) != 1190 DDI_SUCCESS) { 1191 return (AHCI_FAILURE); 1192 } 1193 1194 /* Deallocate sata_hba_tran. */ 1195 kmem_free((void *)ahci_ctlp->ahcictl_sata_hba_tran, 1196 sizeof (sata_hba_tran_t)); 1197 1198 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1199 ahci_ctlp->ahcictl_sata_hba_tran = NULL; 1200 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1201 1202 return (AHCI_SUCCESS); 1203 } 1204 1205 #define SET_PORTSTR(str, addrp) \ 1206 if (AHCI_ADDR_IS_PORT(addrp)) \ 1207 (void) sprintf((str), "%d", (addrp)->aa_port); \ 1208 else if (AHCI_ADDR_IS_PMULT(addrp)) \ 1209 (void) sprintf((str), "%d (pmult)", (addrp)->aa_port); \ 1210 else \ 1211 (void) sprintf((str), "%d:%d", (addrp)->aa_port, \ 1212 (addrp)->aa_pmport); 1213 1214 /* 1215 * ahci_tran_probe_port is called by SATA framework. It returns port state, 1216 * port status registers and an attached device type via sata_device 1217 * structure. 1218 * 1219 * We return the cached information from a previous hardware probe. The 1220 * actual hardware probing itself was done either from within 1221 * ahci_initialize_controller() during the driver attach or from a phy 1222 * ready change interrupt handler. 1223 */ 1224 static int 1225 ahci_tran_probe_port(dev_info_t *dip, sata_device_t *sd) 1226 { 1227 ahci_ctl_t *ahci_ctlp; 1228 ahci_port_t *ahci_portp; 1229 ahci_addr_t addr, pmult_addr; 1230 uint8_t cport = sd->satadev_addr.cport; 1231 char portstr[10]; 1232 uint8_t device_type; 1233 uint32_t port_state; 1234 uint8_t port; 1235 int rval = SATA_SUCCESS, rval_init; 1236 1237 ahci_ctlp = ddi_get_soft_state(ahci_statep, ddi_get_instance(dip)); 1238 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 1239 1240 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 1241 1242 mutex_enter(&ahci_portp->ahciport_mutex); 1243 1244 ahci_get_ahci_addr(ahci_ctlp, sd, &addr); 1245 ASSERT(AHCI_ADDR_IS_VALID(&addr)); 1246 SET_PORTSTR(portstr, &addr); 1247 1248 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1249 "ahci_tran_probe_port enter: port %s", portstr); 1250 1251 if ((AHCI_ADDR_IS_PMULT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)) && 1252 (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT || 1253 ahci_portp->ahciport_pmult_info == NULL)) { 1254 /* port mutliplier is removed. */ 1255 AHCIDBG(AHCIDBG_PMULT, ahci_ctlp, 1256 "ahci_tran_probe_port: " 1257 "port-pmult is removed from port %s", portstr); 1258 mutex_exit(&ahci_portp->ahciport_mutex); 1259 return (SATA_FAILURE); 1260 } 1261 1262 /* 1263 * The sata_device may refer to 1264 * 1. A controller port. 1265 * A controller port should be ready here. 1266 * 2. A port multiplier. 1267 * If it has not been initialized, initialized it. If it is 1268 * initilaized, we need check the status of all its device ports. 1269 * 3. A port multiplier port. 1270 * If it has not been initialized, initialized it. 1271 * 1272 * A port multiplier or a port multiplier port may require some 1273 * initialization because we cannot do these time-consuming jobs in an 1274 * interrupt context. 1275 */ 1276 if (AHCI_ADDR_IS_PORT(&addr)) { 1277 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 1278 AHCI_ADDR_SET_PMULT(&pmult_addr, port); 1279 port_state = ahci_portp->ahciport_port_state; 1280 /* SATA Framework's first probe? */ 1281 if (!(port_state & SATA_DSTATE_PMULT_INIT)) { 1282 /* Initialize registers on a port multiplier */ 1283 rval_init = ahci_initialize_pmult(ahci_ctlp, 1284 ahci_portp, &pmult_addr, sd); 1285 if (rval_init != AHCI_SUCCESS) { 1286 AHCIDBG(AHCIDBG_PMULT, ahci_ctlp, 1287 "ahci_tran_probe_port: " 1288 "pmult initialization failed.", 1289 NULL); 1290 mutex_exit(&ahci_portp->ahciport_mutex); 1291 return (SATA_FAILURE); 1292 } 1293 } 1294 } 1295 } else if (AHCI_ADDR_IS_PMULT(&addr)) { 1296 /* Check pmports hotplug events */ 1297 (void) ahci_probe_pmult(ahci_ctlp, ahci_portp, &addr); 1298 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 1299 if (ahci_probe_pmport(ahci_ctlp, ahci_portp, 1300 &addr, sd) != AHCI_SUCCESS) { 1301 rval = SATA_FAILURE; 1302 goto out; 1303 } 1304 } 1305 1306 /* Update port state and device type */ 1307 port_state = AHCIPORT_GET_STATE(ahci_portp, &addr); 1308 1309 switch (port_state) { 1310 1311 case SATA_PSTATE_FAILED: 1312 sd->satadev_state = SATA_PSTATE_FAILED; 1313 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1314 "ahci_tran_probe_port: port %s PORT FAILED", portstr); 1315 goto out; 1316 1317 case SATA_PSTATE_SHUTDOWN: 1318 sd->satadev_state = SATA_PSTATE_SHUTDOWN; 1319 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1320 "ahci_tran_probe_port: port %s PORT SHUTDOWN", portstr); 1321 goto out; 1322 1323 case SATA_PSTATE_PWROFF: 1324 sd->satadev_state = SATA_PSTATE_PWROFF; 1325 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1326 "ahci_tran_probe_port: port %s PORT PWROFF", portstr); 1327 goto out; 1328 1329 case SATA_PSTATE_PWRON: 1330 sd->satadev_state = SATA_PSTATE_PWRON; 1331 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1332 "ahci_tran_probe_port: port %s PORT PWRON", portstr); 1333 break; 1334 1335 default: 1336 sd->satadev_state = port_state; 1337 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1338 "ahci_tran_probe_port: port %s PORT NORMAL %x", 1339 portstr, port_state); 1340 break; 1341 } 1342 1343 device_type = AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr); 1344 1345 switch (device_type) { 1346 1347 case SATA_DTYPE_ATADISK: 1348 sd->satadev_type = SATA_DTYPE_ATADISK; 1349 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1350 "ahci_tran_probe_port: port %s DISK found", portstr); 1351 break; 1352 1353 case SATA_DTYPE_ATAPI: 1354 /* 1355 * HBA driver only knows it's an ATAPI device, and don't know 1356 * it's CD/DVD, tape or ATAPI disk because the ATAPI device 1357 * type need to be determined by checking IDENTIFY PACKET 1358 * DEVICE data 1359 */ 1360 sd->satadev_type = SATA_DTYPE_ATAPI; 1361 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1362 "ahci_tran_probe_port: port %s ATAPI found", portstr); 1363 break; 1364 1365 case SATA_DTYPE_PMULT: 1366 ASSERT(AHCI_ADDR_IS_PORT(&addr)||AHCI_ADDR_IS_PMULT(&addr)); 1367 sd->satadev_type = SATA_DTYPE_PMULT; 1368 1369 /* Update the number of pmports. */ 1370 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1371 sd->satadev_add_info = ahci_portp-> 1372 ahciport_pmult_info->ahcipmi_num_dev_ports; 1373 1374 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1375 "ahci_tran_probe_port: port %s Port Multiplier found", 1376 portstr); 1377 break; 1378 1379 case SATA_DTYPE_UNKNOWN: 1380 sd->satadev_type = SATA_DTYPE_UNKNOWN; 1381 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1382 "ahci_tran_probe_port: port %s Unknown device found", 1383 portstr); 1384 break; 1385 1386 default: 1387 /* we don't support any other device types */ 1388 sd->satadev_type = SATA_DTYPE_NONE; 1389 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1390 "ahci_tran_probe_port: port %s No device found", portstr); 1391 break; 1392 } 1393 1394 out: 1395 /* Register update only fails while probing a pmult/pmport */ 1396 if (AHCI_ADDR_IS_PORT(&addr)) { 1397 ahci_update_sata_registers(ahci_ctlp, port, sd); 1398 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) 1399 if (port_state & SATA_STATE_READY) 1400 if (ahci_update_pmult_gscr(ahci_ctlp, 1401 &pmult_addr, sd) != AHCI_SUCCESS) 1402 rval = SATA_FAILURE; 1403 } else if (AHCI_ADDR_IS_PMULT(&addr)) { 1404 ahci_update_sata_registers(ahci_ctlp, port, sd); 1405 if (port_state & SATA_STATE_READY) 1406 if (ahci_update_pmult_gscr(ahci_ctlp, 1407 &addr, sd) != AHCI_SUCCESS) 1408 rval = SATA_FAILURE; 1409 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 1410 if (port_state & SATA_STATE_READY) 1411 if (ahci_update_pmult_pscr(ahci_ctlp, 1412 &addr, sd) != AHCI_SUCCESS) 1413 rval = SATA_FAILURE; 1414 } 1415 1416 mutex_exit(&ahci_portp->ahciport_mutex); 1417 return (rval); 1418 } 1419 1420 /* 1421 * There are four operation modes in sata framework: 1422 * SATA_OPMODE_INTERRUPTS 1423 * SATA_OPMODE_POLLING 1424 * SATA_OPMODE_ASYNCH 1425 * SATA_OPMODE_SYNCH 1426 * 1427 * Their combined meanings as following: 1428 * 1429 * SATA_OPMODE_SYNCH 1430 * The command has to be completed before sata_tran_start functions returns. 1431 * Either interrupts or polling could be used - it's up to the driver. 1432 * Mode used currently for internal, sata-module initiated operations. 1433 * 1434 * SATA_OPMODE_SYNCH | SATA_OPMODE_INTERRUPTS 1435 * It is the same as the one above. 1436 * 1437 * SATA_OPMODE_SYNCH | SATA_OPMODE_POLLING 1438 * The command has to be completed before sata_tran_start function returns. 1439 * No interrupt used, polling only. This should be the mode used for scsi 1440 * packets with FLAG_NOINTR. 1441 * 1442 * SATA_OPMODE_ASYNCH | SATA_OPMODE_INTERRUPTS 1443 * The command may be queued (callback function specified). Interrupts could 1444 * be used. It's normal operation mode. 1445 */ 1446 /* 1447 * Called by sata framework to transport a sata packet down stream. 1448 */ 1449 static int 1450 ahci_tran_start(dev_info_t *dip, sata_pkt_t *spkt) 1451 { 1452 ahci_ctl_t *ahci_ctlp; 1453 ahci_port_t *ahci_portp; 1454 ahci_addr_t addr, addr_pmult; 1455 sata_device_t sdevice; 1456 uint8_t cport = spkt->satapkt_device.satadev_addr.cport; 1457 uint8_t port; 1458 char portstr[10]; 1459 1460 ahci_ctlp = ddi_get_soft_state(ahci_statep, ddi_get_instance(dip)); 1461 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 1462 1463 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1464 "ahci_tran_start enter: cport %d satapkt 0x%p", 1465 cport, (void *)spkt); 1466 1467 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 1468 1469 mutex_enter(&ahci_portp->ahciport_mutex); 1470 ahci_get_ahci_addr(ahci_ctlp, &spkt->satapkt_device, &addr); 1471 SET_PORTSTR(portstr, &addr); 1472 1473 /* Sanity check */ 1474 if (AHCI_ADDR_IS_PMPORT(&addr)) { 1475 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT || 1476 ahci_portp->ahciport_pmult_info == NULL) { 1477 1478 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1479 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 1480 spkt->satapkt_device.satadev_state = SATA_STATE_UNKNOWN; 1481 ahci_update_sata_registers(ahci_ctlp, port, 1482 &spkt->satapkt_device); 1483 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1484 "ahci_tran_start returning PORT_ERROR while " 1485 "pmult removed: port: %s", portstr); 1486 mutex_exit(&ahci_portp->ahciport_mutex); 1487 return (SATA_TRAN_PORT_ERROR); 1488 } 1489 1490 /* Port multiplier and pmport are correctly initialized? */ 1491 if (!(ahci_portp->ahciport_port_state & 1492 SATA_DSTATE_PMULT_INIT)) { 1493 AHCI_ADDR_SET_PMULT(&addr_pmult, port); 1494 if (!ddi_in_panic() || 1495 ahci_initialize_pmult(ahci_ctlp, ahci_portp, 1496 &addr_pmult, &sdevice) != AHCI_SUCCESS) { 1497 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1498 spkt->satapkt_device.satadev_type = 1499 AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr); 1500 spkt->satapkt_device.satadev_state = 1501 AHCIPORT_GET_STATE(ahci_portp, &addr); 1502 ahci_update_sata_registers(ahci_ctlp, port, 1503 &spkt->satapkt_device); 1504 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1505 "ahci_tran_start returning PORT_ERROR " 1506 "while pmult is not initialized " 1507 "at port %d", port); 1508 mutex_exit(&ahci_portp->ahciport_mutex); 1509 return (SATA_TRAN_PORT_ERROR); 1510 } 1511 } 1512 if (!(AHCIPORT_GET_STATE(ahci_portp, &addr) & 1513 SATA_STATE_READY)) { 1514 if (!ddi_in_panic() || 1515 ahci_initialize_pmport(ahci_ctlp, 1516 ahci_portp, &addr) != AHCI_SUCCESS) { 1517 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1518 spkt->satapkt_device.satadev_type = 1519 AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr); 1520 spkt->satapkt_device.satadev_state = 1521 AHCIPORT_GET_STATE(ahci_portp, &addr); 1522 ahci_update_sata_registers(ahci_ctlp, port, 1523 &spkt->satapkt_device); 1524 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1525 "ahci_tran_start returning PORT_ERROR " 1526 "while sub-link is not initialized " 1527 "at port: %s", portstr); 1528 mutex_exit(&ahci_portp->ahciport_mutex); 1529 return (SATA_TRAN_PORT_ERROR); 1530 } 1531 } 1532 } 1533 1534 if (AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_FAILED || 1535 AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_SHUTDOWN|| 1536 AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_PWROFF) { 1537 /* 1538 * In case the target driver would send the packet before 1539 * sata framework can have the opportunity to process those 1540 * event reports. 1541 */ 1542 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1543 spkt->satapkt_device.satadev_state = 1544 ahci_portp->ahciport_port_state; 1545 ahci_update_sata_registers(ahci_ctlp, port, 1546 &spkt->satapkt_device); 1547 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1548 "ahci_tran_start returning PORT_ERROR while " 1549 "port in FAILED/SHUTDOWN/PWROFF state: " 1550 "port: %s", portstr); 1551 mutex_exit(&ahci_portp->ahciport_mutex); 1552 return (SATA_TRAN_PORT_ERROR); 1553 } 1554 1555 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) == SATA_DTYPE_NONE) { 1556 /* 1557 * ahci_intr_phyrdy_change() may have rendered it to 1558 * SATA_DTYPE_NONE. 1559 */ 1560 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1561 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 1562 spkt->satapkt_device.satadev_state = 1563 ahci_portp->ahciport_port_state; 1564 ahci_update_sata_registers(ahci_ctlp, port, 1565 &spkt->satapkt_device); 1566 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1567 "ahci_tran_start returning PORT_ERROR while " 1568 "no device attached: port: %s", portstr); 1569 mutex_exit(&ahci_portp->ahciport_mutex); 1570 return (SATA_TRAN_PORT_ERROR); 1571 } 1572 1573 /* R/W PMULT command will occupy the whole HBA port */ 1574 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 1575 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1576 "ahci_tran_start returning BUSY while " 1577 "executing READ/WRITE PORT-MULT command: " 1578 "port: %s", portstr); 1579 spkt->satapkt_reason = SATA_PKT_BUSY; 1580 mutex_exit(&ahci_portp->ahciport_mutex); 1581 return (SATA_TRAN_BUSY); 1582 } 1583 1584 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) { 1585 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1586 "ahci_tran_start returning BUSY while " 1587 "hot-plug in progress: port: %s", portstr); 1588 spkt->satapkt_reason = SATA_PKT_BUSY; 1589 mutex_exit(&ahci_portp->ahciport_mutex); 1590 return (SATA_TRAN_BUSY); 1591 } 1592 1593 /* 1594 * SATA HBA driver should remember that a device was reset and it 1595 * is supposed to reject any packets which do not specify either 1596 * SATA_IGNORE_DEV_RESET_STATE or SATA_CLEAR_DEV_RESET_STATE. 1597 * 1598 * This is to prevent a race condition when a device was arbitrarily 1599 * reset by the HBA driver (and lost it's setting) and a target 1600 * driver sending some commands to a device before the sata framework 1601 * has a chance to restore the device setting (such as cache enable/ 1602 * disable or other resettable stuff). 1603 */ 1604 /* 1605 * It is unnecessary to use specific flags to indicate 1606 * reset_in_progress for a pmport. While mopping, all command will be 1607 * mopped so that the entire HBA port is being dealt as a single 1608 * object. 1609 */ 1610 if (spkt->satapkt_cmd.satacmd_flags.sata_clear_dev_reset) { 1611 ahci_portp->ahciport_reset_in_progress = 0; 1612 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1613 "ahci_tran_start [CLEAR] the " 1614 "reset_in_progress for port: %d", port); 1615 } 1616 1617 if (ahci_portp->ahciport_reset_in_progress && 1618 ! spkt->satapkt_cmd.satacmd_flags.sata_ignore_dev_reset && 1619 ! ddi_in_panic()) { 1620 spkt->satapkt_reason = SATA_PKT_BUSY; 1621 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1622 "ahci_tran_start returning BUSY while " 1623 "reset in progress: port: %d", port); 1624 mutex_exit(&ahci_portp->ahciport_mutex); 1625 return (SATA_TRAN_BUSY); 1626 } 1627 1628 #ifdef AHCI_DEBUG 1629 if (spkt->satapkt_cmd.satacmd_flags.sata_ignore_dev_reset) { 1630 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1631 "ahci_tran_start: packet 0x%p [PASSTHRU] at port %d", 1632 spkt, port); 1633 } 1634 #endif 1635 1636 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 1637 spkt->satapkt_reason = SATA_PKT_BUSY; 1638 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1639 "ahci_tran_start returning BUSY while " 1640 "mopping in progress: port: %d", port); 1641 mutex_exit(&ahci_portp->ahciport_mutex); 1642 return (SATA_TRAN_BUSY); 1643 } 1644 1645 if (spkt->satapkt_op_mode & 1646 (SATA_OPMODE_SYNCH | SATA_OPMODE_POLLING)) { 1647 /* 1648 * If a SYNC command to be executed in interrupt context, 1649 * bounce it back to sata module. 1650 */ 1651 if (!(spkt->satapkt_op_mode & SATA_OPMODE_POLLING) && 1652 servicing_interrupt()) { 1653 spkt->satapkt_reason = SATA_PKT_BUSY; 1654 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1655 "ahci_tran_start returning BUSY while " 1656 "sending SYNC mode under interrupt context: " 1657 "port : %d", port); 1658 mutex_exit(&ahci_portp->ahciport_mutex); 1659 return (SATA_TRAN_BUSY); 1660 } 1661 1662 /* We need to do the sync start now */ 1663 if (ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, 1664 spkt) == AHCI_FAILURE) { 1665 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_tran_start " 1666 "return QUEUE_FULL: port %d", port); 1667 mutex_exit(&ahci_portp->ahciport_mutex); 1668 return (SATA_TRAN_QUEUE_FULL); 1669 } 1670 } else { 1671 /* Async start, using interrupt */ 1672 if (ahci_deliver_satapkt(ahci_ctlp, ahci_portp, &addr, spkt) 1673 == AHCI_FAILURE) { 1674 spkt->satapkt_reason = SATA_PKT_QUEUE_FULL; 1675 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_tran_start " 1676 "returning QUEUE_FULL: port %d", port); 1677 mutex_exit(&ahci_portp->ahciport_mutex); 1678 return (SATA_TRAN_QUEUE_FULL); 1679 } 1680 } 1681 1682 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_tran_start " 1683 "sata tran accepted: port %s", portstr); 1684 1685 mutex_exit(&ahci_portp->ahciport_mutex); 1686 return (SATA_TRAN_ACCEPTED); 1687 } 1688 1689 /* 1690 * SATA_OPMODE_SYNCH flag is set 1691 * 1692 * If SATA_OPMODE_POLLING flag is set, then we must poll the command 1693 * without interrupt, otherwise we can still use the interrupt. 1694 * 1695 * WARNING!!! ahciport_mutex should be acquired before the function 1696 * is called. 1697 */ 1698 static int 1699 ahci_do_sync_start(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 1700 ahci_addr_t *addrp, sata_pkt_t *spkt) 1701 { 1702 int pkt_timeout_ticks; 1703 uint32_t timeout_tags; 1704 int rval; 1705 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 1706 uint8_t port = addrp->aa_port; 1707 1708 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_do_sync_start enter: " 1709 "port %d:%d spkt 0x%p", port, addrp->aa_pmport, spkt); 1710 1711 if (spkt->satapkt_op_mode & SATA_OPMODE_POLLING) { 1712 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_POLLING; 1713 if ((rval = ahci_deliver_satapkt(ahci_ctlp, ahci_portp, 1714 addrp, spkt)) == AHCI_FAILURE) { 1715 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_POLLING; 1716 return (rval); 1717 } 1718 1719 pkt_timeout_ticks = 1720 drv_usectohz((clock_t)spkt->satapkt_time * 1000000); 1721 1722 while (spkt->satapkt_reason == SATA_PKT_BUSY) { 1723 mutex_exit(&ahci_portp->ahciport_mutex); 1724 1725 /* Simulate the interrupt */ 1726 ahci_port_intr(ahci_ctlp, ahci_portp, port); 1727 1728 drv_usecwait(AHCI_10MS_USECS); 1729 1730 mutex_enter(&ahci_portp->ahciport_mutex); 1731 pkt_timeout_ticks -= AHCI_10MS_TICKS; 1732 if (pkt_timeout_ticks < 0) { 1733 cmn_err(CE_WARN, "!ahci%d: ahci_do_sync_start " 1734 "port %d satapkt 0x%p timed out\n", 1735 instance, port, (void *)spkt); 1736 timeout_tags = (0x1 << rval); 1737 mutex_exit(&ahci_portp->ahciport_mutex); 1738 ahci_timeout_pkts(ahci_ctlp, ahci_portp, 1739 port, timeout_tags); 1740 mutex_enter(&ahci_portp->ahciport_mutex); 1741 } 1742 } 1743 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_POLLING; 1744 return (AHCI_SUCCESS); 1745 1746 } else { 1747 if ((rval = ahci_deliver_satapkt(ahci_ctlp, ahci_portp, 1748 addrp, spkt)) == AHCI_FAILURE) 1749 return (rval); 1750 1751 #if AHCI_DEBUG 1752 /* 1753 * Note that the driver always uses the slot 0 to deliver 1754 * REQUEST SENSE or READ LOG EXT command 1755 */ 1756 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 1757 ASSERT(rval == 0); 1758 #endif 1759 1760 while (spkt->satapkt_reason == SATA_PKT_BUSY) 1761 cv_wait(&ahci_portp->ahciport_cv, 1762 &ahci_portp->ahciport_mutex); 1763 1764 return (AHCI_SUCCESS); 1765 } 1766 } 1767 1768 #define SENDUP_PACKET(ahci_portp, satapkt, reason) \ 1769 if (satapkt) { \ 1770 satapkt->satapkt_reason = reason; \ 1771 /* \ 1772 * We set the satapkt_reason in both sync and \ 1773 * non-sync cases. \ 1774 */ \ 1775 } \ 1776 if (satapkt && \ 1777 ! (satapkt->satapkt_op_mode & SATA_OPMODE_SYNCH) && \ 1778 satapkt->satapkt_comp) { \ 1779 mutex_exit(&ahci_portp->ahciport_mutex); \ 1780 (*satapkt->satapkt_comp)(satapkt); \ 1781 mutex_enter(&ahci_portp->ahciport_mutex); \ 1782 } else { \ 1783 if (satapkt && \ 1784 (satapkt->satapkt_op_mode & SATA_OPMODE_SYNCH) && \ 1785 ! (satapkt->satapkt_op_mode & SATA_OPMODE_POLLING)) \ 1786 cv_broadcast(&ahci_portp->ahciport_cv); \ 1787 } 1788 1789 /* 1790 * Searches for and claims a free command slot. 1791 * 1792 * Returns value: 1793 * 1794 * AHCI_FAILURE returned only if 1795 * 1. No empty slot left 1796 * 2. Non-queued command requested while queued command(s) is outstanding 1797 * 3. Queued command requested while non-queued command(s) is outstanding 1798 * 4. HBA doesn't support multiple-use of command list while already a 1799 * non-queued command is oustanding 1800 * 5. Queued command requested while some queued command(s) has been 1801 * outstanding on a different port multiplier port. (AHCI spec 1.2, 1802 * 9.1.2) 1803 * 1804 * claimed slot number returned if succeeded 1805 * 1806 * NOTE: it will always return slot 0 for following commands to simplify the 1807 * algorithm. 1808 * 1. REQUEST SENSE or READ LOG EXT command during error recovery process 1809 * 2. READ/WRITE PORTMULT command 1810 * 1811 * WARNING!!! ahciport_mutex should be acquired before the function 1812 * is called. 1813 */ 1814 static int 1815 ahci_claim_free_slot(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 1816 ahci_addr_t *addrp, int command_type) 1817 { 1818 uint32_t port_cmd_issue; 1819 uint32_t free_slots; 1820 int slot; 1821 1822 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_claim_free_slot enter " 1823 "ahciport_pending_tags = 0x%x " 1824 "ahciport_pending_ncq_tags = 0x%x", 1825 ahci_portp->ahciport_pending_tags, 1826 ahci_portp->ahciport_pending_ncq_tags); 1827 1828 /* 1829 * According to the AHCI spec, system software is responsible to 1830 * ensure that queued and non-queued commands are not mixed in 1831 * the command list. 1832 */ 1833 if (command_type == AHCI_NON_NCQ_CMD) { 1834 /* Non-NCQ command request */ 1835 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1836 AHCIDBG(AHCIDBG_INFO|AHCIDBG_NCQ, ahci_ctlp, 1837 "ahci_claim_free_slot: there is still pending " 1838 "queued command(s) in the command list, " 1839 "so no available slot for the non-queued " 1840 "command", NULL); 1841 return (AHCI_FAILURE); 1842 } 1843 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 1844 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 1845 "ahci_claim_free_slot: there is still pending " 1846 "read/write port-mult command(s) in command list, " 1847 "so no available slot for the non-queued command", 1848 NULL); 1849 return (AHCI_FAILURE); 1850 } 1851 if ((ahci_ctlp->ahcictl_cap & AHCI_CAP_NO_MCMDLIST_NONQUEUE) && 1852 NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1853 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1854 "ahci_claim_free_slot: HBA cannot support multiple-" 1855 "use of the command list for non-queued commands", 1856 NULL); 1857 return (AHCI_FAILURE); 1858 } 1859 free_slots = (~ahci_portp->ahciport_pending_tags) & 1860 AHCI_SLOT_MASK(ahci_ctlp); 1861 } else if (command_type == AHCI_NCQ_CMD) { 1862 /* NCQ command request */ 1863 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1864 AHCIDBG(AHCIDBG_INFO|AHCIDBG_NCQ, ahci_ctlp, 1865 "ahci_claim_free_slot: there is still pending " 1866 "non-queued command(s) in the command list, " 1867 "so no available slot for the queued command", 1868 NULL); 1869 return (AHCI_FAILURE); 1870 } 1871 1872 /* 1873 * NCQ commands cannot be sent to different port multiplier 1874 * ports in Command-Based Switching mode 1875 */ 1876 /* 1877 * NOTE: In Command-Based Switching mode, AHCI controller 1878 * usually reports a 'Handshake Error' when multiple NCQ 1879 * commands are outstanding simultaneously. 1880 */ 1881 if (AHCIPORT_DEV_TYPE(ahci_portp, addrp) == SATA_DTYPE_PMULT) { 1882 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1883 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_FBSS) && 1884 NCQ_CMD_IN_PROGRESS(ahci_portp) && 1885 AHCIPORT_NCQ_PMPORT(ahci_portp) != 1886 addrp->aa_pmport) { 1887 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1888 "ahci_claim_free_slot: there is still " 1889 "pending queued command(s) in the " 1890 "command list for another Port Multiplier " 1891 "port, so no available slot.", NULL); 1892 return (AHCI_FAILURE); 1893 } 1894 } 1895 1896 free_slots = (~ahci_portp->ahciport_pending_ncq_tags) & 1897 AHCI_NCQ_SLOT_MASK(ahci_portp); 1898 } else if (command_type == AHCI_ERR_RETRI_CMD) { 1899 /* Error retrieval command request */ 1900 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1901 "ahci_claim_free_slot: slot 0 is allocated for REQUEST " 1902 "SENSE or READ LOG EXT command", NULL); 1903 slot = 0; 1904 goto out; 1905 } else if (command_type == AHCI_RDWR_PMULT_CMD) { 1906 /* 1907 * An extra check on PxCI. Sometimes PxCI bits may not be 1908 * cleared during hot-plug or error recovery process. 1909 */ 1910 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 1911 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, addrp->aa_port)); 1912 1913 if (port_cmd_issue != 0) { 1914 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 1915 "ahci_claim_free_slot: there is still pending " 1916 "command(s) in command list (0x%x/0x%x, PxCI %x)," 1917 "so no available slot for R/W PMULT command.", 1918 NON_NCQ_CMD_IN_PROGRESS(ahci_portp), 1919 NCQ_CMD_IN_PROGRESS(ahci_portp), 1920 port_cmd_issue); 1921 return (AHCI_FAILURE); 1922 } 1923 1924 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1925 "ahci_claim_free_slot: slot 0 is allocated for " 1926 "READ/WRITE PORTMULT command", NULL); 1927 slot = 0; 1928 goto out; 1929 } 1930 1931 slot = ddi_ffs(free_slots) - 1; 1932 if (slot == -1) { 1933 AHCIDBG(AHCIDBG_VERBOSE, ahci_ctlp, 1934 "ahci_claim_free_slot: no empty slots", NULL); 1935 return (AHCI_FAILURE); 1936 } 1937 1938 /* 1939 * According to the AHCI spec, to allow a simple mechanism for the 1940 * HBA to map command list slots to queue entries, software must 1941 * match the tag number it uses to the slot it is placing the command 1942 * in. For example, if a queued command is placed in slot 5, the tag 1943 * for that command must be 5. 1944 */ 1945 if (command_type == AHCI_NCQ_CMD) { 1946 ahci_portp->ahciport_pending_ncq_tags |= (0x1 << slot); 1947 if (AHCI_ADDR_IS_PMPORT(addrp)) { 1948 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1949 AHCIPORT_NCQ_PMPORT(ahci_portp) = addrp->aa_pmport; 1950 } 1951 } 1952 1953 ahci_portp->ahciport_pending_tags |= (0x1 << slot); 1954 1955 out: 1956 AHCIDBG(AHCIDBG_VERBOSE, ahci_ctlp, 1957 "ahci_claim_free_slot: found slot: 0x%x", slot); 1958 1959 return (slot); 1960 } 1961 1962 /* 1963 * Builds the Command Table for the sata packet and delivers it to controller. 1964 * 1965 * Returns: 1966 * slot number if we can obtain a slot successfully 1967 * otherwise, return AHCI_FAILURE 1968 * 1969 * WARNING!!! ahciport_mutex should be acquired before the function is called. 1970 */ 1971 static int 1972 ahci_deliver_satapkt(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 1973 ahci_addr_t *addrp, sata_pkt_t *spkt) 1974 { 1975 int cmd_slot; 1976 sata_cmd_t *scmd; 1977 ahci_fis_h2d_register_t *h2d_register_fisp; 1978 ahci_cmd_table_t *cmd_table; 1979 ahci_cmd_header_t *cmd_header; 1980 int ncookies; 1981 int i; 1982 int command_type = AHCI_NON_NCQ_CMD; 1983 int ncq_qdepth; 1984 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 1985 uint8_t port, pmport; 1986 #if AHCI_DEBUG 1987 uint32_t *ptr; 1988 uint8_t *ptr2; 1989 #endif 1990 1991 port = addrp->aa_port; 1992 pmport = addrp->aa_pmport; 1993 1994 spkt->satapkt_reason = SATA_PKT_BUSY; 1995 1996 scmd = &spkt->satapkt_cmd; 1997 1998 /* Check if the command is a NCQ command */ 1999 if (scmd->satacmd_cmd_reg == SATAC_READ_FPDMA_QUEUED || 2000 scmd->satacmd_cmd_reg == SATAC_WRITE_FPDMA_QUEUED) { 2001 command_type = AHCI_NCQ_CMD; 2002 2003 /* 2004 * When NCQ is support, system software must determine the 2005 * maximum tag allowed by the device and the HBA, and it 2006 * must use a value not beyond of the lower bound of the two. 2007 * 2008 * Sata module is going to calculate the qdepth and send 2009 * down to HBA driver via sata_cmd. 2010 */ 2011 ncq_qdepth = scmd->satacmd_flags.sata_max_queue_depth + 1; 2012 2013 /* 2014 * At the moment, the driver doesn't support the dynamic 2015 * setting of the maximum ncq depth, and the value can be 2016 * set either during the attach or after hot-plug insertion. 2017 */ 2018 if (ahci_portp->ahciport_max_ncq_tags == 0) { 2019 ahci_portp->ahciport_max_ncq_tags = ncq_qdepth; 2020 AHCIDBG(AHCIDBG_NCQ, ahci_ctlp, 2021 "ahci_deliver_satapkt: port %d the max tags for " 2022 "NCQ command is %d", port, ncq_qdepth); 2023 } else { 2024 if (ncq_qdepth != ahci_portp->ahciport_max_ncq_tags) { 2025 cmn_err(CE_WARN, "!ahci%d: ahci_deliver_satapkt" 2026 " port %d the max tag for NCQ command is " 2027 "requested to change from %d to %d, at the" 2028 " moment the driver doesn't support the " 2029 "dynamic change so it's going to " 2030 "still use the previous tag value", 2031 instance, port, 2032 ahci_portp->ahciport_max_ncq_tags, 2033 ncq_qdepth); 2034 } 2035 } 2036 } 2037 2038 /* Check if the command is an error retrieval command */ 2039 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 2040 command_type = AHCI_ERR_RETRI_CMD; 2041 2042 /* Check if the command is an read/write pmult command */ 2043 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 2044 command_type = AHCI_RDWR_PMULT_CMD; 2045 2046 /* Check if there is an empty command slot */ 2047 cmd_slot = ahci_claim_free_slot(ahci_ctlp, ahci_portp, 2048 addrp, command_type); 2049 if (cmd_slot == AHCI_FAILURE) { 2050 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "no free command slot", NULL); 2051 return (AHCI_FAILURE); 2052 } 2053 2054 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INFO, ahci_ctlp, 2055 "ahci_deliver_satapkt enter: cmd_reg: 0x%x, cmd_slot: 0x%x, " 2056 "port: %d, satapkt: 0x%p", scmd->satacmd_cmd_reg, 2057 cmd_slot, port, (void *)spkt); 2058 2059 cmd_table = ahci_portp->ahciport_cmd_tables[cmd_slot]; 2060 bzero((void *)cmd_table, ahci_cmd_table_size); 2061 2062 /* For data transfer operations, it is the H2D Register FIS */ 2063 h2d_register_fisp = 2064 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 2065 2066 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 2067 2068 /* 2069 * PMP field only make sense when target is a port multiplier or a 2070 * device behind a port multiplier. Otherwise should set it to 0. 2071 */ 2072 if (AHCI_ADDR_IS_PMULT(addrp) || AHCI_ADDR_IS_PMPORT(addrp)) 2073 SET_FIS_PMP(h2d_register_fisp, pmport); 2074 2075 SET_FIS_CDMDEVCTL(h2d_register_fisp, 1); 2076 SET_FIS_COMMAND(h2d_register_fisp, scmd->satacmd_cmd_reg); 2077 SET_FIS_FEATURES(h2d_register_fisp, scmd->satacmd_features_reg); 2078 SET_FIS_SECTOR_COUNT(h2d_register_fisp, scmd->satacmd_sec_count_lsb); 2079 2080 switch (scmd->satacmd_addr_type) { 2081 2082 case 0: 2083 /* 2084 * satacmd_addr_type will be 0 for the commands below: 2085 * ATAPI command 2086 * SATAC_IDLE_IM 2087 * SATAC_STANDBY_IM 2088 * SATAC_DOWNLOAD_MICROCODE 2089 * SATAC_FLUSH_CACHE 2090 * SATAC_SET_FEATURES 2091 * SATAC_SMART 2092 * SATAC_ID_PACKET_DEVICE 2093 * SATAC_ID_DEVICE 2094 * SATAC_READ_PORTMULT 2095 * SATAC_WRITE_PORTMULT 2096 */ 2097 /* FALLTHRU */ 2098 2099 case ATA_ADDR_LBA: 2100 /* FALLTHRU */ 2101 2102 case ATA_ADDR_LBA28: 2103 /* LBA[7:0] */ 2104 SET_FIS_SECTOR(h2d_register_fisp, scmd->satacmd_lba_low_lsb); 2105 2106 /* LBA[15:8] */ 2107 SET_FIS_CYL_LOW(h2d_register_fisp, scmd->satacmd_lba_mid_lsb); 2108 2109 /* LBA[23:16] */ 2110 SET_FIS_CYL_HI(h2d_register_fisp, scmd->satacmd_lba_high_lsb); 2111 2112 /* LBA [27:24] (also called dev_head) */ 2113 SET_FIS_DEV_HEAD(h2d_register_fisp, scmd->satacmd_device_reg); 2114 2115 break; 2116 2117 case ATA_ADDR_LBA48: 2118 /* LBA[7:0] */ 2119 SET_FIS_SECTOR(h2d_register_fisp, scmd->satacmd_lba_low_lsb); 2120 2121 /* LBA[15:8] */ 2122 SET_FIS_CYL_LOW(h2d_register_fisp, scmd->satacmd_lba_mid_lsb); 2123 2124 /* LBA[23:16] */ 2125 SET_FIS_CYL_HI(h2d_register_fisp, scmd->satacmd_lba_high_lsb); 2126 2127 /* LBA [31:24] */ 2128 SET_FIS_SECTOR_EXP(h2d_register_fisp, 2129 scmd->satacmd_lba_low_msb); 2130 2131 /* LBA [39:32] */ 2132 SET_FIS_CYL_LOW_EXP(h2d_register_fisp, 2133 scmd->satacmd_lba_mid_msb); 2134 2135 /* LBA [47:40] */ 2136 SET_FIS_CYL_HI_EXP(h2d_register_fisp, 2137 scmd->satacmd_lba_high_msb); 2138 2139 /* Set dev_head */ 2140 SET_FIS_DEV_HEAD(h2d_register_fisp, 2141 scmd->satacmd_device_reg); 2142 2143 /* Set the extended sector count and features */ 2144 SET_FIS_SECTOR_COUNT_EXP(h2d_register_fisp, 2145 scmd->satacmd_sec_count_msb); 2146 SET_FIS_FEATURES_EXP(h2d_register_fisp, 2147 scmd->satacmd_features_reg_ext); 2148 break; 2149 } 2150 2151 /* 2152 * For NCQ command (READ/WRITE FPDMA QUEUED), sector count 7:0 is 2153 * filled into features field, and sector count 8:15 is filled into 2154 * features (exp) field. TAG is filled into sector field. 2155 */ 2156 if (command_type == AHCI_NCQ_CMD) { 2157 SET_FIS_FEATURES(h2d_register_fisp, 2158 scmd->satacmd_sec_count_lsb); 2159 SET_FIS_FEATURES_EXP(h2d_register_fisp, 2160 scmd->satacmd_sec_count_msb); 2161 2162 SET_FIS_SECTOR_COUNT(h2d_register_fisp, 2163 (cmd_slot << SATA_TAG_QUEUING_SHIFT)); 2164 } 2165 2166 ncookies = scmd->satacmd_num_dma_cookies; 2167 AHCIDBG(AHCIDBG_PRDT, ahci_ctlp, 2168 "ncookies = 0x%x, ahci_dma_prdt_number = 0x%x", 2169 ncookies, ahci_dma_prdt_number); 2170 2171 ASSERT(ncookies <= ahci_dma_prdt_number); 2172 ahci_portp->ahciport_prd_bytecounts[cmd_slot] = 0; 2173 2174 /* *** now fill the scatter gather list ******* */ 2175 for (i = 0; i < ncookies; i++) { 2176 cmd_table->ahcict_prdt[i].ahcipi_data_base_addr = 2177 scmd->satacmd_dma_cookie_list[i]._dmu._dmac_la[0]; 2178 cmd_table->ahcict_prdt[i].ahcipi_data_base_addr_upper = 2179 scmd->satacmd_dma_cookie_list[i]._dmu._dmac_la[1]; 2180 cmd_table->ahcict_prdt[i].ahcipi_descr_info = 2181 scmd->satacmd_dma_cookie_list[i].dmac_size - 1; 2182 ahci_portp->ahciport_prd_bytecounts[cmd_slot] += 2183 scmd->satacmd_dma_cookie_list[i].dmac_size; 2184 } 2185 2186 AHCIDBG(AHCIDBG_PRDT, ahci_ctlp, 2187 "ahciport_prd_bytecounts 0x%x for cmd_slot 0x%x", 2188 ahci_portp->ahciport_prd_bytecounts[cmd_slot], cmd_slot); 2189 2190 /* The ACMD field is filled in for ATAPI command */ 2191 if (scmd->satacmd_cmd_reg == SATAC_PACKET) { 2192 bcopy(scmd->satacmd_acdb, cmd_table->ahcict_atapi_cmd, 2193 SATA_ATAPI_MAX_CDB_LEN); 2194 } 2195 2196 /* Set Command Header in Command List */ 2197 cmd_header = &ahci_portp->ahciport_cmd_list[cmd_slot]; 2198 BZERO_DESCR_INFO(cmd_header); 2199 BZERO_PRD_BYTE_COUNT(cmd_header); 2200 2201 /* Set the number of entries in the PRD table */ 2202 SET_PRD_TABLE_LENGTH(cmd_header, ncookies); 2203 2204 /* Set the length of the command in the CFIS area */ 2205 SET_COMMAND_FIS_LENGTH(cmd_header, AHCI_H2D_REGISTER_FIS_LENGTH); 2206 2207 /* 2208 * PMP field only make sense when target is a port multiplier or a 2209 * device behind a port multiplier. Otherwise should set it to 0. 2210 */ 2211 if (AHCI_ADDR_IS_PMULT(addrp) || AHCI_ADDR_IS_PMPORT(addrp)) 2212 SET_PORT_MULTI_PORT(cmd_header, pmport); 2213 2214 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "command data direction is " 2215 "sata_data_direction = 0x%x", 2216 scmd->satacmd_flags.sata_data_direction); 2217 2218 /* Set A bit if it is an ATAPI command */ 2219 if (scmd->satacmd_cmd_reg == SATAC_PACKET) 2220 SET_ATAPI(cmd_header, AHCI_CMDHEAD_ATAPI); 2221 2222 /* Set W bit if data is going to the device */ 2223 if (scmd->satacmd_flags.sata_data_direction == SATA_DIR_WRITE) 2224 SET_WRITE(cmd_header, AHCI_CMDHEAD_DATA_WRITE); 2225 2226 /* 2227 * Set the prefetchable bit - this bit is only valid if the PRDTL 2228 * field is non-zero or the ATAPI 'A' bit is set in the command 2229 * header. This bit cannot be set when using native command 2230 * queuing commands or when using FIS-based switching with a Port 2231 * multiplier. 2232 */ 2233 if (command_type != AHCI_NCQ_CMD) 2234 SET_PREFETCHABLE(cmd_header, AHCI_CMDHEAD_PREFETCHABLE); 2235 2236 /* 2237 * Now remember the sata packet in ahciport_slot_pkts[]. 2238 * Error retrieval command and r/w port multiplier command will 2239 * be stored specifically for each port. 2240 */ 2241 if (!ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 2242 !RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 2243 ahci_portp->ahciport_slot_pkts[cmd_slot] = spkt; 2244 2245 /* 2246 * We are overloading satapkt_hba_driver_private with 2247 * watched_cycle count. 2248 */ 2249 spkt->satapkt_hba_driver_private = (void *)(intptr_t)0; 2250 2251 #if AHCI_DEBUG 2252 if (ahci_debug_flags & AHCIDBG_ATACMD && 2253 scmd->satacmd_cmd_reg != SATAC_PACKET || 2254 ahci_debug_flags & AHCIDBG_ATAPICMD && 2255 scmd->satacmd_cmd_reg == SATAC_PACKET) { 2256 2257 /* Dump the command header and table */ 2258 ahci_log(ahci_ctlp, CE_WARN, "\n"); 2259 ahci_log(ahci_ctlp, CE_WARN, "Command header&table for spkt " 2260 "0x%p cmd_reg 0x%x port %d", spkt, 2261 scmd->satacmd_cmd_reg, port); 2262 ptr = (uint32_t *)cmd_header; 2263 ahci_log(ahci_ctlp, CE_WARN, 2264 " Command Header:%8x %8x %8x %8x", 2265 ptr[0], ptr[1], ptr[2], ptr[3]); 2266 2267 /* Dump the H2D register FIS */ 2268 ptr = (uint32_t *)h2d_register_fisp; 2269 ahci_log(ahci_ctlp, CE_WARN, 2270 " Command FIS: %8x %8x %8x %8x", 2271 ptr[0], ptr[1], ptr[2], ptr[3]); 2272 2273 /* Dump the ACMD register FIS */ 2274 ptr2 = (uint8_t *)&(cmd_table->ahcict_atapi_cmd); 2275 for (i = 0; i < SATA_ATAPI_MAX_CDB_LEN/8; i++) 2276 if (ahci_debug_flags & AHCIDBG_ATAPICMD) 2277 ahci_log(ahci_ctlp, CE_WARN, 2278 " ATAPI command: %2x %2x %2x %2x " 2279 "%2x %2x %2x %2x", 2280 ptr2[8 * i], ptr2[8 * i + 1], 2281 ptr2[8 * i + 2], ptr2[8 * i + 3], 2282 ptr2[8 * i + 4], ptr2[8 * i + 5], 2283 ptr2[8 * i + 6], ptr2[8 * i + 7]); 2284 2285 /* Dump the PRDT */ 2286 for (i = 0; i < ncookies; i++) { 2287 ptr = (uint32_t *)&(cmd_table->ahcict_prdt[i]); 2288 ahci_log(ahci_ctlp, CE_WARN, 2289 " Cookie %d: %8x %8x %8x %8x", 2290 i, ptr[0], ptr[1], ptr[2], ptr[3]); 2291 } 2292 } 2293 #endif 2294 2295 (void) ddi_dma_sync( 2296 ahci_portp->ahciport_cmd_tables_dma_handle[cmd_slot], 2297 0, 2298 ahci_cmd_table_size, 2299 DDI_DMA_SYNC_FORDEV); 2300 2301 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 2302 cmd_slot * sizeof (ahci_cmd_header_t), 2303 sizeof (ahci_cmd_header_t), 2304 DDI_DMA_SYNC_FORDEV); 2305 2306 /* Set the corresponding bit in the PxSACT.DS for queued command */ 2307 if (command_type == AHCI_NCQ_CMD) { 2308 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 2309 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port), 2310 (0x1 << cmd_slot)); 2311 } 2312 2313 /* Indicate to the HBA that a command is active. */ 2314 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 2315 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 2316 (0x1 << cmd_slot)); 2317 2318 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_deliver_satapkt " 2319 "exit: port %d", port); 2320 2321 return (cmd_slot); 2322 } 2323 2324 /* 2325 * Called by the sata framework to abort the previously sent packet(s). 2326 * 2327 * Reset device to abort commands. 2328 */ 2329 static int 2330 ahci_tran_abort(dev_info_t *dip, sata_pkt_t *spkt, int flag) 2331 { 2332 ahci_ctl_t *ahci_ctlp; 2333 ahci_port_t *ahci_portp; 2334 uint32_t slot_status = 0; 2335 uint32_t aborted_tags = 0; 2336 uint32_t finished_tags = 0; 2337 uint8_t cport = spkt->satapkt_device.satadev_addr.cport; 2338 uint8_t port; 2339 int tmp_slot; 2340 int instance = ddi_get_instance(dip); 2341 2342 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 2343 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 2344 2345 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2346 "ahci_tran_abort enter: port %d", port); 2347 2348 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2349 mutex_enter(&ahci_portp->ahciport_mutex); 2350 2351 /* 2352 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2353 * commands are being mopped, therefore there is nothing else to do 2354 */ 2355 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2356 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2357 "ahci_tran_abort: port %d is in " 2358 "mopping process, so just return directly ", port); 2359 mutex_exit(&ahci_portp->ahciport_mutex); 2360 return (SATA_SUCCESS); 2361 } 2362 2363 /* 2364 * If AHCI_PORT_FLAG_RDWR_PMULT flag is set, it means a R/W PMULT 2365 * command is being executed so no other commands is outstanding, 2366 * nothing to do. 2367 */ 2368 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_RDWR_PMULT) { 2369 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2370 "ahci_tran_abort: port %d is reading/writing " 2371 "port multiplier, so just return directly ", port); 2372 mutex_exit(&ahci_portp->ahciport_mutex); 2373 return (SATA_SUCCESS); 2374 } 2375 2376 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED | 2377 ahci_portp->ahciport_port_state & SATA_PSTATE_SHUTDOWN | 2378 ahci_portp->ahciport_port_state & SATA_PSTATE_PWROFF) { 2379 /* 2380 * In case the targer driver would send the request before 2381 * sata framework can have the opportunity to process those 2382 * event reports. 2383 */ 2384 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 2385 spkt->satapkt_device.satadev_state = 2386 ahci_portp->ahciport_port_state; 2387 ahci_update_sata_registers(ahci_ctlp, port, 2388 &spkt->satapkt_device); 2389 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2390 "ahci_tran_abort returning SATA_FAILURE while " 2391 "port in FAILED/SHUTDOWN/PWROFF state: " 2392 "port: %d", port); 2393 mutex_exit(&ahci_portp->ahciport_mutex); 2394 return (SATA_FAILURE); 2395 } 2396 2397 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 2398 /* 2399 * ahci_intr_phyrdy_change() may have rendered it to 2400 * AHCI_PORT_TYPE_NODEV. 2401 */ 2402 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 2403 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 2404 spkt->satapkt_device.satadev_state = 2405 ahci_portp->ahciport_port_state; 2406 ahci_update_sata_registers(ahci_ctlp, port, 2407 &spkt->satapkt_device); 2408 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2409 "ahci_tran_abort returning SATA_FAILURE while " 2410 "no device attached: port: %d", port); 2411 mutex_exit(&ahci_portp->ahciport_mutex); 2412 return (SATA_FAILURE); 2413 } 2414 2415 if (flag == SATA_ABORT_ALL_PACKETS) { 2416 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2417 aborted_tags = ahci_portp->ahciport_pending_tags; 2418 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2419 aborted_tags = ahci_portp->ahciport_pending_ncq_tags; 2420 2421 cmn_err(CE_NOTE, "!ahci%d: ahci port %d abort all packets", 2422 instance, port); 2423 } else { 2424 aborted_tags = 0xffffffff; 2425 /* 2426 * Aborting one specific packet, first search the 2427 * ahciport_slot_pkts[] list for matching spkt. 2428 */ 2429 for (tmp_slot = 0; 2430 tmp_slot < ahci_ctlp->ahcictl_num_cmd_slots; tmp_slot++) { 2431 if (ahci_portp->ahciport_slot_pkts[tmp_slot] == spkt) { 2432 aborted_tags = (0x1 << tmp_slot); 2433 break; 2434 } 2435 } 2436 2437 if (aborted_tags == 0xffffffff) { 2438 /* request packet is not on the pending list */ 2439 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2440 "Cannot find the aborting pkt 0x%p on the " 2441 "pending list", (void *)spkt); 2442 ahci_update_sata_registers(ahci_ctlp, port, 2443 &spkt->satapkt_device); 2444 mutex_exit(&ahci_portp->ahciport_mutex); 2445 return (SATA_FAILURE); 2446 } 2447 cmn_err(CE_NOTE, "!ahci%d: ahci port %d abort satapkt 0x%p", 2448 instance, port, (void *)spkt); 2449 } 2450 2451 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2452 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2453 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2454 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2455 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2456 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2457 2458 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2459 ahci_portp->ahciport_mop_in_progress++; 2460 2461 /* 2462 * To abort the packet(s), first we are trying to clear PxCMD.ST 2463 * to stop the port, and if the port can be stopped 2464 * successfully with PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0', 2465 * then we just send back the aborted packet(s) with ABORTED flag 2466 * and then restart the port by setting PxCMD.ST and PxCMD.FRE. 2467 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then we 2468 * perform a COMRESET. 2469 */ 2470 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, 2471 ahci_portp, port, NULL, NULL); 2472 2473 /* 2474 * Compute which have finished and which need to be retried. 2475 * 2476 * The finished tags are ahciport_pending_tags/ahciport_pending_ncq_tags 2477 * minus the slot_status. The aborted_tags has to be deducted by 2478 * finished_tags since we can't possibly abort a tag which had finished 2479 * already. 2480 */ 2481 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2482 finished_tags = ahci_portp->ahciport_pending_tags & 2483 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2484 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2485 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2486 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2487 2488 aborted_tags &= ~finished_tags; 2489 2490 ahci_mop_commands(ahci_ctlp, 2491 ahci_portp, 2492 slot_status, 2493 0, /* failed tags */ 2494 0, /* timeout tags */ 2495 aborted_tags, 2496 0); /* reset tags */ 2497 2498 ahci_update_sata_registers(ahci_ctlp, port, &spkt->satapkt_device); 2499 mutex_exit(&ahci_portp->ahciport_mutex); 2500 2501 return (SATA_SUCCESS); 2502 } 2503 2504 /* 2505 * Used to do device reset and reject all the pending packets on a device 2506 * during the reset operation. 2507 * 2508 * NOTE: ONLY called by ahci_tran_reset_dport 2509 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2510 */ 2511 static int 2512 ahci_reset_device_reject_pkts(ahci_ctl_t *ahci_ctlp, 2513 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2514 { 2515 uint32_t slot_status = 0; 2516 uint32_t reset_tags = 0; 2517 uint32_t finished_tags = 0; 2518 uint8_t port = addrp->aa_port; 2519 sata_device_t sdevice; 2520 int ret; 2521 2522 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2523 "ahci_reset_device_reject_pkts on port: %d", port); 2524 2525 /* 2526 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2527 * commands are being mopped, therefore there is nothing else to do 2528 */ 2529 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2530 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2531 "ahci_reset_device_reject_pkts: port %d is in " 2532 "mopping process, so return directly ", port); 2533 return (SATA_SUCCESS); 2534 } 2535 2536 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2537 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2538 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2539 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2540 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2541 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2542 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2543 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2544 } 2545 2546 if (ahci_software_reset(ahci_ctlp, ahci_portp, addrp) 2547 != AHCI_SUCCESS) { 2548 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2549 "Try to do a port reset after software " 2550 "reset failed", port); 2551 ret = ahci_port_reset(ahci_ctlp, ahci_portp, addrp); 2552 if (ret != AHCI_SUCCESS) { 2553 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2554 "ahci_reset_device_reject_pkts: port %d " 2555 "failed", port); 2556 return (SATA_FAILURE); 2557 } 2558 } 2559 /* Set the reset in progress flag */ 2560 ahci_portp->ahciport_reset_in_progress = 1; 2561 2562 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2563 ahci_portp->ahciport_mop_in_progress++; 2564 2565 /* Indicate to the framework that a reset has happened */ 2566 bzero((void *)&sdevice, sizeof (sata_device_t)); 2567 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 2568 sdevice.satadev_addr.pmport = 0; 2569 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 2570 sdevice.satadev_state = SATA_DSTATE_RESET | 2571 SATA_DSTATE_PWR_ACTIVE; 2572 mutex_exit(&ahci_portp->ahciport_mutex); 2573 sata_hba_event_notify( 2574 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 2575 &sdevice, 2576 SATA_EVNT_DEVICE_RESET); 2577 mutex_enter(&ahci_portp->ahciport_mutex); 2578 2579 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 2580 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 2581 2582 /* Next try to mop the pending commands */ 2583 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2584 finished_tags = ahci_portp->ahciport_pending_tags & 2585 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2586 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2587 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2588 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2589 2590 reset_tags &= ~finished_tags; 2591 2592 ahci_mop_commands(ahci_ctlp, 2593 ahci_portp, 2594 slot_status, 2595 0, /* failed tags */ 2596 0, /* timeout tags */ 2597 0, /* aborted tags */ 2598 reset_tags); /* reset tags */ 2599 2600 return (SATA_SUCCESS); 2601 } 2602 2603 /* 2604 * Used to do device reset and reject all the pending packets on a device 2605 * during the reset operation. 2606 * 2607 * NOTE: ONLY called by ahci_tran_reset_dport 2608 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2609 */ 2610 static int 2611 ahci_reset_pmdevice_reject_pkts(ahci_ctl_t *ahci_ctlp, 2612 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2613 { 2614 uint32_t finished_tags = 0, reset_tags = 0, slot_status = 0; 2615 uint8_t port = addrp->aa_port; 2616 uint8_t pmport = addrp->aa_pmport; 2617 sata_device_t sdevice; 2618 2619 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_PMULT, ahci_ctlp, 2620 "ahci_reset_pmdevice_reject_pkts at port %d:%d", port, pmport); 2621 2622 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2623 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2624 "ahci_reset_pmdevice_reject_pkts: port %d is in " 2625 "mopping process, so return directly ", port); 2626 return (SATA_SUCCESS); 2627 } 2628 2629 /* Checking for outstanding commands */ 2630 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2631 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2632 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2633 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2634 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2635 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2636 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2637 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2638 } 2639 2640 /* Issue SOFTWARE reset command. */ 2641 if (ahci_software_reset(ahci_ctlp, ahci_portp, addrp) 2642 != AHCI_SUCCESS) { 2643 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2644 "Try to do a port reset after software " 2645 "reset failed", port); 2646 return (SATA_FAILURE); 2647 } 2648 2649 /* Set the reset in progress flag */ 2650 ahci_portp->ahciport_reset_in_progress = 1; 2651 2652 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2653 ahci_portp->ahciport_mop_in_progress++; 2654 2655 /* Indicate to the framework that a reset has happened */ 2656 bzero((void *)&sdevice, sizeof (sata_device_t)); 2657 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 2658 sdevice.satadev_addr.pmport = pmport; 2659 if (AHCI_ADDR_IS_PMULT(addrp)) 2660 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 2661 else 2662 sdevice.satadev_addr.qual = SATA_ADDR_DPMPORT; 2663 sdevice.satadev_state = SATA_DSTATE_RESET | 2664 SATA_DSTATE_PWR_ACTIVE; 2665 mutex_exit(&ahci_portp->ahciport_mutex); 2666 sata_hba_event_notify( 2667 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 2668 &sdevice, 2669 SATA_EVNT_DEVICE_RESET); 2670 mutex_enter(&ahci_portp->ahciport_mutex); 2671 2672 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 2673 "port %d:%d sending event up: SATA_EVNT_DEVICE_RESET", 2674 port, pmport); 2675 2676 /* Next try to mop the pending commands */ 2677 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2678 finished_tags = ahci_portp->ahciport_pending_tags & 2679 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2680 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2681 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2682 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2683 reset_tags &= ~finished_tags; 2684 2685 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 2686 "reset_tags = %x, finished_tags = %x, slot_status = %x", 2687 reset_tags, finished_tags, slot_status); 2688 2689 /* 2690 * NOTE: Because PxCI be only erased by unset PxCMD.ST bit, so even we 2691 * try to reset a single device behind a port multiplier will 2692 * terminate all the commands on that HBA port. We need mop these 2693 * commands as well. 2694 */ 2695 ahci_mop_commands(ahci_ctlp, 2696 ahci_portp, 2697 slot_status, 2698 0, /* failed tags */ 2699 0, /* timeout tags */ 2700 0, /* aborted tags */ 2701 reset_tags); /* reset tags */ 2702 2703 return (SATA_SUCCESS); 2704 } 2705 2706 /* 2707 * Used to do port reset and reject all the pending packets on a port during 2708 * the reset operation. 2709 * 2710 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2711 */ 2712 static int 2713 ahci_reset_port_reject_pkts(ahci_ctl_t *ahci_ctlp, 2714 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2715 { 2716 uint32_t slot_status = 0; 2717 uint32_t reset_tags = 0; 2718 uint32_t finished_tags = 0; 2719 uint8_t port = addrp->aa_port; 2720 2721 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2722 "ahci_reset_port_reject_pkts at port: %d", port); 2723 2724 /* 2725 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2726 * commands are being mopped, therefore there is nothing else to do 2727 */ 2728 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2729 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2730 "ahci_reset_port_reject_pkts: port %d is in " 2731 "mopping process, so return directly ", port); 2732 return (SATA_SUCCESS); 2733 } 2734 2735 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2736 ahci_portp->ahciport_mop_in_progress++; 2737 2738 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2739 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2740 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2741 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2742 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2743 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2744 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2745 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2746 } 2747 2748 if (ahci_restart_port_wait_till_ready(ahci_ctlp, 2749 ahci_portp, port, AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, 2750 NULL) != AHCI_SUCCESS) { 2751 2752 /* Clear mop flag */ 2753 ahci_portp->ahciport_mop_in_progress--; 2754 if (ahci_portp->ahciport_mop_in_progress == 0) 2755 ahci_portp->ahciport_flags &= 2756 ~AHCI_PORT_FLAG_MOPPING; 2757 return (SATA_FAILURE); 2758 } 2759 2760 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2761 finished_tags = ahci_portp->ahciport_pending_tags & 2762 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2763 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2764 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2765 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2766 2767 reset_tags &= ~finished_tags; 2768 2769 ahci_mop_commands(ahci_ctlp, 2770 ahci_portp, 2771 slot_status, 2772 0, /* failed tags */ 2773 0, /* timeout tags */ 2774 0, /* aborted tags */ 2775 reset_tags); /* reset tags */ 2776 2777 return (SATA_SUCCESS); 2778 } 2779 2780 /* 2781 * Used to do hba reset and reject all the pending packets on all ports 2782 * during the reset operation. 2783 */ 2784 static int 2785 ahci_reset_hba_reject_pkts(ahci_ctl_t *ahci_ctlp) 2786 { 2787 ahci_port_t *ahci_portp; 2788 uint32_t slot_status[AHCI_MAX_PORTS]; 2789 uint32_t reset_tags[AHCI_MAX_PORTS]; 2790 uint32_t finished_tags[AHCI_MAX_PORTS]; 2791 int port; 2792 int ret = SATA_SUCCESS; 2793 2794 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2795 "ahci_reset_hba_reject_pkts enter", NULL); 2796 2797 bzero(slot_status, sizeof (slot_status)); 2798 bzero(reset_tags, sizeof (reset_tags)); 2799 bzero(finished_tags, sizeof (finished_tags)); 2800 2801 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 2802 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 2803 continue; 2804 } 2805 2806 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2807 2808 mutex_enter(&ahci_portp->ahciport_mutex); 2809 ahci_portp->ahciport_reset_in_progress = 1; 2810 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2811 slot_status[port] = ddi_get32( 2812 ahci_ctlp->ahcictl_ahci_acc_handle, 2813 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2814 reset_tags[port] = slot_status[port] & 2815 AHCI_SLOT_MASK(ahci_ctlp); 2816 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 2817 "port %d: reset_tags = 0x%x pending_tags = 0x%x", 2818 port, reset_tags[port], 2819 ahci_portp->ahciport_pending_tags); 2820 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2821 slot_status[port] = ddi_get32( 2822 ahci_ctlp->ahcictl_ahci_acc_handle, 2823 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2824 reset_tags[port] = slot_status[port] & 2825 AHCI_NCQ_SLOT_MASK(ahci_portp); 2826 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 2827 "port %d: reset_tags = 0x%x pending_tags = 0x%x", 2828 port, reset_tags[port], 2829 ahci_portp->ahciport_pending_tags); 2830 } 2831 mutex_exit(&ahci_portp->ahciport_mutex); 2832 } 2833 2834 if (ahci_hba_reset(ahci_ctlp) != AHCI_SUCCESS) { 2835 ret = SATA_FAILURE; 2836 } 2837 2838 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 2839 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 2840 continue; 2841 } 2842 2843 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2844 2845 mutex_enter(&ahci_portp->ahciport_mutex); 2846 /* 2847 * To prevent recursive enter to ahci_mop_commands, we need 2848 * check AHCI_PORT_FLAG_MOPPING flag. 2849 */ 2850 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2851 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2852 "ahci_reset_hba_reject_pkts: port %d is in " 2853 "mopping process, so return directly ", port); 2854 mutex_exit(&ahci_portp->ahciport_mutex); 2855 continue; 2856 } 2857 2858 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2859 ahci_portp->ahciport_mop_in_progress++; 2860 2861 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2862 finished_tags[port] = 2863 ahci_portp->ahciport_pending_tags & 2864 ~slot_status[port] & AHCI_SLOT_MASK(ahci_ctlp); 2865 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2866 finished_tags[port] = 2867 ahci_portp->ahciport_pending_ncq_tags & 2868 ~slot_status[port] & AHCI_NCQ_SLOT_MASK(ahci_portp); 2869 2870 reset_tags[port] &= ~finished_tags[port]; 2871 2872 ahci_mop_commands(ahci_ctlp, 2873 ahci_portp, 2874 slot_status[port], 2875 0, /* failed tags */ 2876 0, /* timeout tags */ 2877 0, /* aborted tags */ 2878 reset_tags[port]); /* reset tags */ 2879 mutex_exit(&ahci_portp->ahciport_mutex); 2880 } 2881 out: 2882 return (ret); 2883 } 2884 2885 /* 2886 * Called by sata framework to reset a port(s) or device. 2887 */ 2888 static int 2889 ahci_tran_reset_dport(dev_info_t *dip, sata_device_t *sd) 2890 { 2891 ahci_ctl_t *ahci_ctlp; 2892 ahci_port_t *ahci_portp; 2893 ahci_addr_t addr; 2894 uint8_t cport = sd->satadev_addr.cport; 2895 uint8_t pmport = sd->satadev_addr.pmport; 2896 uint8_t port; 2897 int ret = SATA_SUCCESS; 2898 int instance = ddi_get_instance(dip); 2899 2900 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 2901 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 2902 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2903 2904 ahci_get_ahci_addr(ahci_ctlp, sd, &addr); 2905 2906 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2907 "ahci_tran_reset_dport enter: cport %d", cport); 2908 2909 switch (sd->satadev_addr.qual) { 2910 case SATA_ADDR_PMPORT: 2911 /* 2912 * If we want to issue a COMRESET on a pmport, we need to 2913 * reject the outstanding commands on that pmport. According 2914 * to AHCI spec, PxCI register could only be cleared by 2915 * clearing PxCMD.ST, which will halt the controller port - as 2916 * well as other pmports. 2917 * 2918 * Therefore we directly reset the controller port for 2919 * simplicity. ahci_tran_probe_port() will handle reset stuff 2920 * like initializing the given pmport. 2921 */ 2922 /* FALLTHRU */ 2923 case SATA_ADDR_CPORT: 2924 /* Port reset */ 2925 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2926 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 2927 "port %d reset port", instance, port); 2928 2929 mutex_enter(&ahci_portp->ahciport_mutex); 2930 ret = ahci_reset_port_reject_pkts(ahci_ctlp, ahci_portp, &addr); 2931 mutex_exit(&ahci_portp->ahciport_mutex); 2932 2933 break; 2934 2935 case SATA_ADDR_DPMPORT: 2936 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 2937 "port %d:%d reset device", instance, port, pmport); 2938 /* FALLTHRU */ 2939 case SATA_ADDR_DCPORT: 2940 /* Device reset */ 2941 if (sd->satadev_addr.qual == SATA_ADDR_DCPORT) 2942 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 2943 "port %d reset device", instance, port); 2944 2945 mutex_enter(&ahci_portp->ahciport_mutex); 2946 /* 2947 * software reset request must be sent to SATA_PMULT_HOSTPORT 2948 * if target is a port multiplier: 2949 */ 2950 if (sd->satadev_addr.qual == SATA_ADDR_DCPORT && 2951 ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) 2952 AHCI_ADDR_SET_PMULT(&addr, port); 2953 2954 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED | 2955 ahci_portp->ahciport_port_state & SATA_PSTATE_SHUTDOWN | 2956 ahci_portp->ahciport_port_state & SATA_PSTATE_PWROFF) { 2957 /* 2958 * In case the targer driver would send the request 2959 * before sata framework can have the opportunity to 2960 * process those event reports. 2961 */ 2962 sd->satadev_state = ahci_portp->ahciport_port_state; 2963 ahci_update_sata_registers(ahci_ctlp, port, sd); 2964 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2965 "ahci_tran_reset_dport returning SATA_FAILURE " 2966 "while port in FAILED/SHUTDOWN/PWROFF state: " 2967 "port: %d", port); 2968 mutex_exit(&ahci_portp->ahciport_mutex); 2969 ret = SATA_FAILURE; 2970 break; 2971 } 2972 2973 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) == 2974 SATA_DTYPE_NONE) { 2975 /* 2976 * ahci_intr_phyrdy_change() may have rendered it to 2977 * AHCI_PORT_TYPE_NODEV. 2978 */ 2979 sd->satadev_type = SATA_DTYPE_NONE; 2980 sd->satadev_state = AHCIPORT_GET_STATE(ahci_portp, 2981 &addr); 2982 ahci_update_sata_registers(ahci_ctlp, port, sd); 2983 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2984 "ahci_tran_reset_dport returning SATA_FAILURE " 2985 "while no device attached: port: %d", port); 2986 mutex_exit(&ahci_portp->ahciport_mutex); 2987 ret = SATA_FAILURE; 2988 break; 2989 } 2990 2991 if (AHCI_ADDR_IS_PORT(&addr)) { 2992 ret = ahci_reset_device_reject_pkts(ahci_ctlp, 2993 ahci_portp, &addr); 2994 } else { 2995 ret = ahci_reset_pmdevice_reject_pkts(ahci_ctlp, 2996 ahci_portp, &addr); 2997 } 2998 2999 mutex_exit(&ahci_portp->ahciport_mutex); 3000 break; 3001 3002 case SATA_ADDR_CNTRL: 3003 /* Reset the whole controller */ 3004 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 3005 "reset the whole hba", instance); 3006 ret = ahci_reset_hba_reject_pkts(ahci_ctlp); 3007 break; 3008 3009 default: 3010 ret = SATA_FAILURE; 3011 } 3012 3013 return (ret); 3014 } 3015 3016 /* 3017 * Called by sata framework to activate a port as part of hotplug. 3018 * (cfgadm -c connect satax/y) 3019 * Support port multiplier. 3020 */ 3021 static int 3022 ahci_tran_hotplug_port_activate(dev_info_t *dip, sata_device_t *satadev) 3023 { 3024 ahci_ctl_t *ahci_ctlp; 3025 ahci_port_t *ahci_portp; 3026 ahci_addr_t addr; 3027 uint8_t cport = satadev->satadev_addr.cport; 3028 uint8_t pmport = satadev->satadev_addr.pmport; 3029 uint8_t port; 3030 int instance = ddi_get_instance(dip); 3031 3032 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 3033 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 3034 3035 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 3036 "ahci_tran_hotplug_port_activate enter: cport %d", cport); 3037 3038 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3039 3040 mutex_enter(&ahci_portp->ahciport_mutex); 3041 ahci_get_ahci_addr(ahci_ctlp, satadev, &addr); 3042 ASSERT(AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)); 3043 3044 if (AHCI_ADDR_IS_PORT(&addr)) { 3045 cmn_err(CE_NOTE, "!ahci%d: ahci port %d is activated", 3046 instance, port); 3047 3048 /* Enable the interrupts on the port */ 3049 ahci_enable_port_intrs(ahci_ctlp, port); 3050 3051 /* 3052 * Reset the port so that the PHY communication would be 3053 * re-established. But this reset is an internal operation 3054 * and the sata module doesn't need to know about it. 3055 * Moreover, the port with a device attached will be started 3056 * too. 3057 */ 3058 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, 3059 ahci_portp, port, 3060 AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, 3061 NULL); 3062 3063 /* 3064 * Need to check the link status and device status of the port 3065 * and consider raising power if the port was in D3 state 3066 */ 3067 ahci_portp->ahciport_port_state |= SATA_PSTATE_PWRON; 3068 ahci_portp->ahciport_port_state &= ~SATA_PSTATE_PWROFF; 3069 ahci_portp->ahciport_port_state &= ~SATA_PSTATE_SHUTDOWN; 3070 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 3071 cmn_err(CE_NOTE, "!ahci%d: ahci port %d:%d is activated", 3072 instance, port, pmport); 3073 /* AHCI_ADDR_PMPORT */ 3074 AHCIPORT_PMSTATE(ahci_portp, &addr) |= SATA_PSTATE_PWRON; 3075 AHCIPORT_PMSTATE(ahci_portp, &addr) &= 3076 ~(SATA_PSTATE_PWROFF|SATA_PSTATE_SHUTDOWN); 3077 } 3078 3079 satadev->satadev_state = ahci_portp->ahciport_port_state; 3080 3081 ahci_update_sata_registers(ahci_ctlp, port, satadev); 3082 3083 mutex_exit(&ahci_portp->ahciport_mutex); 3084 return (SATA_SUCCESS); 3085 } 3086 3087 /* 3088 * Called by sata framework to deactivate a port as part of hotplug. 3089 * (cfgadm -c disconnect satax/y) 3090 * Support port multiplier. 3091 */ 3092 static int 3093 ahci_tran_hotplug_port_deactivate(dev_info_t *dip, sata_device_t *satadev) 3094 { 3095 ahci_ctl_t *ahci_ctlp; 3096 ahci_port_t *ahci_portp; 3097 ahci_addr_t addr; 3098 uint8_t cport = satadev->satadev_addr.cport; 3099 uint8_t pmport = satadev->satadev_addr.pmport; 3100 uint8_t port; 3101 uint32_t port_scontrol; 3102 int instance = ddi_get_instance(dip); 3103 3104 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 3105 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 3106 3107 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 3108 "ahci_tran_hotplug_port_deactivate enter: cport %d", cport); 3109 3110 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3111 mutex_enter(&ahci_portp->ahciport_mutex); 3112 ahci_get_ahci_addr(ahci_ctlp, satadev, &addr); 3113 ASSERT(AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)); 3114 3115 if (AHCI_ADDR_IS_PORT(&addr)) { 3116 cmn_err(CE_NOTE, "!ahci%d: ahci port %d is deactivated", 3117 instance, port); 3118 3119 /* Disable the interrupts on the port */ 3120 ahci_disable_port_intrs(ahci_ctlp, port); 3121 3122 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) { 3123 3124 /* First to abort all the pending commands */ 3125 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 3126 3127 /* Then stop the port */ 3128 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3129 ahci_portp, port); 3130 } 3131 3132 /* Next put the PHY offline */ 3133 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3134 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 3135 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_DISABLE); 3136 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, (uint32_t *) 3137 AHCI_PORT_PxSCTL(ahci_ctlp, port), port_scontrol); 3138 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 3139 cmn_err(CE_NOTE, "!ahci%d: ahci port %d:%d is deactivated", 3140 instance, port, pmport); 3141 3142 ahci_disable_port_intrs(ahci_ctlp, port); 3143 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) 3144 != SATA_DTYPE_NONE) 3145 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 3146 3147 /* Re-enable the interrupts for the other pmports */ 3148 ahci_enable_port_intrs(ahci_ctlp, port); 3149 } 3150 3151 /* Update port state */ 3152 AHCIPORT_SET_STATE(ahci_portp, &addr, SATA_PSTATE_SHUTDOWN); 3153 satadev->satadev_state = SATA_PSTATE_SHUTDOWN; 3154 3155 ahci_update_sata_registers(ahci_ctlp, port, satadev); 3156 3157 mutex_exit(&ahci_portp->ahciport_mutex); 3158 return (SATA_SUCCESS); 3159 } 3160 3161 /* 3162 * To be used to mark all the outstanding pkts with SATA_PKT_ABORTED 3163 * when a device is unplugged or a port is deactivated. 3164 * 3165 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3166 */ 3167 static void 3168 ahci_reject_all_abort_pkts(ahci_ctl_t *ahci_ctlp, 3169 ahci_port_t *ahci_portp, uint8_t port) 3170 { 3171 uint32_t slot_status = 0; 3172 uint32_t abort_tags = 0; 3173 3174 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 3175 "ahci_reject_all_abort_pkts at port: %d", port); 3176 3177 /* Read/write port multiplier command takes highest priority */ 3178 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 3179 slot_status = 0x1; 3180 abort_tags = 0x1; 3181 goto out; 3182 } 3183 3184 /* 3185 * When AHCI_PORT_FLAG_MOPPING is set, we need to check whether a 3186 * REQUEST SENSE command or READ LOG EXT command is delivered to HBA 3187 * to get the error data, if yes when the device is removed, the 3188 * command needs to be aborted too. 3189 */ 3190 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 3191 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 3192 slot_status = 0x1; 3193 abort_tags = 0x1; 3194 goto out; 3195 } else { 3196 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3197 "ahci_reject_all_abort_pkts return directly " 3198 "port %d no needs to reject any outstanding " 3199 "commands", port); 3200 return; 3201 } 3202 } 3203 3204 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 3205 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3206 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 3207 abort_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 3208 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 3209 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3210 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 3211 abort_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 3212 } 3213 3214 out: 3215 /* No need to do mop when there is no outstanding commands */ 3216 if (slot_status != 0) { 3217 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 3218 ahci_portp->ahciport_mop_in_progress++; 3219 3220 ahci_mop_commands(ahci_ctlp, 3221 ahci_portp, 3222 slot_status, 3223 0, /* failed tags */ 3224 0, /* timeout tags */ 3225 abort_tags, /* aborting tags */ 3226 0); /* reset tags */ 3227 } 3228 } 3229 3230 #if defined(__lock_lint) 3231 static int 3232 ahci_selftest(dev_info_t *dip, sata_device_t *device) 3233 { 3234 return (SATA_SUCCESS); 3235 } 3236 #endif 3237 3238 /* 3239 * Allocate the ports structure, only called by ahci_attach 3240 */ 3241 static int 3242 ahci_alloc_ports_state(ahci_ctl_t *ahci_ctlp) 3243 { 3244 int port, cport = 0; 3245 3246 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3247 "ahci_alloc_ports_state enter", NULL); 3248 3249 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3250 3251 /* Allocate structures only for the implemented ports */ 3252 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3253 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3254 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3255 "hba port %d not implemented", port); 3256 continue; 3257 } 3258 3259 ahci_ctlp->ahcictl_cport_to_port[cport] = (uint8_t)port; 3260 ahci_ctlp->ahcictl_port_to_cport[port] = 3261 (uint8_t)cport++; 3262 3263 if (ahci_alloc_port_state(ahci_ctlp, port) != AHCI_SUCCESS) { 3264 goto err_out; 3265 } 3266 } 3267 3268 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3269 return (AHCI_SUCCESS); 3270 3271 err_out: 3272 for (port--; port >= 0; port--) { 3273 if (AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3274 ahci_dealloc_port_state(ahci_ctlp, port); 3275 } 3276 } 3277 3278 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3279 return (AHCI_FAILURE); 3280 } 3281 3282 /* 3283 * Reverse of ahci_alloc_ports_state(), only called by ahci_detach 3284 */ 3285 static void 3286 ahci_dealloc_ports_state(ahci_ctl_t *ahci_ctlp) 3287 { 3288 int port; 3289 3290 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3291 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3292 /* if this port is implemented by the HBA */ 3293 if (AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) 3294 ahci_dealloc_port_state(ahci_ctlp, port); 3295 } 3296 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3297 } 3298 3299 /* 3300 * Drain the taskq. 3301 */ 3302 static void 3303 ahci_drain_ports_taskq(ahci_ctl_t *ahci_ctlp) 3304 { 3305 ahci_port_t *ahci_portp; 3306 int port; 3307 3308 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3309 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3310 continue; 3311 } 3312 3313 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3314 3315 mutex_enter(&ahci_portp->ahciport_mutex); 3316 ddi_taskq_wait(ahci_portp->ahciport_event_taskq); 3317 mutex_exit(&ahci_portp->ahciport_mutex); 3318 } 3319 } 3320 3321 /* 3322 * Initialize the controller and all ports. And then try to start the ports 3323 * if there are devices attached. 3324 * 3325 * This routine can be called from three seperate cases: DDI_ATTACH, 3326 * PM_LEVEL_D0 and DDI_RESUME. The DDI_ATTACH case is different from 3327 * other two cases; device signature probing are attempted only during 3328 * DDI_ATTACH case. 3329 * 3330 * WARNING!!! Disable the whole controller's interrupts before calling and 3331 * the interrupts will be enabled upon successfully return. 3332 */ 3333 static int 3334 ahci_initialize_controller(ahci_ctl_t *ahci_ctlp) 3335 { 3336 ahci_port_t *ahci_portp; 3337 ahci_addr_t addr; 3338 uint32_t ghc_control; 3339 int port; 3340 3341 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3342 "ahci_initialize_controller enter", NULL); 3343 3344 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3345 3346 /* 3347 * Indicate that system software is AHCI aware by setting 3348 * GHC.AE to 1 3349 */ 3350 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3351 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 3352 3353 ghc_control |= AHCI_HBA_GHC_AE; 3354 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3355 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), 3356 ghc_control); 3357 3358 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3359 3360 /* Initialize the implemented ports and structures */ 3361 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3362 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3363 continue; 3364 } 3365 3366 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3367 mutex_enter(&ahci_portp->ahciport_mutex); 3368 3369 /* 3370 * Ensure that the controller is not in the running state 3371 * by checking every implemented port's PxCMD register 3372 */ 3373 AHCI_ADDR_SET_PORT(&addr, (uint8_t)port); 3374 3375 if (ahci_initialize_port(ahci_ctlp, ahci_portp, &addr) 3376 != AHCI_SUCCESS) { 3377 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3378 "ahci_initialize_controller: failed to " 3379 "initialize port %d", port); 3380 /* 3381 * Set the port state to SATA_PSTATE_FAILED if 3382 * failed to initialize it. 3383 */ 3384 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 3385 } 3386 3387 mutex_exit(&ahci_portp->ahciport_mutex); 3388 } 3389 3390 /* Enable the whole controller interrupts */ 3391 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3392 ahci_enable_all_intrs(ahci_ctlp); 3393 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3394 3395 return (AHCI_SUCCESS); 3396 } 3397 3398 /* 3399 * Reverse of ahci_initialize_controller() 3400 * 3401 * We only need to stop the ports and disable the interrupt. 3402 */ 3403 static void 3404 ahci_uninitialize_controller(ahci_ctl_t *ahci_ctlp) 3405 { 3406 ahci_port_t *ahci_portp; 3407 int port; 3408 3409 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3410 "ahci_uninitialize_controller enter", NULL); 3411 3412 /* disable all the interrupts. */ 3413 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3414 ahci_disable_all_intrs(ahci_ctlp); 3415 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3416 3417 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3418 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3419 continue; 3420 } 3421 3422 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3423 3424 /* Stop the port by clearing PxCMD.ST */ 3425 mutex_enter(&ahci_portp->ahciport_mutex); 3426 3427 /* 3428 * Here we must disable the port interrupt because 3429 * ahci_disable_all_intrs only clear GHC.IE, and IS 3430 * register will be still set if PxIE is enabled. 3431 * When ahci shares one IRQ with other drivers, the 3432 * intr handler may claim the intr mistakenly. 3433 */ 3434 ahci_disable_port_intrs(ahci_ctlp, port); 3435 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3436 ahci_portp, port); 3437 mutex_exit(&ahci_portp->ahciport_mutex); 3438 } 3439 } 3440 3441 /* 3442 * ahci_alloc_pmult() 3443 * 1. Setting HBA port registers which are necessary for a port multiplier. 3444 * (Set PxCMD.PMA while PxCMD.ST is '0') 3445 * 2. Allocate ahci_pmult_info structure. 3446 * 3447 * NOTE: Must stop port before the function is called. 3448 * WARNING!!! ahciport_mutex should be acquired before the function is 3449 * called. 3450 */ 3451 static void 3452 ahci_alloc_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 3453 { 3454 uint32_t port_cmd_status; 3455 uint8_t port = ahci_portp->ahciport_port_num; 3456 3457 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3458 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3459 3460 /* The port must have been stopped before. */ 3461 ASSERT(!(port_cmd_status & AHCI_CMD_STATUS_ST)); 3462 3463 if (!(port_cmd_status & AHCI_CMD_STATUS_PMA)) { 3464 /* set PMA bit */ 3465 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3466 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 3467 port_cmd_status|AHCI_CMD_STATUS_PMA); 3468 3469 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 3470 "ahci_alloc_pmult: " 3471 "PxCMD.PMA bit set at port %d.", port); 3472 } 3473 3474 /* Allocate port multiplier information structure */ 3475 if (ahci_portp->ahciport_pmult_info == NULL) { 3476 ahci_portp->ahciport_pmult_info = (ahci_pmult_info_t *) 3477 kmem_zalloc(sizeof (ahci_pmult_info_t), KM_SLEEP); 3478 } 3479 3480 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 3481 } 3482 3483 /* 3484 * ahci_dealloc_pmult() 3485 * 1. Clearing related registers when a port multiplier is detached. 3486 * (Clear PxCMD.PMA while PxCMD.ST is '0') 3487 * 2. Deallocate ahci_pmult_info structure. 3488 * 3489 * NOTE: Must stop port before the function is called. 3490 * WARNING!!! ahciport_mutex should be acquired before the function is 3491 * called. 3492 */ 3493 static void 3494 ahci_dealloc_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 3495 { 3496 uint32_t port_cmd_status; 3497 uint8_t port = ahci_portp->ahciport_port_num; 3498 3499 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3500 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3501 3502 if (port_cmd_status & AHCI_CMD_STATUS_PMA) { 3503 /* Clear PMA bit */ 3504 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3505 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 3506 (port_cmd_status & (~AHCI_CMD_STATUS_PMA))); 3507 3508 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 3509 "ahci_dealloc_pmult: " 3510 "PxCMD.PMA bit cleared at port %d.", port); 3511 } 3512 3513 /* Release port multiplier information structure */ 3514 if (ahci_portp->ahciport_pmult_info != NULL) { 3515 kmem_free(ahci_portp->ahciport_pmult_info, 3516 sizeof (ahci_pmult_info_t)); 3517 ahci_portp->ahciport_pmult_info = NULL; 3518 } 3519 } 3520 3521 /* 3522 * The routine is to initialize a port. First put the port in NOTRunning 3523 * state, then enable port interrupt and clear Serror register. And under 3524 * AHCI_ATTACH case, find device signature and then try to start the port. 3525 * 3526 * Called by 3527 * 1. ahci_initialize_controller 3528 * 2. ahci_intr_phyrdy_change (hotplug) 3529 * 3530 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3531 */ 3532 static int 3533 ahci_initialize_port(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 3534 ahci_addr_t *addrp) 3535 { 3536 uint32_t port_sstatus, port_task_file, port_cmd_status; 3537 uint8_t port = addrp->aa_port; 3538 boolean_t pm_mode = B_TRUE; /* Power Management mode */ 3539 int ret; 3540 3541 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 3542 3543 /* AHCI_ADDR_PORT: We've no idea of the attached device here. */ 3544 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 3545 3546 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3547 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3548 3549 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3550 "ahci_initialize_port: port %d ", port); 3551 3552 /* 3553 * Check whether the port is in NotRunning state, if not, 3554 * put the port in NotRunning state 3555 */ 3556 if (port_cmd_status & 3557 (AHCI_CMD_STATUS_ST | 3558 AHCI_CMD_STATUS_CR | 3559 AHCI_CMD_STATUS_FRE | 3560 AHCI_CMD_STATUS_FR)) { 3561 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3562 ahci_portp, port); 3563 } 3564 3565 /* Disable interrupt */ 3566 ahci_disable_port_intrs(ahci_ctlp, port); 3567 3568 /* Device is unknown at first */ 3569 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 3570 3571 /* Disable the interface power management */ 3572 ahci_disable_interface_pm(ahci_ctlp, port); 3573 3574 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3575 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 3576 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3577 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 3578 3579 /* Check physcial link status */ 3580 if (SSTATUS_GET_IPM(port_sstatus) == SSTATUS_IPM_NODEV_NOPHYCOM || 3581 SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_NOPHYCOM || 3582 3583 /* Check interface status */ 3584 port_task_file & AHCI_TFD_STS_BSY || 3585 port_task_file & AHCI_TFD_STS_DRQ || 3586 3587 /* Check whether port reset must be executed */ 3588 ahci_ctlp->ahcictl_cap & AHCI_CAP_INIT_PORT_RESET) { 3589 3590 /* Something went wrong, we need do some reset things */ 3591 ret = ahci_port_reset(ahci_ctlp, ahci_portp, addrp); 3592 3593 /* Does port reset succeed on HBA port? */ 3594 if (ret != AHCI_SUCCESS) { 3595 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 3596 "ahci_initialize_port:" 3597 "port reset faild at port %d", port); 3598 return (AHCI_FAILURE); 3599 } 3600 3601 /* Is port failed? */ 3602 if (AHCIPORT_GET_STATE(ahci_portp, addrp) & 3603 SATA_PSTATE_FAILED) { 3604 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 3605 "ahci_initialize_port: port %d state 0x%x", 3606 port, ahci_portp->ahciport_port_state); 3607 return (AHCI_FAILURE); 3608 } 3609 } 3610 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_READY); 3611 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "port %d is ready now.", port); 3612 3613 /* 3614 * At the time being, only probe ports/devices and get the types of 3615 * attached devices during DDI_ATTACH. In fact, the device can be 3616 * changed during power state changes, but at the time being, we 3617 * don't support the situation. 3618 */ 3619 mutex_exit(&ahci_portp->ahciport_mutex); 3620 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3621 if (ahci_ctlp->ahcictl_flags & AHCI_ATTACH) 3622 pm_mode = B_FALSE; 3623 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3624 mutex_enter(&ahci_portp->ahciport_mutex); 3625 3626 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) 3627 pm_mode = B_FALSE; 3628 3629 if (!pm_mode) { 3630 /* 3631 * Try to get the device signature if the port is 3632 * not empty. 3633 */ 3634 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) 3635 ahci_find_dev_signature(ahci_ctlp, ahci_portp, addrp); 3636 } else { 3637 3638 /* 3639 * During the resume, we need to set the PxCLB, PxCLBU, PxFB 3640 * and PxFBU registers in case these registers were cleared 3641 * during the suspend. 3642 */ 3643 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3644 "ahci_initialize_port: port %d " 3645 "reset the port during resume", port); 3646 (void) ahci_port_reset(ahci_ctlp, ahci_portp, addrp); 3647 3648 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3649 "ahci_initialize_port: port %d " 3650 "set PxCLB, PxCLBU, PxFB and PxFBU " 3651 "during resume", port); 3652 3653 /* Config Port Received FIS Base Address */ 3654 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 3655 (uint64_t *)AHCI_PORT_PxFB(ahci_ctlp, port), 3656 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_laddress); 3657 3658 /* Config Port Command List Base Address */ 3659 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 3660 (uint64_t *)AHCI_PORT_PxCLB(ahci_ctlp, port), 3661 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_laddress); 3662 } 3663 3664 /* Return directly if no device connected */ 3665 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 3666 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3667 "No device connected to port %d", port); 3668 goto out; 3669 } 3670 3671 /* If this is a port multiplier, we need do some initialization */ 3672 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 3673 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 3674 "Port multiplier found at port %d", port); 3675 ahci_alloc_pmult(ahci_ctlp, ahci_portp); 3676 } 3677 3678 /* Try to start the port */ 3679 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 3680 != AHCI_SUCCESS) { 3681 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3682 "failed to start port %d", port); 3683 return (AHCI_FAILURE); 3684 } 3685 out: 3686 /* Enable port interrupts */ 3687 ahci_enable_port_intrs(ahci_ctlp, port); 3688 3689 return (AHCI_SUCCESS); 3690 } 3691 3692 /* 3693 * Handle hardware defect, and check the capabilities. For example, 3694 * power management capabilty and MSI capability. 3695 */ 3696 static int 3697 ahci_config_space_init(ahci_ctl_t *ahci_ctlp) 3698 { 3699 ushort_t venid, devid; 3700 ushort_t caps_ptr, cap_count, cap; 3701 #if AHCI_DEBUG 3702 ushort_t pmcap, pmcsr; 3703 ushort_t msimc; 3704 #endif 3705 uint8_t revision; 3706 3707 venid = pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 3708 PCI_CONF_VENID); 3709 3710 devid = pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 3711 PCI_CONF_DEVID); 3712 3713 /* 3714 * Modify dma_attr_align of ahcictl_buffer_dma_attr. For VT8251, those 3715 * controllers with 0x00 revision id work on 4-byte aligned buffer, 3716 * which is a bug and was fixed after 0x00 revision id controllers. 3717 * 3718 * Moreover, VT8251 cannot use multiple command slots in the command 3719 * list for non-queued commands because the previous register content 3720 * of PxCI can be re-written in the register write, so a flag will be 3721 * set to record this defect - AHCI_CAP_NO_MCMDLIST_NONQUEUE. 3722 */ 3723 if (venid == VIA_VENID) { 3724 revision = pci_config_get8(ahci_ctlp->ahcictl_pci_conf_handle, 3725 PCI_CONF_REVID); 3726 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3727 "revision id = 0x%x", revision); 3728 if (revision == 0x00) { 3729 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_align = 0x4; 3730 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3731 "change ddi_attr_align to 0x4", NULL); 3732 } 3733 3734 ahci_ctlp->ahcictl_cap = AHCI_CAP_NO_MCMDLIST_NONQUEUE; 3735 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3736 "VT8251 cannot use multiple command lists for " 3737 "non-queued commands", NULL); 3738 } 3739 3740 /* 3741 * AMD/ATI SB600 (0x1002,0x4380) AHCI chipset doesn't support 64-bit 3742 * DMA addressing for communication memory descriptors though S64A bit 3743 * of CAP register declares it supports. However, it does support 3744 * 64-bit DMA for data buffer. So only AHCI_CAP_COMMU_32BIT_DMA is 3745 * set for this controller. 3746 * 3747 * Please note that AHCI_CAP_BUF_32BIT_DMA was ever set because we 3748 * found 64-bit DMA cannot work on ASUS M2A-VM with old BIOS version. 3749 * However, the issue can be resolved by upgrade of 1501+ BIOS, so 3750 * we decided to remove the flag. 3751 * 3752 * Due to certain hardware issue, the chipset must do port reset during 3753 * initialization, otherwise, when retrieving device signature, 3754 * software reset will get time out. So AHCI_CAP_INIT_PORT_RESET flag 3755 * need to set. 3756 * 3757 * For this chipset software reset will get failure if the pmport of 3758 * Register FIS was set with SATA_PMULT_HOSTPORT (0xf) and no port 3759 * multiplier is connected to the port. In order to fix the issue, 3760 * AHCI_CAP_SRST_NO_HOSTPORT flag need to be set, and once software 3761 * reset got failure, the driver will try to do another software reset 3762 * with pmport 0. 3763 */ 3764 if (venid == 0x1002 && devid == 0x4380) { 3765 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 3766 ahci_ctlp->ahcictl_cap |= AHCI_CAP_INIT_PORT_RESET; 3767 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT; 3768 3769 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3770 "ATI SB600 cannot do 64-bit DMA for communication " 3771 "memory descriptors though CAP indicates support, " 3772 "so force it to use 32-bit DMA", NULL); 3773 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3774 "ATI SB600 need to do a port reset during initialization", 3775 NULL); 3776 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3777 "ATI SB600 will get software reset failure if pmport " 3778 "is set 0xf and no port multiplier is attached", NULL); 3779 } 3780 3781 /* 3782 * AMD/ATI SB700/710/750/800 and SP5100 AHCI chipset share the same 3783 * vendor ID and device ID (0x1002,0x4391). 3784 * 3785 * SB700/750 AHCI chipset on some boards doesn't support 64-bit 3786 * DMA addressing for communication memory descriptors though S64A bit 3787 * of CAP register declares the support. However, it does support 3788 * 64-bit DMA for data buffer. So only AHCI_CAP_COMMU_32BIT_DMA is 3789 * set for this controller. 3790 * 3791 * SB710 has the same initialization issue as SB600, so it also need 3792 * a port reset. That is AHCI_CAP_INIT_PORT_RESET need to set for it. 3793 * 3794 * SB700 also has the same issue about software reset, and thus 3795 * AHCI_CAP_SRST_NO_HOSTPORT flag also is needed. 3796 */ 3797 if (venid == 0x1002 && devid == 0x4391) { 3798 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 3799 ahci_ctlp->ahcictl_cap |= AHCI_CAP_INIT_PORT_RESET; 3800 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT; 3801 3802 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3803 "ATI SB700/750 cannot do 64-bit DMA for communication " 3804 "memory descriptors though CAP indicates support, " 3805 "so force it to use 32-bit DMA", NULL); 3806 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3807 "ATI SB710 need to do a port reset during initialization", 3808 NULL); 3809 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3810 "ATI SB700 will get software reset failure if pmport " 3811 "is set 0xf and no port multiplier is attached", NULL); 3812 } 3813 3814 /* 3815 * Check if capabilities list is supported and if so, 3816 * get initial capabilities pointer and clear bits 0,1. 3817 */ 3818 if (pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 3819 PCI_CONF_STAT) & PCI_STAT_CAP) { 3820 caps_ptr = P2ALIGN(pci_config_get8( 3821 ahci_ctlp->ahcictl_pci_conf_handle, 3822 PCI_CONF_CAP_PTR), 4); 3823 } else { 3824 caps_ptr = PCI_CAP_NEXT_PTR_NULL; 3825 } 3826 3827 /* 3828 * Walk capabilities if supported. 3829 */ 3830 for (cap_count = 0; caps_ptr != PCI_CAP_NEXT_PTR_NULL; ) { 3831 3832 /* 3833 * Check that we haven't exceeded the maximum number of 3834 * capabilities and that the pointer is in a valid range. 3835 */ 3836 if (++cap_count > PCI_CAP_MAX_PTR) { 3837 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3838 "too many device capabilities", NULL); 3839 return (AHCI_FAILURE); 3840 } 3841 if (caps_ptr < PCI_CAP_PTR_OFF) { 3842 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3843 "capabilities pointer 0x%x out of range", 3844 caps_ptr); 3845 return (AHCI_FAILURE); 3846 } 3847 3848 /* 3849 * Get next capability and check that it is valid. 3850 * For now, we only support power management. 3851 */ 3852 cap = pci_config_get8(ahci_ctlp->ahcictl_pci_conf_handle, 3853 caps_ptr); 3854 switch (cap) { 3855 case PCI_CAP_ID_PM: 3856 3857 /* power management supported */ 3858 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PM; 3859 3860 /* Save PMCSR offset */ 3861 ahci_ctlp->ahcictl_pmcsr_offset = caps_ptr + PCI_PMCSR; 3862 3863 #if AHCI_DEBUG 3864 pmcap = pci_config_get16( 3865 ahci_ctlp->ahcictl_pci_conf_handle, 3866 caps_ptr + PCI_PMCAP); 3867 pmcsr = pci_config_get16( 3868 ahci_ctlp->ahcictl_pci_conf_handle, 3869 ahci_ctlp->ahcictl_pmcsr_offset); 3870 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3871 "Power Management capability found PCI_PMCAP " 3872 "= 0x%x PCI_PMCSR = 0x%x", pmcap, pmcsr); 3873 if ((pmcap & 0x3) == 0x3) 3874 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3875 "PCI Power Management Interface " 3876 "spec 1.2 compliant", NULL); 3877 #endif 3878 break; 3879 3880 case PCI_CAP_ID_MSI: 3881 #if AHCI_DEBUG 3882 msimc = pci_config_get16( 3883 ahci_ctlp->ahcictl_pci_conf_handle, 3884 caps_ptr + PCI_MSI_CTRL); 3885 AHCIDBG(AHCIDBG_MSI, ahci_ctlp, 3886 "Message Signaled Interrupt capability found " 3887 "MSICAP_MC.MMC = 0x%x", (msimc & 0xe) >> 1); 3888 #endif 3889 AHCIDBG(AHCIDBG_MSI, ahci_ctlp, 3890 "MSI capability found", NULL); 3891 break; 3892 3893 case PCI_CAP_ID_PCIX: 3894 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3895 "PCI-X capability found", NULL); 3896 break; 3897 3898 case PCI_CAP_ID_PCI_E: 3899 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3900 "PCI Express capability found", NULL); 3901 break; 3902 3903 case PCI_CAP_ID_MSI_X: 3904 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3905 "MSI-X capability found", NULL); 3906 break; 3907 3908 case PCI_CAP_ID_SATA: 3909 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3910 "SATA capability found", NULL); 3911 break; 3912 3913 case PCI_CAP_ID_VS: 3914 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3915 "Vendor Specific capability found", NULL); 3916 break; 3917 3918 default: 3919 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3920 "unrecognized capability 0x%x", cap); 3921 break; 3922 } 3923 3924 /* 3925 * Get next capabilities pointer and clear bits 0,1. 3926 */ 3927 caps_ptr = P2ALIGN(pci_config_get8( 3928 ahci_ctlp->ahcictl_pci_conf_handle, 3929 (caps_ptr + PCI_CAP_NEXT_PTR)), 4); 3930 } 3931 3932 return (AHCI_SUCCESS); 3933 } 3934 3935 /* 3936 * Read/Write a register at port multiplier by SATA READ PORTMULT / SATA WRITE 3937 * PORTMULT command. SYNC & POLLING mode is used. 3938 * 3939 * WARNING!!! ahciport_mutex should be acquired before the function 3940 * is called. 3941 */ 3942 static int 3943 ahci_rdwr_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 3944 uint8_t regn, uint32_t *pregv, uint8_t type) 3945 { 3946 ahci_port_t *ahci_portp; 3947 ahci_addr_t pmult_addr; 3948 sata_pkt_t *spkt; 3949 sata_cmd_t *scmd; 3950 sata_device_t sata_device; 3951 uint8_t port = addrp->aa_port; 3952 uint8_t pmport = addrp->aa_pmport; 3953 uint8_t cport; 3954 uint32_t intr_mask; 3955 int rval; 3956 char portstr[10]; 3957 3958 SET_PORTSTR(portstr, addrp); 3959 cport = ahci_ctlp->ahcictl_port_to_cport[port]; 3960 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3961 3962 ASSERT(AHCI_ADDR_IS_PMPORT(addrp) || AHCI_ADDR_IS_PMULT(addrp)); 3963 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 3964 3965 /* Check the existence of the port multiplier */ 3966 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) 3967 return (AHCI_FAILURE); 3968 3969 /* Request a READ/WRITE PORTMULT sata packet. */ 3970 bzero(&sata_device, sizeof (sata_device_t)); 3971 sata_device.satadev_addr.cport = cport; 3972 sata_device.satadev_addr.pmport = pmport; 3973 sata_device.satadev_addr.qual = SATA_ADDR_PMULT; 3974 sata_device.satadev_rev = SATA_DEVICE_REV; 3975 3976 /* 3977 * Make sure no command is outstanding here. All R/W PMULT requests 3978 * come from 3979 * 3980 * 1. ahci_attach() 3981 * The port should be empty. 3982 * 3983 * 2. ahci_tran_probe_port() 3984 * Any request from SATA framework (via ahci_tran_start) should be 3985 * rejected if R/W PMULT command is outstanding. 3986 * 3987 * If we are doing mopping, do not check those flags because no 3988 * command will be actually outstanding. 3989 * 3990 * If the port has been occupied by any other commands, the probe 3991 * function will return a SATA_RETRY. SATA framework will retry 3992 * later. 3993 */ 3994 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 3995 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 3996 "R/W PMULT failed: R/W PMULT in progress at port %d.", 3997 port, ahci_portp->ahciport_flags); 3998 return (AHCI_FAILURE); 3999 } 4000 4001 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) && ( 4002 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 4003 NCQ_CMD_IN_PROGRESS(ahci_portp) || 4004 NON_NCQ_CMD_IN_PROGRESS(ahci_portp))) { 4005 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4006 "R/W PMULT failed: port %d is occupied (flags 0x%x).", 4007 port, ahci_portp->ahciport_flags); 4008 return (AHCI_FAILURE); 4009 } 4010 4011 /* 4012 * The port multiplier is gone. This may happen when 4013 * 1. Cutting off the power of an enclosure. The device lose the power 4014 * before port multiplier. 4015 * 2. Disconnecting the port multiplier during hot-plugging a sub-drive. 4016 * 4017 * The issued command should be aborted and the following command 4018 * should not be continued. 4019 */ 4020 if (!(ahci_portp->ahciport_port_state & SATA_STATE_READY)) { 4021 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4022 "READ/WRITE PMULT failed: " 4023 "port-mult is removed from port %d", port); 4024 return (AHCI_FAILURE); 4025 } 4026 4027 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RDWR_PMULT; 4028 4029 spkt = sata_get_rdwr_pmult_pkt(ahci_ctlp->ahcictl_dip, 4030 &sata_device, regn, *pregv, type); 4031 4032 /* 4033 * READ/WRITE PORTMULT command is intended to sent to the control port 4034 * of the port multiplier. 4035 */ 4036 AHCI_ADDR_SET_PMULT(&pmult_addr, addrp->aa_port); 4037 4038 ahci_portp->ahciport_rdwr_pmult_pkt = spkt; 4039 4040 /* No interrupt here. Store the interrupt enable mask. */ 4041 intr_mask = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4042 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port)); 4043 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4044 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 0); 4045 4046 rval = ahci_do_sync_start(ahci_ctlp, ahci_portp, &pmult_addr, spkt); 4047 4048 if (rval == AHCI_SUCCESS && 4049 spkt->satapkt_reason == SATA_PKT_COMPLETED) { 4050 if (type == SATA_RDWR_PMULT_PKT_TYPE_READ) { 4051 scmd = &spkt->satapkt_cmd; 4052 *pregv = scmd->satacmd_lba_high_lsb << 24 | 4053 scmd->satacmd_lba_mid_lsb << 16 | 4054 scmd->satacmd_lba_low_lsb << 8 | 4055 scmd->satacmd_sec_count_lsb; 4056 } 4057 } else { 4058 /* Failed or not completed. */ 4059 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4060 "ahci_rdwr_pmult: cannot [%s] %s[%d] at port %s", 4061 type == SATA_RDWR_PMULT_PKT_TYPE_READ?"Read":"Write", 4062 AHCI_ADDR_IS_PMULT(addrp)?"gscr":"pscr", regn, portstr); 4063 rval = AHCI_FAILURE; 4064 } 4065 out: 4066 /* Restore the interrupt mask */ 4067 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4068 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), intr_mask); 4069 4070 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_RDWR_PMULT; 4071 ahci_portp->ahciport_rdwr_pmult_pkt = NULL; 4072 sata_free_rdwr_pmult_pkt(spkt); 4073 return (rval); 4074 } 4075 4076 static int 4077 ahci_read_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4078 uint8_t regn, uint32_t *pregv) 4079 { 4080 return ahci_rdwr_pmult(ahci_ctlp, addrp, regn, pregv, 4081 SATA_RDWR_PMULT_PKT_TYPE_READ); 4082 } 4083 4084 static int 4085 ahci_write_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4086 uint8_t regn, uint32_t regv) 4087 { 4088 return ahci_rdwr_pmult(ahci_ctlp, addrp, regn, ®v, 4089 SATA_RDWR_PMULT_PKT_TYPE_WRITE); 4090 } 4091 4092 #define READ_PMULT(addrp, r, pv, out) \ 4093 if (ahci_read_pmult(ahci_ctlp, addrp, r, pv) != AHCI_SUCCESS) \ 4094 goto out; 4095 4096 #define WRITE_PMULT(addrp, r, v, out) \ 4097 if (ahci_write_pmult(ahci_ctlp, addrp, r, v) != AHCI_SUCCESS) \ 4098 goto out; 4099 4100 /* 4101 * Update sata registers on port multiplier, including GSCR/PSCR registers. 4102 * ahci_update_pmult_gscr() 4103 * ahci_update_pmult_pscr() 4104 * 4105 * WARNING!!! ahciport_mutex should be acquired before those functions 4106 * get called. 4107 */ 4108 static int 4109 ahci_update_pmult_gscr(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4110 sata_device_t *sd) 4111 { 4112 READ_PMULT(addrp, SATA_PMULT_GSCR0, &sd->satadev_gscr.gscr0, err); 4113 READ_PMULT(addrp, SATA_PMULT_GSCR1, &sd->satadev_gscr.gscr1, err); 4114 READ_PMULT(addrp, SATA_PMULT_GSCR2, &sd->satadev_gscr.gscr2, err); 4115 READ_PMULT(addrp, SATA_PMULT_GSCR64, &sd->satadev_gscr.gscr64, err); 4116 4117 return (AHCI_SUCCESS); 4118 4119 err: /* R/W PMULT error */ 4120 return (AHCI_FAILURE); 4121 } 4122 4123 static int 4124 ahci_update_pmult_pscr(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4125 sata_device_t *sd) 4126 { 4127 ASSERT(AHCI_ADDR_IS_PMPORT(addrp)); 4128 4129 READ_PMULT(addrp, SATA_PMULT_REG_SSTS, &sd->satadev_scr.sstatus, err); 4130 READ_PMULT(addrp, SATA_PMULT_REG_SERR, &sd->satadev_scr.serror, err); 4131 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &sd->satadev_scr.scontrol, err); 4132 READ_PMULT(addrp, SATA_PMULT_REG_SACT, &sd->satadev_scr.sactive, err); 4133 4134 return (AHCI_SUCCESS); 4135 4136 err: /* R/W PMULT error */ 4137 return (AHCI_FAILURE); 4138 } 4139 4140 /* 4141 * ahci_initialize_pmult() 4142 * 4143 * Initialize a port multiplier, including 4144 * 1. Enable FEATURES register at port multiplier. (SATA Chp.16) 4145 * 2. Redefine MASK register. (SATA Chap 16.?) 4146 * 4147 * WARNING!!! ahciport_mutex should be acquired before the function 4148 * is called. 4149 */ 4150 static int 4151 ahci_initialize_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4152 ahci_addr_t *addrp, sata_device_t *sd) 4153 { 4154 uint32_t gscr64; 4155 uint8_t port = addrp->aa_port; 4156 4157 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 4158 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4159 "[Initialize] Port-multiplier at port %d.", port); 4160 4161 /* 4162 * Enable features of port multiplier. Currently only 4163 * Asynchronous Notification is enabled. 4164 */ 4165 /* Check gscr64 for supported features. */ 4166 READ_PMULT(addrp, SATA_PMULT_GSCR64, &gscr64, err); 4167 4168 if (gscr64 & SATA_PMULT_CAP_SNOTIF) { 4169 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4170 "port %d: Port Multiplier supports " 4171 "Asynchronous Notification.", port); 4172 4173 /* Write to gscr96 to enabled features */ 4174 WRITE_PMULT(addrp, SATA_PMULT_GSCR96, 4175 SATA_PMULT_CAP_SNOTIF, err); 4176 4177 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4178 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 4179 AHCI_SNOTIF_CLEAR_ALL); 4180 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4181 "port %d: PMult PxSNTF cleared.", port); 4182 4183 } 4184 4185 /* 4186 * Now we need to update gscr33 register to enable hot-plug interrupt 4187 * for sub devices behind port multiplier. 4188 */ 4189 WRITE_PMULT(addrp, SATA_PMULT_GSCR33, (0x1ffff), err); 4190 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4191 "port %d: gscr33 mask set to %x.", port, (0x1ffff)); 4192 4193 /* 4194 * Fetch the number of device ports of the port multiplier 4195 */ 4196 if (ahci_update_pmult_gscr(ahci_ctlp, addrp, sd) != AHCI_SUCCESS) 4197 return (AHCI_FAILURE); 4198 4199 /* If it's not in the blacklist, use the value in GSCR2 */ 4200 if (sata_check_pmult_blacklist(sd) == SATA_FAILURE) 4201 sd->satadev_add_info = sd->satadev_gscr.gscr2 & 4202 SATA_PMULT_PORTNUM_MASK; 4203 4204 ahci_portp->ahciport_pmult_info->ahcipmi_num_dev_ports = 4205 sd->satadev_add_info; 4206 4207 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4208 "port %d: pmult sub-port number updated to %x.", port, 4209 ahci_portp->ahciport_pmult_info->ahcipmi_num_dev_ports); 4210 4211 /* Till now port-mult is successfully initialized */ 4212 ahci_portp->ahciport_port_state |= SATA_DSTATE_PMULT_INIT; 4213 return (AHCI_SUCCESS); 4214 4215 err: /* R/W PMULT error */ 4216 return (AHCI_FAILURE); 4217 } 4218 4219 /* 4220 * Initialize a port multiplier port. According to spec, firstly we need 4221 * issue a COMRESET, then a software reset to get its signature. 4222 * 4223 * NOTE: This function should only be called in ahci_probe_pmport() 4224 * WARNING!!! ahciport_mutex should be acquired before the function. 4225 */ 4226 static int 4227 ahci_initialize_pmport(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4228 ahci_addr_t *addrp) 4229 { 4230 uint32_t finished_tags = 0, reset_tags = 0, slot_status = 0; 4231 uint8_t port = addrp->aa_port; 4232 uint8_t pmport = addrp->aa_pmport; 4233 int ret = AHCI_FAILURE; 4234 4235 ASSERT(AHCI_ADDR_IS_PMPORT(addrp)); 4236 4237 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 4238 "ahci_initialize_pmport: port %d:%d", port, pmport); 4239 4240 /* Check HBA port state */ 4241 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED) { 4242 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 4243 "ahci_initialize_pmport:" 4244 "port %d:%d Port Multiplier is failed.", 4245 port, pmport); 4246 return (AHCI_FAILURE); 4247 } 4248 4249 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) { 4250 return (AHCI_FAILURE); 4251 } 4252 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_HOTPLUG; 4253 4254 /* Checking for outstanding commands */ 4255 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 4256 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4257 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 4258 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 4259 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 4260 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4261 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 4262 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 4263 } 4264 4265 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 4266 ahci_portp->ahciport_mop_in_progress++; 4267 4268 /* Clear status */ 4269 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_UNKNOWN); 4270 4271 /* Firstly assume an unknown device */ 4272 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 4273 4274 ahci_disable_port_intrs(ahci_ctlp, port); 4275 4276 /* port reset is necessary for port multiplier port */ 4277 if (ahci_pmport_reset(ahci_ctlp, ahci_portp, addrp) != AHCI_SUCCESS) { 4278 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 4279 "ahci_initialize_pmport:" 4280 "port reset failed at port %d:%d", 4281 port, pmport); 4282 goto out; 4283 } 4284 4285 /* Is port failed? */ 4286 if (AHCIPORT_GET_STATE(ahci_portp, addrp) & 4287 SATA_PSTATE_FAILED) { 4288 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4289 "ahci_initialize_pmport: port %d:%d failed. " 4290 "state = 0x%x", port, pmport, 4291 ahci_portp->ahciport_port_state); 4292 goto out; 4293 } 4294 4295 /* Is there any device attached? */ 4296 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, addrp) 4297 == SATA_DTYPE_NONE) { 4298 /* Do not waste time on an empty port */ 4299 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 4300 "ahci_initialize_pmport: No device is found " 4301 "at port %d:%d", port, pmport); 4302 ret = AHCI_SUCCESS; 4303 goto out; 4304 } 4305 4306 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_READY); 4307 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4308 "port %d:%d is ready now.", port, pmport); 4309 4310 /* 4311 * Till now we can assure a device attached to that HBA port and work 4312 * correctly. Now try to get the device signature. This is an optional 4313 * step. If failed, unknown device is assumed, then SATA module will 4314 * continue to use IDENTIFY DEVICE to get the information of the 4315 * device. 4316 */ 4317 ahci_find_dev_signature(ahci_ctlp, ahci_portp, addrp); 4318 4319 ret = AHCI_SUCCESS; 4320 4321 out: 4322 /* Next try to mop the pending commands */ 4323 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 4324 finished_tags = ahci_portp->ahciport_pending_tags & 4325 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 4326 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 4327 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 4328 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 4329 reset_tags &= ~finished_tags; 4330 4331 ahci_mop_commands(ahci_ctlp, 4332 ahci_portp, 4333 slot_status, 4334 0, /* failed tags */ 4335 0, /* timeout tags */ 4336 0, /* aborted tags */ 4337 reset_tags); /* reset tags */ 4338 4339 /* Clear PxSNTF register if supported. */ 4340 if (ahci_ctlp->ahcictl_cap & AHCI_CAP_SNTF) { 4341 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4342 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 4343 AHCI_SNOTIF_CLEAR_ALL); 4344 } 4345 4346 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_HOTPLUG; 4347 ahci_enable_port_intrs(ahci_ctlp, port); 4348 return (ret); 4349 } 4350 4351 /* 4352 * ahci_probe_pmult() 4353 * 4354 * This function will be called to probe a port multiplier, which will 4355 * handle hotplug events on port multiplier ports. 4356 * 4357 * NOTE: Only called from ahci_tran_probe_port() 4358 * WARNING!!! ahciport_mutex should be acquired before the function is called. 4359 */ 4360 static int 4361 ahci_probe_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4362 ahci_addr_t *addrp) 4363 { 4364 sata_device_t sdevice; 4365 ahci_addr_t pmport_addr; 4366 uint32_t gscr32, port_hotplug_tags; 4367 uint32_t pmport_sstatus; 4368 int dev_exists_now = 0, dev_existed_previously = 0; 4369 uint8_t port = addrp->aa_port; 4370 int npmport; 4371 4372 /* The bits in GSCR32 refers to the pmport that has a hot-plug event. */ 4373 READ_PMULT(addrp, SATA_PMULT_GSCR32, &gscr32, err); 4374 port_hotplug_tags = gscr32 & AHCI_PMPORT_MASK(ahci_portp); 4375 4376 do { 4377 npmport = ddi_ffs(port_hotplug_tags) - 1; 4378 if (npmport == -1) 4379 /* no pending hot plug events. */ 4380 return (AHCI_SUCCESS); 4381 4382 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4383 "hot-plug event at port %d:%d", port, npmport); 4384 4385 AHCI_ADDR_SET_PMPORT(&pmport_addr, port, (uint8_t)npmport); 4386 4387 /* Check previous device at that port */ 4388 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &pmport_addr) 4389 != SATA_DTYPE_NONE) 4390 dev_existed_previously = 1; 4391 4392 /* PxSStatus tells the presence of device. */ 4393 READ_PMULT(&pmport_addr, SATA_PMULT_REG_SSTS, 4394 &pmport_sstatus, err); 4395 4396 if (SSTATUS_GET_DET(pmport_sstatus) == 4397 SSTATUS_DET_DEVPRE_PHYCOM) 4398 dev_exists_now = 1; 4399 4400 /* 4401 * Clear PxSERR is critical. The transition from 0 to 1 will 4402 * emit a FIS which generates an asynchronous notification 4403 * event at controller. If we fail to clear the PxSERR, the 4404 * Async Notif events will no longer be activated on this 4405 * pmport. 4406 */ 4407 WRITE_PMULT(&pmport_addr, SATA_PMULT_REG_SERR, 4408 AHCI_SERROR_CLEAR_ALL, err); 4409 4410 bzero((void *)&sdevice, sizeof (sata_device_t)); 4411 sdevice.satadev_addr.cport = ahci_ctlp-> 4412 ahcictl_port_to_cport[port]; 4413 sdevice.satadev_addr.qual = SATA_ADDR_PMPORT; 4414 sdevice.satadev_addr.pmport = (uint8_t)npmport; 4415 sdevice.satadev_state = SATA_PSTATE_PWRON; 4416 4417 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4418 "[Existence] %d -> %d", dev_existed_previously, 4419 dev_exists_now); 4420 4421 if (dev_exists_now) { 4422 if (dev_existed_previously) { 4423 /* Link (may) not change: Exist -> Exist * */ 4424 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 4425 "ahci_probe_pmult: port %d:%d " 4426 "device link lost/established", 4427 port, npmport); 4428 4429 mutex_exit(&ahci_portp->ahciport_mutex); 4430 sata_hba_event_notify( 4431 ahci_ctlp->ahcictl_sata_hba_tran-> 4432 sata_tran_hba_dip, 4433 &sdevice, 4434 SATA_EVNT_LINK_LOST| 4435 SATA_EVNT_LINK_ESTABLISHED); 4436 mutex_enter(&ahci_portp->ahciport_mutex); 4437 } else { 4438 /* Link change: None -> Exist */ 4439 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4440 "ahci_probe_pmult: port %d:%d " 4441 "device link established", port, npmport); 4442 4443 /* Clear port state */ 4444 AHCIPORT_SET_STATE(ahci_portp, &pmport_addr, 4445 SATA_STATE_UNKNOWN); 4446 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4447 "ahci_probe_pmult: port %d " 4448 "ahciport_port_state [Cleared].", port); 4449 4450 mutex_exit(&ahci_portp->ahciport_mutex); 4451 sata_hba_event_notify( 4452 ahci_ctlp->ahcictl_sata_hba_tran-> 4453 sata_tran_hba_dip, 4454 &sdevice, 4455 SATA_EVNT_LINK_ESTABLISHED); 4456 mutex_enter(&ahci_portp->ahciport_mutex); 4457 } 4458 } else { /* No device exists now */ 4459 if (dev_existed_previously) { 4460 4461 /* Link change: Exist -> None */ 4462 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4463 "ahci_probe_pmult: port %d:%d " 4464 "device link lost", port, npmport); 4465 4466 /* An existing device is lost. */ 4467 AHCIPORT_SET_STATE(ahci_portp, &pmport_addr, 4468 SATA_STATE_UNKNOWN); 4469 AHCIPORT_SET_DEV_TYPE(ahci_portp, &pmport_addr, 4470 SATA_DTYPE_NONE); 4471 4472 mutex_exit(&ahci_portp->ahciport_mutex); 4473 sata_hba_event_notify( 4474 ahci_ctlp->ahcictl_sata_hba_tran-> 4475 sata_tran_hba_dip, 4476 &sdevice, 4477 SATA_EVNT_LINK_LOST); 4478 mutex_enter(&ahci_portp->ahciport_mutex); 4479 } 4480 } 4481 4482 CLEAR_BIT(port_hotplug_tags, npmport); 4483 } while (port_hotplug_tags != 0); 4484 4485 return (AHCI_SUCCESS); 4486 4487 err: /* R/W PMULT error */ 4488 return (AHCI_FAILURE); 4489 } 4490 4491 /* 4492 * Probe and initialize a port multiplier port. 4493 * A port multiplier port could only be initilaizer here. 4494 * 4495 * WARNING!!! ahcictl_mutex should be acquired before the function 4496 * is called. 4497 */ 4498 static int 4499 ahci_probe_pmport(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4500 ahci_addr_t *addrp, sata_device_t *sd) 4501 { 4502 uint32_t port_state; 4503 uint8_t port = addrp->aa_port; 4504 ahci_addr_t addr_pmult; 4505 4506 /* 4507 * Check the parent - port multiplier first. 4508 */ 4509 4510 /* 4511 * Parent port multiplier might have been removed. This event will be 4512 * ignored and failure. 4513 */ 4514 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE || 4515 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 4516 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4517 "ahci_tran_probe_port: " 4518 "parent device removed, ignore event.", NULL); 4519 4520 return (AHCI_FAILURE); 4521 } 4522 4523 /* The port is ready? */ 4524 port_state = ahci_portp->ahciport_port_state; 4525 if (!(port_state & SATA_STATE_READY)) { 4526 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4527 "ahci_tran_probe_port: " 4528 "parent port-mult is NOT ready.", NULL); 4529 4530 if (ahci_restart_port_wait_till_ready(ahci_ctlp, 4531 ahci_portp, port, AHCI_PORT_RESET, NULL) != 4532 AHCI_SUCCESS) { 4533 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4534 "ahci_tran_probe_port: " 4535 "restart port-mult failed.", NULL); 4536 return (AHCI_FAILURE); 4537 } 4538 } 4539 4540 /* 4541 * If port-mult is restarted due to some reason, we need 4542 * re-initialized the PMult. 4543 */ 4544 if (!(port_state & SATA_DSTATE_PMULT_INIT)) { 4545 /* Initialize registers on a port multiplier */ 4546 AHCI_ADDR_SET_PMULT(&addr_pmult, addrp->aa_port); 4547 if (ahci_initialize_pmult(ahci_ctlp, ahci_portp, 4548 &addr_pmult, sd) != AHCI_SUCCESS) 4549 return (AHCI_FAILURE); 4550 } 4551 4552 /* 4553 * Then we check the port-mult port 4554 */ 4555 /* Is this pmport initialized? */ 4556 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 4557 if (!(port_state & SATA_STATE_READY)) { 4558 4559 /* ahci_initialize_pmport() will set READY state */ 4560 if (ahci_initialize_pmport(ahci_ctlp, 4561 ahci_portp, addrp) != AHCI_SUCCESS) 4562 return (AHCI_FAILURE); 4563 } 4564 4565 return (AHCI_SUCCESS); 4566 } 4567 4568 /* 4569 * AHCI device reset ...; a single device on one of the ports is reset, 4570 * but the HBA and physical communication remain intact. This is the 4571 * least intrusive. 4572 * 4573 * When issuing a software reset sequence, there should not be other 4574 * commands in the command list, so we will first clear and then re-set 4575 * PxCMD.ST to clear PxCI. And before issuing the software reset, 4576 * the port must be idle and PxTFD.STS.BSY and PxTFD.STS.DRQ must be 4577 * cleared unless command list override (PxCMD.CLO) is supported. 4578 * 4579 * WARNING!!! ahciport_mutex should be acquired and PxCMD.FRE should be 4580 * set before the function is called. 4581 */ 4582 static int 4583 ahci_software_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4584 ahci_addr_t *addrp) 4585 { 4586 ahci_fis_h2d_register_t *h2d_register_fisp; 4587 ahci_cmd_table_t *cmd_table; 4588 ahci_cmd_header_t *cmd_header; 4589 uint32_t port_cmd_status, port_cmd_issue, port_task_file; 4590 int slot, loop_count; 4591 uint8_t port = addrp->aa_port; 4592 uint8_t pmport = addrp->aa_pmport; 4593 int rval = AHCI_FAILURE; 4594 4595 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 4596 "port %d:%d device software resetting (FIS)", port, pmport); 4597 4598 /* First clear PxCMD.ST (AHCI v1.2 10.4.1) */ 4599 if (ahci_put_port_into_notrunning_state(ahci_ctlp, ahci_portp, 4600 port) != AHCI_SUCCESS) { 4601 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4602 "ahci_software_reset: cannot stop HBA port %d.", port); 4603 goto out; 4604 } 4605 4606 /* Check PxTFD.STS.BSY and PxTFD.STS.DRQ */ 4607 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4608 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 4609 4610 if (port_task_file & AHCI_TFD_STS_BSY || 4611 port_task_file & AHCI_TFD_STS_DRQ) { 4612 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_SCLO)) { 4613 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4614 "PxTFD.STS.BSY/DRQ is set (PxTFD=0x%x), " 4615 "cannot issue a software reset.", port_task_file); 4616 goto out; 4617 } 4618 4619 /* 4620 * If HBA Support CLO, as Command List Override (CAP.SCLO is 4621 * set), PxCMD.CLO bit should be set before set PxCMD.ST, in 4622 * order to clear PxTFD.STS.BSY and PxTFD.STS.DRQ. 4623 */ 4624 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4625 "PxTFD.STS.BSY/DRQ is set, try SCLO.", NULL) 4626 4627 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4628 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4629 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4630 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4631 port_cmd_status|AHCI_CMD_STATUS_CLO); 4632 4633 /* Waiting till PxCMD.SCLO bit is cleared */ 4634 loop_count = 0; 4635 do { 4636 /* Wait for 10 millisec */ 4637 drv_usecwait(AHCI_10MS_USECS); 4638 4639 /* We are effectively timing out after 1 sec. */ 4640 if (loop_count++ > 100) { 4641 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4642 "SCLO time out. port %d is busy.", port); 4643 goto out; 4644 } 4645 4646 port_cmd_status = 4647 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4648 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4649 } while (port_cmd_status & AHCI_CMD_STATUS_CLO); 4650 4651 /* Re-check */ 4652 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4653 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 4654 if (port_task_file & AHCI_TFD_STS_BSY || 4655 port_task_file & AHCI_TFD_STS_DRQ) { 4656 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4657 "SCLO cannot clear PxTFD.STS.BSY/DRQ (PxTFD=0x%x)", 4658 port_task_file); 4659 goto out; 4660 } 4661 } 4662 4663 /* Then start port */ 4664 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 4665 != AHCI_SUCCESS) { 4666 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4667 "ahci_software_reset: cannot start AHCI port %d.", port); 4668 goto out; 4669 } 4670 4671 /* 4672 * When ahci_port.ahciport_mop_in_progress is set, A non-zero 4673 * ahci_port.ahciport_pending_ncq_tags may fail 4674 * ahci_claim_free_slot(). Actually according to spec, by clearing 4675 * PxCMD.ST there is no command outstanding while executing software 4676 * reseting. Hence we directly use slot 0 instead of 4677 * ahci_claim_free_slot(). 4678 */ 4679 slot = 0; 4680 4681 /* Now send the first H2D Register FIS with SRST set to 1 */ 4682 cmd_table = ahci_portp->ahciport_cmd_tables[slot]; 4683 bzero((void *)cmd_table, ahci_cmd_table_size); 4684 4685 h2d_register_fisp = 4686 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 4687 4688 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 4689 SET_FIS_PMP(h2d_register_fisp, pmport); 4690 SET_FIS_DEVCTL(h2d_register_fisp, SATA_DEVCTL_SRST); 4691 4692 /* Set Command Header in Command List */ 4693 cmd_header = &ahci_portp->ahciport_cmd_list[slot]; 4694 BZERO_DESCR_INFO(cmd_header); 4695 BZERO_PRD_BYTE_COUNT(cmd_header); 4696 SET_COMMAND_FIS_LENGTH(cmd_header, 5); 4697 SET_PORT_MULTI_PORT(cmd_header, pmport); 4698 4699 SET_CLEAR_BUSY_UPON_R_OK(cmd_header, 1); 4700 SET_RESET(cmd_header, 1); 4701 SET_WRITE(cmd_header, 1); 4702 4703 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_tables_dma_handle[slot], 4704 0, 4705 ahci_cmd_table_size, 4706 DDI_DMA_SYNC_FORDEV); 4707 4708 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 4709 slot * sizeof (ahci_cmd_header_t), 4710 sizeof (ahci_cmd_header_t), 4711 DDI_DMA_SYNC_FORDEV); 4712 4713 /* Indicate to the HBA that a command is active. */ 4714 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4715 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 4716 (0x1 << slot)); 4717 4718 loop_count = 0; 4719 4720 /* Loop till the first command is finished */ 4721 do { 4722 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4723 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 4724 4725 /* We are effectively timing out after 1 sec. */ 4726 if (loop_count++ > AHCI_POLLRATE_PORT_SOFTRESET) { 4727 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4728 "the first SRST FIS is timed out, " 4729 "loop_count = %d", loop_count); 4730 goto out; 4731 } 4732 /* Wait for 10 millisec */ 4733 drv_usecwait(AHCI_10MS_USECS); 4734 } while (port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp) & (0x1 << slot)); 4735 4736 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 4737 "ahci_software_reset: 1st loop count: %d, " 4738 "port_cmd_issue = 0x%x, slot = 0x%x", 4739 loop_count, port_cmd_issue, slot); 4740 4741 /* According to ATA spec, we need wait at least 5 microsecs here. */ 4742 drv_usecwait(AHCI_1MS_USECS); 4743 4744 /* Now send the second H2D Register FIS with SRST cleard to zero */ 4745 cmd_table = ahci_portp->ahciport_cmd_tables[slot]; 4746 bzero((void *)cmd_table, ahci_cmd_table_size); 4747 4748 h2d_register_fisp = 4749 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 4750 4751 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 4752 SET_FIS_PMP(h2d_register_fisp, pmport); 4753 4754 /* Set Command Header in Command List */ 4755 cmd_header = &ahci_portp->ahciport_cmd_list[slot]; 4756 BZERO_DESCR_INFO(cmd_header); 4757 BZERO_PRD_BYTE_COUNT(cmd_header); 4758 SET_COMMAND_FIS_LENGTH(cmd_header, 5); 4759 SET_PORT_MULTI_PORT(cmd_header, pmport); 4760 4761 SET_WRITE(cmd_header, 1); 4762 4763 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_tables_dma_handle[slot], 4764 0, 4765 ahci_cmd_table_size, 4766 DDI_DMA_SYNC_FORDEV); 4767 4768 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 4769 slot * sizeof (ahci_cmd_header_t), 4770 sizeof (ahci_cmd_header_t), 4771 DDI_DMA_SYNC_FORDEV); 4772 4773 /* Indicate to the HBA that a command is active. */ 4774 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4775 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 4776 (0x1 << slot)); 4777 4778 loop_count = 0; 4779 4780 /* Loop till the second command is finished */ 4781 do { 4782 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4783 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 4784 4785 /* We are effectively timing out after 1 sec. */ 4786 if (loop_count++ > AHCI_POLLRATE_PORT_SOFTRESET) { 4787 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4788 "the second SRST FIS is timed out, " 4789 "loop_count = %d", loop_count); 4790 goto out; 4791 } 4792 4793 /* Wait for 10 millisec */ 4794 drv_usecwait(AHCI_10MS_USECS); 4795 } while (port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp) & (0x1 << slot)); 4796 4797 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 4798 "ahci_software_reset: 2nd loop count: %d, " 4799 "port_cmd_issue = 0x%x, slot = 0x%x", 4800 loop_count, port_cmd_issue, slot); 4801 4802 CLEAR_BIT(ahci_portp->ahciport_pending_tags, slot); 4803 4804 rval = AHCI_SUCCESS; 4805 out: 4806 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4807 "ahci_software_reset: %s at port %d:%d", 4808 rval == AHCI_SUCCESS ? "succeed" : "failed", 4809 port, pmport); 4810 4811 return (rval); 4812 } 4813 4814 /* 4815 * AHCI port reset ...; the physical communication between the HBA and device 4816 * on a port are disabled. This is more intrusive. 4817 * 4818 * When an HBA or port reset occurs, Phy communication is going to 4819 * be re-established with the device through a COMRESET followed by the 4820 * normal out-of-band communication sequence defined in Serial ATA. AT 4821 * the end of reset, the device, if working properly, will send a D2H 4822 * Register FIS, which contains the device signature. When the HBA receives 4823 * this FIS, it updates PxTFD.STS and PxTFD.ERR register fields, and updates 4824 * the PxSIG register with the signature. 4825 * 4826 * Staggered spin-up is an optional feature in SATA II, and it enables an HBA 4827 * to individually spin-up attached devices. Please refer to chapter 10.9 of 4828 * AHCI 1.0 spec. 4829 */ 4830 /* 4831 * WARNING!!! ahciport_mutex should be acquired, and PxCMD.ST should be also 4832 * cleared before the function is called. 4833 */ 4834 static int 4835 ahci_port_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4836 ahci_addr_t *addrp) 4837 { 4838 ahci_addr_t pmult_addr; 4839 uint32_t cap_status, port_cmd_status; 4840 uint32_t port_scontrol, port_sstatus, port_serror; 4841 uint32_t port_intr_status, port_task_file; 4842 uint32_t port_state; 4843 uint8_t port = addrp->aa_port; 4844 4845 int loop_count; 4846 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 4847 4848 /* Target is a port multiplier port? */ 4849 if (AHCI_ADDR_IS_PMPORT(addrp)) 4850 return (ahci_pmport_reset(ahci_ctlp, ahci_portp, addrp)); 4851 4852 /* Otherwise it must be an HBA port. */ 4853 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 4854 4855 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 4856 "Port %d port resetting...", port); 4857 ahci_portp->ahciport_port_state = 0; 4858 4859 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4860 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 4861 4862 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4863 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4864 4865 if (cap_status & AHCI_HBA_CAP_SSS) { 4866 /* 4867 * HBA support staggered spin-up, if the port has 4868 * not spin up yet, then force it to do spin-up 4869 */ 4870 if (!(port_cmd_status & AHCI_CMD_STATUS_SUD)) { 4871 if (!(ahci_portp->ahciport_flags 4872 & AHCI_PORT_FLAG_SPINUP)) { 4873 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4874 "Port %d PxCMD.SUD is zero, force " 4875 "it to do spin-up", port); 4876 ahci_portp->ahciport_flags |= 4877 AHCI_PORT_FLAG_SPINUP; 4878 } 4879 } 4880 } else { 4881 /* 4882 * HBA doesn't support stagger spin-up, force it 4883 * to do normal COMRESET 4884 */ 4885 if (ahci_portp->ahciport_flags & 4886 AHCI_PORT_FLAG_SPINUP) { 4887 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4888 "HBA does not support staggered spin-up " 4889 "force it to do normal COMRESET", NULL); 4890 ahci_portp->ahciport_flags &= 4891 ~AHCI_PORT_FLAG_SPINUP; 4892 } 4893 } 4894 4895 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_SPINUP)) { 4896 /* Do normal COMRESET */ 4897 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 4898 "ahci_port_reset: do normal COMRESET", port); 4899 4900 /* 4901 * According to the spec, SUD bit should be set here, 4902 * but JMicron JMB363 doesn't follow it, so remove 4903 * the assertion, and just print a debug message. 4904 */ 4905 #if AHCI_DEBUG 4906 if (!(port_cmd_status & AHCI_CMD_STATUS_SUD)) 4907 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4908 "port %d SUD bit not set", port) 4909 #endif 4910 4911 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4912 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 4913 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_COMRESET); 4914 4915 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4916 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 4917 port_scontrol); 4918 4919 /* Enable PxCMD.FRE to read device */ 4920 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4921 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4922 port_cmd_status|AHCI_CMD_STATUS_FRE); 4923 4924 /* 4925 * Give time for COMRESET to percolate, according to the AHCI 4926 * spec, software shall wait at least 1 millisecond before 4927 * clearing PxSCTL.DET 4928 */ 4929 drv_usecwait(AHCI_1MS_USECS*2); 4930 4931 /* Fetch the SCONTROL again and rewrite the DET part with 0 */ 4932 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4933 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 4934 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 4935 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4936 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 4937 port_scontrol); 4938 } else { 4939 /* Do staggered spin-up */ 4940 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4941 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 4942 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 4943 4944 /* PxSCTL.DET must be 0 */ 4945 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4946 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 4947 port_scontrol); 4948 4949 port_cmd_status &= ~AHCI_CMD_STATUS_SUD; 4950 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4951 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4952 port_cmd_status); 4953 4954 /* 0 -> 1 edge */ 4955 drv_usecwait(AHCI_1MS_USECS*2); 4956 4957 /* Set PxCMD.SUD to 1 */ 4958 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4959 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4960 port_cmd_status |= AHCI_CMD_STATUS_SUD; 4961 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4962 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4963 port_cmd_status); 4964 4965 /* Enable PxCMD.FRE to read device */ 4966 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4967 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4968 port_cmd_status|AHCI_CMD_STATUS_FRE); 4969 } 4970 4971 /* 4972 * The port enters P:StartComm state, and HBA tells link layer to 4973 * start communication, which involves sending COMRESET to device. 4974 * And the HBA resets PxTFD.STS to 7Fh. 4975 * 4976 * When a COMINIT is received from the device, then the port enters 4977 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets 4978 * PxSSTS.DET to 1h to indicate a device is detected but communication 4979 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate 4980 * a COMINIT has been received. 4981 */ 4982 /* 4983 * The DET field is valid only if IPM field indicates 4984 * that the interface is in active state. 4985 */ 4986 loop_count = 0; 4987 do { 4988 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4989 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 4990 4991 if (SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) { 4992 /* 4993 * If the interface is not active, the DET field 4994 * is considered not accurate. So we want to 4995 * continue looping. 4996 */ 4997 SSTATUS_SET_DET(port_sstatus, SSTATUS_DET_NODEV); 4998 } 4999 5000 if (loop_count++ > AHCI_POLLRATE_PORT_SSTATUS) { 5001 /* 5002 * We are effectively timing out after 0.1 sec. 5003 */ 5004 break; 5005 } 5006 5007 /* Wait for 10 millisec */ 5008 drv_usecwait(AHCI_10MS_USECS); 5009 } while (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM); 5010 5011 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 5012 "ahci_port_reset: 1st loop count: %d, " 5013 "port_sstatus = 0x%x port %d", 5014 loop_count, port_sstatus, port); 5015 5016 if ((SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) || 5017 (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM)) { 5018 /* 5019 * Either the port is not active or there 5020 * is no device present. 5021 */ 5022 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_NONE); 5023 return (AHCI_SUCCESS); 5024 } 5025 5026 /* Now we can make sure there is a device connected to the port */ 5027 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5028 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 5029 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5030 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 5031 5032 /* 5033 * A COMINIT signal is supposed to be received 5034 * PxSERR.DIAG.X or PxIS.PCS should be set 5035 */ 5036 if (!(port_intr_status & AHCI_INTR_STATUS_PCS) && 5037 !(port_serror & SERROR_EXCHANGED_ERR)) { 5038 cmn_err(CE_WARN, "!ahci%d: ahci_port_reset port %d " 5039 "COMINIT signal from the device not received", 5040 instance, port); 5041 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_PSTATE_FAILED); 5042 return (AHCI_FAILURE); 5043 } 5044 5045 /* 5046 * According to the spec, when PxSCTL.DET is set to 0h, upon 5047 * receiving a COMINIT from the attached device, PxTFD.STS.BSY 5048 * shall be set to '1' by the HBA. 5049 * 5050 * However, we found JMicron JMB363 doesn't follow this, so 5051 * remove this check, and just print a debug message. 5052 */ 5053 #if AHCI_DEBUG 5054 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5055 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 5056 if (!(port_task_file & AHCI_TFD_STS_BSY)) { 5057 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_port_reset: " 5058 "port %d BSY bit is not set after COMINIT signal " 5059 "is received", port); 5060 } 5061 #endif 5062 5063 /* 5064 * PxSERR.DIAG.X has to be cleared in order to update PxTFD with 5065 * the D2H FIS received by HBA. 5066 */ 5067 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5068 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5069 SERROR_EXCHANGED_ERR); 5070 5071 /* 5072 * Devices should return a FIS contains its signature to HBA after 5073 * COMINIT signal. Check whether a D2H FIS is received by polling 5074 * PxTFD.STS.ERR bit. 5075 */ 5076 loop_count = 0; 5077 do { 5078 /* Wait for 10 millisec */ 5079 drv_usecwait(AHCI_10MS_USECS); 5080 5081 if (loop_count++ > AHCI_POLLRATE_PORT_TFD_ERROR) { 5082 /* 5083 * We are effectively timing out after 11 sec. 5084 */ 5085 cmn_err(CE_WARN, "!ahci%d: ahci_port_reset port %d " 5086 "the device hardware has been initialized and " 5087 "the power-up diagnostics failed", 5088 instance, port); 5089 5090 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_port_reset: " 5091 "port %d PxTFD.STS.ERR is not set, we need another " 5092 "software reset.", port); 5093 5094 /* Clear port serror register for the port */ 5095 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5096 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5097 AHCI_SERROR_CLEAR_ALL); 5098 5099 AHCI_ADDR_SET_PMULT(&pmult_addr, port); 5100 5101 /* Try another software reset. */ 5102 if (ahci_software_reset(ahci_ctlp, ahci_portp, 5103 &pmult_addr) != AHCI_SUCCESS) { 5104 AHCIPORT_SET_STATE(ahci_portp, addrp, 5105 SATA_PSTATE_FAILED); 5106 return (AHCI_FAILURE); 5107 } 5108 break; 5109 } 5110 5111 /* Wait for 10 millisec */ 5112 drv_usecwait(AHCI_10MS_USECS); 5113 5114 /* 5115 * The Error bit '1' means COMRESET is finished successfully 5116 * The device hardware has been initialized and the power-up 5117 * diagnostics successfully completed. The device requests 5118 * that the Transport layer transmit a Register - D2H FIS to 5119 * the host. (SATA spec 11.5, v2.6) 5120 */ 5121 port_task_file = 5122 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5123 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 5124 } while (((port_task_file & AHCI_TFD_ERR_MASK) 5125 >> AHCI_TFD_ERR_SHIFT) != AHCI_TFD_ERR_SGS); 5126 5127 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 5128 "ahci_port_reset: 2nd loop count: %d, " 5129 "port_task_file = 0x%x port %d", 5130 loop_count, port_task_file, port); 5131 5132 /* Clear port serror register for the port */ 5133 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5134 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5135 AHCI_SERROR_CLEAR_ALL); 5136 5137 /* Set port as ready */ 5138 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 5139 AHCIPORT_SET_STATE(ahci_portp, addrp, port_state|SATA_STATE_READY); 5140 5141 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5142 "ahci_port_reset: succeed at port %d.", port); 5143 return (AHCI_SUCCESS); 5144 } 5145 5146 /* 5147 * COMRESET on a port multiplier port. 5148 * 5149 * NOTE: Only called in ahci_port_reset() 5150 */ 5151 static int 5152 ahci_pmport_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5153 ahci_addr_t *addrp) 5154 { 5155 uint32_t port_scontrol, port_sstatus, port_serror; 5156 uint32_t port_cmd_status, port_intr_status; 5157 uint32_t port_state; 5158 uint8_t port = addrp->aa_port; 5159 uint8_t pmport = addrp->aa_pmport; 5160 int loop_count; 5161 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 5162 5163 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 5164 "port %d:%d: pmport resetting", port, pmport); 5165 5166 /* Initialize pmport state */ 5167 AHCIPORT_SET_STATE(ahci_portp, addrp, 0); 5168 5169 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &port_scontrol, err); 5170 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_COMRESET); 5171 WRITE_PMULT(addrp, SATA_PMULT_REG_SCTL, port_scontrol, err); 5172 5173 /* PxCMD.FRE should be set before. */ 5174 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5175 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5176 ASSERT(port_cmd_status & AHCI_CMD_STATUS_FRE); 5177 if (!(port_cmd_status & AHCI_CMD_STATUS_FRE)) 5178 return (AHCI_FAILURE); 5179 5180 /* 5181 * Give time for COMRESET to percolate, according to the AHCI 5182 * spec, software shall wait at least 1 millisecond before 5183 * clearing PxSCTL.DET 5184 */ 5185 drv_usecwait(AHCI_1MS_USECS*2); 5186 5187 /* 5188 * Fetch the SCONTROL again and rewrite the DET part with 0 5189 * This will generate an Asychronous Notification events. 5190 */ 5191 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &port_scontrol, err); 5192 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 5193 WRITE_PMULT(addrp, SATA_PMULT_REG_SCTL, port_scontrol, err); 5194 5195 /* 5196 * The port enters P:StartComm state, and HBA tells link layer to 5197 * start communication, which involves sending COMRESET to device. 5198 * And the HBA resets PxTFD.STS to 7Fh. 5199 * 5200 * When a COMINIT is received from the device, then the port enters 5201 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets 5202 * PxSSTS.DET to 1h to indicate a device is detected but communication 5203 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate 5204 * a COMINIT has been received. 5205 */ 5206 /* 5207 * The DET field is valid only if IPM field indicates 5208 * that the interface is in active state. 5209 */ 5210 loop_count = 0; 5211 do { 5212 READ_PMULT(addrp, SATA_PMULT_REG_SSTS, &port_sstatus, err); 5213 5214 if (SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) { 5215 /* 5216 * If the interface is not active, the DET field 5217 * is considered not accurate. So we want to 5218 * continue looping. 5219 */ 5220 SSTATUS_SET_DET(port_sstatus, SSTATUS_DET_NODEV); 5221 } 5222 5223 if (loop_count++ > AHCI_POLLRATE_PORT_SSTATUS) { 5224 /* 5225 * We are effectively timing out after 0.1 sec. 5226 */ 5227 break; 5228 } 5229 5230 /* Wait for 10 millisec */ 5231 drv_usecwait(AHCI_10MS_USECS); 5232 5233 } while (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM); 5234 5235 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5236 "ahci_pmport_reset: 1st loop count: %d, " 5237 "port_sstatus = 0x%x port %d:%d", 5238 loop_count, port_sstatus, port, pmport); 5239 5240 if ((SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) || 5241 (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM)) { 5242 /* 5243 * Either the port is not active or there 5244 * is no device present. 5245 */ 5246 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO, ahci_ctlp, 5247 "ahci_pmport_reset: " 5248 "no device attached to port %d:%d", 5249 port, pmport); 5250 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_NONE); 5251 return (AHCI_SUCCESS); 5252 } 5253 5254 /* Now we can make sure there is a device connected to the port */ 5255 /* COMINIT signal is supposed to be received (PxSERR.DIAG.X = '1') */ 5256 READ_PMULT(addrp, SATA_PMULT_REG_SERR, &port_serror, err); 5257 5258 if (!(port_serror & (1 << 26))) { 5259 cmn_err(CE_WARN, "!ahci%d: ahci_pmport_reset: " 5260 "COMINIT signal from the device not received port %d:%d", 5261 instance, port, pmport); 5262 5263 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_PSTATE_FAILED); 5264 return (AHCI_FAILURE); 5265 } 5266 5267 /* 5268 * After clear PxSERR register, we will receive a D2H FIS. 5269 * Normally this FIS will cause a IPMS error according to AHCI spec 5270 * v1.2 because there is no command outstanding for it. So we need 5271 * to ignore this error. 5272 */ 5273 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_IGNORE_IPMS; 5274 WRITE_PMULT(addrp, SATA_PMULT_REG_SERR, AHCI_SERROR_CLEAR_ALL, err); 5275 5276 /* Now we need to check the D2H FIS by checking IPMS error. */ 5277 loop_count = 0; 5278 do { 5279 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5280 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 5281 5282 if (loop_count++ > AHCI_POLLRATE_PORT_TFD_ERROR) { 5283 /* 5284 * No D2H FIS received. This is possible according 5285 * to SATA 2.6 spec. 5286 */ 5287 cmn_err(CE_WARN, "ahci_port_reset: port %d:%d " 5288 "PxIS.IPMS is not set, we need another " 5289 "software reset.", port, pmport); 5290 5291 break; 5292 } 5293 5294 /* Wait for 10 millisec */ 5295 mutex_exit(&ahci_portp->ahciport_mutex); 5296 delay(AHCI_10MS_TICKS); 5297 mutex_enter(&ahci_portp->ahciport_mutex); 5298 5299 } while (!(port_intr_status & AHCI_INTR_STATUS_IPMS)); 5300 5301 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5302 "ahci_pmport_reset: 2st loop count: %d, " 5303 "port_sstatus = 0x%x port %d:%d", 5304 loop_count, port_sstatus, port, pmport); 5305 5306 /* Clear IPMS */ 5307 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5308 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 5309 AHCI_INTR_STATUS_IPMS); 5310 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_IGNORE_IPMS; 5311 5312 /* This pmport is now ready for ahci_tran_start() */ 5313 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 5314 AHCIPORT_SET_STATE(ahci_portp, addrp, port_state|SATA_STATE_READY); 5315 5316 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5317 "ahci_pmport_reset: succeed at port %d:%d", port, pmport); 5318 return (AHCI_SUCCESS); 5319 5320 err: /* R/W PMULT error */ 5321 /* IPMS flags might be set before. */ 5322 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_IGNORE_IPMS; 5323 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5324 "ahci_pmport_reset: failed at port %d:%d", port, pmport); 5325 5326 return (AHCI_FAILURE); 5327 } 5328 5329 /* 5330 * AHCI HBA reset ...; the entire HBA is reset, and all ports are disabled. 5331 * This is the most intrusive. 5332 * 5333 * When an HBA reset occurs, Phy communication will be re-established with 5334 * the device through a COMRESET followed by the normal out-of-band 5335 * communication sequence defined in Serial ATA. AT the end of reset, the 5336 * device, if working properly, will send a D2H Register FIS, which contains 5337 * the device signature. When the HBA receives this FIS, it updates PxTFD.STS 5338 * and PxTFD.ERR register fields, and updates the PxSIG register with the 5339 * signature. 5340 * 5341 * Remember to set GHC.AE to 1 before calling ahci_hba_reset. 5342 */ 5343 static int 5344 ahci_hba_reset(ahci_ctl_t *ahci_ctlp) 5345 { 5346 ahci_port_t *ahci_portp; 5347 ahci_addr_t addr; 5348 uint32_t ghc_control; 5349 uint8_t port; 5350 int loop_count; 5351 int rval = AHCI_SUCCESS; 5352 5353 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, "HBA resetting", 5354 NULL); 5355 5356 mutex_enter(&ahci_ctlp->ahcictl_mutex); 5357 5358 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5359 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5360 5361 /* Setting GHC.HR to 1, remember GHC.AE is already set to 1 before */ 5362 ghc_control |= AHCI_HBA_GHC_HR; 5363 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5364 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 5365 5366 /* 5367 * Wait until HBA Reset complete or timeout 5368 */ 5369 loop_count = 0; 5370 do { 5371 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5372 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5373 5374 if (loop_count++ > AHCI_POLLRATE_HBA_RESET) { 5375 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5376 "ahci hba reset is timing out, " 5377 "ghc_control = 0x%x", ghc_control); 5378 /* We are effectively timing out after 1 sec. */ 5379 break; 5380 } 5381 5382 /* Wait for 10 millisec */ 5383 drv_usecwait(AHCI_10MS_USECS); 5384 } while (ghc_control & AHCI_HBA_GHC_HR); 5385 5386 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5387 "ahci_hba_reset: 1st loop count: %d, " 5388 "ghc_control = 0x%x", loop_count, ghc_control); 5389 5390 if (ghc_control & AHCI_HBA_GHC_HR) { 5391 /* The hba is not reset for some reasons */ 5392 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5393 "hba reset failed: HBA in a hung or locked state", NULL); 5394 mutex_exit(&ahci_ctlp->ahcictl_mutex); 5395 return (AHCI_FAILURE); 5396 } 5397 5398 /* 5399 * HBA reset will clear (AHCI Spec v1.2 10.4.3) GHC.IE / GHC.AE 5400 */ 5401 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5402 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5403 ghc_control |= (AHCI_HBA_GHC_AE | AHCI_HBA_GHC_IE); 5404 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5405 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 5406 5407 mutex_exit(&ahci_ctlp->ahcictl_mutex); 5408 5409 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 5410 /* Only check implemented ports */ 5411 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 5412 continue; 5413 } 5414 5415 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 5416 mutex_enter(&ahci_portp->ahciport_mutex); 5417 5418 AHCI_ADDR_SET_PORT(&addr, port); 5419 5420 if (ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 5421 port, AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, NULL) != 5422 AHCI_SUCCESS) { 5423 rval = AHCI_FAILURE; 5424 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5425 "ahci_hba_reset: port %d failed", port); 5426 /* 5427 * Set the port state to SATA_PSTATE_FAILED if 5428 * failed to initialize it. 5429 */ 5430 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 5431 } 5432 5433 mutex_exit(&ahci_portp->ahciport_mutex); 5434 } 5435 5436 return (rval); 5437 } 5438 5439 /* 5440 * This routine is only called from AHCI_ATTACH or phyrdy change 5441 * case. It first calls software reset, then stop the port and try to 5442 * read PxSIG register to find the type of device attached to the port. 5443 * 5444 * The caller should make sure a valid device exists on specified port and 5445 * physical communication has been established so that the signature could 5446 * be retrieved by software reset. 5447 * 5448 * WARNING!!! ahciport_mutex should be acquired before the function 5449 * is called. And the port interrupt is disabled. 5450 */ 5451 static void 5452 ahci_find_dev_signature(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5453 ahci_addr_t *addrp) 5454 { 5455 ahci_addr_t dev_addr; 5456 uint32_t signature; 5457 uint8_t port = addrp->aa_port; 5458 uint8_t pmport = addrp->aa_pmport; 5459 ASSERT(AHCI_ADDR_IS_VALID(addrp)); 5460 int rval; 5461 5462 if (AHCI_ADDR_IS_PORT(addrp)) { 5463 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 5464 "ahci_find_dev_signature enter: port %d", port); 5465 5466 /* 5467 * NOTE: when the ahci address is a HBA port, we do not know 5468 * it is a device or a port multiplier that attached. we need 5469 * try a software reset at port multiplier address (0xf 5470 * pmport) 5471 */ 5472 AHCI_ADDR_SET_PMULT(&dev_addr, addrp->aa_port); 5473 } else { 5474 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 5475 "ahci_find_dev_signature enter: port %d:%d", 5476 port, pmport); 5477 dev_addr = *addrp; 5478 } 5479 5480 /* Assume it is unknown. */ 5481 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 5482 5483 /* Issue a software reset to get the signature */ 5484 rval = ahci_software_reset(ahci_ctlp, ahci_portp, &dev_addr); 5485 if (rval != AHCI_SUCCESS) { 5486 5487 /* 5488 * Try to do software reset again with pmport set with 0 if 5489 * the controller is set with AHCI_CAP_SRST_NO_HOSTPORT and 5490 * the original pmport is set with SATA_PMULT_HOSTPORT (0xf) 5491 */ 5492 if ((ahci_ctlp->ahcictl_cap & AHCI_CAP_SRST_NO_HOSTPORT) && 5493 (dev_addr.aa_pmport == SATA_PMULT_HOSTPORT)) { 5494 dev_addr.aa_pmport = 0; 5495 rval = ahci_software_reset(ahci_ctlp, ahci_portp, 5496 &dev_addr); 5497 } 5498 5499 if (rval != AHCI_SUCCESS) { 5500 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5501 "ahci_find_dev_signature: software reset failed " 5502 "at port %d:%d, cannot get signature.", 5503 port, pmport); 5504 5505 AHCIPORT_SET_STATE(ahci_portp, addrp, 5506 SATA_PSTATE_FAILED); 5507 return; 5508 } 5509 } 5510 5511 /* 5512 * ahci_software_reset has started the port, so we need manually stop 5513 * the port again. 5514 */ 5515 if (AHCI_ADDR_IS_PORT(addrp)) { 5516 if (ahci_put_port_into_notrunning_state(ahci_ctlp, 5517 ahci_portp, port) != AHCI_SUCCESS) { 5518 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5519 "ahci_find_dev_signature: cannot stop port %d.", 5520 port); 5521 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 5522 return; 5523 } 5524 } 5525 5526 /* Now we can make sure that a valid signature is received. */ 5527 signature = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5528 (uint32_t *)AHCI_PORT_PxSIG(ahci_ctlp, port)); 5529 5530 #ifdef AHCI_DEBUG 5531 if (AHCI_ADDR_IS_PMPORT(addrp)) { 5532 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 5533 "ahci_find_dev_signature: signature = 0x%x at port %d:%d", 5534 signature, port, pmport); 5535 } else { 5536 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO, ahci_ctlp, 5537 "ahci_find_dev_signature: signature = 0x%x at port %d", 5538 signature, port); 5539 } 5540 #endif 5541 5542 /* NOTE: Only support ATAPI device at controller port. */ 5543 if (signature == AHCI_SIGNATURE_ATAPI && !AHCI_ADDR_IS_PORT(addrp)) 5544 signature = SATA_DTYPE_UNKNOWN; 5545 5546 switch (signature) { 5547 5548 case AHCI_SIGNATURE_DISK: 5549 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_ATADISK); 5550 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5551 "Disk is found at port: %d", port); 5552 break; 5553 5554 case AHCI_SIGNATURE_ATAPI: 5555 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_ATAPI); 5556 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5557 "ATAPI device is found at port: %d", port); 5558 break; 5559 5560 case AHCI_SIGNATURE_PORT_MULTIPLIER: 5561 /* Port Multiplier cannot recursively attached. */ 5562 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 5563 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_PMULT); 5564 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5565 "Port Multiplier is found at port: %d", port); 5566 break; 5567 5568 default: 5569 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 5570 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5571 "Unknown device is found at port: %d", port); 5572 } 5573 } 5574 5575 /* 5576 * According to the spec, to reliably detect hot plug removals, software 5577 * must disable interface power management. Software should perform the 5578 * following initialization on a port after a device is attached: 5579 * Set PxSCTL.IPM to 3h to disable interface state transitions 5580 * Set PxCMD.ALPE to '0' to disable aggressive power management 5581 * Disable device initiated interface power management by SET FEATURE 5582 * 5583 * We can ignore the last item because by default the feature is disabled 5584 */ 5585 static void 5586 ahci_disable_interface_pm(ahci_ctl_t *ahci_ctlp, uint8_t port) 5587 { 5588 uint32_t port_scontrol, port_cmd_status; 5589 5590 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5591 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 5592 SCONTROL_SET_IPM(port_scontrol, SCONTROL_IPM_DISABLE_BOTH); 5593 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5594 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), port_scontrol); 5595 5596 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5597 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5598 port_cmd_status &= ~AHCI_CMD_STATUS_ALPE; 5599 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5600 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), port_cmd_status); 5601 } 5602 5603 /* 5604 * Start the port - set PxCMD.ST to 1, if PxCMD.FRE is not set 5605 * to 1, then set it firstly. 5606 * 5607 * Each port contains two major DMA engines. One DMA engine walks through 5608 * the command list, and is controlled by PxCMD.ST. The second DMA engine 5609 * copies received FISes into system memory, and is controlled by PxCMD.FRE. 5610 * 5611 * Software shall not set PxCMD.ST to '1' until it verifies that PxCMD.CR 5612 * is '0' and has set PxCMD.FRE is '1'. And software shall not clear 5613 * PxCMD.FRE while PxCMD.ST or PxCMD.CR is set '1'. 5614 * 5615 * Software shall not set PxCMD.ST to '1' unless a functional device is 5616 * present on the port(as determined by PxTFD.STS.BSY = '0', 5617 * PxTFD.STS.DRQ = '0', and PxSSTS.DET = 3h). 5618 * 5619 * WARNING!!! ahciport_mutex should be acquired before the function 5620 * is called. 5621 */ 5622 static int 5623 ahci_start_port(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, uint8_t port) 5624 { 5625 uint32_t port_cmd_status; 5626 5627 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_start_port: %d enter", port); 5628 5629 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED) { 5630 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port failed " 5631 "the state for port %d is 0x%x", 5632 port, ahci_portp->ahciport_port_state); 5633 return (AHCI_FAILURE); 5634 } 5635 5636 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 5637 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port failed " 5638 "no device is attached at port %d", port); 5639 return (AHCI_FAILURE); 5640 } 5641 5642 /* First to set PxCMD.FRE before setting PxCMD.ST. */ 5643 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5644 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5645 5646 if (!(port_cmd_status & AHCI_CMD_STATUS_FRE)) { 5647 port_cmd_status |= AHCI_CMD_STATUS_FRE; 5648 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5649 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5650 port_cmd_status); 5651 } 5652 5653 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5654 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5655 5656 port_cmd_status |= AHCI_CMD_STATUS_ST; 5657 5658 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5659 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5660 port_cmd_status); 5661 5662 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_STARTED; 5663 5664 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port: " 5665 "PxCMD.ST set to '1' at port %d", port); 5666 5667 return (AHCI_SUCCESS); 5668 } 5669 5670 /* 5671 * Allocate the ahci_port_t including Received FIS and Command List. 5672 * The argument - port is the physical port number, and not logical 5673 * port number seen by the SATA framework. 5674 * 5675 * WARNING!!! ahcictl_mutex should be acquired before the function 5676 * is called. 5677 */ 5678 static int 5679 ahci_alloc_port_state(ahci_ctl_t *ahci_ctlp, uint8_t port) 5680 { 5681 dev_info_t *dip = ahci_ctlp->ahcictl_dip; 5682 ahci_port_t *ahci_portp; 5683 char taskq_name[64] = "event_handle_taskq"; 5684 5685 ahci_portp = 5686 (ahci_port_t *)kmem_zalloc(sizeof (ahci_port_t), KM_SLEEP); 5687 5688 ahci_ctlp->ahcictl_ports[port] = ahci_portp; 5689 ahci_portp->ahciport_port_num = port; 5690 5691 /* Initialize the port condition variable */ 5692 cv_init(&ahci_portp->ahciport_cv, NULL, CV_DRIVER, NULL); 5693 5694 /* Initialize the port mutex */ 5695 mutex_init(&ahci_portp->ahciport_mutex, NULL, MUTEX_DRIVER, 5696 (void *)(uintptr_t)ahci_ctlp->ahcictl_intr_pri); 5697 5698 mutex_enter(&ahci_portp->ahciport_mutex); 5699 5700 /* 5701 * Allocate memory for received FIS structure and 5702 * command list for this port 5703 */ 5704 if (ahci_alloc_rcvd_fis(ahci_ctlp, ahci_portp, port) != AHCI_SUCCESS) { 5705 goto err_case1; 5706 } 5707 5708 if (ahci_alloc_cmd_list(ahci_ctlp, ahci_portp, port) != AHCI_SUCCESS) { 5709 goto err_case2; 5710 } 5711 5712 (void) snprintf(taskq_name + strlen(taskq_name), 5713 sizeof (taskq_name) - strlen(taskq_name), 5714 "_port%d", port); 5715 5716 /* Create the taskq for the port */ 5717 if ((ahci_portp->ahciport_event_taskq = ddi_taskq_create(dip, 5718 taskq_name, 2, TASKQ_DEFAULTPRI, 0)) == NULL) { 5719 cmn_err(CE_WARN, "!ahci%d: ddi_taskq_create failed for event " 5720 "handle", ddi_get_instance(ahci_ctlp->ahcictl_dip)); 5721 goto err_case3; 5722 } 5723 5724 /* Allocate the argument for the taskq */ 5725 ahci_portp->ahciport_event_args = 5726 kmem_zalloc(sizeof (ahci_event_arg_t), KM_SLEEP); 5727 5728 ahci_portp->ahciport_event_args->ahciea_addrp = 5729 kmem_zalloc(sizeof (ahci_addr_t), KM_SLEEP); 5730 5731 if (ahci_portp->ahciport_event_args == NULL) 5732 goto err_case4; 5733 5734 mutex_exit(&ahci_portp->ahciport_mutex); 5735 5736 return (AHCI_SUCCESS); 5737 5738 err_case4: 5739 ddi_taskq_destroy(ahci_portp->ahciport_event_taskq); 5740 5741 err_case3: 5742 ahci_dealloc_cmd_list(ahci_ctlp, ahci_portp); 5743 5744 err_case2: 5745 ahci_dealloc_rcvd_fis(ahci_portp); 5746 5747 err_case1: 5748 mutex_exit(&ahci_portp->ahciport_mutex); 5749 mutex_destroy(&ahci_portp->ahciport_mutex); 5750 cv_destroy(&ahci_portp->ahciport_cv); 5751 5752 kmem_free(ahci_portp, sizeof (ahci_port_t)); 5753 5754 return (AHCI_FAILURE); 5755 } 5756 5757 /* 5758 * Reverse of ahci_dealloc_port_state(). 5759 * 5760 * WARNING!!! ahcictl_mutex should be acquired before the function 5761 * is called. 5762 */ 5763 static void 5764 ahci_dealloc_port_state(ahci_ctl_t *ahci_ctlp, uint8_t port) 5765 { 5766 ahci_port_t *ahci_portp = ahci_ctlp->ahcictl_ports[port]; 5767 5768 ASSERT(ahci_portp != NULL); 5769 5770 mutex_enter(&ahci_portp->ahciport_mutex); 5771 kmem_free(ahci_portp->ahciport_event_args->ahciea_addrp, 5772 sizeof (ahci_addr_t)); 5773 ahci_portp->ahciport_event_args->ahciea_addrp = NULL; 5774 kmem_free(ahci_portp->ahciport_event_args, sizeof (ahci_event_arg_t)); 5775 ahci_portp->ahciport_event_args = NULL; 5776 ddi_taskq_destroy(ahci_portp->ahciport_event_taskq); 5777 ahci_dealloc_cmd_list(ahci_ctlp, ahci_portp); 5778 ahci_dealloc_rcvd_fis(ahci_portp); 5779 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 5780 mutex_exit(&ahci_portp->ahciport_mutex); 5781 5782 mutex_destroy(&ahci_portp->ahciport_mutex); 5783 cv_destroy(&ahci_portp->ahciport_cv); 5784 5785 kmem_free(ahci_portp, sizeof (ahci_port_t)); 5786 5787 ahci_ctlp->ahcictl_ports[port] = NULL; 5788 } 5789 5790 /* 5791 * Allocates memory for the Received FIS Structure 5792 * 5793 * WARNING!!! ahciport_mutex should be acquired before the function 5794 * is called. 5795 */ 5796 static int 5797 ahci_alloc_rcvd_fis(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5798 uint8_t port) 5799 { 5800 size_t rcvd_fis_size; 5801 size_t ret_len; 5802 uint_t cookie_count; 5803 5804 rcvd_fis_size = sizeof (ahci_rcvd_fis_t); 5805 5806 /* allocate rcvd FIS dma handle. */ 5807 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 5808 &ahci_ctlp->ahcictl_rcvd_fis_dma_attr, 5809 DDI_DMA_SLEEP, 5810 NULL, 5811 &ahci_portp->ahciport_rcvd_fis_dma_handle) != 5812 DDI_SUCCESS) { 5813 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5814 "rcvd FIS dma handle alloc failed", NULL); 5815 5816 return (AHCI_FAILURE); 5817 } 5818 5819 if (ddi_dma_mem_alloc(ahci_portp->ahciport_rcvd_fis_dma_handle, 5820 rcvd_fis_size, 5821 &accattr, 5822 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 5823 DDI_DMA_SLEEP, 5824 NULL, 5825 (caddr_t *)&ahci_portp->ahciport_rcvd_fis, 5826 &ret_len, 5827 &ahci_portp->ahciport_rcvd_fis_acc_handle) != NULL) { 5828 5829 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5830 "rcvd FIS dma mem alloc fail", NULL); 5831 /* error.. free the dma handle. */ 5832 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 5833 return (AHCI_FAILURE); 5834 } 5835 5836 if (ddi_dma_addr_bind_handle(ahci_portp->ahciport_rcvd_fis_dma_handle, 5837 NULL, 5838 (caddr_t)ahci_portp->ahciport_rcvd_fis, 5839 rcvd_fis_size, 5840 DDI_DMA_CONSISTENT, 5841 DDI_DMA_SLEEP, 5842 NULL, 5843 &ahci_portp->ahciport_rcvd_fis_dma_cookie, 5844 &cookie_count) != DDI_DMA_MAPPED) { 5845 5846 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5847 "rcvd FIS dma handle bind fail", NULL); 5848 /* error.. free the dma handle & free the memory. */ 5849 ddi_dma_mem_free(&ahci_portp->ahciport_rcvd_fis_acc_handle); 5850 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 5851 return (AHCI_FAILURE); 5852 } 5853 5854 bzero((void *)ahci_portp->ahciport_rcvd_fis, rcvd_fis_size); 5855 5856 /* Config Port Received FIS Base Address */ 5857 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 5858 (uint64_t *)AHCI_PORT_PxFB(ahci_ctlp, port), 5859 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_laddress); 5860 5861 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "64-bit, dma address: 0x%llx", 5862 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_laddress); 5863 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "32-bit, dma address: 0x%x", 5864 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_address); 5865 5866 return (AHCI_SUCCESS); 5867 } 5868 5869 /* 5870 * Deallocates the Received FIS Structure 5871 * 5872 * WARNING!!! ahciport_mutex should be acquired before the function 5873 * is called. 5874 */ 5875 static void 5876 ahci_dealloc_rcvd_fis(ahci_port_t *ahci_portp) 5877 { 5878 /* Unbind the cmd list dma handle first. */ 5879 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_rcvd_fis_dma_handle); 5880 5881 /* Then free the underlying memory. */ 5882 ddi_dma_mem_free(&ahci_portp->ahciport_rcvd_fis_acc_handle); 5883 5884 /* Now free the handle itself. */ 5885 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 5886 } 5887 5888 /* 5889 * Allocates memory for the Command List, which contains up to 32 entries. 5890 * Each entry contains a command header, which is a 32-byte structure that 5891 * includes the pointer to the command table. 5892 * 5893 * WARNING!!! ahciport_mutex should be acquired before the function 5894 * is called. 5895 */ 5896 static int 5897 ahci_alloc_cmd_list(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5898 uint8_t port) 5899 { 5900 size_t cmd_list_size; 5901 size_t ret_len; 5902 uint_t cookie_count; 5903 5904 cmd_list_size = 5905 ahci_ctlp->ahcictl_num_cmd_slots * sizeof (ahci_cmd_header_t); 5906 5907 /* allocate cmd list dma handle. */ 5908 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 5909 &ahci_ctlp->ahcictl_cmd_list_dma_attr, 5910 DDI_DMA_SLEEP, 5911 NULL, 5912 &ahci_portp->ahciport_cmd_list_dma_handle) != DDI_SUCCESS) { 5913 5914 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5915 "cmd list dma handle alloc failed", NULL); 5916 return (AHCI_FAILURE); 5917 } 5918 5919 if (ddi_dma_mem_alloc(ahci_portp->ahciport_cmd_list_dma_handle, 5920 cmd_list_size, 5921 &accattr, 5922 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 5923 DDI_DMA_SLEEP, 5924 NULL, 5925 (caddr_t *)&ahci_portp->ahciport_cmd_list, 5926 &ret_len, 5927 &ahci_portp->ahciport_cmd_list_acc_handle) != NULL) { 5928 5929 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5930 "cmd list dma mem alloc fail", NULL); 5931 /* error.. free the dma handle. */ 5932 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 5933 return (AHCI_FAILURE); 5934 } 5935 5936 if (ddi_dma_addr_bind_handle(ahci_portp->ahciport_cmd_list_dma_handle, 5937 NULL, 5938 (caddr_t)ahci_portp->ahciport_cmd_list, 5939 cmd_list_size, 5940 DDI_DMA_CONSISTENT, 5941 DDI_DMA_SLEEP, 5942 NULL, 5943 &ahci_portp->ahciport_cmd_list_dma_cookie, 5944 &cookie_count) != DDI_DMA_MAPPED) { 5945 5946 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5947 "cmd list dma handle bind fail", NULL); 5948 /* error.. free the dma handle & free the memory. */ 5949 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 5950 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 5951 return (AHCI_FAILURE); 5952 } 5953 5954 bzero((void *)ahci_portp->ahciport_cmd_list, cmd_list_size); 5955 5956 /* Config Port Command List Base Address */ 5957 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 5958 (uint64_t *)AHCI_PORT_PxCLB(ahci_ctlp, port), 5959 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_laddress); 5960 5961 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "64-bit, dma address: 0x%llx", 5962 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_laddress); 5963 5964 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "32-bit, dma address: 0x%x", 5965 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_address); 5966 5967 if (ahci_alloc_cmd_tables(ahci_ctlp, ahci_portp) != AHCI_SUCCESS) { 5968 goto err_out; 5969 } 5970 5971 return (AHCI_SUCCESS); 5972 5973 err_out: 5974 /* Unbind the cmd list dma handle first. */ 5975 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_cmd_list_dma_handle); 5976 5977 /* Then free the underlying memory. */ 5978 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 5979 5980 /* Now free the handle itself. */ 5981 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 5982 5983 return (AHCI_FAILURE); 5984 } 5985 5986 /* 5987 * Deallocates the Command List 5988 * 5989 * WARNING!!! ahciport_mutex should be acquired before the function 5990 * is called. 5991 */ 5992 static void 5993 ahci_dealloc_cmd_list(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 5994 { 5995 /* First dealloc command table */ 5996 ahci_dealloc_cmd_tables(ahci_ctlp, ahci_portp); 5997 5998 /* Unbind the cmd list dma handle first. */ 5999 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_cmd_list_dma_handle); 6000 6001 /* Then free the underlying memory. */ 6002 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 6003 6004 /* Now free the handle itself. */ 6005 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 6006 } 6007 6008 /* 6009 * Allocates memory for all Command Tables, which contains Command FIS, 6010 * ATAPI Command and Physical Region Descriptor Table. 6011 * 6012 * WARNING!!! ahciport_mutex should be acquired before the function 6013 * is called. 6014 */ 6015 static int 6016 ahci_alloc_cmd_tables(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 6017 { 6018 size_t ret_len; 6019 ddi_dma_cookie_t cmd_table_dma_cookie; 6020 uint_t cookie_count; 6021 int slot; 6022 6023 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 6024 "ahci_alloc_cmd_tables: port %d enter", 6025 ahci_portp->ahciport_port_num); 6026 6027 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; slot++) { 6028 /* Allocate cmd table dma handle. */ 6029 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 6030 &ahci_ctlp->ahcictl_cmd_table_dma_attr, 6031 DDI_DMA_SLEEP, 6032 NULL, 6033 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]) != 6034 DDI_SUCCESS) { 6035 6036 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6037 "cmd table dma handle alloc failed", NULL); 6038 6039 goto err_out; 6040 } 6041 6042 if (ddi_dma_mem_alloc( 6043 ahci_portp->ahciport_cmd_tables_dma_handle[slot], 6044 ahci_cmd_table_size, 6045 &accattr, 6046 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 6047 DDI_DMA_SLEEP, 6048 NULL, 6049 (caddr_t *)&ahci_portp->ahciport_cmd_tables[slot], 6050 &ret_len, 6051 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]) != 6052 NULL) { 6053 6054 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6055 "cmd table dma mem alloc fail", NULL); 6056 6057 /* error.. free the dma handle. */ 6058 ddi_dma_free_handle( 6059 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6060 goto err_out; 6061 } 6062 6063 if (ddi_dma_addr_bind_handle( 6064 ahci_portp->ahciport_cmd_tables_dma_handle[slot], 6065 NULL, 6066 (caddr_t)ahci_portp->ahciport_cmd_tables[slot], 6067 ahci_cmd_table_size, 6068 DDI_DMA_CONSISTENT, 6069 DDI_DMA_SLEEP, 6070 NULL, 6071 &cmd_table_dma_cookie, 6072 &cookie_count) != DDI_DMA_MAPPED) { 6073 6074 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6075 "cmd table dma handle bind fail", NULL); 6076 /* error.. free the dma handle & free the memory. */ 6077 ddi_dma_mem_free( 6078 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6079 ddi_dma_free_handle( 6080 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6081 goto err_out; 6082 } 6083 6084 bzero((void *)ahci_portp->ahciport_cmd_tables[slot], 6085 ahci_cmd_table_size); 6086 6087 /* Config Port Command Table Base Address */ 6088 SET_COMMAND_TABLE_BASE_ADDR( 6089 (&ahci_portp->ahciport_cmd_list[slot]), 6090 cmd_table_dma_cookie.dmac_laddress & 0xffffffffull); 6091 6092 #ifndef __lock_lint 6093 SET_COMMAND_TABLE_BASE_ADDR_UPPER( 6094 (&ahci_portp->ahciport_cmd_list[slot]), 6095 cmd_table_dma_cookie.dmac_laddress >> 32); 6096 #endif 6097 } 6098 6099 return (AHCI_SUCCESS); 6100 err_out: 6101 6102 for (slot--; slot >= 0; slot--) { 6103 /* Unbind the cmd table dma handle first */ 6104 (void) ddi_dma_unbind_handle( 6105 ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6106 6107 /* Then free the underlying memory */ 6108 ddi_dma_mem_free( 6109 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6110 6111 /* Now free the handle itself */ 6112 ddi_dma_free_handle( 6113 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6114 } 6115 6116 return (AHCI_FAILURE); 6117 } 6118 6119 /* 6120 * Deallocates memory for all Command Tables. 6121 * 6122 * WARNING!!! ahciport_mutex should be acquired before the function 6123 * is called. 6124 */ 6125 static void 6126 ahci_dealloc_cmd_tables(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 6127 { 6128 int slot; 6129 6130 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 6131 "ahci_dealloc_cmd_tables: %d enter", 6132 ahci_portp->ahciport_port_num); 6133 6134 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; slot++) { 6135 /* Unbind the cmd table dma handle first. */ 6136 (void) ddi_dma_unbind_handle( 6137 ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6138 6139 /* Then free the underlying memory. */ 6140 ddi_dma_mem_free( 6141 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6142 6143 /* Now free the handle itself. */ 6144 ddi_dma_free_handle( 6145 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6146 } 6147 } 6148 6149 /* 6150 * Update SATA registers at controller ports 6151 * 6152 * WARNING!!! ahciport_mutex should be acquired before those functions 6153 * get called. 6154 */ 6155 static void 6156 ahci_update_sata_registers(ahci_ctl_t *ahci_ctlp, uint8_t port, 6157 sata_device_t *sd) 6158 { 6159 sd->satadev_scr.sstatus = 6160 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6161 (uint32_t *)(AHCI_PORT_PxSSTS(ahci_ctlp, port))); 6162 sd->satadev_scr.serror = 6163 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6164 (uint32_t *)(AHCI_PORT_PxSERR(ahci_ctlp, port))); 6165 sd->satadev_scr.scontrol = 6166 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6167 (uint32_t *)(AHCI_PORT_PxSCTL(ahci_ctlp, port))); 6168 sd->satadev_scr.sactive = 6169 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6170 (uint32_t *)(AHCI_PORT_PxSACT(ahci_ctlp, port))); 6171 } 6172 6173 /* 6174 * For poll mode, ahci_port_intr will be called to emulate the interrupt 6175 */ 6176 static void 6177 ahci_port_intr(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, uint8_t port) 6178 { 6179 uint32_t port_intr_status; 6180 uint32_t port_intr_enable; 6181 6182 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6183 "ahci_port_intr enter: port %d", port); 6184 6185 mutex_enter(&ahci_portp->ahciport_mutex); 6186 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_POLLING) { 6187 /* For SATA_OPMODE_POLLING commands */ 6188 port_intr_enable = 6189 (AHCI_INTR_STATUS_DHRS | 6190 AHCI_INTR_STATUS_PSS | 6191 AHCI_INTR_STATUS_SDBS | 6192 AHCI_INTR_STATUS_UFS | 6193 AHCI_INTR_STATUS_PCS | 6194 AHCI_INTR_STATUS_PRCS | 6195 AHCI_INTR_STATUS_OFS | 6196 AHCI_INTR_STATUS_INFS | 6197 AHCI_INTR_STATUS_IFS | 6198 AHCI_INTR_STATUS_HBDS | 6199 AHCI_INTR_STATUS_HBFS | 6200 AHCI_INTR_STATUS_TFES); 6201 } else { 6202 /* 6203 * port_intr_enable indicates that the corresponding interrrupt 6204 * reporting is enabled. 6205 */ 6206 port_intr_enable = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6207 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port)); 6208 } 6209 6210 /* IPMS error in port reset should be ignored according AHCI spec. */ 6211 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_IGNORE_IPMS)) 6212 port_intr_enable |= AHCI_INTR_STATUS_IPMS; 6213 mutex_exit(&ahci_portp->ahciport_mutex); 6214 6215 /* 6216 * port_intr_stats indicates that the corresponding interrupt 6217 * condition is active. 6218 */ 6219 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6220 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 6221 6222 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6223 "ahci_port_intr: port %d, port_intr_status = 0x%x, " 6224 "port_intr_enable = 0x%x", 6225 port, port_intr_status, port_intr_enable); 6226 6227 port_intr_status &= port_intr_enable; 6228 6229 /* First clear the port interrupts status */ 6230 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6231 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 6232 port_intr_status); 6233 6234 /* Check the completed non-queued commands */ 6235 if (port_intr_status & (AHCI_INTR_STATUS_DHRS | 6236 AHCI_INTR_STATUS_PSS)) { 6237 (void) ahci_intr_cmd_cmplt(ahci_ctlp, 6238 ahci_portp, port); 6239 } 6240 6241 /* Check the completed queued commands */ 6242 if (port_intr_status & AHCI_INTR_STATUS_SDBS) { 6243 (void) ahci_intr_set_device_bits(ahci_ctlp, 6244 ahci_portp, port); 6245 } 6246 6247 /* Check the port connect change status interrupt bit */ 6248 if (port_intr_status & AHCI_INTR_STATUS_PCS) { 6249 (void) ahci_intr_port_connect_change(ahci_ctlp, 6250 ahci_portp, port); 6251 } 6252 6253 /* Check the device mechanical presence status interrupt bit */ 6254 if (port_intr_status & AHCI_INTR_STATUS_DMPS) { 6255 (void) ahci_intr_device_mechanical_presence_status( 6256 ahci_ctlp, ahci_portp, port); 6257 } 6258 6259 /* Check the PhyRdy change status interrupt bit */ 6260 if (port_intr_status & AHCI_INTR_STATUS_PRCS) { 6261 (void) ahci_intr_phyrdy_change(ahci_ctlp, ahci_portp, 6262 port); 6263 } 6264 6265 /* 6266 * Check the non-fatal error interrupt bits, there are four 6267 * kinds of non-fatal errors at the time being: 6268 * 6269 * PxIS.UFS - Unknown FIS Error 6270 * PxIS.OFS - Overflow Error 6271 * PxIS.INFS - Interface Non-Fatal Error 6272 * PxIS.IPMS - Incorrect Port Multiplier Status Error 6273 * 6274 * For these non-fatal errors, the HBA can continue to operate, 6275 * so the driver just log the error messages. 6276 */ 6277 if (port_intr_status & (AHCI_INTR_STATUS_UFS | 6278 AHCI_INTR_STATUS_OFS | 6279 AHCI_INTR_STATUS_IPMS | 6280 AHCI_INTR_STATUS_INFS)) { 6281 (void) ahci_intr_non_fatal_error(ahci_ctlp, ahci_portp, 6282 port, port_intr_status); 6283 } 6284 6285 /* 6286 * Check the fatal error interrupt bits, there are four kinds 6287 * of fatal errors for AHCI controllers: 6288 * 6289 * PxIS.HBFS - Host Bus Fatal Error 6290 * PxIS.HBDS - Host Bus Data Error 6291 * PxIS.IFS - Interface Fatal Error 6292 * PxIS.TFES - Task File Error 6293 * 6294 * The fatal error means the HBA can not recover from it by 6295 * itself, and it will try to abort the transfer, and the software 6296 * must intervene to restart the port. 6297 */ 6298 if (port_intr_status & (AHCI_INTR_STATUS_IFS | 6299 AHCI_INTR_STATUS_HBDS | 6300 AHCI_INTR_STATUS_HBFS | 6301 AHCI_INTR_STATUS_TFES)) 6302 (void) ahci_intr_fatal_error(ahci_ctlp, ahci_portp, 6303 port, port_intr_status); 6304 6305 /* Check the cold port detect interrupt bit */ 6306 if (port_intr_status & AHCI_INTR_STATUS_CPDS) { 6307 (void) ahci_intr_cold_port_detect(ahci_ctlp, ahci_portp, port); 6308 } 6309 6310 /* Second clear the corresponding bit in IS.IPS */ 6311 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6312 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp), (0x1 << port)); 6313 } 6314 6315 /* 6316 * Interrupt service handler 6317 */ 6318 static uint_t 6319 ahci_intr(caddr_t arg1, caddr_t arg2) 6320 { 6321 #ifndef __lock_lint 6322 _NOTE(ARGUNUSED(arg2)) 6323 #endif 6324 /* LINTED */ 6325 ahci_ctl_t *ahci_ctlp = (ahci_ctl_t *)arg1; 6326 ahci_port_t *ahci_portp; 6327 int32_t global_intr_status; 6328 uint8_t port; 6329 6330 /* 6331 * global_intr_status indicates that the corresponding port has 6332 * an interrupt pending. 6333 */ 6334 global_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6335 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp)); 6336 6337 if (!(global_intr_status & ahci_ctlp->ahcictl_ports_implemented)) { 6338 /* The interrupt is not ours */ 6339 return (DDI_INTR_UNCLAIMED); 6340 } 6341 6342 /* Loop for all the ports */ 6343 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 6344 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 6345 continue; 6346 } 6347 if (!((0x1 << port) & global_intr_status)) { 6348 continue; 6349 } 6350 6351 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 6352 6353 /* Call ahci_port_intr */ 6354 ahci_port_intr(ahci_ctlp, ahci_portp, port); 6355 } 6356 6357 return (DDI_INTR_CLAIMED); 6358 } 6359 6360 /* 6361 * For non-queued commands, when the corresponding bit in the PxCI register 6362 * is cleared, it means the command is completed successfully. And according 6363 * to the HBA state machine, there are three conditions which possibly will 6364 * try to clear the PxCI register bit. 6365 * 1. Receive one D2H Register FIS which is with 'I' bit set 6366 * 2. Update PIO Setup FIS 6367 * 3. Transmit a command and receive R_OK if CTBA.C is set (software reset) 6368 * 6369 * Process completed non-queued commands when the interrupt status bit - 6370 * AHCI_INTR_STATUS_DHRS or AHCI_INTR_STATUS_PSS is set. 6371 * 6372 * AHCI_INTR_STATUS_DHRS means a D2H Register FIS has been received 6373 * with the 'I' bit set. And the following commands will send thus 6374 * FIS with 'I' bit set upon the successful completion: 6375 * 1. Non-data commands 6376 * 2. DMA data-in command 6377 * 3. DMA data-out command 6378 * 4. PIO data-out command 6379 * 5. PACKET non-data commands 6380 * 6. PACKET PIO data-in command 6381 * 7. PACKET PIO data-out command 6382 * 8. PACKET DMA data-in command 6383 * 9. PACKET DMA data-out command 6384 * 6385 * AHCI_INTR_STATUS_PSS means a PIO Setup FIS has been received 6386 * with the 'I' bit set. And the following commands will send this 6387 * FIS upon the successful completion: 6388 * 1. PIO data-in command 6389 */ 6390 static int 6391 ahci_intr_cmd_cmplt(ahci_ctl_t *ahci_ctlp, 6392 ahci_port_t *ahci_portp, uint8_t port) 6393 { 6394 uint32_t port_cmd_issue = 0; 6395 uint32_t finished_tags; 6396 int finished_slot; 6397 sata_pkt_t *satapkt; 6398 ahci_fis_d2h_register_t *rcvd_fisp; 6399 #if AHCI_DEBUG 6400 ahci_cmd_header_t *cmd_header; 6401 uint32_t cmd_dmacount; 6402 #endif 6403 6404 mutex_enter(&ahci_portp->ahciport_mutex); 6405 6406 if (!ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 6407 !RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) && 6408 !NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 6409 /* 6410 * Spurious interrupt. Nothing to be done. 6411 */ 6412 mutex_exit(&ahci_portp->ahciport_mutex); 6413 return (AHCI_SUCCESS); 6414 } 6415 6416 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6417 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 6418 6419 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 6420 /* Slot 0 is always used during error recovery */ 6421 finished_tags = 0x1 & ~port_cmd_issue; 6422 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 6423 "ahci_intr_cmd_cmplt: port %d the sata pkt for error " 6424 "retrieval is finished, and finished_tags = 0x%x", 6425 port, finished_tags); 6426 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 6427 finished_tags = 0x1 & ~port_cmd_issue; 6428 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 6429 "ahci_intr_cmd_cmplt: port %d the sata pkt for r/w " 6430 "port multiplier is finished, and finished_tags = 0x%x", 6431 port, finished_tags); 6432 6433 } else { 6434 6435 finished_tags = ahci_portp->ahciport_pending_tags & 6436 ~port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp); 6437 } 6438 6439 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6440 "ahci_intr_cmd_cmplt: pending_tags = 0x%x, " 6441 "port_cmd_issue = 0x%x finished_tags = 0x%x", 6442 ahci_portp->ahciport_pending_tags, port_cmd_issue, 6443 finished_tags); 6444 6445 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 6446 (finished_tags == 0x1)) { 6447 satapkt = ahci_portp->ahciport_err_retri_pkt; 6448 ASSERT(satapkt != NULL); 6449 6450 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6451 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6452 "with SATA_PKT_COMPLETED", (void *)satapkt); 6453 6454 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6455 goto out; 6456 } 6457 6458 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) && 6459 (finished_tags == 0x1)) { 6460 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 6461 ASSERT(satapkt != NULL); 6462 6463 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6464 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6465 "with SATA_PKT_COMPLETED", (void *)satapkt); 6466 6467 /* READ PORTMULT need copy out FIS content. */ 6468 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 6469 rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 6470 ahcirf_d2h_register_fis); 6471 satapkt->satapkt_cmd.satacmd_status_reg = 6472 GET_RFIS_STATUS(rcvd_fisp); 6473 ahci_copy_out_regs(&satapkt->satapkt_cmd, rcvd_fisp); 6474 } 6475 6476 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6477 goto out; 6478 } 6479 6480 while (finished_tags) { 6481 finished_slot = ddi_ffs(finished_tags) - 1; 6482 if (finished_slot == -1) { 6483 goto out; 6484 } 6485 6486 satapkt = ahci_portp->ahciport_slot_pkts[finished_slot]; 6487 ASSERT(satapkt != NULL); 6488 #if AHCI_DEBUG 6489 /* 6490 * For non-native queued commands, the PRD byte count field 6491 * shall contain an accurate count of the number of bytes 6492 * transferred for the command before the PxCI bit is cleared 6493 * to '0' for the command. 6494 * 6495 * The purpose of this field is to let software know how many 6496 * bytes transferred for a given operation in order to 6497 * determine if underflow occurred. When issuing native command 6498 * queuing commands, this field should not be used and is not 6499 * required to be valid since in this case underflow is always 6500 * illegal. 6501 * 6502 * For data reads, the HBA will update its PRD byte count with 6503 * the total number of bytes received from the last FIS, and 6504 * may be able to continue normally. For data writes, the 6505 * device will detect an error, and HBA most likely will get 6506 * a fatal error. 6507 * 6508 * Therefore, here just put code to debug part. And please 6509 * refer to the comment above ahci_intr_fatal_error for the 6510 * definition of underflow error. 6511 */ 6512 cmd_dmacount = 6513 ahci_portp->ahciport_prd_bytecounts[finished_slot]; 6514 if (cmd_dmacount) { 6515 cmd_header = 6516 &ahci_portp->ahciport_cmd_list[finished_slot]; 6517 AHCIDBG(AHCIDBG_INTR|AHCIDBG_PRDT, ahci_ctlp, 6518 "ahci_intr_cmd_cmplt: port %d, " 6519 "PRD Byte Count = 0x%x, " 6520 "ahciport_prd_bytecounts = 0x%x", port, 6521 cmd_header->ahcich_prd_byte_count, 6522 cmd_dmacount); 6523 6524 if (cmd_header->ahcich_prd_byte_count != cmd_dmacount) { 6525 AHCIDBG(AHCIDBG_UNDERFLOW, ahci_ctlp, 6526 "ahci_intr_cmd_cmplt: port %d, " 6527 "an underflow occurred", port); 6528 } 6529 } 6530 #endif 6531 6532 /* 6533 * For SATAC_SMART command with SATA_SMART_RETURN_STATUS 6534 * feature, sata_special_regs flag will be set, and the 6535 * driver should copy the status and the other corresponding 6536 * register values in the D2H Register FIS received (It's 6537 * working on Non-data protocol) from the device back to 6538 * the sata_cmd. 6539 * 6540 * For every AHCI port, there is only one Received FIS 6541 * structure, which contains the FISes received from the 6542 * device, So we're trying to copy the content of D2H 6543 * Register FIS in the Received FIS structure back to 6544 * the sata_cmd. 6545 */ 6546 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 6547 rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 6548 ahcirf_d2h_register_fis); 6549 satapkt->satapkt_cmd.satacmd_status_reg = 6550 GET_RFIS_STATUS(rcvd_fisp); 6551 ahci_copy_out_regs(&satapkt->satapkt_cmd, rcvd_fisp); 6552 } 6553 6554 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6555 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6556 "with SATA_PKT_COMPLETED", (void *)satapkt); 6557 6558 CLEAR_BIT(ahci_portp->ahciport_pending_tags, finished_slot); 6559 CLEAR_BIT(finished_tags, finished_slot); 6560 ahci_portp->ahciport_slot_pkts[finished_slot] = NULL; 6561 6562 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6563 } 6564 out: 6565 AHCIDBG(AHCIDBG_PKTCOMP, ahci_ctlp, 6566 "ahci_intr_cmd_cmplt: pending_tags = 0x%x", 6567 ahci_portp->ahciport_pending_tags); 6568 6569 mutex_exit(&ahci_portp->ahciport_mutex); 6570 6571 return (AHCI_SUCCESS); 6572 } 6573 6574 /* 6575 * AHCI_INTR_STATUS_SDBS means a Set Device Bits FIS has been received 6576 * with the 'I' bit set and has been copied into system memory. It will 6577 * be sent under the following situations: 6578 * 6579 * 1. NCQ command is completed 6580 * 6581 * The completion of NCQ commands (READ/WRITE FPDMA QUEUED) is performed 6582 * via the Set Device Bits FIS. When such event is generated, the software 6583 * needs to read PxSACT register and compares the current value to the 6584 * list of commands previously issue by software. ahciport_pending_ncq_tags 6585 * keeps the tags of previously issued commands. 6586 * 6587 * 2. Asynchronous Notification 6588 * 6589 * Asynchronous Notification is a feature in SATA spec 2.6. 6590 * 6591 * 1) ATAPI device will send a signal to the host when media is inserted or 6592 * removed and avoids polling the device for media changes. The signal 6593 * sent to the host is a Set Device Bits FIS with the 'I' and 'N' bits 6594 * set to '1'. At the moment, it's not supported yet. 6595 * 6596 * 2) Port multiplier will send a signal to the host when a hot plug event 6597 * has occured on a port multiplier port. It is used when command based 6598 * switching is employed. This is handled by ahci_intr_pmult_sntf_events() 6599 */ 6600 static int 6601 ahci_intr_set_device_bits(ahci_ctl_t *ahci_ctlp, 6602 ahci_port_t *ahci_portp, uint8_t port) 6603 { 6604 ahci_addr_t addr; 6605 6606 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 6607 "ahci_intr_set_device_bits enter: port %d", port); 6608 6609 /* Initialize HBA port address */ 6610 AHCI_ADDR_SET_PORT(&addr, port); 6611 6612 /* NCQ plug handler */ 6613 (void) ahci_intr_ncq_events(ahci_ctlp, ahci_portp, &addr); 6614 6615 /* Check port multiplier's asynchronous notification events */ 6616 if (ahci_ctlp->ahcictl_cap & AHCI_CAP_SNTF) { 6617 (void) ahci_intr_pmult_sntf_events(ahci_ctlp, 6618 ahci_portp, port); 6619 } 6620 6621 /* ATAPI events is not supported yet */ 6622 6623 return (AHCI_SUCCESS); 6624 } 6625 /* 6626 * NCQ interrupt handler. Called upon a NCQ command is completed. 6627 * Only be called from ahci_intr_set_device_bits(). 6628 * 6629 * WARNING!!! ahciport_mutex should be acquired before the function is 6630 * called. 6631 */ 6632 static int 6633 ahci_intr_ncq_events(ahci_ctl_t *ahci_ctlp, 6634 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 6635 { 6636 uint32_t port_sactive; 6637 uint32_t port_cmd_issue; 6638 uint32_t issued_tags; 6639 int issued_slot; 6640 uint32_t finished_tags; 6641 int finished_slot; 6642 uint8_t port = addrp->aa_port; 6643 sata_pkt_t *satapkt; 6644 6645 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6646 "ahci_intr_set_device_bits enter: port %d", port); 6647 6648 mutex_enter(&ahci_portp->ahciport_mutex); 6649 if (!NCQ_CMD_IN_PROGRESS(ahci_portp)) { 6650 mutex_exit(&ahci_portp->ahciport_mutex); 6651 return (AHCI_SUCCESS); 6652 } 6653 6654 /* 6655 * First the handler got which commands are finished by checking 6656 * PxSACT register 6657 */ 6658 port_sactive = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6659 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 6660 6661 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 6662 ~port_sactive & AHCI_NCQ_SLOT_MASK(ahci_portp); 6663 6664 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6665 "ahci_intr_set_device_bits: port %d pending_ncq_tags = 0x%x " 6666 "port_sactive = 0x%x", port, 6667 ahci_portp->ahciport_pending_ncq_tags, port_sactive); 6668 6669 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6670 "ahci_intr_set_device_bits: finished_tags = 0x%x", finished_tags); 6671 6672 /* 6673 * For NCQ commands, the software can determine which command has 6674 * already been transmitted to the device by checking PxCI register. 6675 */ 6676 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6677 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 6678 6679 issued_tags = ahci_portp->ahciport_pending_tags & 6680 ~port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp); 6681 6682 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6683 "ahci_intr_set_device_bits: port %d pending_tags = 0x%x " 6684 "port_cmd_issue = 0x%x", port, 6685 ahci_portp->ahciport_pending_tags, port_cmd_issue); 6686 6687 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6688 "ahci_intr_set_device_bits: issued_tags = 0x%x", issued_tags); 6689 6690 /* 6691 * Clear ahciport_pending_tags bit when the corresponding command 6692 * is already sent down to the device. 6693 */ 6694 while (issued_tags) { 6695 issued_slot = ddi_ffs(issued_tags) - 1; 6696 if (issued_slot == -1) { 6697 goto next; 6698 } 6699 CLEAR_BIT(ahci_portp->ahciport_pending_tags, issued_slot); 6700 CLEAR_BIT(issued_tags, issued_slot); 6701 } 6702 6703 next: 6704 while (finished_tags) { 6705 finished_slot = ddi_ffs(finished_tags) - 1; 6706 if (finished_slot == -1) { 6707 goto out; 6708 } 6709 6710 /* The command is certainly transmitted to the device */ 6711 ASSERT(!(ahci_portp->ahciport_pending_tags & 6712 (0x1 << finished_slot))); 6713 6714 satapkt = ahci_portp->ahciport_slot_pkts[finished_slot]; 6715 ASSERT(satapkt != NULL); 6716 6717 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6718 "ahci_intr_set_device_bits: sending up pkt 0x%p " 6719 "with SATA_PKT_COMPLETED", (void *)satapkt); 6720 6721 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, finished_slot); 6722 CLEAR_BIT(finished_tags, finished_slot); 6723 ahci_portp->ahciport_slot_pkts[finished_slot] = NULL; 6724 6725 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6726 } 6727 out: 6728 AHCIDBG(AHCIDBG_PKTCOMP|AHCIDBG_NCQ, ahci_ctlp, 6729 "ahci_intr_set_device_bits: port %d " 6730 "pending_ncq_tags = 0x%x pending_tags = 0x%x", 6731 port, ahci_portp->ahciport_pending_ncq_tags, 6732 ahci_portp->ahciport_pending_tags); 6733 6734 mutex_exit(&ahci_portp->ahciport_mutex); 6735 6736 return (AHCI_SUCCESS); 6737 } 6738 6739 /* 6740 * Port multiplier asynchronous notification event handler. Called upon a 6741 * device is hot plugged/pulled. 6742 * 6743 * The async-notification event will only be recorded by ahcipmi_snotif_tags 6744 * here and will be handled by ahci_probe_pmult(). 6745 * 6746 * NOTE: called only from ahci_port_intr(). 6747 */ 6748 static int 6749 ahci_intr_pmult_sntf_events(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 6750 uint8_t port) 6751 { 6752 sata_device_t sdevice; 6753 6754 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 6755 "ahci_intr_pmult_sntf_events enter: port %d ", port); 6756 6757 /* no hot-plug while attaching process */ 6758 mutex_enter(&ahci_ctlp->ahcictl_mutex); 6759 if (ahci_ctlp->ahcictl_flags & AHCI_ATTACH) { 6760 mutex_exit(&ahci_ctlp->ahcictl_mutex); 6761 return (AHCI_SUCCESS); 6762 } 6763 mutex_exit(&ahci_ctlp->ahcictl_mutex); 6764 6765 mutex_enter(&ahci_portp->ahciport_mutex); 6766 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 6767 mutex_exit(&ahci_portp->ahciport_mutex); 6768 return (AHCI_SUCCESS); 6769 } 6770 6771 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 6772 6773 ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags = 6774 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6775 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port)); 6776 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6777 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 6778 AHCI_SNOTIF_CLEAR_ALL); 6779 6780 if (ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags == 0) { 6781 mutex_exit(&ahci_portp->ahciport_mutex); 6782 return (AHCI_SUCCESS); 6783 } 6784 6785 /* Port Multiplier sub-device hot-plug handler */ 6786 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 6787 mutex_exit(&ahci_portp->ahciport_mutex); 6788 return (AHCI_SUCCESS); 6789 } 6790 6791 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_PMULT_SNTF) { 6792 /* Not allowed to re-enter. */ 6793 mutex_exit(&ahci_portp->ahciport_mutex); 6794 return (AHCI_SUCCESS); 6795 } 6796 6797 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_PMULT_SNTF; 6798 6799 /* 6800 * NOTE: 6801 * Even if Asynchronous Notification is supported (and enabled) by 6802 * both controller and the port multiplier, the content of PxSNTF 6803 * register is always set to 0x8000 by async notification event. We 6804 * need to check GSCR[32] on the port multiplier to find out the 6805 * owner of this event. 6806 * This is not accord with SATA spec 2.6 and needs further 6807 * clarification. 6808 */ 6809 /* hot-plug will not reported while reseting. */ 6810 if (ahci_portp->ahciport_reset_in_progress == 1) { 6811 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 6812 "port %d snotif event ignored", port); 6813 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_PMULT_SNTF; 6814 mutex_exit(&ahci_portp->ahciport_mutex); 6815 return (AHCI_SUCCESS); 6816 } 6817 6818 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 6819 "PxSNTF is set to 0x%x by port multiplier", 6820 ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags); 6821 6822 /* 6823 * Now we need do some necessary operation and inform SATA framework 6824 * that link/device events has happened. 6825 */ 6826 bzero((void *)&sdevice, sizeof (sata_device_t)); 6827 sdevice.satadev_addr.cport = ahci_ctlp-> 6828 ahcictl_port_to_cport[port]; 6829 sdevice.satadev_addr.pmport = SATA_PMULT_HOSTPORT; 6830 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 6831 sdevice.satadev_state = SATA_PSTATE_PWRON; 6832 6833 /* Just reject packets, do not stop that port. */ 6834 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 6835 6836 mutex_exit(&ahci_portp->ahciport_mutex); 6837 sata_hba_event_notify( 6838 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 6839 &sdevice, 6840 SATA_EVNT_PMULT_LINK_CHANGED); 6841 mutex_enter(&ahci_portp->ahciport_mutex); 6842 6843 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_PMULT_SNTF; 6844 mutex_exit(&ahci_portp->ahciport_mutex); 6845 6846 return (AHCI_SUCCESS); 6847 } 6848 6849 /* 6850 * 1=Change in Current Connect Status. 0=No change in Current Connect Status. 6851 * This bit reflects the state of PxSERR.DIAG.X. This bit is only cleared 6852 * when PxSERR.DIAG.X is cleared. When PxSERR.DIAG.X is set to one, it 6853 * indicates a COMINIT signal was received. 6854 * 6855 * Hot plug insertion is detected by reception of a COMINIT signal from the 6856 * device. On reception of unsolicited COMINIT, the HBA shall generate a 6857 * COMRESET. If the COMINIT is in responce to a COMRESET, then the HBA shall 6858 * begin the normal communication negotiation sequence as outlined in the 6859 * Serial ATA 1.0a specification. When a COMRESET is sent to the device the 6860 * PxSSTS.DET field shall be cleared to 0h. When a COMINIT is received, the 6861 * PxSSTS.DET field shall be set to 1h. When the communication negotiation 6862 * sequence is complete and PhyRdy is true the PxSSTS.DET field shall be set 6863 * to 3h. Therefore, at the moment the ahci driver is going to check PhyRdy 6864 * to handle hot plug insertion. In this interrupt handler, just do nothing 6865 * but print some log message and clear the bit. 6866 */ 6867 static int 6868 ahci_intr_port_connect_change(ahci_ctl_t *ahci_ctlp, 6869 ahci_port_t *ahci_portp, uint8_t port) 6870 { 6871 #if AHCI_DEBUG 6872 uint32_t port_serror; 6873 #endif 6874 6875 mutex_enter(&ahci_portp->ahciport_mutex); 6876 6877 #if AHCI_DEBUG 6878 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6879 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 6880 6881 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6882 "ahci_intr_port_connect_change: port %d, " 6883 "port_serror = 0x%x", port, port_serror); 6884 #endif 6885 6886 /* Clear PxSERR.DIAG.X to clear the interrupt bit */ 6887 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6888 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 6889 SERROR_EXCHANGED_ERR); 6890 6891 mutex_exit(&ahci_portp->ahciport_mutex); 6892 6893 return (AHCI_SUCCESS); 6894 } 6895 6896 /* 6897 * Hot Plug Operation for platforms that support Mechanical Presence 6898 * Switches. 6899 * 6900 * When set, it indicates that a mechanical presence switch attached to this 6901 * port has been opened or closed, which may lead to a change in the connection 6902 * state of the device. This bit is only valid if both CAP.SMPS and PxCMD.MPSP 6903 * are set to '1'. 6904 * 6905 * At the moment, this interrupt is not needed and disabled and we just log 6906 * the debug message. 6907 */ 6908 static int 6909 ahci_intr_device_mechanical_presence_status(ahci_ctl_t *ahci_ctlp, 6910 ahci_port_t *ahci_portp, uint8_t port) 6911 { 6912 uint32_t cap_status, port_cmd_status; 6913 6914 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6915 "ahci_intr_device_mechanical_presence_status enter, " 6916 "port %d", port); 6917 6918 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6919 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 6920 6921 mutex_enter(&ahci_portp->ahciport_mutex); 6922 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6923 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 6924 6925 if (!(cap_status & AHCI_HBA_CAP_SMPS) || 6926 !(port_cmd_status & AHCI_CMD_STATUS_MPSP)) { 6927 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6928 "CAP.SMPS or PxCMD.MPSP is not set, so just ignore " 6929 "the interrupt: cap_status = 0x%x, " 6930 "port_cmd_status = 0x%x", cap_status, port_cmd_status); 6931 mutex_exit(&ahci_portp->ahciport_mutex); 6932 6933 return (AHCI_SUCCESS); 6934 } 6935 6936 #if AHCI_DEBUG 6937 if (port_cmd_status & AHCI_CMD_STATUS_MPSS) { 6938 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6939 "The mechanical presence switch is open: " 6940 "port %d, port_cmd_status = 0x%x", 6941 port, port_cmd_status); 6942 } else { 6943 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6944 "The mechanical presence switch is close: " 6945 "port %d, port_cmd_status = 0x%x", 6946 port, port_cmd_status); 6947 } 6948 #endif 6949 6950 mutex_exit(&ahci_portp->ahciport_mutex); 6951 6952 return (AHCI_SUCCESS); 6953 } 6954 6955 /* 6956 * Native Hot Plug Support. 6957 * 6958 * When set, it indicates that the internal PHYRDY signal changed state. 6959 * This bit reflects the state of PxSERR.DIAG.N. 6960 * 6961 * There are three kinds of conditions to generate this interrupt event: 6962 * 1. a device is inserted 6963 * 2. a device is disconnected 6964 * 3. when the link enters/exits a Partial or Slumber interface power 6965 * management state 6966 * 6967 * If inteface power management is enabled for a port, the PxSERR.DIAG.N 6968 * bit may be set due to the link entering the Partial or Slumber power 6969 * management state, rather than due to a hot plug insertion or removal 6970 * event. So far, the interface power management is disabled, so the 6971 * driver can reliably get removal detection notification via the 6972 * PxSERR.DIAG.N bit. 6973 */ 6974 static int 6975 ahci_intr_phyrdy_change(ahci_ctl_t *ahci_ctlp, 6976 ahci_port_t *ahci_portp, uint8_t port) 6977 { 6978 uint32_t port_sstatus = 0; /* No dev present & PHY not established. */ 6979 sata_device_t sdevice; 6980 int dev_exists_now = 0; 6981 int dev_existed_previously = 0; 6982 ahci_addr_t port_addr; 6983 6984 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6985 "ahci_intr_phyrdy_change enter, port %d", port); 6986 6987 /* Clear PxSERR.DIAG.N to clear the interrupt bit */ 6988 mutex_enter(&ahci_portp->ahciport_mutex); 6989 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6990 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 6991 SERROR_PHY_RDY_CHG); 6992 mutex_exit(&ahci_portp->ahciport_mutex); 6993 6994 mutex_enter(&ahci_ctlp->ahcictl_mutex); 6995 if ((ahci_ctlp->ahcictl_sata_hba_tran == NULL) || 6996 (ahci_portp == NULL)) { 6997 /* The whole controller setup is not yet done. */ 6998 mutex_exit(&ahci_ctlp->ahcictl_mutex); 6999 return (AHCI_SUCCESS); 7000 } 7001 mutex_exit(&ahci_ctlp->ahcictl_mutex); 7002 7003 mutex_enter(&ahci_portp->ahciport_mutex); 7004 7005 /* SStatus tells the presence of device. */ 7006 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7007 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 7008 7009 if (SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_PHYCOM) { 7010 dev_exists_now = 1; 7011 } 7012 7013 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) { 7014 dev_existed_previously = 1; 7015 } 7016 7017 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_NODEV) { 7018 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_NODEV; 7019 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7020 "ahci_intr_phyrdy_change: port %d " 7021 "AHCI_PORT_FLAG_NODEV is cleared", port); 7022 if (dev_exists_now == 0) 7023 dev_existed_previously = 1; 7024 } 7025 7026 bzero((void *)&sdevice, sizeof (sata_device_t)); 7027 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 7028 sdevice.satadev_addr.qual = SATA_ADDR_CPORT; 7029 sdevice.satadev_addr.pmport = 0; 7030 sdevice.satadev_state = SATA_PSTATE_PWRON; 7031 ahci_portp->ahciport_port_state = SATA_PSTATE_PWRON; 7032 7033 AHCI_ADDR_SET_PORT(&port_addr, port); 7034 7035 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_HOTPLUG; 7036 if (dev_exists_now) { 7037 if (dev_existed_previously) { /* 1 -> 1 */ 7038 /* Things are fine now. The loss was temporary. */ 7039 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7040 "ahci_intr_phyrdy_change port %d " 7041 "device link lost/established", port); 7042 7043 mutex_exit(&ahci_portp->ahciport_mutex); 7044 sata_hba_event_notify( 7045 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7046 &sdevice, 7047 SATA_EVNT_LINK_LOST|SATA_EVNT_LINK_ESTABLISHED); 7048 mutex_enter(&ahci_portp->ahciport_mutex); 7049 7050 } else { /* 0 -> 1 */ 7051 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7052 "ahci_intr_phyrdy_change: port %d " 7053 "device link established", port); 7054 7055 /* 7056 * A new device has been detected. The new device 7057 * might be a port multiplier instead of a drive, so 7058 * we cannot update the signature directly. 7059 */ 7060 (void) ahci_initialize_port(ahci_ctlp, 7061 ahci_portp, &port_addr); 7062 7063 /* Try to start the port */ 7064 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 7065 != AHCI_SUCCESS) { 7066 sdevice.satadev_state |= SATA_PSTATE_FAILED; 7067 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7068 "ahci_intr_phyrdy_change: port %d failed " 7069 "at start port", port); 7070 } 7071 7072 /* Clear the max queue depth for inserted device */ 7073 ahci_portp->ahciport_max_ncq_tags = 0; 7074 7075 mutex_exit(&ahci_portp->ahciport_mutex); 7076 sata_hba_event_notify( 7077 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7078 &sdevice, 7079 SATA_EVNT_LINK_ESTABLISHED); 7080 mutex_enter(&ahci_portp->ahciport_mutex); 7081 7082 } 7083 } else { /* No device exists now */ 7084 7085 if (dev_existed_previously) { /* 1 -> 0 */ 7086 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7087 "ahci_intr_phyrdy_change: port %d " 7088 "device link lost", port); 7089 7090 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 7091 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 7092 ahci_portp, port); 7093 7094 if (ahci_portp->ahciport_device_type == 7095 SATA_DTYPE_PMULT) { 7096 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 7097 } 7098 7099 /* An existing device is lost. */ 7100 ahci_portp->ahciport_device_type = SATA_DTYPE_NONE; 7101 ahci_portp->ahciport_port_state = SATA_STATE_UNKNOWN; 7102 7103 mutex_exit(&ahci_portp->ahciport_mutex); 7104 sata_hba_event_notify( 7105 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7106 &sdevice, 7107 SATA_EVNT_LINK_LOST); 7108 mutex_enter(&ahci_portp->ahciport_mutex); 7109 } 7110 } 7111 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_HOTPLUG; 7112 7113 mutex_exit(&ahci_portp->ahciport_mutex); 7114 7115 return (AHCI_SUCCESS); 7116 } 7117 7118 /* 7119 * PxIS.UFS - Unknown FIS Error 7120 * 7121 * This interrupt event means an unknown FIS was received and has been 7122 * copied into system memory. An unknown FIS is not considered an illegal 7123 * FIS, unless the length received is more than 64 bytes. If an unknown 7124 * FIS arrives with length <= 64 bytes, it is posted and the HBA continues 7125 * normal operation. If the unknown FIS is more than 64 bytes, then it 7126 * won't be posted to memory and PxSERR.ERR.P will be set, which is then 7127 * a fatal error. 7128 * 7129 * PxIS.IPMS - Incorrect Port Multiplier Status 7130 * 7131 * IPMS Indicates that the HBA received a FIS from a device that did not 7132 * have a command outstanding. The IPMS bit may be set during enumeration 7133 * of devices on a Port Multiplier due to the normal Port Multiplier 7134 * enumeration process. It is recommended that IPMS only be used after 7135 * enumeration is complete on the Port Multiplier (copied from spec). 7136 * 7137 * PxIS.OFS - Overflow Error 7138 * 7139 * Command list overflow is defined as software building a command table 7140 * that has fewer total bytes than the transaction given to the device. 7141 * On device writes, the HBA will run out of data, and on reads, there 7142 * will be no room to put the data. 7143 * 7144 * For an overflow on data read, either PIO or DMA, the HBA will set 7145 * PxIS.OFS, and the HBA will do a best effort to continue, and it's a 7146 * non-fatal error when the HBA can continues. Sometimes, it will cause 7147 * a fatal error and need the software to do something. 7148 * 7149 * For an overflow on data write, setting PxIS.OFS is optional for both 7150 * DMA and PIO, and it's a fatal error, and a COMRESET is required by 7151 * software to clean up from this serious error. 7152 * 7153 * PxIS.INFS - Interface Non-Fatal Error 7154 * 7155 * This interrupt event indicates that the HBA encountered an error on 7156 * the Serial ATA interface but was able to continue operation. The kind 7157 * of error usually occurred during a non-Data FIS, and under this condition 7158 * the FIS will be re-transmitted by HBA automatically. 7159 * 7160 * When the FMA is implemented, there should be a stat structure to 7161 * record how many every kind of error happens. 7162 */ 7163 static int 7164 ahci_intr_non_fatal_error(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 7165 uint8_t port, uint32_t intr_status) 7166 { 7167 uint32_t port_serror; 7168 #if AHCI_DEBUG 7169 uint32_t port_cmd_status; 7170 uint32_t port_cmd_issue; 7171 uint32_t port_sactive; 7172 int current_slot; 7173 uint32_t current_tags; 7174 sata_pkt_t *satapkt; 7175 ahci_cmd_header_t *cmd_header; 7176 uint32_t cmd_dmacount; 7177 #endif 7178 7179 mutex_enter(&ahci_portp->ahciport_mutex); 7180 7181 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7182 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 7183 7184 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY|AHCIDBG_ERRS, ahci_ctlp, 7185 "ahci_intr_non_fatal_error: port %d, " 7186 "PxSERR = 0x%x, PxIS = 0x%x ", port, port_serror, intr_status); 7187 7188 ahci_log_serror_message(ahci_ctlp, port, port_serror, 1); 7189 7190 if (intr_status & AHCI_INTR_STATUS_UFS) { 7191 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7192 "ahci port %d has unknown FIS error", port); 7193 7194 /* Clear the interrupt bit by clearing PxSERR.DIAG.F */ 7195 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7196 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 7197 SERROR_FIS_TYPE); 7198 } 7199 7200 #if AHCI_DEBUG 7201 if (intr_status & AHCI_INTR_STATUS_IPMS) { 7202 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci port %d " 7203 "has Incorrect Port Multiplier Status error", port); 7204 } 7205 7206 if (intr_status & AHCI_INTR_STATUS_OFS) { 7207 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7208 "ahci port %d has overflow error", port); 7209 } 7210 7211 if (intr_status & AHCI_INTR_STATUS_INFS) { 7212 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7213 "ahci port %d has interface non fatal error", port); 7214 } 7215 7216 /* 7217 * Record the error occurred command's slot. 7218 */ 7219 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 7220 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 7221 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7222 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7223 7224 current_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 7225 AHCI_CMD_STATUS_CCS_SHIFT; 7226 7227 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 7228 satapkt = ahci_portp->ahciport_err_retri_pkt; 7229 ASSERT(satapkt != NULL); 7230 ASSERT(current_slot == 0); 7231 } else { 7232 satapkt = ahci_portp->ahciport_slot_pkts[current_slot]; 7233 } 7234 7235 if (satapkt != NULL) { 7236 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7237 "ahci_intr_non_fatal_error: pending_tags = 0x%x " 7238 "cmd 0x%x", ahci_portp->ahciport_pending_tags, 7239 satapkt->satapkt_cmd.satacmd_cmd_reg); 7240 7241 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7242 "ahci_intr_non_fatal_error: port %d, " 7243 "satapkt 0x%p is being processed when error occurs", 7244 port, (void *)satapkt); 7245 7246 /* 7247 * PRD Byte Count field of command header is not 7248 * required to reflect the total number of bytes 7249 * transferred when an overflow occurs, so here 7250 * just log the value. 7251 */ 7252 cmd_dmacount = 7253 ahci_portp->ahciport_prd_bytecounts[current_slot]; 7254 if (cmd_dmacount) { 7255 cmd_header = &ahci_portp-> 7256 ahciport_cmd_list[current_slot]; 7257 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7258 "ahci_intr_non_fatal_error: port %d, " 7259 "PRD Byte Count = 0x%x, " 7260 "ahciport_prd_bytecounts = 0x%x", port, 7261 cmd_header->ahcich_prd_byte_count, 7262 cmd_dmacount); 7263 } 7264 } 7265 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 7266 /* 7267 * For queued command, list those command which have already 7268 * been transmitted to the device and still not completed. 7269 */ 7270 port_sactive = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7271 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 7272 7273 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7274 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 7275 7276 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ|AHCIDBG_ERRS, ahci_ctlp, 7277 "ahci_intr_non_fatal_error: pending_ncq_tags = 0x%x " 7278 "port_sactive = 0x%x port_cmd_issue = 0x%x", 7279 ahci_portp->ahciport_pending_ncq_tags, 7280 port_sactive, port_cmd_issue); 7281 7282 current_tags = ahci_portp->ahciport_pending_ncq_tags & 7283 port_sactive & ~port_cmd_issue & 7284 AHCI_NCQ_SLOT_MASK(ahci_portp); 7285 7286 while (current_tags) { 7287 current_slot = ddi_ffs(current_tags) - 1; 7288 if (current_slot == -1) { 7289 goto out; 7290 } 7291 7292 satapkt = ahci_portp->ahciport_slot_pkts[current_slot]; 7293 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ|AHCIDBG_ERRS, 7294 ahci_ctlp, "ahci_intr_non_fatal_error: " 7295 "port %d, satapkt 0x%p is outstanding when " 7296 "error occurs", port, (void *)satapkt); 7297 7298 CLEAR_BIT(current_tags, current_slot); 7299 } 7300 } 7301 out: 7302 #endif 7303 mutex_exit(&ahci_portp->ahciport_mutex); 7304 7305 return (AHCI_SUCCESS); 7306 } 7307 7308 /* 7309 * According to the AHCI spec, the error types include system memory 7310 * errors, interface errors, port multiplier errors, device errors, 7311 * command list overflow, command list underflow, native command 7312 * queuing tag errors and pio data transfer errors. 7313 * 7314 * System memory errors such as target abort, master abort, and parity 7315 * may cause the host to stop, and they are serious errors and needed 7316 * to be recovered with software intervention. When system software 7317 * has given a pointer to the HBA that doesn't exist in physical memory, 7318 * a master/target abort error occurs, and PxIS.HBFS will be set. A 7319 * data error such as CRC or parity occurs, the HBA aborts the transfer 7320 * (if necessary) and PxIS.HBDS will be set. 7321 * 7322 * Interface errors are errors that occur due to electrical issues on 7323 * the interface, or protocol miscommunication between the device and 7324 * HBA, and the respective PxSERR register bit will be set. And PxIS.IFS 7325 * (fatal) or PxIS.INFS (non-fatal) will be set. The conditions that 7326 * causes PxIS.IFS/PxIS.INFS to be set are 7327 * 1. in PxSERR.ERR, P bit is set to '1' 7328 * 2. in PxSERR.DIAG, C or H bit is set to '1' 7329 * 3. PhyRdy drop unexpectly, N bit is set to '1' 7330 * If the error occurred during a non-data FIS, the FIS must be 7331 * retransmitted, and the error is non-fatal and PxIS.INFS is set. If 7332 * the error occurred during a data FIS, the transfer will stop, so 7333 * the error is fatal and PxIS.IFS is set. 7334 * 7335 * When a FIS arrives that updates the taskfile, the HBA checks to see 7336 * if PxTFD.STS.ERR is set. If yes, PxIS.TFES will be set and the HBA 7337 * stops processing any more commands. 7338 * 7339 * Command list overflow is defined as software building a command table 7340 * that has fewer total bytes than the transaction given to the device. 7341 * On device writes, the HBA will run out of data, and on reads, there 7342 * will be no room to put the data. For an overflow on data read, either 7343 * PIO or DMA, the HBA will set PxIS.OFS, and it's a non-fatal error. 7344 * For an overflow on data write, setting PxIS.OFS is optional for both 7345 * DMA and PIO, and a COMRESET is required by software to clean up from 7346 * this serious error. 7347 * 7348 * Command list underflow is defined as software building a command 7349 * table that has more total bytes than the transaction given to the 7350 * device. For data writes, both PIO and DMA, the device will detect 7351 * an error and end the transfer. And these errors are most likely going 7352 * to be fatal errors that will cause the port to be restarted. For 7353 * data reads, the HBA updates its PRD byte count, and may be 7354 * able to continue normally, but is not required to. And The HBA is 7355 * not required to detect underflow conditions for native command 7356 * queuing command. 7357 * 7358 * The HBA does not actively check incoming DMA Setup FISes to ensure 7359 * that the PxSACT register bit for that slot is set. Existing error 7360 * mechanisms, such as host bus failure, or bad protocol, are used to 7361 * recover from this case. 7362 * 7363 * In accordance with Serial ATA 1.0a, DATA FISes prior to the final 7364 * DATA FIS must be an integral number of Dwords. If the HBA receives 7365 * a request which is not an integral number of Dwords, the HBA 7366 * set PxSERR.ERR.P to '1', set PxIS.IFS to '1' and stop running until 7367 * software restarts the port. And the HBA ensures that the size 7368 * of the DATA FIS received during a PIO command matches the size in 7369 * the Transfer Cound field of the preceding PIO Setup FIS, if not, the 7370 * HBA sets PxSERR.ERR.P to '1', set PxIS.IFS to '1', and then 7371 * stop running until software restarts the port. 7372 */ 7373 /* 7374 * the fatal errors include PxIS.IFS, PxIS.HBDS, PxIS.HBFS and PxIS.TFES. 7375 * 7376 * PxIS.IFS indicates that the hba encountered an error on the serial ata 7377 * interface which caused the transfer to stop. 7378 * 7379 * PxIS.HBDS indicates that the hba encountered a data error 7380 * (uncorrectable ecc/parity) when reading from or writing to system memory. 7381 * 7382 * PxIS.HBFS indicates that the hba encountered a host bus error that it 7383 * cannot recover from, such as a bad software pointer. 7384 * 7385 * PxIS.TFES is set whenever the status register is updated by the device 7386 * and the error bit (bit 0) is set. 7387 */ 7388 static int 7389 ahci_intr_fatal_error(ahci_ctl_t *ahci_ctlp, 7390 ahci_port_t *ahci_portp, uint8_t port, uint32_t intr_status) 7391 { 7392 uint32_t port_cmd_status; 7393 uint32_t port_serror; 7394 uint32_t task_file_status; 7395 int failed_slot; 7396 sata_pkt_t *spkt = NULL; 7397 uint8_t err_byte; 7398 ahci_event_arg_t *args; 7399 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 7400 7401 mutex_enter(&ahci_portp->ahciport_mutex); 7402 7403 /* 7404 * ahci_intr_phyrdy_change() may have rendered it to 7405 * SATA_DTYPE_NONE. 7406 */ 7407 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 7408 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 7409 "ahci_intr_fatal_error: port %d no device attached, " 7410 "and just return without doing anything", port); 7411 goto out0; 7412 } 7413 7414 if (intr_status & AHCI_INTR_STATUS_TFES) { 7415 task_file_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7416 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 7417 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7418 "ahci_intr_fatal_error: port %d " 7419 "task_file_status = 0x%x", port, task_file_status); 7420 } 7421 7422 /* 7423 * Here we just log the fatal error info in interrupt context. 7424 * Misc recovery processing will be handled in task queue. 7425 */ 7426 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 7427 /* 7428 * Read PxCMD.CCS to determine the slot that the HBA 7429 * was processing when the error occurred. 7430 */ 7431 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7432 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7433 failed_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 7434 AHCI_CMD_STATUS_CCS_SHIFT; 7435 7436 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 7437 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7438 "ahci_intr_fatal_error: spkt 0x%p is being processed when " 7439 "fatal error occurred for port %d", spkt, port); 7440 7441 /* A Task File Data error. */ 7442 if (intr_status & AHCI_INTR_STATUS_TFES) { 7443 err_byte = (task_file_status & AHCI_TFD_ERR_MASK) 7444 >> AHCI_TFD_ERR_SHIFT; 7445 7446 /* 7447 * Won't emit the error message if it is an IDENTIFY 7448 * DEVICE command sent to an ATAPI device. 7449 */ 7450 if ((spkt != NULL) && 7451 (spkt->satapkt_cmd.satacmd_cmd_reg == 7452 SATAC_ID_DEVICE) && 7453 (err_byte == SATA_ERROR_ABORT)) 7454 goto out1; 7455 7456 /* 7457 * Won't emit the error message if it is an ATAPI PACKET 7458 * command 7459 */ 7460 if ((spkt != NULL) && 7461 (spkt->satapkt_cmd.satacmd_cmd_reg == SATAC_PACKET)) 7462 goto out1; 7463 } 7464 } 7465 7466 /* print the fatal error type */ 7467 ahci_log_fatal_error_message(ahci_ctlp, port, intr_status); 7468 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7469 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 7470 7471 /* print PxSERR related error message */ 7472 ahci_log_serror_message(ahci_ctlp, port, port_serror, 0); 7473 7474 /* print task file register value */ 7475 if (intr_status & AHCI_INTR_STATUS_TFES) { 7476 cmn_err(CE_WARN, "!ahci%d: ahci port %d task_file_status " 7477 "= 0x%x", instance, port, task_file_status); 7478 } 7479 7480 out1: 7481 /* Prepare the argument for the taskq */ 7482 args = ahci_portp->ahciport_event_args; 7483 args->ahciea_ctlp = (void *)ahci_ctlp; 7484 args->ahciea_portp = (void *)ahci_portp; 7485 args->ahciea_event = intr_status; 7486 AHCI_ADDR_SET_PORT((ahci_addr_t *)args->ahciea_addrp, port); 7487 7488 /* Start the taskq to handle error recovery */ 7489 if ((ddi_taskq_dispatch(ahci_portp->ahciport_event_taskq, 7490 ahci_events_handler, 7491 (void *)args, DDI_NOSLEEP)) != DDI_SUCCESS) { 7492 cmn_err(CE_WARN, "!ahci%d: ahci start taskq for event handler " 7493 "failed", instance); 7494 } 7495 out0: 7496 mutex_exit(&ahci_portp->ahciport_mutex); 7497 7498 return (AHCI_SUCCESS); 7499 } 7500 7501 /* 7502 * Hot Plug Operation for platforms that support Cold Presence Detect. 7503 * 7504 * When set, a device status has changed as detected by the cold presence 7505 * detect logic. This bit can either be set due to a non-connected port 7506 * receiving a device, or a connected port having its device removed. 7507 * This bit is only valid if the port supports cold presence detect as 7508 * indicated by PxCMD.CPD set to '1'. 7509 * 7510 * At the moment, this interrupt is not needed and disabled and we just 7511 * log the debug message. 7512 */ 7513 static int 7514 ahci_intr_cold_port_detect(ahci_ctl_t *ahci_ctlp, 7515 ahci_port_t *ahci_portp, uint8_t port) 7516 { 7517 uint32_t port_cmd_status; 7518 sata_device_t sdevice; 7519 7520 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7521 "ahci_intr_cold_port_detect enter, port %d", port); 7522 7523 mutex_enter(&ahci_portp->ahciport_mutex); 7524 7525 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7526 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7527 if (!(port_cmd_status & AHCI_CMD_STATUS_CPD)) { 7528 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7529 "port %d does not support cold presence detect, so " 7530 "we just ignore this interrupt", port); 7531 mutex_exit(&ahci_portp->ahciport_mutex); 7532 return (AHCI_SUCCESS); 7533 } 7534 7535 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7536 "port %d device status has changed", port); 7537 7538 bzero((void *)&sdevice, sizeof (sata_device_t)); 7539 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 7540 sdevice.satadev_addr.qual = SATA_ADDR_CPORT; 7541 sdevice.satadev_addr.pmport = 0; 7542 sdevice.satadev_state = SATA_PSTATE_PWRON; 7543 7544 if (port_cmd_status & AHCI_CMD_STATUS_CPS) { 7545 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7546 "port %d: a device is hot plugged", port); 7547 mutex_exit(&ahci_portp->ahciport_mutex); 7548 sata_hba_event_notify( 7549 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7550 &sdevice, 7551 SATA_EVNT_DEVICE_ATTACHED); 7552 mutex_enter(&ahci_portp->ahciport_mutex); 7553 7554 } else { 7555 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7556 "port %d: a device is hot unplugged", port); 7557 mutex_exit(&ahci_portp->ahciport_mutex); 7558 sata_hba_event_notify( 7559 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7560 &sdevice, 7561 SATA_EVNT_DEVICE_DETACHED); 7562 mutex_enter(&ahci_portp->ahciport_mutex); 7563 } 7564 7565 mutex_exit(&ahci_portp->ahciport_mutex); 7566 7567 return (AHCI_SUCCESS); 7568 } 7569 7570 /* 7571 * Enable the interrupts for a particular port. 7572 * 7573 * WARNING!!! ahciport_mutex should be acquired before the function 7574 * is called. 7575 */ 7576 static void 7577 ahci_enable_port_intrs(ahci_ctl_t *ahci_ctlp, uint8_t port) 7578 { 7579 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 7580 "ahci_enable_port_intrs enter, port %d", port); 7581 7582 /* 7583 * Clear port interrupt status before enabling interrupt 7584 */ 7585 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7586 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 7587 AHCI_PORT_INTR_MASK); 7588 7589 /* 7590 * Clear the pending bit from IS.IPS 7591 */ 7592 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7593 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp), (1 << port)); 7594 7595 /* 7596 * Enable the following interrupts: 7597 * Device to Host Register FIS Interrupt (DHRS) 7598 * PIO Setup FIS Interrupt (PSS) 7599 * Set Device Bits Interrupt (SDBS) 7600 * Unknown FIS Interrupt (UFS) 7601 * Port Connect Change Status (PCS) 7602 * PhyRdy Change Status (PRCS) 7603 * Overflow Status (OFS) 7604 * Interface Non-fatal Error Status (INFS) 7605 * Interface Fatal Error Status (IFS) 7606 * Host Bus Data Error Status (HBDS) 7607 * Host Bus Fatal Error Status (HBFS) 7608 * Task File Error Status (TFES) 7609 */ 7610 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7611 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 7612 (AHCI_INTR_STATUS_DHRS | 7613 AHCI_INTR_STATUS_PSS | 7614 AHCI_INTR_STATUS_SDBS | 7615 AHCI_INTR_STATUS_UFS | 7616 AHCI_INTR_STATUS_DPS | 7617 AHCI_INTR_STATUS_PCS | 7618 AHCI_INTR_STATUS_PRCS | 7619 AHCI_INTR_STATUS_OFS | 7620 AHCI_INTR_STATUS_INFS | 7621 AHCI_INTR_STATUS_IFS | 7622 AHCI_INTR_STATUS_HBDS | 7623 AHCI_INTR_STATUS_HBFS | 7624 AHCI_INTR_STATUS_TFES)); 7625 } 7626 7627 /* 7628 * Enable interrupts for all the ports. 7629 * 7630 * WARNING!!! ahcictl_mutex should be acquired before the function 7631 * is called. 7632 */ 7633 static void 7634 ahci_enable_all_intrs(ahci_ctl_t *ahci_ctlp) 7635 { 7636 uint32_t ghc_control; 7637 7638 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_enable_all_intrs enter", NULL); 7639 7640 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7641 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 7642 7643 ghc_control |= AHCI_HBA_GHC_IE; 7644 7645 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7646 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 7647 } 7648 7649 /* 7650 * Disable interrupts for a particular port. 7651 * 7652 * WARNING!!! ahciport_mutex should be acquired before the function 7653 * is called. 7654 */ 7655 static void 7656 ahci_disable_port_intrs(ahci_ctl_t *ahci_ctlp, uint8_t port) 7657 { 7658 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 7659 "ahci_disable_port_intrs enter, port %d", port); 7660 7661 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7662 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 0); 7663 } 7664 7665 /* 7666 * Disable interrupts for the whole HBA. 7667 * 7668 * The global bit is cleared, then all interrupt sources from all 7669 * ports are disabled. 7670 * 7671 * WARNING!!! ahcictl_mutex should be acquired before the function 7672 * is called. 7673 */ 7674 static void 7675 ahci_disable_all_intrs(ahci_ctl_t *ahci_ctlp) 7676 { 7677 uint32_t ghc_control; 7678 7679 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_disable_all_intrs enter", 7680 NULL); 7681 7682 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7683 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 7684 7685 ghc_control &= ~ AHCI_HBA_GHC_IE; 7686 7687 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7688 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 7689 } 7690 7691 /* 7692 * Handle FIXED or MSI interrupts. 7693 */ 7694 /* 7695 * According to AHCI spec, the HBA may support several interrupt modes: 7696 * * pin based interrupts (FIXED) 7697 * * single MSI message interrupts 7698 * * multiple MSI based message interrupts 7699 * 7700 * For pin based interrupts, the software interrupt handler need to check IS 7701 * register to find out which port has pending interrupts. And then check 7702 * PxIS register to find out which interrupt events happened on that port. 7703 * 7704 * For single MSI message interrupts, MSICAP.MC.MSIE is set with '1', and 7705 * MSICAP.MC.MME is set with '0'. This mode is similar to pin based interrupts 7706 * in that software interrupt handler need to check IS register to determine 7707 * which port triggered the interrupts since it uses a single message for all 7708 * port interrupts. 7709 * 7710 * HBA may optionally support multiple MSI message for better performance. In 7711 * this mode, each port may have its own interrupt message, and thus generation 7712 * of interrupts is no longer controlled through the IS register. MSICAP.MC.MMC 7713 * represents a power-of-2 wrapper on the number of implemented ports, and 7714 * the mapping of ports to interrupts is done in a 1-1 relationship, up to the 7715 * maximum number of assigned interrupts. When the number of MSI messages 7716 * allocated is less than the number requested, then hardware may have two 7717 * implementation behaviors: 7718 * * assign each ports its own interrupt and then force all additional 7719 * ports to share the last interrupt message, and this condition is 7720 * indicated by clearing GHC.MRSM to '0' 7721 * * revert to single MSI mode, indicated by setting GHC.MRSM to '1' 7722 * When multiple-message MSI is enabled, hardware will still set IS register 7723 * as single message case. And this IS register may be used by software when 7724 * fewer than the requested number of messages is granted in order to determine 7725 * which port had the interrupt. 7726 * 7727 * Note: The current ahci driver only supports the first two interrupt modes: 7728 * pin based interrupts and single MSI message interrupts, and the reason 7729 * is indicated in below code. 7730 */ 7731 static int 7732 ahci_add_intrs(ahci_ctl_t *ahci_ctlp, int intr_type) 7733 { 7734 dev_info_t *dip = ahci_ctlp->ahcictl_dip; 7735 int count, avail, actual; 7736 int i, rc; 7737 7738 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 7739 "ahci_add_intrs enter interrupt type 0x%x", intr_type); 7740 7741 /* get number of interrupts. */ 7742 rc = ddi_intr_get_nintrs(dip, intr_type, &count); 7743 if ((rc != DDI_SUCCESS) || (count == 0)) { 7744 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7745 "ddi_intr_get_nintrs() failed, " 7746 "rc %d count %d\n", rc, count); 7747 return (DDI_FAILURE); 7748 } 7749 7750 /* get number of available interrupts. */ 7751 rc = ddi_intr_get_navail(dip, intr_type, &avail); 7752 if ((rc != DDI_SUCCESS) || (avail == 0)) { 7753 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7754 "ddi_intr_get_navail() failed, " 7755 "rc %d avail %d\n", rc, avail); 7756 return (DDI_FAILURE); 7757 } 7758 7759 #if AHCI_DEBUG 7760 if (avail < count) { 7761 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7762 "ddi_intr_get_nintrs returned %d, navail() returned %d", 7763 count, avail); 7764 } 7765 #endif 7766 7767 /* 7768 * Note: So far Solaris restricts the maximum number of messages for 7769 * x86 to 2, that is avail is 2, so here we set the count with 1 to 7770 * force the driver to use single MSI message interrupt. In future if 7771 * Solaris remove the restriction, then we need to delete the below 7772 * code and try to use multiple interrupt routine to gain better 7773 * performance. 7774 */ 7775 if ((intr_type == DDI_INTR_TYPE_MSI) && (count > 1)) { 7776 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7777 "force to use one interrupt routine though the " 7778 "HBA supports %d interrupt", count); 7779 count = 1; 7780 } 7781 7782 /* Allocate an array of interrupt handles. */ 7783 ahci_ctlp->ahcictl_intr_size = count * sizeof (ddi_intr_handle_t); 7784 ahci_ctlp->ahcictl_intr_htable = 7785 kmem_alloc(ahci_ctlp->ahcictl_intr_size, KM_SLEEP); 7786 7787 /* call ddi_intr_alloc(). */ 7788 rc = ddi_intr_alloc(dip, ahci_ctlp->ahcictl_intr_htable, 7789 intr_type, 0, count, &actual, DDI_INTR_ALLOC_NORMAL); 7790 7791 if ((rc != DDI_SUCCESS) || (actual == 0)) { 7792 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7793 "ddi_intr_alloc() failed, rc %d count %d actual %d " 7794 "avail %d\n", rc, count, actual, avail); 7795 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7796 ahci_ctlp->ahcictl_intr_size); 7797 return (DDI_FAILURE); 7798 } 7799 7800 /* use interrupt count returned */ 7801 #if AHCI_DEBUG 7802 if (actual < count) { 7803 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7804 "Requested: %d, Received: %d", count, actual); 7805 } 7806 #endif 7807 7808 ahci_ctlp->ahcictl_intr_cnt = actual; 7809 7810 /* 7811 * Get priority for first, assume remaining are all the same. 7812 */ 7813 if (ddi_intr_get_pri(ahci_ctlp->ahcictl_intr_htable[0], 7814 &ahci_ctlp->ahcictl_intr_pri) != DDI_SUCCESS) { 7815 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7816 "ddi_intr_get_pri() failed", NULL); 7817 7818 /* Free already allocated intr. */ 7819 for (i = 0; i < actual; i++) { 7820 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[i]); 7821 } 7822 7823 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7824 ahci_ctlp->ahcictl_intr_size); 7825 return (DDI_FAILURE); 7826 } 7827 7828 /* Test for high level interrupt. */ 7829 if (ahci_ctlp->ahcictl_intr_pri >= ddi_intr_get_hilevel_pri()) { 7830 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7831 "ahci_add_intrs: Hi level intr not supported", NULL); 7832 7833 /* Free already allocated intr. */ 7834 for (i = 0; i < actual; i++) { 7835 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[i]); 7836 } 7837 7838 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7839 sizeof (ddi_intr_handle_t)); 7840 7841 return (DDI_FAILURE); 7842 } 7843 7844 /* Call ddi_intr_add_handler(). */ 7845 for (i = 0; i < actual; i++) { 7846 if (ddi_intr_add_handler(ahci_ctlp->ahcictl_intr_htable[i], 7847 ahci_intr, (caddr_t)ahci_ctlp, NULL) != DDI_SUCCESS) { 7848 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7849 "ddi_intr_add_handler() failed", NULL); 7850 7851 /* Free already allocated intr. */ 7852 for (i = 0; i < actual; i++) { 7853 (void) ddi_intr_free( 7854 ahci_ctlp->ahcictl_intr_htable[i]); 7855 } 7856 7857 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7858 ahci_ctlp->ahcictl_intr_size); 7859 return (DDI_FAILURE); 7860 } 7861 } 7862 7863 if (ddi_intr_get_cap(ahci_ctlp->ahcictl_intr_htable[0], 7864 &ahci_ctlp->ahcictl_intr_cap) != DDI_SUCCESS) { 7865 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7866 "ddi_intr_get_cap() failed", NULL); 7867 7868 /* Free already allocated intr. */ 7869 for (i = 0; i < actual; i++) { 7870 (void) ddi_intr_free( 7871 ahci_ctlp->ahcictl_intr_htable[i]); 7872 } 7873 7874 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7875 ahci_ctlp->ahcictl_intr_size); 7876 return (DDI_FAILURE); 7877 } 7878 7879 if (ahci_ctlp->ahcictl_intr_cap & DDI_INTR_FLAG_BLOCK) { 7880 /* Call ddi_intr_block_enable() for MSI. */ 7881 (void) ddi_intr_block_enable(ahci_ctlp->ahcictl_intr_htable, 7882 ahci_ctlp->ahcictl_intr_cnt); 7883 } else { 7884 /* Call ddi_intr_enable() for FIXED or MSI non block enable. */ 7885 for (i = 0; i < ahci_ctlp->ahcictl_intr_cnt; i++) { 7886 (void) ddi_intr_enable( 7887 ahci_ctlp->ahcictl_intr_htable[i]); 7888 } 7889 } 7890 7891 return (DDI_SUCCESS); 7892 } 7893 7894 /* 7895 * Removes the registered interrupts irrespective of whether they 7896 * were legacy or MSI. 7897 * 7898 * WARNING!!! The controller interrupts must be disabled before calling 7899 * this routine. 7900 */ 7901 static void 7902 ahci_rem_intrs(ahci_ctl_t *ahci_ctlp) 7903 { 7904 int x; 7905 7906 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_rem_intrs entered", NULL); 7907 7908 /* Disable all interrupts. */ 7909 if ((ahci_ctlp->ahcictl_intr_type == DDI_INTR_TYPE_MSI) && 7910 (ahci_ctlp->ahcictl_intr_cap & DDI_INTR_FLAG_BLOCK)) { 7911 /* Call ddi_intr_block_disable(). */ 7912 (void) ddi_intr_block_disable(ahci_ctlp->ahcictl_intr_htable, 7913 ahci_ctlp->ahcictl_intr_cnt); 7914 } else { 7915 for (x = 0; x < ahci_ctlp->ahcictl_intr_cnt; x++) { 7916 (void) ddi_intr_disable( 7917 ahci_ctlp->ahcictl_intr_htable[x]); 7918 } 7919 } 7920 7921 /* Call ddi_intr_remove_handler(). */ 7922 for (x = 0; x < ahci_ctlp->ahcictl_intr_cnt; x++) { 7923 (void) ddi_intr_remove_handler( 7924 ahci_ctlp->ahcictl_intr_htable[x]); 7925 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[x]); 7926 } 7927 7928 kmem_free(ahci_ctlp->ahcictl_intr_htable, ahci_ctlp->ahcictl_intr_size); 7929 } 7930 7931 /* 7932 * This routine tries to put port into P:NotRunning state by clearing 7933 * PxCMD.ST. HBA will clear PxCI to 0h, PxSACT to 0h, PxCMD.CCS to 0h 7934 * and PxCMD.CR to '0'. 7935 * 7936 * WARNING!!! ahciport_mutex should be acquired before the function 7937 * is called. 7938 */ 7939 static int 7940 ahci_put_port_into_notrunning_state(ahci_ctl_t *ahci_ctlp, 7941 ahci_port_t *ahci_portp, uint8_t port) 7942 { 7943 uint32_t port_cmd_status; 7944 int loop_count; 7945 7946 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 7947 "ahci_put_port_into_notrunning_state enter: port %d", port); 7948 7949 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7950 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7951 7952 port_cmd_status &= ~AHCI_CMD_STATUS_ST; 7953 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7954 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), port_cmd_status); 7955 7956 /* Wait until PxCMD.CR is cleared */ 7957 loop_count = 0; 7958 do { 7959 port_cmd_status = 7960 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7961 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7962 7963 if (loop_count++ > AHCI_POLLRATE_PORT_IDLE) { 7964 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 7965 "clearing port %d CMD.CR timeout, " 7966 "port_cmd_status = 0x%x", port, 7967 port_cmd_status); 7968 /* 7969 * We are effectively timing out after 0.5 sec. 7970 * This value is specified in AHCI spec. 7971 */ 7972 break; 7973 } 7974 7975 /* Wait for 10 millisec */ 7976 drv_usecwait(AHCI_10MS_USECS); 7977 } while (port_cmd_status & AHCI_CMD_STATUS_CR); 7978 7979 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_STARTED; 7980 7981 if (port_cmd_status & AHCI_CMD_STATUS_CR) { 7982 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 7983 "ahci_put_port_into_notrunning_state: failed to clear " 7984 "PxCMD.CR to '0' after loop count: %d, and " 7985 "port_cmd_status = 0x%x", loop_count, port_cmd_status); 7986 return (AHCI_FAILURE); 7987 } else { 7988 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 7989 "ahci_put_port_into_notrunning_state: succeeded to clear " 7990 "PxCMD.CR to '0' after loop count: %d, and " 7991 "port_cmd_status = 0x%x", loop_count, port_cmd_status); 7992 return (AHCI_SUCCESS); 7993 } 7994 } 7995 7996 /* 7997 * First clear PxCMD.ST, and then check PxTFD. If both PxTFD.STS.BSY 7998 * and PxTFD.STS.DRQ cleared to '0', it means the device is in a 7999 * stable state, then set PxCMD.ST to '1' to start the port directly. 8000 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue a 8001 * COMRESET to the device to put it in an idle state. 8002 * 8003 * The fifth argument returns whether the port reset is involved during 8004 * the process. 8005 * 8006 * The routine will be called under following scenarios: 8007 * + To reset the HBA 8008 * + To abort the packet(s) 8009 * + To reset the port 8010 * + To activate the port 8011 * + Fatal error recovery 8012 * + To abort the timeout packet(s) 8013 * 8014 * WARNING!!! ahciport_mutex should be acquired before the function 8015 * is called. And ahciport_mutex will be released before the reset 8016 * event is reported to sata module by calling sata_hba_event_notify, 8017 * and then be acquired again later. 8018 * 8019 * NOTES!!! During this procedure, PxSERR register will be cleared, and 8020 * according to the spec, the clearance of three bits will also clear 8021 * three interrupt status bits. 8022 * 1. PxSERR.DIAG.F will clear PxIS.UFS 8023 * 2. PxSERR.DIAG.X will clear PxIS.PCS 8024 * 3. PxSERR.DIAG.N will clear PxIS.PRCS 8025 * 8026 * Among these three interrupt events, the driver needs to take care of 8027 * PxIS.PRCS, which is the hot plug event. When the driver found out 8028 * a device was unplugged, it will call the interrupt handler. 8029 */ 8030 static int 8031 ahci_restart_port_wait_till_ready(ahci_ctl_t *ahci_ctlp, 8032 ahci_port_t *ahci_portp, uint8_t port, int flag, int *reset_flag) 8033 { 8034 uint32_t port_sstatus; 8035 uint32_t task_file_status; 8036 sata_device_t sdevice; 8037 int rval; 8038 ahci_addr_t addr_port; 8039 ahci_pmult_info_t *pminfo = NULL; 8040 int dev_exists_begin = 0; 8041 int dev_exists_end = 0; 8042 uint32_t previous_dev_type = ahci_portp->ahciport_device_type; 8043 int npmport = 0; 8044 uint8_t cport = ahci_ctlp->ahcictl_port_to_cport[port]; 8045 8046 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8047 "ahci_restart_port_wait_till_ready: port %d enter", port); 8048 8049 AHCI_ADDR_SET_PORT(&addr_port, port); 8050 8051 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) 8052 dev_exists_begin = 1; 8053 8054 /* First clear PxCMD.ST */ 8055 rval = ahci_put_port_into_notrunning_state(ahci_ctlp, ahci_portp, 8056 port); 8057 if (rval != AHCI_SUCCESS) 8058 /* 8059 * If PxCMD.CR does not clear within a reasonable time, it 8060 * may assume the interface is in a hung condition and may 8061 * continue with issuing the port reset. 8062 */ 8063 goto reset; 8064 8065 /* Then clear PxSERR */ 8066 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8067 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 8068 AHCI_SERROR_CLEAR_ALL); 8069 8070 /* Then get PxTFD */ 8071 task_file_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8072 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 8073 8074 /* 8075 * Check whether the device is in a stable status, if yes, 8076 * then start the port directly. However for ahci_tran_reset_dport, 8077 * we may have to perform a port reset. 8078 */ 8079 if (!(task_file_status & (AHCI_TFD_STS_BSY | AHCI_TFD_STS_DRQ)) && 8080 !(flag & AHCI_PORT_RESET)) 8081 goto out; 8082 8083 reset: 8084 /* 8085 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue 8086 * a COMRESET to the device 8087 */ 8088 ahci_disable_port_intrs(ahci_ctlp, port); 8089 rval = ahci_port_reset(ahci_ctlp, ahci_portp, &addr_port); 8090 ahci_enable_port_intrs(ahci_ctlp, port); 8091 8092 #ifdef AHCI_DEBUG 8093 if (rval != AHCI_SUCCESS) 8094 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8095 "ahci_restart_port_wait_till_ready: port %d failed", 8096 port); 8097 #endif 8098 8099 if (reset_flag != NULL) 8100 *reset_flag = 1; 8101 8102 /* Indicate to the framework that a reset has happened. */ 8103 if ((ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) && 8104 (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) && 8105 !(flag & AHCI_RESET_NO_EVENTS_UP)) { 8106 /* Set the reset in progress flag */ 8107 ahci_portp->ahciport_reset_in_progress = 1; 8108 8109 bzero((void *)&sdevice, sizeof (sata_device_t)); 8110 sdevice.satadev_addr.cport = 8111 ahci_ctlp->ahcictl_port_to_cport[port]; 8112 sdevice.satadev_addr.pmport = 0; 8113 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8114 8115 sdevice.satadev_state = SATA_DSTATE_RESET | 8116 SATA_DSTATE_PWR_ACTIVE; 8117 if (ahci_ctlp->ahcictl_sata_hba_tran) { 8118 mutex_exit(&ahci_portp->ahciport_mutex); 8119 sata_hba_event_notify( 8120 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 8121 &sdevice, 8122 SATA_EVNT_DEVICE_RESET); 8123 mutex_enter(&ahci_portp->ahciport_mutex); 8124 } 8125 8126 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 8127 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 8128 } else { 8129 ahci_portp->ahciport_reset_in_progress = 0; 8130 } 8131 8132 out: 8133 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8134 8135 /* SStatus tells the presence of device. */ 8136 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8137 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 8138 8139 if (SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_PHYCOM) { 8140 dev_exists_end = 1; 8141 } 8142 8143 if (dev_exists_begin == 0 && dev_exists_end == 0) /* 0 -> 0 */ 8144 return (rval); 8145 8146 /* Check whether a hot plug event happened */ 8147 if (dev_exists_begin == 1 && dev_exists_end == 0) { /* 1 -> 0 */ 8148 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8149 "ahci_restart_port_wait_till_ready: port %d " 8150 "device is removed", port); 8151 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_NODEV; 8152 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8153 "ahci_restart_port_wait_till_ready: port %d " 8154 "AHCI_PORT_FLAG_NODEV flag is set", port); 8155 mutex_exit(&ahci_portp->ahciport_mutex); 8156 (void) ahci_intr_phyrdy_change(ahci_ctlp, ahci_portp, port); 8157 mutex_enter(&ahci_portp->ahciport_mutex); 8158 8159 return (rval); 8160 } 8161 8162 8163 /* 0/1 -> 1 : device may change */ 8164 /* 8165 * May be called by ahci_fatal_error_recovery_handler, so 8166 * don't issue software if the previous device is ATAPI. 8167 */ 8168 if (ahci_portp->ahciport_device_type == SATA_DTYPE_ATAPI) 8169 return (rval); 8170 8171 /* 8172 * The COMRESET will make port multiplier enter legacy mode. 8173 * Issue a software reset to make it work again. 8174 */ 8175 ahci_find_dev_signature(ahci_ctlp, ahci_portp, &addr_port); 8176 8177 /* 8178 * Following codes are specific for the port multiplier 8179 */ 8180 if (previous_dev_type != SATA_DTYPE_PMULT && 8181 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 8182 /* in case previous_dev_type is corrupt */ 8183 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 8184 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8185 return (rval); 8186 } 8187 8188 /* Device change: PMult -> Non-PMult */ 8189 if (previous_dev_type == SATA_DTYPE_PMULT && 8190 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 8191 /* 8192 * This might happen because 8193 * 1. Software reset failed. Port multiplier is not correctly 8194 * enumerated. 8195 * 2. Another non-port-multiplier device is attached. Perhaps 8196 * the port multiplier was replaced by another device by 8197 * whatever reason, but AHCI driver missed hot-plug event. 8198 * 8199 * Now that the port has been initialized, we just need to 8200 * update the port structure according new device, then report 8201 * and wait SATA framework to probe new device. 8202 */ 8203 8204 /* Force to release pmult resource */ 8205 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 8206 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8207 8208 bzero((void *)&sdevice, sizeof (sata_device_t)); 8209 sdevice.satadev_addr.cport = 8210 ahci_ctlp->ahcictl_port_to_cport[port]; 8211 sdevice.satadev_addr.pmport = 0; 8212 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8213 8214 sdevice.satadev_state = SATA_DSTATE_RESET | 8215 SATA_DSTATE_PWR_ACTIVE; 8216 8217 mutex_exit(&ahci_portp->ahciport_mutex); 8218 sata_hba_event_notify( 8219 ahci_ctlp->ahcictl_dip, 8220 &sdevice, 8221 SATA_EVNT_DEVICE_RESET); 8222 mutex_enter(&ahci_portp->ahciport_mutex); 8223 8224 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8225 "Port multiplier is [Gone] at port %d ", port); 8226 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 8227 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 8228 8229 return (AHCI_SUCCESS); 8230 } 8231 8232 /* Device change: Non-PMult -> PMult */ 8233 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 8234 8235 /* NOTE: The PxCMD.PMA may be cleared by HBA reset. */ 8236 ahci_alloc_pmult(ahci_ctlp, ahci_portp); 8237 8238 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8239 } 8240 pminfo = ahci_portp->ahciport_pmult_info; 8241 ASSERT(pminfo != NULL); 8242 8243 /* Device (may) change: PMult -> PMult */ 8244 /* 8245 * First initialize port multiplier. Set state to READY and wait for 8246 * probe entry point to initialize it 8247 */ 8248 ahci_portp->ahciport_port_state = SATA_STATE_READY; 8249 8250 /* 8251 * It's a little complicated while target is a port multiplier. we 8252 * need to COMRESET all pmports behind that PMult otherwise those 8253 * sub-links between the PMult and the sub-devices will be in an 8254 * inactive state (indicated by PSCR0/PxSSTS) and the following access 8255 * to those sub-devices will be rejected by Link-Fatal-Error. 8256 */ 8257 /* 8258 * The PxSNTF will be set soon after the pmult is plugged. While the 8259 * pmult itself is attaching, sata_hba_event_notfiy will fail. so we 8260 * simply mark every sub-port as 'unknown', then ahci_probe_pmport 8261 * will initialized it. 8262 */ 8263 for (npmport = 0; npmport < pminfo->ahcipmi_num_dev_ports; npmport++) 8264 pminfo->ahcipmi_port_state[npmport] = SATA_STATE_UNKNOWN; 8265 8266 /* Report reset event. */ 8267 ahci_portp->ahciport_reset_in_progress = 1; 8268 8269 bzero((void *)&sdevice, sizeof (sata_device_t)); 8270 sdevice.satadev_addr.cport = cport; 8271 sdevice.satadev_addr.pmport = SATA_PMULT_HOSTPORT; 8272 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 8273 sdevice.satadev_state = SATA_DSTATE_RESET | SATA_DSTATE_PWR_ACTIVE; 8274 sata_hba_event_notify(ahci_ctlp->ahcictl_dip, &sdevice, 8275 SATA_EVNT_DEVICE_RESET); 8276 8277 return (rval); 8278 } 8279 8280 /* 8281 * This routine may be called under four scenarios: 8282 * a) do the recovery from fatal error 8283 * b) or we need to timeout some commands 8284 * c) or we need to abort some commands 8285 * d) or we need reset device/port/controller 8286 * 8287 * In all these scenarios, we need to send any pending unfinished 8288 * commands up to sata framework. 8289 * 8290 * WARNING!!! ahciport_mutex should be acquired before the function is called. 8291 */ 8292 static void 8293 ahci_mop_commands(ahci_ctl_t *ahci_ctlp, 8294 ahci_port_t *ahci_portp, 8295 uint32_t slot_status, 8296 uint32_t failed_tags, 8297 uint32_t timeout_tags, 8298 uint32_t aborted_tags, 8299 uint32_t reset_tags) 8300 { 8301 uint32_t finished_tags = 0; 8302 uint32_t unfinished_tags = 0; 8303 int tmp_slot; 8304 sata_pkt_t *satapkt; 8305 int ncq_cmd_in_progress = 0; 8306 int err_retri_cmd_in_progress = 0; 8307 int rdwr_pmult_cmd_in_progress = 0; 8308 8309 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8310 "ahci_mop_commands entered: port: %d slot_status: 0x%x", 8311 ahci_portp->ahciport_port_num, slot_status); 8312 8313 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8314 "ahci_mop_commands: failed_tags: 0x%x, " 8315 "timeout_tags: 0x%x aborted_tags: 0x%x, " 8316 "reset_tags: 0x%x", failed_tags, 8317 timeout_tags, aborted_tags, reset_tags); 8318 8319 #ifdef AHCI_DEBUG 8320 if (ahci_debug_flags & AHCIDBG_ERRS) { 8321 int i; 8322 char msg_buf[200] = {0, }; 8323 for (i = 0x1f; i >= 0; i--) { 8324 if (ahci_portp->ahciport_slot_pkts[i] != NULL) 8325 msg_buf[i] = 'X'; 8326 else 8327 msg_buf[i] = '.'; 8328 } 8329 msg_buf[0x20] = '\0'; 8330 cmn_err(CE_NOTE, "port[%d] slots: %s", 8331 ahci_portp->ahciport_port_num, msg_buf); 8332 cmn_err(CE_NOTE, "[ERR-RT] %p [RW-PM] %p ", 8333 (void *)ahci_portp->ahciport_err_retri_pkt, 8334 (void *)ahci_portp->ahciport_rdwr_pmult_pkt); 8335 } 8336 #endif 8337 8338 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8339 finished_tags = ahci_portp->ahciport_pending_tags & 8340 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 8341 8342 unfinished_tags = slot_status & 8343 AHCI_SLOT_MASK(ahci_ctlp) & 8344 ~failed_tags & 8345 ~aborted_tags & 8346 ~reset_tags & 8347 ~timeout_tags; 8348 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8349 ncq_cmd_in_progress = 1; 8350 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 8351 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 8352 8353 unfinished_tags = slot_status & 8354 AHCI_NCQ_SLOT_MASK(ahci_portp) & 8355 ~failed_tags & 8356 ~aborted_tags & 8357 ~reset_tags & 8358 ~timeout_tags; 8359 } else if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8360 8361 /* 8362 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT is 8363 * set, it means REQUEST SENSE or READ LOG EXT command doesn't 8364 * complete successfully due to one of the following three 8365 * conditions: 8366 * 8367 * 1. Fatal error - failed_tags includes its slot 8368 * 2. Timed out - timeout_tags includes its slot 8369 * 3. Aborted when hot unplug - aborted_tags includes its 8370 * slot 8371 * 8372 * Please note that the command is always sent down in Slot 0 8373 */ 8374 err_retri_cmd_in_progress = 1; 8375 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_NCQ, ahci_ctlp, 8376 "ahci_mop_commands is called for port %d while " 8377 "REQUEST SENSE or READ LOG EXT for error retrieval " 8378 "is being executed slot_status = 0x%x", 8379 ahci_portp->ahciport_port_num, slot_status); 8380 ASSERT(ahci_portp->ahciport_mop_in_progress > 1); 8381 ASSERT(slot_status == 0x1); 8382 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 8383 rdwr_pmult_cmd_in_progress = 1; 8384 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 8385 "ahci_mop_commands is called for port %d while " 8386 "READ/WRITE PORTMULT command is being executed", 8387 ahci_portp->ahciport_port_num); 8388 8389 ASSERT(slot_status == 0x1); 8390 } 8391 8392 #ifdef AHCI_DEBUG 8393 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8394 "ahci_mop_commands: finished_tags: 0x%x, " 8395 "unfinished_tags 0x%x", finished_tags, unfinished_tags); 8396 #endif 8397 8398 /* Send up finished packets with SATA_PKT_COMPLETED */ 8399 while (finished_tags) { 8400 tmp_slot = ddi_ffs(finished_tags) - 1; 8401 if (tmp_slot == -1) { 8402 break; 8403 } 8404 8405 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8406 ASSERT(satapkt != NULL); 8407 8408 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_mop_commands: " 8409 "sending up pkt 0x%p with SATA_PKT_COMPLETED", 8410 (void *)satapkt); 8411 8412 /* 8413 * Cannot fetch the return register content since the port 8414 * was restarted, so the corresponding tag will be set to 8415 * aborted tags. 8416 */ 8417 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 8418 CLEAR_BIT(finished_tags, tmp_slot); 8419 aborted_tags |= tmp_slot; 8420 continue; 8421 } 8422 8423 if (ncq_cmd_in_progress) 8424 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8425 tmp_slot); 8426 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8427 CLEAR_BIT(finished_tags, tmp_slot); 8428 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8429 8430 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 8431 } 8432 8433 /* Send up failed packets with SATA_PKT_DEV_ERROR. */ 8434 while (failed_tags) { 8435 if (err_retri_cmd_in_progress) { 8436 satapkt = ahci_portp->ahciport_err_retri_pkt; 8437 ASSERT(satapkt != NULL); 8438 ASSERT(failed_tags == 0x1); 8439 8440 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8441 "sending up pkt 0x%p with SATA_PKT_DEV_ERROR", 8442 (void *)satapkt); 8443 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8444 break; 8445 } 8446 if (rdwr_pmult_cmd_in_progress) { 8447 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8448 ASSERT(satapkt != NULL); 8449 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8450 "ahci_mop_commands: sending up " 8451 "rdwr pmult pkt 0x%p with SATA_PKT_DEV_ERROR", 8452 (void *)satapkt); 8453 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8454 break; 8455 } 8456 8457 tmp_slot = ddi_ffs(failed_tags) - 1; 8458 if (tmp_slot == -1) { 8459 break; 8460 } 8461 8462 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8463 ASSERT(satapkt != NULL); 8464 8465 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8466 "sending up pkt 0x%p with SATA_PKT_DEV_ERROR", 8467 (void *)satapkt); 8468 8469 if (ncq_cmd_in_progress) 8470 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8471 tmp_slot); 8472 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8473 CLEAR_BIT(failed_tags, tmp_slot); 8474 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8475 8476 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8477 } 8478 8479 /* Send up timeout packets with SATA_PKT_TIMEOUT. */ 8480 while (timeout_tags) { 8481 if (err_retri_cmd_in_progress) { 8482 satapkt = ahci_portp->ahciport_err_retri_pkt; 8483 ASSERT(satapkt != NULL); 8484 ASSERT(timeout_tags == 0x1); 8485 8486 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8487 "sending up pkt 0x%p with SATA_PKT_TIMEOUT", 8488 (void *)satapkt); 8489 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8490 break; 8491 } 8492 if (rdwr_pmult_cmd_in_progress) { 8493 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8494 ASSERT(satapkt != NULL); 8495 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8496 "ahci_mop_commands: sending up " 8497 "rdwr pmult pkt 0x%p with SATA_PKT_TIMEOUT", 8498 (void *)satapkt); 8499 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8500 break; 8501 } 8502 8503 tmp_slot = ddi_ffs(timeout_tags) - 1; 8504 if (tmp_slot == -1) { 8505 break; 8506 } 8507 8508 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8509 ASSERT(satapkt != NULL); 8510 8511 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8512 "sending up pkt 0x%p with SATA_PKT_TIMEOUT", 8513 (void *)satapkt); 8514 8515 if (ncq_cmd_in_progress) 8516 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8517 tmp_slot); 8518 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8519 CLEAR_BIT(timeout_tags, tmp_slot); 8520 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8521 8522 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8523 } 8524 8525 /* Send up aborted packets with SATA_PKT_ABORTED */ 8526 while (aborted_tags) { 8527 if (err_retri_cmd_in_progress) { 8528 satapkt = ahci_portp->ahciport_err_retri_pkt; 8529 ASSERT(satapkt != NULL); 8530 ASSERT(aborted_tags == 0x1); 8531 8532 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8533 "sending up pkt 0x%p with SATA_PKT_ABORTED", 8534 (void *)satapkt); 8535 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_ABORTED); 8536 break; 8537 } 8538 if (rdwr_pmult_cmd_in_progress) { 8539 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8540 ASSERT(satapkt != NULL); 8541 ASSERT(aborted_tags == 0x1); 8542 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8543 "ahci_mop_commands: sending up " 8544 "rdwr pmult pkt 0x%p with SATA_PKT_ABORTED", 8545 (void *)satapkt); 8546 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_ABORTED); 8547 break; 8548 } 8549 8550 tmp_slot = ddi_ffs(aborted_tags) - 1; 8551 if (tmp_slot == -1) { 8552 break; 8553 } 8554 8555 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8556 ASSERT(satapkt != NULL); 8557 8558 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8559 "sending up pkt 0x%p with SATA_PKT_ABORTED", 8560 (void *)satapkt); 8561 8562 if (ncq_cmd_in_progress) 8563 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8564 tmp_slot); 8565 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8566 CLEAR_BIT(aborted_tags, tmp_slot); 8567 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8568 8569 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_ABORTED); 8570 } 8571 8572 /* Send up reset packets with SATA_PKT_RESET. */ 8573 while (reset_tags) { 8574 if (rdwr_pmult_cmd_in_progress) { 8575 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8576 ASSERT(satapkt != NULL); 8577 ASSERT(aborted_tags == 0x1); 8578 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8579 "ahci_mop_commands: sending up " 8580 "rdwr pmult pkt 0x%p with SATA_PKT_RESET", 8581 (void *)satapkt); 8582 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_RESET); 8583 break; 8584 } 8585 8586 tmp_slot = ddi_ffs(reset_tags) - 1; 8587 if (tmp_slot == -1) { 8588 break; 8589 } 8590 8591 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8592 ASSERT(satapkt != NULL); 8593 8594 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8595 "sending up pkt 0x%p with SATA_PKT_RESET", 8596 (void *)satapkt); 8597 8598 if (ncq_cmd_in_progress) 8599 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8600 tmp_slot); 8601 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8602 CLEAR_BIT(reset_tags, tmp_slot); 8603 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8604 8605 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_RESET); 8606 } 8607 8608 /* Send up unfinished packets with SATA_PKT_RESET */ 8609 while (unfinished_tags) { 8610 tmp_slot = ddi_ffs(unfinished_tags) - 1; 8611 if (tmp_slot == -1) { 8612 break; 8613 } 8614 8615 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8616 ASSERT(satapkt != NULL); 8617 8618 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8619 "sending up pkt 0x%p with SATA_PKT_RESET", 8620 (void *)satapkt); 8621 8622 if (ncq_cmd_in_progress) 8623 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8624 tmp_slot); 8625 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8626 CLEAR_BIT(unfinished_tags, tmp_slot); 8627 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8628 8629 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_RESET); 8630 } 8631 8632 ahci_portp->ahciport_mop_in_progress--; 8633 ASSERT(ahci_portp->ahciport_mop_in_progress >= 0); 8634 8635 if (ahci_portp->ahciport_mop_in_progress == 0) 8636 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_MOPPING; 8637 } 8638 8639 /* 8640 * This routine is going to first request a READ LOG EXT sata pkt from sata 8641 * module, and then deliver it to the HBA to get the ncq failure context. 8642 * The return value is the exactly failed tags. 8643 */ 8644 static uint32_t 8645 ahci_get_rdlogext_data(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 8646 uint8_t port) 8647 { 8648 sata_device_t sdevice; 8649 sata_pkt_t *rdlog_spkt, *spkt; 8650 ddi_dma_handle_t buf_dma_handle; 8651 ahci_addr_t addr; 8652 int loop_count; 8653 int rval; 8654 int failed_slot; 8655 uint32_t failed_tags = 0; 8656 struct sata_ncq_error_recovery_page *ncq_err_page; 8657 8658 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_NCQ, ahci_ctlp, 8659 "ahci_get_rdlogext_data enter: port %d", port); 8660 8661 /* Prepare the sdevice data */ 8662 bzero((void *)&sdevice, sizeof (sata_device_t)); 8663 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 8664 8665 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8666 sdevice.satadev_addr.pmport = 0; 8667 8668 /* Translate sata_device.satadev_addr -> ahci_addr */ 8669 ahci_get_ahci_addr(ahci_ctlp, &sdevice, &addr); 8670 8671 /* 8672 * Call the sata hba interface to get a rdlog spkt 8673 */ 8674 loop_count = 0; 8675 loop: 8676 rdlog_spkt = sata_get_error_retrieval_pkt(ahci_ctlp->ahcictl_dip, 8677 &sdevice, SATA_ERR_RETR_PKT_TYPE_NCQ); 8678 if (rdlog_spkt == NULL) { 8679 if (loop_count++ < AHCI_POLLRATE_GET_SPKT) { 8680 /* Sleep for a while */ 8681 drv_usecwait(AHCI_10MS_USECS); 8682 goto loop; 8683 } 8684 /* Timed out after 1s */ 8685 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8686 "failed to get rdlog spkt for port %d", port); 8687 return (failed_tags); 8688 } 8689 8690 ASSERT(rdlog_spkt->satapkt_op_mode & SATA_OPMODE_SYNCH); 8691 8692 /* 8693 * This flag is used to handle the specific error recovery when the 8694 * READ LOG EXT command gets a failure (fatal error or time-out). 8695 */ 8696 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RDLOGEXT; 8697 8698 /* 8699 * This start is not supposed to fail because after port is restarted, 8700 * the whole command list is empty. 8701 */ 8702 ahci_portp->ahciport_err_retri_pkt = rdlog_spkt; 8703 (void) ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, rdlog_spkt); 8704 ahci_portp->ahciport_err_retri_pkt = NULL; 8705 8706 /* Remove the flag after READ LOG EXT command is completed */ 8707 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_RDLOGEXT; 8708 8709 if (rdlog_spkt->satapkt_reason == SATA_PKT_COMPLETED) { 8710 /* Update the request log data */ 8711 buf_dma_handle = *(ddi_dma_handle_t *) 8712 (rdlog_spkt->satapkt_cmd.satacmd_err_ret_buf_handle); 8713 rval = ddi_dma_sync(buf_dma_handle, 0, 0, 8714 DDI_DMA_SYNC_FORKERNEL); 8715 if (rval == DDI_SUCCESS) { 8716 ncq_err_page = 8717 (struct sata_ncq_error_recovery_page *)rdlog_spkt-> 8718 satapkt_cmd.satacmd_bp->b_un.b_addr; 8719 8720 /* Get the failed tag */ 8721 failed_slot = ncq_err_page->ncq_tag; 8722 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8723 "ahci_get_rdlogext_data: port %d " 8724 "failed slot %d", port, failed_slot); 8725 if (failed_slot & NQ) { 8726 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8727 "the failed slot is not a valid tag", NULL); 8728 goto out; 8729 } 8730 8731 failed_slot &= NCQ_TAG_MASK; 8732 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 8733 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8734 "ahci_get_rdlogext_data: failed spkt 0x%p", 8735 (void *)spkt); 8736 if (spkt == NULL) { 8737 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8738 "the failed slot spkt is NULL", NULL); 8739 goto out; 8740 } 8741 8742 failed_tags = 0x1 << failed_slot; 8743 8744 /* Fill out the error context */ 8745 ahci_copy_ncq_err_page(&spkt->satapkt_cmd, 8746 ncq_err_page); 8747 ahci_update_sata_registers(ahci_ctlp, port, 8748 &spkt->satapkt_device); 8749 } 8750 } 8751 out: 8752 sata_free_error_retrieval_pkt(rdlog_spkt); 8753 8754 return (failed_tags); 8755 } 8756 8757 /* 8758 * This routine is going to first request a REQUEST SENSE sata pkt from sata 8759 * module, and then deliver it to the HBA to get the sense data and copy 8760 * the sense data back to the orignal failed sata pkt, and free the REQUEST 8761 * SENSE sata pkt later. 8762 */ 8763 static void 8764 ahci_get_rqsense_data(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 8765 uint8_t port, sata_pkt_t *spkt) 8766 { 8767 sata_device_t sdevice; 8768 sata_pkt_t *rs_spkt; 8769 sata_cmd_t *sata_cmd; 8770 ddi_dma_handle_t buf_dma_handle; 8771 ahci_addr_t addr; 8772 int loop_count; 8773 #if AHCI_DEBUG 8774 struct scsi_extended_sense *rqsense; 8775 #endif 8776 8777 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8778 "ahci_get_rqsense_data enter: port %d", port); 8779 8780 /* Prepare the sdevice data */ 8781 bzero((void *)&sdevice, sizeof (sata_device_t)); 8782 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 8783 8784 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8785 sdevice.satadev_addr.pmport = 0; 8786 8787 /* Translate sata_device.satadev_addr -> ahci_addr */ 8788 ahci_get_ahci_addr(ahci_ctlp, &sdevice, &addr); 8789 8790 sata_cmd = &spkt->satapkt_cmd; 8791 8792 /* 8793 * Call the sata hba interface to get a rs spkt 8794 */ 8795 loop_count = 0; 8796 loop: 8797 rs_spkt = sata_get_error_retrieval_pkt(ahci_ctlp->ahcictl_dip, 8798 &sdevice, SATA_ERR_RETR_PKT_TYPE_ATAPI); 8799 if (rs_spkt == NULL) { 8800 if (loop_count++ < AHCI_POLLRATE_GET_SPKT) { 8801 /* Sleep for a while */ 8802 drv_usecwait(AHCI_10MS_USECS); 8803 goto loop; 8804 8805 } 8806 /* Timed out after 1s */ 8807 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8808 "failed to get rs spkt for port %d", port); 8809 return; 8810 } 8811 8812 ASSERT(rs_spkt->satapkt_op_mode & SATA_OPMODE_SYNCH); 8813 8814 /* 8815 * This flag is used to handle the specific error recovery when the 8816 * REQUEST SENSE command gets a faiure (fatal error or time-out). 8817 */ 8818 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RQSENSE; 8819 8820 /* 8821 * This start is not supposed to fail because after port is restarted, 8822 * the whole command list is empty. 8823 */ 8824 ahci_portp->ahciport_err_retri_pkt = rs_spkt; 8825 (void) ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, rs_spkt); 8826 ahci_portp->ahciport_err_retri_pkt = NULL; 8827 8828 /* Remove the flag after REQUEST SENSE command is completed */ 8829 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_RQSENSE; 8830 8831 if (rs_spkt->satapkt_reason == SATA_PKT_COMPLETED) { 8832 /* Update the request sense data */ 8833 buf_dma_handle = *(ddi_dma_handle_t *) 8834 (rs_spkt->satapkt_cmd.satacmd_err_ret_buf_handle); 8835 (void) ddi_dma_sync(buf_dma_handle, 0, 0, 8836 DDI_DMA_SYNC_FORKERNEL); 8837 /* Copy the request sense data */ 8838 bcopy(rs_spkt-> 8839 satapkt_cmd.satacmd_bp->b_un.b_addr, 8840 &sata_cmd->satacmd_rqsense, 8841 SATA_ATAPI_MIN_RQSENSE_LEN); 8842 #if AHCI_DEBUG 8843 rqsense = (struct scsi_extended_sense *) 8844 sata_cmd->satacmd_rqsense; 8845 8846 /* Dump the sense data */ 8847 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, "\n", NULL); 8848 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, 8849 "Sense data for satapkt %p ATAPI cmd 0x%x", 8850 spkt, sata_cmd->satacmd_acdb[0]); 8851 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, 8852 " es_code 0x%x es_class 0x%x " 8853 "es_key 0x%x es_add_code 0x%x " 8854 "es_qual_code 0x%x", 8855 rqsense->es_code, rqsense->es_class, 8856 rqsense->es_key, rqsense->es_add_code, 8857 rqsense->es_qual_code); 8858 #endif 8859 } 8860 8861 sata_free_error_retrieval_pkt(rs_spkt); 8862 } 8863 8864 /* 8865 * Fatal errors will cause the HBA to enter the ERR: Fatal state. To recover, 8866 * the port must be restarted. When the HBA detects thus error, it may try 8867 * to abort a transfer. And if the transfer was aborted, the device is 8868 * expected to send a D2H Register FIS with PxTFD.STS.ERR set to '1' and both 8869 * PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0'. Then system software knows 8870 * that the device is in a stable status and transfers may be restarted without 8871 * issuing a COMRESET to the device. If PxTFD.STS.BSY or PxTFD.STS.DRQ is set, 8872 * then the software will send the COMRESET to do the port reset. 8873 * 8874 * Software should perform the appropriate error recovery actions based on 8875 * whether non-queued commands were being issued or natived command queuing 8876 * commands were being issued. 8877 * 8878 * And software will complete the command that had the error with error mark 8879 * to higher level software. 8880 * 8881 * Fatal errors include the following: 8882 * PxIS.IFS - Interface Fatal Error Status 8883 * PxIS.HBDS - Host Bus Data Error Status 8884 * PxIS.HBFS - Host Bus Fatal Error Status 8885 * PxIS.TFES - Task File Error Status 8886 * 8887 * WARNING!!! ahciport_mutex should be acquired before the function is called. 8888 */ 8889 static void 8890 ahci_fatal_error_recovery_handler(ahci_ctl_t *ahci_ctlp, 8891 ahci_port_t *ahci_portp, ahci_addr_t *addrp, uint32_t intr_status) 8892 { 8893 uint32_t port_cmd_status; 8894 uint32_t slot_status = 0; 8895 uint32_t failed_tags = 0; 8896 int failed_slot; 8897 int reset_flag = 0, flag = 0; 8898 ahci_fis_d2h_register_t *ahci_rcvd_fisp; 8899 sata_cmd_t *sata_cmd = NULL; 8900 sata_pkt_t *spkt = NULL; 8901 #if AHCI_DEBUG 8902 ahci_cmd_header_t *cmd_header; 8903 #endif 8904 uint8_t port = addrp->aa_port; 8905 8906 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8907 "ahci_fatal_error_recovery_handler enter: port %d", port); 8908 8909 /* Port multiplier error */ 8910 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 8911 /* FBS code is neither completed nor tested. */ 8912 ahci_pmult_error_recovery_handler(ahci_ctlp, ahci_portp, 8913 port, intr_status); 8914 8915 /* Force a port reset */ 8916 flag = AHCI_PORT_RESET; 8917 } 8918 8919 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 8920 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8921 8922 /* Read PxCI to see which commands are still outstanding */ 8923 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8924 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 8925 8926 /* 8927 * Read PxCMD.CCS to determine the slot that the HBA 8928 * was processing when the error occurred. 8929 */ 8930 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8931 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 8932 failed_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 8933 AHCI_CMD_STATUS_CCS_SHIFT; 8934 8935 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8936 spkt = ahci_portp->ahciport_err_retri_pkt; 8937 ASSERT(spkt != NULL); 8938 } else { 8939 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 8940 if (spkt == NULL) { 8941 /* May happen when interface errors occur? */ 8942 goto next; 8943 } 8944 } 8945 8946 #if AHCI_DEBUG 8947 /* 8948 * Debugging purpose... 8949 */ 8950 if (ahci_portp->ahciport_prd_bytecounts[failed_slot]) { 8951 cmd_header = 8952 &ahci_portp->ahciport_cmd_list[failed_slot]; 8953 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 8954 "ahci_fatal_error_recovery_handler: port %d, " 8955 "PRD Byte Count = 0x%x, " 8956 "ahciport_prd_bytecounts = 0x%x", port, 8957 cmd_header->ahcich_prd_byte_count, 8958 ahci_portp->ahciport_prd_bytecounts[failed_slot]); 8959 } 8960 #endif 8961 8962 sata_cmd = &spkt->satapkt_cmd; 8963 8964 /* Fill out the status and error registers for PxIS.TFES */ 8965 if (intr_status & AHCI_INTR_STATUS_TFES) { 8966 ahci_rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 8967 ahcirf_d2h_register_fis); 8968 8969 /* Copy the error context back to the sata_cmd */ 8970 ahci_copy_err_cnxt(sata_cmd, ahci_rcvd_fisp); 8971 } 8972 8973 /* The failed command must be one of the outstanding commands */ 8974 failed_tags = 0x1 << failed_slot; 8975 ASSERT(failed_tags & slot_status); 8976 8977 /* Update the sata registers, especially PxSERR register */ 8978 ahci_update_sata_registers(ahci_ctlp, port, 8979 &spkt->satapkt_device); 8980 8981 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8982 /* Read PxSACT to see which commands are still outstanding */ 8983 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8984 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 8985 } 8986 next: 8987 8988 #if AHCI_DEBUG 8989 /* 8990 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is 8991 * set, it means a fatal error happened after REQUEST SENSE command 8992 * or READ LOG EXT command is delivered to the HBA during the error 8993 * recovery process. At this time, the only outstanding command is 8994 * supposed to be REQUEST SENSE command or READ LOG EXT command. 8995 */ 8996 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8997 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8998 "ahci_fatal_error_recovery_handler: port %d REQUEST SENSE " 8999 "command or READ LOG EXT command for error data retrieval " 9000 "failed", port); 9001 ASSERT(slot_status == 0x1); 9002 ASSERT(failed_slot == 0); 9003 ASSERT(spkt->satapkt_cmd.satacmd_acdb[0] == 9004 SCMD_REQUEST_SENSE || 9005 spkt->satapkt_cmd.satacmd_cmd_reg == 9006 SATAC_READ_LOG_EXT); 9007 } 9008 #endif 9009 9010 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 9011 ahci_portp->ahciport_mop_in_progress++; 9012 9013 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 9014 port, flag, &reset_flag); 9015 9016 /* 9017 * Won't retrieve error information: 9018 * 1. Port reset was involved to recover 9019 * 2. Device is gone 9020 * 3. IDENTIFY DEVICE command sent to ATAPI device 9021 * 4. REQUEST SENSE or READ LOG EXT command during error recovery 9022 */ 9023 if (reset_flag || 9024 ahci_portp->ahciport_device_type == SATA_DTYPE_NONE || 9025 spkt && spkt->satapkt_cmd.satacmd_cmd_reg == SATAC_ID_DEVICE || 9026 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 9027 goto out; 9028 9029 /* 9030 * Deliver READ LOG EXT to gather information about the error when 9031 * a COMRESET has not been performed as part of the error recovery 9032 * during NCQ command processing. 9033 */ 9034 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9035 failed_tags = ahci_get_rdlogext_data(ahci_ctlp, 9036 ahci_portp, port); 9037 goto out; 9038 } 9039 9040 /* 9041 * Deliver REQUEST SENSE for ATAPI command to gather information about 9042 * the error when a COMRESET has not been performed as part of the 9043 * error recovery. 9044 */ 9045 if (spkt && ahci_portp->ahciport_device_type == SATA_DTYPE_ATAPI) 9046 ahci_get_rqsense_data(ahci_ctlp, ahci_portp, port, spkt); 9047 out: 9048 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9049 "ahci_fatal_error_recovery_handler: port %d fatal error " 9050 "occurred slot_status = 0x%x, pending_tags = 0x%x, " 9051 "pending_ncq_tags = 0x%x failed_tags = 0x%x", 9052 port, slot_status, ahci_portp->ahciport_pending_tags, 9053 ahci_portp->ahciport_pending_ncq_tags, failed_tags); 9054 9055 ahci_mop_commands(ahci_ctlp, 9056 ahci_portp, 9057 slot_status, 9058 failed_tags, /* failed tags */ 9059 0, /* timeout tags */ 9060 0, /* aborted tags */ 9061 0); /* reset tags */ 9062 } 9063 9064 /* 9065 * Used to recovery a PMULT pmport fatal error under FIS-based switching. 9066 * 1. device specific.PxFBS.SDE=1 9067 * 2. Non-Deivce specific. 9068 * Nothing will be done when Command-based switching is employed. 9069 * 9070 * Currently code is neither completed nor tested. 9071 * 9072 * WARNING!!! ahciport_mutex should be acquired before the function 9073 * is called. 9074 */ 9075 static void 9076 ahci_pmult_error_recovery_handler(ahci_ctl_t *ahci_ctlp, 9077 ahci_port_t *ahci_portp, uint8_t port, uint32_t intr_status) 9078 { 9079 #ifndef __lock_lint 9080 _NOTE(ARGUNUSED(intr_status)) 9081 #endif 9082 uint32_t port_fbs_ctrl; 9083 int loop_count = 0; 9084 ahci_addr_t addr; 9085 9086 /* Nothing will be done under Command-based switching. */ 9087 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_FBSS)) 9088 return; 9089 9090 port_fbs_ctrl = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9091 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port)); 9092 9093 if (!(port_fbs_ctrl & AHCI_FBS_EN)) 9094 /* FBS is not enabled. */ 9095 return; 9096 9097 /* Problem's getting complicated now. */ 9098 /* 9099 * If FIS-based switching is used, we need to check 9100 * the PxFBS to see the error type. 9101 */ 9102 port_fbs_ctrl = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9103 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port)); 9104 9105 /* Refer to spec(v1.2) 9.3.6.1 */ 9106 if (port_fbs_ctrl & AHCI_FBS_SDE) { 9107 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9108 "A Device Sepcific Error: port %d", port); 9109 /* 9110 * Controller has paused commands for all other 9111 * sub-devices until PxFBS.DEC is set. 9112 */ 9113 ahci_reject_all_abort_pkts(ahci_ctlp, 9114 ahci_portp, 0); 9115 9116 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 9117 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port), 9118 port_fbs_ctrl | AHCI_FBS_DEC); 9119 9120 /* 9121 * Wait controller clear PxFBS.DEC, 9122 * then we can continue. 9123 */ 9124 loop_count = 0; 9125 do { 9126 port_fbs_ctrl = ddi_get32(ahci_ctlp-> 9127 ahcictl_ahci_acc_handle, (uint32_t *) 9128 AHCI_PORT_PxFBS(ahci_ctlp, port)); 9129 9130 if (loop_count++ > 1000) 9131 /* 9132 * Esclate the error. Follow 9133 * non-device specific error 9134 * procedure. 9135 */ 9136 return; 9137 9138 drv_usecwait(AHCI_100US_USECS); 9139 } while (port_fbs_ctrl & AHCI_FBS_DEC); 9140 9141 /* 9142 * Issue a software reset to ensure drive is in 9143 * a known state. 9144 */ 9145 (void) ahci_software_reset(ahci_ctlp, 9146 ahci_portp, &addr); 9147 9148 } else { 9149 9150 /* Process Non-Device Specific Error. */ 9151 /* This will be handled later on. */ 9152 cmn_err(CE_NOTE, "!FBS is not supported now."); 9153 } 9154 } 9155 /* 9156 * Handle events - fatal error recovery 9157 */ 9158 static void 9159 ahci_events_handler(void *args) 9160 { 9161 ahci_event_arg_t *ahci_event_arg; 9162 ahci_ctl_t *ahci_ctlp; 9163 ahci_port_t *ahci_portp; 9164 ahci_addr_t *addrp; 9165 uint32_t event; 9166 9167 ahci_event_arg = (ahci_event_arg_t *)args; 9168 9169 ahci_ctlp = ahci_event_arg->ahciea_ctlp; 9170 ahci_portp = ahci_event_arg->ahciea_portp; 9171 addrp = ahci_event_arg->ahciea_addrp; 9172 event = ahci_event_arg->ahciea_event; 9173 9174 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 9175 "ahci_events_handler enter: port %d intr_status = 0x%x", 9176 ahci_portp->ahciport_port_num, event); 9177 9178 mutex_enter(&ahci_portp->ahciport_mutex); 9179 9180 /* 9181 * ahci_intr_phyrdy_change() may have rendered it to 9182 * SATA_DTYPE_NONE. 9183 */ 9184 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 9185 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 9186 "ahci_events_handler: port %d no device attached, " 9187 "and just return without doing anything", 9188 ahci_portp->ahciport_port_num); 9189 goto out; 9190 } 9191 9192 if (event & (AHCI_INTR_STATUS_IFS | 9193 AHCI_INTR_STATUS_HBDS | 9194 AHCI_INTR_STATUS_HBFS | 9195 AHCI_INTR_STATUS_TFES)) 9196 ahci_fatal_error_recovery_handler(ahci_ctlp, ahci_portp, 9197 addrp, event); 9198 9199 out: 9200 mutex_exit(&ahci_portp->ahciport_mutex); 9201 } 9202 9203 /* 9204 * ahci_watchdog_handler() and ahci_do_sync_start will call us if they 9205 * detect there are some commands which are timed out. 9206 */ 9207 static void 9208 ahci_timeout_pkts(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 9209 uint8_t port, uint32_t tmp_timeout_tags) 9210 { 9211 uint32_t slot_status = 0; 9212 uint32_t finished_tags = 0; 9213 uint32_t timeout_tags = 0; 9214 9215 AHCIDBG(AHCIDBG_TIMEOUT|AHCIDBG_ENTRY, ahci_ctlp, 9216 "ahci_timeout_pkts enter: port %d", port); 9217 9218 mutex_enter(&ahci_portp->ahciport_mutex); 9219 9220 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 9221 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) || 9222 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9223 /* Read PxCI to see which commands are still outstanding */ 9224 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9225 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 9226 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9227 /* Read PxSACT to see which commands are still outstanding */ 9228 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9229 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 9230 } 9231 9232 #if AHCI_DEBUG 9233 /* 9234 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is 9235 * set, it means a fatal error happened after REQUEST SENSE command 9236 * or READ LOG EXT command is delivered to the HBA during the error 9237 * recovery process. At this time, the only outstanding command is 9238 * supposed to be REQUEST SENSE command or READ LOG EXT command. 9239 */ 9240 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9241 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, ahci_ctlp, 9242 "ahci_timeout_pkts called while REQUEST SENSE " 9243 "command or READ LOG EXT command for error recovery " 9244 "timed out timeout_tags = 0x%x, slot_status = 0x%x, " 9245 "pending_tags = 0x%x, pending_ncq_tags = 0x%x", 9246 tmp_timeout_tags, slot_status, 9247 ahci_portp->ahciport_pending_tags, 9248 ahci_portp->ahciport_pending_ncq_tags); 9249 ASSERT(slot_status == 0x1); 9250 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9251 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, ahci_ctlp, 9252 "ahci_timeout_pkts called while executing R/W PMULT " 9253 "command timeout_tags = 0x%x, slot_status = 0x%x", 9254 tmp_timeout_tags, slot_status); 9255 ASSERT(slot_status == 0x1); 9256 } 9257 #endif 9258 9259 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 9260 ahci_portp->ahciport_mop_in_progress++; 9261 9262 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 9263 port, AHCI_PORT_RESET, NULL); 9264 9265 /* 9266 * Re-identify timeout tags because some previously checked commands 9267 * could already complete. 9268 */ 9269 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9270 finished_tags = ahci_portp->ahciport_pending_tags & 9271 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 9272 timeout_tags = tmp_timeout_tags & ~finished_tags; 9273 9274 AHCIDBG(AHCIDBG_TIMEOUT, ahci_ctlp, 9275 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, " 9276 "timeout_tags = 0x%x, port_cmd_issue = 0x%x, " 9277 "pending_tags = 0x%x ", 9278 port, finished_tags, timeout_tags, 9279 slot_status, ahci_portp->ahciport_pending_tags); 9280 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9281 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 9282 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 9283 timeout_tags = tmp_timeout_tags & ~finished_tags; 9284 9285 AHCIDBG(AHCIDBG_TIMEOUT|AHCIDBG_NCQ, ahci_ctlp, 9286 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, " 9287 "timeout_tags = 0x%x, port_sactive = 0x%x, " 9288 "pending_ncq_tags = 0x%x ", 9289 port, finished_tags, timeout_tags, 9290 slot_status, ahci_portp->ahciport_pending_ncq_tags); 9291 } else if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 9292 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9293 timeout_tags = tmp_timeout_tags; 9294 } 9295 9296 ahci_mop_commands(ahci_ctlp, 9297 ahci_portp, 9298 slot_status, 9299 0, /* failed tags */ 9300 timeout_tags, /* timeout tags */ 9301 0, /* aborted tags */ 9302 0); /* reset tags */ 9303 9304 mutex_exit(&ahci_portp->ahciport_mutex); 9305 } 9306 9307 /* 9308 * Watchdog handler kicks in every 5 seconds to timeout any commands pending 9309 * for long time. 9310 */ 9311 static void 9312 ahci_watchdog_handler(ahci_ctl_t *ahci_ctlp) 9313 { 9314 ahci_port_t *ahci_portp; 9315 sata_pkt_t *spkt; 9316 uint32_t pending_tags; 9317 uint32_t timeout_tags; 9318 uint32_t port_cmd_status; 9319 uint32_t port_sactive; 9320 uint8_t port; 9321 int tmp_slot; 9322 int current_slot; 9323 uint32_t current_tags; 9324 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 9325 /* max number of cycles this packet should survive */ 9326 int max_life_cycles; 9327 9328 /* how many cycles this packet survived so far */ 9329 int watched_cycles; 9330 9331 mutex_enter(&ahci_ctlp->ahcictl_mutex); 9332 9333 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 9334 "ahci_watchdog_handler entered", NULL); 9335 9336 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 9337 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 9338 continue; 9339 } 9340 9341 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 9342 9343 mutex_enter(&ahci_portp->ahciport_mutex); 9344 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 9345 mutex_exit(&ahci_portp->ahciport_mutex); 9346 continue; 9347 } 9348 9349 /* Skip the check for those ports in error recovery */ 9350 if ((ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) && 9351 !(ERR_RETRI_CMD_IN_PROGRESS(ahci_portp))) { 9352 mutex_exit(&ahci_portp->ahciport_mutex); 9353 continue; 9354 } 9355 9356 pending_tags = 0; 9357 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9358 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 9359 9360 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 9361 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9362 current_slot = 0; 9363 pending_tags = 0x1; 9364 } else if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9365 current_slot = 9366 (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 9367 AHCI_CMD_STATUS_CCS_SHIFT; 9368 pending_tags = ahci_portp->ahciport_pending_tags; 9369 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9370 port_sactive = ddi_get32( 9371 ahci_ctlp->ahcictl_ahci_acc_handle, 9372 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 9373 current_tags = port_sactive & 9374 ~port_cmd_status & 9375 AHCI_NCQ_SLOT_MASK(ahci_portp); 9376 pending_tags = ahci_portp->ahciport_pending_ncq_tags; 9377 } 9378 9379 timeout_tags = 0; 9380 while (pending_tags) { 9381 tmp_slot = ddi_ffs(pending_tags) - 1; 9382 if (tmp_slot == -1) { 9383 break; 9384 } 9385 9386 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 9387 spkt = ahci_portp->ahciport_err_retri_pkt; 9388 else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 9389 spkt = ahci_portp->ahciport_rdwr_pmult_pkt; 9390 else 9391 spkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 9392 9393 if ((spkt != NULL) && spkt->satapkt_time && 9394 !(spkt->satapkt_op_mode & SATA_OPMODE_POLLING)) { 9395 /* 9396 * We are overloading satapkt_hba_driver_private 9397 * with watched_cycle count. 9398 * 9399 * If a packet has survived for more than it's 9400 * max life cycles, it is a candidate for time 9401 * out. 9402 */ 9403 watched_cycles = (int)(intptr_t) 9404 spkt->satapkt_hba_driver_private; 9405 watched_cycles++; 9406 max_life_cycles = (spkt->satapkt_time + 9407 ahci_watchdog_timeout - 1) / 9408 ahci_watchdog_timeout; 9409 9410 spkt->satapkt_hba_driver_private = 9411 (void *)(intptr_t)watched_cycles; 9412 9413 if (watched_cycles <= max_life_cycles) 9414 goto next; 9415 9416 #if AHCI_DEBUG 9417 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9418 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, 9419 ahci_ctlp, "watchdog: the current " 9420 "tags is 0x%x", current_tags); 9421 } else { 9422 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, 9423 ahci_ctlp, "watchdog: the current " 9424 "slot is %d", current_slot); 9425 } 9426 #endif 9427 9428 /* 9429 * We need to check whether the HBA has 9430 * begun to execute the command, if not, 9431 * then re-set the timer of the command. 9432 */ 9433 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) && 9434 (tmp_slot != current_slot) || 9435 NCQ_CMD_IN_PROGRESS(ahci_portp) && 9436 ((0x1 << tmp_slot) & current_tags)) { 9437 spkt->satapkt_hba_driver_private = 9438 (void *)(intptr_t)0; 9439 } else { 9440 timeout_tags |= (0x1 << tmp_slot); 9441 cmn_err(CE_WARN, "!ahci%d: watchdog " 9442 "port %d satapkt 0x%p timed out\n", 9443 instance, port, (void *)spkt); 9444 } 9445 } 9446 next: 9447 CLEAR_BIT(pending_tags, tmp_slot); 9448 } 9449 9450 if (timeout_tags) { 9451 mutex_exit(&ahci_portp->ahciport_mutex); 9452 mutex_exit(&ahci_ctlp->ahcictl_mutex); 9453 ahci_timeout_pkts(ahci_ctlp, ahci_portp, 9454 port, timeout_tags); 9455 mutex_enter(&ahci_ctlp->ahcictl_mutex); 9456 mutex_enter(&ahci_portp->ahciport_mutex); 9457 } 9458 9459 mutex_exit(&ahci_portp->ahciport_mutex); 9460 } 9461 9462 /* Re-install the watchdog timeout handler */ 9463 if (ahci_ctlp->ahcictl_timeout_id != 0) { 9464 ahci_ctlp->ahcictl_timeout_id = 9465 timeout((void (*)(void *))ahci_watchdog_handler, 9466 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 9467 } 9468 9469 mutex_exit(&ahci_ctlp->ahcictl_mutex); 9470 } 9471 9472 /* 9473 * Fill the error context into sata_cmd for non-queued command error. 9474 */ 9475 static void 9476 ahci_copy_err_cnxt(sata_cmd_t *scmd, ahci_fis_d2h_register_t *rfisp) 9477 { 9478 scmd->satacmd_status_reg = GET_RFIS_STATUS(rfisp); 9479 scmd->satacmd_error_reg = GET_RFIS_ERROR(rfisp); 9480 scmd->satacmd_sec_count_lsb = GET_RFIS_SECTOR_COUNT(rfisp); 9481 scmd->satacmd_lba_low_lsb = GET_RFIS_CYL_LOW(rfisp); 9482 scmd->satacmd_lba_mid_lsb = GET_RFIS_CYL_MID(rfisp); 9483 scmd->satacmd_lba_high_lsb = GET_RFIS_CYL_HI(rfisp); 9484 scmd->satacmd_device_reg = GET_RFIS_DEV_HEAD(rfisp); 9485 9486 if (scmd->satacmd_addr_type == ATA_ADDR_LBA48) { 9487 scmd->satacmd_sec_count_msb = GET_RFIS_SECTOR_COUNT_EXP(rfisp); 9488 scmd->satacmd_lba_low_msb = GET_RFIS_CYL_LOW_EXP(rfisp); 9489 scmd->satacmd_lba_mid_msb = GET_RFIS_CYL_MID_EXP(rfisp); 9490 scmd->satacmd_lba_high_msb = GET_RFIS_CYL_HI_EXP(rfisp); 9491 } 9492 } 9493 9494 /* 9495 * Fill the ncq error page into sata_cmd for queued command error. 9496 */ 9497 static void 9498 ahci_copy_ncq_err_page(sata_cmd_t *scmd, 9499 struct sata_ncq_error_recovery_page *ncq_err_page) 9500 { 9501 scmd->satacmd_sec_count_msb = ncq_err_page->ncq_sector_count_ext; 9502 scmd->satacmd_sec_count_lsb = ncq_err_page->ncq_sector_count; 9503 scmd->satacmd_lba_low_msb = ncq_err_page->ncq_sector_number_ext; 9504 scmd->satacmd_lba_low_lsb = ncq_err_page->ncq_sector_number; 9505 scmd->satacmd_lba_mid_msb = ncq_err_page->ncq_cyl_low_ext; 9506 scmd->satacmd_lba_mid_lsb = ncq_err_page->ncq_cyl_low; 9507 scmd->satacmd_lba_high_msb = ncq_err_page->ncq_cyl_high_ext; 9508 scmd->satacmd_lba_high_lsb = ncq_err_page->ncq_cyl_high; 9509 scmd->satacmd_device_reg = ncq_err_page->ncq_dev_head; 9510 scmd->satacmd_status_reg = ncq_err_page->ncq_status; 9511 scmd->satacmd_error_reg = ncq_err_page->ncq_error; 9512 } 9513 9514 /* 9515 * Put the respective register value to sata_cmd_t for satacmd_flags. 9516 */ 9517 static void 9518 ahci_copy_out_regs(sata_cmd_t *scmd, ahci_fis_d2h_register_t *rfisp) 9519 { 9520 if (scmd->satacmd_flags.sata_copy_out_sec_count_msb) 9521 scmd->satacmd_sec_count_msb = GET_RFIS_SECTOR_COUNT_EXP(rfisp); 9522 if (scmd->satacmd_flags.sata_copy_out_lba_low_msb) 9523 scmd->satacmd_lba_low_msb = GET_RFIS_CYL_LOW_EXP(rfisp); 9524 if (scmd->satacmd_flags.sata_copy_out_lba_mid_msb) 9525 scmd->satacmd_lba_mid_msb = GET_RFIS_CYL_MID_EXP(rfisp); 9526 if (scmd->satacmd_flags.sata_copy_out_lba_high_msb) 9527 scmd->satacmd_lba_high_msb = GET_RFIS_CYL_HI_EXP(rfisp); 9528 if (scmd->satacmd_flags.sata_copy_out_sec_count_lsb) 9529 scmd->satacmd_sec_count_lsb = GET_RFIS_SECTOR_COUNT(rfisp); 9530 if (scmd->satacmd_flags.sata_copy_out_lba_low_lsb) 9531 scmd->satacmd_lba_low_lsb = GET_RFIS_CYL_LOW(rfisp); 9532 if (scmd->satacmd_flags.sata_copy_out_lba_mid_lsb) 9533 scmd->satacmd_lba_mid_lsb = GET_RFIS_CYL_MID(rfisp); 9534 if (scmd->satacmd_flags.sata_copy_out_lba_high_lsb) 9535 scmd->satacmd_lba_high_lsb = GET_RFIS_CYL_HI(rfisp); 9536 if (scmd->satacmd_flags.sata_copy_out_device_reg) 9537 scmd->satacmd_device_reg = GET_RFIS_DEV_HEAD(rfisp); 9538 if (scmd->satacmd_flags.sata_copy_out_error_reg) 9539 scmd->satacmd_error_reg = GET_RFIS_ERROR(rfisp); 9540 } 9541 9542 static void 9543 ahci_log_fatal_error_message(ahci_ctl_t *ahci_ctlp, uint8_t port, 9544 uint32_t intr_status) 9545 { 9546 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 9547 9548 if (intr_status & AHCI_INTR_STATUS_IFS) 9549 cmn_err(CE_WARN, "!ahci%d: ahci port %d has interface fatal " 9550 "error", instance, port); 9551 9552 if (intr_status & AHCI_INTR_STATUS_HBDS) 9553 cmn_err(CE_WARN, "!ahci%d: ahci port %d has bus data error", 9554 instance, port); 9555 9556 if (intr_status & AHCI_INTR_STATUS_HBFS) 9557 cmn_err(CE_WARN, "!ahci%d: ahci port %d has bus fatal error", 9558 instance, port); 9559 9560 if (intr_status & AHCI_INTR_STATUS_TFES) 9561 cmn_err(CE_WARN, "!ahci%d: ahci port %d has task file error", 9562 instance, port); 9563 9564 cmn_err(CE_WARN, "!ahci%d: ahci port %d is trying to do error " 9565 "recovery", instance, port); 9566 } 9567 9568 /* 9569 * Dump the serror message to the log. 9570 */ 9571 static void 9572 ahci_log_serror_message(ahci_ctl_t *ahci_ctlp, uint8_t port, 9573 uint32_t port_serror, int debug_only) 9574 { 9575 static char err_buf[512]; 9576 static char err_msg_header[16]; 9577 char *err_msg = err_buf; 9578 9579 *err_buf = '\0'; 9580 *err_msg_header = '\0'; 9581 9582 if (port_serror & SERROR_DATA_ERR_FIXED) { 9583 err_msg = strcat(err_msg, 9584 "\tRecovered Data Integrity Error (I)\n"); 9585 } 9586 9587 if (port_serror & SERROR_COMM_ERR_FIXED) { 9588 err_msg = strcat(err_msg, 9589 "\tRecovered Communication Error (M)\n"); 9590 } 9591 9592 if (port_serror & SERROR_DATA_ERR) { 9593 err_msg = strcat(err_msg, 9594 "\tTransient Data Integrity Error (T)\n"); 9595 } 9596 9597 if (port_serror & SERROR_PERSISTENT_ERR) { 9598 err_msg = strcat(err_msg, 9599 "\tPersistent Communication or Data Integrity Error (C)\n"); 9600 } 9601 9602 if (port_serror & SERROR_PROTOCOL_ERR) { 9603 err_msg = strcat(err_msg, "\tProtocol Error (P)\n"); 9604 } 9605 9606 if (port_serror & SERROR_INT_ERR) { 9607 err_msg = strcat(err_msg, "\tInternal Error (E)\n"); 9608 } 9609 9610 if (port_serror & SERROR_PHY_RDY_CHG) { 9611 err_msg = strcat(err_msg, "\tPhyRdy Change (N)\n"); 9612 } 9613 9614 if (port_serror & SERROR_PHY_INT_ERR) { 9615 err_msg = strcat(err_msg, "\tPhy Internal Error (I)\n"); 9616 } 9617 9618 if (port_serror & SERROR_COMM_WAKE) { 9619 err_msg = strcat(err_msg, "\tComm Wake (W)\n"); 9620 } 9621 9622 if (port_serror & SERROR_10B_TO_8B_ERR) { 9623 err_msg = strcat(err_msg, "\t10B to 8B Decode Error (B)\n"); 9624 } 9625 9626 if (port_serror & SERROR_DISPARITY_ERR) { 9627 err_msg = strcat(err_msg, "\tDisparity Error (D)\n"); 9628 } 9629 9630 if (port_serror & SERROR_CRC_ERR) { 9631 err_msg = strcat(err_msg, "\tCRC Error (C)\n"); 9632 } 9633 9634 if (port_serror & SERROR_HANDSHAKE_ERR) { 9635 err_msg = strcat(err_msg, "\tHandshake Error (H)\n"); 9636 } 9637 9638 if (port_serror & SERROR_LINK_SEQ_ERR) { 9639 err_msg = strcat(err_msg, "\tLink Sequence Error (S)\n"); 9640 } 9641 9642 if (port_serror & SERROR_TRANS_ERR) { 9643 err_msg = strcat(err_msg, 9644 "\tTransport state transition error (T)\n"); 9645 } 9646 9647 if (port_serror & SERROR_FIS_TYPE) { 9648 err_msg = strcat(err_msg, "\tUnknown FIS Type (F)\n"); 9649 } 9650 9651 if (port_serror & SERROR_EXCHANGED_ERR) { 9652 err_msg = strcat(err_msg, "\tExchanged (X)\n"); 9653 } 9654 9655 if (err_msg == NULL) 9656 return; 9657 9658 if (debug_only) { 9659 (void) sprintf(err_msg_header, "port %d", port); 9660 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, err_msg_header, NULL); 9661 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, err_msg, NULL); 9662 } else if (ahci_ctlp) { 9663 cmn_err(CE_WARN, "!ahci%d: %s %s", 9664 ddi_get_instance(ahci_ctlp->ahcictl_dip), 9665 err_msg_header, err_msg); 9666 9667 /* sata trace debug */ 9668 sata_trace_debug(ahci_ctlp->ahcictl_dip, 9669 "ahci%d: %s %s", ddi_get_instance(ahci_ctlp->ahcictl_dip), 9670 err_msg_header, err_msg); 9671 } else { 9672 cmn_err(CE_WARN, "!ahci: %s %s", err_msg_header, err_msg); 9673 9674 /* sata trace debug */ 9675 sata_trace_debug(NULL, "ahci: %s %s", err_msg_header, err_msg); 9676 } 9677 } 9678 9679 /* 9680 * Translate the sata_address_t type into the ahci_addr_t type. 9681 * sata_device.satadev_addr structure is used as source. 9682 */ 9683 static void 9684 ahci_get_ahci_addr(ahci_ctl_t *ahci_ctlp, sata_device_t *sd, 9685 ahci_addr_t *ahci_addrp) 9686 { 9687 sata_address_t *sata_addrp = &sd->satadev_addr; 9688 ahci_addrp->aa_port = 9689 ahci_ctlp->ahcictl_cport_to_port[sata_addrp->cport]; 9690 ahci_addrp->aa_pmport = sata_addrp->pmport; 9691 9692 switch (sata_addrp->qual) { 9693 case SATA_ADDR_DCPORT: 9694 case SATA_ADDR_CPORT: 9695 ahci_addrp->aa_qual = AHCI_ADDR_PORT; 9696 break; 9697 case SATA_ADDR_PMULT: 9698 ahci_addrp->aa_qual = AHCI_ADDR_PMULT; 9699 break; 9700 case SATA_ADDR_DPMPORT: 9701 case SATA_ADDR_PMPORT: 9702 ahci_addrp->aa_qual = AHCI_ADDR_PMPORT; 9703 break; 9704 case SATA_ADDR_NULL: 9705 default: 9706 /* something went wrong */ 9707 ahci_addrp->aa_qual = AHCI_ADDR_NULL; 9708 break; 9709 } 9710 } 9711 9712 /* 9713 * This routine is to calculate the total number of ports implemented 9714 * by the HBA. 9715 */ 9716 static int 9717 ahci_get_num_implemented_ports(uint32_t ports_implemented) 9718 { 9719 uint8_t i; 9720 int num = 0; 9721 9722 for (i = 0; i < AHCI_MAX_PORTS; i++) { 9723 if (((uint32_t)0x1 << i) & ports_implemented) 9724 num++; 9725 } 9726 9727 return (num); 9728 } 9729 9730 #if AHCI_DEBUG 9731 static void 9732 ahci_log(ahci_ctl_t *ahci_ctlp, uint_t level, char *fmt, ...) 9733 { 9734 static char name[16]; 9735 va_list ap; 9736 9737 mutex_enter(&ahci_log_mutex); 9738 9739 va_start(ap, fmt); 9740 if (ahci_ctlp) { 9741 (void) sprintf(name, "ahci%d: ", 9742 ddi_get_instance(ahci_ctlp->ahcictl_dip)); 9743 } else { 9744 (void) sprintf(name, "ahci: "); 9745 } 9746 9747 (void) vsprintf(ahci_log_buf, fmt, ap); 9748 va_end(ap); 9749 9750 cmn_err(level, "%s%s", name, ahci_log_buf); 9751 9752 mutex_exit(&ahci_log_mutex); 9753 } 9754 #endif 9755 9756 /* 9757 * quiesce(9E) entry point. 9758 * 9759 * This function is called when the system is single-threaded at high 9760 * PIL with preemption disabled. Therefore, this function must not be 9761 * blocked. 9762 * 9763 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure. 9764 * DDI_FAILURE indicates an error condition and should almost never happen. 9765 */ 9766 static int 9767 ahci_quiesce(dev_info_t *dip) 9768 { 9769 ahci_ctl_t *ahci_ctlp; 9770 ahci_port_t *ahci_portp; 9771 int instance, port; 9772 9773 instance = ddi_get_instance(dip); 9774 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 9775 9776 if (ahci_ctlp == NULL) 9777 return (DDI_FAILURE); 9778 9779 #if AHCI_DEBUG 9780 ahci_debug_flags = 0; 9781 #endif 9782 9783 /* disable all the interrupts. */ 9784 ahci_disable_all_intrs(ahci_ctlp); 9785 9786 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 9787 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 9788 continue; 9789 } 9790 9791 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 9792 9793 /* 9794 * Stop the port by clearing PxCMD.ST 9795 * 9796 * Here we must disable the port interrupt because 9797 * ahci_disable_all_intrs only clear GHC.IE, and IS 9798 * register will be still set if PxIE is enabled. 9799 * When ahci shares one IRQ with other drivers, the 9800 * intr handler may claim the intr mistakenly. 9801 */ 9802 ahci_disable_port_intrs(ahci_ctlp, port); 9803 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 9804 ahci_portp, port); 9805 } 9806 9807 return (DDI_SUCCESS); 9808 } 9809