1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 /* 28 * AHCI (Advanced Host Controller Interface) SATA HBA Driver 29 * 30 * Power Management Support 31 * ------------------------ 32 * 33 * At the moment, the ahci driver only implements suspend/resume to 34 * support Suspend to RAM on X86 feature. Device power management isn't 35 * implemented, link power management is disabled, and hot plug isn't 36 * allowed during the period from suspend to resume. 37 * 38 * For s/r support, the ahci driver only need to implement DDI_SUSPEND 39 * and DDI_RESUME entries, and don't need to take care of new requests 40 * sent down after suspend because the target driver (sd) has already 41 * handled these conditions, and blocked these requests. For the detailed 42 * information, please check with sdopen, sdclose and sdioctl routines. 43 * 44 */ 45 46 #include <sys/note.h> 47 #include <sys/scsi/scsi.h> 48 #include <sys/pci.h> 49 #include <sys/disp.h> 50 #include <sys/sata/sata_hba.h> 51 #include <sys/sata/adapters/ahci/ahcireg.h> 52 #include <sys/sata/adapters/ahci/ahcivar.h> 53 54 /* 55 * This is the string displayed by modinfo, etc. 56 * Make sure you keep the version ID up to date! 57 */ 58 static char ahci_ident[] = "ahci driver"; 59 60 /* 61 * Function prototypes for driver entry points 62 */ 63 static int ahci_attach(dev_info_t *, ddi_attach_cmd_t); 64 static int ahci_detach(dev_info_t *, ddi_detach_cmd_t); 65 static int ahci_getinfo(dev_info_t *, ddi_info_cmd_t, void *, void **); 66 static int ahci_quiesce(dev_info_t *); 67 68 /* 69 * Function prototypes for SATA Framework interfaces 70 */ 71 static int ahci_register_sata_hba_tran(ahci_ctl_t *, uint32_t); 72 static int ahci_unregister_sata_hba_tran(ahci_ctl_t *); 73 74 static int ahci_tran_probe_port(dev_info_t *, sata_device_t *); 75 static int ahci_tran_start(dev_info_t *, sata_pkt_t *spkt); 76 static int ahci_tran_abort(dev_info_t *, sata_pkt_t *, int); 77 static int ahci_tran_reset_dport(dev_info_t *, sata_device_t *); 78 static int ahci_tran_hotplug_port_activate(dev_info_t *, sata_device_t *); 79 static int ahci_tran_hotplug_port_deactivate(dev_info_t *, sata_device_t *); 80 #if defined(__lock_lint) 81 static int ahci_selftest(dev_info_t *, sata_device_t *); 82 #endif 83 84 /* 85 * Local function prototypes 86 */ 87 static int ahci_alloc_ports_state(ahci_ctl_t *); 88 static void ahci_dealloc_ports_state(ahci_ctl_t *); 89 static int ahci_alloc_port_state(ahci_ctl_t *, uint8_t); 90 static void ahci_dealloc_port_state(ahci_ctl_t *, uint8_t); 91 static int ahci_alloc_rcvd_fis(ahci_ctl_t *, ahci_port_t *, uint8_t); 92 static void ahci_dealloc_rcvd_fis(ahci_port_t *); 93 static int ahci_alloc_cmd_list(ahci_ctl_t *, ahci_port_t *, uint8_t); 94 static void ahci_dealloc_cmd_list(ahci_ctl_t *, ahci_port_t *); 95 static int ahci_alloc_cmd_tables(ahci_ctl_t *, ahci_port_t *); 96 static void ahci_dealloc_cmd_tables(ahci_ctl_t *, ahci_port_t *); 97 static void ahci_alloc_pmult(ahci_ctl_t *, ahci_port_t *); 98 static void ahci_dealloc_pmult(ahci_ctl_t *, ahci_port_t *); 99 100 static int ahci_initialize_controller(ahci_ctl_t *); 101 static void ahci_uninitialize_controller(ahci_ctl_t *); 102 static int ahci_initialize_port(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 103 static int ahci_config_space_init(ahci_ctl_t *); 104 105 static void ahci_drain_ports_taskq(ahci_ctl_t *); 106 static int ahci_rdwr_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t *, 107 uint8_t); 108 static int ahci_read_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t *); 109 static int ahci_write_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t); 110 static int ahci_update_pmult_pscr(ahci_ctl_t *, ahci_addr_t *, 111 sata_device_t *); 112 static int ahci_update_pmult_gscr(ahci_ctl_t *, ahci_addr_t *, 113 sata_pmult_gscr_t *); 114 static int ahci_initialize_pmult(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *, 115 sata_device_t *); 116 static int ahci_initialize_pmport(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 117 static int ahci_probe_pmult(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 118 static int ahci_probe_pmport(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *, 119 sata_device_t *); 120 121 static void ahci_disable_interface_pm(ahci_ctl_t *, uint8_t); 122 static int ahci_start_port(ahci_ctl_t *, ahci_port_t *, uint8_t); 123 static void ahci_find_dev_signature(ahci_ctl_t *, ahci_port_t *, 124 ahci_addr_t *); 125 static void ahci_update_sata_registers(ahci_ctl_t *, uint8_t, sata_device_t *); 126 static int ahci_deliver_satapkt(ahci_ctl_t *, ahci_port_t *, 127 ahci_addr_t *, sata_pkt_t *); 128 static int ahci_do_sync_start(ahci_ctl_t *, ahci_port_t *, 129 ahci_addr_t *, sata_pkt_t *); 130 static int ahci_claim_free_slot(ahci_ctl_t *, ahci_port_t *, 131 ahci_addr_t *, int); 132 static void ahci_copy_err_cnxt(sata_cmd_t *, ahci_fis_d2h_register_t *); 133 static void ahci_copy_ncq_err_page(sata_cmd_t *, 134 struct sata_ncq_error_recovery_page *); 135 static void ahci_copy_out_regs(sata_cmd_t *, ahci_fis_d2h_register_t *); 136 137 static int ahci_software_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 138 static int ahci_hba_reset(ahci_ctl_t *); 139 static int ahci_port_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 140 static int ahci_pmport_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 141 static void ahci_reject_all_abort_pkts(ahci_ctl_t *, ahci_port_t *, uint8_t); 142 static int ahci_reset_device_reject_pkts(ahci_ctl_t *, ahci_port_t *, 143 ahci_addr_t *); 144 static int ahci_reset_pmdevice_reject_pkts(ahci_ctl_t *, ahci_port_t *, 145 ahci_addr_t *); 146 static int ahci_reset_port_reject_pkts(ahci_ctl_t *, ahci_port_t *, 147 ahci_addr_t *); 148 static int ahci_reset_hba_reject_pkts(ahci_ctl_t *); 149 static int ahci_put_port_into_notrunning_state(ahci_ctl_t *, ahci_port_t *, 150 uint8_t); 151 static int ahci_restart_port_wait_till_ready(ahci_ctl_t *, ahci_port_t *, 152 uint8_t, int, int *); 153 static void ahci_mop_commands(ahci_ctl_t *, ahci_port_t *, uint32_t, 154 uint32_t, uint32_t, uint32_t, uint32_t); 155 static uint32_t ahci_get_rdlogext_data(ahci_ctl_t *, ahci_port_t *, uint8_t); 156 static void ahci_get_rqsense_data(ahci_ctl_t *, ahci_port_t *, 157 uint8_t, sata_pkt_t *); 158 static void ahci_fatal_error_recovery_handler(ahci_ctl_t *, ahci_port_t *, 159 ahci_addr_t *, uint32_t); 160 static void ahci_pmult_error_recovery_handler(ahci_ctl_t *, ahci_port_t *, 161 uint8_t, uint32_t); 162 static void ahci_timeout_pkts(ahci_ctl_t *, ahci_port_t *, 163 uint8_t, uint32_t); 164 static void ahci_events_handler(void *); 165 static void ahci_watchdog_handler(ahci_ctl_t *); 166 167 static uint_t ahci_intr(caddr_t, caddr_t); 168 static void ahci_port_intr(ahci_ctl_t *, ahci_port_t *, uint8_t); 169 static int ahci_add_intrs(ahci_ctl_t *, int); 170 static void ahci_rem_intrs(ahci_ctl_t *); 171 static void ahci_enable_all_intrs(ahci_ctl_t *); 172 static void ahci_disable_all_intrs(ahci_ctl_t *); 173 static void ahci_enable_port_intrs(ahci_ctl_t *, uint8_t); 174 static void ahci_disable_port_intrs(ahci_ctl_t *, uint8_t); 175 176 static int ahci_intr_cmd_cmplt(ahci_ctl_t *, ahci_port_t *, uint8_t); 177 static int ahci_intr_set_device_bits(ahci_ctl_t *, ahci_port_t *, uint8_t); 178 static int ahci_intr_ncq_events(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 179 static int ahci_intr_pmult_sntf_events(ahci_ctl_t *, ahci_port_t *, uint8_t); 180 static int ahci_intr_port_connect_change(ahci_ctl_t *, ahci_port_t *, uint8_t); 181 static int ahci_intr_device_mechanical_presence_status(ahci_ctl_t *, 182 ahci_port_t *, uint8_t); 183 static int ahci_intr_phyrdy_change(ahci_ctl_t *, ahci_port_t *, uint8_t); 184 static int ahci_intr_non_fatal_error(ahci_ctl_t *, ahci_port_t *, 185 uint8_t, uint32_t); 186 static int ahci_intr_fatal_error(ahci_ctl_t *, ahci_port_t *, 187 uint8_t, uint32_t); 188 static int ahci_intr_cold_port_detect(ahci_ctl_t *, ahci_port_t *, uint8_t); 189 190 static void ahci_get_ahci_addr(ahci_ctl_t *, sata_device_t *, ahci_addr_t *); 191 static int ahci_get_num_implemented_ports(uint32_t); 192 static void ahci_log_fatal_error_message(ahci_ctl_t *, uint8_t port, 193 uint32_t); 194 static void ahci_log_serror_message(ahci_ctl_t *, uint8_t, uint32_t, int); 195 #if AHCI_DEBUG 196 static void ahci_log(ahci_ctl_t *, uint_t, char *, ...); 197 #endif 198 199 200 /* 201 * DMA attributes for the data buffer 202 * 203 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 204 * does not support 64-bit addressing 205 */ 206 static ddi_dma_attr_t buffer_dma_attr = { 207 DMA_ATTR_V0, /* dma_attr_version */ 208 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 209 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 210 0x3fffffull, /* dma_attr_count_max i.e. for one cookie */ 211 0x2ull, /* dma_attr_align: word aligned */ 212 1, /* dma_attr_burstsizes */ 213 1, /* dma_attr_minxfer */ 214 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 215 0xffffffffull, /* dma_attr_seg */ 216 AHCI_PRDT_NUMBER, /* dma_attr_sgllen */ 217 512, /* dma_attr_granular */ 218 0, /* dma_attr_flags */ 219 }; 220 221 /* 222 * DMA attributes for the rcvd FIS 223 * 224 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 225 * does not support 64-bit addressing 226 */ 227 static ddi_dma_attr_t rcvd_fis_dma_attr = { 228 DMA_ATTR_V0, /* dma_attr_version */ 229 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 230 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 231 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 232 0x100ull, /* dma_attr_align: 256-byte aligned */ 233 1, /* dma_attr_burstsizes */ 234 1, /* dma_attr_minxfer */ 235 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 236 0xffffffffull, /* dma_attr_seg */ 237 1, /* dma_attr_sgllen */ 238 1, /* dma_attr_granular */ 239 0, /* dma_attr_flags */ 240 }; 241 242 /* 243 * DMA attributes for the command list 244 * 245 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 246 * does not support 64-bit addressing 247 */ 248 static ddi_dma_attr_t cmd_list_dma_attr = { 249 DMA_ATTR_V0, /* dma_attr_version */ 250 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 251 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 252 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 253 0x400ull, /* dma_attr_align: 1K-byte aligned */ 254 1, /* dma_attr_burstsizes */ 255 1, /* dma_attr_minxfer */ 256 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 257 0xffffffffull, /* dma_attr_seg */ 258 1, /* dma_attr_sgllen */ 259 1, /* dma_attr_granular */ 260 0, /* dma_attr_flags */ 261 }; 262 263 /* 264 * DMA attributes for cmd tables 265 * 266 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 267 * does not support 64-bit addressing 268 */ 269 static ddi_dma_attr_t cmd_table_dma_attr = { 270 DMA_ATTR_V0, /* dma_attr_version */ 271 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 272 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 273 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 274 0x80ull, /* dma_attr_align: 128-byte aligned */ 275 1, /* dma_attr_burstsizes */ 276 1, /* dma_attr_minxfer */ 277 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 278 0xffffffffull, /* dma_attr_seg */ 279 1, /* dma_attr_sgllen */ 280 1, /* dma_attr_granular */ 281 0, /* dma_attr_flags */ 282 }; 283 284 285 /* Device access attributes */ 286 static ddi_device_acc_attr_t accattr = { 287 DDI_DEVICE_ATTR_V0, 288 DDI_STRUCTURE_LE_ACC, 289 DDI_STRICTORDER_ACC 290 }; 291 292 293 static struct dev_ops ahcictl_dev_ops = { 294 DEVO_REV, /* devo_rev */ 295 0, /* refcnt */ 296 ahci_getinfo, /* info */ 297 nulldev, /* identify */ 298 nulldev, /* probe */ 299 ahci_attach, /* attach */ 300 ahci_detach, /* detach */ 301 nodev, /* no reset */ 302 (struct cb_ops *)0, /* driver operations */ 303 NULL, /* bus operations */ 304 NULL, /* power */ 305 ahci_quiesce, /* quiesce */ 306 }; 307 308 static sata_tran_hotplug_ops_t ahci_tran_hotplug_ops = { 309 SATA_TRAN_HOTPLUG_OPS_REV_1, 310 ahci_tran_hotplug_port_activate, 311 ahci_tran_hotplug_port_deactivate 312 }; 313 314 extern struct mod_ops mod_driverops; 315 316 static struct modldrv modldrv = { 317 &mod_driverops, /* driverops */ 318 ahci_ident, /* short description */ 319 &ahcictl_dev_ops, /* driver ops */ 320 }; 321 322 static struct modlinkage modlinkage = { 323 MODREV_1, 324 &modldrv, 325 NULL 326 }; 327 328 /* The following variables are watchdog handler related */ 329 static int ahci_watchdog_timeout = 5; /* 5 seconds */ 330 static int ahci_watchdog_tick; 331 332 /* 333 * This static variable indicates the size of command table, 334 * and it's changeable with prdt number, which ahci_dma_prdt_number 335 * indicates. 336 */ 337 static size_t ahci_cmd_table_size; 338 339 /* 340 * The below global variables are tunable via /etc/system 341 * 342 * ahci_dma_prdt_number 343 * ahci_msi_enabled 344 * ahci_buf_64bit_dma 345 * ahci_commu_64bit_dma 346 */ 347 348 /* The number of Physical Region Descriptor Table(PRDT) in Command Table */ 349 int ahci_dma_prdt_number = AHCI_PRDT_NUMBER; 350 351 /* AHCI MSI is tunable */ 352 boolean_t ahci_msi_enabled = B_TRUE; 353 354 /* 355 * 64-bit dma addressing for data buffer is tunable 356 * 357 * The variable controls only the below value: 358 * DBAU (upper 32-bits physical address of data block) 359 */ 360 boolean_t ahci_buf_64bit_dma = B_TRUE; 361 362 /* 363 * 64-bit dma addressing for communication system descriptors is tunable 364 * 365 * The variable controls the below three values: 366 * 367 * PxCLBU (upper 32-bits for the command list base physical address) 368 * PxFBU (upper 32-bits for the received FIS base physical address) 369 * CTBAU (upper 32-bits of command table base) 370 */ 371 boolean_t ahci_commu_64bit_dma = B_TRUE; 372 373 /* 374 * End of global tunable variable definition 375 */ 376 377 #if AHCI_DEBUG 378 uint32_t ahci_debug_flags = 0; 379 #else 380 uint32_t ahci_debug_flags = (AHCIDBG_ERRS|AHCIDBG_TIMEOUT); 381 #endif 382 383 384 #if AHCI_DEBUG 385 /* The following is needed for ahci_log() */ 386 static kmutex_t ahci_log_mutex; 387 static char ahci_log_buf[512]; 388 #endif 389 390 /* Opaque state pointer initialized by ddi_soft_state_init() */ 391 static void *ahci_statep = NULL; 392 393 /* 394 * ahci module initialization. 395 */ 396 int 397 _init(void) 398 { 399 int ret; 400 401 ret = ddi_soft_state_init(&ahci_statep, sizeof (ahci_ctl_t), 0); 402 if (ret != 0) { 403 goto err_out; 404 } 405 406 #if AHCI_DEBUG 407 mutex_init(&ahci_log_mutex, NULL, MUTEX_DRIVER, NULL); 408 #endif 409 410 if ((ret = sata_hba_init(&modlinkage)) != 0) { 411 #if AHCI_DEBUG 412 mutex_destroy(&ahci_log_mutex); 413 #endif 414 ddi_soft_state_fini(&ahci_statep); 415 goto err_out; 416 } 417 418 ret = mod_install(&modlinkage); 419 if (ret != 0) { 420 sata_hba_fini(&modlinkage); 421 #if AHCI_DEBUG 422 mutex_destroy(&ahci_log_mutex); 423 #endif 424 ddi_soft_state_fini(&ahci_statep); 425 goto err_out; 426 } 427 428 /* watchdog tick */ 429 ahci_watchdog_tick = drv_usectohz( 430 (clock_t)ahci_watchdog_timeout * 1000000); 431 return (ret); 432 433 err_out: 434 cmn_err(CE_WARN, "!ahci: Module init failed"); 435 return (ret); 436 } 437 438 /* 439 * ahci module uninitialize. 440 */ 441 int 442 _fini(void) 443 { 444 int ret; 445 446 ret = mod_remove(&modlinkage); 447 if (ret != 0) { 448 return (ret); 449 } 450 451 /* Remove the resources allocated in _init(). */ 452 sata_hba_fini(&modlinkage); 453 #if AHCI_DEBUG 454 mutex_destroy(&ahci_log_mutex); 455 #endif 456 ddi_soft_state_fini(&ahci_statep); 457 458 return (ret); 459 } 460 461 /* 462 * _info entry point 463 */ 464 int 465 _info(struct modinfo *modinfop) 466 { 467 return (mod_info(&modlinkage, modinfop)); 468 } 469 470 /* 471 * The attach entry point for dev_ops. 472 */ 473 static int 474 ahci_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 475 { 476 ahci_ctl_t *ahci_ctlp = NULL; 477 int instance = ddi_get_instance(dip); 478 int status; 479 int attach_state; 480 uint32_t cap_status, ahci_version; 481 int intr_types; 482 int i; 483 pci_regspec_t *regs; 484 int regs_length; 485 int rnumber; 486 #if AHCI_DEBUG 487 int speed; 488 #endif 489 490 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, "ahci_attach enter", 491 NULL); 492 493 switch (cmd) { 494 case DDI_ATTACH: 495 break; 496 497 case DDI_RESUME: 498 499 /* 500 * During DDI_RESUME, the hardware state of the device 501 * (power may have been removed from the device) must be 502 * restored, allow pending requests to continue, and 503 * service new requests. 504 */ 505 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 506 mutex_enter(&ahci_ctlp->ahcictl_mutex); 507 508 /* Restart watch thread */ 509 if (ahci_ctlp->ahcictl_timeout_id == 0) 510 ahci_ctlp->ahcictl_timeout_id = timeout( 511 (void (*)(void *))ahci_watchdog_handler, 512 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 513 514 mutex_exit(&ahci_ctlp->ahcictl_mutex); 515 516 /* 517 * Re-initialize the controller and enable the interrupts and 518 * restart all the ports. 519 * 520 * Note that so far we don't support hot-plug during 521 * suspend/resume. 522 */ 523 if (ahci_initialize_controller(ahci_ctlp) != AHCI_SUCCESS) { 524 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PM, ahci_ctlp, 525 "Failed to initialize the controller " 526 "during DDI_RESUME", NULL); 527 return (DDI_FAILURE); 528 } 529 530 mutex_enter(&ahci_ctlp->ahcictl_mutex); 531 ahci_ctlp->ahcictl_flags &= ~ AHCI_SUSPEND; 532 mutex_exit(&ahci_ctlp->ahcictl_mutex); 533 534 return (DDI_SUCCESS); 535 536 default: 537 return (DDI_FAILURE); 538 } 539 540 attach_state = AHCI_ATTACH_STATE_NONE; 541 542 /* Allocate soft state */ 543 status = ddi_soft_state_zalloc(ahci_statep, instance); 544 if (status != DDI_SUCCESS) { 545 cmn_err(CE_WARN, "!ahci%d: Cannot allocate soft state", 546 instance); 547 goto err_out; 548 } 549 550 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 551 ahci_ctlp->ahcictl_flags |= AHCI_ATTACH; 552 ahci_ctlp->ahcictl_dip = dip; 553 554 /* Initialize the cport/port mapping */ 555 for (i = 0; i < AHCI_MAX_PORTS; i++) { 556 ahci_ctlp->ahcictl_port_to_cport[i] = 0xff; 557 ahci_ctlp->ahcictl_cport_to_port[i] = 0xff; 558 } 559 560 attach_state |= AHCI_ATTACH_STATE_STATEP_ALLOC; 561 562 /* 563 * Now map the AHCI base address; which includes global 564 * registers and port control registers 565 * 566 * According to the spec, the AHCI Base Address is BAR5, 567 * but BAR0-BAR4 are optional, so we need to check which 568 * rnumber is used for BAR5. 569 */ 570 571 /* 572 * search through DDI "reg" property for the AHCI register set 573 */ 574 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, dip, 575 DDI_PROP_DONTPASS, "reg", (int **)®s, 576 (uint_t *)®s_length) != DDI_PROP_SUCCESS) { 577 cmn_err(CE_WARN, "!ahci%d: Cannot lookup reg property", 578 instance); 579 goto err_out; 580 } 581 582 /* AHCI Base Address is located at 0x24 offset */ 583 for (rnumber = 0; rnumber < regs_length; ++rnumber) { 584 if ((regs[rnumber].pci_phys_hi & PCI_REG_REG_M) 585 == AHCI_PCI_RNUM) 586 break; 587 } 588 589 ddi_prop_free(regs); 590 591 if (rnumber == regs_length) { 592 cmn_err(CE_WARN, "!ahci%d: Cannot find AHCI register set", 593 instance); 594 goto err_out; 595 } 596 597 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "rnumber = %d", rnumber); 598 599 status = ddi_regs_map_setup(dip, 600 rnumber, 601 (caddr_t *)&ahci_ctlp->ahcictl_ahci_addr, 602 0, 603 0, 604 &accattr, 605 &ahci_ctlp->ahcictl_ahci_acc_handle); 606 if (status != DDI_SUCCESS) { 607 cmn_err(CE_WARN, "!ahci%d: Cannot map register space", 608 instance); 609 goto err_out; 610 } 611 612 attach_state |= AHCI_ATTACH_STATE_REG_MAP; 613 614 /* Get the AHCI version information */ 615 ahci_version = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 616 (uint32_t *)AHCI_GLOBAL_VS(ahci_ctlp)); 617 618 cmn_err(CE_NOTE, "!ahci%d: hba AHCI version = %x.%x", instance, 619 (ahci_version & 0xffff0000) >> 16, 620 ((ahci_version & 0x0000ff00) >> 4 | 621 (ahci_version & 0x000000ff))); 622 623 /* We don't support controllers whose versions are lower than 1.0 */ 624 if (!(ahci_version & 0xffff0000)) { 625 cmn_err(CE_WARN, "ahci%d: Don't support AHCI HBA with lower " 626 "than version 1.0", instance); 627 goto err_out; 628 } 629 630 /* Get the HBA capabilities information */ 631 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 632 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 633 634 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba capabilites = 0x%x", 635 cap_status); 636 637 #if AHCI_DEBUG 638 /* Get the interface speed supported by the HBA */ 639 speed = (cap_status & AHCI_HBA_CAP_ISS) >> AHCI_HBA_CAP_ISS_SHIFT; 640 if (speed == 0x01) { 641 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 642 "hba interface speed support: Gen 1 (1.5Gbps)", NULL); 643 } else if (speed == 0x10) { 644 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 645 "hba interface speed support: Gen 2 (3 Gbps)", NULL); 646 } else if (speed == 0x11) { 647 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 648 "hba interface speed support: Gen 3 (6 Gbps)", NULL); 649 } 650 #endif 651 652 /* Get the number of command slots supported by the HBA */ 653 ahci_ctlp->ahcictl_num_cmd_slots = 654 ((cap_status & AHCI_HBA_CAP_NCS) >> 655 AHCI_HBA_CAP_NCS_SHIFT) + 1; 656 657 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba number of cmd slots: %d", 658 ahci_ctlp->ahcictl_num_cmd_slots); 659 660 /* Get the bit map which indicates ports implemented by the HBA */ 661 ahci_ctlp->ahcictl_ports_implemented = 662 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 663 (uint32_t *)AHCI_GLOBAL_PI(ahci_ctlp)); 664 665 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba implementation of ports: 0x%x", 666 ahci_ctlp->ahcictl_ports_implemented); 667 668 /* 669 * According to the AHCI spec, CAP.NP should indicate the maximum 670 * number of ports supported by the HBA silicon, but we found 671 * this value of ICH8 chipset only indicates the number of ports 672 * implemented (exposed) by it. Therefore, the driver should calculate 673 * the potential maximum value by checking PI register, and use 674 * the maximum of this value and CAP.NP. 675 */ 676 ahci_ctlp->ahcictl_num_ports = max( 677 (cap_status & AHCI_HBA_CAP_NP) + 1, 678 ddi_fls(ahci_ctlp->ahcictl_ports_implemented)); 679 680 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba number of ports: %d", 681 ahci_ctlp->ahcictl_num_ports); 682 683 /* Get the number of implemented ports by the HBA */ 684 ahci_ctlp->ahcictl_num_implemented_ports = 685 ahci_get_num_implemented_ports( 686 ahci_ctlp->ahcictl_ports_implemented); 687 688 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 689 "hba number of implemented ports: %d", 690 ahci_ctlp->ahcictl_num_implemented_ports); 691 692 /* Check whether HBA supports 64bit DMA addressing */ 693 if (!(cap_status & AHCI_HBA_CAP_S64A)) { 694 ahci_ctlp->ahcictl_cap |= AHCI_CAP_BUF_32BIT_DMA; 695 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 696 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 697 "hba does not support 64-bit addressing", NULL); 698 } 699 700 /* Checking for the support of Port Multiplier */ 701 if (cap_status & AHCI_HBA_CAP_SPM) { 702 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PMULT_CBSS; 703 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 704 "hba supports port multiplier (CBSS)", NULL); 705 706 /* Support FIS-based switching ? */ 707 if (cap_status & AHCI_HBA_CAP_FBSS) { 708 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PMULT_FBSS; 709 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 710 "hba supports FIS-based switching (FBSS)", NULL); 711 } 712 } 713 714 /* Checking for Support Command List Override */ 715 if (cap_status & AHCI_HBA_CAP_SCLO) { 716 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SCLO; 717 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 718 "hba supports command list override.", NULL); 719 } 720 721 /* Checking for Asynchronous Notification */ 722 if (cap_status & AHCI_HBA_CAP_SSNTF) { 723 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SNTF; 724 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 725 "hba supports asynchronous notification.", NULL); 726 } 727 728 if (pci_config_setup(dip, &ahci_ctlp->ahcictl_pci_conf_handle) 729 != DDI_SUCCESS) { 730 cmn_err(CE_WARN, "!ahci%d: Cannot set up pci configure space", 731 instance); 732 goto err_out; 733 } 734 735 attach_state |= AHCI_ATTACH_STATE_PCICFG_SETUP; 736 737 /* 738 * Check the pci configuration space, and set caps. We also 739 * handle the hardware defect in this function. 740 * 741 * For example, force ATI SB600 to use 32-bit dma addressing 742 * since it doesn't support 64-bit dma though its CAP register 743 * declares it support. 744 */ 745 if (ahci_config_space_init(ahci_ctlp) == AHCI_FAILURE) { 746 cmn_err(CE_WARN, "!ahci%d: ahci_config_space_init failed", 747 instance); 748 goto err_out; 749 } 750 751 /* 752 * Disable the whole controller interrupts before adding 753 * interrupt handlers(s). 754 */ 755 ahci_disable_all_intrs(ahci_ctlp); 756 757 /* Get supported interrupt types */ 758 if (ddi_intr_get_supported_types(dip, &intr_types) != DDI_SUCCESS) { 759 cmn_err(CE_WARN, "!ahci%d: ddi_intr_get_supported_types failed", 760 instance); 761 goto err_out; 762 } 763 764 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 765 "ddi_intr_get_supported_types() returned: 0x%x", 766 intr_types); 767 768 if (ahci_msi_enabled && (intr_types & DDI_INTR_TYPE_MSI)) { 769 /* 770 * Try MSI first, but fall back to FIXED if failed 771 */ 772 if (ahci_add_intrs(ahci_ctlp, DDI_INTR_TYPE_MSI) == 773 DDI_SUCCESS) { 774 ahci_ctlp->ahcictl_intr_type = DDI_INTR_TYPE_MSI; 775 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 776 "Using MSI interrupt type", NULL); 777 goto intr_done; 778 } 779 780 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 781 "MSI registration failed, " 782 "trying FIXED interrupts", NULL); 783 } 784 785 if (intr_types & DDI_INTR_TYPE_FIXED) { 786 if (ahci_add_intrs(ahci_ctlp, DDI_INTR_TYPE_FIXED) == 787 DDI_SUCCESS) { 788 ahci_ctlp->ahcictl_intr_type = DDI_INTR_TYPE_FIXED; 789 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 790 "Using FIXED interrupt type", NULL); 791 goto intr_done; 792 } 793 794 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 795 "FIXED interrupt registration failed", NULL); 796 } 797 798 cmn_err(CE_WARN, "!ahci%d: Interrupt registration failed", instance); 799 800 goto err_out; 801 802 intr_done: 803 804 attach_state |= AHCI_ATTACH_STATE_INTR_ADDED; 805 806 /* Initialize the controller mutex */ 807 mutex_init(&ahci_ctlp->ahcictl_mutex, NULL, MUTEX_DRIVER, 808 (void *)(uintptr_t)ahci_ctlp->ahcictl_intr_pri); 809 810 attach_state |= AHCI_ATTACH_STATE_MUTEX_INIT; 811 812 if (ahci_dma_prdt_number < AHCI_MIN_PRDT_NUMBER) { 813 ahci_dma_prdt_number = AHCI_MIN_PRDT_NUMBER; 814 } else if (ahci_dma_prdt_number > AHCI_MAX_PRDT_NUMBER) { 815 ahci_dma_prdt_number = AHCI_MAX_PRDT_NUMBER; 816 } 817 818 ahci_cmd_table_size = (sizeof (ahci_cmd_table_t) + 819 (ahci_dma_prdt_number - AHCI_PRDT_NUMBER) * 820 sizeof (ahci_prdt_item_t)); 821 822 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 823 "ahci_attach: ahci_dma_prdt_number set by user is 0x%x," 824 " ahci_cmd_table_size is 0x%x", 825 ahci_dma_prdt_number, ahci_cmd_table_size); 826 827 if (ahci_dma_prdt_number != AHCI_PRDT_NUMBER) 828 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_sgllen = 829 ahci_dma_prdt_number; 830 831 ahci_ctlp->ahcictl_buffer_dma_attr = buffer_dma_attr; 832 ahci_ctlp->ahcictl_rcvd_fis_dma_attr = rcvd_fis_dma_attr; 833 ahci_ctlp->ahcictl_cmd_list_dma_attr = cmd_list_dma_attr; 834 ahci_ctlp->ahcictl_cmd_table_dma_attr = cmd_table_dma_attr; 835 836 if ((ahci_buf_64bit_dma == B_FALSE) || 837 (ahci_ctlp->ahcictl_cap & AHCI_CAP_BUF_32BIT_DMA)) { 838 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_addr_hi = 839 0xffffffffull; 840 } 841 842 if ((ahci_commu_64bit_dma == B_FALSE) || 843 (ahci_ctlp->ahcictl_cap & AHCI_CAP_COMMU_32BIT_DMA)) { 844 ahci_ctlp->ahcictl_rcvd_fis_dma_attr.dma_attr_addr_hi = 845 0xffffffffull; 846 ahci_ctlp->ahcictl_cmd_list_dma_attr.dma_attr_addr_hi = 847 0xffffffffull; 848 ahci_ctlp->ahcictl_cmd_table_dma_attr.dma_attr_addr_hi = 849 0xffffffffull; 850 } 851 852 /* Allocate the ports structure */ 853 status = ahci_alloc_ports_state(ahci_ctlp); 854 if (status != AHCI_SUCCESS) { 855 cmn_err(CE_WARN, "!ahci%d: Cannot allocate ports structure", 856 instance); 857 goto err_out; 858 } 859 860 attach_state |= AHCI_ATTACH_STATE_PORT_ALLOC; 861 862 /* 863 * Initialize the controller and ports. 864 */ 865 status = ahci_initialize_controller(ahci_ctlp); 866 if (status != AHCI_SUCCESS) { 867 cmn_err(CE_WARN, "!ahci%d: HBA initialization failed", 868 instance); 869 goto err_out; 870 } 871 872 attach_state |= AHCI_ATTACH_STATE_HW_INIT; 873 874 /* Start one thread to check packet timeouts */ 875 ahci_ctlp->ahcictl_timeout_id = timeout( 876 (void (*)(void *))ahci_watchdog_handler, 877 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 878 879 attach_state |= AHCI_ATTACH_STATE_TIMEOUT_ENABLED; 880 881 if (ahci_register_sata_hba_tran(ahci_ctlp, cap_status)) { 882 cmn_err(CE_WARN, "!ahci%d: sata hba tran registration failed", 883 instance); 884 goto err_out; 885 } 886 887 ahci_ctlp->ahcictl_flags &= ~AHCI_ATTACH; 888 889 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "ahci_attach success!", NULL); 890 891 return (DDI_SUCCESS); 892 893 err_out: 894 if (attach_state & AHCI_ATTACH_STATE_TIMEOUT_ENABLED) { 895 mutex_enter(&ahci_ctlp->ahcictl_mutex); 896 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 897 ahci_ctlp->ahcictl_timeout_id = 0; 898 mutex_exit(&ahci_ctlp->ahcictl_mutex); 899 } 900 901 if (attach_state & AHCI_ATTACH_STATE_HW_INIT) { 902 ahci_uninitialize_controller(ahci_ctlp); 903 } 904 905 if (attach_state & AHCI_ATTACH_STATE_PORT_ALLOC) { 906 ahci_dealloc_ports_state(ahci_ctlp); 907 } 908 909 if (attach_state & AHCI_ATTACH_STATE_MUTEX_INIT) { 910 mutex_destroy(&ahci_ctlp->ahcictl_mutex); 911 } 912 913 if (attach_state & AHCI_ATTACH_STATE_INTR_ADDED) { 914 ahci_rem_intrs(ahci_ctlp); 915 } 916 917 if (attach_state & AHCI_ATTACH_STATE_PCICFG_SETUP) { 918 pci_config_teardown(&ahci_ctlp->ahcictl_pci_conf_handle); 919 } 920 921 if (attach_state & AHCI_ATTACH_STATE_REG_MAP) { 922 ddi_regs_map_free(&ahci_ctlp->ahcictl_ahci_acc_handle); 923 } 924 925 if (attach_state & AHCI_ATTACH_STATE_STATEP_ALLOC) { 926 ddi_soft_state_free(ahci_statep, instance); 927 } 928 929 return (DDI_FAILURE); 930 } 931 932 /* 933 * The detach entry point for dev_ops. 934 */ 935 static int 936 ahci_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 937 { 938 ahci_ctl_t *ahci_ctlp; 939 int instance; 940 int ret; 941 942 instance = ddi_get_instance(dip); 943 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 944 945 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_detach enter", NULL); 946 947 switch (cmd) { 948 case DDI_DETACH: 949 950 /* disable the interrupts for an uninterrupted detach */ 951 mutex_enter(&ahci_ctlp->ahcictl_mutex); 952 ahci_disable_all_intrs(ahci_ctlp); 953 mutex_exit(&ahci_ctlp->ahcictl_mutex); 954 955 /* unregister from the sata framework. */ 956 ret = ahci_unregister_sata_hba_tran(ahci_ctlp); 957 if (ret != AHCI_SUCCESS) { 958 mutex_enter(&ahci_ctlp->ahcictl_mutex); 959 ahci_enable_all_intrs(ahci_ctlp); 960 mutex_exit(&ahci_ctlp->ahcictl_mutex); 961 return (DDI_FAILURE); 962 } 963 964 mutex_enter(&ahci_ctlp->ahcictl_mutex); 965 966 /* stop the watchdog handler */ 967 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 968 ahci_ctlp->ahcictl_timeout_id = 0; 969 970 mutex_exit(&ahci_ctlp->ahcictl_mutex); 971 972 /* uninitialize the controller */ 973 ahci_uninitialize_controller(ahci_ctlp); 974 975 /* remove the interrupts */ 976 ahci_rem_intrs(ahci_ctlp); 977 978 /* deallocate the ports structures */ 979 ahci_dealloc_ports_state(ahci_ctlp); 980 981 /* destroy mutex */ 982 mutex_destroy(&ahci_ctlp->ahcictl_mutex); 983 984 /* teardown the pci config */ 985 pci_config_teardown(&ahci_ctlp->ahcictl_pci_conf_handle); 986 987 /* remove the reg maps. */ 988 ddi_regs_map_free(&ahci_ctlp->ahcictl_ahci_acc_handle); 989 990 /* free the soft state. */ 991 ddi_soft_state_free(ahci_statep, instance); 992 993 return (DDI_SUCCESS); 994 995 case DDI_SUSPEND: 996 997 /* 998 * The steps associated with suspension must include putting 999 * the underlying device into a quiescent state so that it 1000 * will not generate interrupts or modify or access memory. 1001 */ 1002 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1003 if (ahci_ctlp->ahcictl_flags & AHCI_SUSPEND) { 1004 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1005 return (DDI_SUCCESS); 1006 } 1007 1008 ahci_ctlp->ahcictl_flags |= AHCI_SUSPEND; 1009 1010 /* stop the watchdog handler */ 1011 if (ahci_ctlp->ahcictl_timeout_id) { 1012 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 1013 ahci_ctlp->ahcictl_timeout_id = 0; 1014 } 1015 1016 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1017 1018 /* 1019 * drain the taskq 1020 */ 1021 ahci_drain_ports_taskq(ahci_ctlp); 1022 1023 /* 1024 * Disable the interrupts and stop all the ports. 1025 */ 1026 ahci_uninitialize_controller(ahci_ctlp); 1027 1028 return (DDI_SUCCESS); 1029 1030 default: 1031 return (DDI_FAILURE); 1032 } 1033 } 1034 1035 /* 1036 * The info entry point for dev_ops. 1037 * 1038 */ 1039 static int 1040 ahci_getinfo(dev_info_t *dip, ddi_info_cmd_t infocmd, 1041 void *arg, void **result) 1042 { 1043 #ifndef __lock_lint 1044 _NOTE(ARGUNUSED(dip)) 1045 #endif /* __lock_lint */ 1046 1047 ahci_ctl_t *ahci_ctlp; 1048 int instance; 1049 dev_t dev; 1050 1051 dev = (dev_t)arg; 1052 instance = getminor(dev); 1053 1054 switch (infocmd) { 1055 case DDI_INFO_DEVT2DEVINFO: 1056 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 1057 if (ahci_ctlp != NULL) { 1058 *result = ahci_ctlp->ahcictl_dip; 1059 return (DDI_SUCCESS); 1060 } else { 1061 *result = NULL; 1062 return (DDI_FAILURE); 1063 } 1064 case DDI_INFO_DEVT2INSTANCE: 1065 *(int *)result = instance; 1066 break; 1067 default: 1068 break; 1069 } 1070 1071 return (DDI_SUCCESS); 1072 } 1073 1074 /* 1075 * Registers the ahci with sata framework. 1076 */ 1077 static int 1078 ahci_register_sata_hba_tran(ahci_ctl_t *ahci_ctlp, uint32_t cap_status) 1079 { 1080 struct sata_hba_tran *sata_hba_tran; 1081 1082 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 1083 "ahci_register_sata_hba_tran enter", NULL); 1084 1085 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1086 1087 /* Allocate memory for the sata_hba_tran */ 1088 sata_hba_tran = kmem_zalloc(sizeof (sata_hba_tran_t), KM_SLEEP); 1089 1090 sata_hba_tran->sata_tran_hba_rev = SATA_TRAN_HBA_REV; 1091 sata_hba_tran->sata_tran_hba_dip = ahci_ctlp->ahcictl_dip; 1092 sata_hba_tran->sata_tran_hba_dma_attr = 1093 &ahci_ctlp->ahcictl_buffer_dma_attr; 1094 1095 /* Report the number of implemented ports */ 1096 sata_hba_tran->sata_tran_hba_num_cports = 1097 ahci_ctlp->ahcictl_num_implemented_ports; 1098 1099 /* Support ATAPI device */ 1100 sata_hba_tran->sata_tran_hba_features_support = SATA_CTLF_ATAPI; 1101 1102 /* Get the data transfer capability for PIO command by the HBA */ 1103 if (cap_status & AHCI_HBA_CAP_PMD) { 1104 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PIO_MDRQ; 1105 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "HBA supports multiple " 1106 "DRQ block data transfer for PIO command protocol", NULL); 1107 } 1108 1109 /* 1110 * According to the AHCI spec, the ATA/ATAPI-7 queued feature set 1111 * is not supported by AHCI (including the READ QUEUED (EXT), WRITE 1112 * QUEUED (EXT), and SERVICE commands). Queued operations are 1113 * supported in AHCI using the READ FPDMA QUEUED and WRITE FPDMA 1114 * QUEUED commands when the HBA and device support native command 1115 * queuing(NCQ). 1116 * 1117 * SATA_CTLF_NCQ will be set to sata_tran_hba_features_support if the 1118 * CAP register of the HBA indicates NCQ is supported. 1119 * 1120 * SATA_CTLF_NCQ cannot be set if AHCI_CAP_NO_MCMDLIST_NONQUEUE is 1121 * set because the previous register content of PxCI can be re-written 1122 * in the register write. 1123 */ 1124 if ((cap_status & AHCI_HBA_CAP_SNCQ) && 1125 !(ahci_ctlp->ahcictl_cap & AHCI_CAP_NO_MCMDLIST_NONQUEUE)) { 1126 sata_hba_tran->sata_tran_hba_features_support |= SATA_CTLF_NCQ; 1127 ahci_ctlp->ahcictl_cap |= AHCI_CAP_NCQ; 1128 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "HBA supports Native " 1129 "Command Queuing", NULL); 1130 } 1131 1132 /* Support port multiplier? */ 1133 if (cap_status & AHCI_HBA_CAP_SPM) { 1134 sata_hba_tran->sata_tran_hba_features_support |= 1135 SATA_CTLF_PORT_MULTIPLIER; 1136 1137 /* Support FIS-based switching for port multiplier? */ 1138 if (cap_status & AHCI_HBA_CAP_FBSS) { 1139 sata_hba_tran->sata_tran_hba_features_support |= 1140 SATA_CTLF_PMULT_FBS; 1141 } 1142 } 1143 1144 /* Report the number of command slots */ 1145 sata_hba_tran->sata_tran_hba_qdepth = ahci_ctlp->ahcictl_num_cmd_slots; 1146 1147 sata_hba_tran->sata_tran_probe_port = ahci_tran_probe_port; 1148 sata_hba_tran->sata_tran_start = ahci_tran_start; 1149 sata_hba_tran->sata_tran_abort = ahci_tran_abort; 1150 sata_hba_tran->sata_tran_reset_dport = ahci_tran_reset_dport; 1151 sata_hba_tran->sata_tran_hotplug_ops = &ahci_tran_hotplug_ops; 1152 #ifdef __lock_lint 1153 sata_hba_tran->sata_tran_selftest = ahci_selftest; 1154 #endif 1155 /* 1156 * When SATA framework adds support for pwrmgt the 1157 * pwrmgt_ops needs to be updated 1158 */ 1159 sata_hba_tran->sata_tran_pwrmgt_ops = NULL; 1160 sata_hba_tran->sata_tran_ioctl = NULL; 1161 1162 ahci_ctlp->ahcictl_sata_hba_tran = sata_hba_tran; 1163 1164 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1165 1166 /* Attach it to SATA framework */ 1167 if (sata_hba_attach(ahci_ctlp->ahcictl_dip, sata_hba_tran, DDI_ATTACH) 1168 != DDI_SUCCESS) { 1169 kmem_free((void *)sata_hba_tran, sizeof (sata_hba_tran_t)); 1170 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1171 ahci_ctlp->ahcictl_sata_hba_tran = NULL; 1172 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1173 return (AHCI_FAILURE); 1174 } 1175 1176 return (AHCI_SUCCESS); 1177 } 1178 1179 /* 1180 * Unregisters the ahci with sata framework. 1181 */ 1182 static int 1183 ahci_unregister_sata_hba_tran(ahci_ctl_t *ahci_ctlp) 1184 { 1185 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1186 "ahci_unregister_sata_hba_tran enter", NULL); 1187 1188 /* Detach from the SATA framework. */ 1189 if (sata_hba_detach(ahci_ctlp->ahcictl_dip, DDI_DETACH) != 1190 DDI_SUCCESS) { 1191 return (AHCI_FAILURE); 1192 } 1193 1194 /* Deallocate sata_hba_tran. */ 1195 kmem_free((void *)ahci_ctlp->ahcictl_sata_hba_tran, 1196 sizeof (sata_hba_tran_t)); 1197 1198 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1199 ahci_ctlp->ahcictl_sata_hba_tran = NULL; 1200 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1201 1202 return (AHCI_SUCCESS); 1203 } 1204 1205 #define SET_PORTSTR(str, addrp) \ 1206 if (AHCI_ADDR_IS_PORT(addrp)) \ 1207 (void) sprintf((str), "%d", (addrp)->aa_port); \ 1208 else if (AHCI_ADDR_IS_PMULT(addrp)) \ 1209 (void) sprintf((str), "%d (pmult)", (addrp)->aa_port); \ 1210 else \ 1211 (void) sprintf((str), "%d:%d", (addrp)->aa_port, \ 1212 (addrp)->aa_pmport); 1213 1214 /* 1215 * ahci_tran_probe_port is called by SATA framework. It returns port state, 1216 * port status registers and an attached device type via sata_device 1217 * structure. 1218 * 1219 * We return the cached information from a previous hardware probe. The 1220 * actual hardware probing itself was done either from within 1221 * ahci_initialize_controller() during the driver attach or from a phy 1222 * ready change interrupt handler. 1223 */ 1224 static int 1225 ahci_tran_probe_port(dev_info_t *dip, sata_device_t *sd) 1226 { 1227 ahci_ctl_t *ahci_ctlp; 1228 ahci_port_t *ahci_portp; 1229 ahci_addr_t addr, pmult_addr; 1230 uint8_t cport = sd->satadev_addr.cport; 1231 char portstr[10]; 1232 uint8_t device_type; 1233 uint32_t port_state; 1234 uint8_t port; 1235 int rval = SATA_SUCCESS, rval_init; 1236 1237 ahci_ctlp = ddi_get_soft_state(ahci_statep, ddi_get_instance(dip)); 1238 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 1239 1240 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 1241 1242 mutex_enter(&ahci_portp->ahciport_mutex); 1243 1244 ahci_get_ahci_addr(ahci_ctlp, sd, &addr); 1245 ASSERT(AHCI_ADDR_IS_VALID(&addr)); 1246 SET_PORTSTR(portstr, &addr); 1247 1248 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1249 "ahci_tran_probe_port enter: port %s", portstr); 1250 1251 if ((AHCI_ADDR_IS_PMULT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)) && 1252 (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT || 1253 ahci_portp->ahciport_pmult_info == NULL)) { 1254 /* port mutliplier is removed. */ 1255 AHCIDBG(AHCIDBG_PMULT, ahci_ctlp, 1256 "ahci_tran_probe_port: " 1257 "pmult is removed from port %s", portstr); 1258 mutex_exit(&ahci_portp->ahciport_mutex); 1259 return (SATA_FAILURE); 1260 } 1261 1262 /* 1263 * The sata_device may refer to 1264 * 1. A controller port. 1265 * A controller port should be ready here. 1266 * 2. A port multiplier. 1267 * SATA_ADDR_PMULT_SPEC - if it is not initialized yet, initialize 1268 * it and register the port multiplier to the framework. 1269 * SATA_ADDR_PMULT - check the status of all its device ports. 1270 * 3. A port multiplier port. 1271 * If it has not been initialized, initialized it. 1272 * 1273 * A port multiplier or a port multiplier port may require some 1274 * initialization because we cannot do these time-consuming jobs in an 1275 * interrupt context. 1276 */ 1277 if (sd->satadev_addr.qual & SATA_ADDR_PMULT_SPEC) { 1278 AHCI_ADDR_SET_PMULT(&pmult_addr, port); 1279 /* Initialize registers on a port multiplier */ 1280 rval_init = ahci_initialize_pmult(ahci_ctlp, 1281 ahci_portp, &pmult_addr, sd); 1282 if (rval_init != AHCI_SUCCESS) { 1283 AHCIDBG(AHCIDBG_PMULT, ahci_ctlp, 1284 "ahci_tran_probe_port: " 1285 "pmult initialization failed.", NULL); 1286 mutex_exit(&ahci_portp->ahciport_mutex); 1287 return (SATA_FAILURE); 1288 } 1289 } else if (sd->satadev_addr.qual & SATA_ADDR_PMULT) { 1290 /* Check pmports hotplug events */ 1291 (void) ahci_probe_pmult(ahci_ctlp, ahci_portp, &addr); 1292 } else if (sd->satadev_addr.qual & SATA_ADDR_PMPORT) { 1293 if (ahci_probe_pmport(ahci_ctlp, ahci_portp, 1294 &addr, sd) != AHCI_SUCCESS) { 1295 rval = SATA_FAILURE; 1296 goto out; 1297 } 1298 } 1299 1300 /* Update port state and device type */ 1301 port_state = AHCIPORT_GET_STATE(ahci_portp, &addr); 1302 1303 switch (port_state) { 1304 1305 case SATA_PSTATE_FAILED: 1306 sd->satadev_state = SATA_PSTATE_FAILED; 1307 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1308 "ahci_tran_probe_port: port %s PORT FAILED", portstr); 1309 goto out; 1310 1311 case SATA_PSTATE_SHUTDOWN: 1312 sd->satadev_state = SATA_PSTATE_SHUTDOWN; 1313 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1314 "ahci_tran_probe_port: port %s PORT SHUTDOWN", portstr); 1315 goto out; 1316 1317 case SATA_PSTATE_PWROFF: 1318 sd->satadev_state = SATA_PSTATE_PWROFF; 1319 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1320 "ahci_tran_probe_port: port %s PORT PWROFF", portstr); 1321 goto out; 1322 1323 case SATA_PSTATE_PWRON: 1324 sd->satadev_state = SATA_PSTATE_PWRON; 1325 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1326 "ahci_tran_probe_port: port %s PORT PWRON", portstr); 1327 break; 1328 1329 default: 1330 sd->satadev_state = port_state; 1331 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1332 "ahci_tran_probe_port: port %s PORT NORMAL %x", 1333 portstr, port_state); 1334 break; 1335 } 1336 1337 device_type = AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr); 1338 1339 switch (device_type) { 1340 1341 case SATA_DTYPE_ATADISK: 1342 sd->satadev_type = SATA_DTYPE_ATADISK; 1343 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1344 "ahci_tran_probe_port: port %s DISK found", portstr); 1345 break; 1346 1347 case SATA_DTYPE_ATAPI: 1348 /* 1349 * HBA driver only knows it's an ATAPI device, and don't know 1350 * it's CD/DVD, tape or ATAPI disk because the ATAPI device 1351 * type need to be determined by checking IDENTIFY PACKET 1352 * DEVICE data 1353 */ 1354 sd->satadev_type = SATA_DTYPE_ATAPI; 1355 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1356 "ahci_tran_probe_port: port %s ATAPI found", portstr); 1357 break; 1358 1359 case SATA_DTYPE_PMULT: 1360 ASSERT(AHCI_ADDR_IS_PORT(&addr)||AHCI_ADDR_IS_PMULT(&addr)); 1361 sd->satadev_type = SATA_DTYPE_PMULT; 1362 1363 /* Update the number of pmports. */ 1364 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1365 sd->satadev_add_info = ahci_portp-> 1366 ahciport_pmult_info->ahcipmi_num_dev_ports; 1367 1368 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1369 "ahci_tran_probe_port: port %s Port Multiplier found", 1370 portstr); 1371 break; 1372 1373 case SATA_DTYPE_UNKNOWN: 1374 sd->satadev_type = SATA_DTYPE_UNKNOWN; 1375 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1376 "ahci_tran_probe_port: port %s Unknown device found", 1377 portstr); 1378 break; 1379 1380 default: 1381 /* we don't support any other device types */ 1382 sd->satadev_type = SATA_DTYPE_NONE; 1383 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1384 "ahci_tran_probe_port: port %s No device found", portstr); 1385 break; 1386 } 1387 1388 out: 1389 /* Register update only fails while probing a pmult/pmport */ 1390 if (AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMULT(&addr)) { 1391 ahci_update_sata_registers(ahci_ctlp, port, sd); 1392 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 1393 if (port_state & SATA_STATE_READY) 1394 if (ahci_update_pmult_pscr(ahci_ctlp, 1395 &addr, sd) != AHCI_SUCCESS) 1396 rval = SATA_FAILURE; 1397 } 1398 1399 mutex_exit(&ahci_portp->ahciport_mutex); 1400 return (rval); 1401 } 1402 1403 /* 1404 * There are four operation modes in sata framework: 1405 * SATA_OPMODE_INTERRUPTS 1406 * SATA_OPMODE_POLLING 1407 * SATA_OPMODE_ASYNCH 1408 * SATA_OPMODE_SYNCH 1409 * 1410 * Their combined meanings as following: 1411 * 1412 * SATA_OPMODE_SYNCH 1413 * The command has to be completed before sata_tran_start functions returns. 1414 * Either interrupts or polling could be used - it's up to the driver. 1415 * Mode used currently for internal, sata-module initiated operations. 1416 * 1417 * SATA_OPMODE_SYNCH | SATA_OPMODE_INTERRUPTS 1418 * It is the same as the one above. 1419 * 1420 * SATA_OPMODE_SYNCH | SATA_OPMODE_POLLING 1421 * The command has to be completed before sata_tran_start function returns. 1422 * No interrupt used, polling only. This should be the mode used for scsi 1423 * packets with FLAG_NOINTR. 1424 * 1425 * SATA_OPMODE_ASYNCH | SATA_OPMODE_INTERRUPTS 1426 * The command may be queued (callback function specified). Interrupts could 1427 * be used. It's normal operation mode. 1428 */ 1429 /* 1430 * Called by sata framework to transport a sata packet down stream. 1431 */ 1432 static int 1433 ahci_tran_start(dev_info_t *dip, sata_pkt_t *spkt) 1434 { 1435 ahci_ctl_t *ahci_ctlp; 1436 ahci_port_t *ahci_portp; 1437 ahci_addr_t addr; 1438 uint8_t cport = spkt->satapkt_device.satadev_addr.cport; 1439 uint8_t port; 1440 char portstr[10]; 1441 1442 ahci_ctlp = ddi_get_soft_state(ahci_statep, ddi_get_instance(dip)); 1443 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 1444 1445 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1446 "ahci_tran_start enter: cport %d satapkt 0x%p", 1447 cport, (void *)spkt); 1448 1449 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 1450 1451 mutex_enter(&ahci_portp->ahciport_mutex); 1452 ahci_get_ahci_addr(ahci_ctlp, &spkt->satapkt_device, &addr); 1453 SET_PORTSTR(portstr, &addr); 1454 1455 /* Sanity check */ 1456 if (AHCI_ADDR_IS_PMPORT(&addr)) { 1457 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT || 1458 ahci_portp->ahciport_pmult_info == NULL) { 1459 1460 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1461 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 1462 spkt->satapkt_device.satadev_state = SATA_STATE_UNKNOWN; 1463 ahci_update_sata_registers(ahci_ctlp, port, 1464 &spkt->satapkt_device); 1465 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1466 "ahci_tran_start returning PORT_ERROR while " 1467 "pmult removed: port: %s", portstr); 1468 mutex_exit(&ahci_portp->ahciport_mutex); 1469 return (SATA_TRAN_PORT_ERROR); 1470 } 1471 1472 if (!(AHCIPORT_GET_STATE(ahci_portp, &addr) & 1473 SATA_STATE_READY)) { 1474 if (!ddi_in_panic() || 1475 ahci_initialize_pmport(ahci_ctlp, 1476 ahci_portp, &addr) != AHCI_SUCCESS) { 1477 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1478 spkt->satapkt_device.satadev_type = 1479 AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr); 1480 spkt->satapkt_device.satadev_state = 1481 AHCIPORT_GET_STATE(ahci_portp, &addr); 1482 ahci_update_sata_registers(ahci_ctlp, port, 1483 &spkt->satapkt_device); 1484 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1485 "ahci_tran_start returning PORT_ERROR " 1486 "while sub-link is not initialized " 1487 "at port: %s", portstr); 1488 mutex_exit(&ahci_portp->ahciport_mutex); 1489 return (SATA_TRAN_PORT_ERROR); 1490 } 1491 } 1492 } 1493 1494 if (AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_FAILED || 1495 AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_SHUTDOWN|| 1496 AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_PWROFF) { 1497 /* 1498 * In case the target driver would send the packet before 1499 * sata framework can have the opportunity to process those 1500 * event reports. 1501 */ 1502 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1503 spkt->satapkt_device.satadev_state = 1504 ahci_portp->ahciport_port_state; 1505 ahci_update_sata_registers(ahci_ctlp, port, 1506 &spkt->satapkt_device); 1507 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1508 "ahci_tran_start returning PORT_ERROR while " 1509 "port in FAILED/SHUTDOWN/PWROFF state: " 1510 "port: %s", portstr); 1511 mutex_exit(&ahci_portp->ahciport_mutex); 1512 return (SATA_TRAN_PORT_ERROR); 1513 } 1514 1515 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) == SATA_DTYPE_NONE) { 1516 /* 1517 * ahci_intr_phyrdy_change() may have rendered it to 1518 * SATA_DTYPE_NONE. 1519 */ 1520 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1521 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 1522 spkt->satapkt_device.satadev_state = 1523 ahci_portp->ahciport_port_state; 1524 ahci_update_sata_registers(ahci_ctlp, port, 1525 &spkt->satapkt_device); 1526 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1527 "ahci_tran_start returning PORT_ERROR while " 1528 "no device attached: port: %s", portstr); 1529 mutex_exit(&ahci_portp->ahciport_mutex); 1530 return (SATA_TRAN_PORT_ERROR); 1531 } 1532 1533 /* R/W PMULT command will occupy the whole HBA port */ 1534 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 1535 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1536 "ahci_tran_start returning BUSY while " 1537 "executing READ/WRITE PORT-MULT command: " 1538 "port: %s", portstr); 1539 spkt->satapkt_reason = SATA_PKT_BUSY; 1540 mutex_exit(&ahci_portp->ahciport_mutex); 1541 return (SATA_TRAN_BUSY); 1542 } 1543 1544 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) { 1545 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1546 "ahci_tran_start returning BUSY while " 1547 "hot-plug in progress: port: %s", portstr); 1548 spkt->satapkt_reason = SATA_PKT_BUSY; 1549 mutex_exit(&ahci_portp->ahciport_mutex); 1550 return (SATA_TRAN_BUSY); 1551 } 1552 1553 /* 1554 * SATA HBA driver should remember that a device was reset and it 1555 * is supposed to reject any packets which do not specify either 1556 * SATA_IGNORE_DEV_RESET_STATE or SATA_CLEAR_DEV_RESET_STATE. 1557 * 1558 * This is to prevent a race condition when a device was arbitrarily 1559 * reset by the HBA driver (and lost it's setting) and a target 1560 * driver sending some commands to a device before the sata framework 1561 * has a chance to restore the device setting (such as cache enable/ 1562 * disable or other resettable stuff). 1563 */ 1564 /* 1565 * It is unnecessary to use specific flags to indicate 1566 * reset_in_progress for a pmport. While mopping, all command will be 1567 * mopped so that the entire HBA port is being dealt as a single 1568 * object. 1569 */ 1570 if (spkt->satapkt_cmd.satacmd_flags.sata_clear_dev_reset) { 1571 ahci_portp->ahciport_reset_in_progress = 0; 1572 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1573 "ahci_tran_start [CLEAR] the " 1574 "reset_in_progress for port: %d", port); 1575 } 1576 1577 if (ahci_portp->ahciport_reset_in_progress && 1578 ! spkt->satapkt_cmd.satacmd_flags.sata_ignore_dev_reset && 1579 ! ddi_in_panic()) { 1580 spkt->satapkt_reason = SATA_PKT_BUSY; 1581 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1582 "ahci_tran_start returning BUSY while " 1583 "reset in progress: port: %d", port); 1584 mutex_exit(&ahci_portp->ahciport_mutex); 1585 return (SATA_TRAN_BUSY); 1586 } 1587 1588 #ifdef AHCI_DEBUG 1589 if (spkt->satapkt_cmd.satacmd_flags.sata_ignore_dev_reset) { 1590 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1591 "ahci_tran_start: packet 0x%p [PASSTHRU] at port %d", 1592 spkt, port); 1593 } 1594 #endif 1595 1596 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 1597 spkt->satapkt_reason = SATA_PKT_BUSY; 1598 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1599 "ahci_tran_start returning BUSY while " 1600 "mopping in progress: port: %d", port); 1601 mutex_exit(&ahci_portp->ahciport_mutex); 1602 return (SATA_TRAN_BUSY); 1603 } 1604 1605 if (spkt->satapkt_op_mode & 1606 (SATA_OPMODE_SYNCH | SATA_OPMODE_POLLING)) { 1607 /* 1608 * If a SYNC command to be executed in interrupt context, 1609 * bounce it back to sata module. 1610 */ 1611 if (!(spkt->satapkt_op_mode & SATA_OPMODE_POLLING) && 1612 servicing_interrupt()) { 1613 spkt->satapkt_reason = SATA_PKT_BUSY; 1614 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1615 "ahci_tran_start returning BUSY while " 1616 "sending SYNC mode under interrupt context: " 1617 "port : %d", port); 1618 mutex_exit(&ahci_portp->ahciport_mutex); 1619 return (SATA_TRAN_BUSY); 1620 } 1621 1622 /* We need to do the sync start now */ 1623 if (ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, 1624 spkt) == AHCI_FAILURE) { 1625 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_tran_start " 1626 "return QUEUE_FULL: port %d", port); 1627 mutex_exit(&ahci_portp->ahciport_mutex); 1628 return (SATA_TRAN_QUEUE_FULL); 1629 } 1630 } else { 1631 /* Async start, using interrupt */ 1632 if (ahci_deliver_satapkt(ahci_ctlp, ahci_portp, &addr, spkt) 1633 == AHCI_FAILURE) { 1634 spkt->satapkt_reason = SATA_PKT_QUEUE_FULL; 1635 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_tran_start " 1636 "returning QUEUE_FULL: port %d", port); 1637 mutex_exit(&ahci_portp->ahciport_mutex); 1638 return (SATA_TRAN_QUEUE_FULL); 1639 } 1640 } 1641 1642 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_tran_start " 1643 "sata tran accepted: port %s", portstr); 1644 1645 mutex_exit(&ahci_portp->ahciport_mutex); 1646 return (SATA_TRAN_ACCEPTED); 1647 } 1648 1649 /* 1650 * SATA_OPMODE_SYNCH flag is set 1651 * 1652 * If SATA_OPMODE_POLLING flag is set, then we must poll the command 1653 * without interrupt, otherwise we can still use the interrupt. 1654 * 1655 * WARNING!!! ahciport_mutex should be acquired before the function 1656 * is called. 1657 */ 1658 static int 1659 ahci_do_sync_start(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 1660 ahci_addr_t *addrp, sata_pkt_t *spkt) 1661 { 1662 int pkt_timeout_ticks; 1663 uint32_t timeout_tags; 1664 int rval; 1665 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 1666 uint8_t port = addrp->aa_port; 1667 1668 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_do_sync_start enter: " 1669 "port %d:%d spkt 0x%p", port, addrp->aa_pmport, spkt); 1670 1671 if (spkt->satapkt_op_mode & SATA_OPMODE_POLLING) { 1672 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_POLLING; 1673 if ((rval = ahci_deliver_satapkt(ahci_ctlp, ahci_portp, 1674 addrp, spkt)) == AHCI_FAILURE) { 1675 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_POLLING; 1676 return (rval); 1677 } 1678 1679 pkt_timeout_ticks = 1680 drv_usectohz((clock_t)spkt->satapkt_time * 1000000); 1681 1682 while (spkt->satapkt_reason == SATA_PKT_BUSY) { 1683 mutex_exit(&ahci_portp->ahciport_mutex); 1684 1685 /* Simulate the interrupt */ 1686 ahci_port_intr(ahci_ctlp, ahci_portp, port); 1687 1688 drv_usecwait(AHCI_10MS_USECS); 1689 1690 mutex_enter(&ahci_portp->ahciport_mutex); 1691 pkt_timeout_ticks -= AHCI_10MS_TICKS; 1692 if (pkt_timeout_ticks < 0) { 1693 cmn_err(CE_WARN, "!ahci%d: ahci_do_sync_start " 1694 "port %d satapkt 0x%p timed out\n", 1695 instance, port, (void *)spkt); 1696 timeout_tags = (0x1 << rval); 1697 mutex_exit(&ahci_portp->ahciport_mutex); 1698 ahci_timeout_pkts(ahci_ctlp, ahci_portp, 1699 port, timeout_tags); 1700 mutex_enter(&ahci_portp->ahciport_mutex); 1701 } 1702 } 1703 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_POLLING; 1704 return (AHCI_SUCCESS); 1705 1706 } else { 1707 if ((rval = ahci_deliver_satapkt(ahci_ctlp, ahci_portp, 1708 addrp, spkt)) == AHCI_FAILURE) 1709 return (rval); 1710 1711 #if AHCI_DEBUG 1712 /* 1713 * Note that the driver always uses the slot 0 to deliver 1714 * REQUEST SENSE or READ LOG EXT command 1715 */ 1716 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 1717 ASSERT(rval == 0); 1718 #endif 1719 1720 while (spkt->satapkt_reason == SATA_PKT_BUSY) 1721 cv_wait(&ahci_portp->ahciport_cv, 1722 &ahci_portp->ahciport_mutex); 1723 1724 return (AHCI_SUCCESS); 1725 } 1726 } 1727 1728 #define SENDUP_PACKET(ahci_portp, satapkt, reason) \ 1729 if (satapkt) { \ 1730 satapkt->satapkt_reason = reason; \ 1731 /* \ 1732 * We set the satapkt_reason in both sync and \ 1733 * non-sync cases. \ 1734 */ \ 1735 } \ 1736 if (satapkt && \ 1737 ! (satapkt->satapkt_op_mode & SATA_OPMODE_SYNCH) && \ 1738 satapkt->satapkt_comp) { \ 1739 mutex_exit(&ahci_portp->ahciport_mutex); \ 1740 (*satapkt->satapkt_comp)(satapkt); \ 1741 mutex_enter(&ahci_portp->ahciport_mutex); \ 1742 } else { \ 1743 if (satapkt && \ 1744 (satapkt->satapkt_op_mode & SATA_OPMODE_SYNCH) && \ 1745 ! (satapkt->satapkt_op_mode & SATA_OPMODE_POLLING)) \ 1746 cv_broadcast(&ahci_portp->ahciport_cv); \ 1747 } 1748 1749 /* 1750 * Searches for and claims a free command slot. 1751 * 1752 * Returns value: 1753 * 1754 * AHCI_FAILURE returned only if 1755 * 1. No empty slot left 1756 * 2. Non-queued command requested while queued command(s) is outstanding 1757 * 3. Queued command requested while non-queued command(s) is outstanding 1758 * 4. HBA doesn't support multiple-use of command list while already a 1759 * non-queued command is oustanding 1760 * 5. Queued command requested while some queued command(s) has been 1761 * outstanding on a different port multiplier port. (AHCI spec 1.2, 1762 * 9.1.2) 1763 * 1764 * claimed slot number returned if succeeded 1765 * 1766 * NOTE: it will always return slot 0 for following commands to simplify the 1767 * algorithm. 1768 * 1. REQUEST SENSE or READ LOG EXT command during error recovery process 1769 * 2. READ/WRITE PORTMULT command 1770 * 1771 * WARNING!!! ahciport_mutex should be acquired before the function 1772 * is called. 1773 */ 1774 static int 1775 ahci_claim_free_slot(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 1776 ahci_addr_t *addrp, int command_type) 1777 { 1778 uint32_t port_cmd_issue; 1779 uint32_t free_slots; 1780 int slot; 1781 1782 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_claim_free_slot enter " 1783 "ahciport_pending_tags = 0x%x " 1784 "ahciport_pending_ncq_tags = 0x%x", 1785 ahci_portp->ahciport_pending_tags, 1786 ahci_portp->ahciport_pending_ncq_tags); 1787 1788 /* 1789 * According to the AHCI spec, system software is responsible to 1790 * ensure that queued and non-queued commands are not mixed in 1791 * the command list. 1792 */ 1793 if (command_type == AHCI_NON_NCQ_CMD) { 1794 /* Non-NCQ command request */ 1795 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1796 AHCIDBG(AHCIDBG_INFO|AHCIDBG_NCQ, ahci_ctlp, 1797 "ahci_claim_free_slot: there is still pending " 1798 "queued command(s) in the command list, " 1799 "so no available slot for the non-queued " 1800 "command", NULL); 1801 return (AHCI_FAILURE); 1802 } 1803 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 1804 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 1805 "ahci_claim_free_slot: there is still pending " 1806 "read/write port-mult command(s) in command list, " 1807 "so no available slot for the non-queued command", 1808 NULL); 1809 return (AHCI_FAILURE); 1810 } 1811 if ((ahci_ctlp->ahcictl_cap & AHCI_CAP_NO_MCMDLIST_NONQUEUE) && 1812 NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1813 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1814 "ahci_claim_free_slot: HBA cannot support multiple-" 1815 "use of the command list for non-queued commands", 1816 NULL); 1817 return (AHCI_FAILURE); 1818 } 1819 free_slots = (~ahci_portp->ahciport_pending_tags) & 1820 AHCI_SLOT_MASK(ahci_ctlp); 1821 } else if (command_type == AHCI_NCQ_CMD) { 1822 /* NCQ command request */ 1823 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1824 AHCIDBG(AHCIDBG_INFO|AHCIDBG_NCQ, ahci_ctlp, 1825 "ahci_claim_free_slot: there is still pending " 1826 "non-queued command(s) in the command list, " 1827 "so no available slot for the queued command", 1828 NULL); 1829 return (AHCI_FAILURE); 1830 } 1831 1832 /* 1833 * NCQ commands cannot be sent to different port multiplier 1834 * ports in Command-Based Switching mode 1835 */ 1836 /* 1837 * NOTE: In Command-Based Switching mode, AHCI controller 1838 * usually reports a 'Handshake Error' when multiple NCQ 1839 * commands are outstanding simultaneously. 1840 */ 1841 if (AHCIPORT_DEV_TYPE(ahci_portp, addrp) == SATA_DTYPE_PMULT) { 1842 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1843 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_FBSS) && 1844 NCQ_CMD_IN_PROGRESS(ahci_portp) && 1845 AHCIPORT_NCQ_PMPORT(ahci_portp) != 1846 addrp->aa_pmport) { 1847 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1848 "ahci_claim_free_slot: there is still " 1849 "pending queued command(s) in the " 1850 "command list for another Port Multiplier " 1851 "port, so no available slot.", NULL); 1852 return (AHCI_FAILURE); 1853 } 1854 } 1855 1856 free_slots = (~ahci_portp->ahciport_pending_ncq_tags) & 1857 AHCI_NCQ_SLOT_MASK(ahci_portp); 1858 } else if (command_type == AHCI_ERR_RETRI_CMD) { 1859 /* Error retrieval command request */ 1860 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1861 "ahci_claim_free_slot: slot 0 is allocated for REQUEST " 1862 "SENSE or READ LOG EXT command", NULL); 1863 slot = 0; 1864 goto out; 1865 } else if (command_type == AHCI_RDWR_PMULT_CMD) { 1866 /* 1867 * An extra check on PxCI. Sometimes PxCI bits may not be 1868 * cleared during hot-plug or error recovery process. 1869 */ 1870 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 1871 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, addrp->aa_port)); 1872 1873 if (port_cmd_issue != 0) { 1874 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 1875 "ahci_claim_free_slot: there is still pending " 1876 "command(s) in command list (0x%x/0x%x, PxCI %x)," 1877 "so no available slot for R/W PMULT command.", 1878 NON_NCQ_CMD_IN_PROGRESS(ahci_portp), 1879 NCQ_CMD_IN_PROGRESS(ahci_portp), 1880 port_cmd_issue); 1881 return (AHCI_FAILURE); 1882 } 1883 1884 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1885 "ahci_claim_free_slot: slot 0 is allocated for " 1886 "READ/WRITE PORTMULT command", NULL); 1887 slot = 0; 1888 goto out; 1889 } 1890 1891 slot = ddi_ffs(free_slots) - 1; 1892 if (slot == -1) { 1893 AHCIDBG(AHCIDBG_VERBOSE, ahci_ctlp, 1894 "ahci_claim_free_slot: no empty slots", NULL); 1895 return (AHCI_FAILURE); 1896 } 1897 1898 /* 1899 * According to the AHCI spec, to allow a simple mechanism for the 1900 * HBA to map command list slots to queue entries, software must 1901 * match the tag number it uses to the slot it is placing the command 1902 * in. For example, if a queued command is placed in slot 5, the tag 1903 * for that command must be 5. 1904 */ 1905 if (command_type == AHCI_NCQ_CMD) { 1906 ahci_portp->ahciport_pending_ncq_tags |= (0x1 << slot); 1907 if (AHCI_ADDR_IS_PMPORT(addrp)) { 1908 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1909 AHCIPORT_NCQ_PMPORT(ahci_portp) = addrp->aa_pmport; 1910 } 1911 } 1912 1913 ahci_portp->ahciport_pending_tags |= (0x1 << slot); 1914 1915 out: 1916 AHCIDBG(AHCIDBG_VERBOSE, ahci_ctlp, 1917 "ahci_claim_free_slot: found slot: 0x%x", slot); 1918 1919 return (slot); 1920 } 1921 1922 /* 1923 * Builds the Command Table for the sata packet and delivers it to controller. 1924 * 1925 * Returns: 1926 * slot number if we can obtain a slot successfully 1927 * otherwise, return AHCI_FAILURE 1928 * 1929 * WARNING!!! ahciport_mutex should be acquired before the function is called. 1930 */ 1931 static int 1932 ahci_deliver_satapkt(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 1933 ahci_addr_t *addrp, sata_pkt_t *spkt) 1934 { 1935 int cmd_slot; 1936 sata_cmd_t *scmd; 1937 ahci_fis_h2d_register_t *h2d_register_fisp; 1938 ahci_cmd_table_t *cmd_table; 1939 ahci_cmd_header_t *cmd_header; 1940 int ncookies; 1941 int i; 1942 int command_type = AHCI_NON_NCQ_CMD; 1943 int ncq_qdepth; 1944 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 1945 uint8_t port, pmport; 1946 #if AHCI_DEBUG 1947 uint32_t *ptr; 1948 uint8_t *ptr2; 1949 #endif 1950 1951 port = addrp->aa_port; 1952 pmport = addrp->aa_pmport; 1953 1954 spkt->satapkt_reason = SATA_PKT_BUSY; 1955 1956 scmd = &spkt->satapkt_cmd; 1957 1958 /* Check if the command is a NCQ command */ 1959 if (scmd->satacmd_cmd_reg == SATAC_READ_FPDMA_QUEUED || 1960 scmd->satacmd_cmd_reg == SATAC_WRITE_FPDMA_QUEUED) { 1961 command_type = AHCI_NCQ_CMD; 1962 1963 /* 1964 * When NCQ is support, system software must determine the 1965 * maximum tag allowed by the device and the HBA, and it 1966 * must use a value not beyond of the lower bound of the two. 1967 * 1968 * Sata module is going to calculate the qdepth and send 1969 * down to HBA driver via sata_cmd. 1970 */ 1971 ncq_qdepth = scmd->satacmd_flags.sata_max_queue_depth + 1; 1972 1973 /* 1974 * At the moment, the driver doesn't support the dynamic 1975 * setting of the maximum ncq depth, and the value can be 1976 * set either during the attach or after hot-plug insertion. 1977 */ 1978 if (ahci_portp->ahciport_max_ncq_tags == 0) { 1979 ahci_portp->ahciport_max_ncq_tags = ncq_qdepth; 1980 AHCIDBG(AHCIDBG_NCQ, ahci_ctlp, 1981 "ahci_deliver_satapkt: port %d the max tags for " 1982 "NCQ command is %d", port, ncq_qdepth); 1983 } else { 1984 if (ncq_qdepth != ahci_portp->ahciport_max_ncq_tags) { 1985 cmn_err(CE_WARN, "!ahci%d: ahci_deliver_satapkt" 1986 " port %d the max tag for NCQ command is " 1987 "requested to change from %d to %d, at the" 1988 " moment the driver doesn't support the " 1989 "dynamic change so it's going to " 1990 "still use the previous tag value", 1991 instance, port, 1992 ahci_portp->ahciport_max_ncq_tags, 1993 ncq_qdepth); 1994 } 1995 } 1996 } 1997 1998 /* Check if the command is an error retrieval command */ 1999 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 2000 command_type = AHCI_ERR_RETRI_CMD; 2001 2002 /* Check if the command is an read/write pmult command */ 2003 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 2004 command_type = AHCI_RDWR_PMULT_CMD; 2005 2006 /* Check if there is an empty command slot */ 2007 cmd_slot = ahci_claim_free_slot(ahci_ctlp, ahci_portp, 2008 addrp, command_type); 2009 if (cmd_slot == AHCI_FAILURE) { 2010 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "no free command slot", NULL); 2011 return (AHCI_FAILURE); 2012 } 2013 2014 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INFO, ahci_ctlp, 2015 "ahci_deliver_satapkt enter: cmd_reg: 0x%x, cmd_slot: 0x%x, " 2016 "port: %d, satapkt: 0x%p", scmd->satacmd_cmd_reg, 2017 cmd_slot, port, (void *)spkt); 2018 2019 cmd_table = ahci_portp->ahciport_cmd_tables[cmd_slot]; 2020 bzero((void *)cmd_table, ahci_cmd_table_size); 2021 2022 /* For data transfer operations, it is the H2D Register FIS */ 2023 h2d_register_fisp = 2024 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 2025 2026 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 2027 2028 /* 2029 * PMP field only make sense when target is a port multiplier or a 2030 * device behind a port multiplier. Otherwise should set it to 0. 2031 */ 2032 if (AHCI_ADDR_IS_PMULT(addrp) || AHCI_ADDR_IS_PMPORT(addrp)) 2033 SET_FIS_PMP(h2d_register_fisp, pmport); 2034 2035 SET_FIS_CDMDEVCTL(h2d_register_fisp, 1); 2036 SET_FIS_COMMAND(h2d_register_fisp, scmd->satacmd_cmd_reg); 2037 SET_FIS_FEATURES(h2d_register_fisp, scmd->satacmd_features_reg); 2038 SET_FIS_SECTOR_COUNT(h2d_register_fisp, scmd->satacmd_sec_count_lsb); 2039 2040 switch (scmd->satacmd_addr_type) { 2041 2042 case 0: 2043 /* 2044 * satacmd_addr_type will be 0 for the commands below: 2045 * ATAPI command 2046 * SATAC_IDLE_IM 2047 * SATAC_STANDBY_IM 2048 * SATAC_DOWNLOAD_MICROCODE 2049 * SATAC_FLUSH_CACHE 2050 * SATAC_SET_FEATURES 2051 * SATAC_SMART 2052 * SATAC_ID_PACKET_DEVICE 2053 * SATAC_ID_DEVICE 2054 * SATAC_READ_PORTMULT 2055 * SATAC_WRITE_PORTMULT 2056 */ 2057 /* FALLTHRU */ 2058 2059 case ATA_ADDR_LBA: 2060 /* FALLTHRU */ 2061 2062 case ATA_ADDR_LBA28: 2063 /* LBA[7:0] */ 2064 SET_FIS_SECTOR(h2d_register_fisp, scmd->satacmd_lba_low_lsb); 2065 2066 /* LBA[15:8] */ 2067 SET_FIS_CYL_LOW(h2d_register_fisp, scmd->satacmd_lba_mid_lsb); 2068 2069 /* LBA[23:16] */ 2070 SET_FIS_CYL_HI(h2d_register_fisp, scmd->satacmd_lba_high_lsb); 2071 2072 /* LBA [27:24] (also called dev_head) */ 2073 SET_FIS_DEV_HEAD(h2d_register_fisp, scmd->satacmd_device_reg); 2074 2075 break; 2076 2077 case ATA_ADDR_LBA48: 2078 /* LBA[7:0] */ 2079 SET_FIS_SECTOR(h2d_register_fisp, scmd->satacmd_lba_low_lsb); 2080 2081 /* LBA[15:8] */ 2082 SET_FIS_CYL_LOW(h2d_register_fisp, scmd->satacmd_lba_mid_lsb); 2083 2084 /* LBA[23:16] */ 2085 SET_FIS_CYL_HI(h2d_register_fisp, scmd->satacmd_lba_high_lsb); 2086 2087 /* LBA [31:24] */ 2088 SET_FIS_SECTOR_EXP(h2d_register_fisp, 2089 scmd->satacmd_lba_low_msb); 2090 2091 /* LBA [39:32] */ 2092 SET_FIS_CYL_LOW_EXP(h2d_register_fisp, 2093 scmd->satacmd_lba_mid_msb); 2094 2095 /* LBA [47:40] */ 2096 SET_FIS_CYL_HI_EXP(h2d_register_fisp, 2097 scmd->satacmd_lba_high_msb); 2098 2099 /* Set dev_head */ 2100 SET_FIS_DEV_HEAD(h2d_register_fisp, 2101 scmd->satacmd_device_reg); 2102 2103 /* Set the extended sector count and features */ 2104 SET_FIS_SECTOR_COUNT_EXP(h2d_register_fisp, 2105 scmd->satacmd_sec_count_msb); 2106 SET_FIS_FEATURES_EXP(h2d_register_fisp, 2107 scmd->satacmd_features_reg_ext); 2108 break; 2109 } 2110 2111 /* 2112 * For NCQ command (READ/WRITE FPDMA QUEUED), sector count 7:0 is 2113 * filled into features field, and sector count 8:15 is filled into 2114 * features (exp) field. TAG is filled into sector field. 2115 */ 2116 if (command_type == AHCI_NCQ_CMD) { 2117 SET_FIS_FEATURES(h2d_register_fisp, 2118 scmd->satacmd_sec_count_lsb); 2119 SET_FIS_FEATURES_EXP(h2d_register_fisp, 2120 scmd->satacmd_sec_count_msb); 2121 2122 SET_FIS_SECTOR_COUNT(h2d_register_fisp, 2123 (cmd_slot << SATA_TAG_QUEUING_SHIFT)); 2124 } 2125 2126 ncookies = scmd->satacmd_num_dma_cookies; 2127 AHCIDBG(AHCIDBG_PRDT, ahci_ctlp, 2128 "ncookies = 0x%x, ahci_dma_prdt_number = 0x%x", 2129 ncookies, ahci_dma_prdt_number); 2130 2131 ASSERT(ncookies <= ahci_dma_prdt_number); 2132 ahci_portp->ahciport_prd_bytecounts[cmd_slot] = 0; 2133 2134 /* *** now fill the scatter gather list ******* */ 2135 for (i = 0; i < ncookies; i++) { 2136 cmd_table->ahcict_prdt[i].ahcipi_data_base_addr = 2137 scmd->satacmd_dma_cookie_list[i]._dmu._dmac_la[0]; 2138 cmd_table->ahcict_prdt[i].ahcipi_data_base_addr_upper = 2139 scmd->satacmd_dma_cookie_list[i]._dmu._dmac_la[1]; 2140 cmd_table->ahcict_prdt[i].ahcipi_descr_info = 2141 scmd->satacmd_dma_cookie_list[i].dmac_size - 1; 2142 ahci_portp->ahciport_prd_bytecounts[cmd_slot] += 2143 scmd->satacmd_dma_cookie_list[i].dmac_size; 2144 } 2145 2146 AHCIDBG(AHCIDBG_PRDT, ahci_ctlp, 2147 "ahciport_prd_bytecounts 0x%x for cmd_slot 0x%x", 2148 ahci_portp->ahciport_prd_bytecounts[cmd_slot], cmd_slot); 2149 2150 /* The ACMD field is filled in for ATAPI command */ 2151 if (scmd->satacmd_cmd_reg == SATAC_PACKET) { 2152 bcopy(scmd->satacmd_acdb, cmd_table->ahcict_atapi_cmd, 2153 SATA_ATAPI_MAX_CDB_LEN); 2154 } 2155 2156 /* Set Command Header in Command List */ 2157 cmd_header = &ahci_portp->ahciport_cmd_list[cmd_slot]; 2158 BZERO_DESCR_INFO(cmd_header); 2159 BZERO_PRD_BYTE_COUNT(cmd_header); 2160 2161 /* Set the number of entries in the PRD table */ 2162 SET_PRD_TABLE_LENGTH(cmd_header, ncookies); 2163 2164 /* Set the length of the command in the CFIS area */ 2165 SET_COMMAND_FIS_LENGTH(cmd_header, AHCI_H2D_REGISTER_FIS_LENGTH); 2166 2167 /* 2168 * PMP field only make sense when target is a port multiplier or a 2169 * device behind a port multiplier. Otherwise should set it to 0. 2170 */ 2171 if (AHCI_ADDR_IS_PMULT(addrp) || AHCI_ADDR_IS_PMPORT(addrp)) 2172 SET_PORT_MULTI_PORT(cmd_header, pmport); 2173 2174 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "command data direction is " 2175 "sata_data_direction = 0x%x", 2176 scmd->satacmd_flags.sata_data_direction); 2177 2178 /* Set A bit if it is an ATAPI command */ 2179 if (scmd->satacmd_cmd_reg == SATAC_PACKET) 2180 SET_ATAPI(cmd_header, AHCI_CMDHEAD_ATAPI); 2181 2182 /* Set W bit if data is going to the device */ 2183 if (scmd->satacmd_flags.sata_data_direction == SATA_DIR_WRITE) 2184 SET_WRITE(cmd_header, AHCI_CMDHEAD_DATA_WRITE); 2185 2186 /* 2187 * Set the prefetchable bit - this bit is only valid if the PRDTL 2188 * field is non-zero or the ATAPI 'A' bit is set in the command 2189 * header. This bit cannot be set when using native command 2190 * queuing commands or when using FIS-based switching with a Port 2191 * multiplier. 2192 */ 2193 if (command_type != AHCI_NCQ_CMD) 2194 SET_PREFETCHABLE(cmd_header, AHCI_CMDHEAD_PREFETCHABLE); 2195 2196 /* 2197 * Now remember the sata packet in ahciport_slot_pkts[]. 2198 * Error retrieval command and r/w port multiplier command will 2199 * be stored specifically for each port. 2200 */ 2201 if (!ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 2202 !RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 2203 ahci_portp->ahciport_slot_pkts[cmd_slot] = spkt; 2204 2205 /* 2206 * We are overloading satapkt_hba_driver_private with 2207 * watched_cycle count. 2208 */ 2209 spkt->satapkt_hba_driver_private = (void *)(intptr_t)0; 2210 2211 #if AHCI_DEBUG 2212 if (ahci_debug_flags & AHCIDBG_ATACMD && 2213 scmd->satacmd_cmd_reg != SATAC_PACKET || 2214 ahci_debug_flags & AHCIDBG_ATAPICMD && 2215 scmd->satacmd_cmd_reg == SATAC_PACKET) { 2216 2217 /* Dump the command header and table */ 2218 ahci_log(ahci_ctlp, CE_WARN, "\n"); 2219 ahci_log(ahci_ctlp, CE_WARN, "Command header&table for spkt " 2220 "0x%p cmd_reg 0x%x port %d", spkt, 2221 scmd->satacmd_cmd_reg, port); 2222 ptr = (uint32_t *)cmd_header; 2223 ahci_log(ahci_ctlp, CE_WARN, 2224 " Command Header:%8x %8x %8x %8x", 2225 ptr[0], ptr[1], ptr[2], ptr[3]); 2226 2227 /* Dump the H2D register FIS */ 2228 ptr = (uint32_t *)h2d_register_fisp; 2229 ahci_log(ahci_ctlp, CE_WARN, 2230 " Command FIS: %8x %8x %8x %8x", 2231 ptr[0], ptr[1], ptr[2], ptr[3]); 2232 2233 /* Dump the ACMD register FIS */ 2234 ptr2 = (uint8_t *)&(cmd_table->ahcict_atapi_cmd); 2235 for (i = 0; i < SATA_ATAPI_MAX_CDB_LEN/8; i++) 2236 if (ahci_debug_flags & AHCIDBG_ATAPICMD) 2237 ahci_log(ahci_ctlp, CE_WARN, 2238 " ATAPI command: %2x %2x %2x %2x " 2239 "%2x %2x %2x %2x", 2240 ptr2[8 * i], ptr2[8 * i + 1], 2241 ptr2[8 * i + 2], ptr2[8 * i + 3], 2242 ptr2[8 * i + 4], ptr2[8 * i + 5], 2243 ptr2[8 * i + 6], ptr2[8 * i + 7]); 2244 2245 /* Dump the PRDT */ 2246 for (i = 0; i < ncookies; i++) { 2247 ptr = (uint32_t *)&(cmd_table->ahcict_prdt[i]); 2248 ahci_log(ahci_ctlp, CE_WARN, 2249 " Cookie %d: %8x %8x %8x %8x", 2250 i, ptr[0], ptr[1], ptr[2], ptr[3]); 2251 } 2252 } 2253 #endif 2254 2255 (void) ddi_dma_sync( 2256 ahci_portp->ahciport_cmd_tables_dma_handle[cmd_slot], 2257 0, 2258 ahci_cmd_table_size, 2259 DDI_DMA_SYNC_FORDEV); 2260 2261 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 2262 cmd_slot * sizeof (ahci_cmd_header_t), 2263 sizeof (ahci_cmd_header_t), 2264 DDI_DMA_SYNC_FORDEV); 2265 2266 /* Set the corresponding bit in the PxSACT.DS for queued command */ 2267 if (command_type == AHCI_NCQ_CMD) { 2268 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 2269 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port), 2270 (0x1 << cmd_slot)); 2271 } 2272 2273 /* Indicate to the HBA that a command is active. */ 2274 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 2275 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 2276 (0x1 << cmd_slot)); 2277 2278 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_deliver_satapkt " 2279 "exit: port %d", port); 2280 2281 return (cmd_slot); 2282 } 2283 2284 /* 2285 * Called by the sata framework to abort the previously sent packet(s). 2286 * 2287 * Reset device to abort commands. 2288 */ 2289 static int 2290 ahci_tran_abort(dev_info_t *dip, sata_pkt_t *spkt, int flag) 2291 { 2292 ahci_ctl_t *ahci_ctlp; 2293 ahci_port_t *ahci_portp; 2294 uint32_t slot_status = 0; 2295 uint32_t aborted_tags = 0; 2296 uint32_t finished_tags = 0; 2297 uint8_t cport = spkt->satapkt_device.satadev_addr.cport; 2298 uint8_t port; 2299 int tmp_slot; 2300 int instance = ddi_get_instance(dip); 2301 2302 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 2303 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 2304 2305 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2306 "ahci_tran_abort enter: port %d", port); 2307 2308 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2309 mutex_enter(&ahci_portp->ahciport_mutex); 2310 2311 /* 2312 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2313 * commands are being mopped, therefore there is nothing else to do 2314 */ 2315 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2316 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2317 "ahci_tran_abort: port %d is in " 2318 "mopping process, so just return directly ", port); 2319 mutex_exit(&ahci_portp->ahciport_mutex); 2320 return (SATA_SUCCESS); 2321 } 2322 2323 /* 2324 * If AHCI_PORT_FLAG_RDWR_PMULT flag is set, it means a R/W PMULT 2325 * command is being executed so no other commands is outstanding, 2326 * nothing to do. 2327 */ 2328 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_RDWR_PMULT) { 2329 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2330 "ahci_tran_abort: port %d is reading/writing " 2331 "port multiplier, so just return directly ", port); 2332 mutex_exit(&ahci_portp->ahciport_mutex); 2333 return (SATA_SUCCESS); 2334 } 2335 2336 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED | 2337 ahci_portp->ahciport_port_state & SATA_PSTATE_SHUTDOWN | 2338 ahci_portp->ahciport_port_state & SATA_PSTATE_PWROFF) { 2339 /* 2340 * In case the targer driver would send the request before 2341 * sata framework can have the opportunity to process those 2342 * event reports. 2343 */ 2344 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 2345 spkt->satapkt_device.satadev_state = 2346 ahci_portp->ahciport_port_state; 2347 ahci_update_sata_registers(ahci_ctlp, port, 2348 &spkt->satapkt_device); 2349 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2350 "ahci_tran_abort returning SATA_FAILURE while " 2351 "port in FAILED/SHUTDOWN/PWROFF state: " 2352 "port: %d", port); 2353 mutex_exit(&ahci_portp->ahciport_mutex); 2354 return (SATA_FAILURE); 2355 } 2356 2357 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 2358 /* 2359 * ahci_intr_phyrdy_change() may have rendered it to 2360 * AHCI_PORT_TYPE_NODEV. 2361 */ 2362 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 2363 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 2364 spkt->satapkt_device.satadev_state = 2365 ahci_portp->ahciport_port_state; 2366 ahci_update_sata_registers(ahci_ctlp, port, 2367 &spkt->satapkt_device); 2368 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2369 "ahci_tran_abort returning SATA_FAILURE while " 2370 "no device attached: port: %d", port); 2371 mutex_exit(&ahci_portp->ahciport_mutex); 2372 return (SATA_FAILURE); 2373 } 2374 2375 if (flag == SATA_ABORT_ALL_PACKETS) { 2376 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2377 aborted_tags = ahci_portp->ahciport_pending_tags; 2378 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2379 aborted_tags = ahci_portp->ahciport_pending_ncq_tags; 2380 2381 cmn_err(CE_NOTE, "!ahci%d: ahci port %d abort all packets", 2382 instance, port); 2383 } else { 2384 aborted_tags = 0xffffffff; 2385 /* 2386 * Aborting one specific packet, first search the 2387 * ahciport_slot_pkts[] list for matching spkt. 2388 */ 2389 for (tmp_slot = 0; 2390 tmp_slot < ahci_ctlp->ahcictl_num_cmd_slots; tmp_slot++) { 2391 if (ahci_portp->ahciport_slot_pkts[tmp_slot] == spkt) { 2392 aborted_tags = (0x1 << tmp_slot); 2393 break; 2394 } 2395 } 2396 2397 if (aborted_tags == 0xffffffff) { 2398 /* request packet is not on the pending list */ 2399 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2400 "Cannot find the aborting pkt 0x%p on the " 2401 "pending list", (void *)spkt); 2402 ahci_update_sata_registers(ahci_ctlp, port, 2403 &spkt->satapkt_device); 2404 mutex_exit(&ahci_portp->ahciport_mutex); 2405 return (SATA_FAILURE); 2406 } 2407 cmn_err(CE_NOTE, "!ahci%d: ahci port %d abort satapkt 0x%p", 2408 instance, port, (void *)spkt); 2409 } 2410 2411 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2412 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2413 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2414 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2415 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2416 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2417 2418 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2419 ahci_portp->ahciport_mop_in_progress++; 2420 2421 /* 2422 * To abort the packet(s), first we are trying to clear PxCMD.ST 2423 * to stop the port, and if the port can be stopped 2424 * successfully with PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0', 2425 * then we just send back the aborted packet(s) with ABORTED flag 2426 * and then restart the port by setting PxCMD.ST and PxCMD.FRE. 2427 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then we 2428 * perform a COMRESET. 2429 */ 2430 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, 2431 ahci_portp, port, NULL, NULL); 2432 2433 /* 2434 * Compute which have finished and which need to be retried. 2435 * 2436 * The finished tags are ahciport_pending_tags/ahciport_pending_ncq_tags 2437 * minus the slot_status. The aborted_tags has to be deducted by 2438 * finished_tags since we can't possibly abort a tag which had finished 2439 * already. 2440 */ 2441 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2442 finished_tags = ahci_portp->ahciport_pending_tags & 2443 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2444 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2445 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2446 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2447 2448 aborted_tags &= ~finished_tags; 2449 2450 ahci_mop_commands(ahci_ctlp, 2451 ahci_portp, 2452 slot_status, 2453 0, /* failed tags */ 2454 0, /* timeout tags */ 2455 aborted_tags, 2456 0); /* reset tags */ 2457 2458 ahci_update_sata_registers(ahci_ctlp, port, &spkt->satapkt_device); 2459 mutex_exit(&ahci_portp->ahciport_mutex); 2460 2461 return (SATA_SUCCESS); 2462 } 2463 2464 /* 2465 * Used to do device reset and reject all the pending packets on a device 2466 * during the reset operation. 2467 * 2468 * NOTE: ONLY called by ahci_tran_reset_dport 2469 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2470 */ 2471 static int 2472 ahci_reset_device_reject_pkts(ahci_ctl_t *ahci_ctlp, 2473 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2474 { 2475 uint32_t slot_status = 0; 2476 uint32_t reset_tags = 0; 2477 uint32_t finished_tags = 0; 2478 uint8_t port = addrp->aa_port; 2479 sata_device_t sdevice; 2480 int ret; 2481 2482 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2483 "ahci_reset_device_reject_pkts on port: %d", port); 2484 2485 /* 2486 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2487 * commands are being mopped, therefore there is nothing else to do 2488 */ 2489 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2490 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2491 "ahci_reset_device_reject_pkts: port %d is in " 2492 "mopping process, so return directly ", port); 2493 return (SATA_SUCCESS); 2494 } 2495 2496 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2497 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2498 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2499 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2500 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2501 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2502 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2503 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2504 } 2505 2506 if (ahci_software_reset(ahci_ctlp, ahci_portp, addrp) 2507 != AHCI_SUCCESS) { 2508 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2509 "Try to do a port reset after software " 2510 "reset failed", port); 2511 ret = ahci_port_reset(ahci_ctlp, ahci_portp, addrp); 2512 if (ret != AHCI_SUCCESS) { 2513 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2514 "ahci_reset_device_reject_pkts: port %d " 2515 "failed", port); 2516 return (SATA_FAILURE); 2517 } 2518 } 2519 /* Set the reset in progress flag */ 2520 ahci_portp->ahciport_reset_in_progress = 1; 2521 2522 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2523 ahci_portp->ahciport_mop_in_progress++; 2524 2525 /* Indicate to the framework that a reset has happened */ 2526 bzero((void *)&sdevice, sizeof (sata_device_t)); 2527 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 2528 sdevice.satadev_addr.pmport = 0; 2529 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 2530 sdevice.satadev_state = SATA_DSTATE_RESET | 2531 SATA_DSTATE_PWR_ACTIVE; 2532 mutex_exit(&ahci_portp->ahciport_mutex); 2533 sata_hba_event_notify( 2534 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 2535 &sdevice, 2536 SATA_EVNT_DEVICE_RESET); 2537 mutex_enter(&ahci_portp->ahciport_mutex); 2538 2539 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 2540 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 2541 2542 /* Next try to mop the pending commands */ 2543 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2544 finished_tags = ahci_portp->ahciport_pending_tags & 2545 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2546 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2547 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2548 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2549 2550 reset_tags &= ~finished_tags; 2551 2552 ahci_mop_commands(ahci_ctlp, 2553 ahci_portp, 2554 slot_status, 2555 0, /* failed tags */ 2556 0, /* timeout tags */ 2557 0, /* aborted tags */ 2558 reset_tags); /* reset tags */ 2559 2560 return (SATA_SUCCESS); 2561 } 2562 2563 /* 2564 * Used to do device reset and reject all the pending packets on a device 2565 * during the reset operation. 2566 * 2567 * NOTE: ONLY called by ahci_tran_reset_dport 2568 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2569 */ 2570 static int 2571 ahci_reset_pmdevice_reject_pkts(ahci_ctl_t *ahci_ctlp, 2572 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2573 { 2574 uint32_t finished_tags = 0, reset_tags = 0, slot_status = 0; 2575 uint8_t port = addrp->aa_port; 2576 uint8_t pmport = addrp->aa_pmport; 2577 sata_device_t sdevice; 2578 2579 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_PMULT, ahci_ctlp, 2580 "ahci_reset_pmdevice_reject_pkts at port %d:%d", port, pmport); 2581 2582 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2583 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2584 "ahci_reset_pmdevice_reject_pkts: port %d is in " 2585 "mopping process, so return directly ", port); 2586 return (SATA_SUCCESS); 2587 } 2588 2589 /* Checking for outstanding commands */ 2590 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2591 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2592 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2593 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2594 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2595 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2596 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2597 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2598 } 2599 2600 /* Issue SOFTWARE reset command. */ 2601 if (ahci_software_reset(ahci_ctlp, ahci_portp, addrp) 2602 != AHCI_SUCCESS) { 2603 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2604 "Try to do a port reset after software " 2605 "reset failed", port); 2606 return (SATA_FAILURE); 2607 } 2608 2609 /* Set the reset in progress flag */ 2610 ahci_portp->ahciport_reset_in_progress = 1; 2611 2612 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2613 ahci_portp->ahciport_mop_in_progress++; 2614 2615 /* Indicate to the framework that a reset has happened */ 2616 bzero((void *)&sdevice, sizeof (sata_device_t)); 2617 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 2618 sdevice.satadev_addr.pmport = pmport; 2619 if (AHCI_ADDR_IS_PMULT(addrp)) 2620 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 2621 else 2622 sdevice.satadev_addr.qual = SATA_ADDR_DPMPORT; 2623 sdevice.satadev_state = SATA_DSTATE_RESET | 2624 SATA_DSTATE_PWR_ACTIVE; 2625 mutex_exit(&ahci_portp->ahciport_mutex); 2626 sata_hba_event_notify( 2627 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 2628 &sdevice, 2629 SATA_EVNT_DEVICE_RESET); 2630 mutex_enter(&ahci_portp->ahciport_mutex); 2631 2632 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 2633 "port %d:%d sending event up: SATA_EVNT_DEVICE_RESET", 2634 port, pmport); 2635 2636 /* Next try to mop the pending commands */ 2637 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2638 finished_tags = ahci_portp->ahciport_pending_tags & 2639 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2640 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2641 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2642 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2643 reset_tags &= ~finished_tags; 2644 2645 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 2646 "reset_tags = %x, finished_tags = %x, slot_status = %x", 2647 reset_tags, finished_tags, slot_status); 2648 2649 /* 2650 * NOTE: Because PxCI be only erased by unset PxCMD.ST bit, so even we 2651 * try to reset a single device behind a port multiplier will 2652 * terminate all the commands on that HBA port. We need mop these 2653 * commands as well. 2654 */ 2655 ahci_mop_commands(ahci_ctlp, 2656 ahci_portp, 2657 slot_status, 2658 0, /* failed tags */ 2659 0, /* timeout tags */ 2660 0, /* aborted tags */ 2661 reset_tags); /* reset tags */ 2662 2663 return (SATA_SUCCESS); 2664 } 2665 2666 /* 2667 * Used to do port reset and reject all the pending packets on a port during 2668 * the reset operation. 2669 * 2670 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2671 */ 2672 static int 2673 ahci_reset_port_reject_pkts(ahci_ctl_t *ahci_ctlp, 2674 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2675 { 2676 uint32_t slot_status = 0; 2677 uint32_t reset_tags = 0; 2678 uint32_t finished_tags = 0; 2679 uint8_t port = addrp->aa_port; 2680 2681 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2682 "ahci_reset_port_reject_pkts at port: %d", port); 2683 2684 /* 2685 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2686 * commands are being mopped, therefore there is nothing else to do 2687 */ 2688 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2689 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2690 "ahci_reset_port_reject_pkts: port %d is in " 2691 "mopping process, so return directly ", port); 2692 return (SATA_SUCCESS); 2693 } 2694 2695 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2696 ahci_portp->ahciport_mop_in_progress++; 2697 2698 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2699 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2700 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2701 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2702 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2703 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2704 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2705 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2706 } 2707 2708 if (ahci_restart_port_wait_till_ready(ahci_ctlp, 2709 ahci_portp, port, AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, 2710 NULL) != AHCI_SUCCESS) { 2711 2712 /* Clear mop flag */ 2713 ahci_portp->ahciport_mop_in_progress--; 2714 if (ahci_portp->ahciport_mop_in_progress == 0) 2715 ahci_portp->ahciport_flags &= 2716 ~AHCI_PORT_FLAG_MOPPING; 2717 return (SATA_FAILURE); 2718 } 2719 2720 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2721 finished_tags = ahci_portp->ahciport_pending_tags & 2722 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2723 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2724 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2725 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2726 2727 reset_tags &= ~finished_tags; 2728 2729 ahci_mop_commands(ahci_ctlp, 2730 ahci_portp, 2731 slot_status, 2732 0, /* failed tags */ 2733 0, /* timeout tags */ 2734 0, /* aborted tags */ 2735 reset_tags); /* reset tags */ 2736 2737 return (SATA_SUCCESS); 2738 } 2739 2740 /* 2741 * Used to do hba reset and reject all the pending packets on all ports 2742 * during the reset operation. 2743 */ 2744 static int 2745 ahci_reset_hba_reject_pkts(ahci_ctl_t *ahci_ctlp) 2746 { 2747 ahci_port_t *ahci_portp; 2748 uint32_t slot_status[AHCI_MAX_PORTS]; 2749 uint32_t reset_tags[AHCI_MAX_PORTS]; 2750 uint32_t finished_tags[AHCI_MAX_PORTS]; 2751 int port; 2752 int ret = SATA_SUCCESS; 2753 2754 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2755 "ahci_reset_hba_reject_pkts enter", NULL); 2756 2757 bzero(slot_status, sizeof (slot_status)); 2758 bzero(reset_tags, sizeof (reset_tags)); 2759 bzero(finished_tags, sizeof (finished_tags)); 2760 2761 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 2762 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 2763 continue; 2764 } 2765 2766 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2767 2768 mutex_enter(&ahci_portp->ahciport_mutex); 2769 ahci_portp->ahciport_reset_in_progress = 1; 2770 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2771 slot_status[port] = ddi_get32( 2772 ahci_ctlp->ahcictl_ahci_acc_handle, 2773 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2774 reset_tags[port] = slot_status[port] & 2775 AHCI_SLOT_MASK(ahci_ctlp); 2776 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 2777 "port %d: reset_tags = 0x%x pending_tags = 0x%x", 2778 port, reset_tags[port], 2779 ahci_portp->ahciport_pending_tags); 2780 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2781 slot_status[port] = ddi_get32( 2782 ahci_ctlp->ahcictl_ahci_acc_handle, 2783 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2784 reset_tags[port] = slot_status[port] & 2785 AHCI_NCQ_SLOT_MASK(ahci_portp); 2786 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 2787 "port %d: reset_tags = 0x%x pending_tags = 0x%x", 2788 port, reset_tags[port], 2789 ahci_portp->ahciport_pending_tags); 2790 } 2791 mutex_exit(&ahci_portp->ahciport_mutex); 2792 } 2793 2794 if (ahci_hba_reset(ahci_ctlp) != AHCI_SUCCESS) { 2795 ret = SATA_FAILURE; 2796 } 2797 2798 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 2799 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 2800 continue; 2801 } 2802 2803 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2804 2805 mutex_enter(&ahci_portp->ahciport_mutex); 2806 /* 2807 * To prevent recursive enter to ahci_mop_commands, we need 2808 * check AHCI_PORT_FLAG_MOPPING flag. 2809 */ 2810 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2811 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2812 "ahci_reset_hba_reject_pkts: port %d is in " 2813 "mopping process, so return directly ", port); 2814 mutex_exit(&ahci_portp->ahciport_mutex); 2815 continue; 2816 } 2817 2818 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2819 ahci_portp->ahciport_mop_in_progress++; 2820 2821 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2822 finished_tags[port] = 2823 ahci_portp->ahciport_pending_tags & 2824 ~slot_status[port] & AHCI_SLOT_MASK(ahci_ctlp); 2825 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2826 finished_tags[port] = 2827 ahci_portp->ahciport_pending_ncq_tags & 2828 ~slot_status[port] & AHCI_NCQ_SLOT_MASK(ahci_portp); 2829 2830 reset_tags[port] &= ~finished_tags[port]; 2831 2832 ahci_mop_commands(ahci_ctlp, 2833 ahci_portp, 2834 slot_status[port], 2835 0, /* failed tags */ 2836 0, /* timeout tags */ 2837 0, /* aborted tags */ 2838 reset_tags[port]); /* reset tags */ 2839 mutex_exit(&ahci_portp->ahciport_mutex); 2840 } 2841 out: 2842 return (ret); 2843 } 2844 2845 /* 2846 * Called by sata framework to reset a port(s) or device. 2847 */ 2848 static int 2849 ahci_tran_reset_dport(dev_info_t *dip, sata_device_t *sd) 2850 { 2851 ahci_ctl_t *ahci_ctlp; 2852 ahci_port_t *ahci_portp; 2853 ahci_addr_t addr; 2854 uint8_t cport = sd->satadev_addr.cport; 2855 uint8_t pmport = sd->satadev_addr.pmport; 2856 uint8_t port; 2857 int ret = SATA_SUCCESS; 2858 int instance = ddi_get_instance(dip); 2859 2860 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 2861 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 2862 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2863 2864 ahci_get_ahci_addr(ahci_ctlp, sd, &addr); 2865 2866 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2867 "ahci_tran_reset_dport enter: cport %d", cport); 2868 2869 switch (sd->satadev_addr.qual) { 2870 case SATA_ADDR_PMPORT: 2871 /* 2872 * If we want to issue a COMRESET on a pmport, we need to 2873 * reject the outstanding commands on that pmport. According 2874 * to AHCI spec, PxCI register could only be cleared by 2875 * clearing PxCMD.ST, which will halt the controller port - as 2876 * well as other pmports. 2877 * 2878 * Therefore we directly reset the controller port for 2879 * simplicity. ahci_tran_probe_port() will handle reset stuff 2880 * like initializing the given pmport. 2881 */ 2882 /* FALLTHRU */ 2883 case SATA_ADDR_CPORT: 2884 /* Port reset */ 2885 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2886 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 2887 "port %d reset port", instance, port); 2888 2889 mutex_enter(&ahci_portp->ahciport_mutex); 2890 ret = ahci_reset_port_reject_pkts(ahci_ctlp, ahci_portp, &addr); 2891 mutex_exit(&ahci_portp->ahciport_mutex); 2892 2893 break; 2894 2895 case SATA_ADDR_DPMPORT: 2896 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 2897 "port %d:%d reset device", instance, port, pmport); 2898 /* FALLTHRU */ 2899 case SATA_ADDR_DCPORT: 2900 /* Device reset */ 2901 if (sd->satadev_addr.qual == SATA_ADDR_DCPORT) 2902 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 2903 "port %d reset device", instance, port); 2904 2905 mutex_enter(&ahci_portp->ahciport_mutex); 2906 /* 2907 * software reset request must be sent to SATA_PMULT_HOSTPORT 2908 * if target is a port multiplier: 2909 */ 2910 if (sd->satadev_addr.qual == SATA_ADDR_DCPORT && 2911 ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) 2912 AHCI_ADDR_SET_PMULT(&addr, port); 2913 2914 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED | 2915 ahci_portp->ahciport_port_state & SATA_PSTATE_SHUTDOWN | 2916 ahci_portp->ahciport_port_state & SATA_PSTATE_PWROFF) { 2917 /* 2918 * In case the targer driver would send the request 2919 * before sata framework can have the opportunity to 2920 * process those event reports. 2921 */ 2922 sd->satadev_state = ahci_portp->ahciport_port_state; 2923 ahci_update_sata_registers(ahci_ctlp, port, sd); 2924 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2925 "ahci_tran_reset_dport returning SATA_FAILURE " 2926 "while port in FAILED/SHUTDOWN/PWROFF state: " 2927 "port: %d", port); 2928 mutex_exit(&ahci_portp->ahciport_mutex); 2929 ret = SATA_FAILURE; 2930 break; 2931 } 2932 2933 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) == 2934 SATA_DTYPE_NONE) { 2935 /* 2936 * ahci_intr_phyrdy_change() may have rendered it to 2937 * AHCI_PORT_TYPE_NODEV. 2938 */ 2939 sd->satadev_type = SATA_DTYPE_NONE; 2940 sd->satadev_state = AHCIPORT_GET_STATE(ahci_portp, 2941 &addr); 2942 ahci_update_sata_registers(ahci_ctlp, port, sd); 2943 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2944 "ahci_tran_reset_dport returning SATA_FAILURE " 2945 "while no device attached: port: %d", port); 2946 mutex_exit(&ahci_portp->ahciport_mutex); 2947 ret = SATA_FAILURE; 2948 break; 2949 } 2950 2951 if (AHCI_ADDR_IS_PORT(&addr)) { 2952 ret = ahci_reset_device_reject_pkts(ahci_ctlp, 2953 ahci_portp, &addr); 2954 } else { 2955 ret = ahci_reset_pmdevice_reject_pkts(ahci_ctlp, 2956 ahci_portp, &addr); 2957 } 2958 2959 mutex_exit(&ahci_portp->ahciport_mutex); 2960 break; 2961 2962 case SATA_ADDR_CNTRL: 2963 /* Reset the whole controller */ 2964 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 2965 "reset the whole hba", instance); 2966 ret = ahci_reset_hba_reject_pkts(ahci_ctlp); 2967 break; 2968 2969 default: 2970 ret = SATA_FAILURE; 2971 } 2972 2973 return (ret); 2974 } 2975 2976 /* 2977 * Called by sata framework to activate a port as part of hotplug. 2978 * (cfgadm -c connect satax/y) 2979 * Support port multiplier. 2980 */ 2981 static int 2982 ahci_tran_hotplug_port_activate(dev_info_t *dip, sata_device_t *satadev) 2983 { 2984 ahci_ctl_t *ahci_ctlp; 2985 ahci_port_t *ahci_portp; 2986 ahci_addr_t addr; 2987 uint8_t cport = satadev->satadev_addr.cport; 2988 uint8_t pmport = satadev->satadev_addr.pmport; 2989 uint8_t port; 2990 int instance = ddi_get_instance(dip); 2991 2992 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 2993 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 2994 2995 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2996 "ahci_tran_hotplug_port_activate enter: cport %d", cport); 2997 2998 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2999 3000 mutex_enter(&ahci_portp->ahciport_mutex); 3001 ahci_get_ahci_addr(ahci_ctlp, satadev, &addr); 3002 ASSERT(AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)); 3003 3004 if (AHCI_ADDR_IS_PORT(&addr)) { 3005 cmn_err(CE_NOTE, "!ahci%d: ahci port %d is activated", 3006 instance, port); 3007 3008 /* Enable the interrupts on the port */ 3009 ahci_enable_port_intrs(ahci_ctlp, port); 3010 3011 /* 3012 * Reset the port so that the PHY communication would be 3013 * re-established. But this reset is an internal operation 3014 * and the sata module doesn't need to know about it. 3015 * Moreover, the port with a device attached will be started 3016 * too. 3017 */ 3018 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, 3019 ahci_portp, port, 3020 AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, 3021 NULL); 3022 3023 /* 3024 * Need to check the link status and device status of the port 3025 * and consider raising power if the port was in D3 state 3026 */ 3027 ahci_portp->ahciport_port_state |= SATA_PSTATE_PWRON; 3028 ahci_portp->ahciport_port_state &= ~SATA_PSTATE_PWROFF; 3029 ahci_portp->ahciport_port_state &= ~SATA_PSTATE_SHUTDOWN; 3030 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 3031 cmn_err(CE_NOTE, "!ahci%d: ahci port %d:%d is activated", 3032 instance, port, pmport); 3033 /* AHCI_ADDR_PMPORT */ 3034 AHCIPORT_PMSTATE(ahci_portp, &addr) |= SATA_PSTATE_PWRON; 3035 AHCIPORT_PMSTATE(ahci_portp, &addr) &= 3036 ~(SATA_PSTATE_PWROFF|SATA_PSTATE_SHUTDOWN); 3037 } 3038 3039 satadev->satadev_state = ahci_portp->ahciport_port_state; 3040 3041 ahci_update_sata_registers(ahci_ctlp, port, satadev); 3042 3043 mutex_exit(&ahci_portp->ahciport_mutex); 3044 return (SATA_SUCCESS); 3045 } 3046 3047 /* 3048 * Called by sata framework to deactivate a port as part of hotplug. 3049 * (cfgadm -c disconnect satax/y) 3050 * Support port multiplier. 3051 */ 3052 static int 3053 ahci_tran_hotplug_port_deactivate(dev_info_t *dip, sata_device_t *satadev) 3054 { 3055 ahci_ctl_t *ahci_ctlp; 3056 ahci_port_t *ahci_portp; 3057 ahci_addr_t addr; 3058 uint8_t cport = satadev->satadev_addr.cport; 3059 uint8_t pmport = satadev->satadev_addr.pmport; 3060 uint8_t port; 3061 uint32_t port_scontrol; 3062 int instance = ddi_get_instance(dip); 3063 3064 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 3065 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 3066 3067 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 3068 "ahci_tran_hotplug_port_deactivate enter: cport %d", cport); 3069 3070 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3071 mutex_enter(&ahci_portp->ahciport_mutex); 3072 ahci_get_ahci_addr(ahci_ctlp, satadev, &addr); 3073 ASSERT(AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)); 3074 3075 if (AHCI_ADDR_IS_PORT(&addr)) { 3076 cmn_err(CE_NOTE, "!ahci%d: ahci port %d is deactivated", 3077 instance, port); 3078 3079 /* Disable the interrupts on the port */ 3080 ahci_disable_port_intrs(ahci_ctlp, port); 3081 3082 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) { 3083 3084 /* First to abort all the pending commands */ 3085 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 3086 3087 /* Then stop the port */ 3088 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3089 ahci_portp, port); 3090 } 3091 3092 /* Next put the PHY offline */ 3093 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3094 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 3095 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_DISABLE); 3096 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, (uint32_t *) 3097 AHCI_PORT_PxSCTL(ahci_ctlp, port), port_scontrol); 3098 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 3099 cmn_err(CE_NOTE, "!ahci%d: ahci port %d:%d is deactivated", 3100 instance, port, pmport); 3101 3102 ahci_disable_port_intrs(ahci_ctlp, port); 3103 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) 3104 != SATA_DTYPE_NONE) 3105 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 3106 3107 /* Re-enable the interrupts for the other pmports */ 3108 ahci_enable_port_intrs(ahci_ctlp, port); 3109 } 3110 3111 /* Update port state */ 3112 AHCIPORT_SET_STATE(ahci_portp, &addr, SATA_PSTATE_SHUTDOWN); 3113 satadev->satadev_state = SATA_PSTATE_SHUTDOWN; 3114 3115 ahci_update_sata_registers(ahci_ctlp, port, satadev); 3116 3117 mutex_exit(&ahci_portp->ahciport_mutex); 3118 return (SATA_SUCCESS); 3119 } 3120 3121 /* 3122 * To be used to mark all the outstanding pkts with SATA_PKT_ABORTED 3123 * when a device is unplugged or a port is deactivated. 3124 * 3125 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3126 */ 3127 static void 3128 ahci_reject_all_abort_pkts(ahci_ctl_t *ahci_ctlp, 3129 ahci_port_t *ahci_portp, uint8_t port) 3130 { 3131 uint32_t slot_status = 0; 3132 uint32_t abort_tags = 0; 3133 3134 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 3135 "ahci_reject_all_abort_pkts at port: %d", port); 3136 3137 /* Read/write port multiplier command takes highest priority */ 3138 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 3139 slot_status = 0x1; 3140 abort_tags = 0x1; 3141 goto out; 3142 } 3143 3144 /* 3145 * When AHCI_PORT_FLAG_MOPPING is set, we need to check whether a 3146 * REQUEST SENSE command or READ LOG EXT command is delivered to HBA 3147 * to get the error data, if yes when the device is removed, the 3148 * command needs to be aborted too. 3149 */ 3150 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 3151 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 3152 slot_status = 0x1; 3153 abort_tags = 0x1; 3154 goto out; 3155 } else { 3156 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3157 "ahci_reject_all_abort_pkts return directly " 3158 "port %d no needs to reject any outstanding " 3159 "commands", port); 3160 return; 3161 } 3162 } 3163 3164 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 3165 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3166 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 3167 abort_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 3168 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 3169 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3170 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 3171 abort_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 3172 } 3173 3174 out: 3175 /* No need to do mop when there is no outstanding commands */ 3176 if (slot_status != 0) { 3177 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 3178 ahci_portp->ahciport_mop_in_progress++; 3179 3180 ahci_mop_commands(ahci_ctlp, 3181 ahci_portp, 3182 slot_status, 3183 0, /* failed tags */ 3184 0, /* timeout tags */ 3185 abort_tags, /* aborting tags */ 3186 0); /* reset tags */ 3187 } 3188 } 3189 3190 #if defined(__lock_lint) 3191 static int 3192 ahci_selftest(dev_info_t *dip, sata_device_t *device) 3193 { 3194 return (SATA_SUCCESS); 3195 } 3196 #endif 3197 3198 /* 3199 * Allocate the ports structure, only called by ahci_attach 3200 */ 3201 static int 3202 ahci_alloc_ports_state(ahci_ctl_t *ahci_ctlp) 3203 { 3204 int port, cport = 0; 3205 3206 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3207 "ahci_alloc_ports_state enter", NULL); 3208 3209 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3210 3211 /* Allocate structures only for the implemented ports */ 3212 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3213 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3214 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3215 "hba port %d not implemented", port); 3216 continue; 3217 } 3218 3219 ahci_ctlp->ahcictl_cport_to_port[cport] = (uint8_t)port; 3220 ahci_ctlp->ahcictl_port_to_cport[port] = 3221 (uint8_t)cport++; 3222 3223 if (ahci_alloc_port_state(ahci_ctlp, port) != AHCI_SUCCESS) { 3224 goto err_out; 3225 } 3226 } 3227 3228 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3229 return (AHCI_SUCCESS); 3230 3231 err_out: 3232 for (port--; port >= 0; port--) { 3233 if (AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3234 ahci_dealloc_port_state(ahci_ctlp, port); 3235 } 3236 } 3237 3238 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3239 return (AHCI_FAILURE); 3240 } 3241 3242 /* 3243 * Reverse of ahci_alloc_ports_state(), only called by ahci_detach 3244 */ 3245 static void 3246 ahci_dealloc_ports_state(ahci_ctl_t *ahci_ctlp) 3247 { 3248 int port; 3249 3250 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3251 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3252 /* if this port is implemented by the HBA */ 3253 if (AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) 3254 ahci_dealloc_port_state(ahci_ctlp, port); 3255 } 3256 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3257 } 3258 3259 /* 3260 * Drain the taskq. 3261 */ 3262 static void 3263 ahci_drain_ports_taskq(ahci_ctl_t *ahci_ctlp) 3264 { 3265 ahci_port_t *ahci_portp; 3266 int port; 3267 3268 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3269 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3270 continue; 3271 } 3272 3273 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3274 3275 mutex_enter(&ahci_portp->ahciport_mutex); 3276 ddi_taskq_wait(ahci_portp->ahciport_event_taskq); 3277 mutex_exit(&ahci_portp->ahciport_mutex); 3278 } 3279 } 3280 3281 /* 3282 * Initialize the controller and all ports. And then try to start the ports 3283 * if there are devices attached. 3284 * 3285 * This routine can be called from three seperate cases: DDI_ATTACH, 3286 * PM_LEVEL_D0 and DDI_RESUME. The DDI_ATTACH case is different from 3287 * other two cases; device signature probing are attempted only during 3288 * DDI_ATTACH case. 3289 * 3290 * WARNING!!! Disable the whole controller's interrupts before calling and 3291 * the interrupts will be enabled upon successfully return. 3292 */ 3293 static int 3294 ahci_initialize_controller(ahci_ctl_t *ahci_ctlp) 3295 { 3296 ahci_port_t *ahci_portp; 3297 ahci_addr_t addr; 3298 uint32_t ghc_control; 3299 int port; 3300 3301 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3302 "ahci_initialize_controller enter", NULL); 3303 3304 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3305 3306 /* 3307 * Indicate that system software is AHCI aware by setting 3308 * GHC.AE to 1 3309 */ 3310 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3311 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 3312 3313 ghc_control |= AHCI_HBA_GHC_AE; 3314 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3315 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), 3316 ghc_control); 3317 3318 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3319 3320 /* Initialize the implemented ports and structures */ 3321 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3322 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3323 continue; 3324 } 3325 3326 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3327 mutex_enter(&ahci_portp->ahciport_mutex); 3328 3329 /* 3330 * Ensure that the controller is not in the running state 3331 * by checking every implemented port's PxCMD register 3332 */ 3333 AHCI_ADDR_SET_PORT(&addr, (uint8_t)port); 3334 3335 if (ahci_initialize_port(ahci_ctlp, ahci_portp, &addr) 3336 != AHCI_SUCCESS) { 3337 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3338 "ahci_initialize_controller: failed to " 3339 "initialize port %d", port); 3340 /* 3341 * Set the port state to SATA_PSTATE_FAILED if 3342 * failed to initialize it. 3343 */ 3344 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 3345 } 3346 3347 mutex_exit(&ahci_portp->ahciport_mutex); 3348 } 3349 3350 /* Enable the whole controller interrupts */ 3351 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3352 ahci_enable_all_intrs(ahci_ctlp); 3353 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3354 3355 return (AHCI_SUCCESS); 3356 } 3357 3358 /* 3359 * Reverse of ahci_initialize_controller() 3360 * 3361 * We only need to stop the ports and disable the interrupt. 3362 */ 3363 static void 3364 ahci_uninitialize_controller(ahci_ctl_t *ahci_ctlp) 3365 { 3366 ahci_port_t *ahci_portp; 3367 int port; 3368 3369 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3370 "ahci_uninitialize_controller enter", NULL); 3371 3372 /* disable all the interrupts. */ 3373 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3374 ahci_disable_all_intrs(ahci_ctlp); 3375 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3376 3377 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3378 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3379 continue; 3380 } 3381 3382 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3383 3384 /* Stop the port by clearing PxCMD.ST */ 3385 mutex_enter(&ahci_portp->ahciport_mutex); 3386 3387 /* 3388 * Here we must disable the port interrupt because 3389 * ahci_disable_all_intrs only clear GHC.IE, and IS 3390 * register will be still set if PxIE is enabled. 3391 * When ahci shares one IRQ with other drivers, the 3392 * intr handler may claim the intr mistakenly. 3393 */ 3394 ahci_disable_port_intrs(ahci_ctlp, port); 3395 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3396 ahci_portp, port); 3397 mutex_exit(&ahci_portp->ahciport_mutex); 3398 } 3399 } 3400 3401 /* 3402 * ahci_alloc_pmult() 3403 * 1. Setting HBA port registers which are necessary for a port multiplier. 3404 * (Set PxCMD.PMA while PxCMD.ST is '0') 3405 * 2. Allocate ahci_pmult_info structure. 3406 * 3407 * NOTE: Must stop port before the function is called. 3408 * WARNING!!! ahciport_mutex should be acquired before the function is 3409 * called. 3410 */ 3411 static void 3412 ahci_alloc_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 3413 { 3414 uint32_t port_cmd_status; 3415 uint8_t port = ahci_portp->ahciport_port_num; 3416 3417 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3418 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3419 3420 /* The port must have been stopped before. */ 3421 ASSERT(!(port_cmd_status & AHCI_CMD_STATUS_ST)); 3422 3423 if (!(port_cmd_status & AHCI_CMD_STATUS_PMA)) { 3424 /* set PMA bit */ 3425 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3426 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 3427 port_cmd_status|AHCI_CMD_STATUS_PMA); 3428 3429 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 3430 "ahci_alloc_pmult: " 3431 "PxCMD.PMA bit set at port %d.", port); 3432 } 3433 3434 /* Allocate port multiplier information structure */ 3435 if (ahci_portp->ahciport_pmult_info == NULL) { 3436 ahci_portp->ahciport_pmult_info = (ahci_pmult_info_t *) 3437 kmem_zalloc(sizeof (ahci_pmult_info_t), KM_SLEEP); 3438 } 3439 3440 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 3441 } 3442 3443 /* 3444 * ahci_dealloc_pmult() 3445 * 1. Clearing related registers when a port multiplier is detached. 3446 * (Clear PxCMD.PMA while PxCMD.ST is '0') 3447 * 2. Deallocate ahci_pmult_info structure. 3448 * 3449 * NOTE: Must stop port before the function is called. 3450 * WARNING!!! ahciport_mutex should be acquired before the function is 3451 * called. 3452 */ 3453 static void 3454 ahci_dealloc_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 3455 { 3456 uint32_t port_cmd_status; 3457 uint8_t port = ahci_portp->ahciport_port_num; 3458 3459 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3460 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3461 3462 if (port_cmd_status & AHCI_CMD_STATUS_PMA) { 3463 /* Clear PMA bit */ 3464 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3465 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 3466 (port_cmd_status & (~AHCI_CMD_STATUS_PMA))); 3467 3468 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 3469 "ahci_dealloc_pmult: " 3470 "PxCMD.PMA bit cleared at port %d.", port); 3471 } 3472 3473 /* Release port multiplier information structure */ 3474 if (ahci_portp->ahciport_pmult_info != NULL) { 3475 kmem_free(ahci_portp->ahciport_pmult_info, 3476 sizeof (ahci_pmult_info_t)); 3477 ahci_portp->ahciport_pmult_info = NULL; 3478 } 3479 } 3480 3481 /* 3482 * The routine is to initialize a port. First put the port in NOTRunning 3483 * state, then enable port interrupt and clear Serror register. And under 3484 * AHCI_ATTACH case, find device signature and then try to start the port. 3485 * 3486 * Called by 3487 * 1. ahci_initialize_controller 3488 * 2. ahci_intr_phyrdy_change (hotplug) 3489 * 3490 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3491 */ 3492 static int 3493 ahci_initialize_port(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 3494 ahci_addr_t *addrp) 3495 { 3496 uint32_t port_sstatus, port_task_file, port_cmd_status; 3497 uint8_t port = addrp->aa_port; 3498 boolean_t pm_mode = B_TRUE; /* Power Management mode */ 3499 int ret; 3500 3501 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 3502 3503 /* AHCI_ADDR_PORT: We've no idea of the attached device here. */ 3504 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 3505 3506 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3507 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3508 3509 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3510 "ahci_initialize_port: port %d ", port); 3511 3512 /* 3513 * Check whether the port is in NotRunning state, if not, 3514 * put the port in NotRunning state 3515 */ 3516 if (port_cmd_status & 3517 (AHCI_CMD_STATUS_ST | 3518 AHCI_CMD_STATUS_CR | 3519 AHCI_CMD_STATUS_FRE | 3520 AHCI_CMD_STATUS_FR)) { 3521 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3522 ahci_portp, port); 3523 } 3524 3525 /* Disable interrupt */ 3526 ahci_disable_port_intrs(ahci_ctlp, port); 3527 3528 /* Device is unknown at first */ 3529 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 3530 3531 /* Disable the interface power management */ 3532 ahci_disable_interface_pm(ahci_ctlp, port); 3533 3534 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3535 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 3536 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3537 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 3538 3539 /* Check physcial link status */ 3540 if (SSTATUS_GET_IPM(port_sstatus) == SSTATUS_IPM_NODEV_NOPHYCOM || 3541 SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_NOPHYCOM || 3542 3543 /* Check interface status */ 3544 port_task_file & AHCI_TFD_STS_BSY || 3545 port_task_file & AHCI_TFD_STS_DRQ || 3546 3547 /* Check whether port reset must be executed */ 3548 ahci_ctlp->ahcictl_cap & AHCI_CAP_INIT_PORT_RESET) { 3549 3550 /* Something went wrong, we need do some reset things */ 3551 ret = ahci_port_reset(ahci_ctlp, ahci_portp, addrp); 3552 3553 /* Does port reset succeed on HBA port? */ 3554 if (ret != AHCI_SUCCESS) { 3555 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 3556 "ahci_initialize_port:" 3557 "port reset faild at port %d", port); 3558 return (AHCI_FAILURE); 3559 } 3560 3561 /* Is port failed? */ 3562 if (AHCIPORT_GET_STATE(ahci_portp, addrp) & 3563 SATA_PSTATE_FAILED) { 3564 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 3565 "ahci_initialize_port: port %d state 0x%x", 3566 port, ahci_portp->ahciport_port_state); 3567 return (AHCI_FAILURE); 3568 } 3569 } 3570 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_READY); 3571 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "port %d is ready now.", port); 3572 3573 /* 3574 * At the time being, only probe ports/devices and get the types of 3575 * attached devices during DDI_ATTACH. In fact, the device can be 3576 * changed during power state changes, but at the time being, we 3577 * don't support the situation. 3578 */ 3579 mutex_exit(&ahci_portp->ahciport_mutex); 3580 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3581 if (ahci_ctlp->ahcictl_flags & AHCI_ATTACH) 3582 pm_mode = B_FALSE; 3583 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3584 mutex_enter(&ahci_portp->ahciport_mutex); 3585 3586 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) 3587 pm_mode = B_FALSE; 3588 3589 if (!pm_mode) { 3590 /* 3591 * Try to get the device signature if the port is 3592 * not empty. 3593 */ 3594 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) 3595 ahci_find_dev_signature(ahci_ctlp, ahci_portp, addrp); 3596 } else { 3597 3598 /* 3599 * During the resume, we need to set the PxCLB, PxCLBU, PxFB 3600 * and PxFBU registers in case these registers were cleared 3601 * during the suspend. 3602 */ 3603 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3604 "ahci_initialize_port: port %d " 3605 "reset the port during resume", port); 3606 (void) ahci_port_reset(ahci_ctlp, ahci_portp, addrp); 3607 3608 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3609 "ahci_initialize_port: port %d " 3610 "set PxCLB, PxCLBU, PxFB and PxFBU " 3611 "during resume", port); 3612 3613 /* Config Port Received FIS Base Address */ 3614 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 3615 (uint64_t *)AHCI_PORT_PxFB(ahci_ctlp, port), 3616 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_laddress); 3617 3618 /* Config Port Command List Base Address */ 3619 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 3620 (uint64_t *)AHCI_PORT_PxCLB(ahci_ctlp, port), 3621 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_laddress); 3622 } 3623 3624 /* Return directly if no device connected */ 3625 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 3626 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3627 "No device connected to port %d", port); 3628 goto out; 3629 } 3630 3631 /* If this is a port multiplier, we need do some initialization */ 3632 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 3633 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 3634 "Port multiplier found at port %d", port); 3635 ahci_alloc_pmult(ahci_ctlp, ahci_portp); 3636 } 3637 3638 /* Try to start the port */ 3639 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 3640 != AHCI_SUCCESS) { 3641 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3642 "failed to start port %d", port); 3643 return (AHCI_FAILURE); 3644 } 3645 out: 3646 /* Enable port interrupts */ 3647 ahci_enable_port_intrs(ahci_ctlp, port); 3648 3649 return (AHCI_SUCCESS); 3650 } 3651 3652 /* 3653 * Handle hardware defect, and check the capabilities. For example, 3654 * power management capabilty and MSI capability. 3655 */ 3656 static int 3657 ahci_config_space_init(ahci_ctl_t *ahci_ctlp) 3658 { 3659 ushort_t venid, devid; 3660 ushort_t caps_ptr, cap_count, cap; 3661 #if AHCI_DEBUG 3662 ushort_t pmcap, pmcsr; 3663 ushort_t msimc; 3664 #endif 3665 uint8_t revision; 3666 3667 venid = pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 3668 PCI_CONF_VENID); 3669 3670 devid = pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 3671 PCI_CONF_DEVID); 3672 3673 /* 3674 * Modify dma_attr_align of ahcictl_buffer_dma_attr. For VT8251, those 3675 * controllers with 0x00 revision id work on 4-byte aligned buffer, 3676 * which is a bug and was fixed after 0x00 revision id controllers. 3677 * 3678 * Moreover, VT8251 cannot use multiple command slots in the command 3679 * list for non-queued commands because the previous register content 3680 * of PxCI can be re-written in the register write, so a flag will be 3681 * set to record this defect - AHCI_CAP_NO_MCMDLIST_NONQUEUE. 3682 */ 3683 if (venid == VIA_VENID) { 3684 revision = pci_config_get8(ahci_ctlp->ahcictl_pci_conf_handle, 3685 PCI_CONF_REVID); 3686 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3687 "revision id = 0x%x", revision); 3688 if (revision == 0x00) { 3689 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_align = 0x4; 3690 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3691 "change ddi_attr_align to 0x4", NULL); 3692 } 3693 3694 ahci_ctlp->ahcictl_cap = AHCI_CAP_NO_MCMDLIST_NONQUEUE; 3695 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3696 "VT8251 cannot use multiple command lists for " 3697 "non-queued commands", NULL); 3698 } 3699 3700 /* 3701 * AMD/ATI SB600 (0x1002,0x4380) AHCI chipset doesn't support 64-bit 3702 * DMA addressing for communication memory descriptors though S64A bit 3703 * of CAP register declares it supports. However, it does support 3704 * 64-bit DMA for data buffer. So only AHCI_CAP_COMMU_32BIT_DMA is 3705 * set for this controller. 3706 * 3707 * Please note that AHCI_CAP_BUF_32BIT_DMA was ever set because we 3708 * found 64-bit DMA cannot work on ASUS M2A-VM with old BIOS version. 3709 * However, the issue can be resolved by upgrade of 1501+ BIOS, so 3710 * we decided to remove the flag. 3711 * 3712 * Due to certain hardware issue, the chipset must do port reset during 3713 * initialization, otherwise, when retrieving device signature, 3714 * software reset will get time out. So AHCI_CAP_INIT_PORT_RESET flag 3715 * need to set. 3716 * 3717 * For this chipset software reset will get failure if the pmport of 3718 * Register FIS was set with SATA_PMULT_HOSTPORT (0xf) and no port 3719 * multiplier is connected to the port. In order to fix the issue, 3720 * AHCI_CAP_SRST_NO_HOSTPORT flag need to be set, and once software 3721 * reset got failure, the driver will try to do another software reset 3722 * with pmport 0. 3723 */ 3724 if (venid == 0x1002 && devid == 0x4380) { 3725 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 3726 ahci_ctlp->ahcictl_cap |= AHCI_CAP_INIT_PORT_RESET; 3727 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT; 3728 3729 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3730 "ATI SB600 cannot do 64-bit DMA for communication " 3731 "memory descriptors though CAP indicates support, " 3732 "so force it to use 32-bit DMA", NULL); 3733 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3734 "ATI SB600 need to do a port reset during initialization", 3735 NULL); 3736 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3737 "ATI SB600 will get software reset failure if pmport " 3738 "is set 0xf and no port multiplier is attached", NULL); 3739 } 3740 3741 /* 3742 * AMD/ATI SB700/710/750/800 and SP5100 AHCI chipset share the same 3743 * vendor ID and device ID (0x1002,0x4391). 3744 * 3745 * SB700/750 AHCI chipset on some boards doesn't support 64-bit 3746 * DMA addressing for communication memory descriptors though S64A bit 3747 * of CAP register declares the support. However, it does support 3748 * 64-bit DMA for data buffer. So only AHCI_CAP_COMMU_32BIT_DMA is 3749 * set for this controller. 3750 * 3751 * SB710 has the same initialization issue as SB600, so it also need 3752 * a port reset. That is AHCI_CAP_INIT_PORT_RESET need to set for it. 3753 * 3754 * SB700 also has the same issue about software reset, and thus 3755 * AHCI_CAP_SRST_NO_HOSTPORT flag also is needed. 3756 */ 3757 if (venid == 0x1002 && devid == 0x4391) { 3758 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 3759 ahci_ctlp->ahcictl_cap |= AHCI_CAP_INIT_PORT_RESET; 3760 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT; 3761 3762 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3763 "ATI SB700/750 cannot do 64-bit DMA for communication " 3764 "memory descriptors though CAP indicates support, " 3765 "so force it to use 32-bit DMA", NULL); 3766 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3767 "ATI SB710 need to do a port reset during initialization", 3768 NULL); 3769 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3770 "ATI SB700 will get software reset failure if pmport " 3771 "is set 0xf and no port multiplier is attached", NULL); 3772 } 3773 3774 /* 3775 * Check if capabilities list is supported and if so, 3776 * get initial capabilities pointer and clear bits 0,1. 3777 */ 3778 if (pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 3779 PCI_CONF_STAT) & PCI_STAT_CAP) { 3780 caps_ptr = P2ALIGN(pci_config_get8( 3781 ahci_ctlp->ahcictl_pci_conf_handle, 3782 PCI_CONF_CAP_PTR), 4); 3783 } else { 3784 caps_ptr = PCI_CAP_NEXT_PTR_NULL; 3785 } 3786 3787 /* 3788 * Walk capabilities if supported. 3789 */ 3790 for (cap_count = 0; caps_ptr != PCI_CAP_NEXT_PTR_NULL; ) { 3791 3792 /* 3793 * Check that we haven't exceeded the maximum number of 3794 * capabilities and that the pointer is in a valid range. 3795 */ 3796 if (++cap_count > PCI_CAP_MAX_PTR) { 3797 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3798 "too many device capabilities", NULL); 3799 return (AHCI_FAILURE); 3800 } 3801 if (caps_ptr < PCI_CAP_PTR_OFF) { 3802 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3803 "capabilities pointer 0x%x out of range", 3804 caps_ptr); 3805 return (AHCI_FAILURE); 3806 } 3807 3808 /* 3809 * Get next capability and check that it is valid. 3810 * For now, we only support power management. 3811 */ 3812 cap = pci_config_get8(ahci_ctlp->ahcictl_pci_conf_handle, 3813 caps_ptr); 3814 switch (cap) { 3815 case PCI_CAP_ID_PM: 3816 3817 /* power management supported */ 3818 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PM; 3819 3820 /* Save PMCSR offset */ 3821 ahci_ctlp->ahcictl_pmcsr_offset = caps_ptr + PCI_PMCSR; 3822 3823 #if AHCI_DEBUG 3824 pmcap = pci_config_get16( 3825 ahci_ctlp->ahcictl_pci_conf_handle, 3826 caps_ptr + PCI_PMCAP); 3827 pmcsr = pci_config_get16( 3828 ahci_ctlp->ahcictl_pci_conf_handle, 3829 ahci_ctlp->ahcictl_pmcsr_offset); 3830 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3831 "Power Management capability found PCI_PMCAP " 3832 "= 0x%x PCI_PMCSR = 0x%x", pmcap, pmcsr); 3833 if ((pmcap & 0x3) == 0x3) 3834 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3835 "PCI Power Management Interface " 3836 "spec 1.2 compliant", NULL); 3837 #endif 3838 break; 3839 3840 case PCI_CAP_ID_MSI: 3841 #if AHCI_DEBUG 3842 msimc = pci_config_get16( 3843 ahci_ctlp->ahcictl_pci_conf_handle, 3844 caps_ptr + PCI_MSI_CTRL); 3845 AHCIDBG(AHCIDBG_MSI, ahci_ctlp, 3846 "Message Signaled Interrupt capability found " 3847 "MSICAP_MC.MMC = 0x%x", (msimc & 0xe) >> 1); 3848 #endif 3849 AHCIDBG(AHCIDBG_MSI, ahci_ctlp, 3850 "MSI capability found", NULL); 3851 break; 3852 3853 case PCI_CAP_ID_PCIX: 3854 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3855 "PCI-X capability found", NULL); 3856 break; 3857 3858 case PCI_CAP_ID_PCI_E: 3859 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3860 "PCI Express capability found", NULL); 3861 break; 3862 3863 case PCI_CAP_ID_MSI_X: 3864 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3865 "MSI-X capability found", NULL); 3866 break; 3867 3868 case PCI_CAP_ID_SATA: 3869 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3870 "SATA capability found", NULL); 3871 break; 3872 3873 case PCI_CAP_ID_VS: 3874 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3875 "Vendor Specific capability found", NULL); 3876 break; 3877 3878 default: 3879 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3880 "unrecognized capability 0x%x", cap); 3881 break; 3882 } 3883 3884 /* 3885 * Get next capabilities pointer and clear bits 0,1. 3886 */ 3887 caps_ptr = P2ALIGN(pci_config_get8( 3888 ahci_ctlp->ahcictl_pci_conf_handle, 3889 (caps_ptr + PCI_CAP_NEXT_PTR)), 4); 3890 } 3891 3892 return (AHCI_SUCCESS); 3893 } 3894 3895 /* 3896 * Read/Write a register at port multiplier by SATA READ PORTMULT / SATA WRITE 3897 * PORTMULT command. SYNC & POLLING mode is used. 3898 * 3899 * WARNING!!! ahciport_mutex should be acquired before the function 3900 * is called. 3901 */ 3902 static int 3903 ahci_rdwr_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 3904 uint8_t regn, uint32_t *pregv, uint8_t type) 3905 { 3906 ahci_port_t *ahci_portp; 3907 ahci_addr_t pmult_addr; 3908 sata_pkt_t *spkt; 3909 sata_cmd_t *scmd; 3910 sata_device_t sata_device; 3911 uint8_t port = addrp->aa_port; 3912 uint8_t pmport = addrp->aa_pmport; 3913 uint8_t cport; 3914 uint32_t intr_mask; 3915 int rval; 3916 char portstr[10]; 3917 3918 SET_PORTSTR(portstr, addrp); 3919 cport = ahci_ctlp->ahcictl_port_to_cport[port]; 3920 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3921 3922 ASSERT(AHCI_ADDR_IS_PMPORT(addrp) || AHCI_ADDR_IS_PMULT(addrp)); 3923 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 3924 3925 /* Check the existence of the port multiplier */ 3926 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) 3927 return (AHCI_FAILURE); 3928 3929 /* Request a READ/WRITE PORTMULT sata packet. */ 3930 bzero(&sata_device, sizeof (sata_device_t)); 3931 sata_device.satadev_addr.cport = cport; 3932 sata_device.satadev_addr.pmport = pmport; 3933 sata_device.satadev_addr.qual = SATA_ADDR_PMULT; 3934 sata_device.satadev_rev = SATA_DEVICE_REV; 3935 3936 /* 3937 * Make sure no command is outstanding here. All R/W PMULT requests 3938 * come from 3939 * 3940 * 1. ahci_attach() 3941 * The port should be empty. 3942 * 3943 * 2. ahci_tran_probe_port() 3944 * Any request from SATA framework (via ahci_tran_start) should be 3945 * rejected if R/W PMULT command is outstanding. 3946 * 3947 * If we are doing mopping, do not check those flags because no 3948 * command will be actually outstanding. 3949 * 3950 * If the port has been occupied by any other commands, the probe 3951 * function will return a SATA_RETRY. SATA framework will retry 3952 * later. 3953 */ 3954 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 3955 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 3956 "R/W PMULT failed: R/W PMULT in progress at port %d.", 3957 port, ahci_portp->ahciport_flags); 3958 return (AHCI_FAILURE); 3959 } 3960 3961 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) && ( 3962 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 3963 NCQ_CMD_IN_PROGRESS(ahci_portp) || 3964 NON_NCQ_CMD_IN_PROGRESS(ahci_portp))) { 3965 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 3966 "R/W PMULT failed: port %d is occupied (flags 0x%x).", 3967 port, ahci_portp->ahciport_flags); 3968 return (AHCI_FAILURE); 3969 } 3970 3971 /* 3972 * The port multiplier is gone. This may happen when 3973 * 1. Cutting off the power of an enclosure. The device lose the power 3974 * before port multiplier. 3975 * 2. Disconnecting the port multiplier during hot-plugging a sub-drive. 3976 * 3977 * The issued command should be aborted and the following command 3978 * should not be continued. 3979 */ 3980 if (!(ahci_portp->ahciport_port_state & SATA_STATE_READY)) { 3981 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 3982 "READ/WRITE PMULT failed: " 3983 "port-mult is removed from port %d", port); 3984 return (AHCI_FAILURE); 3985 } 3986 3987 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RDWR_PMULT; 3988 3989 spkt = sata_get_rdwr_pmult_pkt(ahci_ctlp->ahcictl_dip, 3990 &sata_device, regn, *pregv, type); 3991 3992 /* 3993 * READ/WRITE PORTMULT command is intended to sent to the control port 3994 * of the port multiplier. 3995 */ 3996 AHCI_ADDR_SET_PMULT(&pmult_addr, addrp->aa_port); 3997 3998 ahci_portp->ahciport_rdwr_pmult_pkt = spkt; 3999 4000 /* No interrupt here. Store the interrupt enable mask. */ 4001 intr_mask = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4002 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port)); 4003 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4004 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 0); 4005 4006 rval = ahci_do_sync_start(ahci_ctlp, ahci_portp, &pmult_addr, spkt); 4007 4008 if (rval == AHCI_SUCCESS && 4009 spkt->satapkt_reason == SATA_PKT_COMPLETED) { 4010 if (type == SATA_RDWR_PMULT_PKT_TYPE_READ) { 4011 scmd = &spkt->satapkt_cmd; 4012 *pregv = scmd->satacmd_lba_high_lsb << 24 | 4013 scmd->satacmd_lba_mid_lsb << 16 | 4014 scmd->satacmd_lba_low_lsb << 8 | 4015 scmd->satacmd_sec_count_lsb; 4016 } 4017 } else { 4018 /* Failed or not completed. */ 4019 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4020 "ahci_rdwr_pmult: cannot [%s] %s[%d] at port %s", 4021 type == SATA_RDWR_PMULT_PKT_TYPE_READ?"Read":"Write", 4022 AHCI_ADDR_IS_PMULT(addrp)?"gscr":"pscr", regn, portstr); 4023 rval = AHCI_FAILURE; 4024 } 4025 out: 4026 /* Restore the interrupt mask */ 4027 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4028 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), intr_mask); 4029 4030 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_RDWR_PMULT; 4031 ahci_portp->ahciport_rdwr_pmult_pkt = NULL; 4032 sata_free_rdwr_pmult_pkt(spkt); 4033 return (rval); 4034 } 4035 4036 static int 4037 ahci_read_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4038 uint8_t regn, uint32_t *pregv) 4039 { 4040 return ahci_rdwr_pmult(ahci_ctlp, addrp, regn, pregv, 4041 SATA_RDWR_PMULT_PKT_TYPE_READ); 4042 } 4043 4044 static int 4045 ahci_write_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4046 uint8_t regn, uint32_t regv) 4047 { 4048 return ahci_rdwr_pmult(ahci_ctlp, addrp, regn, ®v, 4049 SATA_RDWR_PMULT_PKT_TYPE_WRITE); 4050 } 4051 4052 #define READ_PMULT(addrp, r, pv, out) \ 4053 if (ahci_read_pmult(ahci_ctlp, addrp, r, pv) != AHCI_SUCCESS) \ 4054 goto out; 4055 4056 #define WRITE_PMULT(addrp, r, v, out) \ 4057 if (ahci_write_pmult(ahci_ctlp, addrp, r, v) != AHCI_SUCCESS) \ 4058 goto out; 4059 4060 /* 4061 * Update sata registers on port multiplier, including GSCR/PSCR registers. 4062 * ahci_update_pmult_gscr() 4063 * ahci_update_pmult_pscr() 4064 * 4065 * WARNING!!! ahciport_mutex should be acquired before those functions 4066 * get called. 4067 */ 4068 static int 4069 ahci_update_pmult_gscr(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4070 sata_pmult_gscr_t *sg) 4071 { 4072 READ_PMULT(addrp, SATA_PMULT_GSCR0, &sg->gscr0, err); 4073 READ_PMULT(addrp, SATA_PMULT_GSCR1, &sg->gscr1, err); 4074 READ_PMULT(addrp, SATA_PMULT_GSCR2, &sg->gscr2, err); 4075 READ_PMULT(addrp, SATA_PMULT_GSCR64, &sg->gscr64, err); 4076 4077 return (AHCI_SUCCESS); 4078 4079 err: /* R/W PMULT error */ 4080 return (AHCI_FAILURE); 4081 } 4082 4083 static int 4084 ahci_update_pmult_pscr(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4085 sata_device_t *sd) 4086 { 4087 ASSERT(AHCI_ADDR_IS_PMPORT(addrp)); 4088 4089 READ_PMULT(addrp, SATA_PMULT_REG_SSTS, &sd->satadev_scr.sstatus, err); 4090 READ_PMULT(addrp, SATA_PMULT_REG_SERR, &sd->satadev_scr.serror, err); 4091 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &sd->satadev_scr.scontrol, err); 4092 READ_PMULT(addrp, SATA_PMULT_REG_SACT, &sd->satadev_scr.sactive, err); 4093 4094 return (AHCI_SUCCESS); 4095 4096 err: /* R/W PMULT error */ 4097 return (AHCI_FAILURE); 4098 } 4099 4100 /* 4101 * ahci_initialize_pmult() 4102 * 4103 * Initialize a port multiplier, including 4104 * 1. Enable FEATURES register at port multiplier. (SATA Chp.16) 4105 * 2. Redefine MASK register. (SATA Chap 16.?) 4106 * 4107 * WARNING!!! ahciport_mutex should be acquired before the function 4108 * is called. 4109 */ 4110 static int 4111 ahci_initialize_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4112 ahci_addr_t *addrp, sata_device_t *sd) 4113 { 4114 sata_pmult_gscr_t sg; 4115 uint32_t gscr64; 4116 uint8_t port = addrp->aa_port; 4117 4118 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 4119 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4120 "[Initialize] Port-multiplier at port %d.", port); 4121 4122 /* 4123 * Enable features of port multiplier. Currently only 4124 * Asynchronous Notification is enabled. 4125 */ 4126 /* Check gscr64 for supported features. */ 4127 READ_PMULT(addrp, SATA_PMULT_GSCR64, &gscr64, err); 4128 4129 if (gscr64 & SATA_PMULT_CAP_SNOTIF) { 4130 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4131 "port %d: Port Multiplier supports " 4132 "Asynchronous Notification.", port); 4133 4134 /* Write to gscr96 to enabled features */ 4135 WRITE_PMULT(addrp, SATA_PMULT_GSCR96, 4136 SATA_PMULT_CAP_SNOTIF, err); 4137 4138 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4139 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 4140 AHCI_SNOTIF_CLEAR_ALL); 4141 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4142 "port %d: PMult PxSNTF cleared.", port); 4143 4144 } 4145 4146 /* 4147 * Now we need to update gscr33 register to enable hot-plug interrupt 4148 * for sub devices behind port multiplier. 4149 */ 4150 WRITE_PMULT(addrp, SATA_PMULT_GSCR33, (0x1ffff), err); 4151 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4152 "port %d: gscr33 mask set to %x.", port, (0x1ffff)); 4153 4154 /* 4155 * Fetch the number of device ports of the port multiplier 4156 */ 4157 if (ahci_update_pmult_gscr(ahci_ctlp, addrp, &sg) != AHCI_SUCCESS) 4158 return (AHCI_FAILURE); 4159 4160 /* Register the port multiplier to SATA Framework. */ 4161 mutex_exit(&ahci_portp->ahciport_mutex); 4162 sata_register_pmult(ahci_ctlp->ahcictl_dip, sd, &sg); 4163 mutex_enter(&ahci_portp->ahciport_mutex); 4164 4165 ahci_portp->ahciport_pmult_info->ahcipmi_num_dev_ports = 4166 sd->satadev_add_info & SATA_PMULT_PORTNUM_MASK; 4167 4168 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4169 "port %d: pmult sub-port number updated to %x.", port, 4170 ahci_portp->ahciport_pmult_info->ahcipmi_num_dev_ports); 4171 4172 /* Till now port-mult is successfully initialized */ 4173 ahci_portp->ahciport_port_state |= SATA_DSTATE_PMULT_INIT; 4174 return (AHCI_SUCCESS); 4175 4176 err: /* R/W PMULT error */ 4177 return (AHCI_FAILURE); 4178 } 4179 4180 /* 4181 * Initialize a port multiplier port. According to spec, firstly we need 4182 * issue a COMRESET, then a software reset to get its signature. 4183 * 4184 * NOTE: This function should only be called in ahci_probe_pmport() 4185 * WARNING!!! ahciport_mutex should be acquired before the function. 4186 */ 4187 static int 4188 ahci_initialize_pmport(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4189 ahci_addr_t *addrp) 4190 { 4191 uint32_t finished_tags = 0, reset_tags = 0, slot_status = 0; 4192 uint8_t port = addrp->aa_port; 4193 uint8_t pmport = addrp->aa_pmport; 4194 int ret = AHCI_FAILURE; 4195 4196 ASSERT(AHCI_ADDR_IS_PMPORT(addrp)); 4197 4198 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 4199 "ahci_initialize_pmport: port %d:%d", port, pmport); 4200 4201 /* Check HBA port state */ 4202 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED) { 4203 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 4204 "ahci_initialize_pmport:" 4205 "port %d:%d Port Multiplier is failed.", 4206 port, pmport); 4207 return (AHCI_FAILURE); 4208 } 4209 4210 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) { 4211 return (AHCI_FAILURE); 4212 } 4213 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_HOTPLUG; 4214 4215 /* Checking for outstanding commands */ 4216 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 4217 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4218 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 4219 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 4220 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 4221 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4222 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 4223 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 4224 } 4225 4226 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 4227 ahci_portp->ahciport_mop_in_progress++; 4228 4229 /* Clear status */ 4230 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_UNKNOWN); 4231 4232 /* Firstly assume an unknown device */ 4233 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 4234 4235 ahci_disable_port_intrs(ahci_ctlp, port); 4236 4237 /* port reset is necessary for port multiplier port */ 4238 if (ahci_pmport_reset(ahci_ctlp, ahci_portp, addrp) != AHCI_SUCCESS) { 4239 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 4240 "ahci_initialize_pmport:" 4241 "port reset failed at port %d:%d", 4242 port, pmport); 4243 goto out; 4244 } 4245 4246 /* Is port failed? */ 4247 if (AHCIPORT_GET_STATE(ahci_portp, addrp) & 4248 SATA_PSTATE_FAILED) { 4249 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4250 "ahci_initialize_pmport: port %d:%d failed. " 4251 "state = 0x%x", port, pmport, 4252 ahci_portp->ahciport_port_state); 4253 goto out; 4254 } 4255 4256 /* Is there any device attached? */ 4257 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, addrp) 4258 == SATA_DTYPE_NONE) { 4259 /* Do not waste time on an empty port */ 4260 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 4261 "ahci_initialize_pmport: No device is found " 4262 "at port %d:%d", port, pmport); 4263 ret = AHCI_SUCCESS; 4264 goto out; 4265 } 4266 4267 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_READY); 4268 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4269 "port %d:%d is ready now.", port, pmport); 4270 4271 /* 4272 * Till now we can assure a device attached to that HBA port and work 4273 * correctly. Now try to get the device signature. This is an optional 4274 * step. If failed, unknown device is assumed, then SATA module will 4275 * continue to use IDENTIFY DEVICE to get the information of the 4276 * device. 4277 */ 4278 ahci_find_dev_signature(ahci_ctlp, ahci_portp, addrp); 4279 4280 ret = AHCI_SUCCESS; 4281 4282 out: 4283 /* Next try to mop the pending commands */ 4284 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 4285 finished_tags = ahci_portp->ahciport_pending_tags & 4286 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 4287 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 4288 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 4289 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 4290 reset_tags &= ~finished_tags; 4291 4292 ahci_mop_commands(ahci_ctlp, 4293 ahci_portp, 4294 slot_status, 4295 0, /* failed tags */ 4296 0, /* timeout tags */ 4297 0, /* aborted tags */ 4298 reset_tags); /* reset tags */ 4299 4300 /* Clear PxSNTF register if supported. */ 4301 if (ahci_ctlp->ahcictl_cap & AHCI_CAP_SNTF) { 4302 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4303 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 4304 AHCI_SNOTIF_CLEAR_ALL); 4305 } 4306 4307 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_HOTPLUG; 4308 ahci_enable_port_intrs(ahci_ctlp, port); 4309 return (ret); 4310 } 4311 4312 /* 4313 * ahci_probe_pmult() 4314 * 4315 * This function will be called to probe a port multiplier, which will 4316 * handle hotplug events on port multiplier ports. 4317 * 4318 * NOTE: Only called from ahci_tran_probe_port() 4319 * WARNING!!! ahciport_mutex should be acquired before the function is called. 4320 */ 4321 static int 4322 ahci_probe_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4323 ahci_addr_t *addrp) 4324 { 4325 sata_device_t sdevice; 4326 ahci_addr_t pmport_addr; 4327 uint32_t gscr32, port_hotplug_tags; 4328 uint32_t pmport_sstatus; 4329 int dev_exists_now = 0, dev_existed_previously = 0; 4330 uint8_t port = addrp->aa_port; 4331 int npmport; 4332 4333 /* The bits in GSCR32 refers to the pmport that has a hot-plug event. */ 4334 READ_PMULT(addrp, SATA_PMULT_GSCR32, &gscr32, err); 4335 port_hotplug_tags = gscr32 & AHCI_PMPORT_MASK(ahci_portp); 4336 4337 do { 4338 npmport = ddi_ffs(port_hotplug_tags) - 1; 4339 if (npmport == -1) 4340 /* no pending hot plug events. */ 4341 return (AHCI_SUCCESS); 4342 4343 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4344 "hot-plug event at port %d:%d", port, npmport); 4345 4346 AHCI_ADDR_SET_PMPORT(&pmport_addr, port, (uint8_t)npmport); 4347 4348 /* Check previous device at that port */ 4349 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &pmport_addr) 4350 != SATA_DTYPE_NONE) 4351 dev_existed_previously = 1; 4352 4353 /* PxSStatus tells the presence of device. */ 4354 READ_PMULT(&pmport_addr, SATA_PMULT_REG_SSTS, 4355 &pmport_sstatus, err); 4356 4357 if (SSTATUS_GET_DET(pmport_sstatus) == 4358 SSTATUS_DET_DEVPRE_PHYCOM) 4359 dev_exists_now = 1; 4360 4361 /* 4362 * Clear PxSERR is critical. The transition from 0 to 1 will 4363 * emit a FIS which generates an asynchronous notification 4364 * event at controller. If we fail to clear the PxSERR, the 4365 * Async Notif events will no longer be activated on this 4366 * pmport. 4367 */ 4368 WRITE_PMULT(&pmport_addr, SATA_PMULT_REG_SERR, 4369 AHCI_SERROR_CLEAR_ALL, err); 4370 4371 bzero((void *)&sdevice, sizeof (sata_device_t)); 4372 sdevice.satadev_addr.cport = ahci_ctlp-> 4373 ahcictl_port_to_cport[port]; 4374 sdevice.satadev_addr.qual = SATA_ADDR_PMPORT; 4375 sdevice.satadev_addr.pmport = (uint8_t)npmport; 4376 sdevice.satadev_state = SATA_PSTATE_PWRON; 4377 4378 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4379 "[Existence] %d -> %d", dev_existed_previously, 4380 dev_exists_now); 4381 4382 if (dev_exists_now) { 4383 if (dev_existed_previously) { 4384 /* Link (may) not change: Exist -> Exist * */ 4385 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 4386 "ahci_probe_pmult: port %d:%d " 4387 "device link lost/established", 4388 port, npmport); 4389 4390 mutex_exit(&ahci_portp->ahciport_mutex); 4391 sata_hba_event_notify( 4392 ahci_ctlp->ahcictl_sata_hba_tran-> 4393 sata_tran_hba_dip, 4394 &sdevice, 4395 SATA_EVNT_LINK_LOST| 4396 SATA_EVNT_LINK_ESTABLISHED); 4397 mutex_enter(&ahci_portp->ahciport_mutex); 4398 } else { 4399 /* Link change: None -> Exist */ 4400 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4401 "ahci_probe_pmult: port %d:%d " 4402 "device link established", port, npmport); 4403 4404 /* Clear port state */ 4405 AHCIPORT_SET_STATE(ahci_portp, &pmport_addr, 4406 SATA_STATE_UNKNOWN); 4407 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4408 "ahci_probe_pmult: port %d " 4409 "ahciport_port_state [Cleared].", port); 4410 4411 mutex_exit(&ahci_portp->ahciport_mutex); 4412 sata_hba_event_notify( 4413 ahci_ctlp->ahcictl_sata_hba_tran-> 4414 sata_tran_hba_dip, 4415 &sdevice, 4416 SATA_EVNT_LINK_ESTABLISHED); 4417 mutex_enter(&ahci_portp->ahciport_mutex); 4418 } 4419 } else { /* No device exists now */ 4420 if (dev_existed_previously) { 4421 4422 /* Link change: Exist -> None */ 4423 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4424 "ahci_probe_pmult: port %d:%d " 4425 "device link lost", port, npmport); 4426 4427 /* An existing device is lost. */ 4428 AHCIPORT_SET_STATE(ahci_portp, &pmport_addr, 4429 SATA_STATE_UNKNOWN); 4430 AHCIPORT_SET_DEV_TYPE(ahci_portp, &pmport_addr, 4431 SATA_DTYPE_NONE); 4432 4433 mutex_exit(&ahci_portp->ahciport_mutex); 4434 sata_hba_event_notify( 4435 ahci_ctlp->ahcictl_sata_hba_tran-> 4436 sata_tran_hba_dip, 4437 &sdevice, 4438 SATA_EVNT_LINK_LOST); 4439 mutex_enter(&ahci_portp->ahciport_mutex); 4440 } 4441 } 4442 4443 CLEAR_BIT(port_hotplug_tags, npmport); 4444 } while (port_hotplug_tags != 0); 4445 4446 return (AHCI_SUCCESS); 4447 4448 err: /* R/W PMULT error */ 4449 return (AHCI_FAILURE); 4450 } 4451 4452 /* 4453 * Probe and initialize a port multiplier port. 4454 * A port multiplier port could only be initilaizer here. 4455 * 4456 * WARNING!!! ahcictl_mutex should be acquired before the function 4457 * is called. 4458 */ 4459 static int 4460 ahci_probe_pmport(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4461 ahci_addr_t *addrp, sata_device_t *sd) 4462 { 4463 uint32_t port_state; 4464 uint8_t port = addrp->aa_port; 4465 ahci_addr_t addr_pmult; 4466 4467 /* 4468 * Check the parent - port multiplier first. 4469 */ 4470 4471 /* 4472 * Parent port multiplier might have been removed. This event will be 4473 * ignored and failure. 4474 */ 4475 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE || 4476 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 4477 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4478 "ahci_tran_probe_port: " 4479 "parent device removed, ignore event.", NULL); 4480 4481 return (AHCI_FAILURE); 4482 } 4483 4484 /* The port is ready? */ 4485 port_state = ahci_portp->ahciport_port_state; 4486 if (!(port_state & SATA_STATE_READY)) { 4487 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4488 "ahci_tran_probe_port: " 4489 "parent port-mult is NOT ready.", NULL); 4490 4491 if (ahci_restart_port_wait_till_ready(ahci_ctlp, 4492 ahci_portp, port, AHCI_PORT_RESET, NULL) != 4493 AHCI_SUCCESS) { 4494 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4495 "ahci_tran_probe_port: " 4496 "restart port-mult failed.", NULL); 4497 return (AHCI_FAILURE); 4498 } 4499 } 4500 4501 /* 4502 * If port-mult is restarted due to some reason, we need 4503 * re-initialized the PMult. 4504 */ 4505 if (!(port_state & SATA_DSTATE_PMULT_INIT)) { 4506 /* Initialize registers on a port multiplier */ 4507 AHCI_ADDR_SET_PMULT(&addr_pmult, addrp->aa_port); 4508 if (ahci_initialize_pmult(ahci_ctlp, ahci_portp, 4509 &addr_pmult, sd) != AHCI_SUCCESS) 4510 return (AHCI_FAILURE); 4511 } 4512 4513 /* 4514 * Then we check the port-mult port 4515 */ 4516 /* Is this pmport initialized? */ 4517 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 4518 if (!(port_state & SATA_STATE_READY)) { 4519 4520 /* ahci_initialize_pmport() will set READY state */ 4521 if (ahci_initialize_pmport(ahci_ctlp, 4522 ahci_portp, addrp) != AHCI_SUCCESS) 4523 return (AHCI_FAILURE); 4524 } 4525 4526 return (AHCI_SUCCESS); 4527 } 4528 4529 /* 4530 * AHCI device reset ...; a single device on one of the ports is reset, 4531 * but the HBA and physical communication remain intact. This is the 4532 * least intrusive. 4533 * 4534 * When issuing a software reset sequence, there should not be other 4535 * commands in the command list, so we will first clear and then re-set 4536 * PxCMD.ST to clear PxCI. And before issuing the software reset, 4537 * the port must be idle and PxTFD.STS.BSY and PxTFD.STS.DRQ must be 4538 * cleared unless command list override (PxCMD.CLO) is supported. 4539 * 4540 * WARNING!!! ahciport_mutex should be acquired and PxCMD.FRE should be 4541 * set before the function is called. 4542 */ 4543 static int 4544 ahci_software_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4545 ahci_addr_t *addrp) 4546 { 4547 ahci_fis_h2d_register_t *h2d_register_fisp; 4548 ahci_cmd_table_t *cmd_table; 4549 ahci_cmd_header_t *cmd_header; 4550 uint32_t port_cmd_status, port_cmd_issue, port_task_file; 4551 int slot, loop_count; 4552 uint8_t port = addrp->aa_port; 4553 uint8_t pmport = addrp->aa_pmport; 4554 int rval = AHCI_FAILURE; 4555 4556 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 4557 "port %d:%d device software resetting (FIS)", port, pmport); 4558 4559 /* First clear PxCMD.ST (AHCI v1.2 10.4.1) */ 4560 if (ahci_put_port_into_notrunning_state(ahci_ctlp, ahci_portp, 4561 port) != AHCI_SUCCESS) { 4562 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4563 "ahci_software_reset: cannot stop HBA port %d.", port); 4564 goto out; 4565 } 4566 4567 /* Check PxTFD.STS.BSY and PxTFD.STS.DRQ */ 4568 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4569 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 4570 4571 if (port_task_file & AHCI_TFD_STS_BSY || 4572 port_task_file & AHCI_TFD_STS_DRQ) { 4573 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_SCLO)) { 4574 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4575 "PxTFD.STS.BSY/DRQ is set (PxTFD=0x%x), " 4576 "cannot issue a software reset.", port_task_file); 4577 goto out; 4578 } 4579 4580 /* 4581 * If HBA Support CLO, as Command List Override (CAP.SCLO is 4582 * set), PxCMD.CLO bit should be set before set PxCMD.ST, in 4583 * order to clear PxTFD.STS.BSY and PxTFD.STS.DRQ. 4584 */ 4585 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4586 "PxTFD.STS.BSY/DRQ is set, try SCLO.", NULL) 4587 4588 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4589 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4590 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4591 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4592 port_cmd_status|AHCI_CMD_STATUS_CLO); 4593 4594 /* Waiting till PxCMD.SCLO bit is cleared */ 4595 loop_count = 0; 4596 do { 4597 /* Wait for 10 millisec */ 4598 drv_usecwait(AHCI_10MS_USECS); 4599 4600 /* We are effectively timing out after 1 sec. */ 4601 if (loop_count++ > 100) { 4602 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4603 "SCLO time out. port %d is busy.", port); 4604 goto out; 4605 } 4606 4607 port_cmd_status = 4608 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4609 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4610 } while (port_cmd_status & AHCI_CMD_STATUS_CLO); 4611 4612 /* Re-check */ 4613 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4614 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 4615 if (port_task_file & AHCI_TFD_STS_BSY || 4616 port_task_file & AHCI_TFD_STS_DRQ) { 4617 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4618 "SCLO cannot clear PxTFD.STS.BSY/DRQ (PxTFD=0x%x)", 4619 port_task_file); 4620 goto out; 4621 } 4622 } 4623 4624 /* Then start port */ 4625 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 4626 != AHCI_SUCCESS) { 4627 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4628 "ahci_software_reset: cannot start AHCI port %d.", port); 4629 goto out; 4630 } 4631 4632 /* 4633 * When ahci_port.ahciport_mop_in_progress is set, A non-zero 4634 * ahci_port.ahciport_pending_ncq_tags may fail 4635 * ahci_claim_free_slot(). Actually according to spec, by clearing 4636 * PxCMD.ST there is no command outstanding while executing software 4637 * reseting. Hence we directly use slot 0 instead of 4638 * ahci_claim_free_slot(). 4639 */ 4640 slot = 0; 4641 4642 /* Now send the first H2D Register FIS with SRST set to 1 */ 4643 cmd_table = ahci_portp->ahciport_cmd_tables[slot]; 4644 bzero((void *)cmd_table, ahci_cmd_table_size); 4645 4646 h2d_register_fisp = 4647 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 4648 4649 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 4650 SET_FIS_PMP(h2d_register_fisp, pmport); 4651 SET_FIS_DEVCTL(h2d_register_fisp, SATA_DEVCTL_SRST); 4652 4653 /* Set Command Header in Command List */ 4654 cmd_header = &ahci_portp->ahciport_cmd_list[slot]; 4655 BZERO_DESCR_INFO(cmd_header); 4656 BZERO_PRD_BYTE_COUNT(cmd_header); 4657 SET_COMMAND_FIS_LENGTH(cmd_header, 5); 4658 SET_PORT_MULTI_PORT(cmd_header, pmport); 4659 4660 SET_CLEAR_BUSY_UPON_R_OK(cmd_header, 1); 4661 SET_RESET(cmd_header, 1); 4662 SET_WRITE(cmd_header, 1); 4663 4664 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_tables_dma_handle[slot], 4665 0, 4666 ahci_cmd_table_size, 4667 DDI_DMA_SYNC_FORDEV); 4668 4669 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 4670 slot * sizeof (ahci_cmd_header_t), 4671 sizeof (ahci_cmd_header_t), 4672 DDI_DMA_SYNC_FORDEV); 4673 4674 /* Indicate to the HBA that a command is active. */ 4675 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4676 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 4677 (0x1 << slot)); 4678 4679 loop_count = 0; 4680 4681 /* Loop till the first command is finished */ 4682 do { 4683 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4684 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 4685 4686 /* We are effectively timing out after 1 sec. */ 4687 if (loop_count++ > AHCI_POLLRATE_PORT_SOFTRESET) { 4688 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4689 "the first SRST FIS is timed out, " 4690 "loop_count = %d", loop_count); 4691 goto out; 4692 } 4693 /* Wait for 10 millisec */ 4694 drv_usecwait(AHCI_10MS_USECS); 4695 } while (port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp) & (0x1 << slot)); 4696 4697 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 4698 "ahci_software_reset: 1st loop count: %d, " 4699 "port_cmd_issue = 0x%x, slot = 0x%x", 4700 loop_count, port_cmd_issue, slot); 4701 4702 /* According to ATA spec, we need wait at least 5 microsecs here. */ 4703 drv_usecwait(AHCI_1MS_USECS); 4704 4705 /* Now send the second H2D Register FIS with SRST cleard to zero */ 4706 cmd_table = ahci_portp->ahciport_cmd_tables[slot]; 4707 bzero((void *)cmd_table, ahci_cmd_table_size); 4708 4709 h2d_register_fisp = 4710 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 4711 4712 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 4713 SET_FIS_PMP(h2d_register_fisp, pmport); 4714 4715 /* Set Command Header in Command List */ 4716 cmd_header = &ahci_portp->ahciport_cmd_list[slot]; 4717 BZERO_DESCR_INFO(cmd_header); 4718 BZERO_PRD_BYTE_COUNT(cmd_header); 4719 SET_COMMAND_FIS_LENGTH(cmd_header, 5); 4720 SET_PORT_MULTI_PORT(cmd_header, pmport); 4721 4722 SET_WRITE(cmd_header, 1); 4723 4724 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_tables_dma_handle[slot], 4725 0, 4726 ahci_cmd_table_size, 4727 DDI_DMA_SYNC_FORDEV); 4728 4729 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 4730 slot * sizeof (ahci_cmd_header_t), 4731 sizeof (ahci_cmd_header_t), 4732 DDI_DMA_SYNC_FORDEV); 4733 4734 /* Indicate to the HBA that a command is active. */ 4735 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4736 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 4737 (0x1 << slot)); 4738 4739 loop_count = 0; 4740 4741 /* Loop till the second command is finished */ 4742 do { 4743 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4744 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 4745 4746 /* We are effectively timing out after 1 sec. */ 4747 if (loop_count++ > AHCI_POLLRATE_PORT_SOFTRESET) { 4748 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4749 "the second SRST FIS is timed out, " 4750 "loop_count = %d", loop_count); 4751 goto out; 4752 } 4753 4754 /* Wait for 10 millisec */ 4755 drv_usecwait(AHCI_10MS_USECS); 4756 } while (port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp) & (0x1 << slot)); 4757 4758 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 4759 "ahci_software_reset: 2nd loop count: %d, " 4760 "port_cmd_issue = 0x%x, slot = 0x%x", 4761 loop_count, port_cmd_issue, slot); 4762 4763 CLEAR_BIT(ahci_portp->ahciport_pending_tags, slot); 4764 4765 rval = AHCI_SUCCESS; 4766 out: 4767 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4768 "ahci_software_reset: %s at port %d:%d", 4769 rval == AHCI_SUCCESS ? "succeed" : "failed", 4770 port, pmport); 4771 4772 return (rval); 4773 } 4774 4775 /* 4776 * AHCI port reset ...; the physical communication between the HBA and device 4777 * on a port are disabled. This is more intrusive. 4778 * 4779 * When an HBA or port reset occurs, Phy communication is going to 4780 * be re-established with the device through a COMRESET followed by the 4781 * normal out-of-band communication sequence defined in Serial ATA. AT 4782 * the end of reset, the device, if working properly, will send a D2H 4783 * Register FIS, which contains the device signature. When the HBA receives 4784 * this FIS, it updates PxTFD.STS and PxTFD.ERR register fields, and updates 4785 * the PxSIG register with the signature. 4786 * 4787 * Staggered spin-up is an optional feature in SATA II, and it enables an HBA 4788 * to individually spin-up attached devices. Please refer to chapter 10.9 of 4789 * AHCI 1.0 spec. 4790 */ 4791 /* 4792 * WARNING!!! ahciport_mutex should be acquired, and PxCMD.ST should be also 4793 * cleared before the function is called. 4794 */ 4795 static int 4796 ahci_port_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4797 ahci_addr_t *addrp) 4798 { 4799 ahci_addr_t pmult_addr; 4800 uint32_t cap_status, port_cmd_status; 4801 uint32_t port_scontrol, port_sstatus, port_serror; 4802 uint32_t port_intr_status, port_task_file; 4803 uint32_t port_state; 4804 uint8_t port = addrp->aa_port; 4805 4806 int loop_count; 4807 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 4808 4809 /* Target is a port multiplier port? */ 4810 if (AHCI_ADDR_IS_PMPORT(addrp)) 4811 return (ahci_pmport_reset(ahci_ctlp, ahci_portp, addrp)); 4812 4813 /* Otherwise it must be an HBA port. */ 4814 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 4815 4816 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 4817 "Port %d port resetting...", port); 4818 ahci_portp->ahciport_port_state = 0; 4819 4820 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4821 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 4822 4823 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4824 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4825 4826 if (cap_status & AHCI_HBA_CAP_SSS) { 4827 /* 4828 * HBA support staggered spin-up, if the port has 4829 * not spin up yet, then force it to do spin-up 4830 */ 4831 if (!(port_cmd_status & AHCI_CMD_STATUS_SUD)) { 4832 if (!(ahci_portp->ahciport_flags 4833 & AHCI_PORT_FLAG_SPINUP)) { 4834 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4835 "Port %d PxCMD.SUD is zero, force " 4836 "it to do spin-up", port); 4837 ahci_portp->ahciport_flags |= 4838 AHCI_PORT_FLAG_SPINUP; 4839 } 4840 } 4841 } else { 4842 /* 4843 * HBA doesn't support stagger spin-up, force it 4844 * to do normal COMRESET 4845 */ 4846 if (ahci_portp->ahciport_flags & 4847 AHCI_PORT_FLAG_SPINUP) { 4848 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4849 "HBA does not support staggered spin-up " 4850 "force it to do normal COMRESET", NULL); 4851 ahci_portp->ahciport_flags &= 4852 ~AHCI_PORT_FLAG_SPINUP; 4853 } 4854 } 4855 4856 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_SPINUP)) { 4857 /* Do normal COMRESET */ 4858 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 4859 "ahci_port_reset: do normal COMRESET", port); 4860 4861 /* 4862 * According to the spec, SUD bit should be set here, 4863 * but JMicron JMB363 doesn't follow it, so remove 4864 * the assertion, and just print a debug message. 4865 */ 4866 #if AHCI_DEBUG 4867 if (!(port_cmd_status & AHCI_CMD_STATUS_SUD)) 4868 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4869 "port %d SUD bit not set", port) 4870 #endif 4871 4872 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4873 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 4874 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_COMRESET); 4875 4876 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4877 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 4878 port_scontrol); 4879 4880 /* Enable PxCMD.FRE to read device */ 4881 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4882 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4883 port_cmd_status|AHCI_CMD_STATUS_FRE); 4884 4885 /* 4886 * Give time for COMRESET to percolate, according to the AHCI 4887 * spec, software shall wait at least 1 millisecond before 4888 * clearing PxSCTL.DET 4889 */ 4890 drv_usecwait(AHCI_1MS_USECS*2); 4891 4892 /* Fetch the SCONTROL again and rewrite the DET part with 0 */ 4893 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4894 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 4895 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 4896 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4897 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 4898 port_scontrol); 4899 } else { 4900 /* Do staggered spin-up */ 4901 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4902 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 4903 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 4904 4905 /* PxSCTL.DET must be 0 */ 4906 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4907 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 4908 port_scontrol); 4909 4910 port_cmd_status &= ~AHCI_CMD_STATUS_SUD; 4911 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4912 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4913 port_cmd_status); 4914 4915 /* 0 -> 1 edge */ 4916 drv_usecwait(AHCI_1MS_USECS*2); 4917 4918 /* Set PxCMD.SUD to 1 */ 4919 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4920 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4921 port_cmd_status |= AHCI_CMD_STATUS_SUD; 4922 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4923 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4924 port_cmd_status); 4925 4926 /* Enable PxCMD.FRE to read device */ 4927 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4928 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4929 port_cmd_status|AHCI_CMD_STATUS_FRE); 4930 } 4931 4932 /* 4933 * The port enters P:StartComm state, and HBA tells link layer to 4934 * start communication, which involves sending COMRESET to device. 4935 * And the HBA resets PxTFD.STS to 7Fh. 4936 * 4937 * When a COMINIT is received from the device, then the port enters 4938 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets 4939 * PxSSTS.DET to 1h to indicate a device is detected but communication 4940 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate 4941 * a COMINIT has been received. 4942 */ 4943 /* 4944 * The DET field is valid only if IPM field indicates 4945 * that the interface is in active state. 4946 */ 4947 loop_count = 0; 4948 do { 4949 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4950 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 4951 4952 if (SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) { 4953 /* 4954 * If the interface is not active, the DET field 4955 * is considered not accurate. So we want to 4956 * continue looping. 4957 */ 4958 SSTATUS_SET_DET(port_sstatus, SSTATUS_DET_NODEV); 4959 } 4960 4961 if (loop_count++ > AHCI_POLLRATE_PORT_SSTATUS) { 4962 /* 4963 * We are effectively timing out after 0.1 sec. 4964 */ 4965 break; 4966 } 4967 4968 /* Wait for 10 millisec */ 4969 drv_usecwait(AHCI_10MS_USECS); 4970 } while (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM); 4971 4972 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 4973 "ahci_port_reset: 1st loop count: %d, " 4974 "port_sstatus = 0x%x port %d", 4975 loop_count, port_sstatus, port); 4976 4977 if ((SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) || 4978 (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM)) { 4979 /* 4980 * Either the port is not active or there 4981 * is no device present. 4982 */ 4983 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_NONE); 4984 return (AHCI_SUCCESS); 4985 } 4986 4987 /* Now we can make sure there is a device connected to the port */ 4988 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4989 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 4990 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4991 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 4992 4993 /* 4994 * A COMINIT signal is supposed to be received 4995 * PxSERR.DIAG.X or PxIS.PCS should be set 4996 */ 4997 if (!(port_intr_status & AHCI_INTR_STATUS_PCS) && 4998 !(port_serror & SERROR_EXCHANGED_ERR)) { 4999 cmn_err(CE_WARN, "!ahci%d: ahci_port_reset port %d " 5000 "COMINIT signal from the device not received", 5001 instance, port); 5002 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_PSTATE_FAILED); 5003 return (AHCI_FAILURE); 5004 } 5005 5006 /* 5007 * According to the spec, when PxSCTL.DET is set to 0h, upon 5008 * receiving a COMINIT from the attached device, PxTFD.STS.BSY 5009 * shall be set to '1' by the HBA. 5010 * 5011 * However, we found JMicron JMB363 doesn't follow this, so 5012 * remove this check, and just print a debug message. 5013 */ 5014 #if AHCI_DEBUG 5015 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5016 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 5017 if (!(port_task_file & AHCI_TFD_STS_BSY)) { 5018 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_port_reset: " 5019 "port %d BSY bit is not set after COMINIT signal " 5020 "is received", port); 5021 } 5022 #endif 5023 5024 /* 5025 * PxSERR.DIAG.X has to be cleared in order to update PxTFD with 5026 * the D2H FIS received by HBA. 5027 */ 5028 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5029 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5030 SERROR_EXCHANGED_ERR); 5031 5032 /* 5033 * Devices should return a FIS contains its signature to HBA after 5034 * COMINIT signal. Check whether a D2H FIS is received by polling 5035 * PxTFD.STS.ERR bit. 5036 */ 5037 loop_count = 0; 5038 do { 5039 /* Wait for 10 millisec */ 5040 drv_usecwait(AHCI_10MS_USECS); 5041 5042 if (loop_count++ > AHCI_POLLRATE_PORT_TFD_ERROR) { 5043 /* 5044 * We are effectively timing out after 11 sec. 5045 */ 5046 cmn_err(CE_WARN, "!ahci%d: ahci_port_reset port %d " 5047 "the device hardware has been initialized and " 5048 "the power-up diagnostics failed", 5049 instance, port); 5050 5051 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_port_reset: " 5052 "port %d PxTFD.STS.ERR is not set, we need another " 5053 "software reset.", port); 5054 5055 /* Clear port serror register for the port */ 5056 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5057 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5058 AHCI_SERROR_CLEAR_ALL); 5059 5060 AHCI_ADDR_SET_PMULT(&pmult_addr, port); 5061 5062 /* Try another software reset. */ 5063 if (ahci_software_reset(ahci_ctlp, ahci_portp, 5064 &pmult_addr) != AHCI_SUCCESS) { 5065 AHCIPORT_SET_STATE(ahci_portp, addrp, 5066 SATA_PSTATE_FAILED); 5067 return (AHCI_FAILURE); 5068 } 5069 break; 5070 } 5071 5072 /* Wait for 10 millisec */ 5073 drv_usecwait(AHCI_10MS_USECS); 5074 5075 /* 5076 * The Error bit '1' means COMRESET is finished successfully 5077 * The device hardware has been initialized and the power-up 5078 * diagnostics successfully completed. The device requests 5079 * that the Transport layer transmit a Register - D2H FIS to 5080 * the host. (SATA spec 11.5, v2.6) 5081 */ 5082 port_task_file = 5083 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5084 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 5085 } while (((port_task_file & AHCI_TFD_ERR_MASK) 5086 >> AHCI_TFD_ERR_SHIFT) != AHCI_TFD_ERR_SGS); 5087 5088 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 5089 "ahci_port_reset: 2nd loop count: %d, " 5090 "port_task_file = 0x%x port %d", 5091 loop_count, port_task_file, port); 5092 5093 /* Clear port serror register for the port */ 5094 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5095 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5096 AHCI_SERROR_CLEAR_ALL); 5097 5098 /* Set port as ready */ 5099 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 5100 AHCIPORT_SET_STATE(ahci_portp, addrp, port_state|SATA_STATE_READY); 5101 5102 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5103 "ahci_port_reset: succeed at port %d.", port); 5104 return (AHCI_SUCCESS); 5105 } 5106 5107 /* 5108 * COMRESET on a port multiplier port. 5109 * 5110 * NOTE: Only called in ahci_port_reset() 5111 */ 5112 static int 5113 ahci_pmport_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5114 ahci_addr_t *addrp) 5115 { 5116 uint32_t port_scontrol, port_sstatus, port_serror; 5117 uint32_t port_cmd_status, port_intr_status; 5118 uint32_t port_state; 5119 uint8_t port = addrp->aa_port; 5120 uint8_t pmport = addrp->aa_pmport; 5121 int loop_count; 5122 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 5123 5124 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 5125 "port %d:%d: pmport resetting", port, pmport); 5126 5127 /* Initialize pmport state */ 5128 AHCIPORT_SET_STATE(ahci_portp, addrp, 0); 5129 5130 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &port_scontrol, err); 5131 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_COMRESET); 5132 WRITE_PMULT(addrp, SATA_PMULT_REG_SCTL, port_scontrol, err); 5133 5134 /* PxCMD.FRE should be set before. */ 5135 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5136 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5137 ASSERT(port_cmd_status & AHCI_CMD_STATUS_FRE); 5138 if (!(port_cmd_status & AHCI_CMD_STATUS_FRE)) 5139 return (AHCI_FAILURE); 5140 5141 /* 5142 * Give time for COMRESET to percolate, according to the AHCI 5143 * spec, software shall wait at least 1 millisecond before 5144 * clearing PxSCTL.DET 5145 */ 5146 drv_usecwait(AHCI_1MS_USECS*2); 5147 5148 /* 5149 * Fetch the SCONTROL again and rewrite the DET part with 0 5150 * This will generate an Asychronous Notification events. 5151 */ 5152 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &port_scontrol, err); 5153 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 5154 WRITE_PMULT(addrp, SATA_PMULT_REG_SCTL, port_scontrol, err); 5155 5156 /* 5157 * The port enters P:StartComm state, and HBA tells link layer to 5158 * start communication, which involves sending COMRESET to device. 5159 * And the HBA resets PxTFD.STS to 7Fh. 5160 * 5161 * When a COMINIT is received from the device, then the port enters 5162 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets 5163 * PxSSTS.DET to 1h to indicate a device is detected but communication 5164 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate 5165 * a COMINIT has been received. 5166 */ 5167 /* 5168 * The DET field is valid only if IPM field indicates 5169 * that the interface is in active state. 5170 */ 5171 loop_count = 0; 5172 do { 5173 READ_PMULT(addrp, SATA_PMULT_REG_SSTS, &port_sstatus, err); 5174 5175 if (SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) { 5176 /* 5177 * If the interface is not active, the DET field 5178 * is considered not accurate. So we want to 5179 * continue looping. 5180 */ 5181 SSTATUS_SET_DET(port_sstatus, SSTATUS_DET_NODEV); 5182 } 5183 5184 if (loop_count++ > AHCI_POLLRATE_PORT_SSTATUS) { 5185 /* 5186 * We are effectively timing out after 0.1 sec. 5187 */ 5188 break; 5189 } 5190 5191 /* Wait for 10 millisec */ 5192 drv_usecwait(AHCI_10MS_USECS); 5193 5194 } while (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM); 5195 5196 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5197 "ahci_pmport_reset: 1st loop count: %d, " 5198 "port_sstatus = 0x%x port %d:%d", 5199 loop_count, port_sstatus, port, pmport); 5200 5201 if ((SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) || 5202 (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM)) { 5203 /* 5204 * Either the port is not active or there 5205 * is no device present. 5206 */ 5207 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO, ahci_ctlp, 5208 "ahci_pmport_reset: " 5209 "no device attached to port %d:%d", 5210 port, pmport); 5211 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_NONE); 5212 return (AHCI_SUCCESS); 5213 } 5214 5215 /* Now we can make sure there is a device connected to the port */ 5216 /* COMINIT signal is supposed to be received (PxSERR.DIAG.X = '1') */ 5217 READ_PMULT(addrp, SATA_PMULT_REG_SERR, &port_serror, err); 5218 5219 if (!(port_serror & (1 << 26))) { 5220 cmn_err(CE_WARN, "!ahci%d: ahci_pmport_reset: " 5221 "COMINIT signal from the device not received port %d:%d", 5222 instance, port, pmport); 5223 5224 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_PSTATE_FAILED); 5225 return (AHCI_FAILURE); 5226 } 5227 5228 /* 5229 * After clear PxSERR register, we will receive a D2H FIS. 5230 * Normally this FIS will cause a IPMS error according to AHCI spec 5231 * v1.2 because there is no command outstanding for it. So we need 5232 * to ignore this error. 5233 */ 5234 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_IGNORE_IPMS; 5235 WRITE_PMULT(addrp, SATA_PMULT_REG_SERR, AHCI_SERROR_CLEAR_ALL, err); 5236 5237 /* Now we need to check the D2H FIS by checking IPMS error. */ 5238 loop_count = 0; 5239 do { 5240 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5241 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 5242 5243 if (loop_count++ > AHCI_POLLRATE_PORT_TFD_ERROR) { 5244 /* 5245 * No D2H FIS received. This is possible according 5246 * to SATA 2.6 spec. 5247 */ 5248 cmn_err(CE_WARN, "ahci_port_reset: port %d:%d " 5249 "PxIS.IPMS is not set, we need another " 5250 "software reset.", port, pmport); 5251 5252 break; 5253 } 5254 5255 /* Wait for 10 millisec */ 5256 mutex_exit(&ahci_portp->ahciport_mutex); 5257 delay(AHCI_10MS_TICKS); 5258 mutex_enter(&ahci_portp->ahciport_mutex); 5259 5260 } while (!(port_intr_status & AHCI_INTR_STATUS_IPMS)); 5261 5262 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5263 "ahci_pmport_reset: 2st loop count: %d, " 5264 "port_sstatus = 0x%x port %d:%d", 5265 loop_count, port_sstatus, port, pmport); 5266 5267 /* Clear IPMS */ 5268 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5269 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 5270 AHCI_INTR_STATUS_IPMS); 5271 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_IGNORE_IPMS; 5272 5273 /* This pmport is now ready for ahci_tran_start() */ 5274 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 5275 AHCIPORT_SET_STATE(ahci_portp, addrp, port_state|SATA_STATE_READY); 5276 5277 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5278 "ahci_pmport_reset: succeed at port %d:%d", port, pmport); 5279 return (AHCI_SUCCESS); 5280 5281 err: /* R/W PMULT error */ 5282 /* IPMS flags might be set before. */ 5283 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_IGNORE_IPMS; 5284 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5285 "ahci_pmport_reset: failed at port %d:%d", port, pmport); 5286 5287 return (AHCI_FAILURE); 5288 } 5289 5290 /* 5291 * AHCI HBA reset ...; the entire HBA is reset, and all ports are disabled. 5292 * This is the most intrusive. 5293 * 5294 * When an HBA reset occurs, Phy communication will be re-established with 5295 * the device through a COMRESET followed by the normal out-of-band 5296 * communication sequence defined in Serial ATA. AT the end of reset, the 5297 * device, if working properly, will send a D2H Register FIS, which contains 5298 * the device signature. When the HBA receives this FIS, it updates PxTFD.STS 5299 * and PxTFD.ERR register fields, and updates the PxSIG register with the 5300 * signature. 5301 * 5302 * Remember to set GHC.AE to 1 before calling ahci_hba_reset. 5303 */ 5304 static int 5305 ahci_hba_reset(ahci_ctl_t *ahci_ctlp) 5306 { 5307 ahci_port_t *ahci_portp; 5308 ahci_addr_t addr; 5309 uint32_t ghc_control; 5310 uint8_t port; 5311 int loop_count; 5312 int rval = AHCI_SUCCESS; 5313 5314 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, "HBA resetting", 5315 NULL); 5316 5317 mutex_enter(&ahci_ctlp->ahcictl_mutex); 5318 5319 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5320 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5321 5322 /* Setting GHC.HR to 1, remember GHC.AE is already set to 1 before */ 5323 ghc_control |= AHCI_HBA_GHC_HR; 5324 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5325 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 5326 5327 /* 5328 * Wait until HBA Reset complete or timeout 5329 */ 5330 loop_count = 0; 5331 do { 5332 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5333 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5334 5335 if (loop_count++ > AHCI_POLLRATE_HBA_RESET) { 5336 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5337 "ahci hba reset is timing out, " 5338 "ghc_control = 0x%x", ghc_control); 5339 /* We are effectively timing out after 1 sec. */ 5340 break; 5341 } 5342 5343 /* Wait for 10 millisec */ 5344 drv_usecwait(AHCI_10MS_USECS); 5345 } while (ghc_control & AHCI_HBA_GHC_HR); 5346 5347 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5348 "ahci_hba_reset: 1st loop count: %d, " 5349 "ghc_control = 0x%x", loop_count, ghc_control); 5350 5351 if (ghc_control & AHCI_HBA_GHC_HR) { 5352 /* The hba is not reset for some reasons */ 5353 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5354 "hba reset failed: HBA in a hung or locked state", NULL); 5355 mutex_exit(&ahci_ctlp->ahcictl_mutex); 5356 return (AHCI_FAILURE); 5357 } 5358 5359 /* 5360 * HBA reset will clear (AHCI Spec v1.2 10.4.3) GHC.IE / GHC.AE 5361 */ 5362 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5363 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5364 ghc_control |= (AHCI_HBA_GHC_AE | AHCI_HBA_GHC_IE); 5365 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5366 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 5367 5368 mutex_exit(&ahci_ctlp->ahcictl_mutex); 5369 5370 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 5371 /* Only check implemented ports */ 5372 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 5373 continue; 5374 } 5375 5376 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 5377 mutex_enter(&ahci_portp->ahciport_mutex); 5378 5379 AHCI_ADDR_SET_PORT(&addr, port); 5380 5381 if (ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 5382 port, AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, NULL) != 5383 AHCI_SUCCESS) { 5384 rval = AHCI_FAILURE; 5385 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5386 "ahci_hba_reset: port %d failed", port); 5387 /* 5388 * Set the port state to SATA_PSTATE_FAILED if 5389 * failed to initialize it. 5390 */ 5391 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 5392 } 5393 5394 mutex_exit(&ahci_portp->ahciport_mutex); 5395 } 5396 5397 return (rval); 5398 } 5399 5400 /* 5401 * This routine is only called from AHCI_ATTACH or phyrdy change 5402 * case. It first calls software reset, then stop the port and try to 5403 * read PxSIG register to find the type of device attached to the port. 5404 * 5405 * The caller should make sure a valid device exists on specified port and 5406 * physical communication has been established so that the signature could 5407 * be retrieved by software reset. 5408 * 5409 * WARNING!!! ahciport_mutex should be acquired before the function 5410 * is called. And the port interrupt is disabled. 5411 */ 5412 static void 5413 ahci_find_dev_signature(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5414 ahci_addr_t *addrp) 5415 { 5416 ahci_addr_t dev_addr; 5417 uint32_t signature; 5418 uint8_t port = addrp->aa_port; 5419 uint8_t pmport = addrp->aa_pmport; 5420 ASSERT(AHCI_ADDR_IS_VALID(addrp)); 5421 int rval; 5422 5423 if (AHCI_ADDR_IS_PORT(addrp)) { 5424 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 5425 "ahci_find_dev_signature enter: port %d", port); 5426 5427 /* 5428 * NOTE: when the ahci address is a HBA port, we do not know 5429 * it is a device or a port multiplier that attached. we need 5430 * try a software reset at port multiplier address (0xf 5431 * pmport) 5432 */ 5433 AHCI_ADDR_SET_PMULT(&dev_addr, addrp->aa_port); 5434 } else { 5435 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 5436 "ahci_find_dev_signature enter: port %d:%d", 5437 port, pmport); 5438 dev_addr = *addrp; 5439 } 5440 5441 /* Assume it is unknown. */ 5442 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 5443 5444 /* Issue a software reset to get the signature */ 5445 rval = ahci_software_reset(ahci_ctlp, ahci_portp, &dev_addr); 5446 if (rval != AHCI_SUCCESS) { 5447 5448 /* 5449 * Try to do software reset again with pmport set with 0 if 5450 * the controller is set with AHCI_CAP_SRST_NO_HOSTPORT and 5451 * the original pmport is set with SATA_PMULT_HOSTPORT (0xf) 5452 */ 5453 if ((ahci_ctlp->ahcictl_cap & AHCI_CAP_SRST_NO_HOSTPORT) && 5454 (dev_addr.aa_pmport == SATA_PMULT_HOSTPORT)) { 5455 dev_addr.aa_pmport = 0; 5456 rval = ahci_software_reset(ahci_ctlp, ahci_portp, 5457 &dev_addr); 5458 } 5459 5460 if (rval != AHCI_SUCCESS) { 5461 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5462 "ahci_find_dev_signature: software reset failed " 5463 "at port %d:%d, cannot get signature.", 5464 port, pmport); 5465 5466 AHCIPORT_SET_STATE(ahci_portp, addrp, 5467 SATA_PSTATE_FAILED); 5468 return; 5469 } 5470 } 5471 5472 /* 5473 * ahci_software_reset has started the port, so we need manually stop 5474 * the port again. 5475 */ 5476 if (AHCI_ADDR_IS_PORT(addrp)) { 5477 if (ahci_put_port_into_notrunning_state(ahci_ctlp, 5478 ahci_portp, port) != AHCI_SUCCESS) { 5479 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5480 "ahci_find_dev_signature: cannot stop port %d.", 5481 port); 5482 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 5483 return; 5484 } 5485 } 5486 5487 /* Now we can make sure that a valid signature is received. */ 5488 signature = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5489 (uint32_t *)AHCI_PORT_PxSIG(ahci_ctlp, port)); 5490 5491 #ifdef AHCI_DEBUG 5492 if (AHCI_ADDR_IS_PMPORT(addrp)) { 5493 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 5494 "ahci_find_dev_signature: signature = 0x%x at port %d:%d", 5495 signature, port, pmport); 5496 } else { 5497 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO, ahci_ctlp, 5498 "ahci_find_dev_signature: signature = 0x%x at port %d", 5499 signature, port); 5500 } 5501 #endif 5502 5503 /* NOTE: Only support ATAPI device at controller port. */ 5504 if (signature == AHCI_SIGNATURE_ATAPI && !AHCI_ADDR_IS_PORT(addrp)) 5505 signature = SATA_DTYPE_UNKNOWN; 5506 5507 switch (signature) { 5508 5509 case AHCI_SIGNATURE_DISK: 5510 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_ATADISK); 5511 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5512 "Disk is found at port: %d", port); 5513 break; 5514 5515 case AHCI_SIGNATURE_ATAPI: 5516 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_ATAPI); 5517 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5518 "ATAPI device is found at port: %d", port); 5519 break; 5520 5521 case AHCI_SIGNATURE_PORT_MULTIPLIER: 5522 /* Port Multiplier cannot recursively attached. */ 5523 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 5524 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_PMULT); 5525 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5526 "Port Multiplier is found at port: %d", port); 5527 break; 5528 5529 default: 5530 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 5531 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5532 "Unknown device is found at port: %d", port); 5533 } 5534 } 5535 5536 /* 5537 * According to the spec, to reliably detect hot plug removals, software 5538 * must disable interface power management. Software should perform the 5539 * following initialization on a port after a device is attached: 5540 * Set PxSCTL.IPM to 3h to disable interface state transitions 5541 * Set PxCMD.ALPE to '0' to disable aggressive power management 5542 * Disable device initiated interface power management by SET FEATURE 5543 * 5544 * We can ignore the last item because by default the feature is disabled 5545 */ 5546 static void 5547 ahci_disable_interface_pm(ahci_ctl_t *ahci_ctlp, uint8_t port) 5548 { 5549 uint32_t port_scontrol, port_cmd_status; 5550 5551 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5552 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 5553 SCONTROL_SET_IPM(port_scontrol, SCONTROL_IPM_DISABLE_BOTH); 5554 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5555 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), port_scontrol); 5556 5557 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5558 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5559 port_cmd_status &= ~AHCI_CMD_STATUS_ALPE; 5560 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5561 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), port_cmd_status); 5562 } 5563 5564 /* 5565 * Start the port - set PxCMD.ST to 1, if PxCMD.FRE is not set 5566 * to 1, then set it firstly. 5567 * 5568 * Each port contains two major DMA engines. One DMA engine walks through 5569 * the command list, and is controlled by PxCMD.ST. The second DMA engine 5570 * copies received FISes into system memory, and is controlled by PxCMD.FRE. 5571 * 5572 * Software shall not set PxCMD.ST to '1' until it verifies that PxCMD.CR 5573 * is '0' and has set PxCMD.FRE is '1'. And software shall not clear 5574 * PxCMD.FRE while PxCMD.ST or PxCMD.CR is set '1'. 5575 * 5576 * Software shall not set PxCMD.ST to '1' unless a functional device is 5577 * present on the port(as determined by PxTFD.STS.BSY = '0', 5578 * PxTFD.STS.DRQ = '0', and PxSSTS.DET = 3h). 5579 * 5580 * WARNING!!! ahciport_mutex should be acquired before the function 5581 * is called. 5582 */ 5583 static int 5584 ahci_start_port(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, uint8_t port) 5585 { 5586 uint32_t port_cmd_status; 5587 5588 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_start_port: %d enter", port); 5589 5590 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED) { 5591 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port failed " 5592 "the state for port %d is 0x%x", 5593 port, ahci_portp->ahciport_port_state); 5594 return (AHCI_FAILURE); 5595 } 5596 5597 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 5598 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port failed " 5599 "no device is attached at port %d", port); 5600 return (AHCI_FAILURE); 5601 } 5602 5603 /* First to set PxCMD.FRE before setting PxCMD.ST. */ 5604 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5605 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5606 5607 if (!(port_cmd_status & AHCI_CMD_STATUS_FRE)) { 5608 port_cmd_status |= AHCI_CMD_STATUS_FRE; 5609 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5610 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5611 port_cmd_status); 5612 } 5613 5614 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5615 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5616 5617 port_cmd_status |= AHCI_CMD_STATUS_ST; 5618 5619 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5620 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5621 port_cmd_status); 5622 5623 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_STARTED; 5624 5625 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port: " 5626 "PxCMD.ST set to '1' at port %d", port); 5627 5628 return (AHCI_SUCCESS); 5629 } 5630 5631 /* 5632 * Allocate the ahci_port_t including Received FIS and Command List. 5633 * The argument - port is the physical port number, and not logical 5634 * port number seen by the SATA framework. 5635 * 5636 * WARNING!!! ahcictl_mutex should be acquired before the function 5637 * is called. 5638 */ 5639 static int 5640 ahci_alloc_port_state(ahci_ctl_t *ahci_ctlp, uint8_t port) 5641 { 5642 dev_info_t *dip = ahci_ctlp->ahcictl_dip; 5643 ahci_port_t *ahci_portp; 5644 char taskq_name[64] = "event_handle_taskq"; 5645 5646 ahci_portp = 5647 (ahci_port_t *)kmem_zalloc(sizeof (ahci_port_t), KM_SLEEP); 5648 5649 ahci_ctlp->ahcictl_ports[port] = ahci_portp; 5650 ahci_portp->ahciport_port_num = port; 5651 5652 /* Initialize the port condition variable */ 5653 cv_init(&ahci_portp->ahciport_cv, NULL, CV_DRIVER, NULL); 5654 5655 /* Initialize the port mutex */ 5656 mutex_init(&ahci_portp->ahciport_mutex, NULL, MUTEX_DRIVER, 5657 (void *)(uintptr_t)ahci_ctlp->ahcictl_intr_pri); 5658 5659 mutex_enter(&ahci_portp->ahciport_mutex); 5660 5661 /* 5662 * Allocate memory for received FIS structure and 5663 * command list for this port 5664 */ 5665 if (ahci_alloc_rcvd_fis(ahci_ctlp, ahci_portp, port) != AHCI_SUCCESS) { 5666 goto err_case1; 5667 } 5668 5669 if (ahci_alloc_cmd_list(ahci_ctlp, ahci_portp, port) != AHCI_SUCCESS) { 5670 goto err_case2; 5671 } 5672 5673 (void) snprintf(taskq_name + strlen(taskq_name), 5674 sizeof (taskq_name) - strlen(taskq_name), 5675 "_port%d", port); 5676 5677 /* Create the taskq for the port */ 5678 if ((ahci_portp->ahciport_event_taskq = ddi_taskq_create(dip, 5679 taskq_name, 2, TASKQ_DEFAULTPRI, 0)) == NULL) { 5680 cmn_err(CE_WARN, "!ahci%d: ddi_taskq_create failed for event " 5681 "handle", ddi_get_instance(ahci_ctlp->ahcictl_dip)); 5682 goto err_case3; 5683 } 5684 5685 /* Allocate the argument for the taskq */ 5686 ahci_portp->ahciport_event_args = 5687 kmem_zalloc(sizeof (ahci_event_arg_t), KM_SLEEP); 5688 5689 ahci_portp->ahciport_event_args->ahciea_addrp = 5690 kmem_zalloc(sizeof (ahci_addr_t), KM_SLEEP); 5691 5692 if (ahci_portp->ahciport_event_args == NULL) 5693 goto err_case4; 5694 5695 mutex_exit(&ahci_portp->ahciport_mutex); 5696 5697 return (AHCI_SUCCESS); 5698 5699 err_case4: 5700 ddi_taskq_destroy(ahci_portp->ahciport_event_taskq); 5701 5702 err_case3: 5703 ahci_dealloc_cmd_list(ahci_ctlp, ahci_portp); 5704 5705 err_case2: 5706 ahci_dealloc_rcvd_fis(ahci_portp); 5707 5708 err_case1: 5709 mutex_exit(&ahci_portp->ahciport_mutex); 5710 mutex_destroy(&ahci_portp->ahciport_mutex); 5711 cv_destroy(&ahci_portp->ahciport_cv); 5712 5713 kmem_free(ahci_portp, sizeof (ahci_port_t)); 5714 5715 return (AHCI_FAILURE); 5716 } 5717 5718 /* 5719 * Reverse of ahci_dealloc_port_state(). 5720 * 5721 * WARNING!!! ahcictl_mutex should be acquired before the function 5722 * is called. 5723 */ 5724 static void 5725 ahci_dealloc_port_state(ahci_ctl_t *ahci_ctlp, uint8_t port) 5726 { 5727 ahci_port_t *ahci_portp = ahci_ctlp->ahcictl_ports[port]; 5728 5729 ASSERT(ahci_portp != NULL); 5730 5731 mutex_enter(&ahci_portp->ahciport_mutex); 5732 kmem_free(ahci_portp->ahciport_event_args->ahciea_addrp, 5733 sizeof (ahci_addr_t)); 5734 ahci_portp->ahciport_event_args->ahciea_addrp = NULL; 5735 kmem_free(ahci_portp->ahciport_event_args, sizeof (ahci_event_arg_t)); 5736 ahci_portp->ahciport_event_args = NULL; 5737 ddi_taskq_destroy(ahci_portp->ahciport_event_taskq); 5738 ahci_dealloc_cmd_list(ahci_ctlp, ahci_portp); 5739 ahci_dealloc_rcvd_fis(ahci_portp); 5740 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 5741 mutex_exit(&ahci_portp->ahciport_mutex); 5742 5743 mutex_destroy(&ahci_portp->ahciport_mutex); 5744 cv_destroy(&ahci_portp->ahciport_cv); 5745 5746 kmem_free(ahci_portp, sizeof (ahci_port_t)); 5747 5748 ahci_ctlp->ahcictl_ports[port] = NULL; 5749 } 5750 5751 /* 5752 * Allocates memory for the Received FIS Structure 5753 * 5754 * WARNING!!! ahciport_mutex should be acquired before the function 5755 * is called. 5756 */ 5757 static int 5758 ahci_alloc_rcvd_fis(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5759 uint8_t port) 5760 { 5761 size_t rcvd_fis_size; 5762 size_t ret_len; 5763 uint_t cookie_count; 5764 5765 rcvd_fis_size = sizeof (ahci_rcvd_fis_t); 5766 5767 /* allocate rcvd FIS dma handle. */ 5768 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 5769 &ahci_ctlp->ahcictl_rcvd_fis_dma_attr, 5770 DDI_DMA_SLEEP, 5771 NULL, 5772 &ahci_portp->ahciport_rcvd_fis_dma_handle) != 5773 DDI_SUCCESS) { 5774 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5775 "rcvd FIS dma handle alloc failed", NULL); 5776 5777 return (AHCI_FAILURE); 5778 } 5779 5780 if (ddi_dma_mem_alloc(ahci_portp->ahciport_rcvd_fis_dma_handle, 5781 rcvd_fis_size, 5782 &accattr, 5783 DDI_DMA_CONSISTENT, 5784 DDI_DMA_SLEEP, 5785 NULL, 5786 (caddr_t *)&ahci_portp->ahciport_rcvd_fis, 5787 &ret_len, 5788 &ahci_portp->ahciport_rcvd_fis_acc_handle) != NULL) { 5789 5790 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5791 "rcvd FIS dma mem alloc fail", NULL); 5792 /* error.. free the dma handle. */ 5793 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 5794 return (AHCI_FAILURE); 5795 } 5796 5797 if (ddi_dma_addr_bind_handle(ahci_portp->ahciport_rcvd_fis_dma_handle, 5798 NULL, 5799 (caddr_t)ahci_portp->ahciport_rcvd_fis, 5800 rcvd_fis_size, 5801 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 5802 DDI_DMA_SLEEP, 5803 NULL, 5804 &ahci_portp->ahciport_rcvd_fis_dma_cookie, 5805 &cookie_count) != DDI_DMA_MAPPED) { 5806 5807 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5808 "rcvd FIS dma handle bind fail", NULL); 5809 /* error.. free the dma handle & free the memory. */ 5810 ddi_dma_mem_free(&ahci_portp->ahciport_rcvd_fis_acc_handle); 5811 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 5812 return (AHCI_FAILURE); 5813 } 5814 5815 bzero((void *)ahci_portp->ahciport_rcvd_fis, rcvd_fis_size); 5816 5817 /* Config Port Received FIS Base Address */ 5818 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 5819 (uint64_t *)AHCI_PORT_PxFB(ahci_ctlp, port), 5820 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_laddress); 5821 5822 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "64-bit, dma address: 0x%llx", 5823 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_laddress); 5824 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "32-bit, dma address: 0x%x", 5825 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_address); 5826 5827 return (AHCI_SUCCESS); 5828 } 5829 5830 /* 5831 * Deallocates the Received FIS Structure 5832 * 5833 * WARNING!!! ahciport_mutex should be acquired before the function 5834 * is called. 5835 */ 5836 static void 5837 ahci_dealloc_rcvd_fis(ahci_port_t *ahci_portp) 5838 { 5839 /* Unbind the cmd list dma handle first. */ 5840 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_rcvd_fis_dma_handle); 5841 5842 /* Then free the underlying memory. */ 5843 ddi_dma_mem_free(&ahci_portp->ahciport_rcvd_fis_acc_handle); 5844 5845 /* Now free the handle itself. */ 5846 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 5847 } 5848 5849 /* 5850 * Allocates memory for the Command List, which contains up to 32 entries. 5851 * Each entry contains a command header, which is a 32-byte structure that 5852 * includes the pointer to the command table. 5853 * 5854 * WARNING!!! ahciport_mutex should be acquired before the function 5855 * is called. 5856 */ 5857 static int 5858 ahci_alloc_cmd_list(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5859 uint8_t port) 5860 { 5861 size_t cmd_list_size; 5862 size_t ret_len; 5863 uint_t cookie_count; 5864 5865 cmd_list_size = 5866 ahci_ctlp->ahcictl_num_cmd_slots * sizeof (ahci_cmd_header_t); 5867 5868 /* allocate cmd list dma handle. */ 5869 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 5870 &ahci_ctlp->ahcictl_cmd_list_dma_attr, 5871 DDI_DMA_SLEEP, 5872 NULL, 5873 &ahci_portp->ahciport_cmd_list_dma_handle) != DDI_SUCCESS) { 5874 5875 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5876 "cmd list dma handle alloc failed", NULL); 5877 return (AHCI_FAILURE); 5878 } 5879 5880 if (ddi_dma_mem_alloc(ahci_portp->ahciport_cmd_list_dma_handle, 5881 cmd_list_size, 5882 &accattr, 5883 DDI_DMA_CONSISTENT, 5884 DDI_DMA_SLEEP, 5885 NULL, 5886 (caddr_t *)&ahci_portp->ahciport_cmd_list, 5887 &ret_len, 5888 &ahci_portp->ahciport_cmd_list_acc_handle) != NULL) { 5889 5890 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5891 "cmd list dma mem alloc fail", NULL); 5892 /* error.. free the dma handle. */ 5893 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 5894 return (AHCI_FAILURE); 5895 } 5896 5897 if (ddi_dma_addr_bind_handle(ahci_portp->ahciport_cmd_list_dma_handle, 5898 NULL, 5899 (caddr_t)ahci_portp->ahciport_cmd_list, 5900 cmd_list_size, 5901 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 5902 DDI_DMA_SLEEP, 5903 NULL, 5904 &ahci_portp->ahciport_cmd_list_dma_cookie, 5905 &cookie_count) != DDI_DMA_MAPPED) { 5906 5907 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5908 "cmd list dma handle bind fail", NULL); 5909 /* error.. free the dma handle & free the memory. */ 5910 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 5911 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 5912 return (AHCI_FAILURE); 5913 } 5914 5915 bzero((void *)ahci_portp->ahciport_cmd_list, cmd_list_size); 5916 5917 /* Config Port Command List Base Address */ 5918 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 5919 (uint64_t *)AHCI_PORT_PxCLB(ahci_ctlp, port), 5920 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_laddress); 5921 5922 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "64-bit, dma address: 0x%llx", 5923 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_laddress); 5924 5925 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "32-bit, dma address: 0x%x", 5926 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_address); 5927 5928 if (ahci_alloc_cmd_tables(ahci_ctlp, ahci_portp) != AHCI_SUCCESS) { 5929 goto err_out; 5930 } 5931 5932 return (AHCI_SUCCESS); 5933 5934 err_out: 5935 /* Unbind the cmd list dma handle first. */ 5936 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_cmd_list_dma_handle); 5937 5938 /* Then free the underlying memory. */ 5939 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 5940 5941 /* Now free the handle itself. */ 5942 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 5943 5944 return (AHCI_FAILURE); 5945 } 5946 5947 /* 5948 * Deallocates the Command List 5949 * 5950 * WARNING!!! ahciport_mutex should be acquired before the function 5951 * is called. 5952 */ 5953 static void 5954 ahci_dealloc_cmd_list(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 5955 { 5956 /* First dealloc command table */ 5957 ahci_dealloc_cmd_tables(ahci_ctlp, ahci_portp); 5958 5959 /* Unbind the cmd list dma handle first. */ 5960 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_cmd_list_dma_handle); 5961 5962 /* Then free the underlying memory. */ 5963 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 5964 5965 /* Now free the handle itself. */ 5966 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 5967 } 5968 5969 /* 5970 * Allocates memory for all Command Tables, which contains Command FIS, 5971 * ATAPI Command and Physical Region Descriptor Table. 5972 * 5973 * WARNING!!! ahciport_mutex should be acquired before the function 5974 * is called. 5975 */ 5976 static int 5977 ahci_alloc_cmd_tables(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 5978 { 5979 size_t ret_len; 5980 ddi_dma_cookie_t cmd_table_dma_cookie; 5981 uint_t cookie_count; 5982 int slot; 5983 5984 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 5985 "ahci_alloc_cmd_tables: port %d enter", 5986 ahci_portp->ahciport_port_num); 5987 5988 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; slot++) { 5989 /* Allocate cmd table dma handle. */ 5990 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 5991 &ahci_ctlp->ahcictl_cmd_table_dma_attr, 5992 DDI_DMA_SLEEP, 5993 NULL, 5994 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]) != 5995 DDI_SUCCESS) { 5996 5997 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5998 "cmd table dma handle alloc failed", NULL); 5999 6000 goto err_out; 6001 } 6002 6003 if (ddi_dma_mem_alloc( 6004 ahci_portp->ahciport_cmd_tables_dma_handle[slot], 6005 ahci_cmd_table_size, 6006 &accattr, 6007 DDI_DMA_CONSISTENT, 6008 DDI_DMA_SLEEP, 6009 NULL, 6010 (caddr_t *)&ahci_portp->ahciport_cmd_tables[slot], 6011 &ret_len, 6012 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]) != 6013 NULL) { 6014 6015 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6016 "cmd table dma mem alloc fail", NULL); 6017 6018 /* error.. free the dma handle. */ 6019 ddi_dma_free_handle( 6020 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6021 goto err_out; 6022 } 6023 6024 if (ddi_dma_addr_bind_handle( 6025 ahci_portp->ahciport_cmd_tables_dma_handle[slot], 6026 NULL, 6027 (caddr_t)ahci_portp->ahciport_cmd_tables[slot], 6028 ahci_cmd_table_size, 6029 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 6030 DDI_DMA_SLEEP, 6031 NULL, 6032 &cmd_table_dma_cookie, 6033 &cookie_count) != DDI_DMA_MAPPED) { 6034 6035 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6036 "cmd table dma handle bind fail", NULL); 6037 /* error.. free the dma handle & free the memory. */ 6038 ddi_dma_mem_free( 6039 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6040 ddi_dma_free_handle( 6041 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6042 goto err_out; 6043 } 6044 6045 bzero((void *)ahci_portp->ahciport_cmd_tables[slot], 6046 ahci_cmd_table_size); 6047 6048 /* Config Port Command Table Base Address */ 6049 SET_COMMAND_TABLE_BASE_ADDR( 6050 (&ahci_portp->ahciport_cmd_list[slot]), 6051 cmd_table_dma_cookie.dmac_laddress & 0xffffffffull); 6052 6053 #ifndef __lock_lint 6054 SET_COMMAND_TABLE_BASE_ADDR_UPPER( 6055 (&ahci_portp->ahciport_cmd_list[slot]), 6056 cmd_table_dma_cookie.dmac_laddress >> 32); 6057 #endif 6058 } 6059 6060 return (AHCI_SUCCESS); 6061 err_out: 6062 6063 for (slot--; slot >= 0; slot--) { 6064 /* Unbind the cmd table dma handle first */ 6065 (void) ddi_dma_unbind_handle( 6066 ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6067 6068 /* Then free the underlying memory */ 6069 ddi_dma_mem_free( 6070 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6071 6072 /* Now free the handle itself */ 6073 ddi_dma_free_handle( 6074 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6075 } 6076 6077 return (AHCI_FAILURE); 6078 } 6079 6080 /* 6081 * Deallocates memory for all Command Tables. 6082 * 6083 * WARNING!!! ahciport_mutex should be acquired before the function 6084 * is called. 6085 */ 6086 static void 6087 ahci_dealloc_cmd_tables(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 6088 { 6089 int slot; 6090 6091 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 6092 "ahci_dealloc_cmd_tables: %d enter", 6093 ahci_portp->ahciport_port_num); 6094 6095 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; slot++) { 6096 /* Unbind the cmd table dma handle first. */ 6097 (void) ddi_dma_unbind_handle( 6098 ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6099 6100 /* Then free the underlying memory. */ 6101 ddi_dma_mem_free( 6102 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6103 6104 /* Now free the handle itself. */ 6105 ddi_dma_free_handle( 6106 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6107 } 6108 } 6109 6110 /* 6111 * Update SATA registers at controller ports 6112 * 6113 * WARNING!!! ahciport_mutex should be acquired before those functions 6114 * get called. 6115 */ 6116 static void 6117 ahci_update_sata_registers(ahci_ctl_t *ahci_ctlp, uint8_t port, 6118 sata_device_t *sd) 6119 { 6120 sd->satadev_scr.sstatus = 6121 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6122 (uint32_t *)(AHCI_PORT_PxSSTS(ahci_ctlp, port))); 6123 sd->satadev_scr.serror = 6124 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6125 (uint32_t *)(AHCI_PORT_PxSERR(ahci_ctlp, port))); 6126 sd->satadev_scr.scontrol = 6127 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6128 (uint32_t *)(AHCI_PORT_PxSCTL(ahci_ctlp, port))); 6129 sd->satadev_scr.sactive = 6130 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6131 (uint32_t *)(AHCI_PORT_PxSACT(ahci_ctlp, port))); 6132 } 6133 6134 /* 6135 * For poll mode, ahci_port_intr will be called to emulate the interrupt 6136 */ 6137 static void 6138 ahci_port_intr(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, uint8_t port) 6139 { 6140 uint32_t port_intr_status; 6141 uint32_t port_intr_enable; 6142 6143 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6144 "ahci_port_intr enter: port %d", port); 6145 6146 mutex_enter(&ahci_portp->ahciport_mutex); 6147 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_POLLING) { 6148 /* For SATA_OPMODE_POLLING commands */ 6149 port_intr_enable = 6150 (AHCI_INTR_STATUS_DHRS | 6151 AHCI_INTR_STATUS_PSS | 6152 AHCI_INTR_STATUS_SDBS | 6153 AHCI_INTR_STATUS_UFS | 6154 AHCI_INTR_STATUS_PCS | 6155 AHCI_INTR_STATUS_PRCS | 6156 AHCI_INTR_STATUS_OFS | 6157 AHCI_INTR_STATUS_INFS | 6158 AHCI_INTR_STATUS_IFS | 6159 AHCI_INTR_STATUS_HBDS | 6160 AHCI_INTR_STATUS_HBFS | 6161 AHCI_INTR_STATUS_TFES); 6162 } else { 6163 /* 6164 * port_intr_enable indicates that the corresponding interrrupt 6165 * reporting is enabled. 6166 */ 6167 port_intr_enable = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6168 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port)); 6169 } 6170 6171 /* IPMS error in port reset should be ignored according AHCI spec. */ 6172 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_IGNORE_IPMS)) 6173 port_intr_enable |= AHCI_INTR_STATUS_IPMS; 6174 mutex_exit(&ahci_portp->ahciport_mutex); 6175 6176 /* 6177 * port_intr_stats indicates that the corresponding interrupt 6178 * condition is active. 6179 */ 6180 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6181 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 6182 6183 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6184 "ahci_port_intr: port %d, port_intr_status = 0x%x, " 6185 "port_intr_enable = 0x%x", 6186 port, port_intr_status, port_intr_enable); 6187 6188 port_intr_status &= port_intr_enable; 6189 6190 /* First clear the port interrupts status */ 6191 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6192 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 6193 port_intr_status); 6194 6195 /* Check the completed non-queued commands */ 6196 if (port_intr_status & (AHCI_INTR_STATUS_DHRS | 6197 AHCI_INTR_STATUS_PSS)) { 6198 (void) ahci_intr_cmd_cmplt(ahci_ctlp, 6199 ahci_portp, port); 6200 } 6201 6202 /* Check the completed queued commands */ 6203 if (port_intr_status & AHCI_INTR_STATUS_SDBS) { 6204 (void) ahci_intr_set_device_bits(ahci_ctlp, 6205 ahci_portp, port); 6206 } 6207 6208 /* Check the port connect change status interrupt bit */ 6209 if (port_intr_status & AHCI_INTR_STATUS_PCS) { 6210 (void) ahci_intr_port_connect_change(ahci_ctlp, 6211 ahci_portp, port); 6212 } 6213 6214 /* Check the device mechanical presence status interrupt bit */ 6215 if (port_intr_status & AHCI_INTR_STATUS_DMPS) { 6216 (void) ahci_intr_device_mechanical_presence_status( 6217 ahci_ctlp, ahci_portp, port); 6218 } 6219 6220 /* Check the PhyRdy change status interrupt bit */ 6221 if (port_intr_status & AHCI_INTR_STATUS_PRCS) { 6222 (void) ahci_intr_phyrdy_change(ahci_ctlp, ahci_portp, 6223 port); 6224 } 6225 6226 /* 6227 * Check the non-fatal error interrupt bits, there are four 6228 * kinds of non-fatal errors at the time being: 6229 * 6230 * PxIS.UFS - Unknown FIS Error 6231 * PxIS.OFS - Overflow Error 6232 * PxIS.INFS - Interface Non-Fatal Error 6233 * PxIS.IPMS - Incorrect Port Multiplier Status Error 6234 * 6235 * For these non-fatal errors, the HBA can continue to operate, 6236 * so the driver just log the error messages. 6237 */ 6238 if (port_intr_status & (AHCI_INTR_STATUS_UFS | 6239 AHCI_INTR_STATUS_OFS | 6240 AHCI_INTR_STATUS_IPMS | 6241 AHCI_INTR_STATUS_INFS)) { 6242 (void) ahci_intr_non_fatal_error(ahci_ctlp, ahci_portp, 6243 port, port_intr_status); 6244 } 6245 6246 /* 6247 * Check the fatal error interrupt bits, there are four kinds 6248 * of fatal errors for AHCI controllers: 6249 * 6250 * PxIS.HBFS - Host Bus Fatal Error 6251 * PxIS.HBDS - Host Bus Data Error 6252 * PxIS.IFS - Interface Fatal Error 6253 * PxIS.TFES - Task File Error 6254 * 6255 * The fatal error means the HBA can not recover from it by 6256 * itself, and it will try to abort the transfer, and the software 6257 * must intervene to restart the port. 6258 */ 6259 if (port_intr_status & (AHCI_INTR_STATUS_IFS | 6260 AHCI_INTR_STATUS_HBDS | 6261 AHCI_INTR_STATUS_HBFS | 6262 AHCI_INTR_STATUS_TFES)) 6263 (void) ahci_intr_fatal_error(ahci_ctlp, ahci_portp, 6264 port, port_intr_status); 6265 6266 /* Check the cold port detect interrupt bit */ 6267 if (port_intr_status & AHCI_INTR_STATUS_CPDS) { 6268 (void) ahci_intr_cold_port_detect(ahci_ctlp, ahci_portp, port); 6269 } 6270 6271 /* Second clear the corresponding bit in IS.IPS */ 6272 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6273 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp), (0x1 << port)); 6274 } 6275 6276 /* 6277 * Interrupt service handler 6278 */ 6279 static uint_t 6280 ahci_intr(caddr_t arg1, caddr_t arg2) 6281 { 6282 #ifndef __lock_lint 6283 _NOTE(ARGUNUSED(arg2)) 6284 #endif 6285 /* LINTED */ 6286 ahci_ctl_t *ahci_ctlp = (ahci_ctl_t *)arg1; 6287 ahci_port_t *ahci_portp; 6288 int32_t global_intr_status; 6289 uint8_t port; 6290 6291 /* 6292 * global_intr_status indicates that the corresponding port has 6293 * an interrupt pending. 6294 */ 6295 global_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6296 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp)); 6297 6298 if (!(global_intr_status & ahci_ctlp->ahcictl_ports_implemented)) { 6299 /* The interrupt is not ours */ 6300 return (DDI_INTR_UNCLAIMED); 6301 } 6302 6303 /* Loop for all the ports */ 6304 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 6305 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 6306 continue; 6307 } 6308 if (!((0x1 << port) & global_intr_status)) { 6309 continue; 6310 } 6311 6312 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 6313 6314 /* Call ahci_port_intr */ 6315 ahci_port_intr(ahci_ctlp, ahci_portp, port); 6316 } 6317 6318 return (DDI_INTR_CLAIMED); 6319 } 6320 6321 /* 6322 * For non-queued commands, when the corresponding bit in the PxCI register 6323 * is cleared, it means the command is completed successfully. And according 6324 * to the HBA state machine, there are three conditions which possibly will 6325 * try to clear the PxCI register bit. 6326 * 1. Receive one D2H Register FIS which is with 'I' bit set 6327 * 2. Update PIO Setup FIS 6328 * 3. Transmit a command and receive R_OK if CTBA.C is set (software reset) 6329 * 6330 * Process completed non-queued commands when the interrupt status bit - 6331 * AHCI_INTR_STATUS_DHRS or AHCI_INTR_STATUS_PSS is set. 6332 * 6333 * AHCI_INTR_STATUS_DHRS means a D2H Register FIS has been received 6334 * with the 'I' bit set. And the following commands will send thus 6335 * FIS with 'I' bit set upon the successful completion: 6336 * 1. Non-data commands 6337 * 2. DMA data-in command 6338 * 3. DMA data-out command 6339 * 4. PIO data-out command 6340 * 5. PACKET non-data commands 6341 * 6. PACKET PIO data-in command 6342 * 7. PACKET PIO data-out command 6343 * 8. PACKET DMA data-in command 6344 * 9. PACKET DMA data-out command 6345 * 6346 * AHCI_INTR_STATUS_PSS means a PIO Setup FIS has been received 6347 * with the 'I' bit set. And the following commands will send this 6348 * FIS upon the successful completion: 6349 * 1. PIO data-in command 6350 */ 6351 static int 6352 ahci_intr_cmd_cmplt(ahci_ctl_t *ahci_ctlp, 6353 ahci_port_t *ahci_portp, uint8_t port) 6354 { 6355 uint32_t port_cmd_issue = 0; 6356 uint32_t finished_tags; 6357 int finished_slot; 6358 sata_pkt_t *satapkt; 6359 ahci_fis_d2h_register_t *rcvd_fisp; 6360 #if AHCI_DEBUG 6361 ahci_cmd_header_t *cmd_header; 6362 uint32_t cmd_dmacount; 6363 #endif 6364 6365 mutex_enter(&ahci_portp->ahciport_mutex); 6366 6367 if (!ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 6368 !RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) && 6369 !NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 6370 /* 6371 * Spurious interrupt. Nothing to be done. 6372 */ 6373 mutex_exit(&ahci_portp->ahciport_mutex); 6374 return (AHCI_SUCCESS); 6375 } 6376 6377 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6378 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 6379 6380 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 6381 /* Slot 0 is always used during error recovery */ 6382 finished_tags = 0x1 & ~port_cmd_issue; 6383 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 6384 "ahci_intr_cmd_cmplt: port %d the sata pkt for error " 6385 "retrieval is finished, and finished_tags = 0x%x", 6386 port, finished_tags); 6387 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 6388 finished_tags = 0x1 & ~port_cmd_issue; 6389 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 6390 "ahci_intr_cmd_cmplt: port %d the sata pkt for r/w " 6391 "port multiplier is finished, and finished_tags = 0x%x", 6392 port, finished_tags); 6393 6394 } else { 6395 6396 finished_tags = ahci_portp->ahciport_pending_tags & 6397 ~port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp); 6398 } 6399 6400 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6401 "ahci_intr_cmd_cmplt: pending_tags = 0x%x, " 6402 "port_cmd_issue = 0x%x finished_tags = 0x%x", 6403 ahci_portp->ahciport_pending_tags, port_cmd_issue, 6404 finished_tags); 6405 6406 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 6407 (finished_tags == 0x1)) { 6408 satapkt = ahci_portp->ahciport_err_retri_pkt; 6409 ASSERT(satapkt != NULL); 6410 6411 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6412 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6413 "with SATA_PKT_COMPLETED", (void *)satapkt); 6414 6415 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6416 goto out; 6417 } 6418 6419 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) && 6420 (finished_tags == 0x1)) { 6421 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 6422 ASSERT(satapkt != NULL); 6423 6424 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6425 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6426 "with SATA_PKT_COMPLETED", (void *)satapkt); 6427 6428 /* READ PORTMULT need copy out FIS content. */ 6429 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 6430 rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 6431 ahcirf_d2h_register_fis); 6432 satapkt->satapkt_cmd.satacmd_status_reg = 6433 GET_RFIS_STATUS(rcvd_fisp); 6434 ahci_copy_out_regs(&satapkt->satapkt_cmd, rcvd_fisp); 6435 } 6436 6437 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6438 goto out; 6439 } 6440 6441 while (finished_tags) { 6442 finished_slot = ddi_ffs(finished_tags) - 1; 6443 if (finished_slot == -1) { 6444 goto out; 6445 } 6446 6447 satapkt = ahci_portp->ahciport_slot_pkts[finished_slot]; 6448 ASSERT(satapkt != NULL); 6449 #if AHCI_DEBUG 6450 /* 6451 * For non-native queued commands, the PRD byte count field 6452 * shall contain an accurate count of the number of bytes 6453 * transferred for the command before the PxCI bit is cleared 6454 * to '0' for the command. 6455 * 6456 * The purpose of this field is to let software know how many 6457 * bytes transferred for a given operation in order to 6458 * determine if underflow occurred. When issuing native command 6459 * queuing commands, this field should not be used and is not 6460 * required to be valid since in this case underflow is always 6461 * illegal. 6462 * 6463 * For data reads, the HBA will update its PRD byte count with 6464 * the total number of bytes received from the last FIS, and 6465 * may be able to continue normally. For data writes, the 6466 * device will detect an error, and HBA most likely will get 6467 * a fatal error. 6468 * 6469 * Therefore, here just put code to debug part. And please 6470 * refer to the comment above ahci_intr_fatal_error for the 6471 * definition of underflow error. 6472 */ 6473 cmd_dmacount = 6474 ahci_portp->ahciport_prd_bytecounts[finished_slot]; 6475 if (cmd_dmacount) { 6476 cmd_header = 6477 &ahci_portp->ahciport_cmd_list[finished_slot]; 6478 AHCIDBG(AHCIDBG_INTR|AHCIDBG_PRDT, ahci_ctlp, 6479 "ahci_intr_cmd_cmplt: port %d, " 6480 "PRD Byte Count = 0x%x, " 6481 "ahciport_prd_bytecounts = 0x%x", port, 6482 cmd_header->ahcich_prd_byte_count, 6483 cmd_dmacount); 6484 6485 if (cmd_header->ahcich_prd_byte_count != cmd_dmacount) { 6486 AHCIDBG(AHCIDBG_UNDERFLOW, ahci_ctlp, 6487 "ahci_intr_cmd_cmplt: port %d, " 6488 "an underflow occurred", port); 6489 } 6490 } 6491 #endif 6492 6493 /* 6494 * For SATAC_SMART command with SATA_SMART_RETURN_STATUS 6495 * feature, sata_special_regs flag will be set, and the 6496 * driver should copy the status and the other corresponding 6497 * register values in the D2H Register FIS received (It's 6498 * working on Non-data protocol) from the device back to 6499 * the sata_cmd. 6500 * 6501 * For every AHCI port, there is only one Received FIS 6502 * structure, which contains the FISes received from the 6503 * device, So we're trying to copy the content of D2H 6504 * Register FIS in the Received FIS structure back to 6505 * the sata_cmd. 6506 */ 6507 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 6508 rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 6509 ahcirf_d2h_register_fis); 6510 satapkt->satapkt_cmd.satacmd_status_reg = 6511 GET_RFIS_STATUS(rcvd_fisp); 6512 ahci_copy_out_regs(&satapkt->satapkt_cmd, rcvd_fisp); 6513 } 6514 6515 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6516 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6517 "with SATA_PKT_COMPLETED", (void *)satapkt); 6518 6519 CLEAR_BIT(ahci_portp->ahciport_pending_tags, finished_slot); 6520 CLEAR_BIT(finished_tags, finished_slot); 6521 ahci_portp->ahciport_slot_pkts[finished_slot] = NULL; 6522 6523 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6524 } 6525 out: 6526 AHCIDBG(AHCIDBG_PKTCOMP, ahci_ctlp, 6527 "ahci_intr_cmd_cmplt: pending_tags = 0x%x", 6528 ahci_portp->ahciport_pending_tags); 6529 6530 mutex_exit(&ahci_portp->ahciport_mutex); 6531 6532 return (AHCI_SUCCESS); 6533 } 6534 6535 /* 6536 * AHCI_INTR_STATUS_SDBS means a Set Device Bits FIS has been received 6537 * with the 'I' bit set and has been copied into system memory. It will 6538 * be sent under the following situations: 6539 * 6540 * 1. NCQ command is completed 6541 * 6542 * The completion of NCQ commands (READ/WRITE FPDMA QUEUED) is performed 6543 * via the Set Device Bits FIS. When such event is generated, the software 6544 * needs to read PxSACT register and compares the current value to the 6545 * list of commands previously issue by software. ahciport_pending_ncq_tags 6546 * keeps the tags of previously issued commands. 6547 * 6548 * 2. Asynchronous Notification 6549 * 6550 * Asynchronous Notification is a feature in SATA spec 2.6. 6551 * 6552 * 1) ATAPI device will send a signal to the host when media is inserted or 6553 * removed and avoids polling the device for media changes. The signal 6554 * sent to the host is a Set Device Bits FIS with the 'I' and 'N' bits 6555 * set to '1'. At the moment, it's not supported yet. 6556 * 6557 * 2) Port multiplier will send a signal to the host when a hot plug event 6558 * has occured on a port multiplier port. It is used when command based 6559 * switching is employed. This is handled by ahci_intr_pmult_sntf_events() 6560 */ 6561 static int 6562 ahci_intr_set_device_bits(ahci_ctl_t *ahci_ctlp, 6563 ahci_port_t *ahci_portp, uint8_t port) 6564 { 6565 ahci_addr_t addr; 6566 6567 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 6568 "ahci_intr_set_device_bits enter: port %d", port); 6569 6570 /* Initialize HBA port address */ 6571 AHCI_ADDR_SET_PORT(&addr, port); 6572 6573 /* NCQ plug handler */ 6574 (void) ahci_intr_ncq_events(ahci_ctlp, ahci_portp, &addr); 6575 6576 /* Check port multiplier's asynchronous notification events */ 6577 if (ahci_ctlp->ahcictl_cap & AHCI_CAP_SNTF) { 6578 (void) ahci_intr_pmult_sntf_events(ahci_ctlp, 6579 ahci_portp, port); 6580 } 6581 6582 /* ATAPI events is not supported yet */ 6583 6584 return (AHCI_SUCCESS); 6585 } 6586 /* 6587 * NCQ interrupt handler. Called upon a NCQ command is completed. 6588 * Only be called from ahci_intr_set_device_bits(). 6589 * 6590 * WARNING!!! ahciport_mutex should be acquired before the function is 6591 * called. 6592 */ 6593 static int 6594 ahci_intr_ncq_events(ahci_ctl_t *ahci_ctlp, 6595 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 6596 { 6597 uint32_t port_sactive; 6598 uint32_t port_cmd_issue; 6599 uint32_t issued_tags; 6600 int issued_slot; 6601 uint32_t finished_tags; 6602 int finished_slot; 6603 uint8_t port = addrp->aa_port; 6604 sata_pkt_t *satapkt; 6605 6606 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6607 "ahci_intr_set_device_bits enter: port %d", port); 6608 6609 mutex_enter(&ahci_portp->ahciport_mutex); 6610 if (!NCQ_CMD_IN_PROGRESS(ahci_portp)) { 6611 mutex_exit(&ahci_portp->ahciport_mutex); 6612 return (AHCI_SUCCESS); 6613 } 6614 6615 /* 6616 * First the handler got which commands are finished by checking 6617 * PxSACT register 6618 */ 6619 port_sactive = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6620 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 6621 6622 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 6623 ~port_sactive & AHCI_NCQ_SLOT_MASK(ahci_portp); 6624 6625 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6626 "ahci_intr_set_device_bits: port %d pending_ncq_tags = 0x%x " 6627 "port_sactive = 0x%x", port, 6628 ahci_portp->ahciport_pending_ncq_tags, port_sactive); 6629 6630 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6631 "ahci_intr_set_device_bits: finished_tags = 0x%x", finished_tags); 6632 6633 /* 6634 * For NCQ commands, the software can determine which command has 6635 * already been transmitted to the device by checking PxCI register. 6636 */ 6637 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6638 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 6639 6640 issued_tags = ahci_portp->ahciport_pending_tags & 6641 ~port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp); 6642 6643 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6644 "ahci_intr_set_device_bits: port %d pending_tags = 0x%x " 6645 "port_cmd_issue = 0x%x", port, 6646 ahci_portp->ahciport_pending_tags, port_cmd_issue); 6647 6648 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6649 "ahci_intr_set_device_bits: issued_tags = 0x%x", issued_tags); 6650 6651 /* 6652 * Clear ahciport_pending_tags bit when the corresponding command 6653 * is already sent down to the device. 6654 */ 6655 while (issued_tags) { 6656 issued_slot = ddi_ffs(issued_tags) - 1; 6657 if (issued_slot == -1) { 6658 goto next; 6659 } 6660 CLEAR_BIT(ahci_portp->ahciport_pending_tags, issued_slot); 6661 CLEAR_BIT(issued_tags, issued_slot); 6662 } 6663 6664 next: 6665 while (finished_tags) { 6666 finished_slot = ddi_ffs(finished_tags) - 1; 6667 if (finished_slot == -1) { 6668 goto out; 6669 } 6670 6671 /* The command is certainly transmitted to the device */ 6672 ASSERT(!(ahci_portp->ahciport_pending_tags & 6673 (0x1 << finished_slot))); 6674 6675 satapkt = ahci_portp->ahciport_slot_pkts[finished_slot]; 6676 ASSERT(satapkt != NULL); 6677 6678 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 6679 "ahci_intr_set_device_bits: sending up pkt 0x%p " 6680 "with SATA_PKT_COMPLETED", (void *)satapkt); 6681 6682 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, finished_slot); 6683 CLEAR_BIT(finished_tags, finished_slot); 6684 ahci_portp->ahciport_slot_pkts[finished_slot] = NULL; 6685 6686 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6687 } 6688 out: 6689 AHCIDBG(AHCIDBG_PKTCOMP|AHCIDBG_NCQ, ahci_ctlp, 6690 "ahci_intr_set_device_bits: port %d " 6691 "pending_ncq_tags = 0x%x pending_tags = 0x%x", 6692 port, ahci_portp->ahciport_pending_ncq_tags, 6693 ahci_portp->ahciport_pending_tags); 6694 6695 mutex_exit(&ahci_portp->ahciport_mutex); 6696 6697 return (AHCI_SUCCESS); 6698 } 6699 6700 /* 6701 * Port multiplier asynchronous notification event handler. Called upon a 6702 * device is hot plugged/pulled. 6703 * 6704 * The async-notification event will only be recorded by ahcipmi_snotif_tags 6705 * here and will be handled by ahci_probe_pmult(). 6706 * 6707 * NOTE: called only from ahci_port_intr(). 6708 */ 6709 static int 6710 ahci_intr_pmult_sntf_events(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 6711 uint8_t port) 6712 { 6713 sata_device_t sdevice; 6714 6715 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 6716 "ahci_intr_pmult_sntf_events enter: port %d ", port); 6717 6718 /* no hot-plug while attaching process */ 6719 mutex_enter(&ahci_ctlp->ahcictl_mutex); 6720 if (ahci_ctlp->ahcictl_flags & AHCI_ATTACH) { 6721 mutex_exit(&ahci_ctlp->ahcictl_mutex); 6722 return (AHCI_SUCCESS); 6723 } 6724 mutex_exit(&ahci_ctlp->ahcictl_mutex); 6725 6726 mutex_enter(&ahci_portp->ahciport_mutex); 6727 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 6728 mutex_exit(&ahci_portp->ahciport_mutex); 6729 return (AHCI_SUCCESS); 6730 } 6731 6732 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 6733 6734 ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags = 6735 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6736 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port)); 6737 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6738 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 6739 AHCI_SNOTIF_CLEAR_ALL); 6740 6741 if (ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags == 0) { 6742 mutex_exit(&ahci_portp->ahciport_mutex); 6743 return (AHCI_SUCCESS); 6744 } 6745 6746 /* Port Multiplier sub-device hot-plug handler */ 6747 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 6748 mutex_exit(&ahci_portp->ahciport_mutex); 6749 return (AHCI_SUCCESS); 6750 } 6751 6752 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_PMULT_SNTF) { 6753 /* Not allowed to re-enter. */ 6754 mutex_exit(&ahci_portp->ahciport_mutex); 6755 return (AHCI_SUCCESS); 6756 } 6757 6758 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_PMULT_SNTF; 6759 6760 /* 6761 * NOTE: 6762 * Even if Asynchronous Notification is supported (and enabled) by 6763 * both controller and the port multiplier, the content of PxSNTF 6764 * register is always set to 0x8000 by async notification event. We 6765 * need to check GSCR[32] on the port multiplier to find out the 6766 * owner of this event. 6767 * This is not accord with SATA spec 2.6 and needs further 6768 * clarification. 6769 */ 6770 /* hot-plug will not reported while reseting. */ 6771 if (ahci_portp->ahciport_reset_in_progress == 1) { 6772 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 6773 "port %d snotif event ignored", port); 6774 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_PMULT_SNTF; 6775 mutex_exit(&ahci_portp->ahciport_mutex); 6776 return (AHCI_SUCCESS); 6777 } 6778 6779 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 6780 "PxSNTF is set to 0x%x by port multiplier", 6781 ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags); 6782 6783 /* 6784 * Now we need do some necessary operation and inform SATA framework 6785 * that link/device events has happened. 6786 */ 6787 bzero((void *)&sdevice, sizeof (sata_device_t)); 6788 sdevice.satadev_addr.cport = ahci_ctlp-> 6789 ahcictl_port_to_cport[port]; 6790 sdevice.satadev_addr.pmport = SATA_PMULT_HOSTPORT; 6791 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 6792 sdevice.satadev_state = SATA_PSTATE_PWRON; 6793 6794 /* Just reject packets, do not stop that port. */ 6795 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 6796 6797 mutex_exit(&ahci_portp->ahciport_mutex); 6798 sata_hba_event_notify( 6799 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 6800 &sdevice, 6801 SATA_EVNT_PMULT_LINK_CHANGED); 6802 mutex_enter(&ahci_portp->ahciport_mutex); 6803 6804 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_PMULT_SNTF; 6805 mutex_exit(&ahci_portp->ahciport_mutex); 6806 6807 return (AHCI_SUCCESS); 6808 } 6809 6810 /* 6811 * 1=Change in Current Connect Status. 0=No change in Current Connect Status. 6812 * This bit reflects the state of PxSERR.DIAG.X. This bit is only cleared 6813 * when PxSERR.DIAG.X is cleared. When PxSERR.DIAG.X is set to one, it 6814 * indicates a COMINIT signal was received. 6815 * 6816 * Hot plug insertion is detected by reception of a COMINIT signal from the 6817 * device. On reception of unsolicited COMINIT, the HBA shall generate a 6818 * COMRESET. If the COMINIT is in responce to a COMRESET, then the HBA shall 6819 * begin the normal communication negotiation sequence as outlined in the 6820 * Serial ATA 1.0a specification. When a COMRESET is sent to the device the 6821 * PxSSTS.DET field shall be cleared to 0h. When a COMINIT is received, the 6822 * PxSSTS.DET field shall be set to 1h. When the communication negotiation 6823 * sequence is complete and PhyRdy is true the PxSSTS.DET field shall be set 6824 * to 3h. Therefore, at the moment the ahci driver is going to check PhyRdy 6825 * to handle hot plug insertion. In this interrupt handler, just do nothing 6826 * but print some log message and clear the bit. 6827 */ 6828 static int 6829 ahci_intr_port_connect_change(ahci_ctl_t *ahci_ctlp, 6830 ahci_port_t *ahci_portp, uint8_t port) 6831 { 6832 #if AHCI_DEBUG 6833 uint32_t port_serror; 6834 #endif 6835 6836 mutex_enter(&ahci_portp->ahciport_mutex); 6837 6838 #if AHCI_DEBUG 6839 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6840 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 6841 6842 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6843 "ahci_intr_port_connect_change: port %d, " 6844 "port_serror = 0x%x", port, port_serror); 6845 #endif 6846 6847 /* Clear PxSERR.DIAG.X to clear the interrupt bit */ 6848 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6849 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 6850 SERROR_EXCHANGED_ERR); 6851 6852 mutex_exit(&ahci_portp->ahciport_mutex); 6853 6854 return (AHCI_SUCCESS); 6855 } 6856 6857 /* 6858 * Hot Plug Operation for platforms that support Mechanical Presence 6859 * Switches. 6860 * 6861 * When set, it indicates that a mechanical presence switch attached to this 6862 * port has been opened or closed, which may lead to a change in the connection 6863 * state of the device. This bit is only valid if both CAP.SMPS and PxCMD.MPSP 6864 * are set to '1'. 6865 * 6866 * At the moment, this interrupt is not needed and disabled and we just log 6867 * the debug message. 6868 */ 6869 static int 6870 ahci_intr_device_mechanical_presence_status(ahci_ctl_t *ahci_ctlp, 6871 ahci_port_t *ahci_portp, uint8_t port) 6872 { 6873 uint32_t cap_status, port_cmd_status; 6874 6875 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6876 "ahci_intr_device_mechanical_presence_status enter, " 6877 "port %d", port); 6878 6879 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6880 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 6881 6882 mutex_enter(&ahci_portp->ahciport_mutex); 6883 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6884 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 6885 6886 if (!(cap_status & AHCI_HBA_CAP_SMPS) || 6887 !(port_cmd_status & AHCI_CMD_STATUS_MPSP)) { 6888 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6889 "CAP.SMPS or PxCMD.MPSP is not set, so just ignore " 6890 "the interrupt: cap_status = 0x%x, " 6891 "port_cmd_status = 0x%x", cap_status, port_cmd_status); 6892 mutex_exit(&ahci_portp->ahciport_mutex); 6893 6894 return (AHCI_SUCCESS); 6895 } 6896 6897 #if AHCI_DEBUG 6898 if (port_cmd_status & AHCI_CMD_STATUS_MPSS) { 6899 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6900 "The mechanical presence switch is open: " 6901 "port %d, port_cmd_status = 0x%x", 6902 port, port_cmd_status); 6903 } else { 6904 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6905 "The mechanical presence switch is close: " 6906 "port %d, port_cmd_status = 0x%x", 6907 port, port_cmd_status); 6908 } 6909 #endif 6910 6911 mutex_exit(&ahci_portp->ahciport_mutex); 6912 6913 return (AHCI_SUCCESS); 6914 } 6915 6916 /* 6917 * Native Hot Plug Support. 6918 * 6919 * When set, it indicates that the internal PHYRDY signal changed state. 6920 * This bit reflects the state of PxSERR.DIAG.N. 6921 * 6922 * There are three kinds of conditions to generate this interrupt event: 6923 * 1. a device is inserted 6924 * 2. a device is disconnected 6925 * 3. when the link enters/exits a Partial or Slumber interface power 6926 * management state 6927 * 6928 * If inteface power management is enabled for a port, the PxSERR.DIAG.N 6929 * bit may be set due to the link entering the Partial or Slumber power 6930 * management state, rather than due to a hot plug insertion or removal 6931 * event. So far, the interface power management is disabled, so the 6932 * driver can reliably get removal detection notification via the 6933 * PxSERR.DIAG.N bit. 6934 */ 6935 static int 6936 ahci_intr_phyrdy_change(ahci_ctl_t *ahci_ctlp, 6937 ahci_port_t *ahci_portp, uint8_t port) 6938 { 6939 uint32_t port_sstatus = 0; /* No dev present & PHY not established. */ 6940 sata_device_t sdevice; 6941 int dev_exists_now = 0; 6942 int dev_existed_previously = 0; 6943 ahci_addr_t port_addr; 6944 6945 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6946 "ahci_intr_phyrdy_change enter, port %d", port); 6947 6948 /* Clear PxSERR.DIAG.N to clear the interrupt bit */ 6949 mutex_enter(&ahci_portp->ahciport_mutex); 6950 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6951 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 6952 SERROR_PHY_RDY_CHG); 6953 mutex_exit(&ahci_portp->ahciport_mutex); 6954 6955 mutex_enter(&ahci_ctlp->ahcictl_mutex); 6956 if ((ahci_ctlp->ahcictl_sata_hba_tran == NULL) || 6957 (ahci_portp == NULL)) { 6958 /* The whole controller setup is not yet done. */ 6959 mutex_exit(&ahci_ctlp->ahcictl_mutex); 6960 return (AHCI_SUCCESS); 6961 } 6962 mutex_exit(&ahci_ctlp->ahcictl_mutex); 6963 6964 mutex_enter(&ahci_portp->ahciport_mutex); 6965 6966 /* SStatus tells the presence of device. */ 6967 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6968 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 6969 6970 if (SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_PHYCOM) { 6971 dev_exists_now = 1; 6972 } 6973 6974 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) { 6975 dev_existed_previously = 1; 6976 } 6977 6978 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_NODEV) { 6979 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_NODEV; 6980 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 6981 "ahci_intr_phyrdy_change: port %d " 6982 "AHCI_PORT_FLAG_NODEV is cleared", port); 6983 if (dev_exists_now == 0) 6984 dev_existed_previously = 1; 6985 } 6986 6987 bzero((void *)&sdevice, sizeof (sata_device_t)); 6988 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 6989 sdevice.satadev_addr.qual = SATA_ADDR_CPORT; 6990 sdevice.satadev_addr.pmport = 0; 6991 sdevice.satadev_state = SATA_PSTATE_PWRON; 6992 ahci_portp->ahciport_port_state = SATA_PSTATE_PWRON; 6993 6994 AHCI_ADDR_SET_PORT(&port_addr, port); 6995 6996 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_HOTPLUG; 6997 if (dev_exists_now) { 6998 if (dev_existed_previously) { /* 1 -> 1 */ 6999 /* Things are fine now. The loss was temporary. */ 7000 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7001 "ahci_intr_phyrdy_change port %d " 7002 "device link lost/established", port); 7003 7004 mutex_exit(&ahci_portp->ahciport_mutex); 7005 sata_hba_event_notify( 7006 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7007 &sdevice, 7008 SATA_EVNT_LINK_LOST|SATA_EVNT_LINK_ESTABLISHED); 7009 mutex_enter(&ahci_portp->ahciport_mutex); 7010 7011 } else { /* 0 -> 1 */ 7012 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7013 "ahci_intr_phyrdy_change: port %d " 7014 "device link established", port); 7015 7016 /* 7017 * A new device has been detected. The new device 7018 * might be a port multiplier instead of a drive, so 7019 * we cannot update the signature directly. 7020 */ 7021 (void) ahci_initialize_port(ahci_ctlp, 7022 ahci_portp, &port_addr); 7023 7024 /* Try to start the port */ 7025 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 7026 != AHCI_SUCCESS) { 7027 sdevice.satadev_state |= SATA_PSTATE_FAILED; 7028 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7029 "ahci_intr_phyrdy_change: port %d failed " 7030 "at start port", port); 7031 } 7032 7033 /* Clear the max queue depth for inserted device */ 7034 ahci_portp->ahciport_max_ncq_tags = 0; 7035 7036 mutex_exit(&ahci_portp->ahciport_mutex); 7037 sata_hba_event_notify( 7038 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7039 &sdevice, 7040 SATA_EVNT_LINK_ESTABLISHED); 7041 mutex_enter(&ahci_portp->ahciport_mutex); 7042 7043 } 7044 } else { /* No device exists now */ 7045 7046 if (dev_existed_previously) { /* 1 -> 0 */ 7047 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7048 "ahci_intr_phyrdy_change: port %d " 7049 "device link lost", port); 7050 7051 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 7052 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 7053 ahci_portp, port); 7054 7055 if (ahci_portp->ahciport_device_type == 7056 SATA_DTYPE_PMULT) { 7057 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 7058 } 7059 7060 /* An existing device is lost. */ 7061 ahci_portp->ahciport_device_type = SATA_DTYPE_NONE; 7062 ahci_portp->ahciport_port_state = SATA_STATE_UNKNOWN; 7063 7064 mutex_exit(&ahci_portp->ahciport_mutex); 7065 sata_hba_event_notify( 7066 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7067 &sdevice, 7068 SATA_EVNT_LINK_LOST); 7069 mutex_enter(&ahci_portp->ahciport_mutex); 7070 } 7071 } 7072 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_HOTPLUG; 7073 7074 mutex_exit(&ahci_portp->ahciport_mutex); 7075 7076 return (AHCI_SUCCESS); 7077 } 7078 7079 /* 7080 * PxIS.UFS - Unknown FIS Error 7081 * 7082 * This interrupt event means an unknown FIS was received and has been 7083 * copied into system memory. An unknown FIS is not considered an illegal 7084 * FIS, unless the length received is more than 64 bytes. If an unknown 7085 * FIS arrives with length <= 64 bytes, it is posted and the HBA continues 7086 * normal operation. If the unknown FIS is more than 64 bytes, then it 7087 * won't be posted to memory and PxSERR.ERR.P will be set, which is then 7088 * a fatal error. 7089 * 7090 * PxIS.IPMS - Incorrect Port Multiplier Status 7091 * 7092 * IPMS Indicates that the HBA received a FIS from a device that did not 7093 * have a command outstanding. The IPMS bit may be set during enumeration 7094 * of devices on a Port Multiplier due to the normal Port Multiplier 7095 * enumeration process. It is recommended that IPMS only be used after 7096 * enumeration is complete on the Port Multiplier (copied from spec). 7097 * 7098 * PxIS.OFS - Overflow Error 7099 * 7100 * Command list overflow is defined as software building a command table 7101 * that has fewer total bytes than the transaction given to the device. 7102 * On device writes, the HBA will run out of data, and on reads, there 7103 * will be no room to put the data. 7104 * 7105 * For an overflow on data read, either PIO or DMA, the HBA will set 7106 * PxIS.OFS, and the HBA will do a best effort to continue, and it's a 7107 * non-fatal error when the HBA can continues. Sometimes, it will cause 7108 * a fatal error and need the software to do something. 7109 * 7110 * For an overflow on data write, setting PxIS.OFS is optional for both 7111 * DMA and PIO, and it's a fatal error, and a COMRESET is required by 7112 * software to clean up from this serious error. 7113 * 7114 * PxIS.INFS - Interface Non-Fatal Error 7115 * 7116 * This interrupt event indicates that the HBA encountered an error on 7117 * the Serial ATA interface but was able to continue operation. The kind 7118 * of error usually occurred during a non-Data FIS, and under this condition 7119 * the FIS will be re-transmitted by HBA automatically. 7120 * 7121 * When the FMA is implemented, there should be a stat structure to 7122 * record how many every kind of error happens. 7123 */ 7124 static int 7125 ahci_intr_non_fatal_error(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 7126 uint8_t port, uint32_t intr_status) 7127 { 7128 uint32_t port_serror; 7129 #if AHCI_DEBUG 7130 uint32_t port_cmd_status; 7131 uint32_t port_cmd_issue; 7132 uint32_t port_sactive; 7133 int current_slot; 7134 uint32_t current_tags; 7135 sata_pkt_t *satapkt; 7136 ahci_cmd_header_t *cmd_header; 7137 uint32_t cmd_dmacount; 7138 #endif 7139 7140 mutex_enter(&ahci_portp->ahciport_mutex); 7141 7142 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7143 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 7144 7145 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY|AHCIDBG_ERRS, ahci_ctlp, 7146 "ahci_intr_non_fatal_error: port %d, " 7147 "PxSERR = 0x%x, PxIS = 0x%x ", port, port_serror, intr_status); 7148 7149 ahci_log_serror_message(ahci_ctlp, port, port_serror, 1); 7150 7151 if (intr_status & AHCI_INTR_STATUS_UFS) { 7152 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7153 "ahci port %d has unknown FIS error", port); 7154 7155 /* Clear the interrupt bit by clearing PxSERR.DIAG.F */ 7156 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7157 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 7158 SERROR_FIS_TYPE); 7159 } 7160 7161 #if AHCI_DEBUG 7162 if (intr_status & AHCI_INTR_STATUS_IPMS) { 7163 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci port %d " 7164 "has Incorrect Port Multiplier Status error", port); 7165 } 7166 7167 if (intr_status & AHCI_INTR_STATUS_OFS) { 7168 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7169 "ahci port %d has overflow error", port); 7170 } 7171 7172 if (intr_status & AHCI_INTR_STATUS_INFS) { 7173 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7174 "ahci port %d has interface non fatal error", port); 7175 } 7176 7177 /* 7178 * Record the error occurred command's slot. 7179 */ 7180 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 7181 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 7182 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7183 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7184 7185 current_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 7186 AHCI_CMD_STATUS_CCS_SHIFT; 7187 7188 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 7189 satapkt = ahci_portp->ahciport_err_retri_pkt; 7190 ASSERT(satapkt != NULL); 7191 ASSERT(current_slot == 0); 7192 } else { 7193 satapkt = ahci_portp->ahciport_slot_pkts[current_slot]; 7194 } 7195 7196 if (satapkt != NULL) { 7197 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7198 "ahci_intr_non_fatal_error: pending_tags = 0x%x " 7199 "cmd 0x%x", ahci_portp->ahciport_pending_tags, 7200 satapkt->satapkt_cmd.satacmd_cmd_reg); 7201 7202 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7203 "ahci_intr_non_fatal_error: port %d, " 7204 "satapkt 0x%p is being processed when error occurs", 7205 port, (void *)satapkt); 7206 7207 /* 7208 * PRD Byte Count field of command header is not 7209 * required to reflect the total number of bytes 7210 * transferred when an overflow occurs, so here 7211 * just log the value. 7212 */ 7213 cmd_dmacount = 7214 ahci_portp->ahciport_prd_bytecounts[current_slot]; 7215 if (cmd_dmacount) { 7216 cmd_header = &ahci_portp-> 7217 ahciport_cmd_list[current_slot]; 7218 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7219 "ahci_intr_non_fatal_error: port %d, " 7220 "PRD Byte Count = 0x%x, " 7221 "ahciport_prd_bytecounts = 0x%x", port, 7222 cmd_header->ahcich_prd_byte_count, 7223 cmd_dmacount); 7224 } 7225 } 7226 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 7227 /* 7228 * For queued command, list those command which have already 7229 * been transmitted to the device and still not completed. 7230 */ 7231 port_sactive = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7232 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 7233 7234 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7235 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 7236 7237 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ|AHCIDBG_ERRS, ahci_ctlp, 7238 "ahci_intr_non_fatal_error: pending_ncq_tags = 0x%x " 7239 "port_sactive = 0x%x port_cmd_issue = 0x%x", 7240 ahci_portp->ahciport_pending_ncq_tags, 7241 port_sactive, port_cmd_issue); 7242 7243 current_tags = ahci_portp->ahciport_pending_ncq_tags & 7244 port_sactive & ~port_cmd_issue & 7245 AHCI_NCQ_SLOT_MASK(ahci_portp); 7246 7247 while (current_tags) { 7248 current_slot = ddi_ffs(current_tags) - 1; 7249 if (current_slot == -1) { 7250 goto out; 7251 } 7252 7253 satapkt = ahci_portp->ahciport_slot_pkts[current_slot]; 7254 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ|AHCIDBG_ERRS, 7255 ahci_ctlp, "ahci_intr_non_fatal_error: " 7256 "port %d, satapkt 0x%p is outstanding when " 7257 "error occurs", port, (void *)satapkt); 7258 7259 CLEAR_BIT(current_tags, current_slot); 7260 } 7261 } 7262 out: 7263 #endif 7264 mutex_exit(&ahci_portp->ahciport_mutex); 7265 7266 return (AHCI_SUCCESS); 7267 } 7268 7269 /* 7270 * According to the AHCI spec, the error types include system memory 7271 * errors, interface errors, port multiplier errors, device errors, 7272 * command list overflow, command list underflow, native command 7273 * queuing tag errors and pio data transfer errors. 7274 * 7275 * System memory errors such as target abort, master abort, and parity 7276 * may cause the host to stop, and they are serious errors and needed 7277 * to be recovered with software intervention. When system software 7278 * has given a pointer to the HBA that doesn't exist in physical memory, 7279 * a master/target abort error occurs, and PxIS.HBFS will be set. A 7280 * data error such as CRC or parity occurs, the HBA aborts the transfer 7281 * (if necessary) and PxIS.HBDS will be set. 7282 * 7283 * Interface errors are errors that occur due to electrical issues on 7284 * the interface, or protocol miscommunication between the device and 7285 * HBA, and the respective PxSERR register bit will be set. And PxIS.IFS 7286 * (fatal) or PxIS.INFS (non-fatal) will be set. The conditions that 7287 * causes PxIS.IFS/PxIS.INFS to be set are 7288 * 1. in PxSERR.ERR, P bit is set to '1' 7289 * 2. in PxSERR.DIAG, C or H bit is set to '1' 7290 * 3. PhyRdy drop unexpectly, N bit is set to '1' 7291 * If the error occurred during a non-data FIS, the FIS must be 7292 * retransmitted, and the error is non-fatal and PxIS.INFS is set. If 7293 * the error occurred during a data FIS, the transfer will stop, so 7294 * the error is fatal and PxIS.IFS is set. 7295 * 7296 * When a FIS arrives that updates the taskfile, the HBA checks to see 7297 * if PxTFD.STS.ERR is set. If yes, PxIS.TFES will be set and the HBA 7298 * stops processing any more commands. 7299 * 7300 * Command list overflow is defined as software building a command table 7301 * that has fewer total bytes than the transaction given to the device. 7302 * On device writes, the HBA will run out of data, and on reads, there 7303 * will be no room to put the data. For an overflow on data read, either 7304 * PIO or DMA, the HBA will set PxIS.OFS, and it's a non-fatal error. 7305 * For an overflow on data write, setting PxIS.OFS is optional for both 7306 * DMA and PIO, and a COMRESET is required by software to clean up from 7307 * this serious error. 7308 * 7309 * Command list underflow is defined as software building a command 7310 * table that has more total bytes than the transaction given to the 7311 * device. For data writes, both PIO and DMA, the device will detect 7312 * an error and end the transfer. And these errors are most likely going 7313 * to be fatal errors that will cause the port to be restarted. For 7314 * data reads, the HBA updates its PRD byte count, and may be 7315 * able to continue normally, but is not required to. And The HBA is 7316 * not required to detect underflow conditions for native command 7317 * queuing command. 7318 * 7319 * The HBA does not actively check incoming DMA Setup FISes to ensure 7320 * that the PxSACT register bit for that slot is set. Existing error 7321 * mechanisms, such as host bus failure, or bad protocol, are used to 7322 * recover from this case. 7323 * 7324 * In accordance with Serial ATA 1.0a, DATA FISes prior to the final 7325 * DATA FIS must be an integral number of Dwords. If the HBA receives 7326 * a request which is not an integral number of Dwords, the HBA 7327 * set PxSERR.ERR.P to '1', set PxIS.IFS to '1' and stop running until 7328 * software restarts the port. And the HBA ensures that the size 7329 * of the DATA FIS received during a PIO command matches the size in 7330 * the Transfer Cound field of the preceding PIO Setup FIS, if not, the 7331 * HBA sets PxSERR.ERR.P to '1', set PxIS.IFS to '1', and then 7332 * stop running until software restarts the port. 7333 */ 7334 /* 7335 * the fatal errors include PxIS.IFS, PxIS.HBDS, PxIS.HBFS and PxIS.TFES. 7336 * 7337 * PxIS.IFS indicates that the hba encountered an error on the serial ata 7338 * interface which caused the transfer to stop. 7339 * 7340 * PxIS.HBDS indicates that the hba encountered a data error 7341 * (uncorrectable ecc/parity) when reading from or writing to system memory. 7342 * 7343 * PxIS.HBFS indicates that the hba encountered a host bus error that it 7344 * cannot recover from, such as a bad software pointer. 7345 * 7346 * PxIS.TFES is set whenever the status register is updated by the device 7347 * and the error bit (bit 0) is set. 7348 */ 7349 static int 7350 ahci_intr_fatal_error(ahci_ctl_t *ahci_ctlp, 7351 ahci_port_t *ahci_portp, uint8_t port, uint32_t intr_status) 7352 { 7353 uint32_t port_cmd_status; 7354 uint32_t port_serror; 7355 uint32_t task_file_status; 7356 int failed_slot; 7357 sata_pkt_t *spkt = NULL; 7358 uint8_t err_byte; 7359 ahci_event_arg_t *args; 7360 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 7361 7362 mutex_enter(&ahci_portp->ahciport_mutex); 7363 7364 /* 7365 * ahci_intr_phyrdy_change() may have rendered it to 7366 * SATA_DTYPE_NONE. 7367 */ 7368 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 7369 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 7370 "ahci_intr_fatal_error: port %d no device attached, " 7371 "and just return without doing anything", port); 7372 goto out0; 7373 } 7374 7375 if (intr_status & AHCI_INTR_STATUS_TFES) { 7376 task_file_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7377 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 7378 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7379 "ahci_intr_fatal_error: port %d " 7380 "task_file_status = 0x%x", port, task_file_status); 7381 } 7382 7383 /* 7384 * Here we just log the fatal error info in interrupt context. 7385 * Misc recovery processing will be handled in task queue. 7386 */ 7387 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 7388 /* 7389 * Read PxCMD.CCS to determine the slot that the HBA 7390 * was processing when the error occurred. 7391 */ 7392 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7393 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7394 failed_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 7395 AHCI_CMD_STATUS_CCS_SHIFT; 7396 7397 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 7398 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7399 "ahci_intr_fatal_error: spkt 0x%p is being processed when " 7400 "fatal error occurred for port %d", spkt, port); 7401 7402 /* A Task File Data error. */ 7403 if (intr_status & AHCI_INTR_STATUS_TFES) { 7404 err_byte = (task_file_status & AHCI_TFD_ERR_MASK) 7405 >> AHCI_TFD_ERR_SHIFT; 7406 7407 /* 7408 * Won't emit the error message if it is an IDENTIFY 7409 * DEVICE command sent to an ATAPI device. 7410 */ 7411 if ((spkt != NULL) && 7412 (spkt->satapkt_cmd.satacmd_cmd_reg == 7413 SATAC_ID_DEVICE) && 7414 (err_byte == SATA_ERROR_ABORT)) 7415 goto out1; 7416 7417 /* 7418 * Won't emit the error message if it is an ATAPI PACKET 7419 * command 7420 */ 7421 if ((spkt != NULL) && 7422 (spkt->satapkt_cmd.satacmd_cmd_reg == SATAC_PACKET)) 7423 goto out1; 7424 } 7425 } 7426 7427 /* print the fatal error type */ 7428 ahci_log_fatal_error_message(ahci_ctlp, port, intr_status); 7429 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7430 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 7431 7432 /* print PxSERR related error message */ 7433 ahci_log_serror_message(ahci_ctlp, port, port_serror, 0); 7434 7435 /* print task file register value */ 7436 if (intr_status & AHCI_INTR_STATUS_TFES) { 7437 cmn_err(CE_WARN, "!ahci%d: ahci port %d task_file_status " 7438 "= 0x%x", instance, port, task_file_status); 7439 } 7440 7441 out1: 7442 /* Prepare the argument for the taskq */ 7443 args = ahci_portp->ahciport_event_args; 7444 args->ahciea_ctlp = (void *)ahci_ctlp; 7445 args->ahciea_portp = (void *)ahci_portp; 7446 args->ahciea_event = intr_status; 7447 AHCI_ADDR_SET_PORT((ahci_addr_t *)args->ahciea_addrp, port); 7448 7449 /* Start the taskq to handle error recovery */ 7450 if ((ddi_taskq_dispatch(ahci_portp->ahciport_event_taskq, 7451 ahci_events_handler, 7452 (void *)args, DDI_NOSLEEP)) != DDI_SUCCESS) { 7453 cmn_err(CE_WARN, "!ahci%d: ahci start taskq for event handler " 7454 "failed", instance); 7455 } 7456 out0: 7457 mutex_exit(&ahci_portp->ahciport_mutex); 7458 7459 return (AHCI_SUCCESS); 7460 } 7461 7462 /* 7463 * Hot Plug Operation for platforms that support Cold Presence Detect. 7464 * 7465 * When set, a device status has changed as detected by the cold presence 7466 * detect logic. This bit can either be set due to a non-connected port 7467 * receiving a device, or a connected port having its device removed. 7468 * This bit is only valid if the port supports cold presence detect as 7469 * indicated by PxCMD.CPD set to '1'. 7470 * 7471 * At the moment, this interrupt is not needed and disabled and we just 7472 * log the debug message. 7473 */ 7474 static int 7475 ahci_intr_cold_port_detect(ahci_ctl_t *ahci_ctlp, 7476 ahci_port_t *ahci_portp, uint8_t port) 7477 { 7478 uint32_t port_cmd_status; 7479 sata_device_t sdevice; 7480 7481 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7482 "ahci_intr_cold_port_detect enter, port %d", port); 7483 7484 mutex_enter(&ahci_portp->ahciport_mutex); 7485 7486 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7487 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7488 if (!(port_cmd_status & AHCI_CMD_STATUS_CPD)) { 7489 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7490 "port %d does not support cold presence detect, so " 7491 "we just ignore this interrupt", port); 7492 mutex_exit(&ahci_portp->ahciport_mutex); 7493 return (AHCI_SUCCESS); 7494 } 7495 7496 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7497 "port %d device status has changed", port); 7498 7499 bzero((void *)&sdevice, sizeof (sata_device_t)); 7500 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 7501 sdevice.satadev_addr.qual = SATA_ADDR_CPORT; 7502 sdevice.satadev_addr.pmport = 0; 7503 sdevice.satadev_state = SATA_PSTATE_PWRON; 7504 7505 if (port_cmd_status & AHCI_CMD_STATUS_CPS) { 7506 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7507 "port %d: a device is hot plugged", port); 7508 mutex_exit(&ahci_portp->ahciport_mutex); 7509 sata_hba_event_notify( 7510 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7511 &sdevice, 7512 SATA_EVNT_DEVICE_ATTACHED); 7513 mutex_enter(&ahci_portp->ahciport_mutex); 7514 7515 } else { 7516 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7517 "port %d: a device is hot unplugged", port); 7518 mutex_exit(&ahci_portp->ahciport_mutex); 7519 sata_hba_event_notify( 7520 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7521 &sdevice, 7522 SATA_EVNT_DEVICE_DETACHED); 7523 mutex_enter(&ahci_portp->ahciport_mutex); 7524 } 7525 7526 mutex_exit(&ahci_portp->ahciport_mutex); 7527 7528 return (AHCI_SUCCESS); 7529 } 7530 7531 /* 7532 * Enable the interrupts for a particular port. 7533 * 7534 * WARNING!!! ahciport_mutex should be acquired before the function 7535 * is called. 7536 */ 7537 static void 7538 ahci_enable_port_intrs(ahci_ctl_t *ahci_ctlp, uint8_t port) 7539 { 7540 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 7541 "ahci_enable_port_intrs enter, port %d", port); 7542 7543 /* 7544 * Clear port interrupt status before enabling interrupt 7545 */ 7546 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7547 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 7548 AHCI_PORT_INTR_MASK); 7549 7550 /* 7551 * Clear the pending bit from IS.IPS 7552 */ 7553 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7554 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp), (1 << port)); 7555 7556 /* 7557 * Enable the following interrupts: 7558 * Device to Host Register FIS Interrupt (DHRS) 7559 * PIO Setup FIS Interrupt (PSS) 7560 * Set Device Bits Interrupt (SDBS) 7561 * Unknown FIS Interrupt (UFS) 7562 * Port Connect Change Status (PCS) 7563 * PhyRdy Change Status (PRCS) 7564 * Overflow Status (OFS) 7565 * Interface Non-fatal Error Status (INFS) 7566 * Interface Fatal Error Status (IFS) 7567 * Host Bus Data Error Status (HBDS) 7568 * Host Bus Fatal Error Status (HBFS) 7569 * Task File Error Status (TFES) 7570 */ 7571 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7572 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 7573 (AHCI_INTR_STATUS_DHRS | 7574 AHCI_INTR_STATUS_PSS | 7575 AHCI_INTR_STATUS_SDBS | 7576 AHCI_INTR_STATUS_UFS | 7577 AHCI_INTR_STATUS_DPS | 7578 AHCI_INTR_STATUS_PCS | 7579 AHCI_INTR_STATUS_PRCS | 7580 AHCI_INTR_STATUS_OFS | 7581 AHCI_INTR_STATUS_INFS | 7582 AHCI_INTR_STATUS_IFS | 7583 AHCI_INTR_STATUS_HBDS | 7584 AHCI_INTR_STATUS_HBFS | 7585 AHCI_INTR_STATUS_TFES)); 7586 } 7587 7588 /* 7589 * Enable interrupts for all the ports. 7590 * 7591 * WARNING!!! ahcictl_mutex should be acquired before the function 7592 * is called. 7593 */ 7594 static void 7595 ahci_enable_all_intrs(ahci_ctl_t *ahci_ctlp) 7596 { 7597 uint32_t ghc_control; 7598 7599 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_enable_all_intrs enter", NULL); 7600 7601 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7602 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 7603 7604 ghc_control |= AHCI_HBA_GHC_IE; 7605 7606 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7607 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 7608 } 7609 7610 /* 7611 * Disable interrupts for a particular port. 7612 * 7613 * WARNING!!! ahciport_mutex should be acquired before the function 7614 * is called. 7615 */ 7616 static void 7617 ahci_disable_port_intrs(ahci_ctl_t *ahci_ctlp, uint8_t port) 7618 { 7619 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 7620 "ahci_disable_port_intrs enter, port %d", port); 7621 7622 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7623 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 0); 7624 } 7625 7626 /* 7627 * Disable interrupts for the whole HBA. 7628 * 7629 * The global bit is cleared, then all interrupt sources from all 7630 * ports are disabled. 7631 * 7632 * WARNING!!! ahcictl_mutex should be acquired before the function 7633 * is called. 7634 */ 7635 static void 7636 ahci_disable_all_intrs(ahci_ctl_t *ahci_ctlp) 7637 { 7638 uint32_t ghc_control; 7639 7640 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_disable_all_intrs enter", 7641 NULL); 7642 7643 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7644 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 7645 7646 ghc_control &= ~ AHCI_HBA_GHC_IE; 7647 7648 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7649 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 7650 } 7651 7652 /* 7653 * Handle FIXED or MSI interrupts. 7654 */ 7655 /* 7656 * According to AHCI spec, the HBA may support several interrupt modes: 7657 * * pin based interrupts (FIXED) 7658 * * single MSI message interrupts 7659 * * multiple MSI based message interrupts 7660 * 7661 * For pin based interrupts, the software interrupt handler need to check IS 7662 * register to find out which port has pending interrupts. And then check 7663 * PxIS register to find out which interrupt events happened on that port. 7664 * 7665 * For single MSI message interrupts, MSICAP.MC.MSIE is set with '1', and 7666 * MSICAP.MC.MME is set with '0'. This mode is similar to pin based interrupts 7667 * in that software interrupt handler need to check IS register to determine 7668 * which port triggered the interrupts since it uses a single message for all 7669 * port interrupts. 7670 * 7671 * HBA may optionally support multiple MSI message for better performance. In 7672 * this mode, each port may have its own interrupt message, and thus generation 7673 * of interrupts is no longer controlled through the IS register. MSICAP.MC.MMC 7674 * represents a power-of-2 wrapper on the number of implemented ports, and 7675 * the mapping of ports to interrupts is done in a 1-1 relationship, up to the 7676 * maximum number of assigned interrupts. When the number of MSI messages 7677 * allocated is less than the number requested, then hardware may have two 7678 * implementation behaviors: 7679 * * assign each ports its own interrupt and then force all additional 7680 * ports to share the last interrupt message, and this condition is 7681 * indicated by clearing GHC.MRSM to '0' 7682 * * revert to single MSI mode, indicated by setting GHC.MRSM to '1' 7683 * When multiple-message MSI is enabled, hardware will still set IS register 7684 * as single message case. And this IS register may be used by software when 7685 * fewer than the requested number of messages is granted in order to determine 7686 * which port had the interrupt. 7687 * 7688 * Note: The current ahci driver only supports the first two interrupt modes: 7689 * pin based interrupts and single MSI message interrupts, and the reason 7690 * is indicated in below code. 7691 */ 7692 static int 7693 ahci_add_intrs(ahci_ctl_t *ahci_ctlp, int intr_type) 7694 { 7695 dev_info_t *dip = ahci_ctlp->ahcictl_dip; 7696 int count, avail, actual; 7697 int i, rc; 7698 7699 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 7700 "ahci_add_intrs enter interrupt type 0x%x", intr_type); 7701 7702 /* get number of interrupts. */ 7703 rc = ddi_intr_get_nintrs(dip, intr_type, &count); 7704 if ((rc != DDI_SUCCESS) || (count == 0)) { 7705 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7706 "ddi_intr_get_nintrs() failed, " 7707 "rc %d count %d\n", rc, count); 7708 return (DDI_FAILURE); 7709 } 7710 7711 /* get number of available interrupts. */ 7712 rc = ddi_intr_get_navail(dip, intr_type, &avail); 7713 if ((rc != DDI_SUCCESS) || (avail == 0)) { 7714 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7715 "ddi_intr_get_navail() failed, " 7716 "rc %d avail %d\n", rc, avail); 7717 return (DDI_FAILURE); 7718 } 7719 7720 #if AHCI_DEBUG 7721 if (avail < count) { 7722 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7723 "ddi_intr_get_nintrs returned %d, navail() returned %d", 7724 count, avail); 7725 } 7726 #endif 7727 7728 /* 7729 * Note: So far Solaris restricts the maximum number of messages for 7730 * x86 to 2, that is avail is 2, so here we set the count with 1 to 7731 * force the driver to use single MSI message interrupt. In future if 7732 * Solaris remove the restriction, then we need to delete the below 7733 * code and try to use multiple interrupt routine to gain better 7734 * performance. 7735 */ 7736 if ((intr_type == DDI_INTR_TYPE_MSI) && (count > 1)) { 7737 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7738 "force to use one interrupt routine though the " 7739 "HBA supports %d interrupt", count); 7740 count = 1; 7741 } 7742 7743 /* Allocate an array of interrupt handles. */ 7744 ahci_ctlp->ahcictl_intr_size = count * sizeof (ddi_intr_handle_t); 7745 ahci_ctlp->ahcictl_intr_htable = 7746 kmem_alloc(ahci_ctlp->ahcictl_intr_size, KM_SLEEP); 7747 7748 /* call ddi_intr_alloc(). */ 7749 rc = ddi_intr_alloc(dip, ahci_ctlp->ahcictl_intr_htable, 7750 intr_type, 0, count, &actual, DDI_INTR_ALLOC_NORMAL); 7751 7752 if ((rc != DDI_SUCCESS) || (actual == 0)) { 7753 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7754 "ddi_intr_alloc() failed, rc %d count %d actual %d " 7755 "avail %d\n", rc, count, actual, avail); 7756 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7757 ahci_ctlp->ahcictl_intr_size); 7758 return (DDI_FAILURE); 7759 } 7760 7761 /* use interrupt count returned */ 7762 #if AHCI_DEBUG 7763 if (actual < count) { 7764 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7765 "Requested: %d, Received: %d", count, actual); 7766 } 7767 #endif 7768 7769 ahci_ctlp->ahcictl_intr_cnt = actual; 7770 7771 /* 7772 * Get priority for first, assume remaining are all the same. 7773 */ 7774 if (ddi_intr_get_pri(ahci_ctlp->ahcictl_intr_htable[0], 7775 &ahci_ctlp->ahcictl_intr_pri) != DDI_SUCCESS) { 7776 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7777 "ddi_intr_get_pri() failed", NULL); 7778 7779 /* Free already allocated intr. */ 7780 for (i = 0; i < actual; i++) { 7781 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[i]); 7782 } 7783 7784 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7785 ahci_ctlp->ahcictl_intr_size); 7786 return (DDI_FAILURE); 7787 } 7788 7789 /* Test for high level interrupt. */ 7790 if (ahci_ctlp->ahcictl_intr_pri >= ddi_intr_get_hilevel_pri()) { 7791 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7792 "ahci_add_intrs: Hi level intr not supported", NULL); 7793 7794 /* Free already allocated intr. */ 7795 for (i = 0; i < actual; i++) { 7796 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[i]); 7797 } 7798 7799 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7800 sizeof (ddi_intr_handle_t)); 7801 7802 return (DDI_FAILURE); 7803 } 7804 7805 /* Call ddi_intr_add_handler(). */ 7806 for (i = 0; i < actual; i++) { 7807 if (ddi_intr_add_handler(ahci_ctlp->ahcictl_intr_htable[i], 7808 ahci_intr, (caddr_t)ahci_ctlp, NULL) != DDI_SUCCESS) { 7809 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7810 "ddi_intr_add_handler() failed", NULL); 7811 7812 /* Free already allocated intr. */ 7813 for (i = 0; i < actual; i++) { 7814 (void) ddi_intr_free( 7815 ahci_ctlp->ahcictl_intr_htable[i]); 7816 } 7817 7818 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7819 ahci_ctlp->ahcictl_intr_size); 7820 return (DDI_FAILURE); 7821 } 7822 } 7823 7824 if (ddi_intr_get_cap(ahci_ctlp->ahcictl_intr_htable[0], 7825 &ahci_ctlp->ahcictl_intr_cap) != DDI_SUCCESS) { 7826 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 7827 "ddi_intr_get_cap() failed", NULL); 7828 7829 /* Free already allocated intr. */ 7830 for (i = 0; i < actual; i++) { 7831 (void) ddi_intr_free( 7832 ahci_ctlp->ahcictl_intr_htable[i]); 7833 } 7834 7835 kmem_free(ahci_ctlp->ahcictl_intr_htable, 7836 ahci_ctlp->ahcictl_intr_size); 7837 return (DDI_FAILURE); 7838 } 7839 7840 if (ahci_ctlp->ahcictl_intr_cap & DDI_INTR_FLAG_BLOCK) { 7841 /* Call ddi_intr_block_enable() for MSI. */ 7842 (void) ddi_intr_block_enable(ahci_ctlp->ahcictl_intr_htable, 7843 ahci_ctlp->ahcictl_intr_cnt); 7844 } else { 7845 /* Call ddi_intr_enable() for FIXED or MSI non block enable. */ 7846 for (i = 0; i < ahci_ctlp->ahcictl_intr_cnt; i++) { 7847 (void) ddi_intr_enable( 7848 ahci_ctlp->ahcictl_intr_htable[i]); 7849 } 7850 } 7851 7852 return (DDI_SUCCESS); 7853 } 7854 7855 /* 7856 * Removes the registered interrupts irrespective of whether they 7857 * were legacy or MSI. 7858 * 7859 * WARNING!!! The controller interrupts must be disabled before calling 7860 * this routine. 7861 */ 7862 static void 7863 ahci_rem_intrs(ahci_ctl_t *ahci_ctlp) 7864 { 7865 int x; 7866 7867 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_rem_intrs entered", NULL); 7868 7869 /* Disable all interrupts. */ 7870 if ((ahci_ctlp->ahcictl_intr_type == DDI_INTR_TYPE_MSI) && 7871 (ahci_ctlp->ahcictl_intr_cap & DDI_INTR_FLAG_BLOCK)) { 7872 /* Call ddi_intr_block_disable(). */ 7873 (void) ddi_intr_block_disable(ahci_ctlp->ahcictl_intr_htable, 7874 ahci_ctlp->ahcictl_intr_cnt); 7875 } else { 7876 for (x = 0; x < ahci_ctlp->ahcictl_intr_cnt; x++) { 7877 (void) ddi_intr_disable( 7878 ahci_ctlp->ahcictl_intr_htable[x]); 7879 } 7880 } 7881 7882 /* Call ddi_intr_remove_handler(). */ 7883 for (x = 0; x < ahci_ctlp->ahcictl_intr_cnt; x++) { 7884 (void) ddi_intr_remove_handler( 7885 ahci_ctlp->ahcictl_intr_htable[x]); 7886 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[x]); 7887 } 7888 7889 kmem_free(ahci_ctlp->ahcictl_intr_htable, ahci_ctlp->ahcictl_intr_size); 7890 } 7891 7892 /* 7893 * This routine tries to put port into P:NotRunning state by clearing 7894 * PxCMD.ST. HBA will clear PxCI to 0h, PxSACT to 0h, PxCMD.CCS to 0h 7895 * and PxCMD.CR to '0'. 7896 * 7897 * WARNING!!! ahciport_mutex should be acquired before the function 7898 * is called. 7899 */ 7900 static int 7901 ahci_put_port_into_notrunning_state(ahci_ctl_t *ahci_ctlp, 7902 ahci_port_t *ahci_portp, uint8_t port) 7903 { 7904 uint32_t port_cmd_status; 7905 int loop_count; 7906 7907 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 7908 "ahci_put_port_into_notrunning_state enter: port %d", port); 7909 7910 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7911 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7912 7913 port_cmd_status &= ~AHCI_CMD_STATUS_ST; 7914 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7915 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), port_cmd_status); 7916 7917 /* Wait until PxCMD.CR is cleared */ 7918 loop_count = 0; 7919 do { 7920 port_cmd_status = 7921 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7922 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7923 7924 if (loop_count++ > AHCI_POLLRATE_PORT_IDLE) { 7925 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 7926 "clearing port %d CMD.CR timeout, " 7927 "port_cmd_status = 0x%x", port, 7928 port_cmd_status); 7929 /* 7930 * We are effectively timing out after 0.5 sec. 7931 * This value is specified in AHCI spec. 7932 */ 7933 break; 7934 } 7935 7936 /* Wait for 10 millisec */ 7937 drv_usecwait(AHCI_10MS_USECS); 7938 } while (port_cmd_status & AHCI_CMD_STATUS_CR); 7939 7940 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_STARTED; 7941 7942 if (port_cmd_status & AHCI_CMD_STATUS_CR) { 7943 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 7944 "ahci_put_port_into_notrunning_state: failed to clear " 7945 "PxCMD.CR to '0' after loop count: %d, and " 7946 "port_cmd_status = 0x%x", loop_count, port_cmd_status); 7947 return (AHCI_FAILURE); 7948 } else { 7949 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 7950 "ahci_put_port_into_notrunning_state: succeeded to clear " 7951 "PxCMD.CR to '0' after loop count: %d, and " 7952 "port_cmd_status = 0x%x", loop_count, port_cmd_status); 7953 return (AHCI_SUCCESS); 7954 } 7955 } 7956 7957 /* 7958 * First clear PxCMD.ST, and then check PxTFD. If both PxTFD.STS.BSY 7959 * and PxTFD.STS.DRQ cleared to '0', it means the device is in a 7960 * stable state, then set PxCMD.ST to '1' to start the port directly. 7961 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue a 7962 * COMRESET to the device to put it in an idle state. 7963 * 7964 * The fifth argument returns whether the port reset is involved during 7965 * the process. 7966 * 7967 * The routine will be called under following scenarios: 7968 * + To reset the HBA 7969 * + To abort the packet(s) 7970 * + To reset the port 7971 * + To activate the port 7972 * + Fatal error recovery 7973 * + To abort the timeout packet(s) 7974 * 7975 * WARNING!!! ahciport_mutex should be acquired before the function 7976 * is called. And ahciport_mutex will be released before the reset 7977 * event is reported to sata module by calling sata_hba_event_notify, 7978 * and then be acquired again later. 7979 * 7980 * NOTES!!! During this procedure, PxSERR register will be cleared, and 7981 * according to the spec, the clearance of three bits will also clear 7982 * three interrupt status bits. 7983 * 1. PxSERR.DIAG.F will clear PxIS.UFS 7984 * 2. PxSERR.DIAG.X will clear PxIS.PCS 7985 * 3. PxSERR.DIAG.N will clear PxIS.PRCS 7986 * 7987 * Among these three interrupt events, the driver needs to take care of 7988 * PxIS.PRCS, which is the hot plug event. When the driver found out 7989 * a device was unplugged, it will call the interrupt handler. 7990 */ 7991 static int 7992 ahci_restart_port_wait_till_ready(ahci_ctl_t *ahci_ctlp, 7993 ahci_port_t *ahci_portp, uint8_t port, int flag, int *reset_flag) 7994 { 7995 uint32_t port_sstatus; 7996 uint32_t task_file_status; 7997 sata_device_t sdevice; 7998 int rval; 7999 ahci_addr_t addr_port; 8000 ahci_pmult_info_t *pminfo = NULL; 8001 int dev_exists_begin = 0; 8002 int dev_exists_end = 0; 8003 uint32_t previous_dev_type = ahci_portp->ahciport_device_type; 8004 int npmport = 0; 8005 uint8_t cport = ahci_ctlp->ahcictl_port_to_cport[port]; 8006 8007 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8008 "ahci_restart_port_wait_till_ready: port %d enter", port); 8009 8010 AHCI_ADDR_SET_PORT(&addr_port, port); 8011 8012 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) 8013 dev_exists_begin = 1; 8014 8015 /* First clear PxCMD.ST */ 8016 rval = ahci_put_port_into_notrunning_state(ahci_ctlp, ahci_portp, 8017 port); 8018 if (rval != AHCI_SUCCESS) 8019 /* 8020 * If PxCMD.CR does not clear within a reasonable time, it 8021 * may assume the interface is in a hung condition and may 8022 * continue with issuing the port reset. 8023 */ 8024 goto reset; 8025 8026 /* Then clear PxSERR */ 8027 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8028 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 8029 AHCI_SERROR_CLEAR_ALL); 8030 8031 /* Then get PxTFD */ 8032 task_file_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8033 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 8034 8035 /* 8036 * Check whether the device is in a stable status, if yes, 8037 * then start the port directly. However for ahci_tran_reset_dport, 8038 * we may have to perform a port reset. 8039 */ 8040 if (!(task_file_status & (AHCI_TFD_STS_BSY | AHCI_TFD_STS_DRQ)) && 8041 !(flag & AHCI_PORT_RESET)) 8042 goto out; 8043 8044 reset: 8045 /* 8046 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue 8047 * a COMRESET to the device 8048 */ 8049 ahci_disable_port_intrs(ahci_ctlp, port); 8050 rval = ahci_port_reset(ahci_ctlp, ahci_portp, &addr_port); 8051 ahci_enable_port_intrs(ahci_ctlp, port); 8052 8053 #ifdef AHCI_DEBUG 8054 if (rval != AHCI_SUCCESS) 8055 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8056 "ahci_restart_port_wait_till_ready: port %d failed", 8057 port); 8058 #endif 8059 8060 if (reset_flag != NULL) 8061 *reset_flag = 1; 8062 8063 /* Indicate to the framework that a reset has happened. */ 8064 if ((ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) && 8065 (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) && 8066 !(flag & AHCI_RESET_NO_EVENTS_UP)) { 8067 /* Set the reset in progress flag */ 8068 ahci_portp->ahciport_reset_in_progress = 1; 8069 8070 bzero((void *)&sdevice, sizeof (sata_device_t)); 8071 sdevice.satadev_addr.cport = 8072 ahci_ctlp->ahcictl_port_to_cport[port]; 8073 sdevice.satadev_addr.pmport = 0; 8074 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8075 8076 sdevice.satadev_state = SATA_DSTATE_RESET | 8077 SATA_DSTATE_PWR_ACTIVE; 8078 if (ahci_ctlp->ahcictl_sata_hba_tran) { 8079 mutex_exit(&ahci_portp->ahciport_mutex); 8080 sata_hba_event_notify( 8081 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 8082 &sdevice, 8083 SATA_EVNT_DEVICE_RESET); 8084 mutex_enter(&ahci_portp->ahciport_mutex); 8085 } 8086 8087 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 8088 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 8089 } else { 8090 ahci_portp->ahciport_reset_in_progress = 0; 8091 } 8092 8093 out: 8094 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8095 8096 /* SStatus tells the presence of device. */ 8097 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8098 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 8099 8100 if (SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_PHYCOM) { 8101 dev_exists_end = 1; 8102 } 8103 8104 if (dev_exists_begin == 0 && dev_exists_end == 0) /* 0 -> 0 */ 8105 return (rval); 8106 8107 /* Check whether a hot plug event happened */ 8108 if (dev_exists_begin == 1 && dev_exists_end == 0) { /* 1 -> 0 */ 8109 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8110 "ahci_restart_port_wait_till_ready: port %d " 8111 "device is removed", port); 8112 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_NODEV; 8113 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8114 "ahci_restart_port_wait_till_ready: port %d " 8115 "AHCI_PORT_FLAG_NODEV flag is set", port); 8116 mutex_exit(&ahci_portp->ahciport_mutex); 8117 (void) ahci_intr_phyrdy_change(ahci_ctlp, ahci_portp, port); 8118 mutex_enter(&ahci_portp->ahciport_mutex); 8119 8120 return (rval); 8121 } 8122 8123 8124 /* 0/1 -> 1 : device may change */ 8125 /* 8126 * May be called by ahci_fatal_error_recovery_handler, so 8127 * don't issue software if the previous device is ATAPI. 8128 */ 8129 if (ahci_portp->ahciport_device_type == SATA_DTYPE_ATAPI) 8130 return (rval); 8131 8132 /* 8133 * The COMRESET will make port multiplier enter legacy mode. 8134 * Issue a software reset to make it work again. 8135 */ 8136 ahci_find_dev_signature(ahci_ctlp, ahci_portp, &addr_port); 8137 8138 /* 8139 * Following codes are specific for the port multiplier 8140 */ 8141 if (previous_dev_type != SATA_DTYPE_PMULT && 8142 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 8143 /* in case previous_dev_type is corrupt */ 8144 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 8145 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8146 return (rval); 8147 } 8148 8149 /* Device change: PMult -> Non-PMult */ 8150 if (previous_dev_type == SATA_DTYPE_PMULT && 8151 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 8152 /* 8153 * This might happen because 8154 * 1. Software reset failed. Port multiplier is not correctly 8155 * enumerated. 8156 * 2. Another non-port-multiplier device is attached. Perhaps 8157 * the port multiplier was replaced by another device by 8158 * whatever reason, but AHCI driver missed hot-plug event. 8159 * 8160 * Now that the port has been initialized, we just need to 8161 * update the port structure according new device, then report 8162 * and wait SATA framework to probe new device. 8163 */ 8164 8165 /* Force to release pmult resource */ 8166 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 8167 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8168 8169 bzero((void *)&sdevice, sizeof (sata_device_t)); 8170 sdevice.satadev_addr.cport = 8171 ahci_ctlp->ahcictl_port_to_cport[port]; 8172 sdevice.satadev_addr.pmport = 0; 8173 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8174 8175 sdevice.satadev_state = SATA_DSTATE_RESET | 8176 SATA_DSTATE_PWR_ACTIVE; 8177 8178 mutex_exit(&ahci_portp->ahciport_mutex); 8179 sata_hba_event_notify( 8180 ahci_ctlp->ahcictl_dip, 8181 &sdevice, 8182 SATA_EVNT_DEVICE_RESET); 8183 mutex_enter(&ahci_portp->ahciport_mutex); 8184 8185 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8186 "Port multiplier is [Gone] at port %d ", port); 8187 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 8188 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 8189 8190 return (AHCI_SUCCESS); 8191 } 8192 8193 /* Device change: Non-PMult -> PMult */ 8194 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 8195 8196 /* NOTE: The PxCMD.PMA may be cleared by HBA reset. */ 8197 ahci_alloc_pmult(ahci_ctlp, ahci_portp); 8198 8199 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8200 } 8201 pminfo = ahci_portp->ahciport_pmult_info; 8202 ASSERT(pminfo != NULL); 8203 8204 /* Device (may) change: PMult -> PMult */ 8205 /* 8206 * First initialize port multiplier. Set state to READY and wait for 8207 * probe entry point to initialize it 8208 */ 8209 ahci_portp->ahciport_port_state = SATA_STATE_READY; 8210 8211 /* 8212 * It's a little complicated while target is a port multiplier. we 8213 * need to COMRESET all pmports behind that PMult otherwise those 8214 * sub-links between the PMult and the sub-devices will be in an 8215 * inactive state (indicated by PSCR0/PxSSTS) and the following access 8216 * to those sub-devices will be rejected by Link-Fatal-Error. 8217 */ 8218 /* 8219 * The PxSNTF will be set soon after the pmult is plugged. While the 8220 * pmult itself is attaching, sata_hba_event_notfiy will fail. so we 8221 * simply mark every sub-port as 'unknown', then ahci_probe_pmport 8222 * will initialized it. 8223 */ 8224 for (npmport = 0; npmport < pminfo->ahcipmi_num_dev_ports; npmport++) 8225 pminfo->ahcipmi_port_state[npmport] = SATA_STATE_UNKNOWN; 8226 8227 /* Report reset event. */ 8228 ahci_portp->ahciport_reset_in_progress = 1; 8229 8230 bzero((void *)&sdevice, sizeof (sata_device_t)); 8231 sdevice.satadev_addr.cport = cport; 8232 sdevice.satadev_addr.pmport = SATA_PMULT_HOSTPORT; 8233 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 8234 sdevice.satadev_state = SATA_DSTATE_RESET | SATA_DSTATE_PWR_ACTIVE; 8235 sata_hba_event_notify(ahci_ctlp->ahcictl_dip, &sdevice, 8236 SATA_EVNT_DEVICE_RESET); 8237 8238 return (rval); 8239 } 8240 8241 /* 8242 * This routine may be called under four scenarios: 8243 * a) do the recovery from fatal error 8244 * b) or we need to timeout some commands 8245 * c) or we need to abort some commands 8246 * d) or we need reset device/port/controller 8247 * 8248 * In all these scenarios, we need to send any pending unfinished 8249 * commands up to sata framework. 8250 * 8251 * WARNING!!! ahciport_mutex should be acquired before the function is called. 8252 */ 8253 static void 8254 ahci_mop_commands(ahci_ctl_t *ahci_ctlp, 8255 ahci_port_t *ahci_portp, 8256 uint32_t slot_status, 8257 uint32_t failed_tags, 8258 uint32_t timeout_tags, 8259 uint32_t aborted_tags, 8260 uint32_t reset_tags) 8261 { 8262 uint32_t finished_tags = 0; 8263 uint32_t unfinished_tags = 0; 8264 int tmp_slot; 8265 sata_pkt_t *satapkt; 8266 int ncq_cmd_in_progress = 0; 8267 int err_retri_cmd_in_progress = 0; 8268 int rdwr_pmult_cmd_in_progress = 0; 8269 8270 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8271 "ahci_mop_commands entered: port: %d slot_status: 0x%x", 8272 ahci_portp->ahciport_port_num, slot_status); 8273 8274 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8275 "ahci_mop_commands: failed_tags: 0x%x, " 8276 "timeout_tags: 0x%x aborted_tags: 0x%x, " 8277 "reset_tags: 0x%x", failed_tags, 8278 timeout_tags, aborted_tags, reset_tags); 8279 8280 #ifdef AHCI_DEBUG 8281 if (ahci_debug_flags & AHCIDBG_ERRS) { 8282 int i; 8283 char msg_buf[200] = {0, }; 8284 for (i = 0x1f; i >= 0; i--) { 8285 if (ahci_portp->ahciport_slot_pkts[i] != NULL) 8286 msg_buf[i] = 'X'; 8287 else 8288 msg_buf[i] = '.'; 8289 } 8290 msg_buf[0x20] = '\0'; 8291 cmn_err(CE_NOTE, "port[%d] slots: %s", 8292 ahci_portp->ahciport_port_num, msg_buf); 8293 cmn_err(CE_NOTE, "[ERR-RT] %p [RW-PM] %p ", 8294 (void *)ahci_portp->ahciport_err_retri_pkt, 8295 (void *)ahci_portp->ahciport_rdwr_pmult_pkt); 8296 } 8297 #endif 8298 8299 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8300 finished_tags = ahci_portp->ahciport_pending_tags & 8301 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 8302 8303 unfinished_tags = slot_status & 8304 AHCI_SLOT_MASK(ahci_ctlp) & 8305 ~failed_tags & 8306 ~aborted_tags & 8307 ~reset_tags & 8308 ~timeout_tags; 8309 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8310 ncq_cmd_in_progress = 1; 8311 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 8312 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 8313 8314 unfinished_tags = slot_status & 8315 AHCI_NCQ_SLOT_MASK(ahci_portp) & 8316 ~failed_tags & 8317 ~aborted_tags & 8318 ~reset_tags & 8319 ~timeout_tags; 8320 } else if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8321 8322 /* 8323 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT is 8324 * set, it means REQUEST SENSE or READ LOG EXT command doesn't 8325 * complete successfully due to one of the following three 8326 * conditions: 8327 * 8328 * 1. Fatal error - failed_tags includes its slot 8329 * 2. Timed out - timeout_tags includes its slot 8330 * 3. Aborted when hot unplug - aborted_tags includes its 8331 * slot 8332 * 8333 * Please note that the command is always sent down in Slot 0 8334 */ 8335 err_retri_cmd_in_progress = 1; 8336 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_NCQ, ahci_ctlp, 8337 "ahci_mop_commands is called for port %d while " 8338 "REQUEST SENSE or READ LOG EXT for error retrieval " 8339 "is being executed slot_status = 0x%x", 8340 ahci_portp->ahciport_port_num, slot_status); 8341 ASSERT(ahci_portp->ahciport_mop_in_progress > 1); 8342 ASSERT(slot_status == 0x1); 8343 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 8344 rdwr_pmult_cmd_in_progress = 1; 8345 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 8346 "ahci_mop_commands is called for port %d while " 8347 "READ/WRITE PORTMULT command is being executed", 8348 ahci_portp->ahciport_port_num); 8349 8350 ASSERT(slot_status == 0x1); 8351 } 8352 8353 #ifdef AHCI_DEBUG 8354 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8355 "ahci_mop_commands: finished_tags: 0x%x, " 8356 "unfinished_tags 0x%x", finished_tags, unfinished_tags); 8357 #endif 8358 8359 /* Send up finished packets with SATA_PKT_COMPLETED */ 8360 while (finished_tags) { 8361 tmp_slot = ddi_ffs(finished_tags) - 1; 8362 if (tmp_slot == -1) { 8363 break; 8364 } 8365 8366 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8367 ASSERT(satapkt != NULL); 8368 8369 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_mop_commands: " 8370 "sending up pkt 0x%p with SATA_PKT_COMPLETED", 8371 (void *)satapkt); 8372 8373 /* 8374 * Cannot fetch the return register content since the port 8375 * was restarted, so the corresponding tag will be set to 8376 * aborted tags. 8377 */ 8378 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 8379 CLEAR_BIT(finished_tags, tmp_slot); 8380 aborted_tags |= tmp_slot; 8381 continue; 8382 } 8383 8384 if (ncq_cmd_in_progress) 8385 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8386 tmp_slot); 8387 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8388 CLEAR_BIT(finished_tags, tmp_slot); 8389 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8390 8391 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_COMPLETED); 8392 } 8393 8394 /* Send up failed packets with SATA_PKT_DEV_ERROR. */ 8395 while (failed_tags) { 8396 if (err_retri_cmd_in_progress) { 8397 satapkt = ahci_portp->ahciport_err_retri_pkt; 8398 ASSERT(satapkt != NULL); 8399 ASSERT(failed_tags == 0x1); 8400 8401 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8402 "sending up pkt 0x%p with SATA_PKT_DEV_ERROR", 8403 (void *)satapkt); 8404 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8405 break; 8406 } 8407 if (rdwr_pmult_cmd_in_progress) { 8408 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8409 ASSERT(satapkt != NULL); 8410 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8411 "ahci_mop_commands: sending up " 8412 "rdwr pmult pkt 0x%p with SATA_PKT_DEV_ERROR", 8413 (void *)satapkt); 8414 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8415 break; 8416 } 8417 8418 tmp_slot = ddi_ffs(failed_tags) - 1; 8419 if (tmp_slot == -1) { 8420 break; 8421 } 8422 8423 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8424 ASSERT(satapkt != NULL); 8425 8426 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8427 "sending up pkt 0x%p with SATA_PKT_DEV_ERROR", 8428 (void *)satapkt); 8429 8430 if (ncq_cmd_in_progress) 8431 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8432 tmp_slot); 8433 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8434 CLEAR_BIT(failed_tags, tmp_slot); 8435 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8436 8437 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8438 } 8439 8440 /* Send up timeout packets with SATA_PKT_TIMEOUT. */ 8441 while (timeout_tags) { 8442 if (err_retri_cmd_in_progress) { 8443 satapkt = ahci_portp->ahciport_err_retri_pkt; 8444 ASSERT(satapkt != NULL); 8445 ASSERT(timeout_tags == 0x1); 8446 8447 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8448 "sending up pkt 0x%p with SATA_PKT_TIMEOUT", 8449 (void *)satapkt); 8450 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8451 break; 8452 } 8453 if (rdwr_pmult_cmd_in_progress) { 8454 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8455 ASSERT(satapkt != NULL); 8456 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8457 "ahci_mop_commands: sending up " 8458 "rdwr pmult pkt 0x%p with SATA_PKT_TIMEOUT", 8459 (void *)satapkt); 8460 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8461 break; 8462 } 8463 8464 tmp_slot = ddi_ffs(timeout_tags) - 1; 8465 if (tmp_slot == -1) { 8466 break; 8467 } 8468 8469 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8470 ASSERT(satapkt != NULL); 8471 8472 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8473 "sending up pkt 0x%p with SATA_PKT_TIMEOUT", 8474 (void *)satapkt); 8475 8476 if (ncq_cmd_in_progress) 8477 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8478 tmp_slot); 8479 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8480 CLEAR_BIT(timeout_tags, tmp_slot); 8481 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8482 8483 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8484 } 8485 8486 /* Send up aborted packets with SATA_PKT_ABORTED */ 8487 while (aborted_tags) { 8488 if (err_retri_cmd_in_progress) { 8489 satapkt = ahci_portp->ahciport_err_retri_pkt; 8490 ASSERT(satapkt != NULL); 8491 ASSERT(aborted_tags == 0x1); 8492 8493 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8494 "sending up pkt 0x%p with SATA_PKT_ABORTED", 8495 (void *)satapkt); 8496 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_ABORTED); 8497 break; 8498 } 8499 if (rdwr_pmult_cmd_in_progress) { 8500 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8501 ASSERT(satapkt != NULL); 8502 ASSERT(aborted_tags == 0x1); 8503 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8504 "ahci_mop_commands: sending up " 8505 "rdwr pmult pkt 0x%p with SATA_PKT_ABORTED", 8506 (void *)satapkt); 8507 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_ABORTED); 8508 break; 8509 } 8510 8511 tmp_slot = ddi_ffs(aborted_tags) - 1; 8512 if (tmp_slot == -1) { 8513 break; 8514 } 8515 8516 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8517 ASSERT(satapkt != NULL); 8518 8519 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8520 "sending up pkt 0x%p with SATA_PKT_ABORTED", 8521 (void *)satapkt); 8522 8523 if (ncq_cmd_in_progress) 8524 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8525 tmp_slot); 8526 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8527 CLEAR_BIT(aborted_tags, tmp_slot); 8528 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8529 8530 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_ABORTED); 8531 } 8532 8533 /* Send up reset packets with SATA_PKT_RESET. */ 8534 while (reset_tags) { 8535 if (rdwr_pmult_cmd_in_progress) { 8536 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8537 ASSERT(satapkt != NULL); 8538 ASSERT(aborted_tags == 0x1); 8539 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8540 "ahci_mop_commands: sending up " 8541 "rdwr pmult pkt 0x%p with SATA_PKT_RESET", 8542 (void *)satapkt); 8543 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_RESET); 8544 break; 8545 } 8546 8547 tmp_slot = ddi_ffs(reset_tags) - 1; 8548 if (tmp_slot == -1) { 8549 break; 8550 } 8551 8552 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8553 ASSERT(satapkt != NULL); 8554 8555 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8556 "sending up pkt 0x%p with SATA_PKT_RESET", 8557 (void *)satapkt); 8558 8559 if (ncq_cmd_in_progress) 8560 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8561 tmp_slot); 8562 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8563 CLEAR_BIT(reset_tags, tmp_slot); 8564 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8565 8566 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_RESET); 8567 } 8568 8569 /* Send up unfinished packets with SATA_PKT_RESET */ 8570 while (unfinished_tags) { 8571 tmp_slot = ddi_ffs(unfinished_tags) - 1; 8572 if (tmp_slot == -1) { 8573 break; 8574 } 8575 8576 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8577 ASSERT(satapkt != NULL); 8578 8579 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8580 "sending up pkt 0x%p with SATA_PKT_RESET", 8581 (void *)satapkt); 8582 8583 if (ncq_cmd_in_progress) 8584 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8585 tmp_slot); 8586 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8587 CLEAR_BIT(unfinished_tags, tmp_slot); 8588 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8589 8590 SENDUP_PACKET(ahci_portp, satapkt, SATA_PKT_RESET); 8591 } 8592 8593 ahci_portp->ahciport_mop_in_progress--; 8594 ASSERT(ahci_portp->ahciport_mop_in_progress >= 0); 8595 8596 if (ahci_portp->ahciport_mop_in_progress == 0) 8597 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_MOPPING; 8598 } 8599 8600 /* 8601 * This routine is going to first request a READ LOG EXT sata pkt from sata 8602 * module, and then deliver it to the HBA to get the ncq failure context. 8603 * The return value is the exactly failed tags. 8604 */ 8605 static uint32_t 8606 ahci_get_rdlogext_data(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 8607 uint8_t port) 8608 { 8609 sata_device_t sdevice; 8610 sata_pkt_t *rdlog_spkt, *spkt; 8611 ddi_dma_handle_t buf_dma_handle; 8612 ahci_addr_t addr; 8613 int loop_count; 8614 int rval; 8615 int failed_slot; 8616 uint32_t failed_tags = 0; 8617 struct sata_ncq_error_recovery_page *ncq_err_page; 8618 8619 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_NCQ, ahci_ctlp, 8620 "ahci_get_rdlogext_data enter: port %d", port); 8621 8622 /* Prepare the sdevice data */ 8623 bzero((void *)&sdevice, sizeof (sata_device_t)); 8624 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 8625 8626 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8627 sdevice.satadev_addr.pmport = 0; 8628 8629 /* Translate sata_device.satadev_addr -> ahci_addr */ 8630 ahci_get_ahci_addr(ahci_ctlp, &sdevice, &addr); 8631 8632 /* 8633 * Call the sata hba interface to get a rdlog spkt 8634 */ 8635 loop_count = 0; 8636 loop: 8637 rdlog_spkt = sata_get_error_retrieval_pkt(ahci_ctlp->ahcictl_dip, 8638 &sdevice, SATA_ERR_RETR_PKT_TYPE_NCQ); 8639 if (rdlog_spkt == NULL) { 8640 if (loop_count++ < AHCI_POLLRATE_GET_SPKT) { 8641 /* Sleep for a while */ 8642 drv_usecwait(AHCI_10MS_USECS); 8643 goto loop; 8644 } 8645 /* Timed out after 1s */ 8646 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8647 "failed to get rdlog spkt for port %d", port); 8648 return (failed_tags); 8649 } 8650 8651 ASSERT(rdlog_spkt->satapkt_op_mode & SATA_OPMODE_SYNCH); 8652 8653 /* 8654 * This flag is used to handle the specific error recovery when the 8655 * READ LOG EXT command gets a failure (fatal error or time-out). 8656 */ 8657 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RDLOGEXT; 8658 8659 /* 8660 * This start is not supposed to fail because after port is restarted, 8661 * the whole command list is empty. 8662 */ 8663 ahci_portp->ahciport_err_retri_pkt = rdlog_spkt; 8664 (void) ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, rdlog_spkt); 8665 ahci_portp->ahciport_err_retri_pkt = NULL; 8666 8667 /* Remove the flag after READ LOG EXT command is completed */ 8668 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_RDLOGEXT; 8669 8670 if (rdlog_spkt->satapkt_reason == SATA_PKT_COMPLETED) { 8671 /* Update the request log data */ 8672 buf_dma_handle = *(ddi_dma_handle_t *) 8673 (rdlog_spkt->satapkt_cmd.satacmd_err_ret_buf_handle); 8674 rval = ddi_dma_sync(buf_dma_handle, 0, 0, 8675 DDI_DMA_SYNC_FORKERNEL); 8676 if (rval == DDI_SUCCESS) { 8677 ncq_err_page = 8678 (struct sata_ncq_error_recovery_page *)rdlog_spkt-> 8679 satapkt_cmd.satacmd_bp->b_un.b_addr; 8680 8681 /* Get the failed tag */ 8682 failed_slot = ncq_err_page->ncq_tag; 8683 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8684 "ahci_get_rdlogext_data: port %d " 8685 "failed slot %d", port, failed_slot); 8686 if (failed_slot & NQ) { 8687 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8688 "the failed slot is not a valid tag", NULL); 8689 goto out; 8690 } 8691 8692 failed_slot &= NCQ_TAG_MASK; 8693 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 8694 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8695 "ahci_get_rdlogext_data: failed spkt 0x%p", 8696 (void *)spkt); 8697 if (spkt == NULL) { 8698 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8699 "the failed slot spkt is NULL", NULL); 8700 goto out; 8701 } 8702 8703 failed_tags = 0x1 << failed_slot; 8704 8705 /* Fill out the error context */ 8706 ahci_copy_ncq_err_page(&spkt->satapkt_cmd, 8707 ncq_err_page); 8708 ahci_update_sata_registers(ahci_ctlp, port, 8709 &spkt->satapkt_device); 8710 } 8711 } 8712 out: 8713 sata_free_error_retrieval_pkt(rdlog_spkt); 8714 8715 return (failed_tags); 8716 } 8717 8718 /* 8719 * This routine is going to first request a REQUEST SENSE sata pkt from sata 8720 * module, and then deliver it to the HBA to get the sense data and copy 8721 * the sense data back to the orignal failed sata pkt, and free the REQUEST 8722 * SENSE sata pkt later. 8723 */ 8724 static void 8725 ahci_get_rqsense_data(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 8726 uint8_t port, sata_pkt_t *spkt) 8727 { 8728 sata_device_t sdevice; 8729 sata_pkt_t *rs_spkt; 8730 sata_cmd_t *sata_cmd; 8731 ddi_dma_handle_t buf_dma_handle; 8732 ahci_addr_t addr; 8733 int loop_count; 8734 #if AHCI_DEBUG 8735 struct scsi_extended_sense *rqsense; 8736 #endif 8737 8738 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8739 "ahci_get_rqsense_data enter: port %d", port); 8740 8741 /* Prepare the sdevice data */ 8742 bzero((void *)&sdevice, sizeof (sata_device_t)); 8743 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 8744 8745 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8746 sdevice.satadev_addr.pmport = 0; 8747 8748 /* Translate sata_device.satadev_addr -> ahci_addr */ 8749 ahci_get_ahci_addr(ahci_ctlp, &sdevice, &addr); 8750 8751 sata_cmd = &spkt->satapkt_cmd; 8752 8753 /* 8754 * Call the sata hba interface to get a rs spkt 8755 */ 8756 loop_count = 0; 8757 loop: 8758 rs_spkt = sata_get_error_retrieval_pkt(ahci_ctlp->ahcictl_dip, 8759 &sdevice, SATA_ERR_RETR_PKT_TYPE_ATAPI); 8760 if (rs_spkt == NULL) { 8761 if (loop_count++ < AHCI_POLLRATE_GET_SPKT) { 8762 /* Sleep for a while */ 8763 drv_usecwait(AHCI_10MS_USECS); 8764 goto loop; 8765 8766 } 8767 /* Timed out after 1s */ 8768 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8769 "failed to get rs spkt for port %d", port); 8770 return; 8771 } 8772 8773 ASSERT(rs_spkt->satapkt_op_mode & SATA_OPMODE_SYNCH); 8774 8775 /* 8776 * This flag is used to handle the specific error recovery when the 8777 * REQUEST SENSE command gets a faiure (fatal error or time-out). 8778 */ 8779 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RQSENSE; 8780 8781 /* 8782 * This start is not supposed to fail because after port is restarted, 8783 * the whole command list is empty. 8784 */ 8785 ahci_portp->ahciport_err_retri_pkt = rs_spkt; 8786 (void) ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, rs_spkt); 8787 ahci_portp->ahciport_err_retri_pkt = NULL; 8788 8789 /* Remove the flag after REQUEST SENSE command is completed */ 8790 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_RQSENSE; 8791 8792 if (rs_spkt->satapkt_reason == SATA_PKT_COMPLETED) { 8793 /* Update the request sense data */ 8794 buf_dma_handle = *(ddi_dma_handle_t *) 8795 (rs_spkt->satapkt_cmd.satacmd_err_ret_buf_handle); 8796 (void) ddi_dma_sync(buf_dma_handle, 0, 0, 8797 DDI_DMA_SYNC_FORKERNEL); 8798 /* Copy the request sense data */ 8799 bcopy(rs_spkt-> 8800 satapkt_cmd.satacmd_bp->b_un.b_addr, 8801 &sata_cmd->satacmd_rqsense, 8802 SATA_ATAPI_MIN_RQSENSE_LEN); 8803 #if AHCI_DEBUG 8804 rqsense = (struct scsi_extended_sense *) 8805 sata_cmd->satacmd_rqsense; 8806 8807 /* Dump the sense data */ 8808 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, "\n", NULL); 8809 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, 8810 "Sense data for satapkt %p ATAPI cmd 0x%x", 8811 spkt, sata_cmd->satacmd_acdb[0]); 8812 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, 8813 " es_code 0x%x es_class 0x%x " 8814 "es_key 0x%x es_add_code 0x%x " 8815 "es_qual_code 0x%x", 8816 rqsense->es_code, rqsense->es_class, 8817 rqsense->es_key, rqsense->es_add_code, 8818 rqsense->es_qual_code); 8819 #endif 8820 } 8821 8822 sata_free_error_retrieval_pkt(rs_spkt); 8823 } 8824 8825 /* 8826 * Fatal errors will cause the HBA to enter the ERR: Fatal state. To recover, 8827 * the port must be restarted. When the HBA detects thus error, it may try 8828 * to abort a transfer. And if the transfer was aborted, the device is 8829 * expected to send a D2H Register FIS with PxTFD.STS.ERR set to '1' and both 8830 * PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0'. Then system software knows 8831 * that the device is in a stable status and transfers may be restarted without 8832 * issuing a COMRESET to the device. If PxTFD.STS.BSY or PxTFD.STS.DRQ is set, 8833 * then the software will send the COMRESET to do the port reset. 8834 * 8835 * Software should perform the appropriate error recovery actions based on 8836 * whether non-queued commands were being issued or natived command queuing 8837 * commands were being issued. 8838 * 8839 * And software will complete the command that had the error with error mark 8840 * to higher level software. 8841 * 8842 * Fatal errors include the following: 8843 * PxIS.IFS - Interface Fatal Error Status 8844 * PxIS.HBDS - Host Bus Data Error Status 8845 * PxIS.HBFS - Host Bus Fatal Error Status 8846 * PxIS.TFES - Task File Error Status 8847 * 8848 * WARNING!!! ahciport_mutex should be acquired before the function is called. 8849 */ 8850 static void 8851 ahci_fatal_error_recovery_handler(ahci_ctl_t *ahci_ctlp, 8852 ahci_port_t *ahci_portp, ahci_addr_t *addrp, uint32_t intr_status) 8853 { 8854 uint32_t port_cmd_status; 8855 uint32_t slot_status = 0; 8856 uint32_t failed_tags = 0; 8857 int failed_slot; 8858 int reset_flag = 0, flag = 0; 8859 ahci_fis_d2h_register_t *ahci_rcvd_fisp; 8860 sata_cmd_t *sata_cmd = NULL; 8861 sata_pkt_t *spkt = NULL; 8862 #if AHCI_DEBUG 8863 ahci_cmd_header_t *cmd_header; 8864 #endif 8865 uint8_t port = addrp->aa_port; 8866 8867 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8868 "ahci_fatal_error_recovery_handler enter: port %d", port); 8869 8870 /* Port multiplier error */ 8871 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 8872 /* FBS code is neither completed nor tested. */ 8873 ahci_pmult_error_recovery_handler(ahci_ctlp, ahci_portp, 8874 port, intr_status); 8875 8876 /* Force a port reset */ 8877 flag = AHCI_PORT_RESET; 8878 } 8879 8880 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 8881 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8882 8883 /* Read PxCI to see which commands are still outstanding */ 8884 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8885 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 8886 8887 /* 8888 * Read PxCMD.CCS to determine the slot that the HBA 8889 * was processing when the error occurred. 8890 */ 8891 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8892 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 8893 failed_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 8894 AHCI_CMD_STATUS_CCS_SHIFT; 8895 8896 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8897 spkt = ahci_portp->ahciport_err_retri_pkt; 8898 ASSERT(spkt != NULL); 8899 } else { 8900 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 8901 if (spkt == NULL) { 8902 /* May happen when interface errors occur? */ 8903 goto next; 8904 } 8905 } 8906 8907 #if AHCI_DEBUG 8908 /* 8909 * Debugging purpose... 8910 */ 8911 if (ahci_portp->ahciport_prd_bytecounts[failed_slot]) { 8912 cmd_header = 8913 &ahci_portp->ahciport_cmd_list[failed_slot]; 8914 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 8915 "ahci_fatal_error_recovery_handler: port %d, " 8916 "PRD Byte Count = 0x%x, " 8917 "ahciport_prd_bytecounts = 0x%x", port, 8918 cmd_header->ahcich_prd_byte_count, 8919 ahci_portp->ahciport_prd_bytecounts[failed_slot]); 8920 } 8921 #endif 8922 8923 sata_cmd = &spkt->satapkt_cmd; 8924 8925 /* Fill out the status and error registers for PxIS.TFES */ 8926 if (intr_status & AHCI_INTR_STATUS_TFES) { 8927 ahci_rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 8928 ahcirf_d2h_register_fis); 8929 8930 /* Copy the error context back to the sata_cmd */ 8931 ahci_copy_err_cnxt(sata_cmd, ahci_rcvd_fisp); 8932 } 8933 8934 /* The failed command must be one of the outstanding commands */ 8935 failed_tags = 0x1 << failed_slot; 8936 ASSERT(failed_tags & slot_status); 8937 8938 /* Update the sata registers, especially PxSERR register */ 8939 ahci_update_sata_registers(ahci_ctlp, port, 8940 &spkt->satapkt_device); 8941 8942 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8943 /* Read PxSACT to see which commands are still outstanding */ 8944 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8945 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 8946 } 8947 next: 8948 8949 #if AHCI_DEBUG 8950 /* 8951 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is 8952 * set, it means a fatal error happened after REQUEST SENSE command 8953 * or READ LOG EXT command is delivered to the HBA during the error 8954 * recovery process. At this time, the only outstanding command is 8955 * supposed to be REQUEST SENSE command or READ LOG EXT command. 8956 */ 8957 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8958 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8959 "ahci_fatal_error_recovery_handler: port %d REQUEST SENSE " 8960 "command or READ LOG EXT command for error data retrieval " 8961 "failed", port); 8962 ASSERT(slot_status == 0x1); 8963 ASSERT(failed_slot == 0); 8964 ASSERT(spkt->satapkt_cmd.satacmd_acdb[0] == 8965 SCMD_REQUEST_SENSE || 8966 spkt->satapkt_cmd.satacmd_cmd_reg == 8967 SATAC_READ_LOG_EXT); 8968 } 8969 #endif 8970 8971 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 8972 ahci_portp->ahciport_mop_in_progress++; 8973 8974 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 8975 port, flag, &reset_flag); 8976 8977 /* 8978 * Won't retrieve error information: 8979 * 1. Port reset was involved to recover 8980 * 2. Device is gone 8981 * 3. IDENTIFY DEVICE command sent to ATAPI device 8982 * 4. REQUEST SENSE or READ LOG EXT command during error recovery 8983 */ 8984 if (reset_flag || 8985 ahci_portp->ahciport_device_type == SATA_DTYPE_NONE || 8986 spkt && spkt->satapkt_cmd.satacmd_cmd_reg == SATAC_ID_DEVICE || 8987 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 8988 goto out; 8989 8990 /* 8991 * Deliver READ LOG EXT to gather information about the error when 8992 * a COMRESET has not been performed as part of the error recovery 8993 * during NCQ command processing. 8994 */ 8995 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8996 failed_tags = ahci_get_rdlogext_data(ahci_ctlp, 8997 ahci_portp, port); 8998 goto out; 8999 } 9000 9001 /* 9002 * Deliver REQUEST SENSE for ATAPI command to gather information about 9003 * the error when a COMRESET has not been performed as part of the 9004 * error recovery. 9005 */ 9006 if (spkt && ahci_portp->ahciport_device_type == SATA_DTYPE_ATAPI) 9007 ahci_get_rqsense_data(ahci_ctlp, ahci_portp, port, spkt); 9008 out: 9009 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9010 "ahci_fatal_error_recovery_handler: port %d fatal error " 9011 "occurred slot_status = 0x%x, pending_tags = 0x%x, " 9012 "pending_ncq_tags = 0x%x failed_tags = 0x%x", 9013 port, slot_status, ahci_portp->ahciport_pending_tags, 9014 ahci_portp->ahciport_pending_ncq_tags, failed_tags); 9015 9016 ahci_mop_commands(ahci_ctlp, 9017 ahci_portp, 9018 slot_status, 9019 failed_tags, /* failed tags */ 9020 0, /* timeout tags */ 9021 0, /* aborted tags */ 9022 0); /* reset tags */ 9023 } 9024 9025 /* 9026 * Used to recovery a PMULT pmport fatal error under FIS-based switching. 9027 * 1. device specific.PxFBS.SDE=1 9028 * 2. Non-Deivce specific. 9029 * Nothing will be done when Command-based switching is employed. 9030 * 9031 * Currently code is neither completed nor tested. 9032 * 9033 * WARNING!!! ahciport_mutex should be acquired before the function 9034 * is called. 9035 */ 9036 static void 9037 ahci_pmult_error_recovery_handler(ahci_ctl_t *ahci_ctlp, 9038 ahci_port_t *ahci_portp, uint8_t port, uint32_t intr_status) 9039 { 9040 #ifndef __lock_lint 9041 _NOTE(ARGUNUSED(intr_status)) 9042 #endif 9043 uint32_t port_fbs_ctrl; 9044 int loop_count = 0; 9045 ahci_addr_t addr; 9046 9047 /* Nothing will be done under Command-based switching. */ 9048 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_FBSS)) 9049 return; 9050 9051 port_fbs_ctrl = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9052 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port)); 9053 9054 if (!(port_fbs_ctrl & AHCI_FBS_EN)) 9055 /* FBS is not enabled. */ 9056 return; 9057 9058 /* Problem's getting complicated now. */ 9059 /* 9060 * If FIS-based switching is used, we need to check 9061 * the PxFBS to see the error type. 9062 */ 9063 port_fbs_ctrl = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9064 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port)); 9065 9066 /* Refer to spec(v1.2) 9.3.6.1 */ 9067 if (port_fbs_ctrl & AHCI_FBS_SDE) { 9068 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9069 "A Device Sepcific Error: port %d", port); 9070 /* 9071 * Controller has paused commands for all other 9072 * sub-devices until PxFBS.DEC is set. 9073 */ 9074 ahci_reject_all_abort_pkts(ahci_ctlp, 9075 ahci_portp, 0); 9076 9077 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 9078 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port), 9079 port_fbs_ctrl | AHCI_FBS_DEC); 9080 9081 /* 9082 * Wait controller clear PxFBS.DEC, 9083 * then we can continue. 9084 */ 9085 loop_count = 0; 9086 do { 9087 port_fbs_ctrl = ddi_get32(ahci_ctlp-> 9088 ahcictl_ahci_acc_handle, (uint32_t *) 9089 AHCI_PORT_PxFBS(ahci_ctlp, port)); 9090 9091 if (loop_count++ > 1000) 9092 /* 9093 * Esclate the error. Follow 9094 * non-device specific error 9095 * procedure. 9096 */ 9097 return; 9098 9099 drv_usecwait(AHCI_100US_USECS); 9100 } while (port_fbs_ctrl & AHCI_FBS_DEC); 9101 9102 /* 9103 * Issue a software reset to ensure drive is in 9104 * a known state. 9105 */ 9106 (void) ahci_software_reset(ahci_ctlp, 9107 ahci_portp, &addr); 9108 9109 } else { 9110 9111 /* Process Non-Device Specific Error. */ 9112 /* This will be handled later on. */ 9113 cmn_err(CE_NOTE, "!FBS is not supported now."); 9114 } 9115 } 9116 /* 9117 * Handle events - fatal error recovery 9118 */ 9119 static void 9120 ahci_events_handler(void *args) 9121 { 9122 ahci_event_arg_t *ahci_event_arg; 9123 ahci_ctl_t *ahci_ctlp; 9124 ahci_port_t *ahci_portp; 9125 ahci_addr_t *addrp; 9126 uint32_t event; 9127 9128 ahci_event_arg = (ahci_event_arg_t *)args; 9129 9130 ahci_ctlp = ahci_event_arg->ahciea_ctlp; 9131 ahci_portp = ahci_event_arg->ahciea_portp; 9132 addrp = ahci_event_arg->ahciea_addrp; 9133 event = ahci_event_arg->ahciea_event; 9134 9135 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 9136 "ahci_events_handler enter: port %d intr_status = 0x%x", 9137 ahci_portp->ahciport_port_num, event); 9138 9139 mutex_enter(&ahci_portp->ahciport_mutex); 9140 9141 /* 9142 * ahci_intr_phyrdy_change() may have rendered it to 9143 * SATA_DTYPE_NONE. 9144 */ 9145 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 9146 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 9147 "ahci_events_handler: port %d no device attached, " 9148 "and just return without doing anything", 9149 ahci_portp->ahciport_port_num); 9150 goto out; 9151 } 9152 9153 if (event & (AHCI_INTR_STATUS_IFS | 9154 AHCI_INTR_STATUS_HBDS | 9155 AHCI_INTR_STATUS_HBFS | 9156 AHCI_INTR_STATUS_TFES)) 9157 ahci_fatal_error_recovery_handler(ahci_ctlp, ahci_portp, 9158 addrp, event); 9159 9160 out: 9161 mutex_exit(&ahci_portp->ahciport_mutex); 9162 } 9163 9164 /* 9165 * ahci_watchdog_handler() and ahci_do_sync_start will call us if they 9166 * detect there are some commands which are timed out. 9167 */ 9168 static void 9169 ahci_timeout_pkts(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 9170 uint8_t port, uint32_t tmp_timeout_tags) 9171 { 9172 uint32_t slot_status = 0; 9173 uint32_t finished_tags = 0; 9174 uint32_t timeout_tags = 0; 9175 9176 AHCIDBG(AHCIDBG_TIMEOUT|AHCIDBG_ENTRY, ahci_ctlp, 9177 "ahci_timeout_pkts enter: port %d", port); 9178 9179 mutex_enter(&ahci_portp->ahciport_mutex); 9180 9181 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 9182 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) || 9183 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9184 /* Read PxCI to see which commands are still outstanding */ 9185 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9186 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 9187 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9188 /* Read PxSACT to see which commands are still outstanding */ 9189 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9190 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 9191 } 9192 9193 #if AHCI_DEBUG 9194 /* 9195 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is 9196 * set, it means a fatal error happened after REQUEST SENSE command 9197 * or READ LOG EXT command is delivered to the HBA during the error 9198 * recovery process. At this time, the only outstanding command is 9199 * supposed to be REQUEST SENSE command or READ LOG EXT command. 9200 */ 9201 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9202 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, ahci_ctlp, 9203 "ahci_timeout_pkts called while REQUEST SENSE " 9204 "command or READ LOG EXT command for error recovery " 9205 "timed out timeout_tags = 0x%x, slot_status = 0x%x, " 9206 "pending_tags = 0x%x, pending_ncq_tags = 0x%x", 9207 tmp_timeout_tags, slot_status, 9208 ahci_portp->ahciport_pending_tags, 9209 ahci_portp->ahciport_pending_ncq_tags); 9210 ASSERT(slot_status == 0x1); 9211 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9212 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, ahci_ctlp, 9213 "ahci_timeout_pkts called while executing R/W PMULT " 9214 "command timeout_tags = 0x%x, slot_status = 0x%x", 9215 tmp_timeout_tags, slot_status); 9216 ASSERT(slot_status == 0x1); 9217 } 9218 #endif 9219 9220 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 9221 ahci_portp->ahciport_mop_in_progress++; 9222 9223 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 9224 port, AHCI_PORT_RESET, NULL); 9225 9226 /* 9227 * Re-identify timeout tags because some previously checked commands 9228 * could already complete. 9229 */ 9230 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9231 finished_tags = ahci_portp->ahciport_pending_tags & 9232 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 9233 timeout_tags = tmp_timeout_tags & ~finished_tags; 9234 9235 AHCIDBG(AHCIDBG_TIMEOUT, ahci_ctlp, 9236 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, " 9237 "timeout_tags = 0x%x, port_cmd_issue = 0x%x, " 9238 "pending_tags = 0x%x ", 9239 port, finished_tags, timeout_tags, 9240 slot_status, ahci_portp->ahciport_pending_tags); 9241 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9242 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 9243 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 9244 timeout_tags = tmp_timeout_tags & ~finished_tags; 9245 9246 AHCIDBG(AHCIDBG_TIMEOUT|AHCIDBG_NCQ, ahci_ctlp, 9247 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, " 9248 "timeout_tags = 0x%x, port_sactive = 0x%x, " 9249 "pending_ncq_tags = 0x%x ", 9250 port, finished_tags, timeout_tags, 9251 slot_status, ahci_portp->ahciport_pending_ncq_tags); 9252 } else if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 9253 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9254 timeout_tags = tmp_timeout_tags; 9255 } 9256 9257 ahci_mop_commands(ahci_ctlp, 9258 ahci_portp, 9259 slot_status, 9260 0, /* failed tags */ 9261 timeout_tags, /* timeout tags */ 9262 0, /* aborted tags */ 9263 0); /* reset tags */ 9264 9265 mutex_exit(&ahci_portp->ahciport_mutex); 9266 } 9267 9268 /* 9269 * Watchdog handler kicks in every 5 seconds to timeout any commands pending 9270 * for long time. 9271 */ 9272 static void 9273 ahci_watchdog_handler(ahci_ctl_t *ahci_ctlp) 9274 { 9275 ahci_port_t *ahci_portp; 9276 sata_pkt_t *spkt; 9277 uint32_t pending_tags; 9278 uint32_t timeout_tags; 9279 uint32_t port_cmd_status; 9280 uint32_t port_sactive; 9281 uint8_t port; 9282 int tmp_slot; 9283 int current_slot; 9284 uint32_t current_tags; 9285 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 9286 /* max number of cycles this packet should survive */ 9287 int max_life_cycles; 9288 9289 /* how many cycles this packet survived so far */ 9290 int watched_cycles; 9291 9292 mutex_enter(&ahci_ctlp->ahcictl_mutex); 9293 9294 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 9295 "ahci_watchdog_handler entered", NULL); 9296 9297 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 9298 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 9299 continue; 9300 } 9301 9302 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 9303 9304 mutex_enter(&ahci_portp->ahciport_mutex); 9305 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 9306 mutex_exit(&ahci_portp->ahciport_mutex); 9307 continue; 9308 } 9309 9310 /* Skip the check for those ports in error recovery */ 9311 if ((ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) && 9312 !(ERR_RETRI_CMD_IN_PROGRESS(ahci_portp))) { 9313 mutex_exit(&ahci_portp->ahciport_mutex); 9314 continue; 9315 } 9316 9317 pending_tags = 0; 9318 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9319 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 9320 9321 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 9322 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9323 current_slot = 0; 9324 pending_tags = 0x1; 9325 } else if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9326 current_slot = 9327 (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 9328 AHCI_CMD_STATUS_CCS_SHIFT; 9329 pending_tags = ahci_portp->ahciport_pending_tags; 9330 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9331 port_sactive = ddi_get32( 9332 ahci_ctlp->ahcictl_ahci_acc_handle, 9333 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 9334 current_tags = port_sactive & 9335 ~port_cmd_status & 9336 AHCI_NCQ_SLOT_MASK(ahci_portp); 9337 pending_tags = ahci_portp->ahciport_pending_ncq_tags; 9338 } 9339 9340 timeout_tags = 0; 9341 while (pending_tags) { 9342 tmp_slot = ddi_ffs(pending_tags) - 1; 9343 if (tmp_slot == -1) { 9344 break; 9345 } 9346 9347 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 9348 spkt = ahci_portp->ahciport_err_retri_pkt; 9349 else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 9350 spkt = ahci_portp->ahciport_rdwr_pmult_pkt; 9351 else 9352 spkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 9353 9354 if ((spkt != NULL) && spkt->satapkt_time && 9355 !(spkt->satapkt_op_mode & SATA_OPMODE_POLLING)) { 9356 /* 9357 * We are overloading satapkt_hba_driver_private 9358 * with watched_cycle count. 9359 * 9360 * If a packet has survived for more than it's 9361 * max life cycles, it is a candidate for time 9362 * out. 9363 */ 9364 watched_cycles = (int)(intptr_t) 9365 spkt->satapkt_hba_driver_private; 9366 watched_cycles++; 9367 max_life_cycles = (spkt->satapkt_time + 9368 ahci_watchdog_timeout - 1) / 9369 ahci_watchdog_timeout; 9370 9371 spkt->satapkt_hba_driver_private = 9372 (void *)(intptr_t)watched_cycles; 9373 9374 if (watched_cycles <= max_life_cycles) 9375 goto next; 9376 9377 #if AHCI_DEBUG 9378 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9379 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, 9380 ahci_ctlp, "watchdog: the current " 9381 "tags is 0x%x", current_tags); 9382 } else { 9383 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, 9384 ahci_ctlp, "watchdog: the current " 9385 "slot is %d", current_slot); 9386 } 9387 #endif 9388 9389 /* 9390 * We need to check whether the HBA has 9391 * begun to execute the command, if not, 9392 * then re-set the timer of the command. 9393 */ 9394 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) && 9395 (tmp_slot != current_slot) || 9396 NCQ_CMD_IN_PROGRESS(ahci_portp) && 9397 ((0x1 << tmp_slot) & current_tags)) { 9398 spkt->satapkt_hba_driver_private = 9399 (void *)(intptr_t)0; 9400 } else { 9401 timeout_tags |= (0x1 << tmp_slot); 9402 cmn_err(CE_WARN, "!ahci%d: watchdog " 9403 "port %d satapkt 0x%p timed out\n", 9404 instance, port, (void *)spkt); 9405 } 9406 } 9407 next: 9408 CLEAR_BIT(pending_tags, tmp_slot); 9409 } 9410 9411 if (timeout_tags) { 9412 mutex_exit(&ahci_portp->ahciport_mutex); 9413 mutex_exit(&ahci_ctlp->ahcictl_mutex); 9414 ahci_timeout_pkts(ahci_ctlp, ahci_portp, 9415 port, timeout_tags); 9416 mutex_enter(&ahci_ctlp->ahcictl_mutex); 9417 mutex_enter(&ahci_portp->ahciport_mutex); 9418 } 9419 9420 mutex_exit(&ahci_portp->ahciport_mutex); 9421 } 9422 9423 /* Re-install the watchdog timeout handler */ 9424 if (ahci_ctlp->ahcictl_timeout_id != 0) { 9425 ahci_ctlp->ahcictl_timeout_id = 9426 timeout((void (*)(void *))ahci_watchdog_handler, 9427 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 9428 } 9429 9430 mutex_exit(&ahci_ctlp->ahcictl_mutex); 9431 } 9432 9433 /* 9434 * Fill the error context into sata_cmd for non-queued command error. 9435 */ 9436 static void 9437 ahci_copy_err_cnxt(sata_cmd_t *scmd, ahci_fis_d2h_register_t *rfisp) 9438 { 9439 scmd->satacmd_status_reg = GET_RFIS_STATUS(rfisp); 9440 scmd->satacmd_error_reg = GET_RFIS_ERROR(rfisp); 9441 scmd->satacmd_sec_count_lsb = GET_RFIS_SECTOR_COUNT(rfisp); 9442 scmd->satacmd_lba_low_lsb = GET_RFIS_CYL_LOW(rfisp); 9443 scmd->satacmd_lba_mid_lsb = GET_RFIS_CYL_MID(rfisp); 9444 scmd->satacmd_lba_high_lsb = GET_RFIS_CYL_HI(rfisp); 9445 scmd->satacmd_device_reg = GET_RFIS_DEV_HEAD(rfisp); 9446 9447 if (scmd->satacmd_addr_type == ATA_ADDR_LBA48) { 9448 scmd->satacmd_sec_count_msb = GET_RFIS_SECTOR_COUNT_EXP(rfisp); 9449 scmd->satacmd_lba_low_msb = GET_RFIS_CYL_LOW_EXP(rfisp); 9450 scmd->satacmd_lba_mid_msb = GET_RFIS_CYL_MID_EXP(rfisp); 9451 scmd->satacmd_lba_high_msb = GET_RFIS_CYL_HI_EXP(rfisp); 9452 } 9453 } 9454 9455 /* 9456 * Fill the ncq error page into sata_cmd for queued command error. 9457 */ 9458 static void 9459 ahci_copy_ncq_err_page(sata_cmd_t *scmd, 9460 struct sata_ncq_error_recovery_page *ncq_err_page) 9461 { 9462 scmd->satacmd_sec_count_msb = ncq_err_page->ncq_sector_count_ext; 9463 scmd->satacmd_sec_count_lsb = ncq_err_page->ncq_sector_count; 9464 scmd->satacmd_lba_low_msb = ncq_err_page->ncq_sector_number_ext; 9465 scmd->satacmd_lba_low_lsb = ncq_err_page->ncq_sector_number; 9466 scmd->satacmd_lba_mid_msb = ncq_err_page->ncq_cyl_low_ext; 9467 scmd->satacmd_lba_mid_lsb = ncq_err_page->ncq_cyl_low; 9468 scmd->satacmd_lba_high_msb = ncq_err_page->ncq_cyl_high_ext; 9469 scmd->satacmd_lba_high_lsb = ncq_err_page->ncq_cyl_high; 9470 scmd->satacmd_device_reg = ncq_err_page->ncq_dev_head; 9471 scmd->satacmd_status_reg = ncq_err_page->ncq_status; 9472 scmd->satacmd_error_reg = ncq_err_page->ncq_error; 9473 } 9474 9475 /* 9476 * Put the respective register value to sata_cmd_t for satacmd_flags. 9477 */ 9478 static void 9479 ahci_copy_out_regs(sata_cmd_t *scmd, ahci_fis_d2h_register_t *rfisp) 9480 { 9481 if (scmd->satacmd_flags.sata_copy_out_sec_count_msb) 9482 scmd->satacmd_sec_count_msb = GET_RFIS_SECTOR_COUNT_EXP(rfisp); 9483 if (scmd->satacmd_flags.sata_copy_out_lba_low_msb) 9484 scmd->satacmd_lba_low_msb = GET_RFIS_CYL_LOW_EXP(rfisp); 9485 if (scmd->satacmd_flags.sata_copy_out_lba_mid_msb) 9486 scmd->satacmd_lba_mid_msb = GET_RFIS_CYL_MID_EXP(rfisp); 9487 if (scmd->satacmd_flags.sata_copy_out_lba_high_msb) 9488 scmd->satacmd_lba_high_msb = GET_RFIS_CYL_HI_EXP(rfisp); 9489 if (scmd->satacmd_flags.sata_copy_out_sec_count_lsb) 9490 scmd->satacmd_sec_count_lsb = GET_RFIS_SECTOR_COUNT(rfisp); 9491 if (scmd->satacmd_flags.sata_copy_out_lba_low_lsb) 9492 scmd->satacmd_lba_low_lsb = GET_RFIS_CYL_LOW(rfisp); 9493 if (scmd->satacmd_flags.sata_copy_out_lba_mid_lsb) 9494 scmd->satacmd_lba_mid_lsb = GET_RFIS_CYL_MID(rfisp); 9495 if (scmd->satacmd_flags.sata_copy_out_lba_high_lsb) 9496 scmd->satacmd_lba_high_lsb = GET_RFIS_CYL_HI(rfisp); 9497 if (scmd->satacmd_flags.sata_copy_out_device_reg) 9498 scmd->satacmd_device_reg = GET_RFIS_DEV_HEAD(rfisp); 9499 if (scmd->satacmd_flags.sata_copy_out_error_reg) 9500 scmd->satacmd_error_reg = GET_RFIS_ERROR(rfisp); 9501 } 9502 9503 static void 9504 ahci_log_fatal_error_message(ahci_ctl_t *ahci_ctlp, uint8_t port, 9505 uint32_t intr_status) 9506 { 9507 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 9508 9509 if (intr_status & AHCI_INTR_STATUS_IFS) 9510 cmn_err(CE_WARN, "!ahci%d: ahci port %d has interface fatal " 9511 "error", instance, port); 9512 9513 if (intr_status & AHCI_INTR_STATUS_HBDS) 9514 cmn_err(CE_WARN, "!ahci%d: ahci port %d has bus data error", 9515 instance, port); 9516 9517 if (intr_status & AHCI_INTR_STATUS_HBFS) 9518 cmn_err(CE_WARN, "!ahci%d: ahci port %d has bus fatal error", 9519 instance, port); 9520 9521 if (intr_status & AHCI_INTR_STATUS_TFES) 9522 cmn_err(CE_WARN, "!ahci%d: ahci port %d has task file error", 9523 instance, port); 9524 9525 cmn_err(CE_WARN, "!ahci%d: ahci port %d is trying to do error " 9526 "recovery", instance, port); 9527 } 9528 9529 /* 9530 * Dump the serror message to the log. 9531 */ 9532 static void 9533 ahci_log_serror_message(ahci_ctl_t *ahci_ctlp, uint8_t port, 9534 uint32_t port_serror, int debug_only) 9535 { 9536 static char err_buf[512]; 9537 static char err_msg_header[16]; 9538 char *err_msg = err_buf; 9539 9540 *err_buf = '\0'; 9541 *err_msg_header = '\0'; 9542 9543 if (port_serror & SERROR_DATA_ERR_FIXED) { 9544 err_msg = strcat(err_msg, 9545 "\tRecovered Data Integrity Error (I)\n"); 9546 } 9547 9548 if (port_serror & SERROR_COMM_ERR_FIXED) { 9549 err_msg = strcat(err_msg, 9550 "\tRecovered Communication Error (M)\n"); 9551 } 9552 9553 if (port_serror & SERROR_DATA_ERR) { 9554 err_msg = strcat(err_msg, 9555 "\tTransient Data Integrity Error (T)\n"); 9556 } 9557 9558 if (port_serror & SERROR_PERSISTENT_ERR) { 9559 err_msg = strcat(err_msg, 9560 "\tPersistent Communication or Data Integrity Error (C)\n"); 9561 } 9562 9563 if (port_serror & SERROR_PROTOCOL_ERR) { 9564 err_msg = strcat(err_msg, "\tProtocol Error (P)\n"); 9565 } 9566 9567 if (port_serror & SERROR_INT_ERR) { 9568 err_msg = strcat(err_msg, "\tInternal Error (E)\n"); 9569 } 9570 9571 if (port_serror & SERROR_PHY_RDY_CHG) { 9572 err_msg = strcat(err_msg, "\tPhyRdy Change (N)\n"); 9573 } 9574 9575 if (port_serror & SERROR_PHY_INT_ERR) { 9576 err_msg = strcat(err_msg, "\tPhy Internal Error (I)\n"); 9577 } 9578 9579 if (port_serror & SERROR_COMM_WAKE) { 9580 err_msg = strcat(err_msg, "\tComm Wake (W)\n"); 9581 } 9582 9583 if (port_serror & SERROR_10B_TO_8B_ERR) { 9584 err_msg = strcat(err_msg, "\t10B to 8B Decode Error (B)\n"); 9585 } 9586 9587 if (port_serror & SERROR_DISPARITY_ERR) { 9588 err_msg = strcat(err_msg, "\tDisparity Error (D)\n"); 9589 } 9590 9591 if (port_serror & SERROR_CRC_ERR) { 9592 err_msg = strcat(err_msg, "\tCRC Error (C)\n"); 9593 } 9594 9595 if (port_serror & SERROR_HANDSHAKE_ERR) { 9596 err_msg = strcat(err_msg, "\tHandshake Error (H)\n"); 9597 } 9598 9599 if (port_serror & SERROR_LINK_SEQ_ERR) { 9600 err_msg = strcat(err_msg, "\tLink Sequence Error (S)\n"); 9601 } 9602 9603 if (port_serror & SERROR_TRANS_ERR) { 9604 err_msg = strcat(err_msg, 9605 "\tTransport state transition error (T)\n"); 9606 } 9607 9608 if (port_serror & SERROR_FIS_TYPE) { 9609 err_msg = strcat(err_msg, "\tUnknown FIS Type (F)\n"); 9610 } 9611 9612 if (port_serror & SERROR_EXCHANGED_ERR) { 9613 err_msg = strcat(err_msg, "\tExchanged (X)\n"); 9614 } 9615 9616 if (err_msg == NULL) 9617 return; 9618 9619 if (debug_only) { 9620 (void) sprintf(err_msg_header, "port %d", port); 9621 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, err_msg_header, NULL); 9622 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, err_msg, NULL); 9623 } else if (ahci_ctlp) { 9624 cmn_err(CE_WARN, "!ahci%d: %s %s", 9625 ddi_get_instance(ahci_ctlp->ahcictl_dip), 9626 err_msg_header, err_msg); 9627 9628 /* sata trace debug */ 9629 sata_trace_debug(ahci_ctlp->ahcictl_dip, 9630 "ahci%d: %s %s", ddi_get_instance(ahci_ctlp->ahcictl_dip), 9631 err_msg_header, err_msg); 9632 } else { 9633 cmn_err(CE_WARN, "!ahci: %s %s", err_msg_header, err_msg); 9634 9635 /* sata trace debug */ 9636 sata_trace_debug(NULL, "ahci: %s %s", err_msg_header, err_msg); 9637 } 9638 } 9639 9640 /* 9641 * Translate the sata_address_t type into the ahci_addr_t type. 9642 * sata_device.satadev_addr structure is used as source. 9643 */ 9644 static void 9645 ahci_get_ahci_addr(ahci_ctl_t *ahci_ctlp, sata_device_t *sd, 9646 ahci_addr_t *ahci_addrp) 9647 { 9648 sata_address_t *sata_addrp = &sd->satadev_addr; 9649 ahci_addrp->aa_port = 9650 ahci_ctlp->ahcictl_cport_to_port[sata_addrp->cport]; 9651 ahci_addrp->aa_pmport = sata_addrp->pmport; 9652 9653 switch (sata_addrp->qual) { 9654 case SATA_ADDR_DCPORT: 9655 case SATA_ADDR_CPORT: 9656 ahci_addrp->aa_qual = AHCI_ADDR_PORT; 9657 break; 9658 case SATA_ADDR_PMULT: 9659 case SATA_ADDR_PMULT_SPEC: 9660 ahci_addrp->aa_qual = AHCI_ADDR_PMULT; 9661 break; 9662 case SATA_ADDR_DPMPORT: 9663 case SATA_ADDR_PMPORT: 9664 ahci_addrp->aa_qual = AHCI_ADDR_PMPORT; 9665 break; 9666 case SATA_ADDR_NULL: 9667 default: 9668 /* something went wrong */ 9669 ahci_addrp->aa_qual = AHCI_ADDR_NULL; 9670 break; 9671 } 9672 } 9673 9674 /* 9675 * This routine is to calculate the total number of ports implemented 9676 * by the HBA. 9677 */ 9678 static int 9679 ahci_get_num_implemented_ports(uint32_t ports_implemented) 9680 { 9681 uint8_t i; 9682 int num = 0; 9683 9684 for (i = 0; i < AHCI_MAX_PORTS; i++) { 9685 if (((uint32_t)0x1 << i) & ports_implemented) 9686 num++; 9687 } 9688 9689 return (num); 9690 } 9691 9692 #if AHCI_DEBUG 9693 static void 9694 ahci_log(ahci_ctl_t *ahci_ctlp, uint_t level, char *fmt, ...) 9695 { 9696 static char name[16]; 9697 va_list ap; 9698 9699 mutex_enter(&ahci_log_mutex); 9700 9701 va_start(ap, fmt); 9702 if (ahci_ctlp) { 9703 (void) sprintf(name, "ahci%d: ", 9704 ddi_get_instance(ahci_ctlp->ahcictl_dip)); 9705 } else { 9706 (void) sprintf(name, "ahci: "); 9707 } 9708 9709 (void) vsprintf(ahci_log_buf, fmt, ap); 9710 va_end(ap); 9711 9712 cmn_err(level, "%s%s", name, ahci_log_buf); 9713 9714 mutex_exit(&ahci_log_mutex); 9715 } 9716 #endif 9717 9718 /* 9719 * quiesce(9E) entry point. 9720 * 9721 * This function is called when the system is single-threaded at high 9722 * PIL with preemption disabled. Therefore, this function must not be 9723 * blocked. 9724 * 9725 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure. 9726 * DDI_FAILURE indicates an error condition and should almost never happen. 9727 */ 9728 static int 9729 ahci_quiesce(dev_info_t *dip) 9730 { 9731 ahci_ctl_t *ahci_ctlp; 9732 ahci_port_t *ahci_portp; 9733 int instance, port; 9734 9735 instance = ddi_get_instance(dip); 9736 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 9737 9738 if (ahci_ctlp == NULL) 9739 return (DDI_FAILURE); 9740 9741 #if AHCI_DEBUG 9742 ahci_debug_flags = 0; 9743 #endif 9744 9745 /* disable all the interrupts. */ 9746 ahci_disable_all_intrs(ahci_ctlp); 9747 9748 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 9749 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 9750 continue; 9751 } 9752 9753 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 9754 9755 /* 9756 * Stop the port by clearing PxCMD.ST 9757 * 9758 * Here we must disable the port interrupt because 9759 * ahci_disable_all_intrs only clear GHC.IE, and IS 9760 * register will be still set if PxIE is enabled. 9761 * When ahci shares one IRQ with other drivers, the 9762 * intr handler may claim the intr mistakenly. 9763 */ 9764 ahci_disable_port_intrs(ahci_ctlp, port); 9765 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 9766 ahci_portp, port); 9767 } 9768 9769 return (DDI_SUCCESS); 9770 } 9771