1 /* 2 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 /* 7 * Copyright (c) 2007, 2008 8 * Damien Bergamini <damien.bergamini@free.fr> 9 * 10 * Permission to use, copy, modify, and distribute this software for any 11 * purpose with or without fee is hereby granted, provided that the above 12 * copyright notice and this permission notice appear in all copies. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 15 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 16 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 17 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 18 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 19 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 20 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 21 */ 22 23 #ifndef _RT2860_VAR_H 24 #define _RT2860_VAR_H 25 26 #include <sys/queue.h> 27 28 #ifdef __cplusplus 29 extern "C" { 30 #endif 31 32 /* 33 * EDCA Access Categories. 34 */ 35 enum ieee80211_edca_ac { 36 EDCA_AC_BK = 1, /* Background */ 37 EDCA_AC_BE = 0, /* Best Effort */ 38 EDCA_AC_VI = 2, /* Video */ 39 EDCA_AC_VO = 3 /* Voice */ 40 }; 41 #define EDCA_NUM_AC 4 42 43 #define RT2860_SUCCESS 0 44 45 #define RT2860_TX_RING_COUNT 64 46 #define RT2860_RX_RING_COUNT 128 47 #define RT2860_TX_POOL_COUNT (RT2860_TX_RING_COUNT * 2) 48 49 #define RT2860_MAX_SCATTER ((RT2860_TX_RING_COUNT * 2) - 1) 50 51 #define RT2860_RSSI_OFFSET 92 52 53 /* HW supports up to 255 STAs */ 54 #define RT2860_WCID_MAX 254 55 #define RT2860_AID2WCID(aid) ((aid) & 0xff) 56 57 struct dma_area { 58 ddi_acc_handle_t acc_hdl; /* handle for memory */ 59 caddr_t mem_va; /* CPU VA of memory */ 60 uint32_t nslots; /* number of slots */ 61 uint32_t size; /* size per slot */ 62 size_t alength; /* allocated size */ 63 64 ddi_dma_handle_t dma_hdl; /* DMA handle */ 65 offset_t offset; /* relative to handle */ 66 ddi_dma_cookie_t cookie; /* associated cookie */ 67 uint32_t ncookies; /* must be 1 */ 68 uint32_t token; /* arbitrary identifier */ 69 }; 70 71 struct rt2860_txd; 72 73 struct rt2860_tx_data { 74 struct dma_area txbuf_dma; 75 struct rt2860_txwi *txwi; 76 uint32_t paddr; 77 struct ieee80211_node *ni; 78 SLIST_ENTRY(rt2860_tx_data) next; 79 }; 80 81 struct rt2860_tx_ring { 82 struct dma_area txdesc_dma; 83 struct rt2860_txd *txd; 84 uint32_t paddr; 85 struct rt2860_tx_data *data[RT2860_TX_RING_COUNT]; 86 int cur; 87 int next; 88 int queued; 89 }; 90 91 struct rt2860_rx_data { 92 struct dma_area rxbuf_dma; 93 }; 94 95 struct rt2860_rx_ring { 96 struct dma_area rxdesc_dma; 97 struct rt2860_rxd *rxd; 98 uint32_t paddr; 99 unsigned int cur; /* must be unsigned */ 100 struct rt2860_rx_data data[RT2860_RX_RING_COUNT]; 101 }; 102 103 struct rt2860_amrr { 104 uint_t amrr_min_success_threshold; 105 uint_t amrr_max_success_threshold; 106 }; 107 108 struct rt2860_amrr_node { 109 int amn_success; 110 int amn_recovery; 111 int amn_success_threshold; 112 int amn_txcnt; 113 int amn_retrycnt; 114 }; 115 116 #define RT2860_DMA_SYNC(area, flag) ((void) ddi_dma_sync((area).dma_hdl,\ 117 (area).offset, (area).alength, (flag))) 118 #define RT2860_IS_RUNNING(_sc) (((_sc)->sc_flags & RT2860_F_RUNNING)) 119 #define RT2860_IS_INITED(_sc) ((_sc)->sc_flags & RT2860_F_RUNNING) 120 #define RT2860_IS_SUSPEND(_sc) ((_sc)->sc_flags & RT2860_F_SUSPEND) 121 #define RT2860_GLOCK(_sc) mutex_enter(&(_sc)->sc_genlock) 122 #define RT2860_GUNLOCK(_sc) mutex_exit(&(_sc)->sc_genlock) 123 124 125 struct rt2860_softc { 126 struct ieee80211com sc_ic; 127 dev_info_t *sc_dev; 128 129 /* ddi reg handler */ 130 ddi_acc_handle_t sc_cfg_handle; 131 caddr_t sc_cfg_base; 132 /* ddi i/o handler */ 133 ddi_acc_handle_t sc_io_handle; 134 caddr_t sc_io_base; 135 /* interrupt */ 136 ddi_iblock_cookie_t sc_iblock; 137 kmutex_t sc_genlock; 138 kmutex_t sc_txlock; 139 kmutex_t sc_rxlock; 140 timeout_id_t sc_scan_id; 141 timeout_id_t sc_rssadapt_id; 142 timeout_id_t sc_state_id; 143 struct rt2860_amrr amrr; 144 enum ieee80211_state sc_ostate; 145 146 #define RT2860_ENABLED (1 << 0) 147 #define RT2860_FWLOADED (1 << 1) 148 #define RT2860_UPD_BEACON (1 << 2) 149 #define RT2860_ADVANCED_PS (1 << 3) 150 #define RT2860_F_RUNNING (1 << 4) 151 #define RT2860_F_SUSPEND (1 << 5) 152 #define RT2860_F_QUIESCE (1 << 6) 153 154 uint32_t sc_ic_flags; 155 uint32_t sc_dmabuf_size; 156 struct rt2860_tx_ring txq[6]; 157 struct rt2860_rx_ring rxq; 158 159 struct dma_area txpool_dma; 160 struct rt2860_txwi *txwi; 161 struct rt2860_tx_data data[RT2860_TX_POOL_COUNT]; 162 SLIST_HEAD(, rt2860_tx_data) data_pool; 163 164 int sc_tx_timer; 165 int mgtqid; 166 int sifs; 167 168 /* firmware related info */ 169 uint32_t mac_rev; 170 uint8_t rf_rev; 171 uint8_t freq; 172 uint8_t ntxchains; 173 uint8_t nrxchains; 174 uint8_t pslevel; 175 int8_t txpow1[50]; 176 int8_t txpow2[50]; 177 int8_t rssi_2ghz[3]; 178 int8_t rssi_5ghz[3]; 179 uint8_t lna[4]; 180 uint8_t calib_2ghz; 181 uint8_t calib_5ghz; 182 uint8_t tssi_2ghz[9]; 183 uint8_t tssi_5ghz[9]; 184 uint8_t step_2ghz; 185 uint8_t step_5ghz; 186 187 uint32_t sc_need_sched; 188 uint32_t sc_flags; 189 /* RT2860 RCR */ 190 uint32_t sc_rcr; 191 192 uint16_t sc_cachelsz; 193 ddi_softintr_t sc_softintr_hdl; 194 195 uint32_t sc_rx_pend; 196 197 uint32_t rf_regs[4]; 198 uint8_t txpow[14]; 199 200 struct { 201 uint8_t reg; 202 uint8_t val; 203 } bbp[8]; 204 uint8_t leds; 205 uint16_t led[3]; 206 uint32_t txpow20mhz[5]; 207 uint32_t txpow40mhz_2ghz[5]; 208 uint32_t txpow40mhz_5ghz[5]; 209 210 struct rt2860_amrr_node amn[RT2860_WCID_MAX + 1]; 211 212 int led_mode; 213 int hw_radio; 214 int rx_ant; 215 int tx_ant; 216 int nb_ant; 217 218 int dwelltime; 219 220 /* kstats */ 221 uint32_t sc_tx_nobuf; 222 uint32_t sc_rx_nobuf; 223 uint32_t sc_tx_err; 224 uint32_t sc_rx_err; 225 uint32_t sc_tx_retries; 226 227 int (*sc_newstate)(struct ieee80211com *, 228 enum ieee80211_state, int); 229 }; 230 231 #ifdef __cplusplus 232 } 233 #endif 234 235 #endif /* _RT2860_VAR_H */ 236