1 /*
2 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
3 * Use is subject to license terms.
4 */
5
6 /*
7 * Interface for the 93C66/56/46/26/06 serial eeprom parts.
8 *
9 * Copyright (c) 1995, 1996 Daniel M. Eischen
10 * All rights reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice immediately at the beginning of the file, without modification,
17 * this list of conditions, and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. Absolutely no warranty of function or purpose is made by the author
22 * Daniel M. Eischen.
23 * 4. Modifications may be freely made to this file if the above conditions
24 * are met.
25 *
26 * $FreeBSD: src/sys/dev/aic7xxx/93cx6.c,v 1.5 2000/01/07 23:08:17 gibbs Exp $
27 */
28
29 /*
30 * The instruction set of the 93C66/56/46/26/06 chips are as follows:
31 *
32 * Start OP *
33 * Function Bit Code Address** Data Description
34 * -------------------------------------------------------------------
35 * READ 1 10 A5 - A0 Reads data stored in memory,
36 * starting at specified address
37 * EWEN 1 00 11XXXX Write enable must precede
38 * all programming modes
39 * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0
40 * WRITE 1 01 A5 - A0 D15 - D0 Writes register
41 * ERAL 1 00 10XXXX Erase all registers
42 * WRAL 1 00 01XXXX D15 - D0 Writes to all registers
43 * EWDS 1 00 00XXXX Disables all programming
44 * instructions
45 * *Note: A value of X for address is a don't care condition.
46 * **Note: There are 8 address bits for the 93C56/66 chips unlike
47 * the 93C46/26/06 chips which have 6 address bits.
48 *
49 * The 93C46 has a four wire interface: clock, chip select, data in, and
50 * data out. In order to perform one of the above functions, you need
51 * to enable the chip select for a clock period (typically a minimum of
52 * 1 usec, with the clock high and low a minimum of 750 and 250 nsec
53 * respectively). While the chip select remains high, you can clock in
54 * the instructions (above) starting with the start bit, followed by the
55 * OP code, Address, and Data (if needed). For the READ instruction, the
56 * requested 16-bit register contents is read from the data out line but
57 * is preceded by an initial zero (leading 0, followed by 16-bits, MSB
58 * first). The clock cycling from low to high initiates the next data
59 * bit to be sent from the chip.
60 *
61 */
62 #include <sys/sunddi.h>
63 #include "smc93cx6var.h"
64 /*
65 * Right now, we only have to read the SEEPROM. But we make it easier to
66 * add other 93Cx6 functions.
67 */
68 static struct seeprom_cmd {
69 unsigned char len;
70 unsigned char bits[3];
71 } seeprom_read = {3, {1, 1, 0}};
72
73 #define CLOCK_PULSE(sd, rdy) { \
74 /* \
75 * Wait for the SEERDY to go high; about 800 ns. \
76 */ \
77 int cpi = 1000; \
78 if (rdy == 0) { \
79 DELAY(4); /* more than long enough */ \
80 } else { \
81 while ((SEEPROM_STATUS_INB(sd) & rdy) == 0 && \
82 cpi-- > 0) { \
83 cpi = cpi; /* for lint */ \
84 } \
85 (void) SEEPROM_INB(sd); /* Clear clock */ \
86 } \
87 }
88
89 /*
90 * Read the serial EEPROM and returns 1 if successful and 0 if
91 * not successful.
92 */
93 int
read_seeprom(sd,buf,start_addr,count)94 read_seeprom(sd, buf, start_addr, count)
95 struct seeprom_descriptor *sd;
96 uint16_t *buf;
97 size_t start_addr;
98 size_t count;
99 {
100 int i = 0;
101 size_t k = 0;
102 uint16_t v;
103 uint32_t temp;
104
105 /*
106 * Read the requested registers of the seeprom. The loop
107 * will range from 0 to count-1.
108 */
109 for (k = start_addr; k < count + start_addr; k++) {
110 /* Send chip select for one clock cycle. */
111 temp = sd->sd_MS ^ sd->sd_CS;
112 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
113 CLOCK_PULSE(sd, sd->sd_RDY);
114
115 /*
116 * Now we're ready to send the read command followed by the
117 * address of the 16-bit register we want to read.
118 */
119 for (i = 0; i < seeprom_read.len; i++) {
120 if (seeprom_read.bits[i] != 0)
121 temp ^= sd->sd_DO;
122 SEEPROM_OUTB(sd, temp);
123 CLOCK_PULSE(sd, sd->sd_RDY);
124 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
125 CLOCK_PULSE(sd, sd->sd_RDY);
126 if (seeprom_read.bits[i] != 0)
127 temp ^= sd->sd_DO;
128 }
129 /* Send the 6 or 8 bit address (MSB first, LSB last). */
130 for (i = (sd->sd_chip - 1); i >= 0; i--) {
131 if ((k & (1 << i)) != 0)
132 temp ^= sd->sd_DO;
133 SEEPROM_OUTB(sd, temp);
134 CLOCK_PULSE(sd, sd->sd_RDY);
135 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
136 CLOCK_PULSE(sd, sd->sd_RDY);
137 if ((k & (1 << i)) != 0)
138 temp ^= sd->sd_DO;
139 }
140
141 /*
142 * Now read the 16 bit register. An initial 0 precedes the
143 * register contents which begins with bit 15 (MSB) and ends
144 * with bit 0 (LSB). The initial 0 will be shifted off the
145 * top of our word as we let the loop run from 0 to 16.
146 */
147 v = 0;
148 for (i = 16; i >= 0; i--) {
149 SEEPROM_OUTB(sd, temp);
150 CLOCK_PULSE(sd, sd->sd_RDY);
151 v <<= 1;
152 if (SEEPROM_DATA_INB(sd) & sd->sd_DI)
153 v |= 1;
154 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
155 CLOCK_PULSE(sd, sd->sd_RDY);
156 }
157
158 buf[k - start_addr] = v;
159
160 /* Reset the chip select for the next command cycle. */
161 temp = sd->sd_MS;
162 SEEPROM_OUTB(sd, temp);
163 CLOCK_PULSE(sd, sd->sd_RDY);
164 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
165 CLOCK_PULSE(sd, sd->sd_RDY);
166 SEEPROM_OUTB(sd, temp);
167 CLOCK_PULSE(sd, sd->sd_RDY);
168 }
169 #ifdef AHC_DUMP_EEPROM
170 cmn_err(CE_NOTE, "\nSerial EEPROM:\n\t");
171 for (k = 0; k < count; k = k + 1) {
172 cmn_err(CE_NOTE, " 0x%x", buf[k]);
173 }
174 #endif
175 return (1);
176 }
177