1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 1999 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 /* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */ 28 /* Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T */ 29 /* All Rights Reserved */ 30 31 #include <sys/types.h> 32 #include <sys/pic.h> 33 #include <sys/sunddi.h> 34 35 void 36 picsetup() 37 { 38 /* initialize master first */ 39 /* ICW1: Edge-triggered, Cascaded, need ICW4 */ 40 (void) outb(MCMD_PORT, PIC_ICW1BASE|PIC_NEEDICW4); 41 42 /* ICW2: start master vectors at PIC_VECTBASE */ 43 (void) outb(MIMR_PORT, PIC_VECTBASE); 44 45 /* ICW3: define which lines are connected to slaves */ 46 (void) outb(MIMR_PORT, 1 << MASTERLINE); 47 48 /* ICW4: buffered master (?), norm eoi, mcs 86 */ 49 (void) outb(MIMR_PORT, PIC_86MODE); 50 51 /* OCW1: Start the master with all interrupts off */ 52 (void) outb(MIMR_PORT, 0xFF); 53 54 /* OCW3: set master into "read isr mode" */ 55 (void) outb(MCMD_PORT, PIC_READISR); 56 57 /* initialize the slave */ 58 /* ICW1: Edge-triggered, Cascaded, need ICW4 */ 59 (void) outb(SCMD_PORT, PIC_ICW1BASE|PIC_NEEDICW4); 60 61 /* ICW2: set base of vectors */ 62 outb(SIMR_PORT, PIC_VECTBASE + 8); 63 64 /* ICW3: specify ID for this slave */ 65 outb(SIMR_PORT, MASTERLINE); 66 67 /* ICW4: buffered slave (?), norm eoi, mcs 86 */ 68 outb(SIMR_PORT, PIC_86MODE); 69 70 /* OCW1: set interrupt mask */ 71 outb(SIMR_PORT, 0xff); 72 73 /* OCW3: set pic into "read isr mode" */ 74 outb(SCMD_PORT, PIC_READISR); 75 } 76