1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 #include <sys/nxge/nxge_impl.h> 29 30 /* 31 * Tunable Receive Completion Ring Configuration B parameters. 32 */ 33 uint16_t nxge_rx_pkt_thres; /* 16 bits */ 34 uint8_t nxge_rx_pkt_timeout; /* 6 bits based on DMA clock divider */ 35 36 lb_property_t lb_normal = {normal, "normal", nxge_lb_normal}; 37 lb_property_t lb_external10g = {external, "external10g", nxge_lb_ext10g}; 38 lb_property_t lb_external1000 = {external, "external1000", nxge_lb_ext1000}; 39 lb_property_t lb_external100 = {external, "external100", nxge_lb_ext100}; 40 lb_property_t lb_external10 = {external, "external10", nxge_lb_ext10}; 41 lb_property_t lb_phy10g = {internal, "phy10g", nxge_lb_phy10g}; 42 lb_property_t lb_phy1000 = {internal, "phy1000", nxge_lb_phy1000}; 43 lb_property_t lb_phy = {internal, "phy", nxge_lb_phy}; 44 lb_property_t lb_serdes10g = {internal, "serdes10g", nxge_lb_serdes10g}; 45 lb_property_t lb_serdes1000 = {internal, "serdes", nxge_lb_serdes1000}; 46 lb_property_t lb_mac10g = {internal, "mac10g", nxge_lb_mac10g}; 47 lb_property_t lb_mac1000 = {internal, "mac1000", nxge_lb_mac1000}; 48 lb_property_t lb_mac = {internal, "mac10/100", nxge_lb_mac}; 49 50 uint32_t nxge_lb_dbg = 1; 51 void nxge_get_mii(p_nxge_t nxgep, p_mblk_t mp); 52 void nxge_put_mii(p_nxge_t nxgep, p_mblk_t mp); 53 static nxge_status_t nxge_check_xaui_xfp(p_nxge_t nxgep); 54 55 extern uint32_t nxge_rx_mode; 56 extern uint32_t nxge_jumbo_mtu; 57 extern boolean_t nxge_jumbo_enable; 58 59 static void 60 nxge_rtrace_ioctl(p_nxge_t, queue_t *, mblk_t *, struct iocblk *); 61 62 /* ARGSUSED */ 63 nxge_status_t 64 nxge_global_reset(p_nxge_t nxgep) 65 { 66 nxge_status_t status = NXGE_OK; 67 68 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_global_reset")); 69 70 if ((status = nxge_link_monitor(nxgep, LINK_MONITOR_STOP)) != NXGE_OK) 71 return (status); 72 (void) nxge_intr_hw_disable(nxgep); 73 74 if ((nxgep->suspended) || 75 ((nxgep->statsp->port_stats.lb_mode == 76 nxge_lb_phy1000) || 77 (nxgep->statsp->port_stats.lb_mode == 78 nxge_lb_phy10g) || 79 (nxgep->statsp->port_stats.lb_mode == 80 nxge_lb_serdes1000) || 81 (nxgep->statsp->port_stats.lb_mode == 82 nxge_lb_serdes10g))) { 83 if ((status = nxge_link_init(nxgep)) != NXGE_OK) 84 return (status); 85 } 86 87 if ((status = nxge_link_monitor(nxgep, LINK_MONITOR_START)) != NXGE_OK) 88 return (status); 89 if ((status = nxge_mac_init(nxgep)) != NXGE_OK) 90 return (status); 91 (void) nxge_intr_hw_enable(nxgep); 92 93 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_global_reset")); 94 return (status); 95 } 96 97 /* ARGSUSED */ 98 void 99 nxge_hw_id_init(p_nxge_t nxgep) 100 { 101 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_hw_id_init")); 102 /* 103 * Set up initial hardware parameters required such as mac mtu size. 104 */ 105 nxgep->mac.is_jumbo = B_FALSE; 106 nxgep->mac.maxframesize = NXGE_MTU_DEFAULT_MAX; /* 1522 */ 107 if (nxgep->param_arr[param_accept_jumbo].value || nxge_jumbo_enable) { 108 nxgep->mac.maxframesize = (uint16_t)nxge_jumbo_mtu; 109 nxgep->mac.is_jumbo = B_TRUE; 110 } 111 NXGE_DEBUG_MSG((nxgep, DDI_CTL, 112 "==> nxge_hw_id_init: maxframesize %d", 113 nxgep->mac.maxframesize)); 114 115 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_hw_id_init")); 116 } 117 118 /* ARGSUSED */ 119 void 120 nxge_hw_init_niu_common(p_nxge_t nxgep) 121 { 122 p_nxge_hw_list_t hw_p; 123 124 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_hw_init_niu_common")); 125 126 if ((hw_p = nxgep->nxge_hw_p) == NULL) { 127 return; 128 } 129 MUTEX_ENTER(&hw_p->nxge_cfg_lock); 130 if (hw_p->flags & COMMON_INIT_DONE) { 131 NXGE_DEBUG_MSG((nxgep, MOD_CTL, 132 "nxge_hw_init_niu_common" 133 " already done for dip $%p function %d exiting", 134 hw_p->parent_devp, nxgep->function_num)); 135 MUTEX_EXIT(&hw_p->nxge_cfg_lock); 136 return; 137 } 138 139 hw_p->flags = COMMON_INIT_START; 140 NXGE_DEBUG_MSG((nxgep, MOD_CTL, "nxge_hw_init_niu_common" 141 " Started for device id %x with function %d", 142 hw_p->parent_devp, nxgep->function_num)); 143 144 /* per neptune common block init */ 145 (void) nxge_fflp_hw_reset(nxgep); 146 147 hw_p->flags = COMMON_INIT_DONE; 148 MUTEX_EXIT(&hw_p->nxge_cfg_lock); 149 150 NXGE_DEBUG_MSG((nxgep, MOD_CTL, "nxge_hw_init_niu_common" 151 " Done for device id %x with function %d", 152 hw_p->parent_devp, nxgep->function_num)); 153 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_hw_init_niu_common")); 154 } 155 156 /* ARGSUSED */ 157 uint_t 158 nxge_intr(void *arg1, void *arg2) 159 { 160 p_nxge_ldv_t ldvp = (p_nxge_ldv_t)arg1; 161 p_nxge_t nxgep = (p_nxge_t)arg2; 162 uint_t serviced = DDI_INTR_UNCLAIMED; 163 uint8_t ldv; 164 npi_handle_t handle; 165 p_nxge_ldgv_t ldgvp; 166 p_nxge_ldg_t ldgp, t_ldgp; 167 p_nxge_ldv_t t_ldvp; 168 uint64_t vector0 = 0, vector1 = 0, vector2 = 0; 169 int i, j, nldvs, nintrs = 1; 170 npi_status_t rs = NPI_SUCCESS; 171 172 /* DDI interface returns second arg as NULL (n2 niumx driver) !!! */ 173 if (arg2 == NULL || (void *) ldvp->nxgep != arg2) { 174 nxgep = ldvp->nxgep; 175 } 176 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr")); 177 178 if (!(nxgep->drv_state & STATE_HW_INITIALIZED)) { 179 NXGE_ERROR_MSG((nxgep, INT_CTL, 180 "<== nxge_intr: not initialized 0x%x", serviced)); 181 return (serviced); 182 } 183 184 ldgvp = nxgep->ldgvp; 185 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: ldgvp $%p", ldgvp)); 186 if (ldvp == NULL && ldgvp) { 187 t_ldvp = ldvp = ldgvp->ldvp; 188 } 189 if (ldvp) { 190 ldgp = t_ldgp = ldvp->ldgp; 191 } 192 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: " 193 "ldgvp $%p ldvp $%p ldgp $%p", ldgvp, ldvp, ldgp)); 194 if (ldgvp == NULL || ldvp == NULL || ldgp == NULL) { 195 NXGE_ERROR_MSG((nxgep, INT_CTL, "==> nxge_intr: " 196 "ldgvp $%p ldvp $%p ldgp $%p", ldgvp, ldvp, ldgp)); 197 NXGE_ERROR_MSG((nxgep, INT_CTL, "<== nxge_intr: not ready")); 198 return (DDI_INTR_UNCLAIMED); 199 } 200 /* 201 * This interrupt handler will have to go through all the logical 202 * devices to find out which logical device interrupts us and then call 203 * its handler to process the events. 204 */ 205 handle = NXGE_DEV_NPI_HANDLE(nxgep); 206 t_ldgp = ldgp; 207 t_ldvp = ldgp->ldvp; 208 209 nldvs = ldgp->nldvs; 210 211 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: #ldvs %d #intrs %d", 212 nldvs, ldgvp->ldg_intrs)); 213 214 serviced = DDI_INTR_CLAIMED; 215 for (i = 0; i < nintrs; i++, t_ldgp++) { 216 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr(%d): #ldvs %d " 217 " #intrs %d", i, nldvs, nintrs)); 218 /* Get this group's flag bits. */ 219 t_ldgp->interrupted = B_FALSE; 220 rs = npi_ldsv_ldfs_get(handle, t_ldgp->ldg, 221 &vector0, &vector1, &vector2); 222 if (rs) { 223 continue; 224 } 225 if (!vector0 && !vector1 && !vector2) { 226 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: " 227 "no interrupts on group %d", t_ldgp->ldg)); 228 continue; 229 } 230 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: " 231 "vector0 0x%llx vector1 0x%llx vector2 0x%llx", 232 vector0, vector1, vector2)); 233 t_ldgp->interrupted = B_TRUE; 234 nldvs = t_ldgp->nldvs; 235 for (j = 0; j < nldvs; j++, t_ldvp++) { 236 /* 237 * Call device's handler if flag bits are on. 238 */ 239 ldv = t_ldvp->ldv; 240 if (((ldv < NXGE_MAC_LD_START) && 241 (LDV_ON(ldv, vector0) | 242 (LDV_ON(ldv, vector1)))) || 243 (ldv >= NXGE_MAC_LD_START && 244 ((LDV2_ON_1(ldv, vector2)) || 245 (LDV2_ON_2(ldv, vector2))))) { 246 (void) (t_ldvp->ldv_intr_handler)( 247 (caddr_t)t_ldvp, arg2); 248 NXGE_DEBUG_MSG((nxgep, INT_CTL, 249 "==> nxge_intr: " 250 "calling device %d #ldvs %d #intrs %d", 251 j, nldvs, nintrs)); 252 } 253 } 254 } 255 256 t_ldgp = ldgp; 257 for (i = 0; i < nintrs; i++, t_ldgp++) { 258 /* rearm group interrupts */ 259 if (t_ldgp->interrupted) { 260 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: arm " 261 "group %d", t_ldgp->ldg)); 262 (void) npi_intr_ldg_mgmt_set(handle, t_ldgp->ldg, 263 t_ldgp->arm, t_ldgp->ldg_timer); 264 } 265 } 266 267 NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_intr: serviced 0x%x", 268 serviced)); 269 return (serviced); 270 } 271 272 /* ARGSUSED */ 273 static nxge_status_t 274 nxge_check_xaui_xfp(p_nxge_t nxgep) 275 { 276 nxge_status_t status = NXGE_OK; 277 uint8_t phy_port_addr; 278 uint16_t val; 279 uint16_t val1; 280 uint8_t portn; 281 282 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_check_xaui_xfp")); 283 284 portn = nxgep->mac.portnum; 285 phy_port_addr = nxgep->statsp->mac_stats.xcvr_portn; 286 287 if ((status = nxge_mdio_read(nxgep, phy_port_addr, 288 BCM8704_USER_DEV3_ADDR, 289 BCM8704_USER_ANALOG_STATUS0_REG, &val)) == NXGE_OK) { 290 status = nxge_mdio_read(nxgep, phy_port_addr, 291 BCM8704_USER_DEV3_ADDR, 292 BCM8704_USER_TX_ALARM_STATUS_REG, &val1); 293 } 294 if (status != NXGE_OK) { 295 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL, 296 NXGE_FM_EREPORT_XAUI_ERR); 297 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 298 "XAUI is bad or absent on port<%d>\n", portn)); 299 } else if (nxgep->mac.portmode == PORT_10G_FIBER) { 300 /* 301 * 0x03FC = 0000 0011 1111 1100 (XFP is normal) 302 * 0x639C = 0110 0011 1001 1100 (XFP has problem) 303 * bit14 = 1: PDM loss-of-light indicator 304 * bit13 = 1: PDM Rx loss-of-signal 305 * bit6 = 0: Light is NOT ok 306 * bit5 = 0: PMD Rx signal is NOT ok 307 */ 308 if (val == 0x639C) { 309 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL, 310 NXGE_FM_EREPORT_XFP_ERR); 311 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 312 "XFP is bad or absent on port<%d>\n", portn)); 313 status = NXGE_ERROR; 314 } 315 } 316 NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_check_xaui_xfp")); 317 return (status); 318 } 319 320 321 /* ARGSUSED */ 322 uint_t 323 nxge_syserr_intr(void *arg1, void *arg2) 324 { 325 p_nxge_ldv_t ldvp = (p_nxge_ldv_t)arg1; 326 p_nxge_t nxgep = (p_nxge_t)arg2; 327 p_nxge_ldg_t ldgp = NULL; 328 npi_handle_t handle; 329 sys_err_stat_t estat; 330 uint_t serviced = DDI_INTR_UNCLAIMED; 331 332 if (arg1 == NULL && arg2 == NULL) { 333 return (serviced); 334 } 335 if (arg2 == NULL || ((ldvp != NULL && (void *) ldvp->nxgep != arg2))) { 336 if (ldvp != NULL) { 337 nxgep = ldvp->nxgep; 338 } 339 } 340 NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, 341 "==> nxge_syserr_intr: arg2 $%p arg1 $%p", nxgep, ldvp)); 342 if (ldvp != NULL && ldvp->use_timer == B_FALSE) { 343 ldgp = ldvp->ldgp; 344 if (ldgp == NULL) { 345 NXGE_ERROR_MSG((nxgep, SYSERR_CTL, 346 "<== nxge_syserrintr(no logical group): " 347 "arg2 $%p arg1 $%p", nxgep, ldvp)); 348 return (DDI_INTR_UNCLAIMED); 349 } 350 /* 351 * Get the logical device state if the function uses interrupt. 352 */ 353 } 354 355 /* This interrupt handler is for system error interrupts. */ 356 handle = NXGE_DEV_NPI_HANDLE(nxgep); 357 estat.value = 0; 358 (void) npi_fzc_sys_err_stat_get(handle, &estat); 359 NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, 360 "==> nxge_syserr_intr: device error 0x%016llx", estat.value)); 361 362 if (estat.bits.ldw.smx) { 363 /* SMX */ 364 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 365 "==> nxge_syserr_intr: device error - SMX")); 366 } else if (estat.bits.ldw.mac) { 367 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 368 "==> nxge_syserr_intr: device error - MAC")); 369 /* 370 * There is nothing to be done here. All MAC errors go to per 371 * MAC port interrupt. MIF interrupt is the only MAC sub-block 372 * that can generate status here. MIF status reported will be 373 * ignored here. It is checked by per port timer instead. 374 */ 375 } else if (estat.bits.ldw.ipp) { 376 NXGE_DEBUG_MSG((nxgep, NXGE_ERR_CTL, 377 "==> nxge_syserr_intr: device error - IPP")); 378 (void) nxge_ipp_handle_sys_errors(nxgep); 379 } else if (estat.bits.ldw.zcp) { 380 /* ZCP */ 381 NXGE_DEBUG_MSG((nxgep, NXGE_ERR_CTL, 382 "==> nxge_syserr_intr: device error - ZCP")); 383 (void) nxge_zcp_handle_sys_errors(nxgep); 384 } else if (estat.bits.ldw.tdmc) { 385 /* TDMC */ 386 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 387 "==> nxge_syserr_intr: device error - TDMC")); 388 /* 389 * There is no TDMC system errors defined in the PRM. All TDMC 390 * channel specific errors are reported on a per channel basis. 391 */ 392 } else if (estat.bits.ldw.rdmc) { 393 /* RDMC */ 394 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 395 "==> nxge_syserr_intr: device error - RDMC")); 396 (void) nxge_rxdma_handle_sys_errors(nxgep); 397 } else if (estat.bits.ldw.txc) { 398 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 399 "==> nxge_syserr_intr: device error - TXC")); 400 (void) nxge_txc_handle_sys_errors(nxgep); 401 } else if ((nxgep->niu_type != N2_NIU) && estat.bits.ldw.peu) { 402 /* PCI-E */ 403 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 404 "==> nxge_syserr_intr: device error - PCI-E")); 405 } else if (estat.bits.ldw.meta1) { 406 /* META1 */ 407 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 408 "==> nxge_syserr_intr: device error - META1")); 409 } else if (estat.bits.ldw.meta2) { 410 /* META2 */ 411 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 412 "==> nxge_syserr_intr: device error - META2")); 413 } else if (estat.bits.ldw.fflp) { 414 /* FFLP */ 415 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 416 "==> nxge_syserr_intr: device error - FFLP")); 417 (void) nxge_fflp_handle_sys_errors(nxgep); 418 } 419 420 if (nxgep->mac.portmode == PORT_10G_FIBER || 421 nxgep->mac.portmode == PORT_10G_COPPER) { 422 if (nxge_check_xaui_xfp(nxgep) != NXGE_OK) { 423 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 424 "==> nxge_syserr_intr: device error - XAUI")); 425 } 426 } 427 428 serviced = DDI_INTR_CLAIMED; 429 430 if (ldgp != NULL && ldvp != NULL && ldgp->nldvs == 1 && 431 !ldvp->use_timer) { 432 (void) npi_intr_ldg_mgmt_set(handle, ldgp->ldg, 433 B_TRUE, ldgp->ldg_timer); 434 } 435 NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, "<== nxge_syserr_intr")); 436 return (serviced); 437 } 438 439 /* ARGSUSED */ 440 void 441 nxge_intr_hw_enable(p_nxge_t nxgep) 442 { 443 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr_hw_enable")); 444 (void) nxge_intr_mask_mgmt_set(nxgep, B_TRUE); 445 NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_intr_hw_enable")); 446 } 447 448 /* ARGSUSED */ 449 void 450 nxge_intr_hw_disable(p_nxge_t nxgep) 451 { 452 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr_hw_disable")); 453 (void) nxge_intr_mask_mgmt_set(nxgep, B_FALSE); 454 NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_intr_hw_disable")); 455 } 456 457 /* ARGSUSED */ 458 void 459 nxge_rx_hw_blank(void *arg, time_t ticks, uint_t count) 460 { 461 p_nxge_t nxgep = (p_nxge_t)arg; 462 uint8_t channel; 463 npi_handle_t handle; 464 p_nxge_ldgv_t ldgvp; 465 p_nxge_ldv_t ldvp; 466 int i; 467 468 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_rx_hw_blank")); 469 handle = NXGE_DEV_NPI_HANDLE(nxgep); 470 471 if ((ldgvp = nxgep->ldgvp) == NULL) { 472 NXGE_ERROR_MSG((nxgep, INT_CTL, 473 "<== nxge_rx_hw_blank (not enabled)")); 474 return; 475 } 476 ldvp = nxgep->ldgvp->ldvp; 477 if (ldvp == NULL) { 478 return; 479 } 480 for (i = 0; i < ldgvp->nldvs; i++, ldvp++) { 481 if (ldvp->is_rxdma) { 482 channel = ldvp->channel; 483 (void) npi_rxdma_cfg_rdc_rcr_threshold(handle, 484 channel, count); 485 (void) npi_rxdma_cfg_rdc_rcr_timeout(handle, 486 channel, ticks); 487 } 488 } 489 490 NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_rx_hw_blank")); 491 } 492 493 /* ARGSUSED */ 494 void 495 nxge_hw_stop(p_nxge_t nxgep) 496 { 497 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_hw_stop")); 498 499 (void) nxge_tx_mac_disable(nxgep); 500 (void) nxge_rx_mac_disable(nxgep); 501 (void) nxge_txdma_hw_mode(nxgep, NXGE_DMA_STOP); 502 (void) nxge_rxdma_hw_mode(nxgep, NXGE_DMA_STOP); 503 504 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_hw_stop")); 505 } 506 507 /* ARGSUSED */ 508 void 509 nxge_hw_ioctl(p_nxge_t nxgep, queue_t *wq, mblk_t *mp, struct iocblk *iocp) 510 { 511 int cmd; 512 513 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "==> nxge_hw_ioctl")); 514 515 if (nxgep == NULL) { 516 miocnak(wq, mp, 0, EINVAL); 517 return; 518 } 519 iocp->ioc_error = 0; 520 cmd = iocp->ioc_cmd; 521 522 switch (cmd) { 523 default: 524 miocnak(wq, mp, 0, EINVAL); 525 return; 526 527 case NXGE_GET_MII: 528 nxge_get_mii(nxgep, mp->b_cont); 529 miocack(wq, mp, sizeof (uint16_t), 0); 530 break; 531 532 case NXGE_PUT_MII: 533 nxge_put_mii(nxgep, mp->b_cont); 534 miocack(wq, mp, 0, 0); 535 break; 536 537 case NXGE_GET64: 538 nxge_get64(nxgep, mp->b_cont); 539 miocack(wq, mp, sizeof (uint32_t), 0); 540 break; 541 542 case NXGE_PUT64: 543 nxge_put64(nxgep, mp->b_cont); 544 miocack(wq, mp, 0, 0); 545 break; 546 547 case NXGE_PUT_TCAM: 548 nxge_put_tcam(nxgep, mp->b_cont); 549 miocack(wq, mp, 0, 0); 550 break; 551 552 case NXGE_GET_TCAM: 553 nxge_get_tcam(nxgep, mp->b_cont); 554 miocack(wq, mp, 0, 0); 555 break; 556 557 case NXGE_TX_REGS_DUMP: 558 nxge_txdma_regs_dump_channels(nxgep); 559 miocack(wq, mp, 0, 0); 560 break; 561 case NXGE_RX_REGS_DUMP: 562 nxge_rxdma_regs_dump_channels(nxgep); 563 miocack(wq, mp, 0, 0); 564 break; 565 case NXGE_VIR_INT_REGS_DUMP: 566 case NXGE_INT_REGS_DUMP: 567 nxge_virint_regs_dump(nxgep); 568 miocack(wq, mp, 0, 0); 569 break; 570 case NXGE_RTRACE: 571 nxge_rtrace_ioctl(nxgep, wq, mp, iocp); 572 break; 573 } 574 } 575 576 /* ARGSUSED */ 577 void 578 nxge_loopback_ioctl(p_nxge_t nxgep, queue_t *wq, mblk_t *mp, 579 struct iocblk *iocp) 580 { 581 p_lb_property_t lb_props; 582 583 size_t size; 584 int i; 585 586 if (mp->b_cont == NULL) { 587 miocnak(wq, mp, 0, EINVAL); 588 } 589 switch (iocp->ioc_cmd) { 590 case LB_GET_MODE: 591 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "NXGE_GET_LB_MODE command")); 592 if (nxgep != NULL) { 593 *(lb_info_sz_t *)mp->b_cont->b_rptr = 594 nxgep->statsp->port_stats.lb_mode; 595 miocack(wq, mp, sizeof (nxge_lb_t), 0); 596 } else { 597 miocnak(wq, mp, 0, EINVAL); 598 } 599 break; 600 case LB_SET_MODE: 601 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "NXGE_SET_LB_MODE command")); 602 if (iocp->ioc_count != sizeof (uint32_t)) { 603 miocack(wq, mp, 0, 0); 604 break; 605 } 606 if ((nxgep != NULL) && nxge_set_lb(nxgep, wq, mp->b_cont)) { 607 miocack(wq, mp, 0, 0); 608 } else { 609 miocnak(wq, mp, 0, EPROTO); 610 } 611 break; 612 case LB_GET_INFO_SIZE: 613 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "LB_GET_INFO_SIZE command")); 614 if (nxgep != NULL) { 615 size = sizeof (lb_normal); 616 if (nxgep->statsp->mac_stats.cap_10gfdx) { 617 size += sizeof (lb_external10g); 618 size += sizeof (lb_mac10g); 619 /* Publish PHY loopback if PHY is present */ 620 if (nxgep->mac.portmode == PORT_10G_COPPER || 621 nxgep->mac.portmode == PORT_10G_FIBER) 622 size += sizeof (lb_phy10g); 623 } 624 if (nxgep->mac.portmode == PORT_10G_FIBER || 625 nxgep->mac.portmode == PORT_10G_SERDES) 626 size += sizeof (lb_serdes10g); 627 628 if (nxgep->statsp->mac_stats.cap_1000fdx) { 629 size += sizeof (lb_external1000); 630 size += sizeof (lb_mac1000); 631 if ((nxgep->mac.portmode == PORT_1G_COPPER) || 632 (nxgep->mac.portmode == 633 PORT_1G_RGMII_FIBER)) 634 size += sizeof (lb_phy1000); 635 } 636 if (nxgep->statsp->mac_stats.cap_100fdx) 637 size += sizeof (lb_external100); 638 if (nxgep->statsp->mac_stats.cap_10fdx) 639 size += sizeof (lb_external10); 640 if (nxgep->mac.portmode == PORT_1G_FIBER || 641 nxgep->mac.portmode == PORT_1G_SERDES) 642 size += sizeof (lb_serdes1000); 643 644 *(lb_info_sz_t *)mp->b_cont->b_rptr = size; 645 646 NXGE_DEBUG_MSG((nxgep, IOC_CTL, 647 "NXGE_GET_LB_INFO command: size %d", size)); 648 miocack(wq, mp, sizeof (lb_info_sz_t), 0); 649 } else 650 miocnak(wq, mp, 0, EINVAL); 651 break; 652 653 case LB_GET_INFO: 654 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "NXGE_GET_LB_INFO command")); 655 if (nxgep != NULL) { 656 size = sizeof (lb_normal); 657 if (nxgep->statsp->mac_stats.cap_10gfdx) { 658 size += sizeof (lb_external10g); 659 size += sizeof (lb_mac10g); 660 /* Publish PHY loopback if PHY is present */ 661 if (nxgep->mac.portmode == PORT_10G_COPPER || 662 nxgep->mac.portmode == PORT_10G_FIBER) 663 size += sizeof (lb_phy10g); 664 } 665 if (nxgep->mac.portmode == PORT_10G_FIBER || 666 nxgep->mac.portmode == PORT_10G_SERDES) 667 size += sizeof (lb_serdes10g); 668 669 if (nxgep->statsp->mac_stats.cap_1000fdx) { 670 size += sizeof (lb_external1000); 671 size += sizeof (lb_mac1000); 672 if ((nxgep->mac.portmode == PORT_1G_COPPER) || 673 (nxgep->mac.portmode == 674 PORT_1G_RGMII_FIBER)) 675 size += sizeof (lb_phy1000); 676 } 677 if (nxgep->statsp->mac_stats.cap_100fdx) 678 size += sizeof (lb_external100); 679 if (nxgep->statsp->mac_stats.cap_10fdx) 680 size += sizeof (lb_external10); 681 if (nxgep->mac.portmode == PORT_1G_FIBER || 682 nxgep->mac.portmode == PORT_1G_SERDES) 683 size += sizeof (lb_serdes1000); 684 685 NXGE_DEBUG_MSG((nxgep, IOC_CTL, 686 "NXGE_GET_LB_INFO command: size %d", size)); 687 if (size == iocp->ioc_count) { 688 i = 0; 689 lb_props = (p_lb_property_t)mp->b_cont->b_rptr; 690 lb_props[i++] = lb_normal; 691 if (nxgep->statsp->mac_stats.cap_10gfdx) { 692 lb_props[i++] = lb_mac10g; 693 if (nxgep->mac.portmode == 694 PORT_10G_COPPER || 695 nxgep->mac.portmode == 696 PORT_10G_FIBER) 697 lb_props[i++] = lb_phy10g; 698 lb_props[i++] = lb_external10g; 699 } 700 if (nxgep->mac.portmode == PORT_10G_FIBER || 701 nxgep->mac.portmode == PORT_10G_SERDES) 702 lb_props[i++] = lb_serdes10g; 703 704 if (nxgep->statsp->mac_stats.cap_1000fdx) 705 lb_props[i++] = lb_external1000; 706 if (nxgep->statsp->mac_stats.cap_100fdx) 707 lb_props[i++] = lb_external100; 708 if (nxgep->statsp->mac_stats.cap_10fdx) 709 lb_props[i++] = lb_external10; 710 if (nxgep->statsp->mac_stats.cap_1000fdx) 711 lb_props[i++] = lb_mac1000; 712 if ((nxgep->mac.portmode == PORT_1G_COPPER) || 713 (nxgep->mac.portmode == 714 PORT_1G_RGMII_FIBER)) { 715 if (nxgep->statsp->mac_stats. 716 cap_1000fdx) 717 lb_props[i++] = lb_phy1000; 718 } else if ((nxgep->mac.portmode == 719 PORT_1G_FIBER) || 720 (nxgep->mac.portmode == PORT_1G_SERDES)) { 721 lb_props[i++] = lb_serdes1000; 722 } 723 miocack(wq, mp, size, 0); 724 } else 725 miocnak(wq, mp, 0, EINVAL); 726 } else { 727 miocnak(wq, mp, 0, EINVAL); 728 cmn_err(CE_NOTE, "!nxge_hw_ioctl: invalid command 0x%x", 729 iocp->ioc_cmd); 730 } 731 break; 732 } 733 } 734 735 /* 736 * DMA channel interfaces to access various channel specific 737 * hardware functions. 738 */ 739 /* ARGSUSED */ 740 void 741 nxge_rxdma_channel_put64(nxge_os_acc_handle_t handle, void *reg_addrp, 742 uint32_t reg_base, uint16_t channel, uint64_t reg_data) 743 { 744 uint64_t reg_offset; 745 746 NXGE_DEBUG_MSG((NULL, DMA_CTL, "<== nxge_rxdma_channel_put64")); 747 748 /* 749 * Channel is assumed to be from 0 to the maximum DMA channel #. If we 750 * use the virtual DMA CSR address space from the config space (in PCI 751 * case), then the following code need to be use different offset 752 * computation macro. 753 */ 754 reg_offset = reg_base + DMC_OFFSET(channel); 755 NXGE_PIO_WRITE64(handle, reg_addrp, reg_offset, reg_data); 756 757 NXGE_DEBUG_MSG((NULL, DMA_CTL, "<== nxge_rxdma_channel_put64")); 758 } 759 760 /* ARGSUSED */ 761 uint64_t 762 nxge_rxdma_channel_get64(nxge_os_acc_handle_t handle, void *reg_addrp, 763 uint32_t reg_base, uint16_t channel) 764 { 765 uint64_t reg_offset; 766 767 NXGE_DEBUG_MSG((NULL, DMA_CTL, "<== nxge_rxdma_channel_get64")); 768 769 /* 770 * Channel is assumed to be from 0 to the maximum DMA channel #. If we 771 * use the virtual DMA CSR address space from the config space (in PCI 772 * case), then the following code need to be use different offset 773 * computation macro. 774 */ 775 reg_offset = reg_base + DMC_OFFSET(channel); 776 777 NXGE_DEBUG_MSG((NULL, DMA_CTL, "<== nxge_rxdma_channel_get64")); 778 779 return (NXGE_PIO_READ64(handle, reg_addrp, reg_offset)); 780 } 781 782 /* ARGSUSED */ 783 void 784 nxge_get32(p_nxge_t nxgep, p_mblk_t mp) 785 { 786 nxge_os_acc_handle_t nxge_regh; 787 788 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "nxge_get32")); 789 nxge_regh = nxgep->dev_regs->nxge_regh; 790 791 *(uint32_t *)mp->b_rptr = NXGE_PIO_READ32(nxge_regh, 792 nxgep->dev_regs->nxge_regp, *(uint32_t *)mp->b_rptr); 793 794 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "value = 0x%08X", 795 *(uint32_t *)mp->b_rptr)); 796 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "nxge_get32")); 797 } 798 799 /* ARGSUSED */ 800 void 801 nxge_put32(p_nxge_t nxgep, p_mblk_t mp) 802 { 803 nxge_os_acc_handle_t nxge_regh; 804 uint32_t *buf; 805 uint8_t *reg; 806 807 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "nxge_put32")); 808 nxge_regh = nxgep->dev_regs->nxge_regh; 809 810 buf = (uint32_t *)mp->b_rptr; 811 reg = (uint8_t *)(nxgep->dev_regs->nxge_regp) + buf[0]; 812 NXGE_DEBUG_MSG((nxgep, IOC_CTL, 813 "reg = 0x%016llX index = 0x%08X value = 0x%08X", 814 reg, buf[0], buf[1])); 815 NXGE_PIO_WRITE32(nxge_regh, (uint32_t *)reg, 0, buf[1]); 816 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "nxge_put32")); 817 } 818 819 /*ARGSUSED*/ 820 boolean_t 821 nxge_set_lb(p_nxge_t nxgep, queue_t *wq, p_mblk_t mp) 822 { 823 boolean_t status = B_TRUE; 824 uint32_t lb_mode; 825 lb_property_t *lb_info; 826 827 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "<== nxge_set_lb")); 828 lb_mode = nxgep->statsp->port_stats.lb_mode; 829 if (lb_mode == *(uint32_t *)mp->b_rptr) { 830 cmn_err(CE_NOTE, 831 "!nxge%d: Loopback mode already set (lb_mode %d).\n", 832 nxgep->instance, lb_mode); 833 status = B_FALSE; 834 goto nxge_set_lb_exit; 835 } 836 lb_mode = *(uint32_t *)mp->b_rptr; 837 lb_info = NULL; 838 if (lb_mode == lb_normal.value) 839 lb_info = &lb_normal; 840 else if ((lb_mode == lb_external10g.value) && 841 (nxgep->statsp->mac_stats.cap_10gfdx)) 842 lb_info = &lb_external10g; 843 else if ((lb_mode == lb_external1000.value) && 844 (nxgep->statsp->mac_stats.cap_1000fdx)) 845 lb_info = &lb_external1000; 846 else if ((lb_mode == lb_external100.value) && 847 (nxgep->statsp->mac_stats.cap_100fdx)) 848 lb_info = &lb_external100; 849 else if ((lb_mode == lb_external10.value) && 850 (nxgep->statsp->mac_stats.cap_10fdx)) 851 lb_info = &lb_external10; 852 else if ((lb_mode == lb_phy10g.value) && 853 ((nxgep->mac.portmode == PORT_10G_COPPER) || 854 (nxgep->mac.portmode == PORT_10G_FIBER))) 855 lb_info = &lb_phy10g; 856 else if ((lb_mode == lb_phy1000.value) && 857 ((nxgep->mac.portmode == PORT_1G_COPPER) || 858 (nxgep->mac.portmode == PORT_1G_RGMII_FIBER))) 859 lb_info = &lb_phy1000; 860 else if ((lb_mode == lb_phy.value) && 861 (nxgep->mac.portmode == PORT_1G_COPPER)) 862 lb_info = &lb_phy; 863 else if ((lb_mode == lb_serdes10g.value) && 864 ((nxgep->mac.portmode == PORT_10G_FIBER) || 865 (nxgep->mac.portmode == PORT_10G_COPPER) || 866 (nxgep->mac.portmode == PORT_10G_SERDES))) 867 lb_info = &lb_serdes10g; 868 else if ((lb_mode == lb_serdes1000.value) && 869 (nxgep->mac.portmode == PORT_1G_FIBER || 870 (nxgep->mac.portmode == PORT_1G_SERDES))) 871 lb_info = &lb_serdes1000; 872 else if (lb_mode == lb_mac10g.value) 873 lb_info = &lb_mac10g; 874 else if (lb_mode == lb_mac1000.value) 875 lb_info = &lb_mac1000; 876 else if (lb_mode == lb_mac.value) 877 lb_info = &lb_mac; 878 else { 879 cmn_err(CE_NOTE, 880 "!nxge%d: Loopback mode not supported(mode %d).\n", 881 nxgep->instance, lb_mode); 882 status = B_FALSE; 883 goto nxge_set_lb_exit; 884 } 885 886 if (lb_mode == nxge_lb_normal) { 887 if (nxge_lb_dbg) { 888 cmn_err(CE_NOTE, 889 "!nxge%d: Returning to normal operation", 890 nxgep->instance); 891 } 892 if (nxge_set_lb_normal(nxgep) != NXGE_OK) { 893 status = B_FALSE; 894 cmn_err(CE_NOTE, 895 "!nxge%d: Failed to return to normal operation", 896 nxgep->instance); 897 } 898 goto nxge_set_lb_exit; 899 } 900 nxgep->statsp->port_stats.lb_mode = lb_mode; 901 902 if (nxge_lb_dbg) 903 cmn_err(CE_NOTE, 904 "!nxge%d: Adapter now in %s loopback mode", 905 nxgep->instance, lb_info->key); 906 nxgep->param_arr[param_autoneg].value = 0; 907 nxgep->param_arr[param_anar_10gfdx].value = 908 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext10g) || 909 (nxgep->statsp->port_stats.lb_mode == nxge_lb_mac10g) || 910 (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy10g) || 911 (nxgep->statsp->port_stats.lb_mode == nxge_lb_serdes10g); 912 nxgep->param_arr[param_anar_10ghdx].value = 0; 913 nxgep->param_arr[param_anar_1000fdx].value = 914 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext1000) || 915 (nxgep->statsp->port_stats.lb_mode == nxge_lb_mac1000) || 916 (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy1000) || 917 (nxgep->statsp->port_stats.lb_mode == nxge_lb_serdes1000); 918 nxgep->param_arr[param_anar_1000hdx].value = 0; 919 nxgep->param_arr[param_anar_100fdx].value = 920 (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy) || 921 (nxgep->statsp->port_stats.lb_mode == nxge_lb_mac) || 922 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext100); 923 nxgep->param_arr[param_anar_100hdx].value = 0; 924 nxgep->param_arr[param_anar_10fdx].value = 925 (nxgep->statsp->port_stats.lb_mode == nxge_lb_mac) || 926 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext10); 927 if (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext1000) { 928 nxgep->param_arr[param_master_cfg_enable].value = 1; 929 nxgep->param_arr[param_master_cfg_value].value = 1; 930 } 931 if ((nxgep->statsp->port_stats.lb_mode == nxge_lb_ext10g) || 932 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext1000) || 933 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext100) || 934 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext10) || 935 (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy10g) || 936 (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy1000) || 937 (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy)) { 938 939 if (nxge_link_monitor(nxgep, LINK_MONITOR_STOP) != NXGE_OK) 940 goto nxge_set_lb_err; 941 if (nxge_xcvr_find(nxgep) != NXGE_OK) 942 goto nxge_set_lb_err; 943 if (nxge_link_init(nxgep) != NXGE_OK) 944 goto nxge_set_lb_err; 945 if (nxge_link_monitor(nxgep, LINK_MONITOR_START) != NXGE_OK) 946 goto nxge_set_lb_err; 947 } 948 if (lb_info->lb_type == internal) { 949 if ((nxgep->statsp->port_stats.lb_mode == nxge_lb_mac10g) || 950 (nxgep->statsp->port_stats.lb_mode == 951 nxge_lb_phy10g) || 952 (nxgep->statsp->port_stats.lb_mode == 953 nxge_lb_serdes10g)) { 954 nxgep->statsp->mac_stats.link_speed = 10000; 955 } else if ((nxgep->statsp->port_stats.lb_mode 956 == nxge_lb_mac1000) || 957 (nxgep->statsp->port_stats.lb_mode == 958 nxge_lb_phy1000) || 959 (nxgep->statsp->port_stats.lb_mode == 960 nxge_lb_serdes1000)) { 961 nxgep->statsp->mac_stats.link_speed = 1000; 962 } else { 963 nxgep->statsp->mac_stats.link_speed = 100; 964 } 965 nxgep->statsp->mac_stats.link_duplex = 2; 966 nxgep->statsp->mac_stats.link_up = 1; 967 } 968 if (nxge_global_reset(nxgep) != NXGE_OK) 969 goto nxge_set_lb_err; 970 971 nxge_set_lb_exit: 972 NXGE_DEBUG_MSG((nxgep, DDI_CTL, 973 "<== nxge_set_lb status = 0x%08x", status)); 974 return (status); 975 nxge_set_lb_err: 976 status = B_FALSE; 977 cmn_err(CE_NOTE, 978 "!nxge%d: Failed to put adapter in %s loopback mode", 979 nxgep->instance, lb_info->key); 980 return (status); 981 } 982 983 /* ARGSUSED */ 984 nxge_status_t 985 nxge_set_lb_normal(p_nxge_t nxgep) 986 { 987 nxge_status_t status = NXGE_OK; 988 989 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_set_lb_normal")); 990 991 nxgep->statsp->port_stats.lb_mode = nxge_lb_normal; 992 nxgep->param_arr[param_autoneg].value = 993 nxgep->param_arr[param_autoneg].old_value; 994 nxgep->param_arr[param_anar_1000fdx].value = 995 nxgep->param_arr[param_anar_1000fdx].old_value; 996 nxgep->param_arr[param_anar_1000hdx].value = 997 nxgep->param_arr[param_anar_1000hdx].old_value; 998 nxgep->param_arr[param_anar_100fdx].value = 999 nxgep->param_arr[param_anar_100fdx].old_value; 1000 nxgep->param_arr[param_anar_100hdx].value = 1001 nxgep->param_arr[param_anar_100hdx].old_value; 1002 nxgep->param_arr[param_anar_10fdx].value = 1003 nxgep->param_arr[param_anar_10fdx].old_value; 1004 nxgep->param_arr[param_master_cfg_enable].value = 1005 nxgep->param_arr[param_master_cfg_enable].old_value; 1006 nxgep->param_arr[param_master_cfg_value].value = 1007 nxgep->param_arr[param_master_cfg_value].old_value; 1008 1009 if ((status = nxge_global_reset(nxgep)) != NXGE_OK) 1010 return (status); 1011 1012 if ((status = nxge_link_monitor(nxgep, LINK_MONITOR_STOP)) != NXGE_OK) 1013 return (status); 1014 if ((status = nxge_xcvr_find(nxgep)) != NXGE_OK) 1015 return (status); 1016 if ((status = nxge_link_init(nxgep)) != NXGE_OK) 1017 return (status); 1018 status = nxge_link_monitor(nxgep, LINK_MONITOR_START); 1019 1020 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_set_lb_normal")); 1021 1022 return (status); 1023 } 1024 1025 /* ARGSUSED */ 1026 void 1027 nxge_get_mii(p_nxge_t nxgep, p_mblk_t mp) 1028 { 1029 uint16_t reg; 1030 1031 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "==> nxge_get_mii")); 1032 1033 reg = *(uint16_t *)mp->b_rptr; 1034 (void) nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, reg, 1035 (uint16_t *)mp->b_rptr); 1036 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "reg = 0x%08X value = 0x%04X", 1037 reg, *(uint16_t *)mp->b_rptr)); 1038 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "<== nxge_get_mii")); 1039 } 1040 1041 /* ARGSUSED */ 1042 void 1043 nxge_put_mii(p_nxge_t nxgep, p_mblk_t mp) 1044 { 1045 uint16_t *buf; 1046 uint8_t reg; 1047 1048 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "==> nxge_put_mii")); 1049 buf = (uint16_t *)mp->b_rptr; 1050 reg = (uint8_t)buf[0]; 1051 NXGE_DEBUG_MSG((nxgep, IOC_CTL, 1052 "reg = 0x%08X index = 0x%08X value = 0x%08X", 1053 reg, buf[0], buf[1])); 1054 (void) nxge_mii_write(nxgep, nxgep->statsp->mac_stats.xcvr_portn, 1055 reg, buf[1]); 1056 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "<== nxge_put_mii")); 1057 } 1058 1059 /* ARGSUSED */ 1060 void 1061 nxge_check_hw_state(p_nxge_t nxgep) 1062 { 1063 p_nxge_ldgv_t ldgvp; 1064 p_nxge_ldv_t t_ldvp; 1065 1066 NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, "==> nxge_check_hw_state")); 1067 1068 MUTEX_ENTER(nxgep->genlock); 1069 nxgep->nxge_timerid = 0; 1070 if (!(nxgep->drv_state & STATE_HW_INITIALIZED)) { 1071 goto nxge_check_hw_state_exit; 1072 } 1073 nxge_check_tx_hang(nxgep); 1074 1075 ldgvp = nxgep->ldgvp; 1076 if (ldgvp == NULL || (ldgvp->ldvp_syserr == NULL)) { 1077 NXGE_ERROR_MSG((nxgep, SYSERR_CTL, "<== nxge_check_hw_state: " 1078 "NULL ldgvp (interrupt not ready).")); 1079 goto nxge_check_hw_state_exit; 1080 } 1081 t_ldvp = ldgvp->ldvp_syserr; 1082 if (!t_ldvp->use_timer) { 1083 NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, "<== nxge_check_hw_state: " 1084 "ldgvp $%p t_ldvp $%p use_timer flag %d", 1085 ldgvp, t_ldvp, t_ldvp->use_timer)); 1086 goto nxge_check_hw_state_exit; 1087 } 1088 if (fm_check_acc_handle(nxgep->dev_regs->nxge_regh) != DDI_FM_OK) { 1089 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 1090 "port%d Bad register acc handle", nxgep->mac.portnum)); 1091 } 1092 (void) nxge_syserr_intr((void *) t_ldvp, (void *) nxgep); 1093 1094 nxgep->nxge_timerid = nxge_start_timer(nxgep, nxge_check_hw_state, 1095 NXGE_CHECK_TIMER); 1096 1097 nxge_check_hw_state_exit: 1098 MUTEX_EXIT(nxgep->genlock); 1099 NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, "<== nxge_check_hw_state")); 1100 } 1101 1102 /*ARGSUSED*/ 1103 static void 1104 nxge_rtrace_ioctl(p_nxge_t nxgep, queue_t *wq, mblk_t *mp, 1105 struct iocblk *iocp) 1106 { 1107 ssize_t size; 1108 rtrace_t *rtp; 1109 mblk_t *nmp; 1110 uint32_t i, j; 1111 uint32_t start_blk; 1112 uint32_t base_entry; 1113 uint32_t num_entries; 1114 1115 NXGE_DEBUG_MSG((nxgep, STR_CTL, "==> nxge_rtrace_ioctl")); 1116 1117 size = 1024; 1118 if (mp->b_cont == NULL || MBLKL(mp->b_cont) < size) { 1119 NXGE_DEBUG_MSG((nxgep, STR_CTL, 1120 "malformed M_IOCTL MBLKL = %d size = %d", 1121 MBLKL(mp->b_cont), size)); 1122 miocnak(wq, mp, 0, EINVAL); 1123 return; 1124 } 1125 nmp = mp->b_cont; 1126 rtp = (rtrace_t *)nmp->b_rptr; 1127 start_blk = rtp->next_idx; 1128 num_entries = rtp->last_idx; 1129 base_entry = start_blk * MAX_RTRACE_IOC_ENTRIES; 1130 1131 NXGE_DEBUG_MSG((nxgep, STR_CTL, "start_blk = %d\n", start_blk)); 1132 NXGE_DEBUG_MSG((nxgep, STR_CTL, "num_entries = %d\n", num_entries)); 1133 NXGE_DEBUG_MSG((nxgep, STR_CTL, "base_entry = %d\n", base_entry)); 1134 1135 rtp->next_idx = npi_rtracebuf.next_idx; 1136 rtp->last_idx = npi_rtracebuf.last_idx; 1137 rtp->wrapped = npi_rtracebuf.wrapped; 1138 for (i = 0, j = base_entry; i < num_entries; i++, j++) { 1139 rtp->buf[i].ctl_addr = npi_rtracebuf.buf[j].ctl_addr; 1140 rtp->buf[i].val_l32 = npi_rtracebuf.buf[j].val_l32; 1141 rtp->buf[i].val_h32 = npi_rtracebuf.buf[j].val_h32; 1142 } 1143 1144 nmp->b_wptr = nmp->b_rptr + size; 1145 NXGE_DEBUG_MSG((nxgep, STR_CTL, "<== nxge_rtrace_ioctl")); 1146 miocack(wq, mp, (int)size, 0); 1147 } 1148