1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 #include <sys/nxge/nxge_impl.h> 29 30 /* 31 * Tunable Receive Completion Ring Configuration B parameters. 32 */ 33 uint16_t nxge_rx_pkt_thres; /* 16 bits */ 34 uint8_t nxge_rx_pkt_timeout; /* 6 bits based on DMA clock divider */ 35 36 lb_property_t lb_normal = {normal, "normal", nxge_lb_normal}; 37 lb_property_t lb_external10g = {external, "external10g", nxge_lb_ext10g}; 38 lb_property_t lb_external1000 = {external, "external1000", nxge_lb_ext1000}; 39 lb_property_t lb_external100 = {external, "external100", nxge_lb_ext100}; 40 lb_property_t lb_external10 = {external, "external10", nxge_lb_ext10}; 41 lb_property_t lb_phy10g = {internal, "phy10g", nxge_lb_phy10g}; 42 lb_property_t lb_phy1000 = {internal, "phy1000", nxge_lb_phy1000}; 43 lb_property_t lb_phy = {internal, "phy", nxge_lb_phy}; 44 lb_property_t lb_serdes10g = {internal, "serdes10g", nxge_lb_serdes10g}; 45 lb_property_t lb_serdes1000 = {internal, "serdes", nxge_lb_serdes1000}; 46 lb_property_t lb_mac10g = {internal, "mac10g", nxge_lb_mac10g}; 47 lb_property_t lb_mac1000 = {internal, "mac1000", nxge_lb_mac1000}; 48 lb_property_t lb_mac = {internal, "mac10/100", nxge_lb_mac}; 49 50 uint32_t nxge_lb_dbg = 1; 51 void nxge_get_mii(p_nxge_t nxgep, p_mblk_t mp); 52 void nxge_put_mii(p_nxge_t nxgep, p_mblk_t mp); 53 static nxge_status_t nxge_check_xaui_xfp(p_nxge_t nxgep); 54 55 extern uint32_t nxge_rx_mode; 56 extern uint32_t nxge_jumbo_mtu; 57 extern boolean_t nxge_jumbo_enable; 58 59 static void 60 nxge_rtrace_ioctl(p_nxge_t, queue_t *, mblk_t *, struct iocblk *); 61 62 /* ARGSUSED */ 63 nxge_status_t 64 nxge_global_reset(p_nxge_t nxgep) 65 { 66 nxge_status_t status = NXGE_OK; 67 68 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_global_reset")); 69 70 if ((status = nxge_link_monitor(nxgep, LINK_MONITOR_STOP)) != NXGE_OK) 71 return (status); 72 (void) nxge_intr_hw_disable(nxgep); 73 74 if ((nxgep->suspended) || 75 ((nxgep->statsp->port_stats.lb_mode == 76 nxge_lb_phy1000) || 77 (nxgep->statsp->port_stats.lb_mode == 78 nxge_lb_phy10g) || 79 (nxgep->statsp->port_stats.lb_mode == 80 nxge_lb_serdes1000) || 81 (nxgep->statsp->port_stats.lb_mode == 82 nxge_lb_serdes10g))) { 83 if ((status = nxge_link_init(nxgep)) != NXGE_OK) 84 return (status); 85 } 86 87 if ((status = nxge_link_monitor(nxgep, LINK_MONITOR_START)) != NXGE_OK) 88 return (status); 89 if ((status = nxge_mac_init(nxgep)) != NXGE_OK) 90 return (status); 91 (void) nxge_intr_hw_enable(nxgep); 92 93 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_global_reset")); 94 return (status); 95 } 96 97 /* ARGSUSED */ 98 void 99 nxge_hw_id_init(p_nxge_t nxgep) 100 { 101 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_hw_id_init")); 102 /* 103 * Set up initial hardware parameters required such as mac mtu size. 104 */ 105 nxgep->mac.is_jumbo = B_FALSE; 106 /* 107 * Set the maxframe size to 1522 (1518 + 4) to account for 108 * VLAN tagged packets. 109 */ 110 nxgep->mac.minframesize = NXGE_MIN_MAC_FRAMESIZE; /* 64 */ 111 nxgep->mac.maxframesize = NXGE_MAX_MAC_FRAMESIZE; /* 1522 */ 112 if (nxgep->param_arr[param_accept_jumbo].value || nxge_jumbo_enable) { 113 nxgep->mac.maxframesize = (uint16_t)nxge_jumbo_mtu; 114 nxgep->mac.is_jumbo = B_TRUE; 115 } 116 NXGE_DEBUG_MSG((nxgep, DDI_CTL, 117 "==> nxge_hw_id_init: maxframesize %d", 118 nxgep->mac.maxframesize)); 119 120 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_hw_id_init")); 121 } 122 123 /* ARGSUSED */ 124 void 125 nxge_hw_init_niu_common(p_nxge_t nxgep) 126 { 127 p_nxge_hw_list_t hw_p; 128 129 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_hw_init_niu_common")); 130 131 if ((hw_p = nxgep->nxge_hw_p) == NULL) { 132 return; 133 } 134 MUTEX_ENTER(&hw_p->nxge_cfg_lock); 135 if (hw_p->flags & COMMON_INIT_DONE) { 136 NXGE_DEBUG_MSG((nxgep, MOD_CTL, 137 "nxge_hw_init_niu_common" 138 " already done for dip $%p function %d exiting", 139 hw_p->parent_devp, nxgep->function_num)); 140 MUTEX_EXIT(&hw_p->nxge_cfg_lock); 141 return; 142 } 143 144 hw_p->flags = COMMON_INIT_START; 145 NXGE_DEBUG_MSG((nxgep, MOD_CTL, "nxge_hw_init_niu_common" 146 " Started for device id %x with function %d", 147 hw_p->parent_devp, nxgep->function_num)); 148 149 /* per neptune common block init */ 150 (void) nxge_fflp_hw_reset(nxgep); 151 152 hw_p->flags = COMMON_INIT_DONE; 153 MUTEX_EXIT(&hw_p->nxge_cfg_lock); 154 155 NXGE_DEBUG_MSG((nxgep, MOD_CTL, "nxge_hw_init_niu_common" 156 " Done for device id %x with function %d", 157 hw_p->parent_devp, nxgep->function_num)); 158 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_hw_init_niu_common")); 159 } 160 161 /* ARGSUSED */ 162 uint_t 163 nxge_intr(void *arg1, void *arg2) 164 { 165 p_nxge_ldv_t ldvp = (p_nxge_ldv_t)arg1; 166 p_nxge_t nxgep = (p_nxge_t)arg2; 167 uint_t serviced = DDI_INTR_UNCLAIMED; 168 uint8_t ldv; 169 npi_handle_t handle; 170 p_nxge_ldgv_t ldgvp; 171 p_nxge_ldg_t ldgp, t_ldgp; 172 p_nxge_ldv_t t_ldvp; 173 uint64_t vector0 = 0, vector1 = 0, vector2 = 0; 174 int i, j, nldvs, nintrs = 1; 175 npi_status_t rs = NPI_SUCCESS; 176 177 /* DDI interface returns second arg as NULL (n2 niumx driver) !!! */ 178 if (arg2 == NULL || (void *) ldvp->nxgep != arg2) { 179 nxgep = ldvp->nxgep; 180 } 181 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr")); 182 183 if (!(nxgep->drv_state & STATE_HW_INITIALIZED)) { 184 NXGE_ERROR_MSG((nxgep, INT_CTL, 185 "<== nxge_intr: not initialized 0x%x", serviced)); 186 return (serviced); 187 } 188 189 ldgvp = nxgep->ldgvp; 190 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: ldgvp $%p", ldgvp)); 191 if (ldvp == NULL && ldgvp) { 192 t_ldvp = ldvp = ldgvp->ldvp; 193 } 194 if (ldvp) { 195 ldgp = t_ldgp = ldvp->ldgp; 196 } 197 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: " 198 "ldgvp $%p ldvp $%p ldgp $%p", ldgvp, ldvp, ldgp)); 199 if (ldgvp == NULL || ldvp == NULL || ldgp == NULL) { 200 NXGE_ERROR_MSG((nxgep, INT_CTL, "==> nxge_intr: " 201 "ldgvp $%p ldvp $%p ldgp $%p", ldgvp, ldvp, ldgp)); 202 NXGE_ERROR_MSG((nxgep, INT_CTL, "<== nxge_intr: not ready")); 203 return (DDI_INTR_UNCLAIMED); 204 } 205 /* 206 * This interrupt handler will have to go through all the logical 207 * devices to find out which logical device interrupts us and then call 208 * its handler to process the events. 209 */ 210 handle = NXGE_DEV_NPI_HANDLE(nxgep); 211 t_ldgp = ldgp; 212 t_ldvp = ldgp->ldvp; 213 214 nldvs = ldgp->nldvs; 215 216 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: #ldvs %d #intrs %d", 217 nldvs, ldgvp->ldg_intrs)); 218 219 serviced = DDI_INTR_CLAIMED; 220 for (i = 0; i < nintrs; i++, t_ldgp++) { 221 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr(%d): #ldvs %d " 222 " #intrs %d", i, nldvs, nintrs)); 223 /* Get this group's flag bits. */ 224 t_ldgp->interrupted = B_FALSE; 225 rs = npi_ldsv_ldfs_get(handle, t_ldgp->ldg, 226 &vector0, &vector1, &vector2); 227 if (rs) { 228 continue; 229 } 230 if (!vector0 && !vector1 && !vector2) { 231 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: " 232 "no interrupts on group %d", t_ldgp->ldg)); 233 continue; 234 } 235 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: " 236 "vector0 0x%llx vector1 0x%llx vector2 0x%llx", 237 vector0, vector1, vector2)); 238 t_ldgp->interrupted = B_TRUE; 239 nldvs = t_ldgp->nldvs; 240 for (j = 0; j < nldvs; j++, t_ldvp++) { 241 /* 242 * Call device's handler if flag bits are on. 243 */ 244 ldv = t_ldvp->ldv; 245 if (((ldv < NXGE_MAC_LD_START) && 246 (LDV_ON(ldv, vector0) | 247 (LDV_ON(ldv, vector1)))) || 248 (ldv >= NXGE_MAC_LD_START && 249 ((LDV2_ON_1(ldv, vector2)) || 250 (LDV2_ON_2(ldv, vector2))))) { 251 (void) (t_ldvp->ldv_intr_handler)( 252 (caddr_t)t_ldvp, arg2); 253 NXGE_DEBUG_MSG((nxgep, INT_CTL, 254 "==> nxge_intr: " 255 "calling device %d #ldvs %d #intrs %d", 256 j, nldvs, nintrs)); 257 } 258 } 259 } 260 261 t_ldgp = ldgp; 262 for (i = 0; i < nintrs; i++, t_ldgp++) { 263 /* rearm group interrupts */ 264 if (t_ldgp->interrupted) { 265 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: arm " 266 "group %d", t_ldgp->ldg)); 267 (void) npi_intr_ldg_mgmt_set(handle, t_ldgp->ldg, 268 t_ldgp->arm, t_ldgp->ldg_timer); 269 } 270 } 271 272 NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_intr: serviced 0x%x", 273 serviced)); 274 return (serviced); 275 } 276 277 /* ARGSUSED */ 278 static nxge_status_t 279 nxge_check_xaui_xfp(p_nxge_t nxgep) 280 { 281 nxge_status_t status = NXGE_OK; 282 uint8_t phy_port_addr; 283 uint16_t val; 284 uint16_t val1; 285 uint8_t portn; 286 287 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_check_xaui_xfp")); 288 289 portn = nxgep->mac.portnum; 290 phy_port_addr = nxgep->statsp->mac_stats.xcvr_portn; 291 292 if ((status = nxge_mdio_read(nxgep, phy_port_addr, 293 BCM8704_USER_DEV3_ADDR, 294 BCM8704_USER_ANALOG_STATUS0_REG, &val)) == NXGE_OK) { 295 status = nxge_mdio_read(nxgep, phy_port_addr, 296 BCM8704_USER_DEV3_ADDR, 297 BCM8704_USER_TX_ALARM_STATUS_REG, &val1); 298 } 299 if (status != NXGE_OK) { 300 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL, 301 NXGE_FM_EREPORT_XAUI_ERR); 302 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 303 "XAUI is bad or absent on port<%d>\n", portn)); 304 } else if (nxgep->mac.portmode == PORT_10G_FIBER) { 305 /* 306 * 0x03FC = 0000 0011 1111 1100 (XFP is normal) 307 * 0x639C = 0110 0011 1001 1100 (XFP has problem) 308 * bit14 = 1: PDM loss-of-light indicator 309 * bit13 = 1: PDM Rx loss-of-signal 310 * bit6 = 0: Light is NOT ok 311 * bit5 = 0: PMD Rx signal is NOT ok 312 */ 313 if (val == 0x639C) { 314 NXGE_FM_REPORT_ERROR(nxgep, portn, NULL, 315 NXGE_FM_EREPORT_XFP_ERR); 316 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 317 "XFP is bad or absent on port<%d>\n", portn)); 318 status = NXGE_ERROR; 319 } 320 } 321 NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_check_xaui_xfp")); 322 return (status); 323 } 324 325 326 /* ARGSUSED */ 327 uint_t 328 nxge_syserr_intr(void *arg1, void *arg2) 329 { 330 p_nxge_ldv_t ldvp = (p_nxge_ldv_t)arg1; 331 p_nxge_t nxgep = (p_nxge_t)arg2; 332 p_nxge_ldg_t ldgp = NULL; 333 npi_handle_t handle; 334 sys_err_stat_t estat; 335 uint_t serviced = DDI_INTR_UNCLAIMED; 336 337 if (arg1 == NULL && arg2 == NULL) { 338 return (serviced); 339 } 340 if (arg2 == NULL || ((ldvp != NULL && (void *) ldvp->nxgep != arg2))) { 341 if (ldvp != NULL) { 342 nxgep = ldvp->nxgep; 343 } 344 } 345 NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, 346 "==> nxge_syserr_intr: arg2 $%p arg1 $%p", nxgep, ldvp)); 347 if (ldvp != NULL && ldvp->use_timer == B_FALSE) { 348 ldgp = ldvp->ldgp; 349 if (ldgp == NULL) { 350 NXGE_ERROR_MSG((nxgep, SYSERR_CTL, 351 "<== nxge_syserrintr(no logical group): " 352 "arg2 $%p arg1 $%p", nxgep, ldvp)); 353 return (DDI_INTR_UNCLAIMED); 354 } 355 /* 356 * Get the logical device state if the function uses interrupt. 357 */ 358 } 359 360 /* This interrupt handler is for system error interrupts. */ 361 handle = NXGE_DEV_NPI_HANDLE(nxgep); 362 estat.value = 0; 363 (void) npi_fzc_sys_err_stat_get(handle, &estat); 364 NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, 365 "==> nxge_syserr_intr: device error 0x%016llx", estat.value)); 366 367 if (estat.bits.ldw.smx) { 368 /* SMX */ 369 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 370 "==> nxge_syserr_intr: device error - SMX")); 371 } else if (estat.bits.ldw.mac) { 372 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 373 "==> nxge_syserr_intr: device error - MAC")); 374 /* 375 * There is nothing to be done here. All MAC errors go to per 376 * MAC port interrupt. MIF interrupt is the only MAC sub-block 377 * that can generate status here. MIF status reported will be 378 * ignored here. It is checked by per port timer instead. 379 */ 380 } else if (estat.bits.ldw.ipp) { 381 NXGE_DEBUG_MSG((nxgep, NXGE_ERR_CTL, 382 "==> nxge_syserr_intr: device error - IPP")); 383 (void) nxge_ipp_handle_sys_errors(nxgep); 384 } else if (estat.bits.ldw.zcp) { 385 /* ZCP */ 386 NXGE_DEBUG_MSG((nxgep, NXGE_ERR_CTL, 387 "==> nxge_syserr_intr: device error - ZCP")); 388 (void) nxge_zcp_handle_sys_errors(nxgep); 389 } else if (estat.bits.ldw.tdmc) { 390 /* TDMC */ 391 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 392 "==> nxge_syserr_intr: device error - TDMC")); 393 /* 394 * There is no TDMC system errors defined in the PRM. All TDMC 395 * channel specific errors are reported on a per channel basis. 396 */ 397 } else if (estat.bits.ldw.rdmc) { 398 /* RDMC */ 399 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 400 "==> nxge_syserr_intr: device error - RDMC")); 401 (void) nxge_rxdma_handle_sys_errors(nxgep); 402 } else if (estat.bits.ldw.txc) { 403 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 404 "==> nxge_syserr_intr: device error - TXC")); 405 (void) nxge_txc_handle_sys_errors(nxgep); 406 } else if ((nxgep->niu_type != N2_NIU) && estat.bits.ldw.peu) { 407 /* PCI-E */ 408 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 409 "==> nxge_syserr_intr: device error - PCI-E")); 410 } else if (estat.bits.ldw.meta1) { 411 /* META1 */ 412 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 413 "==> nxge_syserr_intr: device error - META1")); 414 } else if (estat.bits.ldw.meta2) { 415 /* META2 */ 416 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 417 "==> nxge_syserr_intr: device error - META2")); 418 } else if (estat.bits.ldw.fflp) { 419 /* FFLP */ 420 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 421 "==> nxge_syserr_intr: device error - FFLP")); 422 (void) nxge_fflp_handle_sys_errors(nxgep); 423 } 424 425 if (nxgep->mac.portmode == PORT_10G_FIBER || 426 nxgep->mac.portmode == PORT_10G_COPPER) { 427 if (nxge_check_xaui_xfp(nxgep) != NXGE_OK) { 428 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 429 "==> nxge_syserr_intr: device error - XAUI")); 430 } 431 } 432 433 serviced = DDI_INTR_CLAIMED; 434 435 if (ldgp != NULL && ldvp != NULL && ldgp->nldvs == 1 && 436 !ldvp->use_timer) { 437 (void) npi_intr_ldg_mgmt_set(handle, ldgp->ldg, 438 B_TRUE, ldgp->ldg_timer); 439 } 440 NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, "<== nxge_syserr_intr")); 441 return (serviced); 442 } 443 444 /* ARGSUSED */ 445 void 446 nxge_intr_hw_enable(p_nxge_t nxgep) 447 { 448 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr_hw_enable")); 449 (void) nxge_intr_mask_mgmt_set(nxgep, B_TRUE); 450 NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_intr_hw_enable")); 451 } 452 453 /* ARGSUSED */ 454 void 455 nxge_intr_hw_disable(p_nxge_t nxgep) 456 { 457 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr_hw_disable")); 458 (void) nxge_intr_mask_mgmt_set(nxgep, B_FALSE); 459 NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_intr_hw_disable")); 460 } 461 462 /* ARGSUSED */ 463 void 464 nxge_rx_hw_blank(void *arg, time_t ticks, uint_t count) 465 { 466 p_nxge_t nxgep = (p_nxge_t)arg; 467 uint8_t channel; 468 npi_handle_t handle; 469 p_nxge_ldgv_t ldgvp; 470 p_nxge_ldv_t ldvp; 471 int i; 472 473 NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_rx_hw_blank")); 474 handle = NXGE_DEV_NPI_HANDLE(nxgep); 475 476 if ((ldgvp = nxgep->ldgvp) == NULL) { 477 NXGE_ERROR_MSG((nxgep, INT_CTL, 478 "<== nxge_rx_hw_blank (not enabled)")); 479 return; 480 } 481 ldvp = nxgep->ldgvp->ldvp; 482 if (ldvp == NULL) { 483 return; 484 } 485 for (i = 0; i < ldgvp->nldvs; i++, ldvp++) { 486 if (ldvp->is_rxdma) { 487 channel = ldvp->channel; 488 (void) npi_rxdma_cfg_rdc_rcr_threshold(handle, 489 channel, count); 490 (void) npi_rxdma_cfg_rdc_rcr_timeout(handle, 491 channel, ticks); 492 } 493 } 494 495 NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_rx_hw_blank")); 496 } 497 498 /* ARGSUSED */ 499 void 500 nxge_hw_stop(p_nxge_t nxgep) 501 { 502 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_hw_stop")); 503 504 (void) nxge_tx_mac_disable(nxgep); 505 (void) nxge_rx_mac_disable(nxgep); 506 (void) nxge_txdma_hw_mode(nxgep, NXGE_DMA_STOP); 507 (void) nxge_rxdma_hw_mode(nxgep, NXGE_DMA_STOP); 508 509 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_hw_stop")); 510 } 511 512 /* ARGSUSED */ 513 void 514 nxge_hw_ioctl(p_nxge_t nxgep, queue_t *wq, mblk_t *mp, struct iocblk *iocp) 515 { 516 int cmd; 517 518 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "==> nxge_hw_ioctl")); 519 520 if (nxgep == NULL) { 521 miocnak(wq, mp, 0, EINVAL); 522 return; 523 } 524 iocp->ioc_error = 0; 525 cmd = iocp->ioc_cmd; 526 527 switch (cmd) { 528 default: 529 miocnak(wq, mp, 0, EINVAL); 530 return; 531 532 case NXGE_GET_MII: 533 nxge_get_mii(nxgep, mp->b_cont); 534 miocack(wq, mp, sizeof (uint16_t), 0); 535 break; 536 537 case NXGE_PUT_MII: 538 nxge_put_mii(nxgep, mp->b_cont); 539 miocack(wq, mp, 0, 0); 540 break; 541 542 case NXGE_GET64: 543 nxge_get64(nxgep, mp->b_cont); 544 miocack(wq, mp, sizeof (uint32_t), 0); 545 break; 546 547 case NXGE_PUT64: 548 nxge_put64(nxgep, mp->b_cont); 549 miocack(wq, mp, 0, 0); 550 break; 551 552 case NXGE_PUT_TCAM: 553 nxge_put_tcam(nxgep, mp->b_cont); 554 miocack(wq, mp, 0, 0); 555 break; 556 557 case NXGE_GET_TCAM: 558 nxge_get_tcam(nxgep, mp->b_cont); 559 miocack(wq, mp, 0, 0); 560 break; 561 562 case NXGE_TX_REGS_DUMP: 563 nxge_txdma_regs_dump_channels(nxgep); 564 miocack(wq, mp, 0, 0); 565 break; 566 case NXGE_RX_REGS_DUMP: 567 nxge_rxdma_regs_dump_channels(nxgep); 568 miocack(wq, mp, 0, 0); 569 break; 570 case NXGE_VIR_INT_REGS_DUMP: 571 case NXGE_INT_REGS_DUMP: 572 nxge_virint_regs_dump(nxgep); 573 miocack(wq, mp, 0, 0); 574 break; 575 case NXGE_RTRACE: 576 nxge_rtrace_ioctl(nxgep, wq, mp, iocp); 577 break; 578 } 579 } 580 581 /* ARGSUSED */ 582 void 583 nxge_loopback_ioctl(p_nxge_t nxgep, queue_t *wq, mblk_t *mp, 584 struct iocblk *iocp) 585 { 586 p_lb_property_t lb_props; 587 588 size_t size; 589 int i; 590 591 if (mp->b_cont == NULL) { 592 miocnak(wq, mp, 0, EINVAL); 593 } 594 switch (iocp->ioc_cmd) { 595 case LB_GET_MODE: 596 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "NXGE_GET_LB_MODE command")); 597 if (nxgep != NULL) { 598 *(lb_info_sz_t *)mp->b_cont->b_rptr = 599 nxgep->statsp->port_stats.lb_mode; 600 miocack(wq, mp, sizeof (nxge_lb_t), 0); 601 } else { 602 miocnak(wq, mp, 0, EINVAL); 603 } 604 break; 605 case LB_SET_MODE: 606 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "NXGE_SET_LB_MODE command")); 607 if (iocp->ioc_count != sizeof (uint32_t)) { 608 miocack(wq, mp, 0, 0); 609 break; 610 } 611 if ((nxgep != NULL) && nxge_set_lb(nxgep, wq, mp->b_cont)) { 612 miocack(wq, mp, 0, 0); 613 } else { 614 miocnak(wq, mp, 0, EPROTO); 615 } 616 break; 617 case LB_GET_INFO_SIZE: 618 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "LB_GET_INFO_SIZE command")); 619 if (nxgep != NULL) { 620 size = sizeof (lb_normal); 621 if (nxgep->statsp->mac_stats.cap_10gfdx) { 622 size += sizeof (lb_external10g); 623 size += sizeof (lb_mac10g); 624 /* Publish PHY loopback if PHY is present */ 625 if (nxgep->mac.portmode == PORT_10G_COPPER || 626 nxgep->mac.portmode == PORT_10G_FIBER) 627 size += sizeof (lb_phy10g); 628 } 629 if (nxgep->mac.portmode == PORT_10G_FIBER || 630 nxgep->mac.portmode == PORT_10G_SERDES) 631 size += sizeof (lb_serdes10g); 632 633 if (nxgep->statsp->mac_stats.cap_1000fdx) { 634 size += sizeof (lb_external1000); 635 size += sizeof (lb_mac1000); 636 if ((nxgep->mac.portmode == PORT_1G_COPPER) || 637 (nxgep->mac.portmode == 638 PORT_1G_RGMII_FIBER)) 639 size += sizeof (lb_phy1000); 640 } 641 if (nxgep->statsp->mac_stats.cap_100fdx) 642 size += sizeof (lb_external100); 643 if (nxgep->statsp->mac_stats.cap_10fdx) 644 size += sizeof (lb_external10); 645 if (nxgep->mac.portmode == PORT_1G_FIBER || 646 nxgep->mac.portmode == PORT_1G_SERDES) 647 size += sizeof (lb_serdes1000); 648 649 *(lb_info_sz_t *)mp->b_cont->b_rptr = size; 650 651 NXGE_DEBUG_MSG((nxgep, IOC_CTL, 652 "NXGE_GET_LB_INFO command: size %d", size)); 653 miocack(wq, mp, sizeof (lb_info_sz_t), 0); 654 } else 655 miocnak(wq, mp, 0, EINVAL); 656 break; 657 658 case LB_GET_INFO: 659 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "NXGE_GET_LB_INFO command")); 660 if (nxgep != NULL) { 661 size = sizeof (lb_normal); 662 if (nxgep->statsp->mac_stats.cap_10gfdx) { 663 size += sizeof (lb_external10g); 664 size += sizeof (lb_mac10g); 665 /* Publish PHY loopback if PHY is present */ 666 if (nxgep->mac.portmode == PORT_10G_COPPER || 667 nxgep->mac.portmode == PORT_10G_FIBER) 668 size += sizeof (lb_phy10g); 669 } 670 if (nxgep->mac.portmode == PORT_10G_FIBER || 671 nxgep->mac.portmode == PORT_10G_SERDES) 672 size += sizeof (lb_serdes10g); 673 674 if (nxgep->statsp->mac_stats.cap_1000fdx) { 675 size += sizeof (lb_external1000); 676 size += sizeof (lb_mac1000); 677 if ((nxgep->mac.portmode == PORT_1G_COPPER) || 678 (nxgep->mac.portmode == 679 PORT_1G_RGMII_FIBER)) 680 size += sizeof (lb_phy1000); 681 } 682 if (nxgep->statsp->mac_stats.cap_100fdx) 683 size += sizeof (lb_external100); 684 if (nxgep->statsp->mac_stats.cap_10fdx) 685 size += sizeof (lb_external10); 686 if (nxgep->mac.portmode == PORT_1G_FIBER || 687 nxgep->mac.portmode == PORT_1G_SERDES) 688 size += sizeof (lb_serdes1000); 689 690 NXGE_DEBUG_MSG((nxgep, IOC_CTL, 691 "NXGE_GET_LB_INFO command: size %d", size)); 692 if (size == iocp->ioc_count) { 693 i = 0; 694 lb_props = (p_lb_property_t)mp->b_cont->b_rptr; 695 lb_props[i++] = lb_normal; 696 if (nxgep->statsp->mac_stats.cap_10gfdx) { 697 lb_props[i++] = lb_mac10g; 698 if (nxgep->mac.portmode == 699 PORT_10G_COPPER || 700 nxgep->mac.portmode == 701 PORT_10G_FIBER) 702 lb_props[i++] = lb_phy10g; 703 lb_props[i++] = lb_external10g; 704 } 705 if (nxgep->mac.portmode == PORT_10G_FIBER || 706 nxgep->mac.portmode == PORT_10G_SERDES) 707 lb_props[i++] = lb_serdes10g; 708 709 if (nxgep->statsp->mac_stats.cap_1000fdx) 710 lb_props[i++] = lb_external1000; 711 if (nxgep->statsp->mac_stats.cap_100fdx) 712 lb_props[i++] = lb_external100; 713 if (nxgep->statsp->mac_stats.cap_10fdx) 714 lb_props[i++] = lb_external10; 715 if (nxgep->statsp->mac_stats.cap_1000fdx) 716 lb_props[i++] = lb_mac1000; 717 if ((nxgep->mac.portmode == PORT_1G_COPPER) || 718 (nxgep->mac.portmode == 719 PORT_1G_RGMII_FIBER)) { 720 if (nxgep->statsp->mac_stats. 721 cap_1000fdx) 722 lb_props[i++] = lb_phy1000; 723 } else if ((nxgep->mac.portmode == 724 PORT_1G_FIBER) || 725 (nxgep->mac.portmode == PORT_1G_SERDES)) { 726 lb_props[i++] = lb_serdes1000; 727 } 728 miocack(wq, mp, size, 0); 729 } else 730 miocnak(wq, mp, 0, EINVAL); 731 } else { 732 miocnak(wq, mp, 0, EINVAL); 733 cmn_err(CE_NOTE, "!nxge_hw_ioctl: invalid command 0x%x", 734 iocp->ioc_cmd); 735 } 736 break; 737 } 738 } 739 740 /* 741 * DMA channel interfaces to access various channel specific 742 * hardware functions. 743 */ 744 /* ARGSUSED */ 745 void 746 nxge_rxdma_channel_put64(nxge_os_acc_handle_t handle, void *reg_addrp, 747 uint32_t reg_base, uint16_t channel, uint64_t reg_data) 748 { 749 uint64_t reg_offset; 750 751 NXGE_DEBUG_MSG((NULL, DMA_CTL, "<== nxge_rxdma_channel_put64")); 752 753 /* 754 * Channel is assumed to be from 0 to the maximum DMA channel #. If we 755 * use the virtual DMA CSR address space from the config space (in PCI 756 * case), then the following code need to be use different offset 757 * computation macro. 758 */ 759 reg_offset = reg_base + DMC_OFFSET(channel); 760 NXGE_PIO_WRITE64(handle, reg_addrp, reg_offset, reg_data); 761 762 NXGE_DEBUG_MSG((NULL, DMA_CTL, "<== nxge_rxdma_channel_put64")); 763 } 764 765 /* ARGSUSED */ 766 uint64_t 767 nxge_rxdma_channel_get64(nxge_os_acc_handle_t handle, void *reg_addrp, 768 uint32_t reg_base, uint16_t channel) 769 { 770 uint64_t reg_offset; 771 772 NXGE_DEBUG_MSG((NULL, DMA_CTL, "<== nxge_rxdma_channel_get64")); 773 774 /* 775 * Channel is assumed to be from 0 to the maximum DMA channel #. If we 776 * use the virtual DMA CSR address space from the config space (in PCI 777 * case), then the following code need to be use different offset 778 * computation macro. 779 */ 780 reg_offset = reg_base + DMC_OFFSET(channel); 781 782 NXGE_DEBUG_MSG((NULL, DMA_CTL, "<== nxge_rxdma_channel_get64")); 783 784 return (NXGE_PIO_READ64(handle, reg_addrp, reg_offset)); 785 } 786 787 /* ARGSUSED */ 788 void 789 nxge_get32(p_nxge_t nxgep, p_mblk_t mp) 790 { 791 nxge_os_acc_handle_t nxge_regh; 792 793 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "nxge_get32")); 794 nxge_regh = nxgep->dev_regs->nxge_regh; 795 796 *(uint32_t *)mp->b_rptr = NXGE_PIO_READ32(nxge_regh, 797 nxgep->dev_regs->nxge_regp, *(uint32_t *)mp->b_rptr); 798 799 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "value = 0x%08X", 800 *(uint32_t *)mp->b_rptr)); 801 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "nxge_get32")); 802 } 803 804 /* ARGSUSED */ 805 void 806 nxge_put32(p_nxge_t nxgep, p_mblk_t mp) 807 { 808 nxge_os_acc_handle_t nxge_regh; 809 uint32_t *buf; 810 uint8_t *reg; 811 812 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "nxge_put32")); 813 nxge_regh = nxgep->dev_regs->nxge_regh; 814 815 buf = (uint32_t *)mp->b_rptr; 816 reg = (uint8_t *)(nxgep->dev_regs->nxge_regp) + buf[0]; 817 NXGE_DEBUG_MSG((nxgep, IOC_CTL, 818 "reg = 0x%016llX index = 0x%08X value = 0x%08X", 819 reg, buf[0], buf[1])); 820 NXGE_PIO_WRITE32(nxge_regh, (uint32_t *)reg, 0, buf[1]); 821 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "nxge_put32")); 822 } 823 824 /*ARGSUSED*/ 825 boolean_t 826 nxge_set_lb(p_nxge_t nxgep, queue_t *wq, p_mblk_t mp) 827 { 828 boolean_t status = B_TRUE; 829 uint32_t lb_mode; 830 lb_property_t *lb_info; 831 832 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "<== nxge_set_lb")); 833 lb_mode = nxgep->statsp->port_stats.lb_mode; 834 if (lb_mode == *(uint32_t *)mp->b_rptr) { 835 cmn_err(CE_NOTE, 836 "!nxge%d: Loopback mode already set (lb_mode %d).\n", 837 nxgep->instance, lb_mode); 838 status = B_FALSE; 839 goto nxge_set_lb_exit; 840 } 841 lb_mode = *(uint32_t *)mp->b_rptr; 842 lb_info = NULL; 843 if (lb_mode == lb_normal.value) 844 lb_info = &lb_normal; 845 else if ((lb_mode == lb_external10g.value) && 846 (nxgep->statsp->mac_stats.cap_10gfdx)) 847 lb_info = &lb_external10g; 848 else if ((lb_mode == lb_external1000.value) && 849 (nxgep->statsp->mac_stats.cap_1000fdx)) 850 lb_info = &lb_external1000; 851 else if ((lb_mode == lb_external100.value) && 852 (nxgep->statsp->mac_stats.cap_100fdx)) 853 lb_info = &lb_external100; 854 else if ((lb_mode == lb_external10.value) && 855 (nxgep->statsp->mac_stats.cap_10fdx)) 856 lb_info = &lb_external10; 857 else if ((lb_mode == lb_phy10g.value) && 858 ((nxgep->mac.portmode == PORT_10G_COPPER) || 859 (nxgep->mac.portmode == PORT_10G_FIBER))) 860 lb_info = &lb_phy10g; 861 else if ((lb_mode == lb_phy1000.value) && 862 ((nxgep->mac.portmode == PORT_1G_COPPER) || 863 (nxgep->mac.portmode == PORT_1G_RGMII_FIBER))) 864 lb_info = &lb_phy1000; 865 else if ((lb_mode == lb_phy.value) && 866 (nxgep->mac.portmode == PORT_1G_COPPER)) 867 lb_info = &lb_phy; 868 else if ((lb_mode == lb_serdes10g.value) && 869 ((nxgep->mac.portmode == PORT_10G_FIBER) || 870 (nxgep->mac.portmode == PORT_10G_COPPER) || 871 (nxgep->mac.portmode == PORT_10G_SERDES))) 872 lb_info = &lb_serdes10g; 873 else if ((lb_mode == lb_serdes1000.value) && 874 (nxgep->mac.portmode == PORT_1G_FIBER || 875 (nxgep->mac.portmode == PORT_1G_SERDES))) 876 lb_info = &lb_serdes1000; 877 else if (lb_mode == lb_mac10g.value) 878 lb_info = &lb_mac10g; 879 else if (lb_mode == lb_mac1000.value) 880 lb_info = &lb_mac1000; 881 else if (lb_mode == lb_mac.value) 882 lb_info = &lb_mac; 883 else { 884 cmn_err(CE_NOTE, 885 "!nxge%d: Loopback mode not supported(mode %d).\n", 886 nxgep->instance, lb_mode); 887 status = B_FALSE; 888 goto nxge_set_lb_exit; 889 } 890 891 if (lb_mode == nxge_lb_normal) { 892 if (nxge_lb_dbg) { 893 cmn_err(CE_NOTE, 894 "!nxge%d: Returning to normal operation", 895 nxgep->instance); 896 } 897 if (nxge_set_lb_normal(nxgep) != NXGE_OK) { 898 status = B_FALSE; 899 cmn_err(CE_NOTE, 900 "!nxge%d: Failed to return to normal operation", 901 nxgep->instance); 902 } 903 goto nxge_set_lb_exit; 904 } 905 nxgep->statsp->port_stats.lb_mode = lb_mode; 906 907 if (nxge_lb_dbg) 908 cmn_err(CE_NOTE, 909 "!nxge%d: Adapter now in %s loopback mode", 910 nxgep->instance, lb_info->key); 911 nxgep->param_arr[param_autoneg].value = 0; 912 nxgep->param_arr[param_anar_10gfdx].value = 913 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext10g) || 914 (nxgep->statsp->port_stats.lb_mode == nxge_lb_mac10g) || 915 (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy10g) || 916 (nxgep->statsp->port_stats.lb_mode == nxge_lb_serdes10g); 917 nxgep->param_arr[param_anar_10ghdx].value = 0; 918 nxgep->param_arr[param_anar_1000fdx].value = 919 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext1000) || 920 (nxgep->statsp->port_stats.lb_mode == nxge_lb_mac1000) || 921 (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy1000) || 922 (nxgep->statsp->port_stats.lb_mode == nxge_lb_serdes1000); 923 nxgep->param_arr[param_anar_1000hdx].value = 0; 924 nxgep->param_arr[param_anar_100fdx].value = 925 (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy) || 926 (nxgep->statsp->port_stats.lb_mode == nxge_lb_mac) || 927 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext100); 928 nxgep->param_arr[param_anar_100hdx].value = 0; 929 nxgep->param_arr[param_anar_10fdx].value = 930 (nxgep->statsp->port_stats.lb_mode == nxge_lb_mac) || 931 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext10); 932 if (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext1000) { 933 nxgep->param_arr[param_master_cfg_enable].value = 1; 934 nxgep->param_arr[param_master_cfg_value].value = 1; 935 } 936 if ((nxgep->statsp->port_stats.lb_mode == nxge_lb_ext10g) || 937 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext1000) || 938 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext100) || 939 (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext10) || 940 (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy10g) || 941 (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy1000) || 942 (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy)) { 943 944 if (nxge_link_monitor(nxgep, LINK_MONITOR_STOP) != NXGE_OK) 945 goto nxge_set_lb_err; 946 if (nxge_xcvr_find(nxgep) != NXGE_OK) 947 goto nxge_set_lb_err; 948 if (nxge_link_init(nxgep) != NXGE_OK) 949 goto nxge_set_lb_err; 950 if (nxge_link_monitor(nxgep, LINK_MONITOR_START) != NXGE_OK) 951 goto nxge_set_lb_err; 952 } 953 if (lb_info->lb_type == internal) { 954 if ((nxgep->statsp->port_stats.lb_mode == nxge_lb_mac10g) || 955 (nxgep->statsp->port_stats.lb_mode == 956 nxge_lb_phy10g) || 957 (nxgep->statsp->port_stats.lb_mode == 958 nxge_lb_serdes10g)) { 959 nxgep->statsp->mac_stats.link_speed = 10000; 960 } else if ((nxgep->statsp->port_stats.lb_mode 961 == nxge_lb_mac1000) || 962 (nxgep->statsp->port_stats.lb_mode == 963 nxge_lb_phy1000) || 964 (nxgep->statsp->port_stats.lb_mode == 965 nxge_lb_serdes1000)) { 966 nxgep->statsp->mac_stats.link_speed = 1000; 967 } else { 968 nxgep->statsp->mac_stats.link_speed = 100; 969 } 970 nxgep->statsp->mac_stats.link_duplex = 2; 971 nxgep->statsp->mac_stats.link_up = 1; 972 } 973 if (nxge_global_reset(nxgep) != NXGE_OK) 974 goto nxge_set_lb_err; 975 976 nxge_set_lb_exit: 977 NXGE_DEBUG_MSG((nxgep, DDI_CTL, 978 "<== nxge_set_lb status = 0x%08x", status)); 979 return (status); 980 nxge_set_lb_err: 981 status = B_FALSE; 982 cmn_err(CE_NOTE, 983 "!nxge%d: Failed to put adapter in %s loopback mode", 984 nxgep->instance, lb_info->key); 985 return (status); 986 } 987 988 /* ARGSUSED */ 989 nxge_status_t 990 nxge_set_lb_normal(p_nxge_t nxgep) 991 { 992 nxge_status_t status = NXGE_OK; 993 994 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_set_lb_normal")); 995 996 nxgep->statsp->port_stats.lb_mode = nxge_lb_normal; 997 nxgep->param_arr[param_autoneg].value = 998 nxgep->param_arr[param_autoneg].old_value; 999 nxgep->param_arr[param_anar_1000fdx].value = 1000 nxgep->param_arr[param_anar_1000fdx].old_value; 1001 nxgep->param_arr[param_anar_1000hdx].value = 1002 nxgep->param_arr[param_anar_1000hdx].old_value; 1003 nxgep->param_arr[param_anar_100fdx].value = 1004 nxgep->param_arr[param_anar_100fdx].old_value; 1005 nxgep->param_arr[param_anar_100hdx].value = 1006 nxgep->param_arr[param_anar_100hdx].old_value; 1007 nxgep->param_arr[param_anar_10fdx].value = 1008 nxgep->param_arr[param_anar_10fdx].old_value; 1009 nxgep->param_arr[param_master_cfg_enable].value = 1010 nxgep->param_arr[param_master_cfg_enable].old_value; 1011 nxgep->param_arr[param_master_cfg_value].value = 1012 nxgep->param_arr[param_master_cfg_value].old_value; 1013 1014 if ((status = nxge_global_reset(nxgep)) != NXGE_OK) 1015 return (status); 1016 1017 if ((status = nxge_link_monitor(nxgep, LINK_MONITOR_STOP)) != NXGE_OK) 1018 return (status); 1019 if ((status = nxge_xcvr_find(nxgep)) != NXGE_OK) 1020 return (status); 1021 if ((status = nxge_link_init(nxgep)) != NXGE_OK) 1022 return (status); 1023 status = nxge_link_monitor(nxgep, LINK_MONITOR_START); 1024 1025 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_set_lb_normal")); 1026 1027 return (status); 1028 } 1029 1030 /* ARGSUSED */ 1031 void 1032 nxge_get_mii(p_nxge_t nxgep, p_mblk_t mp) 1033 { 1034 uint16_t reg; 1035 1036 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "==> nxge_get_mii")); 1037 1038 reg = *(uint16_t *)mp->b_rptr; 1039 (void) nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, reg, 1040 (uint16_t *)mp->b_rptr); 1041 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "reg = 0x%08X value = 0x%04X", 1042 reg, *(uint16_t *)mp->b_rptr)); 1043 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "<== nxge_get_mii")); 1044 } 1045 1046 /* ARGSUSED */ 1047 void 1048 nxge_put_mii(p_nxge_t nxgep, p_mblk_t mp) 1049 { 1050 uint16_t *buf; 1051 uint8_t reg; 1052 1053 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "==> nxge_put_mii")); 1054 buf = (uint16_t *)mp->b_rptr; 1055 reg = (uint8_t)buf[0]; 1056 NXGE_DEBUG_MSG((nxgep, IOC_CTL, 1057 "reg = 0x%08X index = 0x%08X value = 0x%08X", 1058 reg, buf[0], buf[1])); 1059 (void) nxge_mii_write(nxgep, nxgep->statsp->mac_stats.xcvr_portn, 1060 reg, buf[1]); 1061 NXGE_DEBUG_MSG((nxgep, IOC_CTL, "<== nxge_put_mii")); 1062 } 1063 1064 /* ARGSUSED */ 1065 void 1066 nxge_check_hw_state(p_nxge_t nxgep) 1067 { 1068 p_nxge_ldgv_t ldgvp; 1069 p_nxge_ldv_t t_ldvp; 1070 1071 NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, "==> nxge_check_hw_state")); 1072 1073 MUTEX_ENTER(nxgep->genlock); 1074 nxgep->nxge_timerid = 0; 1075 if (!(nxgep->drv_state & STATE_HW_INITIALIZED)) { 1076 goto nxge_check_hw_state_exit; 1077 } 1078 nxge_check_tx_hang(nxgep); 1079 1080 ldgvp = nxgep->ldgvp; 1081 if (ldgvp == NULL || (ldgvp->ldvp_syserr == NULL)) { 1082 NXGE_ERROR_MSG((nxgep, SYSERR_CTL, "<== nxge_check_hw_state: " 1083 "NULL ldgvp (interrupt not ready).")); 1084 goto nxge_check_hw_state_exit; 1085 } 1086 t_ldvp = ldgvp->ldvp_syserr; 1087 if (!t_ldvp->use_timer) { 1088 NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, "<== nxge_check_hw_state: " 1089 "ldgvp $%p t_ldvp $%p use_timer flag %d", 1090 ldgvp, t_ldvp, t_ldvp->use_timer)); 1091 goto nxge_check_hw_state_exit; 1092 } 1093 if (fm_check_acc_handle(nxgep->dev_regs->nxge_regh) != DDI_FM_OK) { 1094 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 1095 "port%d Bad register acc handle", nxgep->mac.portnum)); 1096 } 1097 (void) nxge_syserr_intr((void *) t_ldvp, (void *) nxgep); 1098 1099 nxgep->nxge_timerid = nxge_start_timer(nxgep, nxge_check_hw_state, 1100 NXGE_CHECK_TIMER); 1101 1102 nxge_check_hw_state_exit: 1103 MUTEX_EXIT(nxgep->genlock); 1104 NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, "<== nxge_check_hw_state")); 1105 } 1106 1107 /*ARGSUSED*/ 1108 static void 1109 nxge_rtrace_ioctl(p_nxge_t nxgep, queue_t *wq, mblk_t *mp, 1110 struct iocblk *iocp) 1111 { 1112 ssize_t size; 1113 rtrace_t *rtp; 1114 mblk_t *nmp; 1115 uint32_t i, j; 1116 uint32_t start_blk; 1117 uint32_t base_entry; 1118 uint32_t num_entries; 1119 1120 NXGE_DEBUG_MSG((nxgep, STR_CTL, "==> nxge_rtrace_ioctl")); 1121 1122 size = 1024; 1123 if (mp->b_cont == NULL || MBLKL(mp->b_cont) < size) { 1124 NXGE_DEBUG_MSG((nxgep, STR_CTL, 1125 "malformed M_IOCTL MBLKL = %d size = %d", 1126 MBLKL(mp->b_cont), size)); 1127 miocnak(wq, mp, 0, EINVAL); 1128 return; 1129 } 1130 nmp = mp->b_cont; 1131 rtp = (rtrace_t *)nmp->b_rptr; 1132 start_blk = rtp->next_idx; 1133 num_entries = rtp->last_idx; 1134 base_entry = start_blk * MAX_RTRACE_IOC_ENTRIES; 1135 1136 NXGE_DEBUG_MSG((nxgep, STR_CTL, "start_blk = %d\n", start_blk)); 1137 NXGE_DEBUG_MSG((nxgep, STR_CTL, "num_entries = %d\n", num_entries)); 1138 NXGE_DEBUG_MSG((nxgep, STR_CTL, "base_entry = %d\n", base_entry)); 1139 1140 rtp->next_idx = npi_rtracebuf.next_idx; 1141 rtp->last_idx = npi_rtracebuf.last_idx; 1142 rtp->wrapped = npi_rtracebuf.wrapped; 1143 for (i = 0, j = base_entry; i < num_entries; i++, j++) { 1144 rtp->buf[i].ctl_addr = npi_rtracebuf.buf[j].ctl_addr; 1145 rtp->buf[i].val_l32 = npi_rtracebuf.buf[j].val_l32; 1146 rtp->buf[i].val_h32 = npi_rtracebuf.buf[j].val_h32; 1147 } 1148 1149 nmp->b_wptr = nmp->b_rptr + size; 1150 NXGE_DEBUG_MSG((nxgep, STR_CTL, "<== nxge_rtrace_ioctl")); 1151 miocack(wq, mp, (int)size, 0); 1152 } 1153