1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #include <npi_fflp.h> 27 #include <nxge_defs.h> 28 #include <nxge_fflp.h> 29 #include <nxge_flow.h> 30 #include <nxge_impl.h> 31 #include <nxge_common.h> 32 33 /* 34 * Globals: tunable parameters (/etc/system or adb) 35 * 36 */ 37 int nxge_tcam_class_enable = 0; 38 int nxge_tcam_lookup_enable = 0; 39 int nxge_flow_dist_enable = NXGE_CLASS_FLOW_USE_DST_PORT | 40 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 41 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 42 NXGE_CLASS_FLOW_USE_PORTNUM; 43 44 /* 45 * Bit mapped 46 * 0x80000000: Drop 47 * 0x0000: NO TCAM Lookup Needed 48 * 0x0001: TCAM Lookup Needed with Dest Addr (IPv6) 49 * 0x0003: TCAM Lookup Needed with SRC Addr (IPv6) 50 * 0x0010: use MAC Port 51 * 0x0020: use L2DA 52 * 0x0040: use VLAN 53 * 0x0080: use proto 54 * 0x0100: use IP src addr 55 * 0x0200: use IP dest addr 56 * 0x0400: use Src Port 57 * 0x0800: use Dest Port 58 * 0x0fff: enable all options for IPv6 (with src addr) 59 * 0x0ffd: enable all options for IPv6 (with dest addr) 60 * 0x0fff: enable all options for IPv4 61 * 0x0ffd: enable all options for IPv4 62 * 63 */ 64 65 /* 66 * the default is to distribute as function of: 67 * protocol 68 * ip src address 69 * ip dest address 70 * src port 71 * dest port 72 * 73 * 0x0f80 74 * 75 */ 76 77 int nxge_tcp4_class = NXGE_CLASS_FLOW_USE_DST_PORT | 78 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 79 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 80 NXGE_CLASS_FLOW_USE_PORTNUM; 81 82 int nxge_udp4_class = NXGE_CLASS_FLOW_USE_DST_PORT | 83 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 84 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 85 NXGE_CLASS_FLOW_USE_PORTNUM; 86 87 int nxge_ah4_class = NXGE_CLASS_FLOW_USE_DST_PORT | 88 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 89 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 90 NXGE_CLASS_FLOW_USE_PORTNUM; 91 int nxge_sctp4_class = NXGE_CLASS_FLOW_USE_DST_PORT | 92 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 93 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 94 NXGE_CLASS_FLOW_USE_PORTNUM; 95 96 int nxge_tcp6_class = NXGE_CLASS_FLOW_USE_DST_PORT | 97 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 98 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 99 NXGE_CLASS_FLOW_USE_PORTNUM; 100 101 int nxge_udp6_class = NXGE_CLASS_FLOW_USE_DST_PORT | 102 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 103 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 104 NXGE_CLASS_FLOW_USE_PORTNUM; 105 106 int nxge_ah6_class = NXGE_CLASS_FLOW_USE_DST_PORT | 107 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 108 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 109 NXGE_CLASS_FLOW_USE_PORTNUM; 110 111 int nxge_sctp6_class = NXGE_CLASS_FLOW_USE_DST_PORT | 112 NXGE_CLASS_FLOW_USE_SRC_PORT | NXGE_CLASS_FLOW_USE_IPDST | 113 NXGE_CLASS_FLOW_USE_IPSRC | NXGE_CLASS_FLOW_USE_PROTO | 114 NXGE_CLASS_FLOW_USE_PORTNUM; 115 116 uint32_t nxge_fflp_init_h1 = 0xffffffff; 117 uint32_t nxge_fflp_init_h2 = 0xffff; 118 119 uint64_t class_quick_config_distribute[NXGE_CLASS_CONFIG_PARAMS] = { 120 0xffffffffULL, /* h1_init */ 121 0xffffULL, /* h2_init */ 122 0x0, /* cfg_ether_usr1 */ 123 0x0, /* cfg_ether_usr2 */ 124 0x0, /* cfg_ip_usr4 */ 125 0x0, /* cfg_ip_usr5 */ 126 0x0, /* cfg_ip_usr6 */ 127 0x0, /* cfg_ip_usr7 */ 128 0x0, /* opt_ip_usr4 */ 129 0x0, /* opt_ip_usr5 */ 130 0x0, /* opt_ip_usr6 */ 131 0x0, /* opt_ip_usr7 */ 132 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_tcp */ 133 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_udp */ 134 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_ah */ 135 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_sctp */ 136 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv6_tcp */ 137 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv6_udp */ 138 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv6_ah */ 139 NXGE_CLASS_FLOW_GEN_SERVER /* opt_ipv6_sctp */ 140 }; 141 142 uint64_t class_quick_config_web_server[NXGE_CLASS_CONFIG_PARAMS] = { 143 0xffffffffULL, /* h1_init */ 144 0xffffULL, /* h2_init */ 145 0x0, /* cfg_ether_usr1 */ 146 0x0, /* cfg_ether_usr2 */ 147 0x0, /* cfg_ip_usr4 */ 148 0x0, /* cfg_ip_usr5 */ 149 0x0, /* cfg_ip_usr6 */ 150 0x0, /* cfg_ip_usr7 */ 151 0x0, /* opt_ip_usr4 */ 152 0x0, /* opt_ip_usr5 */ 153 0x0, /* opt_ip_usr6 */ 154 0x0, /* opt_ip_usr7 */ 155 NXGE_CLASS_FLOW_WEB_SERVER, /* opt_ipv4_tcp */ 156 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_udp */ 157 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_ah */ 158 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv4_sctp */ 159 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv6_tcp */ 160 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv6_udp */ 161 NXGE_CLASS_FLOW_GEN_SERVER, /* opt_ipv6_ah */ 162 NXGE_CLASS_FLOW_GEN_SERVER /* opt_ipv6_sctp */ 163 }; 164 165 nxge_status_t 166 nxge_classify_init(p_nxge_t nxgep) 167 { 168 nxge_status_t status = NXGE_OK; 169 170 status = nxge_classify_init_sw(nxgep); 171 if (status != NXGE_OK) 172 return (status); 173 status = nxge_set_hw_classify_config(nxgep); 174 if (status != NXGE_OK) 175 return (status); 176 177 status = nxge_classify_init_hw(nxgep); 178 if (status != NXGE_OK) 179 return (status); 180 181 return (NXGE_OK); 182 } 183 184 nxge_status_t 185 nxge_classify_uninit(p_nxge_t nxgep) 186 { 187 nxge_status_t status = NXGE_OK; 188 189 status = nxge_classify_exit_sw(nxgep); 190 if (status != NXGE_OK) { 191 return (status); 192 } 193 return (NXGE_OK); 194 } 195 196 /* ARGSUSED */ 197 uint64_t 198 nxge_classify_get_cfg_value(p_nxge_t nxgep, uint8_t cfg_type, uint8_t cfg_param) 199 { 200 uint64_t cfg_value; 201 202 if (cfg_param >= NXGE_CLASS_CONFIG_PARAMS) 203 return (-1); 204 switch (cfg_type) { 205 case CFG_L3_WEB: 206 cfg_value = class_quick_config_web_server[cfg_param]; 207 break; 208 case CFG_L3_DISTRIBUTE: 209 default: 210 cfg_value = class_quick_config_distribute[cfg_param]; 211 break; 212 } 213 return (cfg_value); 214 } 215 216 nxge_status_t 217 nxge_set_hw_classify_config(p_nxge_t nxgep) 218 { 219 p_nxge_dma_pt_cfg_t p_all_cfgp; 220 p_nxge_hw_pt_cfg_t p_cfgp; 221 222 NXGE_DEBUG_MSG((nxgep, OBP_CTL, "==> nxge_get_hw_classify_config")); 223 224 /* Get mac rdc table info from HW/Prom/.conf etc ...... */ 225 /* for now, get it from dma configs */ 226 p_all_cfgp = (p_nxge_dma_pt_cfg_t)&nxgep->pt_config; 227 p_cfgp = (p_nxge_hw_pt_cfg_t)&p_all_cfgp->hw_config; 228 229 /* 230 * classify_init needs to call first. 231 */ 232 nxgep->class_config.mac_rdcgrp = p_cfgp->def_mac_rxdma_grpid; 233 nxgep->class_config.mcast_rdcgrp = p_cfgp->def_mac_rxdma_grpid; 234 NXGE_DEBUG_MSG((nxgep, OBP_CTL, "<== nxge_get_hw_classify_config")); 235 236 return (NXGE_OK); 237 } 238