1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _NPI_VIR_H 27 #define _NPI_VIR_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 #include <npi.h> 36 #include <nxge_hw.h> 37 38 /* 39 * Virtualization and Logical devices NPI error codes 40 */ 41 #define FUNCID_INVALID PORT_INVALID 42 #define VIR_ERR_ST (VIR_BLK_ID << NPI_BLOCK_ID_SHIFT) 43 #define VIR_ID_SHIFT(n) (n << NPI_PORT_CHAN_SHIFT) 44 45 #define VIR_HW_BUSY (NPI_BK_HW_ERROR_START | 0x1) 46 47 #define VIR_TAS_BUSY (NPI_BK_ERROR_START | 0x1) 48 #define VIR_TAS_NOTREAD (NPI_BK_ERROR_START | 0x2) 49 50 #define VIR_SR_RESET (NPI_BK_ERROR_START | 0x3) 51 #define VIR_SR_FREE (NPI_BK_ERROR_START | 0x4) 52 #define VIR_SR_BUSY (NPI_BK_ERROR_START | 0x5) 53 #define VIR_SR_INVALID (NPI_BK_ERROR_START | 0x6) 54 #define VIR_SR_NOTOWNER (NPI_BK_ERROR_START | 0x7) 55 #define VIR_SR_INITIALIZED (NPI_BK_ERROR_START | 0x8) 56 57 #define VIR_MPC_DENY (NPI_BK_ERROR_START | 0x10) 58 59 #define VIR_BD_FUNC_INVALID (NPI_BK_ERROR_START | 0x20) 60 #define VIR_BD_REG_INVALID (NPI_BK_ERROR_START | 0x21) 61 #define VIR_BD_ID_INVALID (NPI_BK_ERROR_START | 0x22) 62 #define VIR_BD_TXDMA_INVALID (NPI_BK_ERROR_START | 0x23) 63 #define VIR_BD_RXDMA_INVALID (NPI_BK_ERROR_START | 0x24) 64 65 #define VIR_LD_INVALID (NPI_BK_ERROR_START | 0x30) 66 #define VIR_LDG_INVALID (NPI_BK_ERROR_START | 0x31) 67 #define VIR_LDSV_INVALID (NPI_BK_ERROR_START | 0x32) 68 69 #define VIR_INTM_TM_INVALID (NPI_BK_ERROR_START | 0x33) 70 #define VIR_TM_RES_INVALID (NPI_BK_ERROR_START | 0x34) 71 #define VIR_SID_VEC_INVALID (NPI_BK_ERROR_START | 0x35) 72 73 #define NPI_VIR_OCODE_INVALID(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | OPCODE_INVALID) 74 #define NPI_VIR_FUNC_INVALID(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | FUNCID_INVALID) 75 #define NPI_VIR_CN_INVALID(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | CHANNEL_INVALID) 76 77 /* 78 * Errors codes of shared register functions. 79 */ 80 #define NPI_VIR_TAS_BUSY(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_TAS_BUSY) 81 #define NPI_VIR_TAS_NOTREAD(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_TAS_NOTREAD) 82 #define NPI_VIR_SR_RESET(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_SR_RESET) 83 #define NPI_VIR_SR_FREE(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_SR_FREE) 84 #define NPI_VIR_SR_BUSY(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_SR_BUSY) 85 #define NPI_VIR_SR_INVALID(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_SR_INVALID) 86 #define NPI_VIR_SR_NOTOWNER(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_SR_NOTOWNER) 87 #define NPI_VIR_SR_INITIALIZED(n) (VIR_ID_SHIFT(n) | \ 88 VIR_ERR_ST | VIR_SR_INITIALIZED) 89 90 /* 91 * Error codes of muti-partition control register functions. 92 */ 93 #define NPI_VIR_MPC_DENY (VIR_ERR_ST | VIR_MPU_DENY) 94 95 /* 96 * Error codes of DMA binding functions. 97 */ 98 #define NPI_VIR_BD_FUNC_INVALID(n) (VIR_ID_SHIFT(n) | \ 99 VIR_ERR_ST | VIR_BD_FUNC_INVALID) 100 #define NPI_VIR_BD_REG_INVALID(n) (VIR_ID_SHIFT(n) | \ 101 VIR_ERR_ST | VIR_BD_REG_INVALID) 102 #define NPI_VIR_BD_ID_INVALID(n) (VIR_ID_SHIFT(n) | \ 103 VIR_ERR_ST | VIR_BD_ID_INVALID) 104 #define NPI_VIR_BD_TXDMA_INVALID(n) (VIR_ID_SHIFT(n) | \ 105 VIR_ERR_ST | VIR_BD_TXDMA_INVALID) 106 #define NPI_VIR_BD_RXDMA_INVALID(n) (VIR_ID_SHIFT(n) | \ 107 VIR_ERR_ST | VIR_BD_RXDMA_INVALID) 108 109 /* 110 * Error codes of logical devices and groups functions. 111 */ 112 #define NPI_VIR_LD_INVALID(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_LD_INVALID) 113 #define NPI_VIR_LDG_INVALID(n) (VIR_ID_SHIFT(n) | VIR_ERR_ST | VIR_LDG_INVALID) 114 #define NPI_VIR_LDSV_INVALID(n) (VIR_ID_SHIFT(n) | \ 115 VIR_ERR_ST | VIR_LDSV_INVALID) 116 #define NPI_VIR_INTM_TM_INVALID(n) (VIR_ID_SHIFT(n) | \ 117 VIR_ERR_ST | VIR_INTM_TM_INVALID) 118 #define NPI_VIR_TM_RES_INVALID (VIR_ERR_ST | VIR_TM_RES_INVALID) 119 #define NPI_VIR_SID_VEC_INVALID(n) (VIR_ID_SHIFT(n) | \ 120 VIR_ERR_ST | VIR_TM_RES_INVALID) 121 122 /* 123 * Bit definition ([15:0] of the shared register 124 * used by the driver as locking mechanism. 125 * [1:0] lock state (RESET, FREE, BUSY) 126 * [3:2] function ID (owner) 127 * [11:4] Implementation specific states 128 * [15:12] Individual function state 129 */ 130 #define NPI_DEV_SR_LOCK_ST_RESET 0 131 #define NPI_DEV_SR_LOCK_ST_FREE 1 132 #define NPI_DEV_SR_LOCK_ST_BUSY 2 133 134 #define NPI_DEV_SR_LOCK_ST_SHIFT 0 135 #define NPI_DEV_SR_LOCK_ST_MASK 0x03 136 #define NPI_DEV_SR_LOCK_FID_SHIFT 2 137 #define NPI_DEV_SR_LOCK_FID_MASK 0x0C 138 139 #define NPI_DEV_SR_IMPL_ST_SHIFT 4 140 #define NPI_DEV_SR_IMPL_ST_MASK 0xfff0 141 142 #define NPI_GET_LOCK_OWNER(sr) ((sr & NPI_DEV_SR_LOCK_FID_MASK) \ 143 >> NPI_DEV_SR_LOCK_FID_SHIFT) 144 #define NPI_GET_LOCK_ST(sr) (sr & NPI_DEV_SR_LOCK_ST_MASK) 145 #define NPI_GET_LOCK_IMPL_ST(sr) ((sr & NPI_DEV_SR_IMPL_ST_MASK) \ 146 >> NPI_DEV_SR_IMPL_ST_SHIFT) 147 148 /* 149 * DMA channel binding definitions. 150 */ 151 #define DMA_BIND_VADDR_VALIDATE(fn, rn, id, status) \ 152 { \ 153 status = NPI_SUCCESS; \ 154 if (!TXDMA_FUNC_VALID(fn)) { \ 155 status = (NPI_FAILURE | NPI_VIR_BD_FUNC_INVALID(fn)); \ 156 } else if (!SUBREGION_VALID(rn)) { \ 157 status = (NPI_FAILURE | NPI_VIR_BD_REG_INVALID(rn)); \ 158 } else if (!VIR_PAGE_INDEX_VALID(id)) { \ 159 status = (NPI_FAILURE | NPI_VIR_BD_ID_INVALID(id)); \ 160 } \ 161 } 162 163 #define DMA_BIND_TX_VALIDATE(n, status) \ 164 { \ 165 status = NPI_SUCCESS; \ 166 if (!TXDMA_CHANNEL_VALID(n)) { \ 167 status = (NPI_FAILURE | NPI_VIR_BD_TXDMA_INVALID(n)); \ 168 } \ 169 } 170 171 #define DMA_BIND_RX_VALIDATE(n, status) \ 172 { \ 173 status = NPI_SUCCESS; \ 174 if (!VRXDMA_CHANNEL_VALID(n)) { \ 175 status = (NPI_FAILURE | NPI_VIR_BD_RXDMA_INVALID(n)); \ 176 } \ 177 } 178 179 #define DMA_BIND_STEP 8 180 #define DMA_BIND_REG_OFFSET(fn, rn, id) (DMA_BIND_STEP * \ 181 (fn * 2 * VIR_PAGE_INDEX_MAX + \ 182 rn * VIR_PAGE_INDEX_MAX) + id) 183 184 /* 185 * NPI defined data structure to program the DMA binding register. 186 */ 187 typedef struct _fzc_dma_bind { 188 uint8_t function_id; /* 0 to 3 */ 189 uint8_t sub_vir_region; /* 0 or 1 */ 190 uint8_t vir_index; /* 0 to 7 */ 191 boolean_t tx_bind; /* set 1 to bind */ 192 uint8_t tx_channel; /* hardware channel number (0 - 23) */ 193 boolean_t rx_bind; /* set 1 to bind */ 194 uint8_t rx_channel; /* hardware channel number (0 - 15) */ 195 } fzc_dma_bind_t, *p_fzc_dma_bind; 196 197 /* 198 * Logical device definitions. 199 */ 200 #define LD_NUM_STEP 8 201 #define LD_NUM_OFFSET(ld) (ld * LDG_NUM_STEP) 202 #define LDG_NUM_STEP 8 203 #define LDG_NUM_OFFSET(ldg) (ldg * LDG_NUM_STEP) 204 #define LDGNUM_OFFSET(ldg) (ldg * LDG_NUM_STEP) 205 #define LDSV_STEP 8192 206 #define LDSVG_OFFSET(ldg) (ldg * LDSV_STEP) 207 #define LDSV_OFFSET(ldv) (ldv * LDSV_STEP) 208 209 #define LDSV_OFFSET_MASK(ld) \ 210 (((ld < NXGE_MAC_LD_START) ? \ 211 (LD_IM0_REG + LDSV_OFFSET(ld)) : \ 212 (LD_IM1_REG + LDSV_OFFSET((ld - NXGE_MAC_LD_START))))); \ 213 214 #define LDG_SID_STEP 8 215 #define LDG_SID_OFFSET(ldg) (ldg * LDG_SID_STEP) 216 217 typedef enum { 218 LDF0, 219 LDF1 220 } ldf_type_t; 221 222 typedef enum { 223 VECTOR0, 224 VECTOR1, 225 VECTOR2 226 } ldsv_type_t; 227 228 /* 229 * Definitions for the system interrupt data. 230 */ 231 typedef struct _fzc_sid { 232 boolean_t niu; 233 uint8_t ldg; 234 uint8_t func; 235 uint8_t vector; 236 } fzc_sid_t, *p_fzc_sid_t; 237 238 /* 239 * Virtualization and Interrupt Prototypes. 240 */ 241 /* 242 * npi_dev_func_sr_init(): 243 * This function is called to initialize the device function 244 * shared register (set the software implementation lock 245 * state to FREE). 246 * Parameters: 247 * handle - NPI handle 248 * Return: 249 * NPI_SUCCESS - If initialization is complete successfully. 250 * (set sr bits to free). 251 * Error: 252 * NPI_FAILURE 253 * VIR_TAS_BUSY 254 */ 255 npi_status_t npi_dev_func_sr_init(npi_handle_t); 256 257 /* 258 * npi_dev_func_sr_lock_enter(): 259 * This function is called to lock the function shared register 260 * by setting the lock state to busy. 261 * Parameters: 262 * handle - NPI handle 263 * Return: 264 * NPI_SUCCESS - If the function id can own the lock. 265 * 266 * Error: 267 * NPI_FAILURE 268 * VIR_SR_RESET 269 * VIR_SR_BUSY 270 * VIR_SR_INVALID 271 * VIR_TAS_BUSY 272 */ 273 npi_status_t npi_dev_func_sr_lock_enter(npi_handle_t); 274 275 /* 276 * npi_dev_func_sr_lock_free(): 277 * This function is called to free the function shared register 278 * by setting the lock state to free. 279 * Parameters: 280 * handle - NPI handle 281 * Return: 282 * NPI_SUCCESS - If the function id can free the lock. 283 * 284 * Error: 285 * NPI_FAILURE 286 * VIR_SR_NOTOWNER 287 * VIR_TAS_NOTREAD 288 */ 289 npi_status_t npi_dev_func_sr_lock_free(npi_handle_t); 290 291 /* 292 * npi_dev_func_sr_funcid_get(): 293 * This function is called to get the caller's function ID. 294 * (based on address bits [25:26] on read access. 295 * (After read, the TAS bit is always set to 1. Software needs 296 * to write 0 to clear.) This function will write 0 to clear 297 * the TAS bit if we own it. 298 * Parameters: 299 * handle - NPI handle 300 * funcid_p - pointer to store the function id. 301 * Return: 302 * NPI_SUCCESS - If get function id is complete successfully. 303 * 304 * Error: 305 */ 306 npi_status_t npi_dev_func_sr_funcid_get(npi_handle_t, uint8_t *); 307 308 /* 309 * npi_dev_func_sr_sr_raw_get(): 310 * This function is called to get the shared register value. 311 * (After read, the TAS bit is always set to 1. Software needs 312 * to write 0 to clear if we own it.) 313 * 314 * Parameters: 315 * handle - NPI handle 316 * sr_p - pointer to store the shared value of this register. 317 * 318 * Return: 319 * NPI_SUCCESS - If shared value get is complete successfully. 320 * 321 * Error: 322 */ 323 npi_status_t npi_dev_func_sr_sr_raw_get(npi_handle_t, uint16_t *); 324 325 /* 326 * npi_dev_func_sr_sr_get(): 327 * This function is called to get the shared register value. 328 * (After read, the TAS bit is always set to 1. Software needs 329 * to write 0 to clear if we own it.) 330 * 331 * Parameters: 332 * handle - NPI handle 333 * sr_p - pointer to store the shared value of this register. 334 * . this will get only non-lock, non-function id portion 335 * . of the register 336 * 337 * 338 * Return: 339 * NPI_SUCCESS - If shared value get is complete successfully. 340 * 341 * Error: 342 */ 343 344 npi_status_t npi_dev_func_sr_sr_get(npi_handle_t, uint16_t *); 345 346 /* 347 * npi_dev_func_sr_sr_get_set_clear(): 348 * This function is called to set the shared register value. 349 * (Shared register must be read first. If tas bit is 0, then 350 * it implies that the software can proceed to set). After 351 * setting, tas bit will be cleared. 352 * Parameters: 353 * handle - NPI handle 354 * impl_sr - shared value to set (only the 8 bit 355 * implementation specific state info). 356 * 357 * Return: 358 * NPI_SUCCESS - If shared value is set successfully. 359 * 360 * Error: 361 * NPI_FAILURE 362 * VIR_TAS_BUSY 363 */ 364 npi_status_t npi_dev_func_sr_sr_get_set_clear(npi_handle_t, 365 uint16_t); 366 367 /* 368 * npi_dev_func_sr_sr_set_only(): 369 * This function is called to only set the shared register value. 370 * Parameters: 371 * handle - NPI handle 372 * impl_sr - shared value to set. 373 * 374 * Return: 375 * NPI_SUCCESS - If shared value is set successfully. 376 * 377 * Error: 378 * NPI_FAILURE 379 * VIR_TAS_BUSY 380 */ 381 npi_status_t npi_dev_func_sr_sr_set_only(npi_handle_t, uint16_t); 382 383 /* 384 * npi_dev_func_sr_busy(): 385 * This function is called to see if we can own the device. 386 * It will not reset the tas bit. 387 * Parameters: 388 * handle - NPI handle 389 * busy_p - pointer to store busy flag. 390 * (B_TRUE: device is in use, B_FALSE: free). 391 * Return: 392 * NPI_SUCCESS - If tas bit is read successfully. 393 * Error: 394 */ 395 npi_status_t npi_dev_func_sr_busy(npi_handle_t, boolean_t *); 396 397 /* 398 * npi_dev_func_sr_tas_get(): 399 * This function is called to get the tas bit 400 * (after read, this bit is always set to 1, software write 0 401 * to clear it). 402 * 403 * Parameters: 404 * handle - NPI handle 405 * tas_p - pointer to store the tas value 406 * 407 * Return: 408 * NPI_SUCCESS - If tas value get is complete successfully. 409 * Error: 410 */ 411 npi_status_t npi_dev_func_sr_tas_get(npi_handle_t, uint8_t *); 412 413 /* 414 * npi_fzc_mpc_set(): 415 * This function is called to enable the write access 416 * to FZC region to function zero. 417 * Parameters: 418 * handle - NPI handle 419 * Return: 420 * NPI_SUCCESS - 421 * Error: 422 */ 423 npi_status_t npi_fzc_mpc_set(npi_handle_t, boolean_t); 424 425 /* 426 * npi_fzc_mpc_get(): 427 * This function is called to get the access mode. 428 * Parameters: 429 * handle - NPI handle 430 * Return: 431 * NPI_SUCCESS - 432 * 433 */ 434 npi_status_t npi_fzc_mpc_get(npi_handle_t, boolean_t *); 435 436 /* 437 * npi_fzc_dma_bind_set(): 438 * This function is called to set DMA binding register. 439 * Parameters: 440 * handle - NPI handle 441 * dma_bind - NPI defined data structure that 442 * contains the tx/rx channel binding info. 443 * to set. 444 * Return: 445 * NPI_SUCCESS - 446 * Error: 447 * NPI_FAILURE 448 * 449 */ 450 npi_status_t npi_fzc_dma_bind_set(npi_handle_t, fzc_dma_bind_t); 451 452 /* 453 * npi_fzc_ldg_num_set(): 454 * This function is called to set up a logical group number that 455 * a logical device belongs to. 456 * Parameters: 457 * handle - NPI handle 458 * ld - logical device number (0 - 68) 459 * ldg - logical device group number (0 - 63) 460 * Return: 461 * NPI_SUCCESS - 462 * Error: 463 * NPI_FAILURE 464 * 465 */ 466 npi_status_t npi_fzc_ldg_num_set(npi_handle_t, uint8_t, uint8_t); 467 468 /* 469 * npi_fzc_ldg_num_get(): 470 * This function is called to get the logical device group that 471 * a logical device belongs to. 472 * Parameters: 473 * handle - NPI handle 474 * ld - logical device number (0 - 68) 475 * *ldg_p - pointer to store its group number. 476 * Return: 477 * NPI_SUCCESS - 478 * Error: 479 * NPI_FAILURE 480 */ 481 npi_status_t npi_fzc_ldg_num_get(npi_handle_t, uint8_t, 482 uint8_t *); 483 484 npi_status_t npi_ldsv_ldfs_get(npi_handle_t, uint8_t, 485 uint64_t *, uint64_t *, uint64_t *); 486 /* 487 * npi_ldsv_get(): 488 * This function is called to get device state vectors. 489 * Parameters: 490 * handle - NPI handle 491 * ldg - logical device group (0 - 63) 492 * ldf_type - either LDF0 (0) or LDF1 (1) 493 * vector - vector type (0, 1 or 2) 494 * *ldf_p - pointer to store its flag bits. 495 * Return: 496 * NPI_SUCCESS - 497 * Error: 498 * NPI_FAILURE 499 */ 500 npi_status_t npi_ldsv_get(npi_handle_t, uint8_t, ldsv_type_t, 501 uint64_t *); 502 503 /* 504 * npi_ldsv_ld_get(): 505 * This function is called to get the flag bit value of a device. 506 * Parameters: 507 * handle - NPI handle 508 * ldg - logical device group (0 - 63) 509 * ld - logical device (0 - 68) 510 * ldf_type - either LDF0 (0) or LDF1 (1) 511 * vector - vector type (0, 1 or 2) 512 * *ldf_p - pointer to store its flag bits. 513 * Return: 514 * NPI_SUCCESS - 515 * Error: 516 * NPI_FAILURE 517 */ 518 npi_status_t npi_ldsv_ld_get(npi_handle_t, uint8_t, uint8_t, 519 ldsv_type_t, ldf_type_t, boolean_t *); 520 /* 521 * npi_ldsv_ld_ldf0_get(): 522 * This function is called to get the ldf0 bit value of a device. 523 * Parameters: 524 * handle - NPI handle 525 * ldg - logical device group (0 - 63) 526 * ld - logical device (0 - 68) 527 * *ldf_p - pointer to store its flag bits. 528 * Return: 529 * NPI_SUCCESS - 530 * Error: 531 * NPI_FAILURE 532 */ 533 npi_status_t npi_ldsv_ld_ldf0_get(npi_handle_t, uint8_t, uint8_t, 534 boolean_t *); 535 536 /* 537 * npi_ldsv_ld_ldf1_get(): 538 * This function is called to get the ldf1 bit value of a device. 539 * Parameters: 540 * handle - NPI handle 541 * ldg - logical device group (0 - 63) 542 * ld - logical device (0 - 68) 543 * *ldf_p - pointer to store its flag bits. 544 * Return: 545 * NPI_SUCCESS - 546 * Error: 547 * NPI_FAILURE 548 */ 549 npi_status_t npi_ldsv_ld_ldf1_get(npi_handle_t, uint8_t, uint8_t, 550 boolean_t *); 551 /* 552 * npi_intr_mask_set(): 553 * This function is called to select the mask bits for both ldf0 and ldf1. 554 * Parameters: 555 * handle - NPI handle 556 * ld - logical device (0 - 68) 557 * ldf_mask - mask value to set (both ldf0 and ldf1). 558 * Return: 559 * NPI_SUCCESS - 560 * Error: 561 * NPI_FAILURE 562 */ 563 npi_status_t npi_intr_mask_set(npi_handle_t, uint8_t, 564 uint8_t); 565 566 /* 567 * npi_intr_mask_get(): 568 * This function is called to get the mask bits. 569 * Parameters: 570 * handle - NPI handle 571 * ld - logical device (0 - 68) 572 * ldf_mask - pointer to store mask bits info. 573 * Return: 574 * NPI_SUCCESS - 575 * Error: 576 * NPI_FAILURE 577 */ 578 npi_status_t npi_intr_mask_get(npi_handle_t, uint8_t, 579 uint8_t *); 580 581 /* 582 * npi_intr_ldg_mgmt_set(): 583 * This function is called to set interrupt timer and arm bit. 584 * Parameters: 585 * handle - NPI handle 586 * ldg - logical device group (0 - 63) 587 * arm - B_TRUE (arm) B_FALSE (disable) 588 * Return: 589 * NPI_SUCCESS - 590 * Error: 591 * NPI_FAILURE 592 */ 593 npi_status_t npi_intr_ldg_mgmt_set(npi_handle_t, uint8_t, 594 boolean_t, uint8_t); 595 596 597 /* 598 * npi_intr_ldg_mgmt_timer_get(): 599 * This function is called to get the timer counter 600 * Parameters: 601 * handle - NPI handle 602 * ldg - logical device group (0 - 63) 603 * timer_p - pointer to store the timer counter. 604 * Return: 605 * NPI_SUCCESS - 606 * Error: 607 * NPI_FAILURE 608 */ 609 npi_status_t npi_intr_ldg_mgmt_timer_get(npi_handle_t, uint8_t, 610 uint8_t *); 611 612 /* 613 * npi_intr_ldg_mgmt_arm(): 614 * This function is called to arm the group. 615 * Parameters: 616 * handle - NPI handle 617 * ldg - logical device group (0 - 63) 618 * Return: 619 * NPI_SUCCESS - 620 * Error: 621 * NPI_FAILURE 622 */ 623 npi_status_t npi_intr_ldg_mgmt_arm(npi_handle_t, uint8_t); 624 625 /* 626 * npi_fzc_ldg_timer_res_set(): 627 * This function is called to set the timer resolution. 628 * Parameters: 629 * handle - NPI handle 630 * res - timer resolution (# of system clocks) 631 * Return: 632 * NPI_SUCCESS - 633 * Error: 634 * NPI_FAILURE 635 */ 636 npi_status_t npi_fzc_ldg_timer_res_set(npi_handle_t, uint32_t); 637 638 /* 639 * npi_fzc_ldg_timer_res_get(): 640 * This function is called to get the timer resolution. 641 * Parameters: 642 * handle - NPI handle 643 * res_p - pointer to store the timer resolution. 644 * Return: 645 * NPI_SUCCESS - 646 * Error: 647 * NPI_FAILURE 648 */ 649 npi_status_t npi_fzc_ldg_timer_res_get(npi_handle_t, uint8_t *); 650 651 /* 652 * npi_fzc_sid_set(): 653 * This function is called to set the system interrupt data. 654 * Parameters: 655 * handle - NPI handle 656 * ldg - logical group (0 - 63) 657 * sid - NPI defined data to set 658 * Return: 659 * NPI_SUCCESS - 660 * Error: 661 * NPI_FAILURE 662 */ 663 npi_status_t npi_fzc_sid_set(npi_handle_t, fzc_sid_t); 664 665 /* 666 * npi_fzc_sid_get(): 667 * This function is called to get the system interrupt data. 668 * Parameters: 669 * handle - NPI handle 670 * ldg - logical group (0 - 63) 671 * sid_p - NPI defined data to get 672 * Return: 673 * NPI_SUCCESS - 674 * Error: 675 * NPI_FAILURE 676 */ 677 npi_status_t npi_fzc_sid_get(npi_handle_t, p_fzc_sid_t); 678 npi_status_t npi_fzc_sys_err_mask_set(npi_handle_t, uint64_t); 679 npi_status_t npi_fzc_sys_err_stat_get(npi_handle_t, 680 p_sys_err_stat_t); 681 npi_status_t npi_vir_dump_pio_fzc_regs_one(npi_handle_t); 682 npi_status_t npi_vir_dump_ldgnum(npi_handle_t); 683 npi_status_t npi_vir_dump_ldsv(npi_handle_t); 684 npi_status_t npi_vir_dump_imask0(npi_handle_t); 685 npi_status_t npi_vir_dump_sid(npi_handle_t); 686 #ifdef __cplusplus 687 } 688 #endif 689 690 #endif /* _NPI_VIR_H */ 691