1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _NPI_IPP_H 27 #define _NPI_IPP_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 #include <npi.h> 36 #include <nxge_ipp_hw.h> 37 38 /* IBTP IPP Configuration */ 39 40 typedef enum ipp_config_e { 41 CFG_IPP = IPP_EN, 42 CFG_IPP_DFIFO_ECC_CORRECT = IPP_DFIFO_ECC_CORRECT_EN, 43 CFG_IPP_DROP_BAD_CRC = IPP_DROP_BAD_CRC_EN, 44 CFG_IPP_TCP_UDP_CKSUM = IPP_TCP_UDP_CKSUM_EN, 45 CFG_IPP_DFIFO_PIO_WR = IPP_DFIFO_PIO_WR_EN, 46 CFG_IPP_PRE_FIFO_PIO_WR = IPP_PRE_FIFO_PIO_WR_EN, 47 CFG_IPP_FFLP_CKSUM_INFO_PIO_WR = IPP_FFLP_CKSUM_INFO_PIO_WR_EN, 48 CFG_IPP_ALL = (IPP_EN | IPP_DFIFO_ECC_CORRECT_EN | 49 IPP_DROP_BAD_CRC_EN | IPP_TCP_UDP_CKSUM_EN | 50 IPP_DFIFO_PIO_WR_EN | IPP_PRE_FIFO_PIO_WR_EN) 51 } ipp_config_t; 52 53 typedef enum ipp_iconfig_e { 54 ICFG_IPP_PKT_DISCARD_OVFL = IPP_PKT_DISCARD_CNT_INTR_DIS, 55 ICFG_IPP_BAD_TCPIP_CKSUM_OVFL = IPP_BAD_TCPIP_CKSUM_CNT_INTR_DIS, 56 ICFG_IPP_PRE_FIFO_UNDERRUN = IPP_PRE_FIFO_UNDERRUN_INTR_DIS, 57 ICFG_IPP_PRE_FIFO_OVERRUN = IPP_PRE_FIFO_OVERRUN_INTR_DIS, 58 ICFG_IPP_PRE_FIFO_PERR = IPP_PRE_FIFO_PERR_INTR_DIS, 59 ICFG_IPP_DFIFO_ECC_UNCORR_ERR = IPP_DFIFO_ECC_UNCORR_ERR_INTR_DIS, 60 ICFG_IPP_DFIFO_MISSING_EOP_SOP = IPP_DFIFO_MISSING_EOP_SOP_INTR_DIS, 61 ICFG_IPP_ECC_ERR_OVFL = IPP_ECC_ERR_CNT_MAX_INTR_DIS, 62 ICFG_IPP_ALL = (IPP_PKT_DISCARD_CNT_INTR_DIS | 63 IPP_BAD_TCPIP_CKSUM_CNT_INTR_DIS | 64 IPP_PRE_FIFO_UNDERRUN_INTR_DIS | 65 IPP_PRE_FIFO_OVERRUN_INTR_DIS | 66 IPP_PRE_FIFO_PERR_INTR_DIS | 67 IPP_DFIFO_ECC_UNCORR_ERR_INTR_DIS | 68 IPP_DFIFO_MISSING_EOP_SOP_INTR_DIS | 69 IPP_ECC_ERR_CNT_MAX_INTR_DIS) 70 } ipp_iconfig_t; 71 72 typedef enum ipp_counter_e { 73 CNT_IPP_DISCARD_PKT = 0x00000001, 74 CNT_IPP_TCP_CKSUM_ERR = 0x00000002, 75 CNT_IPP_ECC_ERR = 0x00000004, 76 CNT_IPP_ALL = 0x00000007 77 } ipp_counter_t; 78 79 80 typedef enum ipp_port_cnt_idx_e { 81 HWCI_IPP_PKT_DISCARD = 0, 82 HWCI_IPP_TCP_CKSUM_ERR, 83 HWCI_IPP_ECC_ERR, 84 CI_IPP_MISSING_EOP_SOP, 85 CI_IPP_UNCORR_ERR, 86 CI_IPP_PERR, 87 CI_IPP_FIFO_OVERRUN, 88 CI_IPP_FIFO_UNDERRUN, 89 CI_IPP_PORT_CNT_ARR_SIZE 90 } ipp_port_cnt_idx_t; 91 92 /* IPP specific errors */ 93 94 #define IPP_MAX_PKT_BYTES_INVALID 0x50 95 #define IPP_FIFO_ADDR_INVALID 0x51 96 97 /* IPP error return macros */ 98 99 #define NPI_IPP_PORT_INVALID(portn)\ 100 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | PORT_INVALID |\ 101 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 102 #define NPI_IPP_OPCODE_INVALID(portn)\ 103 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | OPCODE_INVALID |\ 104 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 105 #define NPI_IPP_CONFIG_INVALID(portn)\ 106 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | CONFIG_INVALID |\ 107 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 108 #define NPI_IPP_MAX_PKT_BYTES_INVALID(portn)\ 109 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) |\ 110 IPP_MAX_PKT_BYTES_INVALID |\ 111 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 112 #define NPI_IPP_COUNTER_INVALID(portn)\ 113 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | COUNTER_INVALID |\ 114 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 115 #define NPI_IPP_RESET_FAILED(portn)\ 116 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | RESET_FAILED |\ 117 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 118 #define NPI_IPP_FIFO_ADDR_INVALID(portn)\ 119 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) |\ 120 IPP_FIFO_ADDR_INVALID |\ 121 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 122 123 #define IPP_REG_RD(handle, portn, reg, val) {\ 124 NXGE_REG_RD64(handle, IPP_REG_ADDR(portn, reg), val);\ 125 } 126 127 #define IPP_REG_WR(handle, portn, reg, val) {\ 128 NXGE_REG_WR64(handle, IPP_REG_ADDR(portn, reg), val);\ 129 } 130 131 /* IPP NPI function prototypes */ 132 npi_status_t npi_ipp_get_pfifo_rd_ptr(npi_handle_t, uint8_t, 133 uint16_t *); 134 135 npi_status_t npi_ipp_get_pfifo_wr_ptr(npi_handle_t, uint8_t, 136 uint16_t *); 137 138 npi_status_t npi_ipp_write_pfifo(npi_handle_t, uint8_t, 139 uint8_t, uint32_t, uint32_t, uint32_t, 140 uint32_t, uint32_t); 141 142 npi_status_t npi_ipp_read_pfifo(npi_handle_t, uint8_t, 143 uint8_t, uint32_t *, uint32_t *, uint32_t *, 144 uint32_t *, uint32_t *); 145 146 npi_status_t npi_ipp_write_dfifo(npi_handle_t, uint8_t, 147 uint16_t, uint32_t, uint32_t, uint32_t, 148 uint32_t, uint32_t); 149 150 npi_status_t npi_ipp_read_dfifo(npi_handle_t, uint8_t, 151 uint16_t, uint32_t *, uint32_t *, uint32_t *, 152 uint32_t *, uint32_t *); 153 154 npi_status_t npi_ipp_reset(npi_handle_t, uint8_t); 155 npi_status_t npi_ipp_config(npi_handle_t, config_op_t, uint8_t, 156 ipp_config_t); 157 npi_status_t npi_ipp_set_max_pktsize(npi_handle_t, uint8_t, 158 uint32_t); 159 npi_status_t npi_ipp_iconfig(npi_handle_t, config_op_t, uint8_t, 160 ipp_iconfig_t); 161 npi_status_t npi_ipp_get_status(npi_handle_t, uint8_t, 162 ipp_status_t *); 163 npi_status_t npi_ipp_counters(npi_handle_t, counter_op_t, 164 ipp_counter_t, uint8_t, npi_counter_t *); 165 npi_status_t npi_ipp_get_ecc_syndrome(npi_handle_t, uint8_t, 166 uint16_t *); 167 npi_status_t npi_ipp_get_dfifo_eopm_rdptr(npi_handle_t, uint8_t, 168 uint16_t *); 169 npi_status_t npi_ipp_get_state_mach(npi_handle_t, uint8_t, 170 uint32_t *); 171 npi_status_t npi_ipp_get_dfifo_rd_ptr(npi_handle_t, uint8_t, 172 uint16_t *); 173 npi_status_t npi_ipp_get_dfifo_wr_ptr(npi_handle_t, uint8_t, 174 uint16_t *); 175 npi_status_t npi_ipp_get_ecc_err_count(npi_handle_t, uint8_t, 176 uint8_t *); 177 npi_status_t npi_ipp_get_pkt_dis_count(npi_handle_t, uint8_t, 178 uint16_t *); 179 npi_status_t npi_ipp_get_cs_err_count(npi_handle_t, uint8_t, 180 uint16_t *); 181 npi_status_t npi_ipp_dump_regs(npi_handle_t, uint8_t); 182 void npi_ipp_read_regs(npi_handle_t, uint8_t); 183 184 #ifdef __cplusplus 185 } 186 #endif 187 188 #endif /* _NPI_IPP_H */ 189