1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _NPI_IPP_H 27 #define _NPI_IPP_H 28 29 #ifdef __cplusplus 30 extern "C" { 31 #endif 32 33 #include <npi.h> 34 #include <nxge_ipp_hw.h> 35 36 /* IBTP IPP Configuration */ 37 38 typedef enum ipp_config_e { 39 CFG_IPP = IPP_EN, 40 CFG_IPP_DFIFO_ECC_CORRECT = IPP_DFIFO_ECC_CORRECT_EN, 41 CFG_IPP_DROP_BAD_CRC = IPP_DROP_BAD_CRC_EN, 42 CFG_IPP_TCP_UDP_CKSUM = IPP_TCP_UDP_CKSUM_EN, 43 CFG_IPP_DFIFO_PIO_WR = IPP_DFIFO_PIO_WR_EN, 44 CFG_IPP_PRE_FIFO_PIO_WR = IPP_PRE_FIFO_PIO_WR_EN, 45 CFG_IPP_FFLP_CKSUM_INFO_PIO_WR = IPP_FFLP_CKSUM_INFO_PIO_WR_EN, 46 CFG_IPP_ALL = (IPP_EN | IPP_DFIFO_ECC_CORRECT_EN | 47 IPP_DROP_BAD_CRC_EN | IPP_TCP_UDP_CKSUM_EN | 48 IPP_DFIFO_PIO_WR_EN | IPP_PRE_FIFO_PIO_WR_EN) 49 } ipp_config_t; 50 51 typedef enum ipp_iconfig_e { 52 ICFG_IPP_PKT_DISCARD_OVFL = IPP_PKT_DISCARD_CNT_INTR_DIS, 53 ICFG_IPP_BAD_TCPIP_CKSUM_OVFL = IPP_BAD_TCPIP_CKSUM_CNT_INTR_DIS, 54 ICFG_IPP_PRE_FIFO_UNDERRUN = IPP_PRE_FIFO_UNDERRUN_INTR_DIS, 55 ICFG_IPP_PRE_FIFO_OVERRUN = IPP_PRE_FIFO_OVERRUN_INTR_DIS, 56 ICFG_IPP_PRE_FIFO_PERR = IPP_PRE_FIFO_PERR_INTR_DIS, 57 ICFG_IPP_DFIFO_ECC_UNCORR_ERR = IPP_DFIFO_ECC_UNCORR_ERR_INTR_DIS, 58 ICFG_IPP_DFIFO_MISSING_EOP_SOP = IPP_DFIFO_MISSING_EOP_SOP_INTR_DIS, 59 ICFG_IPP_ECC_ERR_OVFL = IPP_ECC_ERR_CNT_MAX_INTR_DIS, 60 ICFG_IPP_ALL = (IPP_PKT_DISCARD_CNT_INTR_DIS | 61 IPP_BAD_TCPIP_CKSUM_CNT_INTR_DIS | 62 IPP_PRE_FIFO_UNDERRUN_INTR_DIS | 63 IPP_PRE_FIFO_OVERRUN_INTR_DIS | 64 IPP_PRE_FIFO_PERR_INTR_DIS | 65 IPP_DFIFO_ECC_UNCORR_ERR_INTR_DIS | 66 IPP_DFIFO_MISSING_EOP_SOP_INTR_DIS | 67 IPP_ECC_ERR_CNT_MAX_INTR_DIS) 68 } ipp_iconfig_t; 69 70 typedef enum ipp_counter_e { 71 CNT_IPP_DISCARD_PKT = 0x00000001, 72 CNT_IPP_TCP_CKSUM_ERR = 0x00000002, 73 CNT_IPP_ECC_ERR = 0x00000004, 74 CNT_IPP_ALL = 0x00000007 75 } ipp_counter_t; 76 77 78 typedef enum ipp_port_cnt_idx_e { 79 HWCI_IPP_PKT_DISCARD = 0, 80 HWCI_IPP_TCP_CKSUM_ERR, 81 HWCI_IPP_ECC_ERR, 82 CI_IPP_MISSING_EOP_SOP, 83 CI_IPP_UNCORR_ERR, 84 CI_IPP_PERR, 85 CI_IPP_FIFO_OVERRUN, 86 CI_IPP_FIFO_UNDERRUN, 87 CI_IPP_PORT_CNT_ARR_SIZE 88 } ipp_port_cnt_idx_t; 89 90 /* IPP specific errors */ 91 92 #define IPP_MAX_PKT_BYTES_INVALID 0x50 93 #define IPP_FIFO_ADDR_INVALID 0x51 94 95 /* IPP error return macros */ 96 97 #define NPI_IPP_PORT_INVALID(portn)\ 98 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | PORT_INVALID |\ 99 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 100 #define NPI_IPP_OPCODE_INVALID(portn)\ 101 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | OPCODE_INVALID |\ 102 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 103 #define NPI_IPP_CONFIG_INVALID(portn)\ 104 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | CONFIG_INVALID |\ 105 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 106 #define NPI_IPP_MAX_PKT_BYTES_INVALID(portn)\ 107 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) |\ 108 IPP_MAX_PKT_BYTES_INVALID |\ 109 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 110 #define NPI_IPP_COUNTER_INVALID(portn)\ 111 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | COUNTER_INVALID |\ 112 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 113 #define NPI_IPP_RESET_FAILED(portn)\ 114 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | RESET_FAILED |\ 115 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 116 #define NPI_IPP_FIFO_ADDR_INVALID(portn)\ 117 ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) |\ 118 IPP_FIFO_ADDR_INVALID |\ 119 IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 120 121 #define IPP_REG_RD(handle, portn, reg, val) {\ 122 NXGE_REG_RD64(handle, IPP_REG_ADDR(portn, reg), val);\ 123 } 124 125 #define IPP_REG_WR(handle, portn, reg, val) {\ 126 NXGE_REG_WR64(handle, IPP_REG_ADDR(portn, reg), val);\ 127 } 128 129 /* IPP NPI function prototypes */ 130 npi_status_t npi_ipp_get_pfifo_rd_ptr(npi_handle_t, uint8_t, 131 uint16_t *); 132 133 npi_status_t npi_ipp_get_pfifo_wr_ptr(npi_handle_t, uint8_t, 134 uint16_t *); 135 136 npi_status_t npi_ipp_write_pfifo(npi_handle_t, uint8_t, 137 uint8_t, uint32_t, uint32_t, uint32_t, 138 uint32_t, uint32_t); 139 140 npi_status_t npi_ipp_read_pfifo(npi_handle_t, uint8_t, 141 uint8_t, uint32_t *, uint32_t *, uint32_t *, 142 uint32_t *, uint32_t *); 143 144 npi_status_t npi_ipp_write_dfifo(npi_handle_t, uint8_t, 145 uint16_t, uint32_t, uint32_t, uint32_t, 146 uint32_t, uint32_t); 147 148 npi_status_t npi_ipp_read_dfifo(npi_handle_t, uint8_t, 149 uint16_t, uint32_t *, uint32_t *, uint32_t *, 150 uint32_t *, uint32_t *); 151 152 npi_status_t npi_ipp_reset(npi_handle_t, uint8_t); 153 npi_status_t npi_ipp_config(npi_handle_t, config_op_t, uint8_t, 154 ipp_config_t); 155 npi_status_t npi_ipp_set_max_pktsize(npi_handle_t, uint8_t, 156 uint32_t); 157 npi_status_t npi_ipp_iconfig(npi_handle_t, config_op_t, uint8_t, 158 ipp_iconfig_t); 159 npi_status_t npi_ipp_get_status(npi_handle_t, uint8_t, 160 ipp_status_t *); 161 npi_status_t npi_ipp_counters(npi_handle_t, counter_op_t, 162 ipp_counter_t, uint8_t, npi_counter_t *); 163 npi_status_t npi_ipp_get_ecc_syndrome(npi_handle_t, uint8_t, 164 uint16_t *); 165 npi_status_t npi_ipp_get_dfifo_eopm_rdptr(npi_handle_t, uint8_t, 166 uint16_t *); 167 npi_status_t npi_ipp_get_state_mach(npi_handle_t, uint8_t, 168 uint32_t *); 169 npi_status_t npi_ipp_get_dfifo_rd_ptr(npi_handle_t, uint8_t, 170 uint16_t *); 171 npi_status_t npi_ipp_get_dfifo_wr_ptr(npi_handle_t, uint8_t, 172 uint16_t *); 173 npi_status_t npi_ipp_get_ecc_err_count(npi_handle_t, uint8_t, 174 uint8_t *); 175 npi_status_t npi_ipp_get_pkt_dis_count(npi_handle_t, uint8_t, 176 uint16_t *); 177 npi_status_t npi_ipp_get_cs_err_count(npi_handle_t, uint8_t, 178 uint16_t *); 179 npi_status_t npi_ipp_dump_regs(npi_handle_t, uint8_t); 180 void npi_ipp_read_regs(npi_handle_t, uint8_t); 181 182 #ifdef __cplusplus 183 } 184 #endif 185 186 #endif /* _NPI_IPP_H */ 187