1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 12 /* 13 * Copyright 2018 Nexenta Systems, Inc. 14 * Copyright 2016 The MathWorks, Inc. All rights reserved. 15 * Copyright 2019 Joyent, Inc. 16 * Copyright 2019 Western Digital Corporation. 17 */ 18 19 #ifndef _NVME_VAR_H 20 #define _NVME_VAR_H 21 22 #include <sys/ddi.h> 23 #include <sys/sunddi.h> 24 #include <sys/blkdev.h> 25 #include <sys/taskq_impl.h> 26 #include <sys/list.h> 27 28 /* 29 * NVMe driver state 30 */ 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 #define NVME_FMA_INIT 0x1 37 #define NVME_REGS_MAPPED 0x2 38 #define NVME_ADMIN_QUEUE 0x4 39 #define NVME_CTRL_LIMITS 0x8 40 #define NVME_INTERRUPTS 0x10 41 #define NVME_UFM_INIT 0x20 42 43 #define NVME_MIN_ADMIN_QUEUE_LEN 16 44 #define NVME_MIN_IO_QUEUE_LEN 16 45 #define NVME_DEFAULT_ADMIN_QUEUE_LEN 256 46 #define NVME_DEFAULT_IO_QUEUE_LEN 1024 47 #define NVME_DEFAULT_ASYNC_EVENT_LIMIT 10 48 #define NVME_MIN_ASYNC_EVENT_LIMIT 1 49 #define NVME_DEFAULT_MIN_BLOCK_SIZE 512 50 51 52 typedef struct nvme nvme_t; 53 typedef struct nvme_namespace nvme_namespace_t; 54 typedef struct nvme_minor_state nvme_minor_state_t; 55 typedef struct nvme_dma nvme_dma_t; 56 typedef struct nvme_cmd nvme_cmd_t; 57 typedef struct nvme_cq nvme_cq_t; 58 typedef struct nvme_qpair nvme_qpair_t; 59 typedef struct nvme_task_arg nvme_task_arg_t; 60 61 struct nvme_minor_state { 62 kmutex_t nm_mutex; 63 boolean_t nm_oexcl; 64 uint_t nm_ocnt; 65 }; 66 67 struct nvme_dma { 68 ddi_dma_handle_t nd_dmah; 69 ddi_acc_handle_t nd_acch; 70 ddi_dma_cookie_t nd_cookie; 71 uint_t nd_ncookie; 72 caddr_t nd_memp; 73 size_t nd_len; 74 boolean_t nd_cached; 75 }; 76 77 struct nvme_cmd { 78 struct list_node nc_list; 79 80 nvme_sqe_t nc_sqe; 81 nvme_cqe_t nc_cqe; 82 83 void (*nc_callback)(void *); 84 bd_xfer_t *nc_xfer; 85 boolean_t nc_completed; 86 boolean_t nc_dontpanic; 87 uint16_t nc_sqid; 88 89 nvme_dma_t *nc_dma; 90 91 kmutex_t nc_mutex; 92 kcondvar_t nc_cv; 93 94 taskq_ent_t nc_tqent; 95 nvme_t *nc_nvme; 96 }; 97 98 struct nvme_cq { 99 size_t ncq_nentry; 100 uint16_t ncq_id; 101 102 nvme_dma_t *ncq_dma; 103 nvme_cqe_t *ncq_cq; 104 uint_t ncq_head; 105 uint_t ncq_tail; 106 uintptr_t ncq_hdbl; 107 int ncq_phase; 108 109 taskq_t *ncq_cmd_taskq; 110 111 kmutex_t ncq_mutex; 112 }; 113 114 struct nvme_qpair { 115 size_t nq_nentry; 116 117 /* submission fields */ 118 nvme_dma_t *nq_sqdma; 119 nvme_sqe_t *nq_sq; 120 uint_t nq_sqhead; 121 uint_t nq_sqtail; 122 uintptr_t nq_sqtdbl; 123 124 /* completion */ 125 nvme_cq_t *nq_cq; 126 127 /* shared structures for completion and submission */ 128 nvme_cmd_t **nq_cmd; /* active command array */ 129 uint16_t nq_next_cmd; /* next potential empty queue slot */ 130 uint_t nq_active_cmds; /* number of active cmds */ 131 132 kmutex_t nq_mutex; /* protects shared state */ 133 ksema_t nq_sema; /* semaphore to ensure q always has >= 1 empty slot */ 134 }; 135 136 struct nvme { 137 dev_info_t *n_dip; 138 int n_progress; 139 140 caddr_t n_regs; 141 ddi_acc_handle_t n_regh; 142 143 kmem_cache_t *n_cmd_cache; 144 kmem_cache_t *n_prp_cache; 145 146 size_t n_inth_sz; 147 ddi_intr_handle_t *n_inth; 148 int n_intr_cnt; 149 uint_t n_intr_pri; 150 int n_intr_cap; 151 int n_intr_type; 152 int n_intr_types; 153 154 char *n_product; 155 char *n_vendor; 156 157 nvme_version_t n_version; 158 boolean_t n_dead; 159 boolean_t n_strict_version; 160 boolean_t n_ignore_unknown_vendor_status; 161 uint32_t n_admin_queue_len; 162 uint32_t n_io_squeue_len; 163 uint32_t n_io_cqueue_len; 164 uint16_t n_async_event_limit; 165 uint_t n_min_block_size; 166 uint16_t n_abort_command_limit; 167 uint64_t n_max_data_transfer_size; 168 boolean_t n_write_cache_present; 169 boolean_t n_write_cache_enabled; 170 int n_error_log_len; 171 boolean_t n_lba_range_supported; 172 boolean_t n_auto_pst_supported; 173 boolean_t n_async_event_supported; 174 boolean_t n_progress_supported; 175 int n_submission_queues; 176 int n_completion_queues; 177 178 int n_nssr_supported; 179 int n_doorbell_stride; 180 int n_timeout; 181 int n_arbitration_mechanisms; 182 int n_cont_queues_reqd; 183 int n_max_queue_entries; 184 int n_pageshift; 185 int n_pagesize; 186 187 int n_namespace_count; 188 uint_t n_namespaces_attachable; 189 uint_t n_ioq_count; 190 uint_t n_cq_count; 191 192 nvme_identify_ctrl_t *n_idctl; 193 194 /* Pointer to the admin queue, which is always queue 0 in n_ioq. */ 195 nvme_qpair_t *n_adminq; 196 /* 197 * All command queues, including the admin queue. 198 * Its length is: n_ioq_count + 1. 199 */ 200 nvme_qpair_t **n_ioq; 201 nvme_cq_t **n_cq; 202 203 nvme_namespace_t *n_ns; 204 205 ddi_dma_attr_t n_queue_dma_attr; 206 ddi_dma_attr_t n_prp_dma_attr; 207 ddi_dma_attr_t n_sgl_dma_attr; 208 ddi_device_acc_attr_t n_reg_acc_attr; 209 ddi_iblock_cookie_t n_fm_ibc; 210 int n_fm_cap; 211 212 ksema_t n_abort_sema; 213 214 /* state for devctl minor node */ 215 nvme_minor_state_t n_minor; 216 217 /* errors detected by driver */ 218 uint32_t n_dma_bind_err; 219 uint32_t n_abort_failed; 220 uint32_t n_cmd_timeout; 221 uint32_t n_cmd_aborted; 222 uint32_t n_wrong_logpage; 223 uint32_t n_unknown_logpage; 224 uint32_t n_too_many_cookies; 225 226 /* errors detected by hardware */ 227 uint32_t n_data_xfr_err; 228 uint32_t n_internal_err; 229 uint32_t n_abort_rq_err; 230 uint32_t n_abort_sq_del; 231 uint32_t n_nvm_cap_exc; 232 uint32_t n_nvm_ns_notrdy; 233 uint32_t n_inv_cq_err; 234 uint32_t n_inv_qid_err; 235 uint32_t n_max_qsz_exc; 236 uint32_t n_inv_int_vect; 237 uint32_t n_inv_log_page; 238 uint32_t n_inv_format; 239 uint32_t n_inv_q_del; 240 uint32_t n_cnfl_attr; 241 uint32_t n_inv_prot; 242 uint32_t n_readonly; 243 244 /* errors reported by asynchronous events */ 245 uint32_t n_diagfail_event; 246 uint32_t n_persistent_event; 247 uint32_t n_transient_event; 248 uint32_t n_fw_load_event; 249 uint32_t n_reliability_event; 250 uint32_t n_temperature_event; 251 uint32_t n_spare_event; 252 uint32_t n_vendor_event; 253 uint32_t n_unknown_event; 254 255 /* hot removal NDI event handling */ 256 ddi_eventcookie_t n_rm_cookie; 257 ddi_callback_id_t n_ev_rm_cb_id; 258 259 /* DDI UFM handle */ 260 ddi_ufm_handle_t *n_ufmh; 261 /* Cached Firmware Slot Information log page */ 262 nvme_fwslot_log_t *n_fwslot; 263 /* Lock protecting the cached firmware slot info */ 264 kmutex_t n_fwslot_mutex; 265 }; 266 267 struct nvme_namespace { 268 nvme_t *ns_nvme; 269 uint8_t ns_eui64[8]; 270 char ns_name[17]; 271 272 bd_handle_t ns_bd_hdl; 273 274 uint32_t ns_id; 275 size_t ns_block_count; 276 size_t ns_block_size; 277 size_t ns_best_block_size; 278 279 boolean_t ns_ignore; 280 281 nvme_identify_nsid_t *ns_idns; 282 283 /* state for attachment point minor node */ 284 nvme_minor_state_t ns_minor; 285 286 /* 287 * If a namespace has no EUI64, we create a devid in 288 * nvme_prepare_devid(). 289 */ 290 char *ns_devid; 291 }; 292 293 struct nvme_task_arg { 294 nvme_t *nt_nvme; 295 nvme_cmd_t *nt_cmd; 296 }; 297 298 #ifdef __cplusplus 299 } 300 #endif 301 302 #endif /* _NVME_VAR_H */ 303