1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2008 NetXen, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 /* 27 * Data types and structure for HAL - NIC interface. 28 * 29 */ 30 31 #ifndef _NXHAL_NIC_INTERFACE_H_ 32 #define _NXHAL_NIC_INTERFACE_H_ 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 /* 39 * Simple Types 40 */ 41 42 typedef U32 nx_reg_addr_t; 43 44 /* 45 * Root crb-based firmware commands 46 */ 47 48 /* 49 * CRB Root Command 50 * A single set of crbs is used across all physical/virtual 51 * functions for capability queries, initialization, and 52 * context creation/destruction. 53 * 54 * There are 4 CRBS: 55 * Command/Response CRB 56 * Argument1 CRB 57 * Argument2 CRB 58 * Argument3 CRB 59 * Signature CRB 60 * 61 * The cmd/rsp crb is always intiated by the host via 62 * a command code and always responded by the card with 63 * a response code. The cmd and rsp codes are disjoint. 64 * The sequence of use is always CMD, RSP, CLEAR CMD. 65 * 66 * The arguments are for passing in command specific 67 * and response specific parameters/data. 68 * 69 * The signature is composed of a magic value, the 70 * pci function id, and a command sequence id: 71 * [7:0] = pci function 72 * [15:8] = version 73 * [31:16] = magic of 0xcafe 74 * 75 * The pci function allows the card to take correct 76 * action for the given particular commands. 77 * The firmware will attempt to detect 78 * an errant driver that has died while holding 79 * the root crb hardware lock. Such an error condition 80 * shows up as the cmd/rsp crb stuck in a non-clear state. 81 * 82 * Interface Sequence: 83 * Host always makes requests and firmware always responds. 84 * Note that data field is always set prior to command field. 85 * 86 * [READ] CMD/RSP CRB ARGUMENT FIELD 87 * Host grab lock 88 * Host -> CMD optional parameter 89 * FW <- (Good) RSP-OK DATA 90 * FW <- (Fail) RSP-FAIL optional failure code 91 * Host -> CLEAR 92 * Host release lock 93 * 94 * [WRITE] CMD/RSP CRB ARGUMENT FIELD 95 * Host grab lock 96 * Host -> CMD DATA 97 * FW <- (Good) RSP-OK optional write status 98 * FW <- (Write) RSP-FAIL optional failure code 99 * Host -> CLEAR 100 * Host release lock 101 */ 102 103 104 /* 105 * CMD/RSP 106 */ 107 108 #define NX_CDRP_SIGNATURE_TO_PCIFN(sign) ((sign) & 0xff) 109 #define NX_CDRP_SIGNATURE_TO_VERSION(sign) (((sign)>>8) & 0xff) 110 #define NX_CDRP_SIGNATURE_TO_MAGIC(sign) (((sign)>>16) & 0xffff) 111 #define NX_CDRP_SIGNATURE_VALID(sign) \ 112 (NX_CDRP_SIGNATURE_TO_MAGIC(sign) == 0xcafe && \ 113 NX_CDRP_SIGNATURE_TO_PCIFN(sign) < 8) 114 #define NX_CDRP_SIGNATURE_MAKE(pcifn, version) \ 115 (((pcifn) & 0xff) | \ 116 (((version) & 0xff) << 8) | \ 117 ((u32)0xcafe << 16)) 118 119 #define NX_CDRP_CLEAR 0x00000000 120 #define NX_CDRP_CMD_BIT 0x80000000 121 122 /* 123 * All responses must have the NX_CDRP_CMD_BIT cleared 124 * in the crb NX_CDRP_CRB_OFFSET. 125 */ 126 127 #define NX_CDRP_FORM_RSP(rsp) (rsp) 128 #define NX_CDRP_IS_RSP(rsp) (((rsp) & NX_CDRP_CMD_BIT) == 0) 129 130 #define NX_CDRP_RSP_OK 0x00000001 131 #define NX_CDRP_RSP_FAIL 0x00000002 132 #define NX_CDRP_RSP_TIMEOUT 0x00000003 133 134 /* 135 * All commands must have the NX_CDRP_CMD_BIT set in 136 * the crb NX_CDRP_CRB_OFFSET. 137 * The macros below do not have it explicitly set to 138 * allow their use in lookup tables 139 */ 140 #define NX_CDRP_FORM_CMD(cmd) (NX_CDRP_CMD_BIT | (cmd)) 141 #define NX_CDRP_IS_CMD(cmd) (((cmd) & NX_CDRP_CMD_BIT) != 0) 142 143 /* [CMD] Capability Vector [RSP] Capability Vector */ 144 #define NX_CDRP_CMD_SUBMIT_CAPABILITIES 0x00000001 145 146 /* [CMD] - [RSP] Query Value */ 147 #define NX_CDRP_CMD_READ_MAX_RDS_PER_CTX 0x00000002 148 149 /* [CMD] - [RSP] Query Value */ 150 #define NX_CDRP_CMD_READ_MAX_SDS_PER_CTX 0x00000003 151 152 /* [CMD] - [RSP] Query Value */ 153 #define NX_CDRP_CMD_READ_MAX_RULES_PER_CTX 0x00000004 154 155 /* [CMD] - [RSP] Query Value */ 156 #define NX_CDRP_CMD_READ_MAX_RX_CTX 0x00000005 157 158 /* [CMD] - [RSP] Query Value */ 159 #define NX_CDRP_CMD_READ_MAX_TX_CTX 0x00000006 160 161 /* [CMD] Rx Config DMA Addr [RSP] rcode */ 162 #define NX_CDRP_CMD_CREATE_RX_CTX 0x00000007 163 164 /* [CMD] Rx Context Handle, Reset Kind [RSP] rcode */ 165 #define NX_CDRP_CMD_DESTROY_RX_CTX 0x00000008 166 167 /* [CMD] Tx Config DMA Addr [RSP] rcode */ 168 #define NX_CDRP_CMD_CREATE_TX_CTX 0x00000009 169 170 /* [CMD] Tx Context Handle, Reset Kind [RSP] rcode */ 171 #define NX_CDRP_CMD_DESTROY_TX_CTX 0x0000000a 172 173 /* [CMD] Stat setup dma addr - [RSP] Handle, rcode */ 174 #define NX_CDRP_CMD_SETUP_STATISTICS 0x0000000e 175 176 /* [CMD] Handle - [RSP] rcode */ 177 #define NX_CDRP_CMD_GET_STATISTICS 0x0000000f 178 179 /* [CMD] Handle - [RSP] rcode */ 180 #define NX_CDRP_CMD_DELETE_STATISTICS 0x00000010 181 182 /* [CMD] - [RSP] rcode */ 183 #define NX_CDRP_CMD_GEN_INT 0x00000011 184 185 /* [CMD] MTU - [RSP] rcode */ 186 #define NX_CDRP_CMD_SET_MTU 0x00000012 187 188 #define NX_CDRP_CMD_MAX 0x00000013 189 190 /* 191 * Capabilities 192 */ 193 194 #define NX_CAP_BIT(class, bit) (1 << bit) 195 196 /* Class 0 (i.e. ARGS 1) */ 197 #define NX_CAP0_LEGACY_CONTEXT NX_CAP_BIT(0, 0) 198 #define NX_CAP0_MULTI_CONTEXT NX_CAP_BIT(0, 1) 199 #define NX_CAP0_LEGACY_MN NX_CAP_BIT(0, 2) 200 #define NX_CAP0_LEGACY_MS NX_CAP_BIT(0, 3) 201 #define NX_CAP0_CUT_THROUGH NX_CAP_BIT(0, 4) 202 #define NX_CAP0_LRO NX_CAP_BIT(0, 5) 203 #define NX_CAP0_LSO NX_CAP_BIT(0, 6) 204 #define NX_CAP0_JUMBO_CONTIGUOUS NX_CAP_BIT(0, 7) 205 #define NX_CAP0_LRO_CONTIGUOUS NX_CAP_BIT(0, 8) 206 207 /* Class 1 (i.e. ARGS 2) */ 208 #define NX_CAP1_NIC NX_CAP_BIT(1, 0) 209 #define NX_CAP1_PXE NX_CAP_BIT(1, 1) 210 #define NX_CAP1_CHIMNEY NX_CAP_BIT(1, 2) 211 #define NX_CAP1_LSA NX_CAP_BIT(1, 3) 212 #define NX_CAP1_RDMA NX_CAP_BIT(1, 4) 213 #define NX_CAP1_ISCSI NX_CAP_BIT(1, 5) 214 #define NX_CAP1_FCOE NX_CAP_BIT(1, 6) 215 216 /* Class 2 (i.e. ARGS 3) */ 217 218 /* 219 * Rules 220 */ 221 222 typedef U32 nx_rx_rule_type_t; 223 224 #define NX_RX_RULETYPE_DEFAULT 0 225 #define NX_RX_RULETYPE_MAC 1 226 #define NX_RX_RULETYPE_MAC_VLAN 2 227 #define NX_RX_RULETYPE_MAC_RSS 3 228 #define NX_RX_RULETYPE_MAC_VLAN_RSS 4 229 #define NX_RX_RULETYPE_MAX 5 230 231 typedef U32 nx_rx_rule_cmd_t; 232 233 #define NX_RX_RULECMD_ADD 0 234 #define NX_RX_RULECMD_REMOVE 1 235 #define NX_RX_RULECMD_MAX 2 236 237 typedef struct nx_rx_rule_arg_s { 238 union { 239 struct { 240 char mac[6]; 241 } m; 242 struct { 243 char mac[6]; 244 char vlan; 245 } mv; 246 struct { 247 char mac[6]; 248 } mr; 249 struct { 250 char mac[6]; 251 char vlan; 252 } mvr; 253 } s1; 254 /* will be union of all the different args for rules */ 255 U64 data; 256 } nx_rx_rule_arg_t; 257 258 typedef struct nx_rx_rule_s { 259 U32 id; 260 U32 active; 261 nx_rx_rule_arg_t arg; 262 nx_rx_rule_type_t type; 263 } nx_rx_rule_t; 264 265 /* MSG - REQUIRES TX CONTEXT */ 266 267 /* 268 * The rules can be added/deleted from both the 269 * host and card sides so rq/rsp are similar. 270 */ 271 typedef struct nx_hostmsg_rx_rule_s { 272 nx_rx_rule_cmd_t cmd; 273 nx_rx_rule_t rule; 274 } nx_hostmsg_rx_rule_t; 275 276 typedef struct nx_cardmsg_rx_rule_s { 277 nx_rcode_t rcode; 278 nx_rx_rule_cmd_t cmd; 279 nx_rx_rule_t rule; 280 } nx_cardmsg_rx_rule_t; 281 282 283 /* 284 * Common to Rx/Tx contexts 285 */ 286 287 /* 288 * Context states 289 */ 290 291 typedef U32 nx_host_ctx_state_t; 292 293 #define NX_HOST_CTX_STATE_FREED 0 /* Invalid state */ 294 #define NX_HOST_CTX_STATE_ALLOCATED 1 /* Not committed */ 295 /* The following states imply FW is aware of context */ 296 #define NX_HOST_CTX_STATE_ACTIVE 2 297 #define NX_HOST_CTX_STATE_DISABLED 3 298 #define NX_HOST_CTX_STATE_QUIESCED 4 299 #define NX_HOST_CTX_STATE_MAX 5 300 301 /* 302 * Interrupt mask crb use must be set identically on the Tx 303 * and Rx context configs across a pci function 304 */ 305 306 /* Rx and Tx have unique interrupt/crb */ 307 #define NX_HOST_INT_CRB_MODE_UNIQUE 0 308 /* Rx and Tx share a common interrupt/crb */ 309 #define NX_HOST_INT_CRB_MODE_SHARED 1 /* <= LEGACY */ 310 /* Rx does not use a crb */ 311 #define NX_HOST_INT_CRB_MODE_NORX 2 312 /* Tx does not use a crb */ 313 #define NX_HOST_INT_CRB_MODE_NOTX 3 314 /* Neither Rx nor Tx use a crb */ 315 #define NX_HOST_INT_CRB_MODE_NORXTX 4 316 317 /* 318 * Destroy Rx/Tx 319 */ 320 321 #define NX_DESTROY_CTX_RESET 0 322 #define NX_DESTROY_CTX_D3_RESET 1 323 #define NX_DESTROY_CTX_MAX 2 324 325 326 /* 327 * Tx 328 */ 329 330 /* 331 * Components of the host-request for Tx context creation. 332 * CRB - DOES NOT REQUIRE Rx/TX CONTEXT 333 */ 334 335 typedef struct nx_hostrq_cds_ring_s { 336 U64 host_phys_addr; /* Ring base addr */ 337 U32 ring_size; /* Ring entries */ 338 U32 rsvd; /* Padding */ 339 } nx_hostrq_cds_ring_t; 340 341 typedef struct nx_hostrq_tx_ctx_s { 342 U64 host_rsp_dma_addr; /* Response dma'd here */ 343 U64 cmd_cons_dma_addr; /* */ 344 U64 dummy_dma_addr; /* */ 345 U32 capabilities[4]; /* Flag bit vector */ 346 U32 host_int_crb_mode; /* Interrupt crb usage */ 347 U32 rsvd1; /* Padding */ 348 U16 rsvd2; /* Padding */ 349 U16 interrupt_ctl; 350 U16 msi_index; 351 U16 rsvd3; /* Padding */ 352 nx_hostrq_cds_ring_t cds_ring; /* Desc of cds ring */ 353 U8 reserved[128]; /* future expansion */ 354 } nx_hostrq_tx_ctx_t; 355 356 typedef struct nx_cardrsp_cds_ring_s { 357 U32 host_producer_crb; /* Crb to use */ 358 U32 interrupt_crb; /* Crb to use */ 359 } nx_cardrsp_cds_ring_t; 360 361 typedef struct nx_cardrsp_tx_ctx_s { 362 U32 host_ctx_state; /* Starting state */ 363 U16 context_id; /* Handle for context */ 364 U8 phys_port; /* Physical id of port */ 365 U8 virt_port; /* Virtual/Logical id of port */ 366 nx_cardrsp_cds_ring_t cds_ring; /* Card cds settings */ 367 U8 reserved[128]; /* future expansion */ 368 } nx_cardrsp_tx_ctx_t; 369 370 #define SIZEOF_HOSTRQ_TX(HOSTRQ_TX) \ 371 (sizeof (HOSTRQ_TX)) 372 373 #define SIZEOF_CARDRSP_TX(CARDRSP_TX) \ 374 (sizeof (CARDRSP_TX)) 375 376 /* 377 * Rx 378 */ 379 380 /* 381 * RDS ring mapping to producer crbs 382 */ 383 384 /* Each ring has a unique crb */ 385 #define NX_HOST_RDS_CRB_MODE_UNIQUE 0 /* <= LEGACY */ 386 387 /* 388 * All configured RDS Rings share common crb: 389 * 1 Ring - same as unique 390 * 2 Rings - 16, 16 391 * 3 Rings - 10, 10, 10 392 */ 393 #define NX_HOST_RDS_CRB_MODE_SHARED 1 394 395 /* 396 * Bit usage is specified per-ring using the 397 * ring's size. Sum of bit lengths must be <= 32. 398 * Packing is [Ring N] ... [Ring 1][Ring 0] 399 */ 400 #define NX_HOST_RDS_CRB_MODE_CUSTOM 2 401 #define NX_HOST_RDS_CRB_MODE_MAX 3 402 403 404 /* 405 * RDS Ting Types 406 */ 407 408 #define NX_RDS_RING_TYPE_NORMAL 0 409 #define NX_RDS_RING_TYPE_JUMBO 1 410 #define NX_RDS_RING_TYPE_LRO 2 411 #define NX_RDS_RING_TYPE_MAX 3 412 413 /* 414 * Components of the host-request for Rx context creation. 415 * CRB - DOES NOT REQUIRE Rx/TX CONTEXT 416 */ 417 418 typedef struct nx_hostrq_sds_ring_s { 419 U64 host_phys_addr; /* Ring base addr */ 420 U32 ring_size; /* Ring entries */ 421 U16 msi_index; 422 U16 rsvd; /* Padding */ 423 } nx_hostrq_sds_ring_t; 424 425 typedef struct nx_hostrq_rds_ring_s { 426 U64 host_phys_addr; /* Ring base addr */ 427 U64 buff_size; /* Packet buffer size */ 428 U32 ring_size; /* Ring entries */ 429 U32 ring_kind; /* Class of ring */ 430 } nx_hostrq_rds_ring_t; 431 432 typedef struct nx_hostrq_rx_ctx_s { 433 U64 host_rsp_dma_addr; /* Response dma'd here */ 434 U32 capabilities[4]; /* Flag bit vector */ 435 U32 host_int_crb_mode; /* Interrupt crb usage */ 436 U32 host_rds_crb_mode; /* RDS crb usage */ 437 /* These ring offsets are relative to end of structure */ 438 U32 rds_ring_offset; /* Offset to RDS config */ 439 U32 sds_ring_offset; /* Offset to SDS config */ 440 U16 num_rds_rings; /* Count of RDS rings */ 441 U16 num_sds_rings; /* Count of SDS rings */ 442 U16 rsvd1; /* Padding */ 443 U16 rsvd2; /* Padding */ 444 U8 reserved[128]; /* reserve space for future expansion */ 445 /* 446 * MUST BE 64-bit aligned. 447 * The following is packed: 448 * - N hostrq_rds_rings 449 * - N hostrq_sds_rings 450 */ 451 } nx_hostrq_rx_ctx_t; 452 453 typedef struct nx_cardrsp_rds_ring_s { 454 U32 host_producer_crb; /* Crb to use */ 455 U32 rsvd1; /* Padding */ 456 } nx_cardrsp_rds_ring_t; 457 458 typedef struct nx_cardrsp_sds_ring_s { 459 U32 host_consumer_crb; /* Crb to use */ 460 U32 interrupt_crb; /* Crb to use */ 461 } nx_cardrsp_sds_ring_t; 462 463 typedef struct nx_cardrsp_rx_ctx_s { 464 /* These ring offsets are relative to end of structure */ 465 U32 rds_ring_offset; /* Offset to RDS config */ 466 U32 sds_ring_offset; /* Offset to SDS config */ 467 U32 host_ctx_state; /* Starting State */ 468 U32 num_fn_per_port; /* How many PCI fn share the port */ 469 U16 num_rds_rings; /* Count of RDS rings */ 470 U16 num_sds_rings; /* Count of SDS rings */ 471 U16 context_id; /* Handle for context */ 472 U8 phys_port; /* Physical id of port */ 473 U8 virt_port; /* Virtual/Logical id of port */ 474 U8 reserved[128]; /* save space for future expansion */ 475 /* 476 * MUST BE 64-bit aligned. 477 * The following is packed: 478 * - N cardrsp_rds_rings 479 * - N cardrs_sds_rings 480 */ 481 } nx_cardrsp_rx_ctx_t; 482 483 #define SIZEOF_HOSTRQ_RX(HOSTRQ_RX, rds_rings, sds_rings) \ 484 (sizeof (HOSTRQ_RX) + \ 485 (rds_rings)*(sizeof (nx_hostrq_rds_ring_t)) + \ 486 (sds_rings)*(sizeof (nx_hostrq_sds_ring_t))) 487 488 #define SIZEOF_CARDRSP_RX(CARDRSP_RX, rds_rings, sds_rings) \ 489 (sizeof (CARDRSP_RX) + \ 490 (rds_rings)*(sizeof (nx_cardrsp_rds_ring_t)) + \ 491 (sds_rings)*(sizeof (nx_cardrsp_sds_ring_t))) 492 493 494 /* 495 * Statistics 496 */ 497 498 /* 499 * The model of statistics update to use 500 */ 501 502 #define NX_STATISTICS_MODE_INVALID 0 503 504 /* 505 * Permanent setup; Updates are only sent on explicit request 506 * NX_CDRP_CMD_GET_STATISTICS) 507 */ 508 #define NX_STATISTICS_MODE_PULL 1 509 510 /* 511 * Permanent setup; Updates are sent automatically and on 512 * explicit request (NX_CDRP_CMD_GET_STATISTICS) 513 */ 514 #define NX_STATISTICS_MODE_PUSH 2 515 516 /* One time stat update. */ 517 #define NX_STATISTICS_MODE_SINGLE_SHOT 3 518 519 #define NX_STATISTICS_MODE_MAX 4 520 521 /* 522 * What set of stats 523 */ 524 #define NX_STATISTICS_TYPE_INVALID 0 525 #define NX_STATISTICS_TYPE_NIC_RX_CORE 1 526 #define NX_STATISTICS_TYPE_NIC_TX_CORE 2 527 #define NX_STATISTICS_TYPE_NIC_RX_ALL 3 528 #define NX_STATISTICS_TYPE_NIC_TX_ALL 4 529 #define NX_STATISTICS_TYPE_MAX 5 530 531 532 /* 533 * Request to setup statistics gathering. 534 * CRB - DOES NOT REQUIRE Rx/TX CONTEXT 535 */ 536 537 typedef struct nx_hostrq_stat_setup_s { 538 U64 host_stat_buffer; /* Where to dma stats */ 539 U32 host_stat_size; /* Size of stat buffer */ 540 U16 context_id; /* Which context */ 541 U16 stat_type; /* What class of stats */ 542 U16 stat_mode; /* When to update */ 543 U16 stat_interval; /* Frequency of update */ 544 } nx_hostrq_stat_setup_t; 545 546 #ifdef __cplusplus 547 } 548 #endif 549 550 #endif /* _NXHAL_NIC_INTERFACE_H_ */ 551