xref: /illumos-gate/usr/src/uts/common/io/mlxcx/mlxcx_gld.c (revision 668deb93650906efec36a69b7d09c98435d9cf24)
1 /*
2  * This file and its contents are supplied under the terms of the
3  * Common Development and Distribution License ("CDDL"), version 1.0.
4  * You may only use this file in accordance with the terms of version
5  * 1.0 of the CDDL.
6  *
7  * A full copy of the text of the CDDL should have accompanied this
8  * source.  A copy of the CDDL is also available via the Internet at
9  * http://www.illumos.org/license/CDDL.
10  */
11 
12 /*
13  * Copyright (c) 2020, the University of Queensland
14  * Copyright 2020 RackTop Systems, Inc.
15  */
16 
17 /*
18  * Mellanox Connect-X 4/5/6 driver.
19  */
20 
21 #include <sys/modctl.h>
22 #include <sys/conf.h>
23 #include <sys/devops.h>
24 #include <sys/sysmacros.h>
25 #include <sys/vlan.h>
26 
27 #include <sys/pattr.h>
28 #include <sys/dlpi.h>
29 
30 #include <sys/mac_provider.h>
31 
32 /* Need these for mac_vlan_header_info() */
33 #include <sys/mac_client.h>
34 #include <sys/mac_client_priv.h>
35 
36 #include <mlxcx.h>
37 
38 static char *mlxcx_priv_props[] = {
39 	NULL
40 };
41 
42 #define	MBITS		1000000ULL
43 #define	GBITS		(1000ULL * MBITS)
44 
45 static uint64_t
46 mlxcx_speed_to_bits(mlxcx_eth_proto_t v)
47 {
48 	switch (v) {
49 	case MLXCX_PROTO_SGMII_100BASE:
50 		return (100ULL * MBITS);
51 	case MLXCX_PROTO_SGMII:
52 	case MLXCX_PROTO_1000BASE_KX:
53 		return (1000ULL * MBITS);
54 	case MLXCX_PROTO_10GBASE_CX4:
55 	case MLXCX_PROTO_10GBASE_KX4:
56 	case MLXCX_PROTO_10GBASE_KR:
57 	case MLXCX_PROTO_10GBASE_CR:
58 	case MLXCX_PROTO_10GBASE_SR:
59 	case MLXCX_PROTO_10GBASE_ER_LR:
60 		return (10ULL * GBITS);
61 	case MLXCX_PROTO_40GBASE_CR4:
62 	case MLXCX_PROTO_40GBASE_KR4:
63 	case MLXCX_PROTO_40GBASE_SR4:
64 	case MLXCX_PROTO_40GBASE_LR4_ER4:
65 		return (40ULL * GBITS);
66 	case MLXCX_PROTO_25GBASE_CR:
67 	case MLXCX_PROTO_25GBASE_KR:
68 	case MLXCX_PROTO_25GBASE_SR:
69 		return (25ULL * GBITS);
70 	case MLXCX_PROTO_50GBASE_SR2:
71 	case MLXCX_PROTO_50GBASE_CR2:
72 	case MLXCX_PROTO_50GBASE_KR2:
73 		return (50ULL * GBITS);
74 	case MLXCX_PROTO_100GBASE_CR4:
75 	case MLXCX_PROTO_100GBASE_SR4:
76 	case MLXCX_PROTO_100GBASE_KR4:
77 		return (100ULL * GBITS);
78 	default:
79 		return (0);
80 	}
81 }
82 
83 static int
84 mlxcx_mac_stat_rfc_2863(mlxcx_t *mlxp, mlxcx_port_t *port, uint_t stat,
85     uint64_t *val)
86 {
87 	int ret = 0;
88 	boolean_t ok;
89 	mlxcx_register_data_t data;
90 	mlxcx_ppcnt_rfc_2863_t *st;
91 
92 	ASSERT(mutex_owned(&port->mlp_mtx));
93 
94 	bzero(&data, sizeof (data));
95 	data.mlrd_ppcnt.mlrd_ppcnt_local_port = port->mlp_num + 1;
96 	data.mlrd_ppcnt.mlrd_ppcnt_grp = MLXCX_PPCNT_GRP_RFC_2863;
97 	data.mlrd_ppcnt.mlrd_ppcnt_clear = MLXCX_PPCNT_NO_CLEAR;
98 
99 	ok = mlxcx_cmd_access_register(mlxp, MLXCX_CMD_ACCESS_REGISTER_READ,
100 	    MLXCX_REG_PPCNT, &data);
101 	if (!ok)
102 		return (EIO);
103 	st = &data.mlrd_ppcnt.mlrd_ppcnt_rfc_2863;
104 
105 	switch (stat) {
106 	case MAC_STAT_RBYTES:
107 		*val = from_be64(st->mlppc_rfc_2863_in_octets);
108 		break;
109 	case MAC_STAT_MULTIRCV:
110 		*val = from_be64(st->mlppc_rfc_2863_in_mcast_pkts);
111 		break;
112 	case MAC_STAT_BRDCSTRCV:
113 		*val = from_be64(st->mlppc_rfc_2863_in_bcast_pkts);
114 		break;
115 	case MAC_STAT_MULTIXMT:
116 		*val = from_be64(st->mlppc_rfc_2863_out_mcast_pkts);
117 		break;
118 	case MAC_STAT_BRDCSTXMT:
119 		*val = from_be64(st->mlppc_rfc_2863_out_bcast_pkts);
120 		break;
121 	case MAC_STAT_IERRORS:
122 		*val = from_be64(st->mlppc_rfc_2863_in_errors);
123 		break;
124 	case MAC_STAT_UNKNOWNS:
125 		*val = from_be64(st->mlppc_rfc_2863_in_unknown_protos);
126 		break;
127 	case MAC_STAT_OERRORS:
128 		*val = from_be64(st->mlppc_rfc_2863_out_errors);
129 		break;
130 	case MAC_STAT_OBYTES:
131 		*val = from_be64(st->mlppc_rfc_2863_out_octets);
132 		break;
133 	default:
134 		ret = ENOTSUP;
135 	}
136 
137 	return (ret);
138 }
139 
140 static int
141 mlxcx_mac_stat_ieee_802_3(mlxcx_t *mlxp, mlxcx_port_t *port, uint_t stat,
142     uint64_t *val)
143 {
144 	int ret = 0;
145 	boolean_t ok;
146 	mlxcx_register_data_t data;
147 	mlxcx_ppcnt_ieee_802_3_t *st;
148 
149 	ASSERT(mutex_owned(&port->mlp_mtx));
150 
151 	bzero(&data, sizeof (data));
152 	data.mlrd_ppcnt.mlrd_ppcnt_local_port = port->mlp_num + 1;
153 	data.mlrd_ppcnt.mlrd_ppcnt_grp = MLXCX_PPCNT_GRP_IEEE_802_3;
154 	data.mlrd_ppcnt.mlrd_ppcnt_clear = MLXCX_PPCNT_NO_CLEAR;
155 
156 	ok = mlxcx_cmd_access_register(mlxp, MLXCX_CMD_ACCESS_REGISTER_READ,
157 	    MLXCX_REG_PPCNT, &data);
158 	if (!ok)
159 		return (EIO);
160 	st = &data.mlrd_ppcnt.mlrd_ppcnt_ieee_802_3;
161 
162 	switch (stat) {
163 	case MAC_STAT_IPACKETS:
164 		*val = from_be64(st->mlppc_ieee_802_3_frames_rx);
165 		break;
166 	case MAC_STAT_OPACKETS:
167 		*val = from_be64(st->mlppc_ieee_802_3_frames_tx);
168 		break;
169 	case ETHER_STAT_ALIGN_ERRORS:
170 		*val = from_be64(st->mlppc_ieee_802_3_align_err);
171 		break;
172 	case ETHER_STAT_FCS_ERRORS:
173 		*val = from_be64(st->mlppc_ieee_802_3_fcs_err);
174 		break;
175 	case ETHER_STAT_TOOLONG_ERRORS:
176 		*val = from_be64(st->mlppc_ieee_802_3_frame_too_long_err);
177 		break;
178 	default:
179 		ret = ENOTSUP;
180 	}
181 
182 	return (ret);
183 }
184 
185 static int
186 mlxcx_mac_stat(void *arg, uint_t stat, uint64_t *val)
187 {
188 	mlxcx_t *mlxp = (mlxcx_t *)arg;
189 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
190 	int ret = 0;
191 
192 	mutex_enter(&port->mlp_mtx);
193 
194 	switch (stat) {
195 	case MAC_STAT_IFSPEED:
196 		*val = mlxcx_speed_to_bits(port->mlp_oper_proto);
197 		break;
198 	case ETHER_STAT_LINK_DUPLEX:
199 		*val = LINK_DUPLEX_FULL;
200 		break;
201 	case MAC_STAT_RBYTES:
202 	case MAC_STAT_MULTIRCV:
203 	case MAC_STAT_BRDCSTRCV:
204 	case MAC_STAT_MULTIXMT:
205 	case MAC_STAT_BRDCSTXMT:
206 	case MAC_STAT_IERRORS:
207 	case MAC_STAT_UNKNOWNS:
208 	case MAC_STAT_OERRORS:
209 	case MAC_STAT_OBYTES:
210 		ret = mlxcx_mac_stat_rfc_2863(mlxp, port, stat, val);
211 		break;
212 	case MAC_STAT_IPACKETS:
213 	case MAC_STAT_OPACKETS:
214 	case ETHER_STAT_ALIGN_ERRORS:
215 	case ETHER_STAT_FCS_ERRORS:
216 	case ETHER_STAT_TOOLONG_ERRORS:
217 		ret = mlxcx_mac_stat_ieee_802_3(mlxp, port, stat, val);
218 		break;
219 	case MAC_STAT_NORCVBUF:
220 		*val = port->mlp_stats.mlps_rx_drops;
221 		break;
222 	default:
223 		ret = ENOTSUP;
224 	}
225 
226 	mutex_exit(&port->mlp_mtx);
227 
228 	return (ret);
229 }
230 
231 static int
232 mlxcx_mac_led_set(void *arg, mac_led_mode_t mode, uint_t flags)
233 {
234 	mlxcx_t *mlxp = arg;
235 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
236 	int ret = 0;
237 
238 	if (flags != 0) {
239 		return (EINVAL);
240 	}
241 
242 	mutex_enter(&port->mlp_mtx);
243 
244 	switch (mode) {
245 	case MAC_LED_DEFAULT:
246 	case MAC_LED_OFF:
247 		if (!mlxcx_cmd_set_port_led(mlxp, port, 0)) {
248 			ret = EIO;
249 			break;
250 		}
251 		break;
252 	case MAC_LED_IDENT:
253 		if (!mlxcx_cmd_set_port_led(mlxp, port, UINT16_MAX)) {
254 			ret = EIO;
255 			break;
256 		}
257 		break;
258 	default:
259 		ret = ENOTSUP;
260 	}
261 
262 	mutex_exit(&port->mlp_mtx);
263 
264 	return (ret);
265 }
266 
267 static int
268 mlxcx_mac_txr_info(void *arg, uint_t id, mac_transceiver_info_t *infop)
269 {
270 	mlxcx_t *mlxp = arg;
271 	mlxcx_module_status_t st;
272 
273 	if (!mlxcx_cmd_query_module_status(mlxp, id, &st, NULL))
274 		return (EIO);
275 
276 	if (st != MLXCX_MODULE_UNPLUGGED)
277 		mac_transceiver_info_set_present(infop, B_TRUE);
278 
279 	if (st == MLXCX_MODULE_PLUGGED)
280 		mac_transceiver_info_set_usable(infop, B_TRUE);
281 
282 	return (0);
283 }
284 
285 static int
286 mlxcx_mac_txr_read(void *arg, uint_t id, uint_t page, void *vbuf,
287     size_t nbytes, off_t offset, size_t *nread)
288 {
289 	mlxcx_t *mlxp = arg;
290 	mlxcx_register_data_t data;
291 	uint8_t *buf = vbuf;
292 	boolean_t ok;
293 	size_t take, done = 0;
294 	uint8_t i2c_addr;
295 
296 	if (id != 0 || vbuf == NULL || nbytes == 0 || nread == NULL)
297 		return (EINVAL);
298 
299 	if (nbytes > 256 || offset >= 256 || (offset + nbytes > 256))
300 		return (EINVAL);
301 
302 	/*
303 	 * The PRM is really not very clear about any of this, but it seems
304 	 * that the i2c_device_addr field in MCIA is the SFP+ spec "page"
305 	 * number shifted right by 1 bit. They're written in the SFF spec
306 	 * like "1010000X" so Mellanox just dropped the X.
307 	 *
308 	 * This means that if we want page 0xA0, we put 0x50 in the
309 	 * i2c_device_addr field.
310 	 *
311 	 * The "page_number" field in MCIA means something else. Don't ask me
312 	 * what. FreeBSD leaves it as zero, so we will too!
313 	 */
314 	i2c_addr = page >> 1;
315 
316 	while (done < nbytes) {
317 		take = nbytes - done;
318 		if (take > sizeof (data.mlrd_mcia.mlrd_mcia_data))
319 			take = sizeof (data.mlrd_mcia.mlrd_mcia_data);
320 
321 		bzero(&data, sizeof (data));
322 		ASSERT3U(id, <=, 0xff);
323 		data.mlrd_mcia.mlrd_mcia_module = (uint8_t)id;
324 		data.mlrd_mcia.mlrd_mcia_i2c_device_addr = i2c_addr;
325 		data.mlrd_mcia.mlrd_mcia_device_addr = to_be16(offset);
326 		data.mlrd_mcia.mlrd_mcia_size = to_be16(take);
327 
328 		ok = mlxcx_cmd_access_register(mlxp,
329 		    MLXCX_CMD_ACCESS_REGISTER_READ, MLXCX_REG_MCIA, &data);
330 		if (!ok) {
331 			*nread = 0;
332 			return (EIO);
333 		}
334 
335 		if (data.mlrd_mcia.mlrd_mcia_status != MLXCX_MCIA_STATUS_OK) {
336 			*nread = 0;
337 			return (EIO);
338 		}
339 
340 		bcopy(data.mlrd_mcia.mlrd_mcia_data, &buf[done], take);
341 
342 		done += take;
343 		offset += take;
344 	}
345 	*nread = done;
346 	return (0);
347 }
348 
349 static int
350 mlxcx_mac_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
351 {
352 	mlxcx_work_queue_t *wq = (mlxcx_work_queue_t *)rh;
353 	(void) wq;
354 
355 	/*
356 	 * We should add support for using hw flow counters and such to
357 	 * get per-ring statistics. Not done yet though!
358 	 */
359 
360 	switch (stat) {
361 	default:
362 		*val = 0;
363 		return (ENOTSUP);
364 	}
365 
366 	return (0);
367 }
368 
369 static int
370 mlxcx_mac_start(void *arg)
371 {
372 	mlxcx_t *mlxp = (mlxcx_t *)arg;
373 	(void) mlxp;
374 	return (0);
375 }
376 
377 static void
378 mlxcx_mac_stop(void *arg)
379 {
380 	mlxcx_t *mlxp = (mlxcx_t *)arg;
381 	(void) mlxp;
382 }
383 
384 static mblk_t *
385 mlxcx_mac_ring_tx(void *arg, mblk_t *mp)
386 {
387 	mlxcx_work_queue_t *sq = (mlxcx_work_queue_t *)arg;
388 	mlxcx_t *mlxp = sq->mlwq_mlx;
389 	mlxcx_completion_queue_t *cq;
390 	mlxcx_buffer_t *b;
391 	mac_header_info_t mhi;
392 	mblk_t *kmp, *nmp;
393 	uint8_t inline_hdrs[MLXCX_MAX_INLINE_HEADERLEN];
394 	size_t inline_hdrlen, rem, off;
395 	uint32_t chkflags = 0;
396 	boolean_t ok;
397 	size_t take = 0;
398 
399 	VERIFY(mp->b_next == NULL);
400 
401 	mac_hcksum_get(mp, NULL, NULL, NULL, NULL, &chkflags);
402 
403 	if (mac_vlan_header_info(mlxp->mlx_mac_hdl, mp, &mhi) != 0) {
404 		/*
405 		 * We got given a frame without a valid L2 header on it. We
406 		 * can't really transmit that (mlx parts don't like it), so
407 		 * we will just drop it on the floor.
408 		 */
409 		freemsg(mp);
410 		return (NULL);
411 	}
412 
413 	inline_hdrlen = rem = mhi.mhi_hdrsize;
414 
415 	kmp = mp;
416 	off = 0;
417 	while (rem > 0) {
418 		const ptrdiff_t sz = MBLKL(kmp);
419 		ASSERT3S(sz, >=, 0);
420 		ASSERT3U(sz, <=, SIZE_MAX);
421 		take = sz;
422 		if (take > rem)
423 			take = rem;
424 		bcopy(kmp->b_rptr, inline_hdrs + off, take);
425 		rem -= take;
426 		off += take;
427 		if (take == sz) {
428 			take = 0;
429 			kmp = kmp->b_cont;
430 		}
431 	}
432 
433 	b = mlxcx_buf_bind_or_copy(mlxp, sq, kmp, take);
434 	if (b == NULL) {
435 		atomic_or_uint(&sq->mlwq_state, MLXCX_WQ_BLOCKED_MAC);
436 		return (mp);
437 	}
438 
439 	mutex_enter(&sq->mlwq_mtx);
440 	VERIFY3U(sq->mlwq_inline_mode, <=, MLXCX_ETH_INLINE_L2);
441 	cq = sq->mlwq_cq;
442 
443 	/*
444 	 * state is a single int, so read-only access without the CQ lock
445 	 * should be fine.
446 	 */
447 	if (cq->mlcq_state & MLXCX_CQ_TEARDOWN) {
448 		mutex_exit(&sq->mlwq_mtx);
449 		mlxcx_buf_return_chain(mlxp, b, B_FALSE);
450 		return (NULL);
451 	}
452 
453 	if (sq->mlwq_state & MLXCX_WQ_TEARDOWN) {
454 		mutex_exit(&sq->mlwq_mtx);
455 		mlxcx_buf_return_chain(mlxp, b, B_FALSE);
456 		return (NULL);
457 	}
458 
459 	/*
460 	 * Similar logic here: bufcnt is only manipulated atomically, and
461 	 * bufhwm is set at startup.
462 	 */
463 	if (cq->mlcq_bufcnt >= cq->mlcq_bufhwm) {
464 		atomic_or_uint(&cq->mlcq_state, MLXCX_CQ_BLOCKED_MAC);
465 		goto blocked;
466 	}
467 
468 	if (sq->mlwq_wqebb_used >= sq->mlwq_bufhwm) {
469 		atomic_or_uint(&sq->mlwq_state, MLXCX_WQ_BLOCKED_MAC);
470 		goto blocked;
471 	}
472 
473 	ok = mlxcx_sq_add_buffer(mlxp, sq, inline_hdrs, inline_hdrlen,
474 	    chkflags, b);
475 	if (!ok) {
476 		atomic_or_uint(&cq->mlcq_state, MLXCX_CQ_BLOCKED_MAC);
477 		atomic_or_uint(&sq->mlwq_state, MLXCX_WQ_BLOCKED_MAC);
478 		goto blocked;
479 	}
480 
481 	/*
482 	 * Now that we've successfully enqueued the rest of the packet,
483 	 * free any mblks that we cut off while inlining headers.
484 	 */
485 	for (; mp != kmp; mp = nmp) {
486 		nmp = mp->b_cont;
487 		freeb(mp);
488 	}
489 
490 	mutex_exit(&sq->mlwq_mtx);
491 
492 	return (NULL);
493 
494 blocked:
495 	mutex_exit(&sq->mlwq_mtx);
496 	mlxcx_buf_return_chain(mlxp, b, B_TRUE);
497 	return (mp);
498 }
499 
500 static int
501 mlxcx_mac_setpromisc(void *arg, boolean_t on)
502 {
503 	mlxcx_t *mlxp = (mlxcx_t *)arg;
504 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
505 	mlxcx_flow_group_t *fg;
506 	mlxcx_flow_entry_t *fe;
507 	mlxcx_flow_table_t *ft;
508 	mlxcx_ring_group_t *g;
509 	int ret = 0;
510 	uint_t idx;
511 
512 	mutex_enter(&port->mlp_mtx);
513 
514 	/*
515 	 * First, do the top-level flow entry on the root flow table for
516 	 * the port. This catches all traffic that doesn't match any MAC
517 	 * MAC filters.
518 	 */
519 	ft = port->mlp_rx_flow;
520 	mutex_enter(&ft->mlft_mtx);
521 	fg = port->mlp_promisc;
522 	fe = list_head(&fg->mlfg_entries);
523 	if (on && !(fe->mlfe_state & MLXCX_FLOW_ENTRY_CREATED)) {
524 		if (!mlxcx_cmd_set_flow_table_entry(mlxp, fe)) {
525 			ret = EIO;
526 		}
527 	} else if (!on && (fe->mlfe_state & MLXCX_FLOW_ENTRY_CREATED)) {
528 		if (!mlxcx_cmd_delete_flow_table_entry(mlxp, fe)) {
529 			ret = EIO;
530 		}
531 	}
532 	mutex_exit(&ft->mlft_mtx);
533 
534 	/*
535 	 * If we failed to change the top-level entry, don't bother with
536 	 * trying the per-group ones.
537 	 */
538 	if (ret != 0) {
539 		mutex_exit(&port->mlp_mtx);
540 		return (ret);
541 	}
542 
543 	/*
544 	 * Then, do the per-rx-group flow entries which catch traffic that
545 	 * matched a MAC filter but failed to match a VLAN filter.
546 	 */
547 	for (idx = 0; idx < mlxp->mlx_rx_ngroups; ++idx) {
548 		g = &mlxp->mlx_rx_groups[idx];
549 
550 		mutex_enter(&g->mlg_mtx);
551 
552 		ft = g->mlg_rx_vlan_ft;
553 		mutex_enter(&ft->mlft_mtx);
554 
555 		fg = g->mlg_rx_vlan_promisc_fg;
556 		fe = list_head(&fg->mlfg_entries);
557 		if (on && !(fe->mlfe_state & MLXCX_FLOW_ENTRY_CREATED)) {
558 			if (!mlxcx_cmd_set_flow_table_entry(mlxp, fe)) {
559 				ret = EIO;
560 			}
561 		} else if (!on && (fe->mlfe_state & MLXCX_FLOW_ENTRY_CREATED)) {
562 			if (!mlxcx_cmd_delete_flow_table_entry(mlxp, fe)) {
563 				ret = EIO;
564 			}
565 		}
566 
567 		mutex_exit(&ft->mlft_mtx);
568 		mutex_exit(&g->mlg_mtx);
569 	}
570 
571 	mutex_exit(&port->mlp_mtx);
572 	return (ret);
573 }
574 
575 static int
576 mlxcx_mac_multicast(void *arg, boolean_t add, const uint8_t *addr)
577 {
578 	mlxcx_t *mlxp = (mlxcx_t *)arg;
579 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
580 	mlxcx_ring_group_t *g = &mlxp->mlx_rx_groups[0];
581 	int ret = 0;
582 
583 	mutex_enter(&port->mlp_mtx);
584 	mutex_enter(&g->mlg_mtx);
585 	if (add) {
586 		if (!mlxcx_add_umcast_entry(mlxp, port, g, addr)) {
587 			ret = EIO;
588 		}
589 	} else {
590 		if (!mlxcx_remove_umcast_entry(mlxp, port, g, addr)) {
591 			ret = EIO;
592 		}
593 	}
594 	mutex_exit(&g->mlg_mtx);
595 	mutex_exit(&port->mlp_mtx);
596 	return (ret);
597 }
598 
599 static int
600 mlxcx_group_add_mac(void *arg, const uint8_t *mac_addr)
601 {
602 	mlxcx_ring_group_t *g = arg;
603 	mlxcx_t *mlxp = g->mlg_mlx;
604 	mlxcx_port_t *port = g->mlg_port;
605 	int ret = 0;
606 
607 	mutex_enter(&port->mlp_mtx);
608 	mutex_enter(&g->mlg_mtx);
609 	if (!mlxcx_add_umcast_entry(mlxp, port, g, mac_addr)) {
610 		ret = EIO;
611 	}
612 	mutex_exit(&g->mlg_mtx);
613 	mutex_exit(&port->mlp_mtx);
614 
615 	return (ret);
616 }
617 
618 /*
619  * Support for VLAN steering into groups is not yet available in upstream
620  * illumos.
621  */
622 #if defined(MAC_VLAN_UNTAGGED)
623 
624 static int
625 mlxcx_group_add_vlan(mac_group_driver_t gh, uint16_t vid)
626 {
627 	mlxcx_ring_group_t *g = (mlxcx_ring_group_t *)gh;
628 	mlxcx_t *mlxp = g->mlg_mlx;
629 	int ret = 0;
630 	boolean_t tagged = B_TRUE;
631 
632 	if (vid == MAC_VLAN_UNTAGGED) {
633 		vid = 0;
634 		tagged = B_FALSE;
635 	}
636 
637 	mutex_enter(&g->mlg_mtx);
638 	if (!mlxcx_add_vlan_entry(mlxp, g, tagged, vid)) {
639 		ret = EIO;
640 	}
641 	mutex_exit(&g->mlg_mtx);
642 
643 	return (ret);
644 }
645 
646 static int
647 mlxcx_group_remove_vlan(mac_group_driver_t gh, uint16_t vid)
648 {
649 	mlxcx_ring_group_t *g = (mlxcx_ring_group_t *)gh;
650 	mlxcx_t *mlxp = g->mlg_mlx;
651 	int ret = 0;
652 	boolean_t tagged = B_TRUE;
653 
654 	if (vid == MAC_VLAN_UNTAGGED) {
655 		vid = 0;
656 		tagged = B_FALSE;
657 	}
658 
659 	mutex_enter(&g->mlg_mtx);
660 	if (!mlxcx_remove_vlan_entry(mlxp, g, tagged, vid)) {
661 		ret = EIO;
662 	}
663 	mutex_exit(&g->mlg_mtx);
664 
665 	return (ret);
666 }
667 
668 #endif /* MAC_VLAN_UNTAGGED */
669 
670 static int
671 mlxcx_group_remove_mac(void *arg, const uint8_t *mac_addr)
672 {
673 	mlxcx_ring_group_t *g = arg;
674 	mlxcx_t *mlxp = g->mlg_mlx;
675 	mlxcx_port_t *port = g->mlg_port;
676 	int ret = 0;
677 
678 	mutex_enter(&port->mlp_mtx);
679 	mutex_enter(&g->mlg_mtx);
680 	if (!mlxcx_remove_umcast_entry(mlxp, port, g, mac_addr)) {
681 		ret = EIO;
682 	}
683 	mutex_exit(&g->mlg_mtx);
684 	mutex_exit(&port->mlp_mtx);
685 
686 	return (ret);
687 }
688 
689 static int
690 mlxcx_mac_ring_start(mac_ring_driver_t rh, uint64_t gen_num)
691 {
692 	mlxcx_work_queue_t *wq = (mlxcx_work_queue_t *)rh;
693 	mlxcx_completion_queue_t *cq = wq->mlwq_cq;
694 	mlxcx_ring_group_t *g = wq->mlwq_group;
695 	mlxcx_t *mlxp = wq->mlwq_mlx;
696 
697 	ASSERT(cq != NULL);
698 	ASSERT(g != NULL);
699 
700 	ASSERT(wq->mlwq_type == MLXCX_WQ_TYPE_SENDQ ||
701 	    wq->mlwq_type == MLXCX_WQ_TYPE_RECVQ);
702 	if (wq->mlwq_type == MLXCX_WQ_TYPE_SENDQ &&
703 	    !mlxcx_tx_ring_start(mlxp, g, wq))
704 		return (EIO);
705 	if (wq->mlwq_type == MLXCX_WQ_TYPE_RECVQ &&
706 	    !mlxcx_rx_ring_start(mlxp, g, wq))
707 		return (EIO);
708 
709 	mutex_enter(&cq->mlcq_mtx);
710 	cq->mlcq_mac_gen = gen_num;
711 	mutex_exit(&cq->mlcq_mtx);
712 
713 	return (0);
714 }
715 
716 static void
717 mlxcx_mac_ring_stop(mac_ring_driver_t rh)
718 {
719 	mlxcx_work_queue_t *wq = (mlxcx_work_queue_t *)rh;
720 	mlxcx_completion_queue_t *cq = wq->mlwq_cq;
721 	mlxcx_t *mlxp = wq->mlwq_mlx;
722 	mlxcx_buf_shard_t *s;
723 	mlxcx_buffer_t *buf;
724 
725 	mutex_enter(&cq->mlcq_mtx);
726 	mutex_enter(&wq->mlwq_mtx);
727 	if (wq->mlwq_state & MLXCX_WQ_STARTED) {
728 		if (wq->mlwq_type == MLXCX_WQ_TYPE_RECVQ &&
729 		    !mlxcx_cmd_stop_rq(mlxp, wq)) {
730 			mutex_exit(&wq->mlwq_mtx);
731 			mutex_exit(&cq->mlcq_mtx);
732 			return;
733 		}
734 		if (wq->mlwq_type == MLXCX_WQ_TYPE_SENDQ &&
735 		    !mlxcx_cmd_stop_sq(mlxp, wq)) {
736 			mutex_exit(&wq->mlwq_mtx);
737 			mutex_exit(&cq->mlcq_mtx);
738 			return;
739 		}
740 	}
741 	ASSERT0(wq->mlwq_state & MLXCX_WQ_STARTED);
742 
743 	if (wq->mlwq_state & MLXCX_WQ_BUFFERS) {
744 		/* Return any outstanding buffers to the free pool. */
745 		while ((buf = list_remove_head(&cq->mlcq_buffers)) != NULL) {
746 			mlxcx_buf_return_chain(mlxp, buf, B_FALSE);
747 		}
748 		mutex_enter(&cq->mlcq_bufbmtx);
749 		while ((buf = list_remove_head(&cq->mlcq_buffers_b)) != NULL) {
750 			mlxcx_buf_return_chain(mlxp, buf, B_FALSE);
751 		}
752 		mutex_exit(&cq->mlcq_bufbmtx);
753 		cq->mlcq_bufcnt = 0;
754 
755 		s = wq->mlwq_bufs;
756 		mutex_enter(&s->mlbs_mtx);
757 		while (!list_is_empty(&s->mlbs_busy))
758 			cv_wait(&s->mlbs_free_nonempty, &s->mlbs_mtx);
759 		while ((buf = list_head(&s->mlbs_free)) != NULL) {
760 			mlxcx_buf_destroy(mlxp, buf);
761 		}
762 		mutex_exit(&s->mlbs_mtx);
763 
764 		s = wq->mlwq_foreign_bufs;
765 		if (s != NULL) {
766 			mutex_enter(&s->mlbs_mtx);
767 			while (!list_is_empty(&s->mlbs_busy))
768 				cv_wait(&s->mlbs_free_nonempty, &s->mlbs_mtx);
769 			while ((buf = list_head(&s->mlbs_free)) != NULL) {
770 				mlxcx_buf_destroy(mlxp, buf);
771 			}
772 			mutex_exit(&s->mlbs_mtx);
773 		}
774 
775 		wq->mlwq_state &= ~MLXCX_WQ_BUFFERS;
776 	}
777 	ASSERT0(wq->mlwq_state & MLXCX_WQ_BUFFERS);
778 
779 	mutex_exit(&wq->mlwq_mtx);
780 	mutex_exit(&cq->mlcq_mtx);
781 }
782 
783 static int
784 mlxcx_mac_group_start(mac_group_driver_t gh)
785 {
786 	mlxcx_ring_group_t *g = (mlxcx_ring_group_t *)gh;
787 	mlxcx_t *mlxp = g->mlg_mlx;
788 
789 	VERIFY3S(g->mlg_type, ==, MLXCX_GROUP_RX);
790 	ASSERT(mlxp != NULL);
791 
792 	if (g->mlg_state & MLXCX_GROUP_RUNNING)
793 		return (0);
794 
795 	if (!mlxcx_rx_group_start(mlxp, g))
796 		return (EIO);
797 
798 	return (0);
799 }
800 
801 static void
802 mlxcx_mac_fill_tx_ring(void *arg, mac_ring_type_t rtype, const int group_index,
803     const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh)
804 {
805 	mlxcx_t *mlxp = (mlxcx_t *)arg;
806 	mlxcx_ring_group_t *g;
807 	mlxcx_work_queue_t *wq;
808 	mac_intr_t *mintr = &infop->mri_intr;
809 
810 	if (rtype != MAC_RING_TYPE_TX)
811 		return;
812 	ASSERT3S(group_index, ==, -1);
813 
814 	g = &mlxp->mlx_tx_groups[0];
815 	ASSERT(g->mlg_state & MLXCX_GROUP_INIT);
816 	mutex_enter(&g->mlg_mtx);
817 
818 	ASSERT3S(ring_index, >=, 0);
819 	ASSERT3S(ring_index, <, g->mlg_nwqs);
820 
821 	wq = &g->mlg_wqs[ring_index];
822 
823 	wq->mlwq_cq->mlcq_mac_hdl = rh;
824 
825 	infop->mri_driver = (mac_ring_driver_t)wq;
826 	infop->mri_start = mlxcx_mac_ring_start;
827 	infop->mri_stop = mlxcx_mac_ring_stop;
828 	infop->mri_tx = mlxcx_mac_ring_tx;
829 	infop->mri_stat = mlxcx_mac_ring_stat;
830 
831 	mintr->mi_ddi_handle = mlxp->mlx_intr_handles[
832 	    wq->mlwq_cq->mlcq_eq->mleq_intr_index];
833 
834 	mutex_exit(&g->mlg_mtx);
835 }
836 
837 static int
838 mlxcx_mac_ring_intr_enable(mac_intr_handle_t intrh)
839 {
840 	mlxcx_completion_queue_t *cq = (mlxcx_completion_queue_t *)intrh;
841 	mlxcx_event_queue_t *eq = cq->mlcq_eq;
842 	mlxcx_t *mlxp = cq->mlcq_mlx;
843 
844 	/*
845 	 * We are going to call mlxcx_arm_cq() here, so we take the EQ lock
846 	 * as well as the CQ one to make sure we don't race against
847 	 * mlxcx_intr_n().
848 	 */
849 	mutex_enter(&eq->mleq_mtx);
850 	mutex_enter(&cq->mlcq_mtx);
851 	if (cq->mlcq_state & MLXCX_CQ_POLLING) {
852 		cq->mlcq_state &= ~MLXCX_CQ_POLLING;
853 		if (!(cq->mlcq_state & MLXCX_CQ_ARMED))
854 			mlxcx_arm_cq(mlxp, cq);
855 	}
856 	mutex_exit(&cq->mlcq_mtx);
857 	mutex_exit(&eq->mleq_mtx);
858 
859 	return (0);
860 }
861 
862 static int
863 mlxcx_mac_ring_intr_disable(mac_intr_handle_t intrh)
864 {
865 	mlxcx_completion_queue_t *cq = (mlxcx_completion_queue_t *)intrh;
866 
867 	mutex_enter(&cq->mlcq_mtx);
868 	atomic_or_uint(&cq->mlcq_state, MLXCX_CQ_POLLING);
869 	mutex_exit(&cq->mlcq_mtx);
870 
871 	return (0);
872 }
873 
874 static mblk_t *
875 mlxcx_mac_ring_rx_poll(void *arg, int poll_bytes)
876 {
877 	mlxcx_work_queue_t *wq = (mlxcx_work_queue_t *)arg;
878 	mlxcx_completion_queue_t *cq = wq->mlwq_cq;
879 	mlxcx_t *mlxp = wq->mlwq_mlx;
880 	mblk_t *mp;
881 
882 	ASSERT(cq != NULL);
883 	ASSERT3S(poll_bytes, >, 0);
884 	if (poll_bytes == 0)
885 		return (NULL);
886 
887 	mutex_enter(&cq->mlcq_mtx);
888 	mp = mlxcx_rx_poll(mlxp, cq, poll_bytes);
889 	mutex_exit(&cq->mlcq_mtx);
890 
891 	return (mp);
892 }
893 
894 static void
895 mlxcx_mac_fill_rx_ring(void *arg, mac_ring_type_t rtype, const int group_index,
896     const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh)
897 {
898 	mlxcx_t *mlxp = (mlxcx_t *)arg;
899 	mlxcx_ring_group_t *g;
900 	mlxcx_work_queue_t *wq;
901 	mac_intr_t *mintr = &infop->mri_intr;
902 
903 	if (rtype != MAC_RING_TYPE_RX)
904 		return;
905 	ASSERT3S(group_index, >=, 0);
906 	ASSERT3S(group_index, <, mlxp->mlx_rx_ngroups);
907 
908 	g = &mlxp->mlx_rx_groups[group_index];
909 	ASSERT(g->mlg_state & MLXCX_GROUP_INIT);
910 	mutex_enter(&g->mlg_mtx);
911 
912 	ASSERT3S(ring_index, >=, 0);
913 	ASSERT3S(ring_index, <, g->mlg_nwqs);
914 
915 	ASSERT(g->mlg_state & MLXCX_GROUP_WQS);
916 	wq = &g->mlg_wqs[ring_index];
917 
918 	wq->mlwq_cq->mlcq_mac_hdl = rh;
919 
920 	infop->mri_driver = (mac_ring_driver_t)wq;
921 	infop->mri_start = mlxcx_mac_ring_start;
922 	infop->mri_stop = mlxcx_mac_ring_stop;
923 	infop->mri_poll = mlxcx_mac_ring_rx_poll;
924 	infop->mri_stat = mlxcx_mac_ring_stat;
925 
926 	mintr->mi_handle = (mac_intr_handle_t)wq->mlwq_cq;
927 	mintr->mi_enable = mlxcx_mac_ring_intr_enable;
928 	mintr->mi_disable = mlxcx_mac_ring_intr_disable;
929 
930 	mintr->mi_ddi_handle = mlxp->mlx_intr_handles[
931 	    wq->mlwq_cq->mlcq_eq->mleq_intr_index];
932 
933 	mutex_exit(&g->mlg_mtx);
934 }
935 
936 static void
937 mlxcx_mac_fill_rx_group(void *arg, mac_ring_type_t rtype, const int index,
938     mac_group_info_t *infop, mac_group_handle_t gh)
939 {
940 	mlxcx_t *mlxp = (mlxcx_t *)arg;
941 	mlxcx_ring_group_t *g;
942 
943 	if (rtype != MAC_RING_TYPE_RX)
944 		return;
945 
946 	ASSERT3S(index, >=, 0);
947 	ASSERT3S(index, <, mlxp->mlx_rx_ngroups);
948 	g = &mlxp->mlx_rx_groups[index];
949 	ASSERT(g->mlg_state & MLXCX_GROUP_INIT);
950 
951 	g->mlg_mac_hdl = gh;
952 
953 	infop->mgi_driver = (mac_group_driver_t)g;
954 	infop->mgi_start = mlxcx_mac_group_start;
955 	infop->mgi_stop = NULL;
956 	infop->mgi_addmac = mlxcx_group_add_mac;
957 	infop->mgi_remmac = mlxcx_group_remove_mac;
958 #if defined(MAC_VLAN_UNTAGGED)
959 	infop->mgi_addvlan = mlxcx_group_add_vlan;
960 	infop->mgi_remvlan = mlxcx_group_remove_vlan;
961 #endif /* MAC_VLAN_UNTAGGED */
962 
963 	infop->mgi_count = g->mlg_nwqs;
964 }
965 
966 static boolean_t
967 mlxcx_mac_getcapab(void *arg, mac_capab_t cap, void *cap_data)
968 {
969 	mlxcx_t *mlxp = (mlxcx_t *)arg;
970 	mac_capab_rings_t *cap_rings;
971 	mac_capab_led_t *cap_leds;
972 	mac_capab_transceiver_t *cap_txr;
973 	uint_t i, n = 0;
974 
975 	switch (cap) {
976 
977 	case MAC_CAPAB_RINGS:
978 		cap_rings = cap_data;
979 		cap_rings->mr_group_type = MAC_GROUP_TYPE_STATIC;
980 		switch (cap_rings->mr_type) {
981 		case MAC_RING_TYPE_TX:
982 			cap_rings->mr_gnum = 0;
983 			cap_rings->mr_rnum = mlxp->mlx_tx_groups[0].mlg_nwqs;
984 			cap_rings->mr_rget = mlxcx_mac_fill_tx_ring;
985 			cap_rings->mr_gget = NULL;
986 			cap_rings->mr_gaddring = NULL;
987 			cap_rings->mr_gremring = NULL;
988 			break;
989 		case MAC_RING_TYPE_RX:
990 			cap_rings->mr_gnum = mlxp->mlx_rx_ngroups;
991 			for (i = 0; i < mlxp->mlx_rx_ngroups; ++i)
992 				n += mlxp->mlx_rx_groups[i].mlg_nwqs;
993 			cap_rings->mr_rnum = n;
994 			cap_rings->mr_rget = mlxcx_mac_fill_rx_ring;
995 			cap_rings->mr_gget = mlxcx_mac_fill_rx_group;
996 			cap_rings->mr_gaddring = NULL;
997 			cap_rings->mr_gremring = NULL;
998 			break;
999 		default:
1000 			return (B_FALSE);
1001 		}
1002 		break;
1003 
1004 	case MAC_CAPAB_HCKSUM:
1005 		if (mlxp->mlx_caps->mlc_checksum) {
1006 			*(uint32_t *)cap_data = HCKSUM_INET_FULL_V4 |
1007 			    HCKSUM_INET_FULL_V6 | HCKSUM_IPHDRCKSUM;
1008 		}
1009 		break;
1010 
1011 	case MAC_CAPAB_LED:
1012 		cap_leds = cap_data;
1013 
1014 		cap_leds->mcl_flags = 0;
1015 		cap_leds->mcl_modes = MAC_LED_DEFAULT | MAC_LED_OFF |
1016 		    MAC_LED_IDENT;
1017 		cap_leds->mcl_set = mlxcx_mac_led_set;
1018 		break;
1019 
1020 	case MAC_CAPAB_TRANSCEIVER:
1021 		cap_txr = cap_data;
1022 
1023 		cap_txr->mct_flags = 0;
1024 		cap_txr->mct_ntransceivers = 1;
1025 		cap_txr->mct_info = mlxcx_mac_txr_info;
1026 		cap_txr->mct_read = mlxcx_mac_txr_read;
1027 		break;
1028 
1029 	default:
1030 		return (B_FALSE);
1031 	}
1032 
1033 	return (B_TRUE);
1034 }
1035 
1036 static void
1037 mlxcx_mac_propinfo(void *arg, const char *pr_name, mac_prop_id_t pr_num,
1038     mac_prop_info_handle_t prh)
1039 {
1040 	mlxcx_t *mlxp = (mlxcx_t *)arg;
1041 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
1042 
1043 	mutex_enter(&port->mlp_mtx);
1044 
1045 	switch (pr_num) {
1046 	case MAC_PROP_DUPLEX:
1047 	case MAC_PROP_SPEED:
1048 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1049 		break;
1050 	case MAC_PROP_MTU:
1051 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW);
1052 		mac_prop_info_set_range_uint32(prh, MLXCX_MTU_OFFSET,
1053 		    port->mlp_max_mtu);
1054 		mac_prop_info_set_default_uint32(prh,
1055 		    port->mlp_mtu - MLXCX_MTU_OFFSET);
1056 		break;
1057 	case MAC_PROP_AUTONEG:
1058 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1059 		mac_prop_info_set_default_uint8(prh, 1);
1060 		break;
1061 	case MAC_PROP_ADV_100GFDX_CAP:
1062 	case MAC_PROP_EN_100GFDX_CAP:
1063 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1064 		mac_prop_info_set_default_uint8(prh,
1065 		    (port->mlp_oper_proto & MLXCX_PROTO_100G) != 0);
1066 		break;
1067 	case MAC_PROP_ADV_50GFDX_CAP:
1068 	case MAC_PROP_EN_50GFDX_CAP:
1069 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1070 		mac_prop_info_set_default_uint8(prh,
1071 		    (port->mlp_oper_proto & MLXCX_PROTO_50G) != 0);
1072 		break;
1073 	case MAC_PROP_ADV_40GFDX_CAP:
1074 	case MAC_PROP_EN_40GFDX_CAP:
1075 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1076 		mac_prop_info_set_default_uint8(prh,
1077 		    (port->mlp_oper_proto & MLXCX_PROTO_40G) != 0);
1078 		break;
1079 	case MAC_PROP_ADV_25GFDX_CAP:
1080 	case MAC_PROP_EN_25GFDX_CAP:
1081 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1082 		mac_prop_info_set_default_uint8(prh,
1083 		    (port->mlp_oper_proto & MLXCX_PROTO_25G) != 0);
1084 		break;
1085 	case MAC_PROP_ADV_10GFDX_CAP:
1086 	case MAC_PROP_EN_10GFDX_CAP:
1087 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1088 		mac_prop_info_set_default_uint8(prh,
1089 		    (port->mlp_oper_proto & MLXCX_PROTO_10G) != 0);
1090 		break;
1091 	case MAC_PROP_ADV_1000FDX_CAP:
1092 	case MAC_PROP_EN_1000FDX_CAP:
1093 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1094 		mac_prop_info_set_default_uint8(prh,
1095 		    (port->mlp_oper_proto & MLXCX_PROTO_1G) != 0);
1096 		break;
1097 	case MAC_PROP_ADV_100FDX_CAP:
1098 	case MAC_PROP_EN_100FDX_CAP:
1099 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1100 		mac_prop_info_set_default_uint8(prh,
1101 		    (port->mlp_oper_proto & MLXCX_PROTO_100M) != 0);
1102 		break;
1103 	default:
1104 		break;
1105 	}
1106 
1107 	mutex_exit(&port->mlp_mtx);
1108 }
1109 
1110 static int
1111 mlxcx_mac_setprop(void *arg, const char *pr_name, mac_prop_id_t pr_num,
1112     uint_t pr_valsize, const void *pr_val)
1113 {
1114 	mlxcx_t *mlxp = (mlxcx_t *)arg;
1115 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
1116 	int ret = 0;
1117 	uint32_t new_mtu, new_hw_mtu, old_mtu;
1118 	mlxcx_buf_shard_t *sh;
1119 	boolean_t allocd = B_FALSE;
1120 
1121 	mutex_enter(&port->mlp_mtx);
1122 
1123 	switch (pr_num) {
1124 	case MAC_PROP_MTU:
1125 		bcopy(pr_val, &new_mtu, sizeof (new_mtu));
1126 		new_hw_mtu = new_mtu + MLXCX_MTU_OFFSET;
1127 		if (new_hw_mtu == port->mlp_mtu)
1128 			break;
1129 		if (new_hw_mtu > port->mlp_max_mtu) {
1130 			ret = EINVAL;
1131 			break;
1132 		}
1133 		sh = list_head(&mlxp->mlx_buf_shards);
1134 		for (; sh != NULL; sh = list_next(&mlxp->mlx_buf_shards, sh)) {
1135 			mutex_enter(&sh->mlbs_mtx);
1136 			if (!list_is_empty(&sh->mlbs_free) ||
1137 			    !list_is_empty(&sh->mlbs_busy)) {
1138 				allocd = B_TRUE;
1139 				mutex_exit(&sh->mlbs_mtx);
1140 				break;
1141 			}
1142 			mutex_exit(&sh->mlbs_mtx);
1143 		}
1144 		if (allocd) {
1145 			ret = EBUSY;
1146 			break;
1147 		}
1148 		old_mtu = port->mlp_mtu;
1149 		ret = mac_maxsdu_update(mlxp->mlx_mac_hdl, new_mtu);
1150 		if (ret != 0)
1151 			break;
1152 		port->mlp_mtu = new_hw_mtu;
1153 		if (!mlxcx_cmd_modify_nic_vport_ctx(mlxp, port,
1154 		    MLXCX_MODIFY_NIC_VPORT_CTX_MTU)) {
1155 			port->mlp_mtu = old_mtu;
1156 			(void) mac_maxsdu_update(mlxp->mlx_mac_hdl, old_mtu);
1157 			ret = EIO;
1158 			break;
1159 		}
1160 		if (!mlxcx_cmd_set_port_mtu(mlxp, port)) {
1161 			port->mlp_mtu = old_mtu;
1162 			(void) mac_maxsdu_update(mlxp->mlx_mac_hdl, old_mtu);
1163 			ret = EIO;
1164 			break;
1165 		}
1166 		break;
1167 	default:
1168 		ret = ENOTSUP;
1169 		break;
1170 	}
1171 
1172 	mutex_exit(&port->mlp_mtx);
1173 
1174 	return (ret);
1175 }
1176 
1177 static int
1178 mlxcx_mac_getprop(void *arg, const char *pr_name, mac_prop_id_t pr_num,
1179     uint_t pr_valsize, void *pr_val)
1180 {
1181 	mlxcx_t *mlxp = (mlxcx_t *)arg;
1182 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
1183 	uint64_t speed;
1184 	int ret = 0;
1185 
1186 	mutex_enter(&port->mlp_mtx);
1187 
1188 	switch (pr_num) {
1189 	case MAC_PROP_DUPLEX:
1190 		if (pr_valsize < sizeof (link_duplex_t)) {
1191 			ret = EOVERFLOW;
1192 			break;
1193 		}
1194 		/* connectx parts only support full duplex */
1195 		*(link_duplex_t *)pr_val = LINK_DUPLEX_FULL;
1196 		break;
1197 	case MAC_PROP_SPEED:
1198 		if (pr_valsize < sizeof (uint64_t)) {
1199 			ret = EOVERFLOW;
1200 			break;
1201 		}
1202 		speed = mlxcx_speed_to_bits(port->mlp_oper_proto);
1203 		bcopy(&speed, pr_val, sizeof (speed));
1204 		break;
1205 	case MAC_PROP_STATUS:
1206 		if (pr_valsize < sizeof (link_state_t)) {
1207 			ret = EOVERFLOW;
1208 			break;
1209 		}
1210 		switch (port->mlp_oper_status) {
1211 		case MLXCX_PORT_STATUS_UP:
1212 		case MLXCX_PORT_STATUS_UP_ONCE:
1213 			*(link_state_t *)pr_val = LINK_STATE_UP;
1214 			break;
1215 		case MLXCX_PORT_STATUS_DOWN:
1216 			*(link_state_t *)pr_val = LINK_STATE_DOWN;
1217 			break;
1218 		default:
1219 			*(link_state_t *)pr_val = LINK_STATE_UNKNOWN;
1220 		}
1221 		break;
1222 	case MAC_PROP_AUTONEG:
1223 		if (pr_valsize < sizeof (uint8_t)) {
1224 			ret = EOVERFLOW;
1225 			break;
1226 		}
1227 		*(uint8_t *)pr_val = port->mlp_autoneg;
1228 		break;
1229 	case MAC_PROP_MTU:
1230 		if (pr_valsize < sizeof (uint32_t)) {
1231 			ret = EOVERFLOW;
1232 			break;
1233 		}
1234 		*(uint32_t *)pr_val = port->mlp_mtu - MLXCX_MTU_OFFSET;
1235 		break;
1236 	case MAC_PROP_ADV_100GFDX_CAP:
1237 	case MAC_PROP_EN_100GFDX_CAP:
1238 		if (pr_valsize < sizeof (uint8_t)) {
1239 			ret = EOVERFLOW;
1240 			break;
1241 		}
1242 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1243 		    MLXCX_PROTO_100G) != 0;
1244 		break;
1245 	case MAC_PROP_ADV_50GFDX_CAP:
1246 	case MAC_PROP_EN_50GFDX_CAP:
1247 		if (pr_valsize < sizeof (uint8_t)) {
1248 			ret = EOVERFLOW;
1249 			break;
1250 		}
1251 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1252 		    MLXCX_PROTO_50G) != 0;
1253 		break;
1254 	case MAC_PROP_ADV_40GFDX_CAP:
1255 	case MAC_PROP_EN_40GFDX_CAP:
1256 		if (pr_valsize < sizeof (uint8_t)) {
1257 			ret = EOVERFLOW;
1258 			break;
1259 		}
1260 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1261 		    MLXCX_PROTO_40G) != 0;
1262 		break;
1263 	case MAC_PROP_ADV_25GFDX_CAP:
1264 	case MAC_PROP_EN_25GFDX_CAP:
1265 		if (pr_valsize < sizeof (uint8_t)) {
1266 			ret = EOVERFLOW;
1267 			break;
1268 		}
1269 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1270 		    MLXCX_PROTO_25G) != 0;
1271 		break;
1272 	case MAC_PROP_ADV_10GFDX_CAP:
1273 	case MAC_PROP_EN_10GFDX_CAP:
1274 		if (pr_valsize < sizeof (uint8_t)) {
1275 			ret = EOVERFLOW;
1276 			break;
1277 		}
1278 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1279 		    MLXCX_PROTO_10G) != 0;
1280 		break;
1281 	case MAC_PROP_ADV_1000FDX_CAP:
1282 	case MAC_PROP_EN_1000FDX_CAP:
1283 		if (pr_valsize < sizeof (uint8_t)) {
1284 			ret = EOVERFLOW;
1285 			break;
1286 		}
1287 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1288 		    MLXCX_PROTO_1G) != 0;
1289 		break;
1290 	case MAC_PROP_ADV_100FDX_CAP:
1291 	case MAC_PROP_EN_100FDX_CAP:
1292 		if (pr_valsize < sizeof (uint8_t)) {
1293 			ret = EOVERFLOW;
1294 			break;
1295 		}
1296 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1297 		    MLXCX_PROTO_100M) != 0;
1298 		break;
1299 	default:
1300 		ret = ENOTSUP;
1301 		break;
1302 	}
1303 
1304 	mutex_exit(&port->mlp_mtx);
1305 
1306 	return (ret);
1307 }
1308 
1309 #define	MLXCX_MAC_CALLBACK_FLAGS \
1310 	(MC_GETCAPAB | MC_GETPROP | MC_PROPINFO | MC_SETPROP)
1311 
1312 static mac_callbacks_t mlxcx_mac_callbacks = {
1313 	.mc_callbacks = MLXCX_MAC_CALLBACK_FLAGS,
1314 	.mc_getstat = mlxcx_mac_stat,
1315 	.mc_start = mlxcx_mac_start,
1316 	.mc_stop = mlxcx_mac_stop,
1317 	.mc_setpromisc = mlxcx_mac_setpromisc,
1318 	.mc_multicst = mlxcx_mac_multicast,
1319 	.mc_ioctl = NULL,
1320 	.mc_getcapab = mlxcx_mac_getcapab,
1321 	.mc_setprop = mlxcx_mac_setprop,
1322 	.mc_getprop = mlxcx_mac_getprop,
1323 	.mc_propinfo = mlxcx_mac_propinfo,
1324 	.mc_tx = NULL,
1325 	.mc_unicst = NULL,
1326 };
1327 
1328 boolean_t
1329 mlxcx_register_mac(mlxcx_t *mlxp)
1330 {
1331 	mac_register_t *mac = mac_alloc(MAC_VERSION);
1332 	mlxcx_port_t *port;
1333 	int ret;
1334 
1335 	if (mac == NULL)
1336 		return (B_FALSE);
1337 
1338 	VERIFY3U(mlxp->mlx_nports, ==, 1);
1339 	port = &mlxp->mlx_ports[0];
1340 
1341 	mac->m_type_ident = MAC_PLUGIN_IDENT_ETHER;
1342 	mac->m_driver = mlxp;
1343 	mac->m_dip = mlxp->mlx_dip;
1344 	mac->m_src_addr = port->mlp_mac_address;
1345 	mac->m_callbacks = &mlxcx_mac_callbacks;
1346 	mac->m_min_sdu = MLXCX_MTU_OFFSET;
1347 	mac->m_max_sdu = port->mlp_mtu - MLXCX_MTU_OFFSET;
1348 	mac->m_margin = VLAN_TAGSZ;
1349 	mac->m_priv_props = mlxcx_priv_props;
1350 	mac->m_v12n = MAC_VIRT_LEVEL1;
1351 
1352 	ret = mac_register(mac, &mlxp->mlx_mac_hdl);
1353 	if (ret != 0) {
1354 		mlxcx_warn(mlxp, "mac_register() returned %d", ret);
1355 	}
1356 	mac_free(mac);
1357 
1358 	mlxcx_update_link_state(mlxp, port);
1359 
1360 	return (ret == 0);
1361 }
1362