1*bdb9230aSGarrett D'Amore /*
2*bdb9230aSGarrett D'Amore * CDDL HEADER START
3*bdb9230aSGarrett D'Amore *
4*bdb9230aSGarrett D'Amore * The contents of this file are subject to the terms of the
5*bdb9230aSGarrett D'Amore * Common Development and Distribution License (the "License").
6*bdb9230aSGarrett D'Amore * You may not use this file except in compliance with the License.
7*bdb9230aSGarrett D'Amore *
8*bdb9230aSGarrett D'Amore * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*bdb9230aSGarrett D'Amore * or http://www.opensolaris.org/os/licensing.
10*bdb9230aSGarrett D'Amore * See the License for the specific language governing permissions
11*bdb9230aSGarrett D'Amore * and limitations under the License.
12*bdb9230aSGarrett D'Amore *
13*bdb9230aSGarrett D'Amore * When distributing Covered Code, include this CDDL HEADER in each
14*bdb9230aSGarrett D'Amore * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*bdb9230aSGarrett D'Amore * If applicable, add the following below this CDDL HEADER, with the
16*bdb9230aSGarrett D'Amore * fields enclosed by brackets "[]" replaced with your own identifying
17*bdb9230aSGarrett D'Amore * information: Portions Copyright [yyyy] [name of copyright owner]
18*bdb9230aSGarrett D'Amore *
19*bdb9230aSGarrett D'Amore * CDDL HEADER END
20*bdb9230aSGarrett D'Amore */
21*bdb9230aSGarrett D'Amore /*
22*bdb9230aSGarrett D'Amore * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
23*bdb9230aSGarrett D'Amore * Use is subject to license terms.
24*bdb9230aSGarrett D'Amore */
25*bdb9230aSGarrett D'Amore
26*bdb9230aSGarrett D'Amore /*
27*bdb9230aSGarrett D'Amore * MII overrides for National Semiconductor PHYs.
28*bdb9230aSGarrett D'Amore */
29*bdb9230aSGarrett D'Amore
30*bdb9230aSGarrett D'Amore #include <sys/types.h>
31*bdb9230aSGarrett D'Amore #include <sys/ddi.h>
32*bdb9230aSGarrett D'Amore #include <sys/sunddi.h>
33*bdb9230aSGarrett D'Amore #include <sys/mii.h>
34*bdb9230aSGarrett D'Amore #include <sys/miiregs.h>
35*bdb9230aSGarrett D'Amore #include "miipriv.h"
36*bdb9230aSGarrett D'Amore
37*bdb9230aSGarrett D'Amore static int
ns83840_reset(phy_handle_t * ph)38*bdb9230aSGarrett D'Amore ns83840_reset(phy_handle_t *ph)
39*bdb9230aSGarrett D'Amore {
40*bdb9230aSGarrett D'Amore /* first do an ordinary reset */
41*bdb9230aSGarrett D'Amore if (phy_reset(ph) != DDI_SUCCESS) {
42*bdb9230aSGarrett D'Amore return (DDI_FAILURE);
43*bdb9230aSGarrett D'Amore }
44*bdb9230aSGarrett D'Amore
45*bdb9230aSGarrett D'Amore /*
46*bdb9230aSGarrett D'Amore * As per INTEL "PRO/100B Adapter Software Technical Reference
47*bdb9230aSGarrett D'Amore * Manual", set bit 10 of MII register 23. National
48*bdb9230aSGarrett D'Amore * Semiconductor documentation shows this as "reserved, write
49*bdb9230aSGarrett D'Amore * to as zero". We also set the "CIM_DIS" bit, also as
50*bdb9230aSGarrett D'Amore * requested by the PRO/100B doc, to disable the carrier
51*bdb9230aSGarrett D'Amore * integrity monitor. (That should only ever be used by
52*bdb9230aSGarrett D'Amore * repeaters.)
53*bdb9230aSGarrett D'Amore *
54*bdb9230aSGarrett D'Amore * NetBSD also sets bit 8, without any explanation, so we'll
55*bdb9230aSGarrett D'Amore * follow suit.
56*bdb9230aSGarrett D'Amore */
57*bdb9230aSGarrett D'Amore PHY_SET(ph, MII_VENDOR(7), (1<<10) | (1<<8) | (1<<5));
58*bdb9230aSGarrett D'Amore return (DDI_SUCCESS);
59*bdb9230aSGarrett D'Amore }
60*bdb9230aSGarrett D'Amore
61*bdb9230aSGarrett D'Amore boolean_t
phy_natsemi_probe(phy_handle_t * ph)62*bdb9230aSGarrett D'Amore phy_natsemi_probe(phy_handle_t *ph)
63*bdb9230aSGarrett D'Amore {
64*bdb9230aSGarrett D'Amore /* We could even look at revA vs revC, etc. but there is no need. */
65*bdb9230aSGarrett D'Amore if ((MII_PHY_MFG(ph->phy_id) != MII_OUI_NATIONAL_SEMI) &&
66*bdb9230aSGarrett D'Amore (MII_PHY_MFG(ph->phy_id) != MII_OUI_NATIONAL_SEMI_2)) {
67*bdb9230aSGarrett D'Amore return (B_FALSE);
68*bdb9230aSGarrett D'Amore }
69*bdb9230aSGarrett D'Amore ph->phy_vendor = "National Semiconductor";
70*bdb9230aSGarrett D'Amore
71*bdb9230aSGarrett D'Amore switch (MII_PHY_MODEL(ph->phy_id)) {
72*bdb9230aSGarrett D'Amore case MII_MODEL_NATIONAL_SEMI_DP83840:
73*bdb9230aSGarrett D'Amore ph->phy_model = "DP83840";
74*bdb9230aSGarrett D'Amore ph->phy_reset = ns83840_reset;
75*bdb9230aSGarrett D'Amore return (B_TRUE);
76*bdb9230aSGarrett D'Amore
77*bdb9230aSGarrett D'Amore case MII_MODEL_NATIONAL_SEMI_DP83843:
78*bdb9230aSGarrett D'Amore ph->phy_model = "DP83843";
79*bdb9230aSGarrett D'Amore return (B_TRUE);
80*bdb9230aSGarrett D'Amore
81*bdb9230aSGarrett D'Amore case MII_MODEL_NATIONAL_SEMI_DP83847:
82*bdb9230aSGarrett D'Amore ph->phy_model = "DP83847";
83*bdb9230aSGarrett D'Amore return (B_TRUE);
84*bdb9230aSGarrett D'Amore
85*bdb9230aSGarrett D'Amore case MII_MODEL_NATIONAL_SEMI_DP83815:
86*bdb9230aSGarrett D'Amore ph->phy_model = "DP83815";
87*bdb9230aSGarrett D'Amore return (B_TRUE);
88*bdb9230aSGarrett D'Amore }
89*bdb9230aSGarrett D'Amore return (B_FALSE);
90*bdb9230aSGarrett D'Amore }
91