122a84b8dSQuaker Fang /* 2*67d1a47aSQuaker Fang * Sun elects to have this file available under and governed by the BSD license 3*67d1a47aSQuaker Fang * (see below for full license text). However, the following notice 4*67d1a47aSQuaker Fang * accompanied the original version of this file: 522a84b8dSQuaker Fang */ 622a84b8dSQuaker Fang 722a84b8dSQuaker Fang /* 822a84b8dSQuaker Fang * Copyright (c) 2009, Intel Corporation 922a84b8dSQuaker Fang * All rights reserved. 1022a84b8dSQuaker Fang */ 1122a84b8dSQuaker Fang 1222a84b8dSQuaker Fang /* 1322a84b8dSQuaker Fang * This file is provided under a dual BSD/GPLv2 license. When using or 1422a84b8dSQuaker Fang * redistributing this file, you may do so under either license. 1522a84b8dSQuaker Fang * 1622a84b8dSQuaker Fang * GPL LICENSE SUMMARY 1722a84b8dSQuaker Fang * 1822a84b8dSQuaker Fang * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 1922a84b8dSQuaker Fang * 2022a84b8dSQuaker Fang * This program is free software; you can redistribute it and/or modify 2122a84b8dSQuaker Fang * it under the terms of version 2 of the GNU General Public License as 2222a84b8dSQuaker Fang * published by the Free Software Foundation. 2322a84b8dSQuaker Fang * 2422a84b8dSQuaker Fang * This program is distributed in the hope that it will be useful, but 2522a84b8dSQuaker Fang * WITHOUT ANY WARRANTY; without even the implied warranty of 2622a84b8dSQuaker Fang * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 2722a84b8dSQuaker Fang * General Public License for more details. 2822a84b8dSQuaker Fang * 2922a84b8dSQuaker Fang * You should have received a copy of the GNU General Public License 3022a84b8dSQuaker Fang * along with this program; if not, write to the Free Software 3122a84b8dSQuaker Fang * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 3222a84b8dSQuaker Fang * USA 3322a84b8dSQuaker Fang * 3422a84b8dSQuaker Fang * The full GNU General Public License is included in this distribution 3522a84b8dSQuaker Fang * in the file called LICENSE.GPL. 3622a84b8dSQuaker Fang * 3722a84b8dSQuaker Fang * Contact Information: 3822a84b8dSQuaker Fang * James P. Ketrenos <ipw2100-admin@linux.intel.com> 3922a84b8dSQuaker Fang * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 4022a84b8dSQuaker Fang * 4122a84b8dSQuaker Fang * BSD LICENSE 4222a84b8dSQuaker Fang * 4322a84b8dSQuaker Fang * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 4422a84b8dSQuaker Fang * All rights reserved. 4522a84b8dSQuaker Fang * 4622a84b8dSQuaker Fang * Redistribution and use in source and binary forms, with or without 4722a84b8dSQuaker Fang * modification, are permitted provided that the following conditions 4822a84b8dSQuaker Fang * are met: 4922a84b8dSQuaker Fang * 5022a84b8dSQuaker Fang * * Redistributions of source code must retain the above copyright 5122a84b8dSQuaker Fang * notice, this list of conditions and the following disclaimer. 5222a84b8dSQuaker Fang * * Redistributions in binary form must reproduce the above copyright 5322a84b8dSQuaker Fang * notice, this list of conditions and the following disclaimer in 5422a84b8dSQuaker Fang * the documentation and/or other materials provided with the 5522a84b8dSQuaker Fang * distribution. 5622a84b8dSQuaker Fang * * Neither the name Intel Corporation nor the names of its 5722a84b8dSQuaker Fang * contributors may be used to endorse or promote products derived 5822a84b8dSQuaker Fang * from this software without specific prior written permission. 5922a84b8dSQuaker Fang * 6022a84b8dSQuaker Fang * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 6122a84b8dSQuaker Fang * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 6222a84b8dSQuaker Fang * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 6322a84b8dSQuaker Fang * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 6422a84b8dSQuaker Fang * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 6522a84b8dSQuaker Fang * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 6622a84b8dSQuaker Fang * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 6722a84b8dSQuaker Fang * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 6822a84b8dSQuaker Fang * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 6922a84b8dSQuaker Fang * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 7022a84b8dSQuaker Fang * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 7122a84b8dSQuaker Fang */ 7222a84b8dSQuaker Fang 7322a84b8dSQuaker Fang #ifndef _IWP_EEPROM_H_ 7422a84b8dSQuaker Fang #define _IWP_EEPROM_H_ 7522a84b8dSQuaker Fang 7622a84b8dSQuaker Fang /* 7722a84b8dSQuaker Fang * This file defines EEPROM related constants, enums, and inline functions. 7822a84b8dSQuaker Fang */ 7922a84b8dSQuaker Fang 8022a84b8dSQuaker Fang /* 8122a84b8dSQuaker Fang * EEPROM field values 8222a84b8dSQuaker Fang */ 8322a84b8dSQuaker Fang #define ANTENNA_SWITCH_NORMAL 0 8422a84b8dSQuaker Fang #define ANTENNA_SWITCH_INVERSE 1 8522a84b8dSQuaker Fang 8622a84b8dSQuaker Fang enum { 8722a84b8dSQuaker Fang EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */ 8822a84b8dSQuaker Fang EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */ 8922a84b8dSQuaker Fang /* Bit 2 Reserved */ 9022a84b8dSQuaker Fang EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */ 9122a84b8dSQuaker Fang EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */ 9222a84b8dSQuaker Fang EEPROM_CHANNEL_WIDE = (1 << 5), 9322a84b8dSQuaker Fang EEPROM_CHANNEL_NARROW = (1 << 6), 9422a84b8dSQuaker Fang EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */ 9522a84b8dSQuaker Fang }; 9622a84b8dSQuaker Fang 9722a84b8dSQuaker Fang /* 9822a84b8dSQuaker Fang * EEPROM field lengths 9922a84b8dSQuaker Fang */ 10022a84b8dSQuaker Fang #define EEPROM_BOARD_PBA_NUMBER_LENGTH 11 10122a84b8dSQuaker Fang 10222a84b8dSQuaker Fang /* 10322a84b8dSQuaker Fang * EEPROM field lengths 10422a84b8dSQuaker Fang */ 10522a84b8dSQuaker Fang #define EEPROM_BOARD_PBA_NUMBER_LENGTH 11 10622a84b8dSQuaker Fang #define EEPROM_REGULATORY_SKU_ID_LENGTH 4 10722a84b8dSQuaker Fang #define EEPROM_REGULATORY_BAND1_CHANNELS_LENGTH 14 10822a84b8dSQuaker Fang #define EEPROM_REGULATORY_BAND2_CHANNELS_LENGTH 13 10922a84b8dSQuaker Fang #define EEPROM_REGULATORY_BAND3_CHANNELS_LENGTH 12 11022a84b8dSQuaker Fang #define EEPROM_REGULATORY_BAND4_CHANNELS_LENGTH 11 11122a84b8dSQuaker Fang #define EEPROM_REGULATORY_BAND5_CHANNELS_LENGTH 6 11222a84b8dSQuaker Fang 11322a84b8dSQuaker Fang 11422a84b8dSQuaker Fang #define EEPROM_REGULATORY_NUMBER_OF_BANDS 5 11522a84b8dSQuaker Fang 11622a84b8dSQuaker Fang /* 11722a84b8dSQuaker Fang * SKU Capabilities 11822a84b8dSQuaker Fang */ 11922a84b8dSQuaker Fang #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0) 12022a84b8dSQuaker Fang #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1) 12122a84b8dSQuaker Fang #define EEPROM_SKU_CAP_OP_MODE_MRC (1 << 7) 12222a84b8dSQuaker Fang 12322a84b8dSQuaker Fang /* 12422a84b8dSQuaker Fang * *regulatory* channel data from eeprom, one for each channel 12522a84b8dSQuaker Fang */ 12622a84b8dSQuaker Fang struct iwl_eeprom_channel { 12722a84b8dSQuaker Fang uint8_t flags; /* flags copied from EEPROM */ 12822a84b8dSQuaker Fang int8_t max_power_avg; /* max power (dBm) on this chnl, limit 31 */ 12922a84b8dSQuaker Fang }; 13022a84b8dSQuaker Fang 13122a84b8dSQuaker Fang /* 13222a84b8dSQuaker Fang * Mapping of a Tx power level, at factory calibration temperature, 13322a84b8dSQuaker Fang * to a radio/DSP gain table index. 13422a84b8dSQuaker Fang * One for each of 5 "sample" power levels in each band. 13522a84b8dSQuaker Fang * v_det is measured at the factory, using the 3945's built-in power amplifier 13622a84b8dSQuaker Fang * (PA) output voltage detector. This same detector is used during Tx of 13722a84b8dSQuaker Fang * long packets in normal operation to provide feedback as to proper output 13822a84b8dSQuaker Fang * level. 13922a84b8dSQuaker Fang * Data copied from EEPROM. 14022a84b8dSQuaker Fang */ 14122a84b8dSQuaker Fang struct iwl_eeprom_txpower_sample { 14222a84b8dSQuaker Fang uint8_t gain_index; /* index into power (gain) setup table ... */ 14322a84b8dSQuaker Fang int8_t power; /* ... for this pwr level for this chnl group */ 14422a84b8dSQuaker Fang uint16_t v_det; /* PA output voltage */ 14522a84b8dSQuaker Fang }; 14622a84b8dSQuaker Fang 14722a84b8dSQuaker Fang /* 14822a84b8dSQuaker Fang * Mappings of Tx power levels -> nominal radio/DSP gain table indexes. 14922a84b8dSQuaker Fang * One for each channel group (a.k.a. "band") (1 for BG, 4 for A). 15022a84b8dSQuaker Fang * Tx power setup code interpolates between the 5 "sample" power levels 15122a84b8dSQuaker Fang * to determine the nominal setup for a requested power level. 15222a84b8dSQuaker Fang * Data copied from EEPROM. 15322a84b8dSQuaker Fang * DO NOT ALTER THIS STRUCTURE!!! 15422a84b8dSQuaker Fang */ 15522a84b8dSQuaker Fang struct iwl_eeprom_txpower_group { 15622a84b8dSQuaker Fang /* 5 power levels */ 15722a84b8dSQuaker Fang struct iwl_eeprom_txpower_sample samples[5]; 15822a84b8dSQuaker Fang /* coefficients for voltage->power formula (signed) */ 15922a84b8dSQuaker Fang uint32_t a, b, c, d, e; 16022a84b8dSQuaker Fang /* these modify coeffs based on frequency (signed) */ 16122a84b8dSQuaker Fang uint32_t Fa, Fb, Fc, Fd, Fe; 16222a84b8dSQuaker Fang /* highest power possible by h/w in this * band */ 16322a84b8dSQuaker Fang int8_t saturation_power; 16422a84b8dSQuaker Fang /* "representative" channel # in this band */ 16522a84b8dSQuaker Fang uint8_t group_channel; 16622a84b8dSQuaker Fang /* h/w temperature at factory calib this band (signed) */ 16722a84b8dSQuaker Fang uint16_t temperature; 16822a84b8dSQuaker Fang }; 16922a84b8dSQuaker Fang 17022a84b8dSQuaker Fang /* 17122a84b8dSQuaker Fang * Temperature-based Tx-power compensation data, not band-specific. 17222a84b8dSQuaker Fang * These coefficients are use to modify a/b/c/d/e coeffs based on 17322a84b8dSQuaker Fang * difference between current temperature and factory calib temperature. 17422a84b8dSQuaker Fang * Data copied from EEPROM. 17522a84b8dSQuaker Fang */ 17622a84b8dSQuaker Fang struct iwl_eeprom_temperature_corr { 17722a84b8dSQuaker Fang uint32_t Ta; 17822a84b8dSQuaker Fang uint32_t Tb; 17922a84b8dSQuaker Fang uint32_t Tc; 18022a84b8dSQuaker Fang uint32_t Td; 18122a84b8dSQuaker Fang uint32_t Te; 18222a84b8dSQuaker Fang }; 18322a84b8dSQuaker Fang 18422a84b8dSQuaker Fang 18522a84b8dSQuaker Fang /* 18622a84b8dSQuaker Fang * eeprom map 18722a84b8dSQuaker Fang */ 18822a84b8dSQuaker Fang #define EEP_MAC_ADDRESS 42 /* chipset's MAC address 6 bytes */ 18922a84b8dSQuaker Fang #define EEP_VERSION 136 /* eeprom version 2 bytes */ 19022a84b8dSQuaker Fang #define EEP_SP_RADIO_CONFIGURATION 144 /* SP's radio configuration */ 19122a84b8dSQuaker Fang 19222a84b8dSQuaker Fang 19322a84b8dSQuaker Fang 19422a84b8dSQuaker Fang #define CSR_EEPROM_REG (CSR_BASE+0x02c) 19522a84b8dSQuaker Fang #define CSR_EEPROM_GP (CSR_BASE+0x030) 19622a84b8dSQuaker Fang #define CSR_EEPROM_GP_VALID_MSK 0x00000007 19722a84b8dSQuaker Fang #define CSR_EEPROM_GP_BAD_SIGNATURE 0x00000000 19822a84b8dSQuaker Fang #define IWP_SP_EEPROM_SIZE 2048 19922a84b8dSQuaker Fang 20022a84b8dSQuaker Fang #define IWP_READ_EEP_SHORT(sc, addr) ((((uint16_t)sc->sc_eep_map[addr + 1])\ 20122a84b8dSQuaker Fang << 8) |\ 20222a84b8dSQuaker Fang ((uint16_t)sc->sc_eep_map[addr])) 20322a84b8dSQuaker Fang 20422a84b8dSQuaker Fang #define SP_RADIO_TYPE_3x3 (0) 20522a84b8dSQuaker Fang #define SP_RADIO_TYPE_2x2 (1) 20622a84b8dSQuaker Fang #define SP_RADIO_TYPE_1x2 (2) 20722a84b8dSQuaker Fang #define SP_RADIO_TYPE_MAX (3) 20822a84b8dSQuaker Fang 20922a84b8dSQuaker Fang #define SP_RADIO_TYPE_MSK(x) (x & 3) 21022a84b8dSQuaker Fang #define SP_RADIO_STEP_MSK(x) ((x>>2) & 3) 21122a84b8dSQuaker Fang #define SP_RADIO_DASH_MSK(x) ((x>>4) & 3) 21222a84b8dSQuaker Fang #define SP_RADIO_PNUM_MSK(x) ((x>>6) & 3) 21322a84b8dSQuaker Fang #define SP_RADIO_TX_CHAIN_MSK(x) ((x>>8) & 0xf) 21422a84b8dSQuaker Fang #define SP_RADIO_RX_CHAIN_MSK(x) ((x>>12) & 0xf) 21522a84b8dSQuaker Fang 21622a84b8dSQuaker Fang #define ADDRESS_MSK 0x0000ffff 21722a84b8dSQuaker Fang #define INDIRECT_TYPE_MSK 0x000f0000 21822a84b8dSQuaker Fang #define INDIRECT_HOST 0x00010000 21922a84b8dSQuaker Fang #define INDIRECT_GENERAL 0x00020000 22022a84b8dSQuaker Fang #define INDIRECT_REGULATORY 0x00030000 22122a84b8dSQuaker Fang #define INDIRECT_CALIBRATION 0x00040000 22222a84b8dSQuaker Fang #define INDIRECT_PROCESS_ADJST 0x00050000 22322a84b8dSQuaker Fang #define INDIRECT_OTHERS 0x00060000 22422a84b8dSQuaker Fang #define INDIRECT_ADDRESS 0x00100000 22522a84b8dSQuaker Fang 22622a84b8dSQuaker Fang #define EEP_LINK_HOST (200) 22722a84b8dSQuaker Fang #define EEP_LINK_GENERAL (202) 22822a84b8dSQuaker Fang #define EEP_LINK_REGULATORY (204) 22922a84b8dSQuaker Fang #define EEP_LINK_CALIBRATION (206) 23022a84b8dSQuaker Fang #define EEP_LINK_PROCESS_ADJST (208) 23122a84b8dSQuaker Fang #define EEP_LINK_OTHERS (210) 23222a84b8dSQuaker Fang 23322a84b8dSQuaker Fang #define EEP_CALIBRATION ((0x00) | INDIRECT_ADDRESS |\ 23422a84b8dSQuaker Fang INDIRECT_CALIBRATION) 23522a84b8dSQuaker Fang 23622a84b8dSQuaker Fang #define EEP_TX_POWER_TX_CHAINS (3) 23722a84b8dSQuaker Fang #define EEP_RXIQ_CAL_CHANNELS (7) 23822a84b8dSQuaker Fang #define EEP_CAL_CHANNEL_GROUP (7) 23922a84b8dSQuaker Fang #define EEP_RXIQ_DRIVER_MODES (12) 24022a84b8dSQuaker Fang 24122a84b8dSQuaker Fang 24222a84b8dSQuaker Fang 24322a84b8dSQuaker Fang #endif /* _IWP_EEPROM_H_ */ 244