1 /* 2 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 /* 7 * Copyright (c) 2009, Intel Corporation 8 * All rights reserved. 9 */ 10 11 /* 12 * Sun elects to use this software under the BSD license. 13 */ 14 15 /* 16 * This file is provided under a dual BSD/GPLv2 license. When using or 17 * redistributing this file, you may do so under either license. 18 * 19 * GPL LICENSE SUMMARY 20 * 21 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 22 * 23 * This program is free software; you can redistribute it and/or modify 24 * it under the terms of version 2 of the GNU General Public License as 25 * published by the Free Software Foundation. 26 * 27 * This program is distributed in the hope that it will be useful, but 28 * WITHOUT ANY WARRANTY; without even the implied warranty of 29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 30 * General Public License for more details. 31 * 32 * You should have received a copy of the GNU General Public License 33 * along with this program; if not, write to the Free Software 34 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 35 * USA 36 * 37 * The full GNU General Public License is included in this distribution 38 * in the file called LICENSE.GPL. 39 * 40 * Contact Information: 41 * James P. Ketrenos <ipw2100-admin@linux.intel.com> 42 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 43 * 44 * BSD LICENSE 45 * 46 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 47 * All rights reserved. 48 * 49 * Redistribution and use in source and binary forms, with or without 50 * modification, are permitted provided that the following conditions 51 * are met: 52 * 53 * * Redistributions of source code must retain the above copyright 54 * notice, this list of conditions and the following disclaimer. 55 * * Redistributions in binary form must reproduce the above copyright 56 * notice, this list of conditions and the following disclaimer in 57 * the documentation and/or other materials provided with the 58 * distribution. 59 * * Neither the name Intel Corporation nor the names of its 60 * contributors may be used to endorse or promote products derived 61 * from this software without specific prior written permission. 62 * 63 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 64 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 65 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 66 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 67 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 68 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 69 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 70 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 71 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 72 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 73 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 74 */ 75 76 77 #ifndef _IWP_CALIBRATION_H 78 #define _IWP_CALIBRATION_H 79 80 #define EEP_TX_POWER_TX_CHAINS (3) 81 #define EEP_RXIQ_CAL_CHANNELS (7) 82 #define EEP_CAL_CHANNEL_GROUP (7) 83 #define EEP_RXIQ_DRIVER_MODES (12) 84 85 struct tx_pow_calib_hdr { 86 uint8_t calib_version; 87 uint8_t pa_type; 88 uint16_t voltage_reading; 89 }; 90 91 struct iwp_eep_txpower_sample { 92 uint8_t gain_index; /* index to power setup table */ 93 int8_t power; /* power level for this channel group */ 94 uint8_t v_det; /* PA output voltage */ 95 uint8_t temp_reading; 96 }; 97 98 struct iwp_eep_txpower_cal { 99 struct iwp_eep_txpower_sample samples[6]; /* 6 power level */ 100 /* highest power possible by hardware in this band */ 101 uint8_t saturation_power; 102 /* "representative" channel number in this band */ 103 uint8_t group_channel; 104 int8_t t_pa_det; 105 int8_t t_actual_power; 106 }; 107 108 struct rx_iq_cal { 109 int16_t ars; 110 int16_t arc; 111 }; 112 113 struct iwp_eep_calibration { 114 struct tx_pow_calib_hdr tx_pow_calib_hdr; 115 struct iwp_eep_txpower_cal txpow_group 116 [EEP_TX_POWER_TX_CHAINS][EEP_CAL_CHANNEL_GROUP]; 117 uint16_t xtal_calib[2]; 118 int16_t temp_calib_temp; 119 int16_t temp_calib_volt; 120 uint8_t rx_iBB_filter; 121 uint8_t reserved; 122 struct rx_iq_cal rx_iq_cal 123 [EEP_RXIQ_CAL_CHANNELS][EEP_RXIQ_DRIVER_MODES]; 124 }; 125 126 #endif /* _IWP_CALIBRATION_H */ 127