xref: /illumos-gate/usr/src/uts/common/io/iwn/if_iwnvar.h (revision 495ee6847d0d3e288f47ba026d98a830e51cbc06)
1 /*	$NetBSD: if_iwnvar.h,v 1.17 2015/09/22 23:23:06 nonaka Exp $	*/
2 /*	$OpenBSD: if_iwnvar.h,v 1.28 2014/09/09 18:55:08 sthen Exp $	*/
3 
4 /*-
5  * Copyright (c) 2007, 2008
6  *	Damien Bergamini <damien.bergamini@free.fr>
7  *
8  * Permission to use, copy, modify, and distribute this software for any
9  * purpose with or without fee is hereby granted, provided that the above
10  * copyright notice and this permission notice appear in all copies.
11  *
12  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19  */
20 
21 /*
22  * Copyright 2016 Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org>
23  */
24 
25 #ifndef _IF_IWNVAR_H
26 #define	_IF_IWNVAR_H
27 
28 #include <sys/net80211.h>
29 #include <sys/queue.h>
30 
31 struct iwn_dma_info {
32 	ddi_dma_handle_t	dma_hdl;
33 	ddi_acc_handle_t	acc_hdl;
34 	ddi_dma_cookie_t	cookie;
35 	uint_t			ncookies;
36 	uintptr_t		paddr;
37 	caddr_t			vaddr;
38 	size_t			size;
39 	size_t			length;
40 };
41 
42 struct iwn_tx_data {
43 	struct iwn_dma_info	dma_data;
44 	uintptr_t		cmd_paddr;
45 	uintptr_t		scratch_paddr;
46 	struct iwn_dma_info	cmd_dma;
47 	struct ieee80211_node	*ni;
48 };
49 
50 struct iwn_tx_ring {
51 	struct iwn_dma_info	desc_dma;
52 	struct iwn_dma_info	cmd_dma;
53 	struct iwn_tx_desc	*desc;
54 	struct iwn_tx_cmd	*cmd;
55 	struct iwn_tx_data	data[IWN_TX_RING_COUNT];
56 	int			qid;
57 	int			queued;
58 	int			cur;
59 };
60 
61 #define	IWN_RBUF_COUNT	(IWN_RX_RING_COUNT + 32)
62 
63 struct iwn_softc;
64 
65 struct iwn_rx_data {
66 	struct iwn_dma_info	dma_data;
67 };
68 
69 struct iwn_rx_ring {
70 	struct iwn_dma_info	desc_dma;
71 	struct iwn_dma_info	stat_dma;
72 	uint32_t		*desc;
73 	struct iwn_rx_status	*stat;
74 	struct iwn_rx_data	data[IWN_RX_RING_COUNT];
75 	int			cur;
76 };
77 
78 struct iwn_node {
79 	struct	ieee80211_node		ni;	/* must be the first */
80 	struct	ieee80211_amrr_node	amn;
81 	uint16_t			disable_tid;
82 	uint8_t				id;
83 	uint8_t				ridx[IEEE80211_RATE_MAXSIZE];
84 };
85 
86 struct iwn_calib_state {
87 	uint8_t		state;
88 #define IWN_CALIB_STATE_INIT	0
89 #define IWN_CALIB_STATE_ASSOC	1
90 #define IWN_CALIB_STATE_RUN	2
91 
92 	u_int		nbeacons;
93 	int32_t		noise[3];
94 	uint32_t	rssi[3];
95 	uint32_t	ofdm_x1;
96 	uint32_t	ofdm_mrc_x1;
97 	uint32_t	ofdm_x4;
98 	uint32_t	ofdm_mrc_x4;
99 	uint32_t	cck_x4;
100 	uint32_t	cck_mrc_x4;
101 	uint32_t	bad_plcp_ofdm;
102 	uint32_t	fa_ofdm;
103 	uint32_t	bad_plcp_cck;
104 	uint32_t	fa_cck;
105 	uint32_t	low_fa;
106 	uint8_t		cck_state;
107 #define IWN_CCK_STATE_INIT	0
108 #define IWN_CCK_STATE_LOFA	1
109 #define IWN_CCK_STATE_HIFA	2
110 
111 	uint8_t		noise_samples[20];
112 	u_int		cur_noise_sample;
113 	uint8_t		noise_ref;
114 	uint32_t	energy_samples[10];
115 	u_int		cur_energy_sample;
116 	uint32_t	energy_cck;
117 };
118 
119 struct iwn_calib_info {
120 	uint8_t		*buf;
121 	u_int		len;
122 };
123 
124 struct iwn_fw_part {
125 	const uint8_t	*text;
126 	uint32_t	textsz;
127 	const uint8_t	*data;
128 	uint32_t	datasz;
129 };
130 
131 struct iwn_fw_info {
132 	u_char			*data;
133 	size_t			size;
134 	struct iwn_fw_part	init;
135 	struct iwn_fw_part	main;
136 	struct iwn_fw_part	boot;
137 };
138 
139 struct iwn_ops {
140 	int		(*load_firmware)(struct iwn_softc *);
141 	void		(*read_eeprom)(struct iwn_softc *);
142 	int		(*post_alive)(struct iwn_softc *);
143 	int		(*nic_config)(struct iwn_softc *);
144 	int		(*config_bt_coex)(struct iwn_softc *);
145 	void		(*update_sched)(struct iwn_softc *, int, int, uint8_t,
146 			    uint16_t);
147 	int		(*get_temperature)(struct iwn_softc *);
148 	int		(*get_rssi)(const struct iwn_rx_stat *);
149 	int		(*set_txpower)(struct iwn_softc *, int);
150 	int		(*init_gains)(struct iwn_softc *);
151 	int		(*set_gains)(struct iwn_softc *);
152 	int		(*add_node)(struct iwn_softc *, struct iwn_node_info *,
153 			    int);
154 	void		(*tx_done)(struct iwn_softc *, struct iwn_rx_desc *,
155 			    struct iwn_rx_data *);
156 #ifndef IEEE80211_NO_HT
157 	void		(*ampdu_tx_start)(struct iwn_softc *,
158 			    struct ieee80211_node *, uint8_t, uint16_t);
159 	void		(*ampdu_tx_stop)(struct iwn_softc *, uint8_t,
160 			    uint16_t);
161 #endif
162 };
163 
164 struct iwn_softc {
165 	struct ieee80211com	sc_ic;
166 	dev_info_t		*sc_dip;
167 
168 	int			(*sc_newstate)(struct ieee80211com *,
169 				    enum ieee80211_state, int);
170 
171 	enum ieee80211_state	sc_ostate;
172 
173 	clock_t			sc_clk;
174 	struct ieee80211_amrr	amrr;
175 	uint8_t			fixed_ridx;
176 
177 	uint16_t		sc_devid;
178 	caddr_t			sc_base;
179 
180 	u_int			sc_flags;
181 #define IWN_FLAG_HAS_5GHZ	(1 << 0)
182 #define IWN_FLAG_HAS_OTPROM	(1 << 1)
183 #define IWN_FLAG_CALIB_DONE	(1 << 2)
184 #define IWN_FLAG_USE_ICT	(1 << 3)
185 #define IWN_FLAG_INTERNAL_PA	(1 << 4)
186 #define	IWN_FLAG_FW_DMA		(1 << 5)
187 #define IWN_FLAG_HAS_11N	(1 << 6)
188 #define IWN_FLAG_ENH_SENS	(1 << 7)
189 /* Added for NetBSD */
190 #define IWN_FLAG_HW_INITED	(1 << 8)
191 #define IWN_FLAG_SCANNING_2GHZ	(1 << 9)
192 #define IWN_FLAG_SCANNING_5GHZ	(1 << 10)
193 #define IWN_FLAG_SCANNING	(IWN_FLAG_SCANNING_2GHZ|IWN_FLAG_SCANNING_5GHZ)
194 /* From iwp.c */
195 #define	IWN_FLAG_ATTACHED	(1 << 11)
196 #define	IWN_FLAG_CMD_DONE	(1 << 12)
197 #define	IWN_FLAG_FW_ALIVE	(1 << 13)
198 #define	IWN_FLAG_HW_ERR_RECOVER	(1 << 14)
199 #define	IWN_FLAG_RATE_AUTO_CTL	(1 << 15)
200 #define	IWN_FLAG_RUNNING	(1 << 16)
201 #define	IWN_FLAG_SUSPEND	(1 << 17)
202 #define	IWN_FLAG_RADIO_OFF	(1 << 18)
203 #define	IWN_FLAG_STATISTICS	(1 << 19)
204 #define	IWN_FLAG_READY		(1 << 20)
205 #define	IWN_FLAG_PUT_SEG	(1 << 21)
206 #define	IWN_FLAG_QUIESCED	(1 << 22)
207 #define	IWN_FLAG_LAZY_RESUME	(1 << 23)
208 #define	IWN_FLAG_STOP_CALIB_TO	(1 << 24)
209 
210 	uint8_t 		hw_type;
211 
212 	struct iwn_ops		ops;
213 	const char		*fwname;
214 	const struct iwn_sensitivity_limits
215 				*limits;
216 	int			ntxqs;
217 	int			ndmachnls;
218 	uint8_t			broadcast_id;
219 	int			rxonsz;
220 	int			schedsz;
221 	uint32_t		fw_text_maxsz;
222 	uint32_t		fw_data_maxsz;
223 	uint32_t		fwsz;
224 	uint32_t			sched_txfact_addr;
225 
226 	/* TX scheduler rings. */
227 	struct iwn_dma_info	sched_dma;
228 	uint16_t		*sched;
229 	uint32_t		sched_base;
230 
231 	/* "Keep Warm" page. */
232 	struct iwn_dma_info	kw_dma;
233 
234 	/* Firmware DMA transfer. */
235 	struct iwn_dma_info	fw_dma;
236 
237 	/* ICT table. */
238 	struct iwn_dma_info	ict_dma;
239 	uint32_t		*ict;
240 	int			ict_cur;
241 
242 	/* TX/RX rings. */
243 	struct iwn_tx_ring	txq[IWN5000_NTXQUEUES];
244 	struct iwn_rx_ring	rxq;
245 
246 	ddi_acc_handle_t	sc_regh;
247 	void 			*sc_ih;
248 	ddi_acc_handle_t	sc_pcih;
249 	uint_t			sc_intr_pri;
250 	int			sc_intr_cap;
251 	int			sc_intr_count;
252 	size_t			sc_intr_size;
253 	ddi_intr_handle_t	*sc_intr_htable;
254 	int			sc_cap_off;	/* PCIe Capabilities. */
255 
256 	ddi_periodic_t		sc_periodic;
257 	timeout_id_t		scan_to;
258 	timeout_id_t		calib_to;
259 	int			calib_cnt;
260 	struct iwn_calib_state	calib;
261 
262 
263 	struct iwn_fw_info	fw;
264 	struct iwn_calib_info	calibcmd[5];
265 	uint32_t		errptr;
266 
267 	struct iwn_rx_stat	last_rx_stat;
268 	int			last_rx_valid;
269 	struct iwn_ucode_info	ucode_info;
270 	struct iwn_rxon		rxon;
271 	struct iwn_rxon		rxon_save;
272 	uint32_t		rawtemp;
273 	int			temp;
274 	int			noise;
275 	uint32_t		qfullmsk;
276 
277 	uint32_t		prom_base;
278 	struct iwn4965_eeprom_band
279 				bands[IWN_NBANDS];
280 	uint16_t		rfcfg;
281 	uint8_t			calib_ver;
282 	char			eeprom_domain[4];
283 	uint32_t		eeprom_crystal;
284 	int16_t			eeprom_temp;
285 	int16_t			eeprom_voltage;
286 	int16_t			eeprom_rawtemp;
287 	int8_t			maxpwr2GHz;
288 	int8_t			maxpwr5GHz;
289 	int8_t			maxpwr[IEEE80211_CHAN_MAX];
290 	int8_t			enh_maxpwr[35];
291 
292 	uint8_t			reset_noise_gain;
293 	uint8_t			noise_gain;
294 
295 	uint32_t		tlv_feature_flags;
296 
297 	int32_t			temp_off;
298 	uint32_t		int_mask;
299 	uint8_t			ntxchains;
300 	uint8_t			nrxchains;
301 	uint8_t			txchainmask;
302 	uint8_t			rxchainmask;
303 	uint8_t			chainmask;
304 
305 	int			sc_tx_timer;
306 	void			*powerhook;
307 
308 	kmutex_t		sc_mtx;		/* mutex for init/stop */
309 	kmutex_t		sc_tx_mtx;
310 	kmutex_t		sc_mt_mtx;
311 
312 	kcondvar_t		sc_cmd_cv;
313 	kcondvar_t		sc_scan_cv;
314 	kcondvar_t		sc_fhdma_cv;
315 	kcondvar_t		sc_alive_cv;
316 	kcondvar_t		sc_calib_cv;
317 	kcondvar_t		sc_mt_cv;
318 
319 	volatile uint32_t	sc_cmd_flag;
320 	volatile uint32_t	sc_cmd_accum;
321 #define	SC_CMD_FLG_NONE		(0)
322 #define	SC_CMD_FLG_PENDING	(1)
323 #define	SC_CMD_FLG_DONE		(2)
324 
325 	/* kstats */
326 	uint32_t		sc_tx_nobuf;
327 	uint32_t		sc_rx_nobuf;
328 	uint32_t		sc_tx_err;
329 	uint32_t		sc_rx_err;
330 	uint32_t		sc_tx_retries;
331 
332 	kstat_t			*sc_ks_misc;
333 	struct iwn_ks_misc	*sc_misc;
334 	kstat_t			*sc_ks_ant;
335 	struct iwn_ks_ant	*sc_ant;
336 	kstat_t			*sc_ks_sens;
337 	struct iwn_ks_sens	*sc_sens;
338 	kstat_t			*sc_ks_timing;
339 	struct iwn_ks_timing	*sc_timing;
340 	kstat_t			*sc_ks_edca;
341 	struct iwn_ks_edca	*sc_edca;
342 	kstat_t			*sc_ks_txpower;
343 	struct iwn_ks_txpower	*sc_txpower;
344 	kstat_t			*sc_ks_toff;
345 	union {
346 		struct iwn_ks_toff_2000 *t2000;
347 		struct iwn_ks_toff_6000 *t6000;
348 	}			sc_toff;
349 };
350 
351 struct iwn_ks_misc {
352 	kstat_named_t		temp;
353 	kstat_named_t		crit_temp;
354 	kstat_named_t		pslevel;
355 	kstat_named_t		noise;
356 };
357 
358 struct iwn_ks_ant {
359 	kstat_named_t		tx_ant;
360 	kstat_named_t		rx_ant;
361 	kstat_named_t		conn_ant;
362 	kstat_named_t		gain[3];
363 };
364 
365 struct iwn_ks_sens {
366 	kstat_named_t		ofdm_x1;
367 	kstat_named_t		ofdm_mrc_x1;
368 	kstat_named_t		ofdm_x4;
369 	kstat_named_t		ofdm_mrc_x4;
370 	kstat_named_t		cck_x4;
371 	kstat_named_t		cck_mrc_x4;
372 	kstat_named_t		energy_cck;
373 };
374 
375 struct iwn_ks_timing {
376 	kstat_named_t		bintval;
377 	kstat_named_t		tstamp;
378 	kstat_named_t		init;
379 };
380 
381 struct iwn_ks_edca {
382 	struct {
383 		kstat_named_t		cwmin;
384 		kstat_named_t		cwmax;
385 		kstat_named_t		aifsn;
386 		kstat_named_t		txop;
387 	} ac[4];
388 };
389 
390 struct iwn_ks_txpower {
391 	kstat_named_t		vdiff;
392 	kstat_named_t		chan;
393 	kstat_named_t		group;
394 	kstat_named_t		subband;
395 	struct {
396 		kstat_named_t	power;
397 		kstat_named_t	gain;
398 		kstat_named_t	temp;
399 		kstat_named_t	tcomp;
400 		struct {
401 			kstat_named_t	rf_gain;
402 			kstat_named_t	dsp_gain;
403 		} rate[IWN_RIDX_MAX];
404 	} txchain[2];
405 };
406 
407 struct iwn_ks_toff_2000 {
408 	kstat_named_t		toff_lo;
409 	kstat_named_t		toff_hi;
410 	kstat_named_t		volt;
411 };
412 
413 struct iwn_ks_toff_6000 {
414 	kstat_named_t		toff;
415 };
416 
417 #define	IWN_CHK_FAST_RECOVER(sc) \
418 	(sc->sc_ic.ic_state == IEEE80211_S_RUN && \
419 	sc->sc_ic.ic_opmode == IEEE80211_M_STA)
420 
421 #endif	/* _IF_IWNVAR_H */
422