xref: /illumos-gate/usr/src/uts/common/io/iwh/iwh_var.h (revision aedf2b3bb56b025fcaf87b49ec6c8aeea07f16d7)
1 /*
2  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
3  * Use is subject to license terms.
4  */
5 
6 /*
7  * Copyright (c) 2009, Intel Corporation
8  * All rights reserved.
9  */
10 
11 /*
12  * Copyright (c) 2006
13  * Copyright (c) 2007
14  *	Damien Bergamini <damien.bergamini@free.fr>
15  *
16  * Permission to use, copy, modify, and distribute this software for any
17  * purpose with or without fee is hereby granted, provided that the above
18  * copyright notice and this permission notice appear in all copies.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
21  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
22  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
23  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
24  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
25  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
26  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
27  */
28 
29 #ifndef _IWH_VAR_H
30 #define	_IWH_VAR_H
31 
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35 
36 #define	IWH_DMA_SYNC(area, flag) \
37 	(void) ddi_dma_sync((area).dma_hdl, (area).offset, \
38 	(area).alength, (flag))
39 
40 #define	IWH_CHK_FAST_RECOVER(sc) \
41 	(sc->sc_ic.ic_state == IEEE80211_S_RUN && \
42 	sc->sc_ic.ic_opmode == IEEE80211_M_STA)
43 
44 typedef struct iwh_dma_area {
45 	ddi_acc_handle_t	acc_hdl; /* handle for memory */
46 	caddr_t			mem_va; /* CPU VA of memory */
47 	uint32_t		nslots; /* number of slots */
48 	uint32_t		size;   /* size per slot */
49 	size_t			alength; /* allocated size */
50 					/* >= product of above */
51 	ddi_dma_handle_t	dma_hdl; /* DMA handle */
52 	offset_t		offset;  /* relative to handle */
53 	ddi_dma_cookie_t	cookie; /* associated cookie */
54 	uint32_t		ncookies;
55 	uint32_t		token; /* arbitrary identifier */
56 } iwh_dma_t;
57 
58 typedef struct iwh_tx_data {
59 	iwh_dma_t		dma_data;	/* for sending frames */
60 	iwh_tx_desc_t		*desc;
61 	uint32_t		paddr_desc;
62 	iwh_cmd_t		*cmd;
63 	uint32_t		paddr_cmd;
64 } iwh_tx_data_t;
65 
66 typedef struct iwh_tx_ring {
67 	iwh_dma_t		dma_desc;	/* for descriptor itself */
68 	iwh_dma_t		dma_cmd;	/* for command to ucode */
69 	iwh_tx_data_t	*data;
70 	int			qid;		/* ID of queue */
71 	int			count;
72 	int			window;
73 	int			queued;
74 	int			cur;
75 } iwh_tx_ring_t;
76 
77 typedef struct iwh_rx_data {
78 	iwh_dma_t		dma_data;
79 } iwh_rx_data_t;
80 
81 typedef struct iwh_rx_ring {
82 	iwh_dma_t		dma_desc;
83 	uint32_t 		*desc;
84 	iwh_rx_data_t	data[RX_QUEUE_SIZE];
85 	int			cur;
86 } iwh_rx_ring_t;
87 
88 
89 typedef struct iwh_amrr {
90 	ieee80211_node_t in;
91 	uint32_t	txcnt;
92 	uint32_t	retrycnt;
93 	uint32_t	success;
94 	uint32_t	success_threshold;
95 	int		recovery;
96 	volatile uint32_t	ht_mcs_idx;
97 } iwh_amrr_t;
98 
99 struct	iwh_phy_rx {
100 	uint8_t	flag;
101 	uint8_t	reserved[3];
102 	uint8_t	buf[128];
103 };
104 
105 struct iwh_beacon_missed {
106 	uint32_t	consecutive;
107 	uint32_t	total;
108 	uint32_t	expected;
109 	uint32_t	received;
110 };
111 
112 typedef struct iwh_softc {
113 	struct ieee80211com	sc_ic;
114 	dev_info_t		*sc_dip;
115 	int			(*sc_newstate)(struct ieee80211com *,
116 	    enum ieee80211_state, int);
117 	void			(*sc_recv_action)(ieee80211_node_t *,
118 				    const uint8_t *, const uint8_t *);
119 	int			(*sc_send_action)(ieee80211_node_t *,
120 				    int, int, uint16_t[4]);
121 	volatile uint32_t	sc_cmd_flag;
122 	volatile uint32_t	sc_cmd_accum;
123 
124 	enum ieee80211_state	sc_ostate;
125 	kmutex_t		sc_glock;
126 	kmutex_t		sc_mt_lock;
127 	kmutex_t		sc_tx_lock;
128 	kmutex_t		sc_suspend_lock;
129 	kcondvar_t		sc_mt_cv;
130 	kcondvar_t		sc_tx_cv;
131 	kcondvar_t		sc_cmd_cv;
132 	kcondvar_t		sc_fw_cv;
133 	kcondvar_t		sc_put_seg_cv;
134 	kcondvar_t		sc_ucode_cv;
135 
136 	kthread_t		*sc_mf_thread;
137 	volatile uint32_t	sc_mf_thread_switch;
138 
139 	volatile uint32_t	sc_flags;
140 	uint32_t		sc_dmabuf_sz;
141 	uint16_t		sc_clsz;
142 	uint8_t			sc_rev;
143 	uint8_t			sc_resv;
144 	uint16_t		sc_assoc_id;
145 	uint16_t		sc_reserved0;
146 
147 	/* shared area */
148 	iwh_dma_t		sc_dma_sh;
149 	iwh_shared_t		*sc_shared;
150 	/* keep warm area */
151 	iwh_dma_t		sc_dma_kw;
152 	/* tx scheduler base address */
153 	uint32_t		sc_scd_base_addr;
154 
155 	uint32_t		sc_hw_rev;
156 	struct iwh_phy_rx	sc_rx_phy_res;
157 
158 	iwh_tx_ring_t		sc_txq[IWH_NUM_QUEUES];
159 	iwh_rx_ring_t		sc_rxq;
160 
161 	/* firmware dma */
162 	iwh_firmware_hdr_t	*sc_hdr;
163 	char			*sc_boot;
164 	iwh_dma_t		sc_dma_fw_text;
165 	iwh_dma_t		sc_dma_fw_init_text;
166 	iwh_dma_t		sc_dma_fw_data;
167 	iwh_dma_t		sc_dma_fw_data_bak;
168 	iwh_dma_t		sc_dma_fw_init_data;
169 
170 	ddi_acc_handle_t	sc_cfg_handle;
171 	caddr_t			sc_cfg_base;
172 	ddi_acc_handle_t	sc_handle;
173 	caddr_t			sc_base;
174 	ddi_intr_handle_t	*sc_intr_htable;
175 	uint_t			sc_intr_pri;
176 
177 	iwh_rxon_cmd_t		sc_config;
178 	iwh_rxon_cmd_t		sc_config_save;
179 
180 	uint8_t			sc_eep_map[IWH_SP_EEPROM_SIZE];
181 	struct	iwh_eep_calibration *sc_eep_calib;
182 	struct	iwh_calib_results	sc_calib_results;
183 	uint32_t		sc_scd_base;
184 
185 	struct iwh_alive_resp	sc_card_alive_run;
186 	struct iwh_init_alive_resp	sc_card_alive_init;
187 	iwh_ht_conf_t		sc_ht_conf;
188 	uint16_t		sc_dev_id;
189 
190 	uint32_t		sc_tx_timer;
191 	uint32_t		sc_scan_pending;
192 	uint8_t			*sc_fw_bin;
193 
194 	ddi_softint_handle_t    sc_soft_hdl;
195 
196 	uint32_t		sc_rx_softint_pending;
197 	uint32_t		sc_need_reschedule;
198 
199 	clock_t			sc_clk;
200 
201 	/* kstats */
202 	uint32_t		sc_tx_nobuf;
203 	uint32_t		sc_rx_nobuf;
204 	uint32_t		sc_tx_err;
205 	uint32_t		sc_rx_err;
206 	uint32_t		sc_tx_retries;
207 } iwh_sc_t;
208 
209 #define	SC_CMD_FLG_NONE		(0)
210 #define	SC_CMD_FLG_PENDING	(1)
211 #define	SC_CMD_FLG_DONE		(2)
212 
213 #define	IWH_F_ATTACHED		(1 << 0)
214 #define	IWH_F_CMD_DONE		(1 << 1)
215 #define	IWH_F_FW_INIT		(1 << 2)
216 #define	IWH_F_HW_ERR_RECOVER	(1 << 3)
217 #define	IWH_F_RATE_AUTO_CTL	(1 << 4)
218 #define	IWH_F_RUNNING		(1 << 5)
219 #define	IWH_F_SCANNING		(1 << 6)
220 #define	IWH_F_SUSPEND		(1 << 7)
221 #define	IWH_F_RADIO_OFF		(1 << 8)
222 #define	IWH_F_STATISTICS	(1 << 9)
223 #define	IWH_F_READY		(1 << 10)
224 #define	IWH_F_PUT_SEG		(1 << 11)
225 #define	IWH_F_QUIESCED		(1 << 12)
226 #define	IWH_F_LAZY_RESUME	(1 << 13)
227 
228 #define	IWH_SUCCESS		0
229 #define	IWH_FAIL		EIO
230 
231 /*
232  * Interaction steps for 802.11e/n between net80211 module
233  * and iwh driver:
234  * -- setup link with 802.11n AP: net80211 module is responsible
235  *    for setup link with 802.11n AP. iwh driver monitors current
236  *    state and make relevant configurations according work mode.
237  * -- QoS parameter updating: net80211 module is responsible for
238  *    extract EDCA parameters from the fram of AP, iwh driver get
239  *    these parameters and make relevant configuration to HW.
240  * -- TX queue management: iwh driver place a frame into suitable
241  *    TX queue according to frame type and user priority extracted
242  *    from frame head.
243  * -- MIMO: iwh driver make relevant configurations in TX and RX
244  *    direction according to AP mode from net80211 module.
245  * -- Link aggregation: AMSDU is implemented by net80211 module and
246  *    AMPDU is implemented by both iwh driver and net80211 module.
247  *    iwh driver distinguish frames in one AMPDU frame and net80211
248  *    module is responsible reordering every frame.
249  * -- Block ACK: net80211 module is responsible for setup agreement
250  *    with AP and iwh driver is responsible for realistic ACK.
251  * -- Rate scaling: This function is implemented independently by
252  *    iwh driver.
253  * -- HT protection: This feature is also implemented by iwh driver
254  *    no interaction with net80211 module.
255  */
256 
257 #ifdef __cplusplus
258 }
259 #endif
260 
261 #endif /* _IWH_VAR_H */
262