xref: /illumos-gate/usr/src/uts/common/io/i40e/i40e_gld.c (revision 8c69cc8fbe729fa7b091e901c4b50508ccc6bb33)
1 /*
2  * This file and its contents are supplied under the terms of the
3  * Common Development and Distribution License ("CDDL"), version 1.0.
4  * You may only use this file in accordance with the terms of version
5  * 1.0 of the CDDL.
6  *
7  * A full copy of the text of the CDDL should have accompanied this
8  * source.  A copy of the CDDL is also available via the Internet at
9  * http://www.illumos.org/license/CDDL.
10  */
11 
12 /*
13  * Copyright 2015 OmniTI Computer Consulting, Inc. All rights reserved.
14  * Copyright (c) 2017, Joyent, Inc.
15  * Copyright 2017 Tegile Systems, Inc.  All rights reserved.
16  */
17 
18 /*
19  * For more information, please see the big theory statement in i40e_main.c.
20  */
21 
22 #include "i40e_sw.h"
23 
24 #define	I40E_PROP_RX_DMA_THRESH	"_rx_dma_threshold"
25 #define	I40E_PROP_TX_DMA_THRESH	"_tx_dma_threshold"
26 #define	I40E_PROP_RX_ITR	"_rx_intr_throttle"
27 #define	I40E_PROP_TX_ITR	"_tx_intr_throttle"
28 #define	I40E_PROP_OTHER_ITR	"_other_intr_throttle"
29 
30 char *i40e_priv_props[] = {
31 	I40E_PROP_RX_DMA_THRESH,
32 	I40E_PROP_TX_DMA_THRESH,
33 	I40E_PROP_RX_ITR,
34 	I40E_PROP_TX_ITR,
35 	I40E_PROP_OTHER_ITR,
36 	NULL
37 };
38 
39 static int
40 i40e_group_remove_mac(void *arg, const uint8_t *mac_addr)
41 {
42 	i40e_t *i40e = arg;
43 	struct i40e_aqc_remove_macvlan_element_data filt;
44 	struct i40e_hw *hw = &i40e->i40e_hw_space;
45 	int ret, i, last;
46 	i40e_uaddr_t *iua;
47 
48 	if (I40E_IS_MULTICAST(mac_addr))
49 		return (EINVAL);
50 
51 	mutex_enter(&i40e->i40e_general_lock);
52 
53 	if (i40e->i40e_state & I40E_SUSPENDED) {
54 		ret = ECANCELED;
55 		goto done;
56 	}
57 
58 	for (i = 0; i < i40e->i40e_resources.ifr_nmacfilt_used; i++) {
59 		if (bcmp(mac_addr, i40e->i40e_uaddrs[i].iua_mac,
60 		    ETHERADDRL) == 0)
61 			break;
62 	}
63 
64 	if (i == i40e->i40e_resources.ifr_nmacfilt_used) {
65 		ret = ENOENT;
66 		goto done;
67 	}
68 
69 	iua = &i40e->i40e_uaddrs[i];
70 	ASSERT(i40e->i40e_resources.ifr_nmacfilt_used > 0);
71 
72 	bzero(&filt, sizeof (filt));
73 	bcopy(mac_addr, filt.mac_addr, ETHERADDRL);
74 	filt.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
75 	    I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
76 
77 	if (i40e_aq_remove_macvlan(hw, iua->iua_vsi, &filt, 1, NULL) !=
78 	    I40E_SUCCESS) {
79 		i40e_error(i40e, "failed to remove mac address "
80 		    "%2x:%2x:%2x:%2x:%2x:%2x from unicast filter: %d",
81 		    mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3],
82 		    mac_addr[4], mac_addr[5], filt.error_code);
83 		ret = EIO;
84 		goto done;
85 	}
86 
87 	last = i40e->i40e_resources.ifr_nmacfilt_used - 1;
88 	if (i != last) {
89 		i40e_uaddr_t *src = &i40e->i40e_uaddrs[last];
90 		bcopy(src, iua, sizeof (i40e_uaddr_t));
91 	}
92 
93 	/*
94 	 * Set the multicast bit in the last one to indicate to ourselves that
95 	 * it's invalid.
96 	 */
97 	bzero(&i40e->i40e_uaddrs[last], sizeof (i40e_uaddr_t));
98 	i40e->i40e_uaddrs[last].iua_mac[0] = 0x01;
99 	i40e->i40e_resources.ifr_nmacfilt_used--;
100 	ret = 0;
101 done:
102 	mutex_exit(&i40e->i40e_general_lock);
103 
104 	return (ret);
105 }
106 
107 static int
108 i40e_group_add_mac(void *arg, const uint8_t *mac_addr)
109 {
110 	i40e_t *i40e = arg;
111 	struct i40e_hw *hw = &i40e->i40e_hw_space;
112 	int i, ret;
113 	i40e_uaddr_t *iua;
114 	struct i40e_aqc_add_macvlan_element_data filt;
115 
116 	if (I40E_IS_MULTICAST(mac_addr))
117 		return (EINVAL);
118 
119 	mutex_enter(&i40e->i40e_general_lock);
120 	if (i40e->i40e_state & I40E_SUSPENDED) {
121 		ret = ECANCELED;
122 		goto done;
123 	}
124 
125 	if (i40e->i40e_resources.ifr_nmacfilt ==
126 	    i40e->i40e_resources.ifr_nmacfilt_used) {
127 		ret = ENOSPC;
128 		goto done;
129 	}
130 
131 	for (i = 0; i < i40e->i40e_resources.ifr_nmacfilt_used; i++) {
132 		if (bcmp(mac_addr, i40e->i40e_uaddrs[i].iua_mac,
133 		    ETHERADDRL) == 0) {
134 			ret = EEXIST;
135 			goto done;
136 		}
137 	}
138 
139 	/*
140 	 * Note, the general use of the i40e_vsi_id will have to be refactored
141 	 * when we have proper group support.
142 	 */
143 	bzero(&filt, sizeof (filt));
144 	bcopy(mac_addr, filt.mac_addr, ETHERADDRL);
145 	filt.flags = I40E_AQC_MACVLAN_ADD_PERFECT_MATCH	|
146 	    I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
147 
148 	if ((ret = i40e_aq_add_macvlan(hw, i40e->i40e_vsi_id, &filt, 1,
149 	    NULL)) != I40E_SUCCESS) {
150 		i40e_error(i40e, "failed to add mac address "
151 		    "%2x:%2x:%2x:%2x:%2x:%2x to unicast filter: %d",
152 		    mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3],
153 		    mac_addr[4], mac_addr[5], ret);
154 		ret = EIO;
155 		goto done;
156 	}
157 
158 	iua = &i40e->i40e_uaddrs[i40e->i40e_resources.ifr_nmacfilt_used];
159 	bcopy(mac_addr, iua->iua_mac, ETHERADDRL);
160 	iua->iua_vsi = i40e->i40e_vsi_id;
161 	i40e->i40e_resources.ifr_nmacfilt_used++;
162 	ASSERT(i40e->i40e_resources.ifr_nmacfilt_used <=
163 	    i40e->i40e_resources.ifr_nmacfilt);
164 	ret = 0;
165 done:
166 	mutex_exit(&i40e->i40e_general_lock);
167 	return (ret);
168 }
169 
170 static int
171 i40e_m_start(void *arg)
172 {
173 	i40e_t *i40e = arg;
174 	int rc = 0;
175 
176 	mutex_enter(&i40e->i40e_general_lock);
177 	if (i40e->i40e_state & I40E_SUSPENDED) {
178 		rc = ECANCELED;
179 		goto done;
180 	}
181 
182 	if (!i40e_start(i40e, B_TRUE)) {
183 		rc = EIO;
184 		goto done;
185 	}
186 
187 	atomic_or_32(&i40e->i40e_state, I40E_STARTED);
188 done:
189 	mutex_exit(&i40e->i40e_general_lock);
190 
191 	return (rc);
192 }
193 
194 static void
195 i40e_m_stop(void *arg)
196 {
197 	i40e_t *i40e = arg;
198 
199 	mutex_enter(&i40e->i40e_general_lock);
200 
201 	if (i40e->i40e_state & I40E_SUSPENDED)
202 		goto done;
203 
204 	atomic_and_32(&i40e->i40e_state, ~I40E_STARTED);
205 	i40e_stop(i40e, B_TRUE);
206 done:
207 	mutex_exit(&i40e->i40e_general_lock);
208 }
209 
210 /*
211  * Enable and disable promiscuous mode as requested. We have to toggle both
212  * unicast and multicast. Note that multicast may already be enabled due to the
213  * i40e_m_multicast may toggle it itself. See i40e_main.c for more information
214  * on this.
215  */
216 static int
217 i40e_m_promisc(void *arg, boolean_t on)
218 {
219 	i40e_t *i40e = arg;
220 	struct i40e_hw *hw = &i40e->i40e_hw_space;
221 	int ret = 0, err = 0;
222 
223 	mutex_enter(&i40e->i40e_general_lock);
224 	if (i40e->i40e_state & I40E_SUSPENDED) {
225 		ret = ECANCELED;
226 		goto done;
227 	}
228 
229 
230 	ret = i40e_aq_set_vsi_unicast_promiscuous(hw, i40e->i40e_vsi_id,
231 	    on, NULL, B_FALSE);
232 	if (ret != I40E_SUCCESS) {
233 		i40e_error(i40e, "failed to %s unicast promiscuity on "
234 		    "the default VSI: %d", on == B_TRUE ? "enable" : "disable",
235 		    ret);
236 		err = EIO;
237 		goto done;
238 	}
239 
240 	/*
241 	 * If we have a non-zero mcast_promisc_count, then it has already been
242 	 * enabled or we need to leave it that way and not touch it.
243 	 */
244 	if (i40e->i40e_mcast_promisc_count > 0) {
245 		i40e->i40e_promisc_on = on;
246 		goto done;
247 	}
248 
249 	ret = i40e_aq_set_vsi_multicast_promiscuous(hw, i40e->i40e_vsi_id,
250 	    on, NULL);
251 	if (ret != I40E_SUCCESS) {
252 		i40e_error(i40e, "failed to %s multicast promiscuity on "
253 		    "the default VSI: %d", on == B_TRUE ? "enable" : "disable",
254 		    ret);
255 
256 		/*
257 		 * Try our best to put us back into a state that MAC expects us
258 		 * to be in.
259 		 */
260 		ret = i40e_aq_set_vsi_unicast_promiscuous(hw, i40e->i40e_vsi_id,
261 		    !on, NULL, B_FALSE);
262 		if (ret != I40E_SUCCESS) {
263 			i40e_error(i40e, "failed to %s unicast promiscuity on "
264 			    "the default VSI after toggling multicast failed: "
265 			    "%d", on == B_TRUE ? "disable" : "enable", ret);
266 		}
267 
268 		err = EIO;
269 		goto done;
270 	} else {
271 		i40e->i40e_promisc_on = on;
272 	}
273 
274 done:
275 	mutex_exit(&i40e->i40e_general_lock);
276 	return (err);
277 }
278 
279 /*
280  * See the big theory statement in i40e_main.c for multicast address management.
281  */
282 static int
283 i40e_multicast_add(i40e_t *i40e, const uint8_t *multicast_address)
284 {
285 	struct i40e_hw *hw = &i40e->i40e_hw_space;
286 	struct i40e_aqc_add_macvlan_element_data filt;
287 	i40e_maddr_t *mc;
288 	int ret;
289 
290 	ASSERT(MUTEX_HELD(&i40e->i40e_general_lock));
291 
292 	if (i40e->i40e_resources.ifr_nmcastfilt_used ==
293 	    i40e->i40e_resources.ifr_nmcastfilt) {
294 		if (i40e->i40e_mcast_promisc_count == 0 &&
295 		    i40e->i40e_promisc_on == B_FALSE) {
296 			ret = i40e_aq_set_vsi_multicast_promiscuous(hw,
297 			    i40e->i40e_vsi_id, B_TRUE, NULL);
298 			if (ret != I40E_SUCCESS) {
299 				i40e_error(i40e, "failed to enable multicast "
300 				    "promiscuous mode on VSI %d: %d",
301 				    i40e->i40e_vsi_id, ret);
302 				return (EIO);
303 			}
304 		}
305 		i40e->i40e_mcast_promisc_count++;
306 		return (0);
307 	}
308 
309 	mc = &i40e->i40e_maddrs[i40e->i40e_resources.ifr_nmcastfilt_used];
310 	bzero(&filt, sizeof (filt));
311 	bcopy(multicast_address, filt.mac_addr, ETHERADDRL);
312 	filt.flags = I40E_AQC_MACVLAN_ADD_HASH_MATCH |
313 	    I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
314 
315 	if ((ret = i40e_aq_add_macvlan(hw, i40e->i40e_vsi_id, &filt, 1,
316 	    NULL)) != I40E_SUCCESS) {
317 		i40e_error(i40e, "failed to add mac address "
318 		    "%2x:%2x:%2x:%2x:%2x:%2x to multicast filter: %d",
319 		    multicast_address[0], multicast_address[1],
320 		    multicast_address[2], multicast_address[3],
321 		    multicast_address[4], multicast_address[5],
322 		    ret);
323 		return (EIO);
324 	}
325 
326 	bcopy(multicast_address, mc->ima_mac, ETHERADDRL);
327 	i40e->i40e_resources.ifr_nmcastfilt_used++;
328 	return (0);
329 }
330 
331 /*
332  * See the big theory statement in i40e_main.c for multicast address management.
333  */
334 static int
335 i40e_multicast_remove(i40e_t *i40e, const uint8_t *multicast_address)
336 {
337 	int i, ret;
338 	struct i40e_hw *hw = &i40e->i40e_hw_space;
339 
340 	ASSERT(MUTEX_HELD(&i40e->i40e_general_lock));
341 
342 	for (i = 0; i < i40e->i40e_resources.ifr_nmcastfilt_used; i++) {
343 		struct i40e_aqc_remove_macvlan_element_data filt;
344 		int last;
345 
346 		if (bcmp(multicast_address, i40e->i40e_maddrs[i].ima_mac,
347 		    ETHERADDRL) != 0) {
348 			continue;
349 		}
350 
351 		bzero(&filt, sizeof (filt));
352 		bcopy(multicast_address, filt.mac_addr, ETHERADDRL);
353 		filt.flags = I40E_AQC_MACVLAN_DEL_HASH_MATCH |
354 		    I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
355 
356 		if (i40e_aq_remove_macvlan(hw, i40e->i40e_vsi_id,
357 		    &filt, 1, NULL) != I40E_SUCCESS) {
358 			i40e_error(i40e, "failed to remove mac address "
359 			    "%2x:%2x:%2x:%2x:%2x:%2x from multicast "
360 			    "filter: %d",
361 			    multicast_address[0], multicast_address[1],
362 			    multicast_address[2], multicast_address[3],
363 			    multicast_address[4], multicast_address[5],
364 			    filt.error_code);
365 			return (EIO);
366 		}
367 
368 		last = i40e->i40e_resources.ifr_nmcastfilt_used - 1;
369 		if (i != last) {
370 			bcopy(&i40e->i40e_maddrs[last], &i40e->i40e_maddrs[i],
371 			    sizeof (i40e_maddr_t));
372 			bzero(&i40e->i40e_maddrs[last], sizeof (i40e_maddr_t));
373 		}
374 
375 		ASSERT(i40e->i40e_resources.ifr_nmcastfilt_used > 0);
376 		i40e->i40e_resources.ifr_nmcastfilt_used--;
377 		return (0);
378 	}
379 
380 	if (i40e->i40e_mcast_promisc_count > 0) {
381 		if (i40e->i40e_mcast_promisc_count == 1 &&
382 		    i40e->i40e_promisc_on == B_FALSE) {
383 			ret = i40e_aq_set_vsi_multicast_promiscuous(hw,
384 			    i40e->i40e_vsi_id, B_FALSE, NULL);
385 			if (ret != I40E_SUCCESS) {
386 				i40e_error(i40e, "failed to disable "
387 				    "multicast promiscuous mode on VSI %d: %d",
388 				    i40e->i40e_vsi_id, ret);
389 				return (EIO);
390 			}
391 		}
392 		i40e->i40e_mcast_promisc_count--;
393 
394 		return (0);
395 	}
396 
397 	return (ENOENT);
398 }
399 
400 static int
401 i40e_m_multicast(void *arg, boolean_t add, const uint8_t *multicast_address)
402 {
403 	i40e_t *i40e = arg;
404 	int rc;
405 
406 	mutex_enter(&i40e->i40e_general_lock);
407 
408 	if (i40e->i40e_state & I40E_SUSPENDED) {
409 		mutex_exit(&i40e->i40e_general_lock);
410 		return (ECANCELED);
411 	}
412 
413 	if (add == B_TRUE) {
414 		rc = i40e_multicast_add(i40e, multicast_address);
415 	} else {
416 		rc = i40e_multicast_remove(i40e, multicast_address);
417 	}
418 
419 	mutex_exit(&i40e->i40e_general_lock);
420 	return (rc);
421 }
422 
423 /* ARGSUSED */
424 static void
425 i40e_m_ioctl(void *arg, queue_t *q, mblk_t *mp)
426 {
427 	/*
428 	 * At this time, we don't support toggling i40e into loopback mode. It's
429 	 * questionable how much value this has when there's no clear way to
430 	 * toggle this behavior from a supported way in userland.
431 	 */
432 	miocnak(q, mp, 0, EINVAL);
433 }
434 
435 static int
436 i40e_ring_start(mac_ring_driver_t rh, uint64_t gen_num)
437 {
438 	i40e_trqpair_t *itrq = (i40e_trqpair_t *)rh;
439 
440 	/*
441 	 * GLDv3 requires we keep track of a generation number, as it uses
442 	 * that number to keep track of whether or not a ring is active.
443 	 */
444 	mutex_enter(&itrq->itrq_rx_lock);
445 	itrq->itrq_rxgen = gen_num;
446 	mutex_exit(&itrq->itrq_rx_lock);
447 	return (0);
448 }
449 
450 /* ARGSUSED */
451 static int
452 i40e_rx_ring_intr_enable(mac_intr_handle_t intrh)
453 {
454 	i40e_trqpair_t *itrq = (i40e_trqpair_t *)intrh;
455 
456 	mutex_enter(&itrq->itrq_rx_lock);
457 	ASSERT(itrq->itrq_intr_poll == B_TRUE);
458 	i40e_intr_rx_queue_enable(itrq);
459 	itrq->itrq_intr_poll = B_FALSE;
460 	mutex_exit(&itrq->itrq_rx_lock);
461 
462 	return (0);
463 }
464 
465 /* ARGSUSED */
466 static int
467 i40e_rx_ring_intr_disable(mac_intr_handle_t intrh)
468 {
469 	i40e_trqpair_t *itrq = (i40e_trqpair_t *)intrh;
470 
471 	mutex_enter(&itrq->itrq_rx_lock);
472 	i40e_intr_rx_queue_disable(itrq);
473 	itrq->itrq_intr_poll = B_TRUE;
474 	mutex_exit(&itrq->itrq_rx_lock);
475 
476 	return (0);
477 }
478 
479 /* ARGSUSED */
480 static void
481 i40e_fill_tx_ring(void *arg, mac_ring_type_t rtype, const int group_index,
482     const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh)
483 {
484 	i40e_t *i40e = arg;
485 	mac_intr_t *mintr = &infop->mri_intr;
486 	i40e_trqpair_t *itrq = &(i40e->i40e_trqpairs[ring_index]);
487 
488 	/*
489 	 * Note the group index here is expected to be -1 due to the fact that
490 	 * we're not actually grouping things tx-wise at this time.
491 	 */
492 	ASSERT(group_index == -1);
493 	ASSERT(ring_index < i40e->i40e_num_trqpairs);
494 
495 	itrq->itrq_mactxring = rh;
496 	infop->mri_driver = (mac_ring_driver_t)itrq;
497 	infop->mri_start = NULL;
498 	infop->mri_stop = NULL;
499 	infop->mri_tx = i40e_ring_tx;
500 	infop->mri_stat = i40e_tx_ring_stat;
501 
502 	/*
503 	 * We only provide the handle in cases where we have MSI-X interrupts,
504 	 * to indicate that we'd actually support retargetting.
505 	 */
506 	if (i40e->i40e_intr_type & DDI_INTR_TYPE_MSIX) {
507 		mintr->mi_ddi_handle =
508 		    i40e->i40e_intr_handles[itrq->itrq_tx_intrvec];
509 	}
510 }
511 
512 /* ARGSUSED */
513 static void
514 i40e_fill_rx_ring(void *arg, mac_ring_type_t rtype, const int group_index,
515     const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh)
516 {
517 	i40e_t *i40e = arg;
518 	mac_intr_t *mintr = &infop->mri_intr;
519 	i40e_trqpair_t *itrq = &i40e->i40e_trqpairs[ring_index];
520 
521 	/*
522 	 * We assert the group number and ring index to help sanity check
523 	 * ourselves and mark that we'll need to rework this when we have
524 	 * multiple groups.
525 	 */
526 	ASSERT3S(group_index, ==, 0);
527 	ASSERT3S(ring_index, <, i40e->i40e_num_trqpairs);
528 
529 	itrq->itrq_macrxring = rh;
530 	infop->mri_driver = (mac_ring_driver_t)itrq;
531 	infop->mri_start = i40e_ring_start;
532 	infop->mri_stop = NULL;
533 	infop->mri_poll = i40e_ring_rx_poll;
534 	infop->mri_stat = i40e_rx_ring_stat;
535 	mintr->mi_handle = (mac_intr_handle_t)itrq;
536 	mintr->mi_enable = i40e_rx_ring_intr_enable;
537 	mintr->mi_disable = i40e_rx_ring_intr_disable;
538 
539 	/*
540 	 * We only provide the handle in cases where we have MSI-X interrupts,
541 	 * to indicate that we'd actually support retargetting.
542 	 */
543 	if (i40e->i40e_intr_type & DDI_INTR_TYPE_MSIX) {
544 		mintr->mi_ddi_handle =
545 		    i40e->i40e_intr_handles[itrq->itrq_rx_intrvec];
546 	}
547 }
548 
549 /* ARGSUSED */
550 static void
551 i40e_fill_rx_group(void *arg, mac_ring_type_t rtype, const int index,
552     mac_group_info_t *infop, mac_group_handle_t gh)
553 {
554 	i40e_t *i40e = arg;
555 
556 	if (rtype != MAC_RING_TYPE_RX)
557 		return;
558 
559 	/*
560 	 * Note, this is a simplified view of a group, given that we only have a
561 	 * single group and a single ring at the moment. We'll want to expand
562 	 * upon this as we leverage more hardware functionality.
563 	 */
564 	i40e->i40e_rx_group_handle = gh;
565 	infop->mgi_driver = (mac_group_driver_t)i40e;
566 	infop->mgi_start = NULL;
567 	infop->mgi_stop = NULL;
568 	infop->mgi_addmac = i40e_group_add_mac;
569 	infop->mgi_remmac = i40e_group_remove_mac;
570 
571 	ASSERT(i40e->i40e_num_rx_groups == I40E_GROUP_MAX);
572 	infop->mgi_count = i40e->i40e_num_trqpairs;
573 }
574 
575 static int
576 i40e_transceiver_info(void *arg, uint_t id, mac_transceiver_info_t *infop)
577 {
578 	boolean_t present, usable;
579 	i40e_t *i40e = arg;
580 
581 	if (id != 0 || infop == NULL)
582 		return (EINVAL);
583 
584 	mutex_enter(&i40e->i40e_general_lock);
585 	present = !!(i40e->i40e_hw_space.phy.link_info.link_info &
586 	    I40E_AQ_MEDIA_AVAILABLE);
587 	if (present) {
588 		usable = !!(i40e->i40e_hw_space.phy.link_info.an_info &
589 		    I40E_AQ_QUALIFIED_MODULE);
590 	} else {
591 		usable = B_FALSE;
592 	}
593 	mutex_exit(&i40e->i40e_general_lock);
594 
595 	mac_transceiver_info_set_usable(infop, usable);
596 	mac_transceiver_info_set_present(infop, present);
597 
598 	return (0);
599 }
600 
601 static boolean_t
602 i40e_m_getcapab(void *arg, mac_capab_t cap, void *cap_data)
603 {
604 	i40e_t *i40e = arg;
605 	mac_capab_rings_t *cap_rings;
606 	mac_capab_transceiver_t *mct;
607 
608 	switch (cap) {
609 	case MAC_CAPAB_HCKSUM: {
610 		uint32_t *txflags = cap_data;
611 
612 		*txflags = 0;
613 		if (i40e->i40e_tx_hcksum_enable == B_TRUE)
614 			*txflags = HCKSUM_INET_PARTIAL | HCKSUM_IPHDRCKSUM;
615 		break;
616 	}
617 
618 	case MAC_CAPAB_RINGS:
619 		cap_rings = cap_data;
620 		cap_rings->mr_group_type = MAC_GROUP_TYPE_STATIC;
621 		switch (cap_rings->mr_type) {
622 		case MAC_RING_TYPE_TX:
623 			/*
624 			 * Note, saying we have no rings, but some number of
625 			 * groups indicates to MAC that it should create
626 			 * psuedo-groups with one for each TX ring. This may not
627 			 * be the long term behavior we want, but it'll work for
628 			 * now.
629 			 */
630 			cap_rings->mr_gnum = 0;
631 			cap_rings->mr_rnum = i40e->i40e_num_trqpairs;
632 			cap_rings->mr_rget = i40e_fill_tx_ring;
633 			cap_rings->mr_gget = NULL;
634 			cap_rings->mr_gaddring = NULL;
635 			cap_rings->mr_gremring = NULL;
636 			break;
637 		case MAC_RING_TYPE_RX:
638 			cap_rings->mr_rnum = i40e->i40e_num_trqpairs;
639 			cap_rings->mr_rget = i40e_fill_rx_ring;
640 			cap_rings->mr_gnum = I40E_GROUP_MAX;
641 			cap_rings->mr_gget = i40e_fill_rx_group;
642 			cap_rings->mr_gaddring = NULL;
643 			cap_rings->mr_gremring = NULL;
644 			break;
645 		default:
646 			return (B_FALSE);
647 		}
648 		break;
649 	case MAC_CAPAB_TRANSCEIVER:
650 		mct = cap_data;
651 
652 		/*
653 		 * Firmware doesn't have a great way of telling us in advance
654 		 * whether we'd expect a SFF transceiver. As such, we always
655 		 * advertise the support for this capability.
656 		 */
657 		mct->mct_flags = 0;
658 		mct->mct_ntransceivers = 1;
659 		mct->mct_info = i40e_transceiver_info;
660 		mct->mct_read = NULL;
661 
662 		return (B_TRUE);
663 	default:
664 		return (B_FALSE);
665 	}
666 
667 	return (B_TRUE);
668 }
669 
670 /* ARGSUSED */
671 static int
672 i40e_m_setprop_private(i40e_t *i40e, const char *pr_name, uint_t pr_valsize,
673     const void *pr_val)
674 {
675 	int ret;
676 	long val;
677 	char *eptr;
678 
679 	ASSERT(MUTEX_HELD(&i40e->i40e_general_lock));
680 
681 	if ((ret = ddi_strtol(pr_val, &eptr, 10, &val)) != 0 ||
682 	    *eptr != '\0') {
683 		return (ret);
684 	}
685 
686 	if (strcmp(pr_name, I40E_PROP_RX_DMA_THRESH) == 0) {
687 		if (val < I40E_MIN_RX_DMA_THRESH ||
688 		    val > I40E_MAX_RX_DMA_THRESH) {
689 			return (EINVAL);
690 		}
691 		i40e->i40e_rx_dma_min = (uint32_t)val;
692 		return (0);
693 	}
694 
695 	if (strcmp(pr_name, I40E_PROP_TX_DMA_THRESH) == 0) {
696 		if (val < I40E_MIN_TX_DMA_THRESH ||
697 		    val > I40E_MAX_TX_DMA_THRESH) {
698 			return (EINVAL);
699 		}
700 		i40e->i40e_tx_dma_min = (uint32_t)val;
701 		return (0);
702 	}
703 
704 	if (strcmp(pr_name, I40E_PROP_RX_ITR) == 0) {
705 		if (val < I40E_MIN_ITR ||
706 		    val > I40E_MAX_ITR) {
707 			return (EINVAL);
708 		}
709 		i40e->i40e_rx_itr = (uint32_t)val;
710 		i40e_intr_set_itr(i40e, I40E_ITR_INDEX_RX, i40e->i40e_rx_itr);
711 		return (0);
712 	}
713 
714 	if (strcmp(pr_name, I40E_PROP_TX_ITR) == 0) {
715 		if (val < I40E_MIN_ITR ||
716 		    val > I40E_MAX_ITR) {
717 			return (EINVAL);
718 		}
719 		i40e->i40e_tx_itr = (uint32_t)val;
720 		i40e_intr_set_itr(i40e, I40E_ITR_INDEX_TX, i40e->i40e_tx_itr);
721 		return (0);
722 	}
723 
724 	if (strcmp(pr_name, I40E_PROP_OTHER_ITR) == 0) {
725 		if (val < I40E_MIN_ITR ||
726 		    val > I40E_MAX_ITR) {
727 			return (EINVAL);
728 		}
729 		i40e->i40e_tx_itr = (uint32_t)val;
730 		i40e_intr_set_itr(i40e, I40E_ITR_INDEX_OTHER,
731 		    i40e->i40e_other_itr);
732 		return (0);
733 	}
734 
735 	return (ENOTSUP);
736 }
737 
738 static int
739 i40e_m_getprop_private(i40e_t *i40e, const char *pr_name, uint_t pr_valsize,
740     void *pr_val)
741 {
742 	uint32_t val;
743 
744 	ASSERT(MUTEX_HELD(&i40e->i40e_general_lock));
745 
746 	if (strcmp(pr_name, I40E_PROP_RX_DMA_THRESH) == 0) {
747 		val = i40e->i40e_rx_dma_min;
748 	} else if (strcmp(pr_name, I40E_PROP_TX_DMA_THRESH) == 0) {
749 		val = i40e->i40e_tx_dma_min;
750 	} else if (strcmp(pr_name, I40E_PROP_RX_ITR) == 0) {
751 		val = i40e->i40e_rx_itr;
752 	} else if (strcmp(pr_name, I40E_PROP_TX_ITR) == 0) {
753 		val = i40e->i40e_tx_itr;
754 	} else if (strcmp(pr_name, I40E_PROP_OTHER_ITR) == 0) {
755 		val = i40e->i40e_other_itr;
756 	} else {
757 		return (ENOTSUP);
758 	}
759 
760 	if (snprintf(pr_val, pr_valsize, "%d", val) >= pr_valsize)
761 		return (ERANGE);
762 	return (0);
763 }
764 
765 /*
766  * Annoyingly for private properties MAC seems to ignore default values that
767  * aren't strings. That means that we have to translate all of these into
768  * uint32_t's and instead we size the buffer to be large enough to hold a
769  * uint32_t.
770  */
771 /* ARGSUSED */
772 static void
773 i40e_m_propinfo_private(i40e_t *i40e, const char *pr_name,
774     mac_prop_info_handle_t prh)
775 {
776 	char buf[64];
777 	uint32_t def;
778 
779 	if (strcmp(pr_name, I40E_PROP_RX_DMA_THRESH) == 0) {
780 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW);
781 		def = I40E_DEF_RX_DMA_THRESH;
782 		mac_prop_info_set_range_uint32(prh,
783 		    I40E_MIN_RX_DMA_THRESH,
784 		    I40E_MAX_RX_DMA_THRESH);
785 	} else if (strcmp(pr_name, I40E_PROP_TX_DMA_THRESH) == 0) {
786 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW);
787 		def = I40E_DEF_TX_DMA_THRESH;
788 		mac_prop_info_set_range_uint32(prh,
789 		    I40E_MIN_TX_DMA_THRESH,
790 		    I40E_MAX_TX_DMA_THRESH);
791 	} else if (strcmp(pr_name, I40E_PROP_RX_ITR) == 0) {
792 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW);
793 		def = I40E_DEF_RX_ITR;
794 		mac_prop_info_set_range_uint32(prh, I40E_MIN_ITR, I40E_MAX_ITR);
795 	} else if (strcmp(pr_name, I40E_PROP_TX_ITR) == 0) {
796 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW);
797 		def = I40E_DEF_TX_ITR;
798 		mac_prop_info_set_range_uint32(prh, I40E_MIN_ITR, I40E_MAX_ITR);
799 	} else if (strcmp(pr_name, I40E_PROP_OTHER_ITR) == 0) {
800 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW);
801 		def = I40E_DEF_OTHER_ITR;
802 		mac_prop_info_set_range_uint32(prh, I40E_MIN_ITR, I40E_MAX_ITR);
803 	} else {
804 		return;
805 	}
806 
807 	(void) snprintf(buf, sizeof (buf), "%d", def);
808 	mac_prop_info_set_default_str(prh, buf);
809 }
810 
811 static int
812 i40e_m_setprop(void *arg, const char *pr_name, mac_prop_id_t pr_num,
813     uint_t pr_valsize, const void *pr_val)
814 {
815 	uint32_t new_mtu;
816 	i40e_t *i40e = arg;
817 	int ret = 0;
818 
819 	mutex_enter(&i40e->i40e_general_lock);
820 	if (i40e->i40e_state & I40E_SUSPENDED) {
821 		mutex_exit(&i40e->i40e_general_lock);
822 		return (ECANCELED);
823 	}
824 
825 	switch (pr_num) {
826 	/*
827 	 * These properties are always read-only across every device.
828 	 */
829 	case MAC_PROP_DUPLEX:
830 	case MAC_PROP_SPEED:
831 	case MAC_PROP_STATUS:
832 	case MAC_PROP_ADV_100FDX_CAP:
833 	case MAC_PROP_ADV_1000FDX_CAP:
834 	case MAC_PROP_ADV_10GFDX_CAP:
835 	case MAC_PROP_ADV_25GFDX_CAP:
836 	case MAC_PROP_ADV_40GFDX_CAP:
837 		ret = ENOTSUP;
838 		break;
839 	/*
840 	 * These are read-only at this time as we don't support configuring
841 	 * auto-negotiation. See the theory statement in i40e_main.c.
842 	 */
843 	case MAC_PROP_EN_100FDX_CAP:
844 	case MAC_PROP_EN_1000FDX_CAP:
845 	case MAC_PROP_EN_10GFDX_CAP:
846 	case MAC_PROP_EN_25GFDX_CAP:
847 	case MAC_PROP_EN_40GFDX_CAP:
848 	case MAC_PROP_AUTONEG:
849 	case MAC_PROP_FLOWCTRL:
850 		ret = ENOTSUP;
851 		break;
852 
853 	case MAC_PROP_MTU:
854 		bcopy(pr_val, &new_mtu, sizeof (new_mtu));
855 		if (new_mtu == i40e->i40e_sdu)
856 			break;
857 
858 		if (new_mtu < I40E_MIN_MTU ||
859 		    new_mtu > I40E_MAX_MTU) {
860 			ret = EINVAL;
861 			break;
862 		}
863 
864 		if (i40e->i40e_state & I40E_STARTED) {
865 			ret = EBUSY;
866 			break;
867 		}
868 
869 		ret = mac_maxsdu_update(i40e->i40e_mac_hdl, new_mtu);
870 		if (ret == 0) {
871 			i40e->i40e_sdu = new_mtu;
872 			i40e_update_mtu(i40e);
873 		}
874 		break;
875 
876 	case MAC_PROP_PRIVATE:
877 		ret = i40e_m_setprop_private(i40e, pr_name, pr_valsize, pr_val);
878 		break;
879 	default:
880 		ret = ENOTSUP;
881 		break;
882 	}
883 
884 	mutex_exit(&i40e->i40e_general_lock);
885 	return (ret);
886 }
887 
888 static int
889 i40e_m_getprop(void *arg, const char *pr_name, mac_prop_id_t pr_num,
890     uint_t pr_valsize, void *pr_val)
891 {
892 	i40e_t *i40e = arg;
893 	uint64_t speed;
894 	int ret = 0;
895 	uint8_t *u8;
896 	link_flowctrl_t fctl;
897 
898 	mutex_enter(&i40e->i40e_general_lock);
899 
900 	switch (pr_num) {
901 	case MAC_PROP_DUPLEX:
902 		if (pr_valsize < sizeof (link_duplex_t)) {
903 			ret = EOVERFLOW;
904 			break;
905 		}
906 		bcopy(&i40e->i40e_link_duplex, pr_val, sizeof (link_duplex_t));
907 		break;
908 	case MAC_PROP_SPEED:
909 		if (pr_valsize < sizeof (uint64_t)) {
910 			ret = EOVERFLOW;
911 			break;
912 		}
913 		speed = i40e->i40e_link_speed * 1000000ULL;
914 		bcopy(&speed, pr_val, sizeof (speed));
915 		break;
916 	case MAC_PROP_STATUS:
917 		if (pr_valsize < sizeof (link_state_t)) {
918 			ret = EOVERFLOW;
919 			break;
920 		}
921 		bcopy(&i40e->i40e_link_state, pr_val, sizeof (link_state_t));
922 		break;
923 	case MAC_PROP_AUTONEG:
924 		if (pr_valsize < sizeof (uint8_t)) {
925 			ret = EOVERFLOW;
926 			break;
927 		}
928 		u8 = pr_val;
929 		*u8 = 1;
930 		break;
931 	case MAC_PROP_FLOWCTRL:
932 		/*
933 		 * Because we don't currently support hardware flow control, we
934 		 * just hardcode this to be none.
935 		 */
936 		if (pr_valsize < sizeof (link_flowctrl_t)) {
937 			ret = EOVERFLOW;
938 			break;
939 		}
940 		fctl = LINK_FLOWCTRL_NONE;
941 		bcopy(&fctl, pr_val, sizeof (link_flowctrl_t));
942 		break;
943 	case MAC_PROP_MTU:
944 		if (pr_valsize < sizeof (uint32_t)) {
945 			ret = EOVERFLOW;
946 			break;
947 		}
948 		bcopy(&i40e->i40e_sdu, pr_val, sizeof (uint32_t));
949 		break;
950 
951 	/*
952 	 * Because we don't let users control the speeds we may auto-negotiate
953 	 * to, the values of the ADV_ and EN_ will always be the same.
954 	 */
955 	case MAC_PROP_ADV_100FDX_CAP:
956 	case MAC_PROP_EN_100FDX_CAP:
957 		if (pr_valsize < sizeof (uint8_t)) {
958 			ret = EOVERFLOW;
959 			break;
960 		}
961 		u8 = pr_val;
962 		*u8 = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_100MB) != 0;
963 		break;
964 	case MAC_PROP_ADV_1000FDX_CAP:
965 	case MAC_PROP_EN_1000FDX_CAP:
966 		if (pr_valsize < sizeof (uint8_t)) {
967 			ret = EOVERFLOW;
968 			break;
969 		}
970 		u8 = pr_val;
971 		*u8 = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_1GB) != 0;
972 		break;
973 	case MAC_PROP_ADV_10GFDX_CAP:
974 	case MAC_PROP_EN_10GFDX_CAP:
975 		if (pr_valsize < sizeof (uint8_t)) {
976 			ret = EOVERFLOW;
977 			break;
978 		}
979 		u8 = pr_val;
980 		*u8 = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_10GB) != 0;
981 		break;
982 	case MAC_PROP_ADV_25GFDX_CAP:
983 	case MAC_PROP_EN_25GFDX_CAP:
984 		if (pr_valsize < sizeof (uint8_t)) {
985 			ret = EOVERFLOW;
986 			break;
987 		}
988 		u8 = pr_val;
989 		*u8 = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_25GB) != 0;
990 		break;
991 	case MAC_PROP_ADV_40GFDX_CAP:
992 	case MAC_PROP_EN_40GFDX_CAP:
993 		if (pr_valsize < sizeof (uint8_t)) {
994 			ret = EOVERFLOW;
995 			break;
996 		}
997 		u8 = pr_val;
998 		*u8 = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_40GB) != 0;
999 		break;
1000 	case MAC_PROP_PRIVATE:
1001 		ret = i40e_m_getprop_private(i40e, pr_name, pr_valsize, pr_val);
1002 		break;
1003 	default:
1004 		ret = ENOTSUP;
1005 		break;
1006 	}
1007 
1008 	mutex_exit(&i40e->i40e_general_lock);
1009 
1010 	return (ret);
1011 }
1012 
1013 static void
1014 i40e_m_propinfo(void *arg, const char *pr_name, mac_prop_id_t pr_num,
1015     mac_prop_info_handle_t prh)
1016 {
1017 	i40e_t *i40e = arg;
1018 
1019 	mutex_enter(&i40e->i40e_general_lock);
1020 
1021 	switch (pr_num) {
1022 	case MAC_PROP_DUPLEX:
1023 	case MAC_PROP_SPEED:
1024 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1025 		break;
1026 	case MAC_PROP_FLOWCTRL:
1027 		/*
1028 		 * At the moment, the driver doesn't support flow control, hence
1029 		 * why this is set to read-only and none.
1030 		 */
1031 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1032 		mac_prop_info_set_default_link_flowctrl(prh,
1033 		    LINK_FLOWCTRL_NONE);
1034 		break;
1035 	case MAC_PROP_MTU:
1036 		mac_prop_info_set_range_uint32(prh, I40E_MIN_MTU, I40E_MAX_MTU);
1037 		break;
1038 
1039 	/*
1040 	 * We set the defaults for these based upon the phy's ability to
1041 	 * support the speeds. Note, auto-negotiation is required for fiber,
1042 	 * hence it is read-only and always enabled. When we have access to
1043 	 * copper phys we can revisit this.
1044 	 */
1045 	case MAC_PROP_AUTONEG:
1046 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1047 		mac_prop_info_set_default_uint8(prh, 1);
1048 		break;
1049 	case MAC_PROP_ADV_100FDX_CAP:
1050 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1051 		mac_prop_info_set_default_uint8(prh,
1052 		    (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_100MB) != 0);
1053 		break;
1054 	case MAC_PROP_EN_100FDX_CAP:
1055 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1056 		mac_prop_info_set_default_uint8(prh,
1057 		    (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_100MB) != 0);
1058 		break;
1059 	case MAC_PROP_ADV_1000FDX_CAP:
1060 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1061 		mac_prop_info_set_default_uint8(prh,
1062 		    (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_1GB) != 0);
1063 		break;
1064 	case MAC_PROP_EN_1000FDX_CAP:
1065 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1066 		mac_prop_info_set_default_uint8(prh,
1067 		    (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_1GB) != 0);
1068 		break;
1069 	case MAC_PROP_ADV_10GFDX_CAP:
1070 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1071 		mac_prop_info_set_default_uint8(prh,
1072 		    (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_10GB) != 0);
1073 		break;
1074 	case MAC_PROP_EN_10GFDX_CAP:
1075 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1076 		mac_prop_info_set_default_uint8(prh,
1077 		    (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_10GB) != 0);
1078 		break;
1079 	case MAC_PROP_ADV_25GFDX_CAP:
1080 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1081 		mac_prop_info_set_default_uint8(prh,
1082 		    (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_25GB) != 0);
1083 		break;
1084 	case MAC_PROP_EN_25GFDX_CAP:
1085 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1086 		mac_prop_info_set_default_uint8(prh,
1087 		    (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_25GB) != 0);
1088 		break;
1089 	case MAC_PROP_ADV_40GFDX_CAP:
1090 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1091 		mac_prop_info_set_default_uint8(prh,
1092 		    (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_40GB) != 0);
1093 		break;
1094 	case MAC_PROP_EN_40GFDX_CAP:
1095 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1096 		mac_prop_info_set_default_uint8(prh,
1097 		    (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_40GB) != 0);
1098 		break;
1099 	case MAC_PROP_PRIVATE:
1100 		i40e_m_propinfo_private(i40e, pr_name, prh);
1101 		break;
1102 	default:
1103 		break;
1104 	}
1105 
1106 	mutex_exit(&i40e->i40e_general_lock);
1107 }
1108 
1109 #define	I40E_M_CALLBACK_FLAGS \
1110 	(MC_IOCTL | MC_GETCAPAB | MC_SETPROP | MC_GETPROP | MC_PROPINFO)
1111 
1112 static mac_callbacks_t i40e_m_callbacks = {
1113 	I40E_M_CALLBACK_FLAGS,
1114 	i40e_m_stat,
1115 	i40e_m_start,
1116 	i40e_m_stop,
1117 	i40e_m_promisc,
1118 	i40e_m_multicast,
1119 	NULL,
1120 	NULL,
1121 	NULL,
1122 	i40e_m_ioctl,
1123 	i40e_m_getcapab,
1124 	NULL,
1125 	NULL,
1126 	i40e_m_setprop,
1127 	i40e_m_getprop,
1128 	i40e_m_propinfo
1129 };
1130 
1131 boolean_t
1132 i40e_register_mac(i40e_t *i40e)
1133 {
1134 	struct i40e_hw *hw = &i40e->i40e_hw_space;
1135 	int status;
1136 	mac_register_t *mac = mac_alloc(MAC_VERSION);
1137 
1138 	if (mac == NULL)
1139 		return (B_FALSE);
1140 
1141 	mac->m_type_ident = MAC_PLUGIN_IDENT_ETHER;
1142 	mac->m_driver = i40e;
1143 	mac->m_dip = i40e->i40e_dip;
1144 	mac->m_src_addr = hw->mac.addr;
1145 	mac->m_callbacks = &i40e_m_callbacks;
1146 	mac->m_min_sdu = 0;
1147 	mac->m_max_sdu = i40e->i40e_sdu;
1148 	mac->m_margin = VLAN_TAGSZ;
1149 	mac->m_priv_props = i40e_priv_props;
1150 	mac->m_v12n = MAC_VIRT_LEVEL1;
1151 
1152 	status = mac_register(mac, &i40e->i40e_mac_hdl);
1153 	if (status != 0)
1154 		i40e_error(i40e, "mac_register() returned %d", status);
1155 	mac_free(mac);
1156 
1157 	return (status == 0);
1158 }
1159