1# 2# This file and its contents are supplied under the terms of the 3# Common Development and Distribution License ("CDDL"), version 1.0. 4# You may only use this file in accordance with the terms of version 5# 1.0 of the CDDL. 6# 7# A full copy of the text of the CDDL should have accompanied this 8# source. A copy of the CDDL is also available via the Internet at 9# http://www.illumos.org/license/CDDL. 10# 11 12This directory contains files extracted from the Intel ixl-1.6.10 driver for 13FreeBSD which was later merged with ixl-1.9.9. 14 15The following change modified the common code. 16 179601 Divide by zero in i40e_get_available_resources() 18 19During the merge to ixl-1.9.9 the following patches were not applied to 20the illumos core. 21 22We don't explicitly recognise/use the _VF mac types. 23==================================================== 24--- i40e_common.c 25+++ i40e_common.c 26@@ -77,11 +76,11 @@ enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw) 27 hw->mac.type = I40E_MAC_X722; 28 break; 29 case I40E_DEV_ID_X722_VF: 30- case I40E_DEV_ID_X722_A0_VF: 31 hw->mac.type = I40E_MAC_X722_VF; 32 break; 33 case I40E_DEV_ID_VF: 34 case I40E_DEV_ID_VF_HV: 35+ case I40E_DEV_ID_ADAPTIVE_VF: 36 hw->mac.type = I40E_MAC_VF; 37 break; 38 default: 39 40We don't have these functions in Illumos core. 41============================================== 42--- i40e_common.c 43+++ i40e_common.c 44@@ -4537,7 +4687,6 @@ enum i40e_status_code i40e_aq_start_stop_dcbx(struct i40e_hw *hw, 45 * i40e_aq_add_udp_tunnel 46 * @hw: pointer to the hw struct 47 * @udp_port: the UDP port to add in Host byte order 48- * @header_len: length of the tunneling header length in DWords 49 * @protocol_index: protocol index type 50 * @filter_index: pointer to filter index 51 * @cmd_details: pointer to command details structure or NULL 52@@ -6910,7 +7185,7 @@ void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val) 53 * completion before returning. 54 **/ 55 enum i40e_status_code i40e_aq_send_msg_to_pf(struct i40e_hw *hw, 56- enum i40e_virtchnl_ops v_opcode, 57+ enum virtchnl_ops v_opcode, 58 enum i40e_status_code v_retval, 59 u8 *msg, u16 msglen, 60 struct i40e_asq_cmd_details *cmd_details) 61@@ -6949,9 +7224,9 @@ enum i40e_status_code i40e_aq_send_msg_to_pf(struct i40e_hw *hw, 62 * with appropriate information. 63 **/ 64 void i40e_vf_parse_hw_config(struct i40e_hw *hw, 65- struct i40e_virtchnl_vf_resource *msg) 66+ struct virtchnl_vf_resource *msg) 67 { 68- struct i40e_virtchnl_vsi_resource *vsi_res; 69+ struct virtchnl_vsi_resource *vsi_res; 70 int i; 71 72 vsi_res = &msg->vsi_res[0]; 73@@ -6960,20 +7235,18 @@ void i40e_vf_parse_hw_config(struct i40e_hw *hw, 74 hw->dev_caps.num_rx_qp = msg->num_queue_pairs; 75 hw->dev_caps.num_tx_qp = msg->num_queue_pairs; 76 hw->dev_caps.num_msix_vectors_vf = msg->max_vectors; 77- hw->dev_caps.dcb = msg->vf_offload_flags & 78- I40E_VIRTCHNL_VF_OFFLOAD_L2; 79- hw->dev_caps.fcoe = (msg->vf_offload_flags & 80- I40E_VIRTCHNL_VF_OFFLOAD_FCOE) ? 1 : 0; 81- hw->dev_caps.iwarp = (msg->vf_offload_flags & 82- I40E_VIRTCHNL_VF_OFFLOAD_IWARP) ? 1 : 0; 83+ hw->dev_caps.dcb = msg->vf_cap_flags & 84+ VIRTCHNL_VF_OFFLOAD_L2; 85+ hw->dev_caps.iwarp = (msg->vf_cap_flags & 86+ VIRTCHNL_VF_OFFLOAD_IWARP) ? 1 : 0; 87 for (i = 0; i < msg->num_vsis; i++) { 88- if (vsi_res->vsi_type == I40E_VSI_SRIOV) { 89+ if (vsi_res->vsi_type == VIRTCHNL_VSI_SRIOV) { 90 i40e_memcpy(hw->mac.perm_addr, 91 vsi_res->default_mac_addr, 92- I40E_ETH_LENGTH_OF_ADDRESS, 93+ ETH_ALEN, 94 I40E_NONDMA_TO_NONDMA); 95 i40e_memcpy(hw->mac.addr, vsi_res->default_mac_addr, 96- I40E_ETH_LENGTH_OF_ADDRESS, 97+ ETH_ALEN, 98 I40E_NONDMA_TO_NONDMA); 99 } 100 vsi_res++; 101@@ -6990,14 +7263,14 @@ void i40e_vf_parse_hw_config(struct i40e_hw *hw, 102 **/ 103 enum i40e_status_code i40e_vf_reset(struct i40e_hw *hw) 104 { 105- return i40e_aq_send_msg_to_pf(hw, I40E_VIRTCHNL_OP_RESET_VF, 106+ return i40e_aq_send_msg_to_pf(hw, VIRTCHNL_OP_RESET_VF, 107 I40E_SUCCESS, NULL, 0, NULL); 108 } 109