1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 #include <hxge_impl.h> 29 #include <inet/mi.h> 30 #include <sys/cmn_err.h> 31 32 #define RDC_NAME_FORMAT1 "RDC_" 33 #define TDC_NAME_FORMAT1 "TDC_" 34 #define CH_NAME_FORMAT "%d" 35 36 void 37 hxge_init_statsp(p_hxge_t hxgep) 38 { 39 size_t stats_size; 40 41 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_init_statsp")); 42 43 stats_size = sizeof (hxge_stats_t); 44 hxgep->statsp = KMEM_ZALLOC(stats_size, KM_SLEEP); 45 hxgep->statsp->stats_size = stats_size; 46 47 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_init_statsp")); 48 } 49 50 typedef struct { 51 uint8_t index; 52 uint8_t type; 53 char *name; 54 } hxge_kstat_index_t; 55 56 typedef enum { 57 RDC_STAT_PACKETS = 0, 58 RDC_STAT_BYTES, 59 RDC_STAT_ERRORS, 60 RDC_STAT_JUMBO_PKTS, 61 RDC_STAT_RCR_UNKNOWN_ERR, 62 RDC_STAT_RCR_SHA_PAR_ERR, 63 RDC_STAT_RBR_PRE_PAR_ERR, 64 RDC_STAT_RBR_PRE_EMTY, 65 RDC_STAT_RCR_SHADOW_FULL, 66 RDC_STAT_RBR_TMOUT, 67 RDC_STAT_PEU_RESP_ERR, 68 RDC_STAT_CTRL_FIFO_ECC_ERR, 69 RDC_STAT_DATA_FIFO_ECC_ERR, 70 RDC_STAT_RCRFULL, 71 RDC_STAT_RBR_EMPTY, 72 RDC_STAT_RBR_FULL, 73 RDC_STAT_RCRTO, 74 RDC_STAT_RCRTHRES, 75 RDC_STAT_END 76 } hxge_rdc_stat_index_t; 77 78 hxge_kstat_index_t hxge_rdc_stats[] = { 79 {RDC_STAT_PACKETS, KSTAT_DATA_UINT64, "rdc_packets"}, 80 {RDC_STAT_BYTES, KSTAT_DATA_UINT64, "rdc_bytes"}, 81 {RDC_STAT_JUMBO_PKTS, KSTAT_DATA_ULONG, "rdc_jumbo_pkts"}, 82 {RDC_STAT_RCR_UNKNOWN_ERR, KSTAT_DATA_ULONG, "rdc_rcr_unknown_err"}, 83 {RDC_STAT_ERRORS, KSTAT_DATA_ULONG, "rdc_errors"}, 84 {RDC_STAT_RCR_SHA_PAR_ERR, KSTAT_DATA_ULONG, "rdc_rcr_sha_par_err"}, 85 {RDC_STAT_RBR_PRE_PAR_ERR, KSTAT_DATA_ULONG, "rdc_rbr_pre_par_err"}, 86 {RDC_STAT_RBR_PRE_EMTY, KSTAT_DATA_ULONG, "rdc_rbr_pre_empty"}, 87 {RDC_STAT_RCR_SHADOW_FULL, KSTAT_DATA_ULONG, "rdc_rcr_shadow_full"}, 88 {RDC_STAT_RBR_TMOUT, KSTAT_DATA_ULONG, "rdc_rbr_tmout"}, 89 {RDC_STAT_PEU_RESP_ERR, KSTAT_DATA_ULONG, "peu_resp_err"}, 90 {RDC_STAT_CTRL_FIFO_ECC_ERR, KSTAT_DATA_ULONG, "ctrl_fifo_ecc_err"}, 91 {RDC_STAT_DATA_FIFO_ECC_ERR, KSTAT_DATA_ULONG, "data_fifo_ecc_err"}, 92 {RDC_STAT_RCRFULL, KSTAT_DATA_ULONG, "rdc_rcrfull"}, 93 {RDC_STAT_RBR_EMPTY, KSTAT_DATA_ULONG, "rdc_rbr_empty"}, 94 {RDC_STAT_RBR_FULL, KSTAT_DATA_ULONG, "rdc_rbrfull"}, 95 {RDC_STAT_RCRTO, KSTAT_DATA_ULONG, "rdc_rcrto"}, 96 {RDC_STAT_RCRTHRES, KSTAT_DATA_ULONG, "rdc_rcrthres"}, 97 {RDC_STAT_END, NULL, NULL} 98 }; 99 100 typedef enum { 101 RDC_SYS_STAT_CTRL_FIFO_SEC = 0, 102 RDC_SYS_STAT_CTRL_FIFO_DED, 103 RDC_SYS_STAT_DATA_FIFO_SEC, 104 RDC_SYS_STAT_DATA_FIFO_DED, 105 RDC_SYS_STAT_END 106 } hxge_rdc_sys_stat_idx_t; 107 108 hxge_kstat_index_t hxge_rdc_sys_stats[] = { 109 {RDC_SYS_STAT_CTRL_FIFO_SEC, KSTAT_DATA_UINT64, "rdc_ctrl_fifo_sec"}, 110 {RDC_SYS_STAT_CTRL_FIFO_DED, KSTAT_DATA_UINT64, "rdc_ctrl_fifo_ded"}, 111 {RDC_SYS_STAT_DATA_FIFO_SEC, KSTAT_DATA_UINT64, "rdc_data_fifo_sec"}, 112 {RDC_SYS_STAT_DATA_FIFO_DED, KSTAT_DATA_UINT64, "tdc_data_fifo_ded"}, 113 {RDC_SYS_STAT_END, NULL, NULL} 114 }; 115 116 typedef enum { 117 TDC_STAT_PACKETS = 0, 118 TDC_STAT_BYTES, 119 TDC_STAT_BYTES_WITH_PAD, 120 TDC_STAT_ERRORS, 121 TDC_STAT_TX_INITS, 122 TDC_STAT_TX_NO_BUF, 123 TDC_STAT_PEU_RESP_ERR, 124 TDC_STAT_PKT_SIZE_ERR, 125 TDC_STAT_TX_RNG_OFLOW, 126 TDC_STAT_PKT_SIZE_HDR_ERR, 127 TDC_STAT_RUNT_PKT_DROP_ERR, 128 TDC_STAT_PREF_PAR_ERR, 129 TDC_STAT_TDR_PREF_CPL_TO, 130 TDC_STAT_PKT_CPL_TO, 131 TDC_STAT_INVALID_SOP, 132 TDC_STAT_UNEXPECTED_SOP, 133 TDC_STAT_COUNT_HDR_SIZE_ERR, 134 TDC_STAT_COUNT_RUNT, 135 TDC_STAT_COUNT_ABORT, 136 TDC_STAT_TX_STARTS, 137 TDC_STAT_TX_NO_DESC, 138 TDC_STAT_TX_DMA_BIND_FAIL, 139 TDC_STAT_TX_HDR_PKTS, 140 TDC_STAT_TX_DDI_PKTS, 141 TDC_STAT_TX_JUMBO_PKTS, 142 TDC_STAT_TX_MAX_PEND, 143 TDC_STAT_TX_MARKS, 144 TDC_STAT_END 145 } hxge_tdc_stats_index_t; 146 147 hxge_kstat_index_t hxge_tdc_stats[] = { 148 {TDC_STAT_PACKETS, KSTAT_DATA_UINT64, "tdc_packets"}, 149 {TDC_STAT_BYTES, KSTAT_DATA_UINT64, "tdc_bytes"}, 150 {TDC_STAT_BYTES_WITH_PAD, KSTAT_DATA_UINT64, "tdc_bytes_with_pad"}, 151 {TDC_STAT_ERRORS, KSTAT_DATA_UINT64, "tdc_errors"}, 152 {TDC_STAT_TX_INITS, KSTAT_DATA_ULONG, "tdc_tx_inits"}, 153 {TDC_STAT_TX_NO_BUF, KSTAT_DATA_ULONG, "tdc_tx_no_buf"}, 154 155 {TDC_STAT_PEU_RESP_ERR, KSTAT_DATA_ULONG, "tdc_peu_resp_err"}, 156 {TDC_STAT_PKT_SIZE_ERR, KSTAT_DATA_ULONG, "tdc_pkt_size_err"}, 157 {TDC_STAT_TX_RNG_OFLOW, KSTAT_DATA_ULONG, "tdc_tx_rng_oflow"}, 158 {TDC_STAT_PKT_SIZE_HDR_ERR, KSTAT_DATA_ULONG, "tdc_pkt_size_hdr_err"}, 159 {TDC_STAT_RUNT_PKT_DROP_ERR, KSTAT_DATA_ULONG, "tdc_runt_pkt_drop_err"}, 160 {TDC_STAT_PREF_PAR_ERR, KSTAT_DATA_ULONG, "tdc_pref_par_err"}, 161 {TDC_STAT_TDR_PREF_CPL_TO, KSTAT_DATA_ULONG, "tdc_tdr_pref_cpl_to"}, 162 {TDC_STAT_PKT_CPL_TO, KSTAT_DATA_ULONG, "tdc_pkt_cpl_to"}, 163 {TDC_STAT_INVALID_SOP, KSTAT_DATA_ULONG, "tdc_invalid_sop"}, 164 {TDC_STAT_UNEXPECTED_SOP, KSTAT_DATA_ULONG, "tdc_unexpected_sop"}, 165 166 {TDC_STAT_COUNT_HDR_SIZE_ERR, KSTAT_DATA_ULONG, 167 "tdc_count_hdr_size_err"}, 168 {TDC_STAT_COUNT_RUNT, KSTAT_DATA_ULONG, "tdc_count_runt"}, 169 {TDC_STAT_COUNT_ABORT, KSTAT_DATA_ULONG, "tdc_count_abort"}, 170 171 {TDC_STAT_TX_STARTS, KSTAT_DATA_ULONG, "tdc_tx_starts"}, 172 {TDC_STAT_TX_NO_DESC, KSTAT_DATA_ULONG, "tdc_tx_no_desc"}, 173 {TDC_STAT_TX_DMA_BIND_FAIL, KSTAT_DATA_ULONG, "tdc_tx_dma_bind_fail"}, 174 {TDC_STAT_TX_HDR_PKTS, KSTAT_DATA_ULONG, "tdc_tx_hdr_pkts"}, 175 {TDC_STAT_TX_DDI_PKTS, KSTAT_DATA_ULONG, "tdc_tx_ddi_pkts"}, 176 {TDC_STAT_TX_JUMBO_PKTS, KSTAT_DATA_ULONG, "tdc_tx_jumbo_pkts"}, 177 {TDC_STAT_TX_MAX_PEND, KSTAT_DATA_ULONG, "tdc_tx_max_pend"}, 178 {TDC_STAT_TX_MARKS, KSTAT_DATA_ULONG, "tdc_tx_marks"}, 179 {TDC_STAT_END, NULL, NULL} 180 }; 181 182 typedef enum { 183 REORD_TBL_PAR_ERR = 0, 184 REORD_BUF_DED_ERR, 185 REORD_BUF_SEC_ERR, 186 TDC_SYS_STAT_END 187 } hxge_tdc_sys_stat_idx_t; 188 189 hxge_kstat_index_t hxge_tdc_sys_stats[] = { 190 {REORD_TBL_PAR_ERR, KSTAT_DATA_UINT64, "reord_tbl_par_err"}, 191 {REORD_BUF_DED_ERR, KSTAT_DATA_UINT64, "reord_buf_ded_err"}, 192 {REORD_BUF_SEC_ERR, KSTAT_DATA_UINT64, "reord_buf_sec_err"}, 193 {TDC_SYS_STAT_END, NULL, NULL} 194 }; 195 196 typedef enum { 197 VMAC_STAT_TX_FRAME_CNT, /* vmac_tx_frame_cnt_t */ 198 VMAC_STAT_TX_BYTE_CNT, /* vmac_tx_byte_cnt_t */ 199 200 VMAC_STAT_RX_FRAME_CNT, /* vmac_rx_frame_cnt_t */ 201 VMAC_STAT_RX_BYTE_CNT, /* vmac_rx_byte_cnt_t */ 202 VMAC_STAT_RX_DROP_FRAME_CNT, /* vmac_rx_drop_fr_cnt_t */ 203 VMAC_STAT_RX_DROP_BYTE_CNT, /* vmac_rx_drop_byte_cnt_t */ 204 VMAC_STAT_RX_CRC_CNT, /* vmac_rx_crc_cnt_t */ 205 VMAC_STAT_RX_PAUSE_CNT, /* vmac_rx_pause_cnt_t */ 206 VMAC_STAT_RX_BCAST_FR_CNT, /* vmac_rx_bcast_fr_cnt_t */ 207 VMAC_STAT_RX_MCAST_FR_CNT, /* vmac_rx_mcast_fr_cnt_t */ 208 VMAC_STAT_END 209 } hxge_vmac_stat_index_t; 210 211 hxge_kstat_index_t hxge_vmac_stats[] = { 212 {VMAC_STAT_TX_FRAME_CNT, KSTAT_DATA_UINT64, "vmac_tx_frame_cnt"}, 213 {VMAC_STAT_TX_BYTE_CNT, KSTAT_DATA_UINT64, "vmac_tx_byte_cnt"}, 214 215 {VMAC_STAT_RX_FRAME_CNT, KSTAT_DATA_UINT64, "vmac_rx_frame_cnt"}, 216 {VMAC_STAT_RX_BYTE_CNT, KSTAT_DATA_UINT64, "vmac_rx_byte_cnt"}, 217 {VMAC_STAT_RX_DROP_FRAME_CNT, KSTAT_DATA_UINT64, 218 "vmac_rx_drop_frame_cnt"}, 219 {VMAC_STAT_RX_DROP_BYTE_CNT, KSTAT_DATA_UINT64, 220 "vmac_rx_drop_byte_cnt"}, 221 {VMAC_STAT_RX_CRC_CNT, KSTAT_DATA_UINT64, "vmac_rx_crc_cnt"}, 222 {VMAC_STAT_RX_PAUSE_CNT, KSTAT_DATA_UINT64, "vmac_rx_pause_cnt"}, 223 {VMAC_STAT_RX_BCAST_FR_CNT, KSTAT_DATA_UINT64, "vmac_rx_bcast_fr_cnt"}, 224 {VMAC_STAT_RX_MCAST_FR_CNT, KSTAT_DATA_UINT64, "vmac_rx_mcast_fr_cnt"}, 225 {VMAC_STAT_END, NULL, NULL} 226 }; 227 228 typedef enum { 229 PFC_STAT_PKT_DROP, 230 PFC_STAT_TCAM_PARITY_ERR, 231 PFC_STAT_VLAN_PARITY_ERR, 232 PFC_STAT_BAD_CS_COUNT, 233 PFC_STAT_DROP_COUNT, 234 PFC_STAT_TCP_CTRL_DROP, 235 PFC_STAT_L2_ADDR_DROP, 236 PFC_STAT_CLASS_CODE_DROP, 237 PFC_STAT_TCAM_DROP, 238 PFC_STAT_VLAN_DROP, 239 PFC_STAT_END 240 } hxge_pfc_stat_index_t; 241 242 hxge_kstat_index_t hxge_pfc_stats[] = { 243 {PFC_STAT_PKT_DROP, KSTAT_DATA_ULONG, "pfc_pkt_drop"}, 244 {PFC_STAT_TCAM_PARITY_ERR, KSTAT_DATA_ULONG, "pfc_tcam_parity_err"}, 245 {PFC_STAT_VLAN_PARITY_ERR, KSTAT_DATA_ULONG, "pfc_vlan_parity_err"}, 246 {PFC_STAT_BAD_CS_COUNT, KSTAT_DATA_ULONG, "pfc_bad_cs_count"}, 247 {PFC_STAT_DROP_COUNT, KSTAT_DATA_ULONG, "pfc_drop_count"}, 248 {PFC_STAT_TCP_CTRL_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_tcp_ctrl"}, 249 {PFC_STAT_L2_ADDR_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_l2_addr"}, 250 {PFC_STAT_CLASS_CODE_DROP, KSTAT_DATA_ULONG, 251 " pfc_pkt_drop_class_code"}, 252 {PFC_STAT_TCAM_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_tcam"}, 253 {PFC_STAT_VLAN_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_vlan"}, 254 {PFC_STAT_END, NULL, NULL} 255 }; 256 257 typedef enum { 258 MMAC_MAX_ADDR, 259 MMAC_AVAIL_ADDR, 260 MMAC_ADDR_POOL1, 261 MMAC_ADDR_POOL2, 262 MMAC_ADDR_POOL3, 263 MMAC_ADDR_POOL4, 264 MMAC_ADDR_POOL5, 265 MMAC_ADDR_POOL6, 266 MMAC_ADDR_POOL7, 267 MMAC_ADDR_POOL8, 268 MMAC_ADDR_POOL9, 269 MMAC_ADDR_POOL10, 270 MMAC_ADDR_POOL11, 271 MMAC_ADDR_POOL12, 272 MMAC_ADDR_POOL13, 273 MMAC_ADDR_POOL14, 274 MMAC_ADDR_POOL15, 275 MMAC_ADDR_POOL16, 276 MMAC_STATS_END 277 } hxge_mmac_stat_index_t; 278 279 hxge_kstat_index_t hxge_mmac_stats[] = { 280 {MMAC_MAX_ADDR, KSTAT_DATA_UINT64, "max_mmac_addr"}, 281 {MMAC_AVAIL_ADDR, KSTAT_DATA_UINT64, "avail_mmac_addr"}, 282 {MMAC_ADDR_POOL1, KSTAT_DATA_UINT64, "mmac_addr_1"}, 283 {MMAC_ADDR_POOL2, KSTAT_DATA_UINT64, "mmac_addr_2"}, 284 {MMAC_ADDR_POOL3, KSTAT_DATA_UINT64, "mmac_addr_3"}, 285 {MMAC_ADDR_POOL4, KSTAT_DATA_UINT64, "mmac_addr_4"}, 286 {MMAC_ADDR_POOL5, KSTAT_DATA_UINT64, "mmac_addr_5"}, 287 {MMAC_ADDR_POOL6, KSTAT_DATA_UINT64, "mmac_addr_6"}, 288 {MMAC_ADDR_POOL7, KSTAT_DATA_UINT64, "mmac_addr_7"}, 289 {MMAC_ADDR_POOL8, KSTAT_DATA_UINT64, "mmac_addr_8"}, 290 {MMAC_ADDR_POOL9, KSTAT_DATA_UINT64, "mmac_addr_9"}, 291 {MMAC_ADDR_POOL10, KSTAT_DATA_UINT64, "mmac_addr_10"}, 292 {MMAC_ADDR_POOL11, KSTAT_DATA_UINT64, "mmac_addr_11"}, 293 {MMAC_ADDR_POOL12, KSTAT_DATA_UINT64, "mmac_addr_12"}, 294 {MMAC_ADDR_POOL13, KSTAT_DATA_UINT64, "mmac_addr_13"}, 295 {MMAC_ADDR_POOL14, KSTAT_DATA_UINT64, "mmac_addr_14"}, 296 {MMAC_ADDR_POOL15, KSTAT_DATA_UINT64, "mmac_addr_15"}, 297 {MMAC_ADDR_POOL16, KSTAT_DATA_UINT64, "mmac_addr_16"}, 298 {MMAC_STATS_END, NULL, NULL}, 299 }; 300 301 typedef enum { 302 SPC_ACC_ERR = 0, 303 TDC_PIOACC_ERR, 304 RDC_PIOACC_ERR, 305 PFC_PIOACC_ERR, 306 VMAC_PIOACC_ERR, 307 CPL_HDRQ_PARERR, 308 CPL_DATAQ_PARERR, 309 RETRYRAM_XDLH_PARERR, 310 RETRYSOTRAM_XDLH_PARERR, 311 P_HDRQ_PARERR, 312 P_DATAQ_PARERR, 313 NP_HDRQ_PARERR, 314 NP_DATAQ_PARERR, 315 EIC_MSIX_PARERR, 316 HCR_PARERR, 317 PEU_SYS_STAT_END 318 } hxge_peu_sys_stat_idx_t; 319 320 hxge_kstat_index_t hxge_peu_sys_stats[] = { 321 {SPC_ACC_ERR, KSTAT_DATA_UINT64, "spc_acc_err"}, 322 {TDC_PIOACC_ERR, KSTAT_DATA_UINT64, "tdc_pioacc_err"}, 323 {RDC_PIOACC_ERR, KSTAT_DATA_UINT64, "rdc_pioacc_err"}, 324 {PFC_PIOACC_ERR, KSTAT_DATA_UINT64, "pfc_pioacc_err"}, 325 {VMAC_PIOACC_ERR, KSTAT_DATA_UINT64, "vmac_pioacc_err"}, 326 {CPL_HDRQ_PARERR, KSTAT_DATA_UINT64, "cpl_hdrq_parerr"}, 327 {CPL_DATAQ_PARERR, KSTAT_DATA_UINT64, "cpl_dataq_parerr"}, 328 {RETRYRAM_XDLH_PARERR, KSTAT_DATA_UINT64, "retryram_xdlh_parerr"}, 329 {RETRYSOTRAM_XDLH_PARERR, KSTAT_DATA_UINT64, "retrysotram_xdlh_parerr"}, 330 {P_HDRQ_PARERR, KSTAT_DATA_UINT64, "p_hdrq_parerr"}, 331 {P_DATAQ_PARERR, KSTAT_DATA_UINT64, "p_dataq_parerr"}, 332 {NP_HDRQ_PARERR, KSTAT_DATA_UINT64, "np_hdrq_parerr"}, 333 {NP_DATAQ_PARERR, KSTAT_DATA_UINT64, "np_dataq_parerr"}, 334 {EIC_MSIX_PARERR, KSTAT_DATA_UINT64, "eic_msix_parerr"}, 335 {HCR_PARERR, KSTAT_DATA_UINT64, "hcr_parerr"}, 336 {TDC_SYS_STAT_END, NULL, NULL} 337 }; 338 339 /* ARGSUSED */ 340 int 341 hxge_tdc_stat_update(kstat_t *ksp, int rw) 342 { 343 p_hxge_t hxgep; 344 p_hxge_tdc_kstat_t tdc_kstatsp; 345 p_hxge_tx_ring_stats_t statsp; 346 int channel; 347 char *ch_name, *end; 348 349 hxgep = (p_hxge_t)ksp->ks_private; 350 if (hxgep == NULL) 351 return (-1); 352 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_rxstat_update")); 353 354 ch_name = ksp->ks_name; 355 ch_name += strlen(TDC_NAME_FORMAT1); 356 channel = mi_strtol(ch_name, &end, 10); 357 358 tdc_kstatsp = (p_hxge_tdc_kstat_t)ksp->ks_data; 359 statsp = (p_hxge_tx_ring_stats_t)&hxgep->statsp->tdc_stats[channel]; 360 361 HXGE_DEBUG_MSG((hxgep, KST_CTL, 362 "hxge_tdc_stat_update data $%p statsp $%p channel %d", 363 ksp->ks_data, statsp, channel)); 364 365 tdc_kstatsp->opackets.value.ull = statsp->opackets; 366 tdc_kstatsp->obytes.value.ull = statsp->obytes; 367 tdc_kstatsp->obytes_with_pad.value.ull = statsp->obytes_with_pad; 368 tdc_kstatsp->oerrors.value.ull = statsp->oerrors; 369 tdc_kstatsp->tx_hdr_pkts.value.ull = statsp->tx_hdr_pkts; 370 tdc_kstatsp->tx_ddi_pkts.value.ull = statsp->tx_ddi_pkts; 371 tdc_kstatsp->tx_jumbo_pkts.value.ull = statsp->tx_jumbo_pkts; 372 tdc_kstatsp->tx_max_pend.value.ull = statsp->tx_max_pend; 373 tdc_kstatsp->peu_resp_err.value.ul = statsp->peu_resp_err; 374 tdc_kstatsp->pkt_size_err.value.ul = statsp->pkt_size_err; 375 tdc_kstatsp->tx_rng_oflow.value.ul = statsp->tx_rng_oflow; 376 tdc_kstatsp->pkt_size_hdr_err.value.ul = statsp->pkt_size_hdr_err; 377 tdc_kstatsp->runt_pkt_drop_err.value.ul = statsp->runt_pkt_drop_err; 378 tdc_kstatsp->pref_par_err.value.ul = statsp->pref_par_err; 379 tdc_kstatsp->tdr_pref_cpl_to.value.ul = statsp->tdr_pref_cpl_to; 380 tdc_kstatsp->pkt_cpl_to.value.ul = statsp->pkt_cpl_to; 381 tdc_kstatsp->invalid_sop.value.ul = statsp->invalid_sop; 382 tdc_kstatsp->unexpected_sop.value.ul = statsp->unexpected_sop; 383 tdc_kstatsp->tx_starts.value.ul = statsp->tx_starts; 384 tdc_kstatsp->tx_no_desc.value.ul = statsp->tx_no_desc; 385 tdc_kstatsp->tx_dma_bind_fail.value.ul = statsp->tx_dma_bind_fail; 386 387 tdc_kstatsp->count_hdr_size_err.value.ul = 388 statsp->count_hdr_size_err; 389 tdc_kstatsp->count_runt.value.ul = statsp->count_runt; 390 tdc_kstatsp->count_abort.value.ul = statsp->count_abort; 391 tdc_kstatsp->tx_marks.value.ul = statsp->tx_marks; 392 393 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_tdc_stat_update")); 394 return (0); 395 } 396 397 /* ARGSUSED */ 398 int 399 hxge_tdc_sys_stat_update(kstat_t *ksp, int rw) 400 { 401 p_hxge_t hxgep; 402 p_hxge_tdc_sys_kstat_t tdc_sys_kstatsp; 403 p_hxge_tdc_sys_stats_t statsp; 404 405 hxgep = (p_hxge_t)ksp->ks_private; 406 if (hxgep == NULL) 407 return (-1); 408 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_tdc_sys_stat_update")); 409 410 tdc_sys_kstatsp = (p_hxge_tdc_sys_kstat_t)ksp->ks_data; 411 statsp = (p_hxge_tdc_sys_stats_t)&hxgep->statsp->tdc_sys_stats; 412 413 HXGE_DEBUG_MSG((hxgep, KST_CTL, "hxge_tdc_sys_stat_update %llx", 414 ksp->ks_data)); 415 416 tdc_sys_kstatsp->reord_tbl_par_err.value.ul = 417 statsp->reord_tbl_par_err; 418 tdc_sys_kstatsp->reord_buf_ded_err.value.ul = 419 statsp->reord_buf_ded_err; 420 tdc_sys_kstatsp->reord_buf_sec_err.value.ul = 421 statsp->reord_buf_sec_err; 422 423 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_tdc_sys_stat_update")); 424 return (0); 425 } 426 427 /* ARGSUSED */ 428 int 429 hxge_rdc_stat_update(kstat_t *ksp, int rw) 430 { 431 p_hxge_t hxgep; 432 p_hxge_rdc_kstat_t rdc_kstatsp; 433 p_hxge_rx_ring_stats_t statsp; 434 int channel; 435 char *ch_name, *end; 436 437 hxgep = (p_hxge_t)ksp->ks_private; 438 if (hxgep == NULL) 439 return (-1); 440 441 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_rdc_stat_update")); 442 443 ch_name = ksp->ks_name; 444 ch_name += strlen(RDC_NAME_FORMAT1); 445 channel = mi_strtol(ch_name, &end, 10); 446 447 rdc_kstatsp = (p_hxge_rdc_kstat_t)ksp->ks_data; 448 statsp = (p_hxge_rx_ring_stats_t)&hxgep->statsp->rdc_stats[channel]; 449 450 HXGE_DEBUG_MSG((hxgep, KST_CTL, 451 "hxge_rdc_stat_update $%p statsp $%p channel %d", 452 ksp->ks_data, statsp, channel)); 453 454 rdc_kstatsp->ipackets.value.ull = statsp->ipackets; 455 rdc_kstatsp->rbytes.value.ull = statsp->ibytes; 456 rdc_kstatsp->jumbo_pkts.value.ul = statsp->jumbo_pkts; 457 rdc_kstatsp->rcr_unknown_err.value.ul = statsp->rcr_unknown_err; 458 rdc_kstatsp->errors.value.ul = statsp->ierrors; 459 rdc_kstatsp->rcr_sha_par_err.value.ul = statsp->rcr_sha_par; 460 rdc_kstatsp->rbr_pre_par_err.value.ul = statsp->rbr_pre_par; 461 rdc_kstatsp->rbr_pre_emty.value.ul = statsp->rbr_pre_empty; 462 rdc_kstatsp->rcr_shadow_full.value.ul = statsp->rcr_shadow_full; 463 rdc_kstatsp->rbr_tmout.value.ul = statsp->rbr_tmout; 464 rdc_kstatsp->peu_resp_err.value.ul = statsp->peu_resp_err; 465 rdc_kstatsp->ctrl_fifo_ecc_err.value.ul = statsp->ctrl_fifo_ecc_err; 466 rdc_kstatsp->data_fifo_ecc_err.value.ul = statsp->data_fifo_ecc_err; 467 rdc_kstatsp->rcrfull.value.ul = statsp->rcrfull; 468 rdc_kstatsp->rbr_empty.value.ul = statsp->rbr_empty; 469 rdc_kstatsp->rbrfull.value.ul = statsp->rbrfull; 470 rdc_kstatsp->rcr_to.value.ul = statsp->rcr_to; 471 rdc_kstatsp->rcr_thresh.value.ul = statsp->rcr_thres; 472 473 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_rdc_stat_update")); 474 return (0); 475 } 476 477 /* ARGSUSED */ 478 int 479 hxge_rdc_sys_stat_update(kstat_t *ksp, int rw) 480 { 481 p_hxge_t hxgep; 482 p_hxge_rdc_sys_kstat_t rdc_sys_kstatsp; 483 p_hxge_rdc_sys_stats_t statsp; 484 485 hxgep = (p_hxge_t)ksp->ks_private; 486 if (hxgep == NULL) 487 return (-1); 488 489 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_rdc_sys_stat_update")); 490 491 rdc_sys_kstatsp = (p_hxge_rdc_sys_kstat_t)ksp->ks_data; 492 statsp = (p_hxge_rdc_sys_stats_t)&hxgep->statsp->rdc_sys_stats; 493 494 HXGE_DEBUG_MSG((hxgep, KST_CTL, "hxge_rdc_sys_stat_update %llx", 495 ksp->ks_data)); 496 497 rdc_sys_kstatsp->ctrl_fifo_sec.value.ul = statsp->ctrl_fifo_sec; 498 rdc_sys_kstatsp->ctrl_fifo_ded.value.ul = statsp->ctrl_fifo_ded; 499 rdc_sys_kstatsp->data_fifo_sec.value.ul = statsp->data_fifo_sec; 500 rdc_sys_kstatsp->data_fifo_ded.value.ul = statsp->data_fifo_ded; 501 502 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_rdc_sys_stat_update")); 503 return (0); 504 } 505 506 /* ARGSUSED */ 507 int 508 hxge_vmac_stat_update(kstat_t *ksp, int rw) 509 { 510 p_hxge_t hxgep; 511 p_hxge_vmac_kstat_t vmac_kstatsp; 512 p_hxge_vmac_stats_t statsp; 513 514 hxgep = (p_hxge_t)ksp->ks_private; 515 if (hxgep == NULL) 516 return (-1); 517 518 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_vmac_stat_update")); 519 520 hxge_save_cntrs(hxgep); 521 522 vmac_kstatsp = (p_hxge_vmac_kstat_t)ksp->ks_data; 523 statsp = (p_hxge_vmac_stats_t)&hxgep->statsp->vmac_stats; 524 525 vmac_kstatsp->tx_frame_cnt.value.ul = statsp->tx_frame_cnt; 526 vmac_kstatsp->tx_byte_cnt.value.ul = statsp->tx_byte_cnt; 527 528 vmac_kstatsp->rx_frame_cnt.value.ul = statsp->rx_frame_cnt; 529 vmac_kstatsp->rx_byte_cnt.value.ul = statsp->rx_byte_cnt; 530 vmac_kstatsp->rx_drop_frame_cnt.value.ul = statsp->rx_drop_frame_cnt; 531 vmac_kstatsp->rx_drop_byte_cnt.value.ul = statsp->rx_drop_byte_cnt; 532 vmac_kstatsp->rx_crc_cnt.value.ul = statsp->rx_crc_cnt; 533 vmac_kstatsp->rx_pause_cnt.value.ul = statsp->rx_pause_cnt; 534 vmac_kstatsp->rx_bcast_fr_cnt.value.ul = statsp->rx_bcast_fr_cnt; 535 vmac_kstatsp->rx_mcast_fr_cnt.value.ul = statsp->rx_mcast_fr_cnt; 536 537 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_vmac_stat_update")); 538 return (0); 539 } 540 541 /* ARGSUSED */ 542 int 543 hxge_pfc_stat_update(kstat_t *ksp, int rw) 544 { 545 p_hxge_t hxgep; 546 p_hxge_pfc_kstat_t kstatsp; 547 p_hxge_pfc_stats_t statsp; 548 549 hxgep = (p_hxge_t)ksp->ks_private; 550 if (hxgep == NULL) 551 return (-1); 552 553 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_pfc_stat_update")); 554 555 kstatsp = (p_hxge_pfc_kstat_t)ksp->ks_data; 556 statsp = (p_hxge_pfc_stats_t)&hxgep->statsp->pfc_stats; 557 558 kstatsp->pfc_pkt_drop.value.ul = statsp->pkt_drop; 559 kstatsp->pfc_tcam_parity_err.value.ul = statsp->tcam_parity_err; 560 kstatsp->pfc_vlan_parity_err.value.ul = statsp->vlan_parity_err; 561 kstatsp->pfc_bad_cs_count.value.ul = statsp->bad_cs_count; 562 kstatsp->pfc_drop_count.value.ul = statsp->drop_count; 563 kstatsp->pfc_tcp_ctrl_drop.value.ul = statsp->errlog.tcp_ctrl_drop; 564 kstatsp->pfc_l2_addr_drop.value.ul = statsp->errlog.l2_addr_drop; 565 kstatsp->pfc_class_code_drop.value.ul = statsp->errlog.class_code_drop; 566 kstatsp->pfc_tcam_drop.value.ul = statsp->errlog.tcam_drop; 567 kstatsp->pfc_vlan_drop.value.ul = statsp->errlog.vlan_drop; 568 569 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_pfc_stat_update")); 570 return (0); 571 } 572 573 static uint64_t 574 hxge_mac_octet_to_u64(struct ether_addr addr) 575 { 576 int i; 577 uint64_t addr64 = 0; 578 579 for (i = ETHERADDRL - 1; i >= 0; i--) { 580 addr64 <<= 8; 581 addr64 |= addr.ether_addr_octet[i]; 582 } 583 return (addr64); 584 } 585 586 /* ARGSUSED */ 587 int 588 hxge_mmac_stat_update(kstat_t *ksp, int rw) 589 { 590 p_hxge_t hxgep; 591 p_hxge_mmac_kstat_t mmac_kstatsp; 592 p_hxge_mmac_stats_t statsp; 593 594 hxgep = (p_hxge_t)ksp->ks_private; 595 if (hxgep == NULL) 596 return (-1); 597 598 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_mmac_stat_update")); 599 600 mmac_kstatsp = (p_hxge_mmac_kstat_t)ksp->ks_data; 601 statsp = (p_hxge_mmac_stats_t)&hxgep->statsp->mmac_stats; 602 603 mmac_kstatsp->mmac_max_addr_cnt.value.ul = statsp->mmac_max_cnt; 604 mmac_kstatsp->mmac_avail_addr_cnt.value.ul = statsp->mmac_avail_cnt; 605 mmac_kstatsp->mmac_addr1.value.ul = 606 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[0]); 607 mmac_kstatsp->mmac_addr2.value.ul = 608 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[1]); 609 mmac_kstatsp->mmac_addr3.value.ul = 610 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[2]); 611 mmac_kstatsp->mmac_addr4.value.ul = 612 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[3]); 613 mmac_kstatsp->mmac_addr5.value.ul = 614 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[4]); 615 mmac_kstatsp->mmac_addr6.value.ul = 616 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[5]); 617 mmac_kstatsp->mmac_addr7.value.ul = 618 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[6]); 619 mmac_kstatsp->mmac_addr8.value.ul = 620 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[7]); 621 mmac_kstatsp->mmac_addr9.value.ul = 622 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[8]); 623 mmac_kstatsp->mmac_addr10.value.ul = 624 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[9]); 625 mmac_kstatsp->mmac_addr11.value.ul = 626 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[10]); 627 mmac_kstatsp->mmac_addr12.value.ul = 628 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[11]); 629 mmac_kstatsp->mmac_addr13.value.ul = 630 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[12]); 631 mmac_kstatsp->mmac_addr14.value.ul = 632 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[13]); 633 mmac_kstatsp->mmac_addr15.value.ul = 634 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[14]); 635 mmac_kstatsp->mmac_addr16.value.ul = 636 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[15]); 637 638 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_mmac_stat_update")); 639 return (0); 640 } 641 642 /* ARGSUSED */ 643 int 644 hxge_peu_sys_stat_update(kstat_t *ksp, int rw) 645 { 646 p_hxge_t hxgep; 647 p_hxge_peu_sys_kstat_t peu_kstatsp; 648 p_hxge_peu_sys_stats_t statsp; 649 650 hxgep = (p_hxge_t)ksp->ks_private; 651 if (hxgep == NULL) 652 return (-1); 653 654 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_peu_sys_stat_update")); 655 656 peu_kstatsp = (p_hxge_peu_sys_kstat_t)ksp->ks_data; 657 statsp = (p_hxge_peu_sys_stats_t)&hxgep->statsp->peu_sys_stats; 658 659 peu_kstatsp->spc_acc_err.value.ul = statsp->spc_acc_err; 660 peu_kstatsp->tdc_pioacc_err.value.ul = statsp->tdc_pioacc_err; 661 peu_kstatsp->rdc_pioacc_err.value.ul = statsp->rdc_pioacc_err; 662 peu_kstatsp->pfc_pioacc_err.value.ul = statsp->pfc_pioacc_err; 663 peu_kstatsp->vmac_pioacc_err.value.ul = statsp->vmac_pioacc_err; 664 peu_kstatsp->cpl_hdrq_parerr.value.ul = statsp->cpl_hdrq_parerr; 665 peu_kstatsp->cpl_dataq_parerr.value.ul = statsp->cpl_dataq_parerr; 666 peu_kstatsp->retryram_xdlh_parerr.value.ul = 667 statsp->retryram_xdlh_parerr; 668 peu_kstatsp->retrysotram_xdlh_parerr.value.ul = 669 statsp->retrysotram_xdlh_parerr; 670 peu_kstatsp->p_hdrq_parerr.value.ul = statsp->p_hdrq_parerr; 671 peu_kstatsp->p_dataq_parerr.value.ul = statsp->p_dataq_parerr; 672 peu_kstatsp->np_hdrq_parerr.value.ul = statsp->np_hdrq_parerr; 673 peu_kstatsp->np_dataq_parerr.value.ul = statsp->np_dataq_parerr; 674 peu_kstatsp->eic_msix_parerr.value.ul = statsp->eic_msix_parerr; 675 peu_kstatsp->hcr_parerr.value.ul = statsp->hcr_parerr; 676 677 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_peu_sys_stat_update")); 678 return (0); 679 } 680 681 static kstat_t * 682 hxge_setup_local_kstat(p_hxge_t hxgep, int instance, char *name, 683 const hxge_kstat_index_t *ksip, size_t count, 684 int (*update) (kstat_t *, int)) 685 { 686 kstat_t *ksp; 687 kstat_named_t *knp; 688 int i; 689 690 ksp = kstat_create(HXGE_DRIVER_NAME, instance, name, "net", 691 KSTAT_TYPE_NAMED, count, 0); 692 if (ksp == NULL) 693 return (NULL); 694 695 ksp->ks_private = (void *) hxgep; 696 ksp->ks_update = update; 697 knp = ksp->ks_data; 698 699 for (i = 0; ksip[i].name != NULL; i++) { 700 kstat_named_init(&knp[i], ksip[i].name, ksip[i].type); 701 } 702 703 kstat_install(ksp); 704 705 return (ksp); 706 } 707 708 void 709 hxge_setup_kstats(p_hxge_t hxgep) 710 { 711 struct kstat *ksp; 712 p_hxge_port_kstat_t hxgekp; 713 size_t hxge_kstat_sz; 714 char stat_name[64]; 715 char mmac_name[64]; 716 int i; 717 718 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_setup_kstats")); 719 720 /* Setup RDC statistics */ 721 for (i = 0; i < hxgep->nrdc; i++) { 722 (void) sprintf(stat_name, "%s"CH_NAME_FORMAT, 723 RDC_NAME_FORMAT1, i); 724 hxgep->statsp->rdc_ksp[i] = hxge_setup_local_kstat(hxgep, 725 hxgep->instance, stat_name, &hxge_rdc_stats[0], 726 RDC_STAT_END, hxge_rdc_stat_update); 727 if (hxgep->statsp->rdc_ksp[i] == NULL) 728 cmn_err(CE_WARN, 729 "kstat_create failed for rdc channel %d", i); 730 } 731 732 /* Setup RDC System statistics */ 733 hxgep->statsp->rdc_sys_ksp = hxge_setup_local_kstat(hxgep, 734 hxgep->instance, "RDC_system", &hxge_rdc_sys_stats[0], 735 RDC_SYS_STAT_END, hxge_rdc_sys_stat_update); 736 if (hxgep->statsp->rdc_sys_ksp == NULL) 737 cmn_err(CE_WARN, "kstat_create failed for rdc_sys_ksp"); 738 739 /* Setup TDC statistics */ 740 for (i = 0; i < hxgep->ntdc; i++) { 741 (void) sprintf(stat_name, "%s"CH_NAME_FORMAT, 742 TDC_NAME_FORMAT1, i); 743 hxgep->statsp->tdc_ksp[i] = hxge_setup_local_kstat(hxgep, 744 hxgep->instance, stat_name, &hxge_tdc_stats[0], 745 TDC_STAT_END, hxge_tdc_stat_update); 746 if (hxgep->statsp->tdc_ksp[i] == NULL) 747 cmn_err(CE_WARN, 748 "kstat_create failed for tdc channel %d", i); 749 } 750 751 /* Setup TDC System statistics */ 752 hxgep->statsp->tdc_sys_ksp = hxge_setup_local_kstat(hxgep, 753 hxgep->instance, "TDC_system", &hxge_tdc_sys_stats[0], 754 RDC_SYS_STAT_END, hxge_tdc_sys_stat_update); 755 if (hxgep->statsp->tdc_sys_ksp == NULL) 756 cmn_err(CE_WARN, "kstat_create failed for tdc_sys_ksp"); 757 758 /* Setup PFC statistics */ 759 hxgep->statsp->pfc_ksp = hxge_setup_local_kstat(hxgep, 760 hxgep->instance, "PFC", &hxge_pfc_stats[0], 761 PFC_STAT_END, hxge_pfc_stat_update); 762 if (hxgep->statsp->pfc_ksp == NULL) 763 cmn_err(CE_WARN, "kstat_create failed for pfc"); 764 765 /* Setup VMAC statistics */ 766 hxgep->statsp->vmac_ksp = hxge_setup_local_kstat(hxgep, 767 hxgep->instance, "VMAC", &hxge_vmac_stats[0], 768 VMAC_STAT_END, hxge_vmac_stat_update); 769 if (hxgep->statsp->vmac_ksp == NULL) 770 cmn_err(CE_WARN, "kstat_create failed for vmac"); 771 772 /* Setup MMAC statistics */ 773 (void) sprintf(mmac_name, "MMAC Stats%d", hxgep->instance); 774 hxgep->statsp->mmac_ksp = hxge_setup_local_kstat(hxgep, 775 hxgep->instance, "MMAC", 776 &hxge_mmac_stats[0], MMAC_STATS_END, hxge_mmac_stat_update); 777 if (hxgep->statsp->mmac_ksp == NULL) 778 cmn_err(CE_WARN, "kstat_create failed for mmac"); 779 780 /* Setup PEU System statistics */ 781 hxgep->statsp->peu_sys_ksp = hxge_setup_local_kstat(hxgep, 782 hxgep->instance, "PEU", &hxge_peu_sys_stats[0], 783 PEU_SYS_STAT_END, hxge_peu_sys_stat_update); 784 if (hxgep->statsp->peu_sys_ksp == NULL) 785 cmn_err(CE_WARN, "kstat_create failed for peu sys"); 786 787 /* Port stats */ 788 hxge_kstat_sz = sizeof (hxge_port_kstat_t); 789 790 if ((ksp = kstat_create(HXGE_DRIVER_NAME, hxgep->instance, 791 "Port", "net", KSTAT_TYPE_NAMED, 792 hxge_kstat_sz / sizeof (kstat_named_t), 0)) == NULL) { 793 cmn_err(CE_WARN, "kstat_create failed for port stat"); 794 return; 795 } 796 797 hxgekp = (p_hxge_port_kstat_t)ksp->ks_data; 798 799 kstat_named_init(&hxgekp->cap_10gfdx, "cap_10gfdx", KSTAT_DATA_ULONG); 800 801 /* 802 * Link partner capabilities. 803 */ 804 kstat_named_init(&hxgekp->lp_cap_10gfdx, "lp_cap_10gfdx", 805 KSTAT_DATA_ULONG); 806 807 /* 808 * Shared link setup. 809 */ 810 kstat_named_init(&hxgekp->link_speed, "link_speed", KSTAT_DATA_ULONG); 811 kstat_named_init(&hxgekp->link_duplex, "link_duplex", KSTAT_DATA_CHAR); 812 kstat_named_init(&hxgekp->link_up, "link_up", KSTAT_DATA_ULONG); 813 814 /* 815 * Loopback statistics. 816 */ 817 kstat_named_init(&hxgekp->lb_mode, "lb_mode", KSTAT_DATA_ULONG); 818 819 /* General MAC statistics */ 820 821 kstat_named_init(&hxgekp->ifspeed, "ifspeed", KSTAT_DATA_UINT64); 822 kstat_named_init(&hxgekp->promisc, "promisc", KSTAT_DATA_CHAR); 823 824 ksp->ks_update = hxge_port_kstat_update; 825 ksp->ks_private = (void *) hxgep; 826 kstat_install(ksp); 827 hxgep->statsp->port_ksp = ksp; 828 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_setup_kstats")); 829 } 830 831 void 832 hxge_destroy_kstats(p_hxge_t hxgep) 833 { 834 int channel; 835 p_hxge_dma_pt_cfg_t p_dma_cfgp; 836 p_hxge_hw_pt_cfg_t p_cfgp; 837 838 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_destroy_kstats")); 839 if (hxgep->statsp == NULL) 840 return; 841 842 if (hxgep->statsp->ksp) 843 kstat_delete(hxgep->statsp->ksp); 844 845 p_dma_cfgp = (p_hxge_dma_pt_cfg_t)&hxgep->pt_config; 846 p_cfgp = (p_hxge_hw_pt_cfg_t)&p_dma_cfgp->hw_config; 847 848 for (channel = 0; channel < p_cfgp->max_rdcs; channel++) { 849 if (hxgep->statsp->rdc_ksp[channel]) { 850 kstat_delete(hxgep->statsp->rdc_ksp[channel]); 851 } 852 } 853 854 for (channel = 0; channel < p_cfgp->max_tdcs; channel++) { 855 if (hxgep->statsp->tdc_ksp[channel]) { 856 kstat_delete(hxgep->statsp->tdc_ksp[channel]); 857 } 858 } 859 860 if (hxgep->statsp->rdc_sys_ksp) 861 kstat_delete(hxgep->statsp->rdc_sys_ksp); 862 863 if (hxgep->statsp->tdc_sys_ksp) 864 kstat_delete(hxgep->statsp->tdc_sys_ksp); 865 866 if (hxgep->statsp->peu_sys_ksp) 867 kstat_delete(hxgep->statsp->peu_sys_ksp); 868 869 if (hxgep->statsp->mmac_ksp) 870 kstat_delete(hxgep->statsp->mmac_ksp); 871 872 if (hxgep->statsp->pfc_ksp) 873 kstat_delete(hxgep->statsp->pfc_ksp); 874 875 if (hxgep->statsp->vmac_ksp) 876 kstat_delete(hxgep->statsp->vmac_ksp); 877 878 if (hxgep->statsp->port_ksp) 879 kstat_delete(hxgep->statsp->port_ksp); 880 881 if (hxgep->statsp) 882 KMEM_FREE(hxgep->statsp, hxgep->statsp->stats_size); 883 884 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_destroy_kstats")); 885 } 886 887 /* ARGSUSED */ 888 int 889 hxge_port_kstat_update(kstat_t *ksp, int rw) 890 { 891 p_hxge_t hxgep; 892 p_hxge_stats_t statsp; 893 p_hxge_port_kstat_t hxgekp; 894 p_hxge_port_stats_t psp; 895 896 hxgep = (p_hxge_t)ksp->ks_private; 897 if (hxgep == NULL) 898 return (-1); 899 900 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_port_kstat_update")); 901 statsp = (p_hxge_stats_t)hxgep->statsp; 902 hxgekp = (p_hxge_port_kstat_t)ksp->ks_data; 903 psp = &statsp->port_stats; 904 905 if (hxgep->filter.all_phys_cnt) 906 (void) strcpy(hxgekp->promisc.value.c, "phys"); 907 else if (hxgep->filter.all_multicast_cnt) 908 (void) strcpy(hxgekp->promisc.value.c, "multi"); 909 else 910 (void) strcpy(hxgekp->promisc.value.c, "off"); 911 hxgekp->ifspeed.value.ul = statsp->mac_stats.link_speed * 1000000ULL; 912 913 /* 914 * transceiver state informations. 915 */ 916 hxgekp->cap_10gfdx.value.ul = statsp->mac_stats.cap_10gfdx; 917 918 /* 919 * Link partner capabilities. 920 */ 921 hxgekp->lp_cap_10gfdx.value.ul = statsp->mac_stats.lp_cap_10gfdx; 922 923 /* 924 * Physical link statistics. 925 */ 926 hxgekp->link_speed.value.ul = statsp->mac_stats.link_speed; 927 if (statsp->mac_stats.link_duplex == 2) 928 (void) strcpy(hxgekp->link_duplex.value.c, "full"); 929 else 930 (void) strcpy(hxgekp->link_duplex.value.c, "unknown"); 931 hxgekp->link_up.value.ul = statsp->mac_stats.link_up; 932 933 /* 934 * Loopback statistics. 935 */ 936 hxgekp->lb_mode.value.ul = psp->lb_mode; 937 938 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_port_kstat_update")); 939 return (0); 940 } 941 942 int 943 hxge_m_stat(void *arg, uint_t stat, uint64_t *value) 944 { 945 p_hxge_t hxgep = (p_hxge_t)arg; 946 p_hxge_stats_t statsp; 947 hxge_tx_ring_stats_t *tx_stats; 948 uint64_t val = 0; 949 int channel; 950 951 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_m_stat")); 952 statsp = (p_hxge_stats_t)hxgep->statsp; 953 954 switch (stat) { 955 case MAC_STAT_IFSPEED: 956 val = statsp->mac_stats.link_speed * 1000000ull; 957 break; 958 959 case MAC_STAT_MULTIRCV: 960 val = 0; 961 break; 962 963 case MAC_STAT_BRDCSTRCV: 964 val = 0; 965 break; 966 967 case MAC_STAT_MULTIXMT: 968 val = 0; 969 break; 970 971 case MAC_STAT_BRDCSTXMT: 972 val = 0; 973 break; 974 975 case MAC_STAT_NORCVBUF: 976 val = 0; 977 break; 978 979 case MAC_STAT_IERRORS: 980 case ETHER_STAT_MACRCV_ERRORS: 981 val = 0; 982 for (channel = 0; channel < hxgep->nrdc; channel++) { 983 val += statsp->rdc_stats[channel].ierrors; 984 } 985 break; 986 987 case MAC_STAT_NOXMTBUF: 988 val = 0; 989 break; 990 991 case MAC_STAT_OERRORS: 992 for (channel = 0; channel < hxgep->ntdc; channel++) { 993 val += statsp->tdc_stats[channel].oerrors; 994 } 995 break; 996 997 case MAC_STAT_COLLISIONS: 998 val = 0; 999 break; 1000 1001 case MAC_STAT_RBYTES: 1002 for (channel = 0; channel < hxgep->nrdc; channel++) { 1003 val += statsp->rdc_stats[channel].ibytes; 1004 } 1005 break; 1006 1007 case MAC_STAT_IPACKETS: 1008 for (channel = 0; channel < hxgep->nrdc; channel++) { 1009 val += statsp->rdc_stats[channel].ipackets; 1010 } 1011 break; 1012 1013 case MAC_STAT_OBYTES: 1014 for (channel = 0; channel < hxgep->ntdc; channel++) { 1015 val += statsp->tdc_stats[channel].obytes; 1016 } 1017 break; 1018 1019 case MAC_STAT_OPACKETS: 1020 for (channel = 0; channel < hxgep->ntdc; channel++) { 1021 val += statsp->tdc_stats[channel].opackets; 1022 } 1023 break; 1024 1025 case MAC_STAT_UNKNOWNS: 1026 val = 0; 1027 break; 1028 1029 case MAC_STAT_UNDERFLOWS: 1030 val = 0; 1031 break; 1032 1033 case MAC_STAT_OVERFLOWS: 1034 val = 0; 1035 break; 1036 1037 case MAC_STAT_LINK_STATE: 1038 val = statsp->mac_stats.link_duplex; 1039 break; 1040 case MAC_STAT_LINK_UP: 1041 val = statsp->mac_stats.link_up; 1042 break; 1043 case MAC_STAT_PROMISC: 1044 val = statsp->mac_stats.promisc; 1045 break; 1046 case ETHER_STAT_SQE_ERRORS: 1047 val = 0; 1048 break; 1049 1050 case ETHER_STAT_ALIGN_ERRORS: 1051 /* 1052 * No similar error in Hydra receive channels 1053 */ 1054 val = 0; 1055 break; 1056 1057 case ETHER_STAT_FCS_ERRORS: 1058 /* 1059 * No similar error in Hydra receive channels 1060 */ 1061 val = 0; 1062 break; 1063 1064 case ETHER_STAT_FIRST_COLLISIONS: 1065 val = 0; 1066 break; 1067 1068 case ETHER_STAT_MULTI_COLLISIONS: 1069 val = 0; 1070 break; 1071 1072 case ETHER_STAT_TX_LATE_COLLISIONS: 1073 val = 0; 1074 break; 1075 1076 case ETHER_STAT_EX_COLLISIONS: 1077 val = 0; 1078 break; 1079 1080 case ETHER_STAT_DEFER_XMTS: 1081 val = 0; 1082 break; 1083 1084 case ETHER_STAT_MACXMT_ERRORS: 1085 /* 1086 * A count of frames for which transmission on a 1087 * particular interface fails due to an internal 1088 * MAC sublayer transmit error 1089 */ 1090 for (channel = 0; channel < hxgep->ntdc; channel++) { 1091 tx_stats = &statsp->tdc_stats[channel]; 1092 val += tx_stats->pkt_size_hdr_err + 1093 tx_stats->pkt_size_err + 1094 tx_stats->tx_rng_oflow + 1095 tx_stats->peu_resp_err + 1096 tx_stats->runt_pkt_drop_err + 1097 tx_stats->pref_par_err + 1098 tx_stats->tdr_pref_cpl_to + 1099 tx_stats->pkt_cpl_to + 1100 tx_stats->invalid_sop + 1101 tx_stats->unexpected_sop; 1102 } 1103 break; 1104 1105 case ETHER_STAT_CARRIER_ERRORS: 1106 /* 1107 * The number of times that the carrier sense 1108 * condition was lost or never asserted when 1109 * attempting to transmit a frame on a particular interface 1110 */ 1111 for (channel = 0; channel < hxgep->ntdc; channel++) { 1112 tx_stats = &statsp->tdc_stats[channel]; 1113 val += tx_stats->tdr_pref_cpl_to + tx_stats->pkt_cpl_to; 1114 } 1115 break; 1116 1117 case ETHER_STAT_TOOLONG_ERRORS: 1118 /* 1119 * A count of frames received on a particular 1120 * interface that exceed the maximum permitted frame size 1121 */ 1122 for (channel = 0; channel < hxgep->ntdc; channel++) { 1123 tx_stats = &statsp->tdc_stats[channel]; 1124 val += tx_stats->pkt_size_err; 1125 } 1126 break; 1127 1128 case ETHER_STAT_XCVR_ADDR: 1129 val = 0; 1130 break; 1131 case ETHER_STAT_XCVR_ID: 1132 val = 0; 1133 break; 1134 1135 case ETHER_STAT_XCVR_INUSE: 1136 val = 0; 1137 break; 1138 1139 case ETHER_STAT_CAP_1000FDX: 1140 val = 0; 1141 break; 1142 1143 case ETHER_STAT_CAP_1000HDX: 1144 val = 0; 1145 break; 1146 1147 case ETHER_STAT_CAP_100FDX: 1148 val = 0; 1149 break; 1150 1151 case ETHER_STAT_CAP_100HDX: 1152 val = 0; 1153 break; 1154 1155 case ETHER_STAT_CAP_10FDX: 1156 val = 0; 1157 break; 1158 1159 case ETHER_STAT_CAP_10HDX: 1160 val = 0; 1161 break; 1162 1163 case ETHER_STAT_CAP_ASMPAUSE: 1164 val = 0; 1165 break; 1166 1167 case ETHER_STAT_CAP_PAUSE: 1168 val = 0; 1169 break; 1170 1171 case ETHER_STAT_CAP_AUTONEG: 1172 val = 0; 1173 break; 1174 1175 case ETHER_STAT_ADV_CAP_1000FDX: 1176 val = 0; 1177 break; 1178 1179 case ETHER_STAT_ADV_CAP_1000HDX: 1180 val = 0; 1181 break; 1182 1183 case ETHER_STAT_ADV_CAP_100FDX: 1184 val = 0; 1185 break; 1186 1187 case ETHER_STAT_ADV_CAP_100HDX: 1188 val = 0; 1189 break; 1190 1191 case ETHER_STAT_ADV_CAP_10FDX: 1192 val = 0; 1193 break; 1194 1195 case ETHER_STAT_ADV_CAP_10HDX: 1196 val = 0; 1197 break; 1198 1199 case ETHER_STAT_ADV_CAP_ASMPAUSE: 1200 val = 0; 1201 break; 1202 1203 case ETHER_STAT_ADV_CAP_PAUSE: 1204 val = 0; 1205 break; 1206 1207 case ETHER_STAT_ADV_CAP_AUTONEG: 1208 val = 0; 1209 break; 1210 1211 case ETHER_STAT_LP_CAP_1000FDX: 1212 val = 0; 1213 break; 1214 1215 case ETHER_STAT_LP_CAP_1000HDX: 1216 val = 0; 1217 break; 1218 1219 case ETHER_STAT_LP_CAP_100FDX: 1220 val = 0; 1221 break; 1222 1223 case ETHER_STAT_LP_CAP_100HDX: 1224 val = 0; 1225 break; 1226 1227 case ETHER_STAT_LP_CAP_10FDX: 1228 val = 0; 1229 break; 1230 1231 case ETHER_STAT_LP_CAP_10HDX: 1232 val = 0; 1233 break; 1234 1235 case ETHER_STAT_LP_CAP_ASMPAUSE: 1236 val = 0; 1237 break; 1238 1239 case ETHER_STAT_LP_CAP_PAUSE: 1240 val = 0; 1241 break; 1242 1243 case ETHER_STAT_LP_CAP_AUTONEG: 1244 val = 0; 1245 break; 1246 1247 case ETHER_STAT_LINK_ASMPAUSE: 1248 val = 0; 1249 break; 1250 1251 case ETHER_STAT_LINK_PAUSE: 1252 val = 0; 1253 break; 1254 1255 case ETHER_STAT_LINK_AUTONEG: 1256 val = 0; 1257 break; 1258 1259 case ETHER_STAT_LINK_DUPLEX: 1260 val = statsp->mac_stats.link_duplex; 1261 break; 1262 1263 case ETHER_STAT_TOOSHORT_ERRORS: 1264 val = 0; 1265 break; 1266 1267 case ETHER_STAT_CAP_REMFAULT: 1268 val = 0; 1269 break; 1270 1271 case ETHER_STAT_ADV_REMFAULT: 1272 val = 0; 1273 break; 1274 1275 case ETHER_STAT_LP_REMFAULT: 1276 val = 0; 1277 break; 1278 1279 case ETHER_STAT_JABBER_ERRORS: 1280 val = 0; 1281 break; 1282 1283 case ETHER_STAT_CAP_100T4: 1284 val = 0; 1285 break; 1286 1287 case ETHER_STAT_ADV_CAP_100T4: 1288 val = 0; 1289 break; 1290 1291 case ETHER_STAT_LP_CAP_100T4: 1292 val = 0; 1293 break; 1294 1295 default: 1296 /* 1297 * Shouldn't reach here... 1298 */ 1299 cmn_err(CE_WARN, 1300 "hxge_m_stat: unrecognized parameter value = 0x%x", stat); 1301 1302 return (ENOTSUP); 1303 } 1304 *value = val; 1305 return (0); 1306 } 1307