13dec9fcdSqs148142 /* 23dec9fcdSqs148142 * CDDL HEADER START 33dec9fcdSqs148142 * 43dec9fcdSqs148142 * The contents of this file are subject to the terms of the 53dec9fcdSqs148142 * Common Development and Distribution License (the "License"). 63dec9fcdSqs148142 * You may not use this file except in compliance with the License. 73dec9fcdSqs148142 * 83dec9fcdSqs148142 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 93dec9fcdSqs148142 * or http://www.opensolaris.org/os/licensing. 103dec9fcdSqs148142 * See the License for the specific language governing permissions 113dec9fcdSqs148142 * and limitations under the License. 123dec9fcdSqs148142 * 133dec9fcdSqs148142 * When distributing Covered Code, include this CDDL HEADER in each 143dec9fcdSqs148142 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 153dec9fcdSqs148142 * If applicable, add the following below this CDDL HEADER, with the 163dec9fcdSqs148142 * fields enclosed by brackets "[]" replaced with your own identifying 173dec9fcdSqs148142 * information: Portions Copyright [yyyy] [name of copyright owner] 183dec9fcdSqs148142 * 193dec9fcdSqs148142 * CDDL HEADER END 203dec9fcdSqs148142 */ 21*f043ebedSMichael Speer 223dec9fcdSqs148142 /* 23*f043ebedSMichael Speer * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 243dec9fcdSqs148142 * Use is subject to license terms. 253dec9fcdSqs148142 */ 263dec9fcdSqs148142 273dec9fcdSqs148142 #ifndef _SYS_HXGE_HXGE_COMMON_H 283dec9fcdSqs148142 #define _SYS_HXGE_HXGE_COMMON_H 293dec9fcdSqs148142 303dec9fcdSqs148142 #include <sys/types.h> 313dec9fcdSqs148142 #include <hxge_defs.h> 323dec9fcdSqs148142 #include <hxge_pfc.h> 333dec9fcdSqs148142 #include <hxge_common_impl.h> 343dec9fcdSqs148142 353dec9fcdSqs148142 #ifdef __cplusplus 363dec9fcdSqs148142 extern "C" { 373dec9fcdSqs148142 #endif 383dec9fcdSqs148142 393dec9fcdSqs148142 #define HXGE_DMA_START B_TRUE 403dec9fcdSqs148142 #define HXGE_DMA_STOP B_FALSE 413dec9fcdSqs148142 #define HXGE_TIMER_RESO 2 423dec9fcdSqs148142 #define HXGE_TIMER_LDG 2 433dec9fcdSqs148142 443dec9fcdSqs148142 /* 453dec9fcdSqs148142 * Receive and Transmit DMA definitions 463dec9fcdSqs148142 */ 473dec9fcdSqs148142 #ifdef _DMA_USES_VIRTADDR 483dec9fcdSqs148142 #define HXGE_DMA_BLOCK 1 493dec9fcdSqs148142 #else 503dec9fcdSqs148142 #define HXGE_DMA_BLOCK (64 * 64) 513dec9fcdSqs148142 #endif 523dec9fcdSqs148142 53a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States #define HXGE_RBR_RBB_MIN 128 54*f043ebedSMichael Speer #define HXGE_RBR_RBB_MAX ((64 * 128) - 1) 55*f043ebedSMichael Speer #if defined(__sparc) 56*f043ebedSMichael Speer #define HXGE_RBR_RBB_DEFAULT 1536 /* Number of RBR Blocks */ 57*f043ebedSMichael Speer #else 58a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States #define HXGE_RBR_RBB_DEFAULT 2048 /* Number of RBR Blocks */ 59*f043ebedSMichael Speer #endif 603dec9fcdSqs148142 #define HXGE_RCR_MIN (HXGE_RBR_RBB_MIN * 2) 61a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States #define HXGE_RCR_MAX 65504 /* 2^16 - 32 */ 623dec9fcdSqs148142 63*f043ebedSMichael Speer /* 64*f043ebedSMichael Speer * 4096/256 for x86 and 8192 / 256 for Sparc 65*f043ebedSMichael Speer * NOTE: RCR Ring Size should *not* enable bit 19 of the address. 66*f043ebedSMichael Speer */ 67*f043ebedSMichael Speer #if defined(__sparc) 68*f043ebedSMichael Speer #define HXGE_RCR_DEFAULT (HXGE_RBR_RBB_DEFAULT * 32) 69*f043ebedSMichael Speer #else 7057c5371aSQiyan Sun - Sun Microsystems - San Diego United States #define HXGE_RCR_DEFAULT (HXGE_RBR_RBB_DEFAULT * 16) 71*f043ebedSMichael Speer #endif 723dec9fcdSqs148142 73a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States #define HXGE_TX_RING_DEFAULT 2048 74*f043ebedSMichael Speer #define HXGE_TX_RING_MAX ((64 * 128) - 1) 753dec9fcdSqs148142 763dec9fcdSqs148142 #define RBR_BKSIZE_4K 0 773dec9fcdSqs148142 #define RBR_BKSIZE_8K 1 783dec9fcdSqs148142 #define RBR_BKSIZE_4K_BYTES (4 * 1024) 793dec9fcdSqs148142 803dec9fcdSqs148142 #define RBR_BUFSZ2_2K 0 813dec9fcdSqs148142 #define RBR_BUFSZ2_4K 1 823dec9fcdSqs148142 #define RBR_BUFSZ2_2K_BYTES (2 * 1024) 833dec9fcdSqs148142 #define RBR_BUFSZ2_4K_BYTES (4 * 1024) 843dec9fcdSqs148142 853dec9fcdSqs148142 #define RBR_BUFSZ1_1K 0 863dec9fcdSqs148142 #define RBR_BUFSZ1_2K 1 873dec9fcdSqs148142 #define RBR_BUFSZ1_1K_BYTES 1024 883dec9fcdSqs148142 #define RBR_BUFSZ1_2K_BYTES (2 * 1024) 893dec9fcdSqs148142 903dec9fcdSqs148142 #define RBR_BUFSZ0_256B 0 913dec9fcdSqs148142 #define RBR_BUFSZ0_512B 1 923dec9fcdSqs148142 #define RBR_BUFSZ0_1K 2 933dec9fcdSqs148142 #define RBR_BUFSZ0_256_BYTES 256 941c29f7e3SQiyan Sun - Sun Microsystems - San Diego United States #define RBR_BUFSZ0_512_BYTES 512 95a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States #define RBR_BUFSZ0_1K_BYTES 1024 963dec9fcdSqs148142 973dec9fcdSqs148142 /* 983dec9fcdSqs148142 * VLAN table configuration 993dec9fcdSqs148142 */ 1003dec9fcdSqs148142 typedef struct hxge_mv_cfg { 1013dec9fcdSqs148142 uint8_t flag; /* 0:unconfigure 1:configured */ 1023dec9fcdSqs148142 } hxge_mv_cfg_t, *p_hxge_mv_cfg_t; 1033dec9fcdSqs148142 1043dec9fcdSqs148142 typedef struct hxge_param_map { 1053dec9fcdSqs148142 #if defined(_BIG_ENDIAN) 1063dec9fcdSqs148142 uint32_t rsrvd2:2; /* [30:31] rsrvd */ 1073dec9fcdSqs148142 uint32_t remove:1; /* [29] Remove */ 1083dec9fcdSqs148142 uint32_t pref:1; /* [28] preference */ 1093dec9fcdSqs148142 uint32_t rsrv:4; /* [27:24] preference */ 1103dec9fcdSqs148142 uint32_t map_to:8; /* [23:16] map to resource */ 1113dec9fcdSqs148142 uint32_t param_id:16; /* [15:0] Param ID */ 1123dec9fcdSqs148142 #else 1133dec9fcdSqs148142 uint32_t param_id:16; /* [15:0] Param ID */ 1143dec9fcdSqs148142 uint32_t map_to:8; /* [23:16] map to resource */ 1153dec9fcdSqs148142 uint32_t rsrv:4; /* [27:24] preference */ 1163dec9fcdSqs148142 uint32_t pref:1; /* [28] preference */ 1173dec9fcdSqs148142 uint32_t remove:1; /* [29] Remove */ 1183dec9fcdSqs148142 uint32_t rsrvd2:2; /* [30:31] rsrvd */ 1193dec9fcdSqs148142 #endif 1203dec9fcdSqs148142 } hxge_param_map_t, *p_hxge_param_map_t; 1213dec9fcdSqs148142 1223dec9fcdSqs148142 typedef struct hxge_hw_pt_cfg { 1233dec9fcdSqs148142 uint32_t start_tdc; /* start TDC (0 - 3) */ 1243dec9fcdSqs148142 uint32_t max_tdcs; /* max TDC in sequence */ 1253dec9fcdSqs148142 uint32_t start_rdc; /* start RDC (0 - 3) */ 1263dec9fcdSqs148142 uint32_t max_rdcs; /* max rdc in sequence */ 1273dec9fcdSqs148142 uint32_t rx_full_header; /* select the header flag */ 1283dec9fcdSqs148142 uint32_t start_ldg; /* starting logical group # */ 1293dec9fcdSqs148142 uint32_t max_ldgs; /* max logical device group */ 1303dec9fcdSqs148142 uint32_t max_ldvs; /* max logical devices */ 1313dec9fcdSqs148142 } hxge_hw_pt_cfg_t, *p_hxge_hw_pt_cfg_t; 1323dec9fcdSqs148142 1333dec9fcdSqs148142 /* per port configuration */ 1343dec9fcdSqs148142 typedef struct hxge_dma_pt_cfg { 1353dec9fcdSqs148142 hxge_hw_pt_cfg_t hw_config; /* hardware configuration */ 1363dec9fcdSqs148142 1373dec9fcdSqs148142 uint32_t alloc_buf_size; 1383dec9fcdSqs148142 uint32_t rbr_size; 1393dec9fcdSqs148142 uint32_t rcr_size; 1403dec9fcdSqs148142 } hxge_dma_pt_cfg_t, *p_hxge_dma_pt_cfg_t; 1413dec9fcdSqs148142 1423dec9fcdSqs148142 /* classification configuration */ 1433dec9fcdSqs148142 typedef struct hxge_class_pt_cfg { 1443dec9fcdSqs148142 /* VLAN table */ 1453dec9fcdSqs148142 hxge_mv_cfg_t vlan_tbl[VLAN_ID_MAX + 1]; 1463dec9fcdSqs148142 /* class config value */ 1473dec9fcdSqs148142 uint32_t init_hash; 1483dec9fcdSqs148142 uint32_t class_cfg[TCAM_CLASS_MAX]; 1493dec9fcdSqs148142 } hxge_class_pt_cfg_t, *p_hxge_class_pt_cfg_t; 1503dec9fcdSqs148142 1513dec9fcdSqs148142 typedef struct hxge_hw_list { 1523dec9fcdSqs148142 struct hxge_hw_list *next; 1533dec9fcdSqs148142 hxge_os_mutex_t hxge_cfg_lock; 1543dec9fcdSqs148142 hxge_os_mutex_t hxge_tcam_lock; 1553dec9fcdSqs148142 hxge_os_mutex_t hxge_vlan_lock; 1563dec9fcdSqs148142 1573dec9fcdSqs148142 hxge_dev_info_t *parent_devp; 1583dec9fcdSqs148142 struct _hxge_t *hxge_p; 1593dec9fcdSqs148142 uint32_t ndevs; 1603dec9fcdSqs148142 uint32_t flags; 1613dec9fcdSqs148142 uint32_t magic; 1623dec9fcdSqs148142 } hxge_hw_list_t, *p_hxge_hw_list_t; 1633dec9fcdSqs148142 1643dec9fcdSqs148142 #ifdef __cplusplus 1653dec9fcdSqs148142 } 1663dec9fcdSqs148142 #endif 1673dec9fcdSqs148142 1683dec9fcdSqs148142 #endif /* _SYS_HXGE_HXGE_COMMON_H */ 169