1 /* 2 * This file is provided under a CDDLv1 license. When using or 3 * redistributing this file, you may do so under this license. 4 * In redistributing this file this license must be included 5 * and no other modification of this header file is permitted. 6 * 7 * CDDL LICENSE SUMMARY 8 * 9 * Copyright(c) 1999 - 2008 Intel Corporation. All rights reserved. 10 * 11 * The contents of this file are subject to the terms of Version 12 * 1.0 of the Common Development and Distribution License (the "License"). 13 * 14 * You should have received a copy of the License with this software. 15 * You can obtain a copy of the License at 16 * http://www.opensolaris.org/os/licensing. 17 * See the License for the specific language governing permissions 18 * and limitations under the License. 19 */ 20 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 /* 27 * ********************************************************************** 28 * * 29 * Module Name: e1000g_stat.c * 30 * * 31 * Abstract: Functions for processing statistics * 32 * * 33 * ********************************************************************** 34 */ 35 #include "e1000g_sw.h" 36 #include "e1000g_debug.h" 37 38 static int e1000g_update_stats(kstat_t *ksp, int rw); 39 40 /* 41 * e1000_tbi_adjust_stats 42 * 43 * Adjusts statistic counters when a frame is accepted 44 * under the TBI workaround. This function has been 45 * adapted for Solaris from shared code. 46 */ 47 void 48 e1000_tbi_adjust_stats(struct e1000g *Adapter, 49 uint32_t frame_len, uint8_t *mac_addr) 50 { 51 uint32_t carry_bit; 52 p_e1000g_stat_t e1000g_ksp; 53 54 e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data; 55 56 /* First adjust the frame length */ 57 frame_len--; 58 59 /* 60 * We need to adjust the statistics counters, since the hardware 61 * counters overcount this packet as a CRC error and undercount 62 * the packet as a good packet 63 */ 64 /* This packet should not be counted as a CRC error */ 65 e1000g_ksp->Crcerrs.value.ul--; 66 /* This packet does count as a Good Packet Received */ 67 e1000g_ksp->Gprc.value.ul++; 68 69 /* 70 * Adjust the Good Octets received counters 71 */ 72 carry_bit = 0x80000000 & e1000g_ksp->Gorl.value.ul; 73 e1000g_ksp->Gorl.value.ul += frame_len; 74 /* 75 * If the high bit of Gorcl (the low 32 bits of the Good Octets 76 * Received Count) was one before the addition, 77 * AND it is zero after, then we lost the carry out, 78 * need to add one to Gorch (Good Octets Received Count High). 79 * This could be simplified if all environments supported 80 * 64-bit integers. 81 */ 82 if (carry_bit && ((e1000g_ksp->Gorl.value.ul & 0x80000000) == 0)) { 83 e1000g_ksp->Gorh.value.ul++; 84 } 85 /* 86 * Is this a broadcast or multicast? Check broadcast first, 87 * since the test for a multicast frame will test positive on 88 * a broadcast frame. 89 */ 90 if ((mac_addr[0] == (uint8_t)0xff) && 91 (mac_addr[1] == (uint8_t)0xff)) { 92 /* 93 * Broadcast packet 94 */ 95 e1000g_ksp->Bprc.value.ul++; 96 } else if (*mac_addr & 0x01) { 97 /* 98 * Multicast packet 99 */ 100 e1000g_ksp->Mprc.value.ul++; 101 } 102 103 if (frame_len == Adapter->max_frame_size) { 104 /* 105 * In this case, the hardware has overcounted the number of 106 * oversize frames. 107 */ 108 if (e1000g_ksp->Roc.value.ul > 0) 109 e1000g_ksp->Roc.value.ul--; 110 } 111 112 #ifdef E1000G_DEBUG 113 /* 114 * Adjust the bin counters when the extra byte put the frame in the 115 * wrong bin. Remember that the frame_len was adjusted above. 116 */ 117 if (frame_len == 64) { 118 e1000g_ksp->Prc64.value.ul++; 119 e1000g_ksp->Prc127.value.ul--; 120 } else if (frame_len == 127) { 121 e1000g_ksp->Prc127.value.ul++; 122 e1000g_ksp->Prc255.value.ul--; 123 } else if (frame_len == 255) { 124 e1000g_ksp->Prc255.value.ul++; 125 e1000g_ksp->Prc511.value.ul--; 126 } else if (frame_len == 511) { 127 e1000g_ksp->Prc511.value.ul++; 128 e1000g_ksp->Prc1023.value.ul--; 129 } else if (frame_len == 1023) { 130 e1000g_ksp->Prc1023.value.ul++; 131 e1000g_ksp->Prc1522.value.ul--; 132 } else if (frame_len == 1522) { 133 e1000g_ksp->Prc1522.value.ul++; 134 } 135 #endif 136 } 137 138 139 /* 140 * e1000g_update_stats - update driver private kstat counters 141 * 142 * This routine will dump and reset the e1000's internal 143 * statistics counters. The current stats dump values will 144 * be sent to the kernel status area. 145 */ 146 static int 147 e1000g_update_stats(kstat_t *ksp, int rw) 148 { 149 struct e1000g *Adapter; 150 struct e1000_hw *hw; 151 p_e1000g_stat_t e1000g_ksp; 152 e1000g_tx_ring_t *tx_ring; 153 e1000g_rx_ring_t *rx_ring; 154 uint64_t val; 155 uint32_t low_val, high_val; 156 157 if (rw == KSTAT_WRITE) 158 return (EACCES); 159 160 Adapter = (struct e1000g *)ksp->ks_private; 161 ASSERT(Adapter != NULL); 162 e1000g_ksp = (p_e1000g_stat_t)ksp->ks_data; 163 ASSERT(e1000g_ksp != NULL); 164 hw = &Adapter->shared; 165 166 tx_ring = Adapter->tx_ring; 167 rx_ring = Adapter->rx_ring; 168 169 rw_enter(&Adapter->chip_lock, RW_WRITER); 170 171 e1000g_ksp->link_speed.value.ul = Adapter->link_speed; 172 e1000g_ksp->reset_count.value.ul = Adapter->reset_count; 173 174 e1000g_ksp->rx_error.value.ul = rx_ring->stat_error; 175 e1000g_ksp->rx_esballoc_fail.value.ul = rx_ring->stat_esballoc_fail; 176 e1000g_ksp->rx_allocb_fail.value.ul = rx_ring->stat_allocb_fail; 177 178 e1000g_ksp->tx_no_swpkt.value.ul = tx_ring->stat_no_swpkt; 179 e1000g_ksp->tx_no_desc.value.ul = tx_ring->stat_no_desc; 180 e1000g_ksp->tx_send_fail.value.ul = tx_ring->stat_send_fail; 181 e1000g_ksp->tx_reschedule.value.ul = tx_ring->stat_reschedule; 182 e1000g_ksp->tx_over_size.value.ul = tx_ring->stat_over_size; 183 184 #ifdef E1000G_DEBUG 185 e1000g_ksp->rx_none.value.ul = rx_ring->stat_none; 186 e1000g_ksp->rx_multi_desc.value.ul = rx_ring->stat_multi_desc; 187 e1000g_ksp->rx_no_freepkt.value.ul = rx_ring->stat_no_freepkt; 188 e1000g_ksp->rx_avail_freepkt.value.ul = rx_ring->avail_freepkt + 189 rx_ring->recycle_freepkt; 190 191 e1000g_ksp->tx_under_size.value.ul = tx_ring->stat_under_size; 192 e1000g_ksp->tx_exceed_frags.value.ul = tx_ring->stat_exceed_frags; 193 e1000g_ksp->tx_empty_frags.value.ul = tx_ring->stat_empty_frags; 194 e1000g_ksp->tx_recycle.value.ul = tx_ring->stat_recycle; 195 e1000g_ksp->tx_recycle_intr.value.ul = tx_ring->stat_recycle_intr; 196 e1000g_ksp->tx_recycle_retry.value.ul = tx_ring->stat_recycle_retry; 197 e1000g_ksp->tx_recycle_none.value.ul = tx_ring->stat_recycle_none; 198 e1000g_ksp->tx_copy.value.ul = tx_ring->stat_copy; 199 e1000g_ksp->tx_bind.value.ul = tx_ring->stat_bind; 200 e1000g_ksp->tx_multi_copy.value.ul = tx_ring->stat_multi_copy; 201 e1000g_ksp->tx_multi_cookie.value.ul = tx_ring->stat_multi_cookie; 202 e1000g_ksp->tx_lack_desc.value.ul = tx_ring->stat_lack_desc; 203 #endif 204 205 /* 206 * Standard Stats 207 */ 208 e1000g_ksp->Mpc.value.ul += E1000_READ_REG(hw, E1000_MPC); 209 e1000g_ksp->Rlec.value.ul += E1000_READ_REG(hw, E1000_RLEC); 210 e1000g_ksp->Xonrxc.value.ul += E1000_READ_REG(hw, E1000_XONRXC); 211 e1000g_ksp->Xontxc.value.ul += E1000_READ_REG(hw, E1000_XONTXC); 212 e1000g_ksp->Xoffrxc.value.ul += E1000_READ_REG(hw, E1000_XOFFRXC); 213 e1000g_ksp->Xofftxc.value.ul += E1000_READ_REG(hw, E1000_XOFFTXC); 214 e1000g_ksp->Fcruc.value.ul += E1000_READ_REG(hw, E1000_FCRUC); 215 216 if ((hw->mac.type != e1000_ich8lan) && 217 (hw->mac.type != e1000_ich9lan) && 218 (hw->mac.type != e1000_ich10lan)) { 219 e1000g_ksp->Symerrs.value.ul += 220 E1000_READ_REG(hw, E1000_SYMERRS); 221 #ifdef E1000G_DEBUG 222 e1000g_ksp->Prc64.value.ul += 223 E1000_READ_REG(hw, E1000_PRC64); 224 e1000g_ksp->Prc127.value.ul += 225 E1000_READ_REG(hw, E1000_PRC127); 226 e1000g_ksp->Prc255.value.ul += 227 E1000_READ_REG(hw, E1000_PRC255); 228 e1000g_ksp->Prc511.value.ul += 229 E1000_READ_REG(hw, E1000_PRC511); 230 e1000g_ksp->Prc1023.value.ul += 231 E1000_READ_REG(hw, E1000_PRC1023); 232 e1000g_ksp->Prc1522.value.ul += 233 E1000_READ_REG(hw, E1000_PRC1522); 234 235 e1000g_ksp->Ptc64.value.ul += 236 E1000_READ_REG(hw, E1000_PTC64); 237 e1000g_ksp->Ptc127.value.ul += 238 E1000_READ_REG(hw, E1000_PTC127); 239 e1000g_ksp->Ptc255.value.ul += 240 E1000_READ_REG(hw, E1000_PTC255); 241 e1000g_ksp->Ptc511.value.ul += 242 E1000_READ_REG(hw, E1000_PTC511); 243 e1000g_ksp->Ptc1023.value.ul += 244 E1000_READ_REG(hw, E1000_PTC1023); 245 e1000g_ksp->Ptc1522.value.ul += 246 E1000_READ_REG(hw, E1000_PTC1522); 247 #endif 248 } 249 250 e1000g_ksp->Gprc.value.ul += E1000_READ_REG(hw, E1000_GPRC); 251 e1000g_ksp->Gptc.value.ul += E1000_READ_REG(hw, E1000_GPTC); 252 e1000g_ksp->Ruc.value.ul += E1000_READ_REG(hw, E1000_RUC); 253 e1000g_ksp->Rfc.value.ul += E1000_READ_REG(hw, E1000_RFC); 254 e1000g_ksp->Roc.value.ul += E1000_READ_REG(hw, E1000_ROC); 255 e1000g_ksp->Rjc.value.ul += E1000_READ_REG(hw, E1000_RJC); 256 e1000g_ksp->Tpr.value.ul += E1000_READ_REG(hw, E1000_TPR); 257 e1000g_ksp->Tncrs.value.ul += E1000_READ_REG(hw, E1000_TNCRS); 258 e1000g_ksp->Tsctc.value.ul += E1000_READ_REG(hw, E1000_TSCTC); 259 e1000g_ksp->Tsctfc.value.ul += E1000_READ_REG(hw, E1000_TSCTFC); 260 261 /* 262 * Adaptive Calculations 263 */ 264 hw->mac.tx_packet_delta = E1000_READ_REG(hw, E1000_TPT); 265 e1000g_ksp->Tpt.value.ul += hw->mac.tx_packet_delta; 266 267 /* 268 * The 64-bit register will reset whenever the upper 269 * 32 bits are read. So we need to read the lower 270 * 32 bits first, then read the upper 32 bits. 271 */ 272 low_val = E1000_READ_REG(hw, E1000_GORCL); 273 high_val = E1000_READ_REG(hw, E1000_GORCH); 274 val = (uint64_t)e1000g_ksp->Gorh.value.ul << 32 | 275 (uint64_t)e1000g_ksp->Gorl.value.ul; 276 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 277 e1000g_ksp->Gorl.value.ul = (uint32_t)val; 278 e1000g_ksp->Gorh.value.ul = (uint32_t)(val >> 32); 279 280 low_val = E1000_READ_REG(hw, E1000_GOTCL); 281 high_val = E1000_READ_REG(hw, E1000_GOTCH); 282 val = (uint64_t)e1000g_ksp->Goth.value.ul << 32 | 283 (uint64_t)e1000g_ksp->Gotl.value.ul; 284 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 285 e1000g_ksp->Gotl.value.ul = (uint32_t)val; 286 e1000g_ksp->Goth.value.ul = (uint32_t)(val >> 32); 287 288 low_val = E1000_READ_REG(hw, E1000_TORL); 289 high_val = E1000_READ_REG(hw, E1000_TORH); 290 val = (uint64_t)e1000g_ksp->Torh.value.ul << 32 | 291 (uint64_t)e1000g_ksp->Torl.value.ul; 292 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 293 e1000g_ksp->Torl.value.ul = (uint32_t)val; 294 e1000g_ksp->Torh.value.ul = (uint32_t)(val >> 32); 295 296 low_val = E1000_READ_REG(hw, E1000_TOTL); 297 high_val = E1000_READ_REG(hw, E1000_TOTH); 298 val = (uint64_t)e1000g_ksp->Toth.value.ul << 32 | 299 (uint64_t)e1000g_ksp->Totl.value.ul; 300 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 301 e1000g_ksp->Totl.value.ul = (uint32_t)val; 302 e1000g_ksp->Toth.value.ul = (uint32_t)(val >> 32); 303 304 rw_exit(&Adapter->chip_lock); 305 306 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 307 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED); 308 309 return (0); 310 } 311 312 int 313 e1000g_m_stat(void *arg, uint_t stat, uint64_t *val) 314 { 315 struct e1000g *Adapter = (struct e1000g *)arg; 316 struct e1000_hw *hw = &Adapter->shared; 317 p_e1000g_stat_t e1000g_ksp; 318 uint32_t low_val, high_val; 319 320 e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data; 321 322 rw_enter(&Adapter->chip_lock, RW_READER); 323 324 switch (stat) { 325 case MAC_STAT_IFSPEED: 326 *val = Adapter->link_speed * 1000000ull; 327 break; 328 329 case MAC_STAT_MULTIRCV: 330 e1000g_ksp->Mprc.value.ul += 331 E1000_READ_REG(hw, E1000_MPRC); 332 *val = e1000g_ksp->Mprc.value.ul; 333 break; 334 335 case MAC_STAT_BRDCSTRCV: 336 e1000g_ksp->Bprc.value.ul += 337 E1000_READ_REG(hw, E1000_BPRC); 338 *val = e1000g_ksp->Bprc.value.ul; 339 break; 340 341 case MAC_STAT_MULTIXMT: 342 e1000g_ksp->Mptc.value.ul += 343 E1000_READ_REG(hw, E1000_MPTC); 344 *val = e1000g_ksp->Mptc.value.ul; 345 break; 346 347 case MAC_STAT_BRDCSTXMT: 348 e1000g_ksp->Bptc.value.ul += 349 E1000_READ_REG(hw, E1000_BPTC); 350 *val = e1000g_ksp->Bptc.value.ul; 351 break; 352 353 case MAC_STAT_NORCVBUF: 354 e1000g_ksp->Rnbc.value.ul += 355 E1000_READ_REG(hw, E1000_RNBC); 356 *val = e1000g_ksp->Rnbc.value.ul; 357 break; 358 359 case MAC_STAT_IERRORS: 360 e1000g_ksp->Rxerrc.value.ul += 361 E1000_READ_REG(hw, E1000_RXERRC); 362 e1000g_ksp->Algnerrc.value.ul += 363 E1000_READ_REG(hw, E1000_ALGNERRC); 364 e1000g_ksp->Rlec.value.ul += 365 E1000_READ_REG(hw, E1000_RLEC); 366 e1000g_ksp->Crcerrs.value.ul += 367 E1000_READ_REG(hw, E1000_CRCERRS); 368 e1000g_ksp->Cexterr.value.ul += 369 E1000_READ_REG(hw, E1000_CEXTERR); 370 *val = e1000g_ksp->Rxerrc.value.ul + 371 e1000g_ksp->Algnerrc.value.ul + 372 e1000g_ksp->Rlec.value.ul + 373 e1000g_ksp->Crcerrs.value.ul + 374 e1000g_ksp->Cexterr.value.ul; 375 break; 376 377 case MAC_STAT_NOXMTBUF: 378 *val = Adapter->tx_ring->stat_no_desc; 379 break; 380 381 case MAC_STAT_OERRORS: 382 e1000g_ksp->Ecol.value.ul += 383 E1000_READ_REG(hw, E1000_ECOL); 384 *val = e1000g_ksp->Ecol.value.ul; 385 break; 386 387 case MAC_STAT_COLLISIONS: 388 e1000g_ksp->Colc.value.ul += 389 E1000_READ_REG(hw, E1000_COLC); 390 *val = e1000g_ksp->Colc.value.ul; 391 break; 392 393 case MAC_STAT_RBYTES: 394 /* 395 * The 64-bit register will reset whenever the upper 396 * 32 bits are read. So we need to read the lower 397 * 32 bits first, then read the upper 32 bits. 398 */ 399 low_val = E1000_READ_REG(hw, E1000_TORL); 400 high_val = E1000_READ_REG(hw, E1000_TORH); 401 *val = (uint64_t)e1000g_ksp->Torh.value.ul << 32 | 402 (uint64_t)e1000g_ksp->Torl.value.ul; 403 *val += (uint64_t)high_val << 32 | (uint64_t)low_val; 404 405 e1000g_ksp->Torl.value.ul = (uint32_t)*val; 406 e1000g_ksp->Torh.value.ul = (uint32_t)(*val >> 32); 407 break; 408 409 case MAC_STAT_IPACKETS: 410 e1000g_ksp->Tpr.value.ul += 411 E1000_READ_REG(hw, E1000_TPR); 412 *val = e1000g_ksp->Tpr.value.ul; 413 break; 414 415 case MAC_STAT_OBYTES: 416 /* 417 * The 64-bit register will reset whenever the upper 418 * 32 bits are read. So we need to read the lower 419 * 32 bits first, then read the upper 32 bits. 420 */ 421 low_val = E1000_READ_REG(hw, E1000_TOTL); 422 high_val = E1000_READ_REG(hw, E1000_TOTH); 423 *val = (uint64_t)e1000g_ksp->Toth.value.ul << 32 | 424 (uint64_t)e1000g_ksp->Totl.value.ul; 425 *val += (uint64_t)high_val << 32 | (uint64_t)low_val; 426 427 e1000g_ksp->Totl.value.ul = (uint32_t)*val; 428 e1000g_ksp->Toth.value.ul = (uint32_t)(*val >> 32); 429 break; 430 431 case MAC_STAT_OPACKETS: 432 e1000g_ksp->Tpt.value.ul += 433 E1000_READ_REG(hw, E1000_TPT); 434 *val = e1000g_ksp->Tpt.value.ul; 435 break; 436 437 case ETHER_STAT_ALIGN_ERRORS: 438 e1000g_ksp->Algnerrc.value.ul += 439 E1000_READ_REG(hw, E1000_ALGNERRC); 440 *val = e1000g_ksp->Algnerrc.value.ul; 441 break; 442 443 case ETHER_STAT_FCS_ERRORS: 444 e1000g_ksp->Crcerrs.value.ul += 445 E1000_READ_REG(hw, E1000_CRCERRS); 446 *val = e1000g_ksp->Crcerrs.value.ul; 447 break; 448 449 case ETHER_STAT_SQE_ERRORS: 450 e1000g_ksp->Sec.value.ul += 451 E1000_READ_REG(hw, E1000_SEC); 452 *val = e1000g_ksp->Sec.value.ul; 453 break; 454 455 case ETHER_STAT_CARRIER_ERRORS: 456 e1000g_ksp->Cexterr.value.ul += 457 E1000_READ_REG(hw, E1000_CEXTERR); 458 *val = e1000g_ksp->Cexterr.value.ul; 459 break; 460 461 case ETHER_STAT_EX_COLLISIONS: 462 e1000g_ksp->Ecol.value.ul += 463 E1000_READ_REG(hw, E1000_ECOL); 464 *val = e1000g_ksp->Ecol.value.ul; 465 break; 466 467 case ETHER_STAT_TX_LATE_COLLISIONS: 468 e1000g_ksp->Latecol.value.ul += 469 E1000_READ_REG(hw, E1000_LATECOL); 470 *val = e1000g_ksp->Latecol.value.ul; 471 break; 472 473 case ETHER_STAT_DEFER_XMTS: 474 e1000g_ksp->Dc.value.ul += 475 E1000_READ_REG(hw, E1000_DC); 476 *val = e1000g_ksp->Dc.value.ul; 477 break; 478 479 case ETHER_STAT_FIRST_COLLISIONS: 480 e1000g_ksp->Scc.value.ul += 481 E1000_READ_REG(hw, E1000_SCC); 482 *val = e1000g_ksp->Scc.value.ul; 483 break; 484 485 case ETHER_STAT_MULTI_COLLISIONS: 486 e1000g_ksp->Mcc.value.ul += 487 E1000_READ_REG(hw, E1000_MCC); 488 *val = e1000g_ksp->Mcc.value.ul; 489 break; 490 491 case ETHER_STAT_MACRCV_ERRORS: 492 e1000g_ksp->Rxerrc.value.ul += 493 E1000_READ_REG(hw, E1000_RXERRC); 494 *val = e1000g_ksp->Rxerrc.value.ul; 495 break; 496 497 case ETHER_STAT_MACXMT_ERRORS: 498 e1000g_ksp->Ecol.value.ul += 499 E1000_READ_REG(hw, E1000_ECOL); 500 *val = e1000g_ksp->Ecol.value.ul; 501 break; 502 503 case ETHER_STAT_TOOLONG_ERRORS: 504 e1000g_ksp->Roc.value.ul += 505 E1000_READ_REG(hw, E1000_ROC); 506 *val = e1000g_ksp->Roc.value.ul; 507 break; 508 509 case ETHER_STAT_XCVR_ADDR: 510 /* The Internal PHY's MDI address for each MAC is 1 */ 511 *val = 1; 512 break; 513 514 case ETHER_STAT_XCVR_ID: 515 *val = hw->phy.id | hw->phy.revision; 516 break; 517 518 case ETHER_STAT_XCVR_INUSE: 519 switch (Adapter->link_speed) { 520 case SPEED_1000: 521 *val = 522 (hw->phy.media_type == e1000_media_type_copper) ? 523 XCVR_1000T : XCVR_1000X; 524 break; 525 case SPEED_100: 526 *val = 527 (hw->phy.media_type == e1000_media_type_copper) ? 528 (Adapter->phy_status & MII_SR_100T4_CAPS) ? 529 XCVR_100T4 : XCVR_100T2 : XCVR_100X; 530 break; 531 case SPEED_10: 532 *val = XCVR_10; 533 break; 534 default: 535 *val = XCVR_NONE; 536 break; 537 } 538 break; 539 540 case ETHER_STAT_CAP_1000FDX: 541 *val = Adapter->param_1000fdx_cap; 542 break; 543 544 case ETHER_STAT_CAP_1000HDX: 545 *val = Adapter->param_1000hdx_cap; 546 break; 547 548 case ETHER_STAT_CAP_100FDX: 549 *val = Adapter->param_100fdx_cap; 550 break; 551 552 case ETHER_STAT_CAP_100HDX: 553 *val = Adapter->param_100hdx_cap; 554 break; 555 556 case ETHER_STAT_CAP_10FDX: 557 *val = Adapter->param_10fdx_cap; 558 break; 559 560 case ETHER_STAT_CAP_10HDX: 561 *val = Adapter->param_10hdx_cap; 562 break; 563 564 case ETHER_STAT_CAP_ASMPAUSE: 565 *val = Adapter->param_asym_pause_cap; 566 break; 567 568 case ETHER_STAT_CAP_PAUSE: 569 *val = Adapter->param_pause_cap; 570 break; 571 572 case ETHER_STAT_CAP_AUTONEG: 573 *val = Adapter->param_autoneg_cap; 574 break; 575 576 case ETHER_STAT_ADV_CAP_1000FDX: 577 *val = Adapter->param_adv_1000fdx; 578 break; 579 580 case ETHER_STAT_ADV_CAP_1000HDX: 581 *val = Adapter->param_adv_1000hdx; 582 break; 583 584 case ETHER_STAT_ADV_CAP_100FDX: 585 *val = Adapter->param_adv_100fdx; 586 break; 587 588 case ETHER_STAT_ADV_CAP_100HDX: 589 *val = Adapter->param_adv_100hdx; 590 break; 591 592 case ETHER_STAT_ADV_CAP_10FDX: 593 *val = Adapter->param_adv_10fdx; 594 break; 595 596 case ETHER_STAT_ADV_CAP_10HDX: 597 *val = Adapter->param_adv_10hdx; 598 break; 599 600 case ETHER_STAT_ADV_CAP_ASMPAUSE: 601 *val = Adapter->param_adv_asym_pause; 602 break; 603 604 case ETHER_STAT_ADV_CAP_PAUSE: 605 *val = Adapter->param_adv_pause; 606 break; 607 608 case ETHER_STAT_ADV_CAP_AUTONEG: 609 *val = hw->mac.autoneg; 610 break; 611 612 case ETHER_STAT_LP_CAP_1000FDX: 613 *val = Adapter->param_lp_1000fdx; 614 break; 615 616 case ETHER_STAT_LP_CAP_1000HDX: 617 *val = Adapter->param_lp_1000hdx; 618 break; 619 620 case ETHER_STAT_LP_CAP_100FDX: 621 *val = Adapter->param_lp_100fdx; 622 break; 623 624 case ETHER_STAT_LP_CAP_100HDX: 625 *val = Adapter->param_lp_100hdx; 626 break; 627 628 case ETHER_STAT_LP_CAP_10FDX: 629 *val = Adapter->param_lp_10fdx; 630 break; 631 632 case ETHER_STAT_LP_CAP_10HDX: 633 *val = Adapter->param_lp_10hdx; 634 break; 635 636 case ETHER_STAT_LP_CAP_ASMPAUSE: 637 *val = Adapter->param_lp_asym_pause; 638 break; 639 640 case ETHER_STAT_LP_CAP_PAUSE: 641 *val = Adapter->param_lp_pause; 642 break; 643 644 case ETHER_STAT_LP_CAP_AUTONEG: 645 *val = Adapter->param_lp_autoneg; 646 break; 647 648 case ETHER_STAT_LINK_ASMPAUSE: 649 *val = Adapter->param_asym_pause_cap; 650 break; 651 652 case ETHER_STAT_LINK_PAUSE: 653 *val = Adapter->param_pause_cap; 654 break; 655 656 case ETHER_STAT_LINK_AUTONEG: 657 *val = hw->mac.autoneg; 658 break; 659 660 case ETHER_STAT_LINK_DUPLEX: 661 *val = (Adapter->link_duplex == FULL_DUPLEX) ? 662 LINK_DUPLEX_FULL : LINK_DUPLEX_HALF; 663 break; 664 665 case ETHER_STAT_CAP_100T4: 666 *val = Adapter->param_100t4_cap; 667 break; 668 669 case ETHER_STAT_ADV_CAP_100T4: 670 *val = Adapter->param_adv_100t4; 671 break; 672 673 case ETHER_STAT_LP_CAP_100T4: 674 *val = Adapter->param_lp_100t4; 675 break; 676 677 default: 678 rw_exit(&Adapter->chip_lock); 679 return (ENOTSUP); 680 } 681 682 rw_exit(&Adapter->chip_lock); 683 684 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 685 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED); 686 687 return (0); 688 } 689 690 /* 691 * e1000g_init_stats - initialize kstat data structures 692 * 693 * This routine will create and initialize the driver private 694 * statistics counters. 695 */ 696 int 697 e1000g_init_stats(struct e1000g *Adapter) 698 { 699 kstat_t *ksp; 700 p_e1000g_stat_t e1000g_ksp; 701 702 /* 703 * Create and init kstat 704 */ 705 ksp = kstat_create(WSNAME, ddi_get_instance(Adapter->dip), 706 "statistics", "net", KSTAT_TYPE_NAMED, 707 sizeof (e1000g_stat_t) / sizeof (kstat_named_t), 0); 708 709 if (ksp == NULL) { 710 e1000g_log(Adapter, CE_WARN, 711 "Could not create kernel statistics\n"); 712 return (DDI_FAILURE); 713 } 714 715 Adapter->e1000g_ksp = ksp; /* Fill in the Adapters ksp */ 716 717 e1000g_ksp = (p_e1000g_stat_t)ksp->ks_data; 718 719 /* 720 * Initialize all the statistics 721 */ 722 kstat_named_init(&e1000g_ksp->link_speed, "link_speed", 723 KSTAT_DATA_ULONG); 724 kstat_named_init(&e1000g_ksp->reset_count, "Reset Count", 725 KSTAT_DATA_ULONG); 726 727 kstat_named_init(&e1000g_ksp->rx_error, "Rx Error", 728 KSTAT_DATA_ULONG); 729 kstat_named_init(&e1000g_ksp->rx_esballoc_fail, "Rx Desballoc Failure", 730 KSTAT_DATA_ULONG); 731 kstat_named_init(&e1000g_ksp->rx_allocb_fail, "Rx Allocb Failure", 732 KSTAT_DATA_ULONG); 733 734 kstat_named_init(&e1000g_ksp->tx_no_desc, "Tx No Desc", 735 KSTAT_DATA_ULONG); 736 kstat_named_init(&e1000g_ksp->tx_no_swpkt, "Tx No Buffer", 737 KSTAT_DATA_ULONG); 738 kstat_named_init(&e1000g_ksp->tx_send_fail, "Tx Send Failure", 739 KSTAT_DATA_ULONG); 740 kstat_named_init(&e1000g_ksp->tx_over_size, "Tx Pkt Over Size", 741 KSTAT_DATA_ULONG); 742 kstat_named_init(&e1000g_ksp->tx_reschedule, "Tx Reschedule", 743 KSTAT_DATA_ULONG); 744 745 kstat_named_init(&e1000g_ksp->Mpc, "Recv_Missed_Packets", 746 KSTAT_DATA_ULONG); 747 kstat_named_init(&e1000g_ksp->Symerrs, "Recv_Symbol_Errors", 748 KSTAT_DATA_ULONG); 749 kstat_named_init(&e1000g_ksp->Rlec, "Recv_Length_Errors", 750 KSTAT_DATA_ULONG); 751 kstat_named_init(&e1000g_ksp->Xonrxc, "XONs_Recvd", 752 KSTAT_DATA_ULONG); 753 kstat_named_init(&e1000g_ksp->Xontxc, "XONs_Xmitd", 754 KSTAT_DATA_ULONG); 755 kstat_named_init(&e1000g_ksp->Xoffrxc, "XOFFs_Recvd", 756 KSTAT_DATA_ULONG); 757 kstat_named_init(&e1000g_ksp->Xofftxc, "XOFFs_Xmitd", 758 KSTAT_DATA_ULONG); 759 kstat_named_init(&e1000g_ksp->Fcruc, "Recv_Unsupport_FC_Pkts", 760 KSTAT_DATA_ULONG); 761 #ifdef E1000G_DEBUG 762 kstat_named_init(&e1000g_ksp->Prc64, "Pkts_Recvd_( 64b)", 763 KSTAT_DATA_ULONG); 764 kstat_named_init(&e1000g_ksp->Prc127, "Pkts_Recvd_( 65- 127b)", 765 KSTAT_DATA_ULONG); 766 kstat_named_init(&e1000g_ksp->Prc255, "Pkts_Recvd_( 127- 255b)", 767 KSTAT_DATA_ULONG); 768 kstat_named_init(&e1000g_ksp->Prc511, "Pkts_Recvd_( 256- 511b)", 769 KSTAT_DATA_ULONG); 770 kstat_named_init(&e1000g_ksp->Prc1023, "Pkts_Recvd_( 511-1023b)", 771 KSTAT_DATA_ULONG); 772 kstat_named_init(&e1000g_ksp->Prc1522, "Pkts_Recvd_(1024-1522b)", 773 KSTAT_DATA_ULONG); 774 #endif 775 kstat_named_init(&e1000g_ksp->Gprc, "Good_Pkts_Recvd", 776 KSTAT_DATA_ULONG); 777 kstat_named_init(&e1000g_ksp->Gptc, "Good_Pkts_Xmitd", 778 KSTAT_DATA_ULONG); 779 kstat_named_init(&e1000g_ksp->Gorl, "Good_Octets_Recvd_Lo", 780 KSTAT_DATA_ULONG); 781 kstat_named_init(&e1000g_ksp->Gorh, "Good_Octets_Recvd_Hi", 782 KSTAT_DATA_ULONG); 783 kstat_named_init(&e1000g_ksp->Gotl, "Good_Octets_Xmitd_Lo", 784 KSTAT_DATA_ULONG); 785 kstat_named_init(&e1000g_ksp->Goth, "Good_Octets_Xmitd_Hi", 786 KSTAT_DATA_ULONG); 787 kstat_named_init(&e1000g_ksp->Ruc, "Recv_Undersize", 788 KSTAT_DATA_ULONG); 789 kstat_named_init(&e1000g_ksp->Rfc, "Recv_Frag", 790 KSTAT_DATA_ULONG); 791 kstat_named_init(&e1000g_ksp->Roc, "Recv_Oversize", 792 KSTAT_DATA_ULONG); 793 kstat_named_init(&e1000g_ksp->Rjc, "Recv_Jabber", 794 KSTAT_DATA_ULONG); 795 kstat_named_init(&e1000g_ksp->Torl, "Total_Octets_Recvd_Lo", 796 KSTAT_DATA_ULONG); 797 kstat_named_init(&e1000g_ksp->Torh, "Total_Octets_Recvd_Hi", 798 KSTAT_DATA_ULONG); 799 kstat_named_init(&e1000g_ksp->Totl, "Total_Octets_Xmitd_Lo", 800 KSTAT_DATA_ULONG); 801 kstat_named_init(&e1000g_ksp->Toth, "Total_Octets_Xmitd_Hi", 802 KSTAT_DATA_ULONG); 803 kstat_named_init(&e1000g_ksp->Tpr, "Total_Packets_Recvd", 804 KSTAT_DATA_ULONG); 805 kstat_named_init(&e1000g_ksp->Tpt, "Total_Packets_Xmitd", 806 KSTAT_DATA_ULONG); 807 #ifdef E1000G_DEBUG 808 kstat_named_init(&e1000g_ksp->Ptc64, "Pkts_Xmitd_( 64b)", 809 KSTAT_DATA_ULONG); 810 kstat_named_init(&e1000g_ksp->Ptc127, "Pkts_Xmitd_( 65- 127b)", 811 KSTAT_DATA_ULONG); 812 kstat_named_init(&e1000g_ksp->Ptc255, "Pkts_Xmitd_( 128- 255b)", 813 KSTAT_DATA_ULONG); 814 kstat_named_init(&e1000g_ksp->Ptc511, "Pkts_Xmitd_( 255- 511b)", 815 KSTAT_DATA_ULONG); 816 kstat_named_init(&e1000g_ksp->Ptc1023, "Pkts_Xmitd_( 512-1023b)", 817 KSTAT_DATA_ULONG); 818 kstat_named_init(&e1000g_ksp->Ptc1522, "Pkts_Xmitd_(1024-1522b)", 819 KSTAT_DATA_ULONG); 820 #endif 821 kstat_named_init(&e1000g_ksp->Tncrs, "Xmit_with_No_CRS", 822 KSTAT_DATA_ULONG); 823 kstat_named_init(&e1000g_ksp->Tsctc, "Xmit_TCP_Seg_Contexts", 824 KSTAT_DATA_ULONG); 825 kstat_named_init(&e1000g_ksp->Tsctfc, "Xmit_TCP_Seg_Contexts_Fail", 826 KSTAT_DATA_ULONG); 827 828 #ifdef E1000G_DEBUG 829 kstat_named_init(&e1000g_ksp->rx_none, "Rx No Data", 830 KSTAT_DATA_ULONG); 831 kstat_named_init(&e1000g_ksp->rx_multi_desc, "Rx Span Multi Desc", 832 KSTAT_DATA_ULONG); 833 kstat_named_init(&e1000g_ksp->rx_no_freepkt, "Rx Freelist Empty", 834 KSTAT_DATA_ULONG); 835 kstat_named_init(&e1000g_ksp->rx_avail_freepkt, "Rx Freelist Avail", 836 KSTAT_DATA_ULONG); 837 838 kstat_named_init(&e1000g_ksp->tx_under_size, "Tx Pkt Under Size", 839 KSTAT_DATA_ULONG); 840 kstat_named_init(&e1000g_ksp->tx_exceed_frags, "Tx Exceed Max Frags", 841 KSTAT_DATA_ULONG); 842 kstat_named_init(&e1000g_ksp->tx_empty_frags, "Tx Empty Frags", 843 KSTAT_DATA_ULONG); 844 kstat_named_init(&e1000g_ksp->tx_recycle, "Tx Recycle", 845 KSTAT_DATA_ULONG); 846 kstat_named_init(&e1000g_ksp->tx_recycle_intr, "Tx Recycle Intr", 847 KSTAT_DATA_ULONG); 848 kstat_named_init(&e1000g_ksp->tx_recycle_retry, "Tx Recycle Retry", 849 KSTAT_DATA_ULONG); 850 kstat_named_init(&e1000g_ksp->tx_recycle_none, "Tx Recycled None", 851 KSTAT_DATA_ULONG); 852 kstat_named_init(&e1000g_ksp->tx_copy, "Tx Send Copy", 853 KSTAT_DATA_ULONG); 854 kstat_named_init(&e1000g_ksp->tx_bind, "Tx Send Bind", 855 KSTAT_DATA_ULONG); 856 kstat_named_init(&e1000g_ksp->tx_multi_copy, "Tx Copy Multi Frags", 857 KSTAT_DATA_ULONG); 858 kstat_named_init(&e1000g_ksp->tx_multi_cookie, "Tx Bind Multi Cookies", 859 KSTAT_DATA_ULONG); 860 kstat_named_init(&e1000g_ksp->tx_lack_desc, "Tx Desc Insufficient", 861 KSTAT_DATA_ULONG); 862 #endif 863 864 /* 865 * Function to provide kernel stat update on demand 866 */ 867 ksp->ks_update = e1000g_update_stats; 868 869 /* 870 * Pointer into provider's raw statistics 871 */ 872 ksp->ks_private = (void *)Adapter; 873 874 /* 875 * Add kstat to systems kstat chain 876 */ 877 kstat_install(ksp); 878 879 return (DDI_SUCCESS); 880 } 881