1 /* 2 * This file is provided under a CDDLv1 license. When using or 3 * redistributing this file, you may do so under this license. 4 * In redistributing this file this license must be included 5 * and no other modification of this header file is permitted. 6 * 7 * CDDL LICENSE SUMMARY 8 * 9 * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved. 10 * 11 * The contents of this file are subject to the terms of Version 12 * 1.0 of the Common Development and Distribution License (the "License"). 13 * 14 * You should have received a copy of the License with this software. 15 * You can obtain a copy of the License at 16 * http://www.opensolaris.org/os/licensing. 17 * See the License for the specific language governing permissions 18 * and limitations under the License. 19 */ 20 21 /* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 /* 27 * ********************************************************************** 28 * * 29 * Module Name: e1000g_stat.c * 30 * * 31 * Abstract: Functions for processing statistics * 32 * * 33 * ********************************************************************** 34 */ 35 #include "e1000g_sw.h" 36 #include "e1000g_debug.h" 37 38 static int e1000g_update_stats(kstat_t *ksp, int rw); 39 40 /* 41 * e1000_tbi_adjust_stats 42 * 43 * Adjusts statistic counters when a frame is accepted 44 * under the TBI workaround. This function has been 45 * adapted for Solaris from shared code. 46 */ 47 void 48 e1000_tbi_adjust_stats(struct e1000g *Adapter, 49 uint32_t frame_len, uint8_t *mac_addr) 50 { 51 uint32_t carry_bit; 52 p_e1000g_stat_t e1000g_ksp; 53 54 e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data; 55 56 /* First adjust the frame length */ 57 frame_len--; 58 59 /* 60 * We need to adjust the statistics counters, since the hardware 61 * counters overcount this packet as a CRC error and undercount 62 * the packet as a good packet 63 */ 64 /* This packet should not be counted as a CRC error */ 65 e1000g_ksp->Crcerrs.value.ul--; 66 /* This packet does count as a Good Packet Received */ 67 e1000g_ksp->Gprc.value.ul++; 68 69 /* 70 * Adjust the Good Octets received counters 71 */ 72 carry_bit = 0x80000000 & e1000g_ksp->Gorl.value.ul; 73 e1000g_ksp->Gorl.value.ul += frame_len; 74 /* 75 * If the high bit of Gorcl (the low 32 bits of the Good Octets 76 * Received Count) was one before the addition, 77 * AND it is zero after, then we lost the carry out, 78 * need to add one to Gorch (Good Octets Received Count High). 79 * This could be simplified if all environments supported 80 * 64-bit integers. 81 */ 82 if (carry_bit && ((e1000g_ksp->Gorl.value.ul & 0x80000000) == 0)) { 83 e1000g_ksp->Gorh.value.ul++; 84 } 85 /* 86 * Is this a broadcast or multicast? Check broadcast first, 87 * since the test for a multicast frame will test positive on 88 * a broadcast frame. 89 */ 90 if ((mac_addr[0] == (uint8_t)0xff) && 91 (mac_addr[1] == (uint8_t)0xff)) { 92 /* 93 * Broadcast packet 94 */ 95 e1000g_ksp->Bprc.value.ul++; 96 } else if (*mac_addr & 0x01) { 97 /* 98 * Multicast packet 99 */ 100 e1000g_ksp->Mprc.value.ul++; 101 } 102 103 if (frame_len == Adapter->max_frame_size) { 104 /* 105 * In this case, the hardware has overcounted the number of 106 * oversize frames. 107 */ 108 if (e1000g_ksp->Roc.value.ul > 0) 109 e1000g_ksp->Roc.value.ul--; 110 } 111 112 #ifdef E1000G_DEBUG 113 /* 114 * Adjust the bin counters when the extra byte put the frame in the 115 * wrong bin. Remember that the frame_len was adjusted above. 116 */ 117 if (frame_len == 64) { 118 e1000g_ksp->Prc64.value.ul++; 119 e1000g_ksp->Prc127.value.ul--; 120 } else if (frame_len == 127) { 121 e1000g_ksp->Prc127.value.ul++; 122 e1000g_ksp->Prc255.value.ul--; 123 } else if (frame_len == 255) { 124 e1000g_ksp->Prc255.value.ul++; 125 e1000g_ksp->Prc511.value.ul--; 126 } else if (frame_len == 511) { 127 e1000g_ksp->Prc511.value.ul++; 128 e1000g_ksp->Prc1023.value.ul--; 129 } else if (frame_len == 1023) { 130 e1000g_ksp->Prc1023.value.ul++; 131 e1000g_ksp->Prc1522.value.ul--; 132 } else if (frame_len == 1522) { 133 e1000g_ksp->Prc1522.value.ul++; 134 } 135 #endif 136 } 137 138 139 /* 140 * e1000g_update_stats - update driver private kstat counters 141 * 142 * This routine will dump and reset the e1000's internal 143 * statistics counters. The current stats dump values will 144 * be sent to the kernel status area. 145 */ 146 static int 147 e1000g_update_stats(kstat_t *ksp, int rw) 148 { 149 struct e1000g *Adapter; 150 struct e1000_hw *hw; 151 p_e1000g_stat_t e1000g_ksp; 152 e1000g_tx_ring_t *tx_ring; 153 e1000g_rx_ring_t *rx_ring; 154 uint64_t val; 155 uint32_t low_val, high_val; 156 157 if (rw == KSTAT_WRITE) 158 return (EACCES); 159 160 Adapter = (struct e1000g *)ksp->ks_private; 161 ASSERT(Adapter != NULL); 162 e1000g_ksp = (p_e1000g_stat_t)ksp->ks_data; 163 ASSERT(e1000g_ksp != NULL); 164 hw = &Adapter->shared; 165 166 tx_ring = Adapter->tx_ring; 167 rx_ring = Adapter->rx_ring; 168 169 rw_enter(&Adapter->chip_lock, RW_WRITER); 170 171 e1000g_ksp->link_speed.value.ul = Adapter->link_speed; 172 e1000g_ksp->reset_count.value.ul = Adapter->reset_count; 173 174 e1000g_ksp->rx_error.value.ul = rx_ring->stat_error; 175 e1000g_ksp->rx_esballoc_fail.value.ul = rx_ring->stat_esballoc_fail; 176 e1000g_ksp->rx_allocb_fail.value.ul = rx_ring->stat_allocb_fail; 177 178 e1000g_ksp->tx_no_swpkt.value.ul = tx_ring->stat_no_swpkt; 179 e1000g_ksp->tx_no_desc.value.ul = tx_ring->stat_no_desc; 180 e1000g_ksp->tx_send_fail.value.ul = tx_ring->stat_send_fail; 181 e1000g_ksp->tx_reschedule.value.ul = tx_ring->stat_reschedule; 182 e1000g_ksp->tx_over_size.value.ul = tx_ring->stat_over_size; 183 184 #ifdef E1000G_DEBUG 185 e1000g_ksp->rx_none.value.ul = rx_ring->stat_none; 186 e1000g_ksp->rx_multi_desc.value.ul = rx_ring->stat_multi_desc; 187 e1000g_ksp->rx_no_freepkt.value.ul = rx_ring->stat_no_freepkt; 188 e1000g_ksp->rx_avail_freepkt.value.ul = rx_ring->avail_freepkt + 189 rx_ring->recycle_freepkt; 190 191 e1000g_ksp->tx_under_size.value.ul = tx_ring->stat_under_size; 192 e1000g_ksp->tx_exceed_frags.value.ul = tx_ring->stat_exceed_frags; 193 e1000g_ksp->tx_empty_frags.value.ul = tx_ring->stat_empty_frags; 194 e1000g_ksp->tx_recycle.value.ul = tx_ring->stat_recycle; 195 e1000g_ksp->tx_recycle_intr.value.ul = tx_ring->stat_recycle_intr; 196 e1000g_ksp->tx_recycle_retry.value.ul = tx_ring->stat_recycle_retry; 197 e1000g_ksp->tx_recycle_none.value.ul = tx_ring->stat_recycle_none; 198 e1000g_ksp->tx_copy.value.ul = tx_ring->stat_copy; 199 e1000g_ksp->tx_bind.value.ul = tx_ring->stat_bind; 200 e1000g_ksp->tx_multi_copy.value.ul = tx_ring->stat_multi_copy; 201 e1000g_ksp->tx_multi_cookie.value.ul = tx_ring->stat_multi_cookie; 202 e1000g_ksp->tx_lack_desc.value.ul = tx_ring->stat_lack_desc; 203 #endif 204 205 /* 206 * Standard Stats 207 */ 208 e1000g_ksp->Mpc.value.ul += E1000_READ_REG(hw, E1000_MPC); 209 e1000g_ksp->Rlec.value.ul += E1000_READ_REG(hw, E1000_RLEC); 210 e1000g_ksp->Xonrxc.value.ul += E1000_READ_REG(hw, E1000_XONRXC); 211 e1000g_ksp->Xontxc.value.ul += E1000_READ_REG(hw, E1000_XONTXC); 212 e1000g_ksp->Xoffrxc.value.ul += E1000_READ_REG(hw, E1000_XOFFRXC); 213 e1000g_ksp->Xofftxc.value.ul += E1000_READ_REG(hw, E1000_XOFFTXC); 214 e1000g_ksp->Fcruc.value.ul += E1000_READ_REG(hw, E1000_FCRUC); 215 216 if ((hw->mac.type != e1000_ich8lan) && 217 (hw->mac.type != e1000_ich9lan) && 218 (hw->mac.type != e1000_ich10lan)) { 219 e1000g_ksp->Symerrs.value.ul += 220 E1000_READ_REG(hw, E1000_SYMERRS); 221 #ifdef E1000G_DEBUG 222 e1000g_ksp->Prc64.value.ul += 223 E1000_READ_REG(hw, E1000_PRC64); 224 e1000g_ksp->Prc127.value.ul += 225 E1000_READ_REG(hw, E1000_PRC127); 226 e1000g_ksp->Prc255.value.ul += 227 E1000_READ_REG(hw, E1000_PRC255); 228 e1000g_ksp->Prc511.value.ul += 229 E1000_READ_REG(hw, E1000_PRC511); 230 e1000g_ksp->Prc1023.value.ul += 231 E1000_READ_REG(hw, E1000_PRC1023); 232 e1000g_ksp->Prc1522.value.ul += 233 E1000_READ_REG(hw, E1000_PRC1522); 234 235 e1000g_ksp->Ptc64.value.ul += 236 E1000_READ_REG(hw, E1000_PTC64); 237 e1000g_ksp->Ptc127.value.ul += 238 E1000_READ_REG(hw, E1000_PTC127); 239 e1000g_ksp->Ptc255.value.ul += 240 E1000_READ_REG(hw, E1000_PTC255); 241 e1000g_ksp->Ptc511.value.ul += 242 E1000_READ_REG(hw, E1000_PTC511); 243 e1000g_ksp->Ptc1023.value.ul += 244 E1000_READ_REG(hw, E1000_PTC1023); 245 e1000g_ksp->Ptc1522.value.ul += 246 E1000_READ_REG(hw, E1000_PTC1522); 247 #endif 248 } 249 250 e1000g_ksp->Gprc.value.ul += E1000_READ_REG(hw, E1000_GPRC); 251 e1000g_ksp->Gptc.value.ul += E1000_READ_REG(hw, E1000_GPTC); 252 e1000g_ksp->Ruc.value.ul += E1000_READ_REG(hw, E1000_RUC); 253 e1000g_ksp->Rfc.value.ul += E1000_READ_REG(hw, E1000_RFC); 254 e1000g_ksp->Roc.value.ul += E1000_READ_REG(hw, E1000_ROC); 255 e1000g_ksp->Rjc.value.ul += E1000_READ_REG(hw, E1000_RJC); 256 e1000g_ksp->Tpr.value.ul += E1000_READ_REG(hw, E1000_TPR); 257 e1000g_ksp->Tncrs.value.ul += E1000_READ_REG(hw, E1000_TNCRS); 258 e1000g_ksp->Tsctc.value.ul += E1000_READ_REG(hw, E1000_TSCTC); 259 e1000g_ksp->Tsctfc.value.ul += E1000_READ_REG(hw, E1000_TSCTFC); 260 261 /* 262 * Adaptive Calculations 263 */ 264 hw->mac.tx_packet_delta = E1000_READ_REG(hw, E1000_TPT); 265 e1000g_ksp->Tpt.value.ul += hw->mac.tx_packet_delta; 266 267 /* 268 * The 64-bit register will reset whenever the upper 269 * 32 bits are read. So we need to read the lower 270 * 32 bits first, then read the upper 32 bits. 271 */ 272 low_val = E1000_READ_REG(hw, E1000_GORCL); 273 high_val = E1000_READ_REG(hw, E1000_GORCH); 274 val = (uint64_t)e1000g_ksp->Gorh.value.ul << 32 | 275 (uint64_t)e1000g_ksp->Gorl.value.ul; 276 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 277 e1000g_ksp->Gorl.value.ul = (uint32_t)val; 278 e1000g_ksp->Gorh.value.ul = (uint32_t)(val >> 32); 279 280 low_val = E1000_READ_REG(hw, E1000_GOTCL); 281 high_val = E1000_READ_REG(hw, E1000_GOTCH); 282 val = (uint64_t)e1000g_ksp->Goth.value.ul << 32 | 283 (uint64_t)e1000g_ksp->Gotl.value.ul; 284 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 285 e1000g_ksp->Gotl.value.ul = (uint32_t)val; 286 e1000g_ksp->Goth.value.ul = (uint32_t)(val >> 32); 287 288 low_val = E1000_READ_REG(hw, E1000_TORL); 289 high_val = E1000_READ_REG(hw, E1000_TORH); 290 val = (uint64_t)e1000g_ksp->Torh.value.ul << 32 | 291 (uint64_t)e1000g_ksp->Torl.value.ul; 292 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 293 e1000g_ksp->Torl.value.ul = (uint32_t)val; 294 e1000g_ksp->Torh.value.ul = (uint32_t)(val >> 32); 295 296 low_val = E1000_READ_REG(hw, E1000_TOTL); 297 high_val = E1000_READ_REG(hw, E1000_TOTH); 298 val = (uint64_t)e1000g_ksp->Toth.value.ul << 32 | 299 (uint64_t)e1000g_ksp->Totl.value.ul; 300 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 301 e1000g_ksp->Totl.value.ul = (uint32_t)val; 302 e1000g_ksp->Toth.value.ul = (uint32_t)(val >> 32); 303 304 rw_exit(&Adapter->chip_lock); 305 306 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 307 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED); 308 309 return (0); 310 } 311 312 int 313 e1000g_m_stat(void *arg, uint_t stat, uint64_t *val) 314 { 315 struct e1000g *Adapter = (struct e1000g *)arg; 316 struct e1000_hw *hw = &Adapter->shared; 317 p_e1000g_stat_t e1000g_ksp; 318 uint32_t low_val, high_val; 319 320 e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data; 321 322 rw_enter(&Adapter->chip_lock, RW_READER); 323 324 if (Adapter->e1000g_state & E1000G_SUSPENDED) { 325 rw_exit(&Adapter->chip_lock); 326 return (ECANCELED); 327 } 328 329 switch (stat) { 330 case MAC_STAT_IFSPEED: 331 *val = Adapter->link_speed * 1000000ull; 332 break; 333 334 case MAC_STAT_MULTIRCV: 335 e1000g_ksp->Mprc.value.ul += 336 E1000_READ_REG(hw, E1000_MPRC); 337 *val = e1000g_ksp->Mprc.value.ul; 338 break; 339 340 case MAC_STAT_BRDCSTRCV: 341 e1000g_ksp->Bprc.value.ul += 342 E1000_READ_REG(hw, E1000_BPRC); 343 *val = e1000g_ksp->Bprc.value.ul; 344 break; 345 346 case MAC_STAT_MULTIXMT: 347 e1000g_ksp->Mptc.value.ul += 348 E1000_READ_REG(hw, E1000_MPTC); 349 *val = e1000g_ksp->Mptc.value.ul; 350 break; 351 352 case MAC_STAT_BRDCSTXMT: 353 e1000g_ksp->Bptc.value.ul += 354 E1000_READ_REG(hw, E1000_BPTC); 355 *val = e1000g_ksp->Bptc.value.ul; 356 break; 357 358 case MAC_STAT_NORCVBUF: 359 e1000g_ksp->Rnbc.value.ul += 360 E1000_READ_REG(hw, E1000_RNBC); 361 *val = e1000g_ksp->Rnbc.value.ul; 362 break; 363 364 case MAC_STAT_IERRORS: 365 e1000g_ksp->Rxerrc.value.ul += 366 E1000_READ_REG(hw, E1000_RXERRC); 367 e1000g_ksp->Algnerrc.value.ul += 368 E1000_READ_REG(hw, E1000_ALGNERRC); 369 e1000g_ksp->Rlec.value.ul += 370 E1000_READ_REG(hw, E1000_RLEC); 371 e1000g_ksp->Crcerrs.value.ul += 372 E1000_READ_REG(hw, E1000_CRCERRS); 373 e1000g_ksp->Cexterr.value.ul += 374 E1000_READ_REG(hw, E1000_CEXTERR); 375 *val = e1000g_ksp->Rxerrc.value.ul + 376 e1000g_ksp->Algnerrc.value.ul + 377 e1000g_ksp->Rlec.value.ul + 378 e1000g_ksp->Crcerrs.value.ul + 379 e1000g_ksp->Cexterr.value.ul; 380 break; 381 382 case MAC_STAT_NOXMTBUF: 383 *val = Adapter->tx_ring->stat_no_desc; 384 break; 385 386 case MAC_STAT_OERRORS: 387 e1000g_ksp->Ecol.value.ul += 388 E1000_READ_REG(hw, E1000_ECOL); 389 *val = e1000g_ksp->Ecol.value.ul; 390 break; 391 392 case MAC_STAT_COLLISIONS: 393 e1000g_ksp->Colc.value.ul += 394 E1000_READ_REG(hw, E1000_COLC); 395 *val = e1000g_ksp->Colc.value.ul; 396 break; 397 398 case MAC_STAT_RBYTES: 399 /* 400 * The 64-bit register will reset whenever the upper 401 * 32 bits are read. So we need to read the lower 402 * 32 bits first, then read the upper 32 bits. 403 */ 404 low_val = E1000_READ_REG(hw, E1000_TORL); 405 high_val = E1000_READ_REG(hw, E1000_TORH); 406 *val = (uint64_t)e1000g_ksp->Torh.value.ul << 32 | 407 (uint64_t)e1000g_ksp->Torl.value.ul; 408 *val += (uint64_t)high_val << 32 | (uint64_t)low_val; 409 410 e1000g_ksp->Torl.value.ul = (uint32_t)*val; 411 e1000g_ksp->Torh.value.ul = (uint32_t)(*val >> 32); 412 break; 413 414 case MAC_STAT_IPACKETS: 415 e1000g_ksp->Tpr.value.ul += 416 E1000_READ_REG(hw, E1000_TPR); 417 *val = e1000g_ksp->Tpr.value.ul; 418 break; 419 420 case MAC_STAT_OBYTES: 421 /* 422 * The 64-bit register will reset whenever the upper 423 * 32 bits are read. So we need to read the lower 424 * 32 bits first, then read the upper 32 bits. 425 */ 426 low_val = E1000_READ_REG(hw, E1000_TOTL); 427 high_val = E1000_READ_REG(hw, E1000_TOTH); 428 *val = (uint64_t)e1000g_ksp->Toth.value.ul << 32 | 429 (uint64_t)e1000g_ksp->Totl.value.ul; 430 *val += (uint64_t)high_val << 32 | (uint64_t)low_val; 431 432 e1000g_ksp->Totl.value.ul = (uint32_t)*val; 433 e1000g_ksp->Toth.value.ul = (uint32_t)(*val >> 32); 434 break; 435 436 case MAC_STAT_OPACKETS: 437 e1000g_ksp->Tpt.value.ul += 438 E1000_READ_REG(hw, E1000_TPT); 439 *val = e1000g_ksp->Tpt.value.ul; 440 break; 441 442 case ETHER_STAT_ALIGN_ERRORS: 443 e1000g_ksp->Algnerrc.value.ul += 444 E1000_READ_REG(hw, E1000_ALGNERRC); 445 *val = e1000g_ksp->Algnerrc.value.ul; 446 break; 447 448 case ETHER_STAT_FCS_ERRORS: 449 e1000g_ksp->Crcerrs.value.ul += 450 E1000_READ_REG(hw, E1000_CRCERRS); 451 *val = e1000g_ksp->Crcerrs.value.ul; 452 break; 453 454 case ETHER_STAT_SQE_ERRORS: 455 e1000g_ksp->Sec.value.ul += 456 E1000_READ_REG(hw, E1000_SEC); 457 *val = e1000g_ksp->Sec.value.ul; 458 break; 459 460 case ETHER_STAT_CARRIER_ERRORS: 461 e1000g_ksp->Cexterr.value.ul += 462 E1000_READ_REG(hw, E1000_CEXTERR); 463 *val = e1000g_ksp->Cexterr.value.ul; 464 break; 465 466 case ETHER_STAT_EX_COLLISIONS: 467 e1000g_ksp->Ecol.value.ul += 468 E1000_READ_REG(hw, E1000_ECOL); 469 *val = e1000g_ksp->Ecol.value.ul; 470 break; 471 472 case ETHER_STAT_TX_LATE_COLLISIONS: 473 e1000g_ksp->Latecol.value.ul += 474 E1000_READ_REG(hw, E1000_LATECOL); 475 *val = e1000g_ksp->Latecol.value.ul; 476 break; 477 478 case ETHER_STAT_DEFER_XMTS: 479 e1000g_ksp->Dc.value.ul += 480 E1000_READ_REG(hw, E1000_DC); 481 *val = e1000g_ksp->Dc.value.ul; 482 break; 483 484 case ETHER_STAT_FIRST_COLLISIONS: 485 e1000g_ksp->Scc.value.ul += 486 E1000_READ_REG(hw, E1000_SCC); 487 *val = e1000g_ksp->Scc.value.ul; 488 break; 489 490 case ETHER_STAT_MULTI_COLLISIONS: 491 e1000g_ksp->Mcc.value.ul += 492 E1000_READ_REG(hw, E1000_MCC); 493 *val = e1000g_ksp->Mcc.value.ul; 494 break; 495 496 case ETHER_STAT_MACRCV_ERRORS: 497 e1000g_ksp->Rxerrc.value.ul += 498 E1000_READ_REG(hw, E1000_RXERRC); 499 *val = e1000g_ksp->Rxerrc.value.ul; 500 break; 501 502 case ETHER_STAT_MACXMT_ERRORS: 503 e1000g_ksp->Ecol.value.ul += 504 E1000_READ_REG(hw, E1000_ECOL); 505 *val = e1000g_ksp->Ecol.value.ul; 506 break; 507 508 case ETHER_STAT_TOOLONG_ERRORS: 509 e1000g_ksp->Roc.value.ul += 510 E1000_READ_REG(hw, E1000_ROC); 511 *val = e1000g_ksp->Roc.value.ul; 512 break; 513 514 case ETHER_STAT_XCVR_ADDR: 515 /* The Internal PHY's MDI address for each MAC is 1 */ 516 *val = 1; 517 break; 518 519 case ETHER_STAT_XCVR_ID: 520 *val = hw->phy.id | hw->phy.revision; 521 break; 522 523 case ETHER_STAT_XCVR_INUSE: 524 switch (Adapter->link_speed) { 525 case SPEED_1000: 526 *val = 527 (hw->phy.media_type == e1000_media_type_copper) ? 528 XCVR_1000T : XCVR_1000X; 529 break; 530 case SPEED_100: 531 *val = 532 (hw->phy.media_type == e1000_media_type_copper) ? 533 (Adapter->phy_status & MII_SR_100T4_CAPS) ? 534 XCVR_100T4 : XCVR_100T2 : XCVR_100X; 535 break; 536 case SPEED_10: 537 *val = XCVR_10; 538 break; 539 default: 540 *val = XCVR_NONE; 541 break; 542 } 543 break; 544 545 case ETHER_STAT_CAP_1000FDX: 546 *val = Adapter->param_1000fdx_cap; 547 break; 548 549 case ETHER_STAT_CAP_1000HDX: 550 *val = Adapter->param_1000hdx_cap; 551 break; 552 553 case ETHER_STAT_CAP_100FDX: 554 *val = Adapter->param_100fdx_cap; 555 break; 556 557 case ETHER_STAT_CAP_100HDX: 558 *val = Adapter->param_100hdx_cap; 559 break; 560 561 case ETHER_STAT_CAP_10FDX: 562 *val = Adapter->param_10fdx_cap; 563 break; 564 565 case ETHER_STAT_CAP_10HDX: 566 *val = Adapter->param_10hdx_cap; 567 break; 568 569 case ETHER_STAT_CAP_ASMPAUSE: 570 *val = Adapter->param_asym_pause_cap; 571 break; 572 573 case ETHER_STAT_CAP_PAUSE: 574 *val = Adapter->param_pause_cap; 575 break; 576 577 case ETHER_STAT_CAP_AUTONEG: 578 *val = Adapter->param_autoneg_cap; 579 break; 580 581 case ETHER_STAT_ADV_CAP_1000FDX: 582 *val = Adapter->param_adv_1000fdx; 583 break; 584 585 case ETHER_STAT_ADV_CAP_1000HDX: 586 *val = Adapter->param_adv_1000hdx; 587 break; 588 589 case ETHER_STAT_ADV_CAP_100FDX: 590 *val = Adapter->param_adv_100fdx; 591 break; 592 593 case ETHER_STAT_ADV_CAP_100HDX: 594 *val = Adapter->param_adv_100hdx; 595 break; 596 597 case ETHER_STAT_ADV_CAP_10FDX: 598 *val = Adapter->param_adv_10fdx; 599 break; 600 601 case ETHER_STAT_ADV_CAP_10HDX: 602 *val = Adapter->param_adv_10hdx; 603 break; 604 605 case ETHER_STAT_ADV_CAP_ASMPAUSE: 606 *val = Adapter->param_adv_asym_pause; 607 break; 608 609 case ETHER_STAT_ADV_CAP_PAUSE: 610 *val = Adapter->param_adv_pause; 611 break; 612 613 case ETHER_STAT_ADV_CAP_AUTONEG: 614 *val = hw->mac.autoneg; 615 break; 616 617 case ETHER_STAT_LP_CAP_1000FDX: 618 *val = Adapter->param_lp_1000fdx; 619 break; 620 621 case ETHER_STAT_LP_CAP_1000HDX: 622 *val = Adapter->param_lp_1000hdx; 623 break; 624 625 case ETHER_STAT_LP_CAP_100FDX: 626 *val = Adapter->param_lp_100fdx; 627 break; 628 629 case ETHER_STAT_LP_CAP_100HDX: 630 *val = Adapter->param_lp_100hdx; 631 break; 632 633 case ETHER_STAT_LP_CAP_10FDX: 634 *val = Adapter->param_lp_10fdx; 635 break; 636 637 case ETHER_STAT_LP_CAP_10HDX: 638 *val = Adapter->param_lp_10hdx; 639 break; 640 641 case ETHER_STAT_LP_CAP_ASMPAUSE: 642 *val = Adapter->param_lp_asym_pause; 643 break; 644 645 case ETHER_STAT_LP_CAP_PAUSE: 646 *val = Adapter->param_lp_pause; 647 break; 648 649 case ETHER_STAT_LP_CAP_AUTONEG: 650 *val = Adapter->param_lp_autoneg; 651 break; 652 653 case ETHER_STAT_LINK_ASMPAUSE: 654 *val = Adapter->param_asym_pause_cap; 655 break; 656 657 case ETHER_STAT_LINK_PAUSE: 658 *val = Adapter->param_pause_cap; 659 break; 660 661 case ETHER_STAT_LINK_AUTONEG: 662 *val = hw->mac.autoneg; 663 break; 664 665 case ETHER_STAT_LINK_DUPLEX: 666 *val = (Adapter->link_duplex == FULL_DUPLEX) ? 667 LINK_DUPLEX_FULL : LINK_DUPLEX_HALF; 668 break; 669 670 case ETHER_STAT_CAP_100T4: 671 *val = Adapter->param_100t4_cap; 672 break; 673 674 case ETHER_STAT_ADV_CAP_100T4: 675 *val = Adapter->param_adv_100t4; 676 break; 677 678 case ETHER_STAT_LP_CAP_100T4: 679 *val = Adapter->param_lp_100t4; 680 break; 681 682 default: 683 rw_exit(&Adapter->chip_lock); 684 return (ENOTSUP); 685 } 686 687 rw_exit(&Adapter->chip_lock); 688 689 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 690 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED); 691 692 return (0); 693 } 694 695 /* 696 * e1000g_init_stats - initialize kstat data structures 697 * 698 * This routine will create and initialize the driver private 699 * statistics counters. 700 */ 701 int 702 e1000g_init_stats(struct e1000g *Adapter) 703 { 704 kstat_t *ksp; 705 p_e1000g_stat_t e1000g_ksp; 706 707 /* 708 * Create and init kstat 709 */ 710 ksp = kstat_create(WSNAME, ddi_get_instance(Adapter->dip), 711 "statistics", "net", KSTAT_TYPE_NAMED, 712 sizeof (e1000g_stat_t) / sizeof (kstat_named_t), 0); 713 714 if (ksp == NULL) { 715 e1000g_log(Adapter, CE_WARN, 716 "Could not create kernel statistics\n"); 717 return (DDI_FAILURE); 718 } 719 720 Adapter->e1000g_ksp = ksp; /* Fill in the Adapters ksp */ 721 722 e1000g_ksp = (p_e1000g_stat_t)ksp->ks_data; 723 724 /* 725 * Initialize all the statistics 726 */ 727 kstat_named_init(&e1000g_ksp->link_speed, "link_speed", 728 KSTAT_DATA_ULONG); 729 kstat_named_init(&e1000g_ksp->reset_count, "Reset Count", 730 KSTAT_DATA_ULONG); 731 732 kstat_named_init(&e1000g_ksp->rx_error, "Rx Error", 733 KSTAT_DATA_ULONG); 734 kstat_named_init(&e1000g_ksp->rx_esballoc_fail, "Rx Desballoc Failure", 735 KSTAT_DATA_ULONG); 736 kstat_named_init(&e1000g_ksp->rx_allocb_fail, "Rx Allocb Failure", 737 KSTAT_DATA_ULONG); 738 739 kstat_named_init(&e1000g_ksp->tx_no_desc, "Tx No Desc", 740 KSTAT_DATA_ULONG); 741 kstat_named_init(&e1000g_ksp->tx_no_swpkt, "Tx No Buffer", 742 KSTAT_DATA_ULONG); 743 kstat_named_init(&e1000g_ksp->tx_send_fail, "Tx Send Failure", 744 KSTAT_DATA_ULONG); 745 kstat_named_init(&e1000g_ksp->tx_over_size, "Tx Pkt Over Size", 746 KSTAT_DATA_ULONG); 747 kstat_named_init(&e1000g_ksp->tx_reschedule, "Tx Reschedule", 748 KSTAT_DATA_ULONG); 749 750 kstat_named_init(&e1000g_ksp->Mpc, "Recv_Missed_Packets", 751 KSTAT_DATA_ULONG); 752 kstat_named_init(&e1000g_ksp->Symerrs, "Recv_Symbol_Errors", 753 KSTAT_DATA_ULONG); 754 kstat_named_init(&e1000g_ksp->Rlec, "Recv_Length_Errors", 755 KSTAT_DATA_ULONG); 756 kstat_named_init(&e1000g_ksp->Xonrxc, "XONs_Recvd", 757 KSTAT_DATA_ULONG); 758 kstat_named_init(&e1000g_ksp->Xontxc, "XONs_Xmitd", 759 KSTAT_DATA_ULONG); 760 kstat_named_init(&e1000g_ksp->Xoffrxc, "XOFFs_Recvd", 761 KSTAT_DATA_ULONG); 762 kstat_named_init(&e1000g_ksp->Xofftxc, "XOFFs_Xmitd", 763 KSTAT_DATA_ULONG); 764 kstat_named_init(&e1000g_ksp->Fcruc, "Recv_Unsupport_FC_Pkts", 765 KSTAT_DATA_ULONG); 766 #ifdef E1000G_DEBUG 767 kstat_named_init(&e1000g_ksp->Prc64, "Pkts_Recvd_( 64b)", 768 KSTAT_DATA_ULONG); 769 kstat_named_init(&e1000g_ksp->Prc127, "Pkts_Recvd_( 65- 127b)", 770 KSTAT_DATA_ULONG); 771 kstat_named_init(&e1000g_ksp->Prc255, "Pkts_Recvd_( 127- 255b)", 772 KSTAT_DATA_ULONG); 773 kstat_named_init(&e1000g_ksp->Prc511, "Pkts_Recvd_( 256- 511b)", 774 KSTAT_DATA_ULONG); 775 kstat_named_init(&e1000g_ksp->Prc1023, "Pkts_Recvd_( 511-1023b)", 776 KSTAT_DATA_ULONG); 777 kstat_named_init(&e1000g_ksp->Prc1522, "Pkts_Recvd_(1024-1522b)", 778 KSTAT_DATA_ULONG); 779 #endif 780 kstat_named_init(&e1000g_ksp->Gprc, "Good_Pkts_Recvd", 781 KSTAT_DATA_ULONG); 782 kstat_named_init(&e1000g_ksp->Gptc, "Good_Pkts_Xmitd", 783 KSTAT_DATA_ULONG); 784 kstat_named_init(&e1000g_ksp->Gorl, "Good_Octets_Recvd_Lo", 785 KSTAT_DATA_ULONG); 786 kstat_named_init(&e1000g_ksp->Gorh, "Good_Octets_Recvd_Hi", 787 KSTAT_DATA_ULONG); 788 kstat_named_init(&e1000g_ksp->Gotl, "Good_Octets_Xmitd_Lo", 789 KSTAT_DATA_ULONG); 790 kstat_named_init(&e1000g_ksp->Goth, "Good_Octets_Xmitd_Hi", 791 KSTAT_DATA_ULONG); 792 kstat_named_init(&e1000g_ksp->Ruc, "Recv_Undersize", 793 KSTAT_DATA_ULONG); 794 kstat_named_init(&e1000g_ksp->Rfc, "Recv_Frag", 795 KSTAT_DATA_ULONG); 796 kstat_named_init(&e1000g_ksp->Roc, "Recv_Oversize", 797 KSTAT_DATA_ULONG); 798 kstat_named_init(&e1000g_ksp->Rjc, "Recv_Jabber", 799 KSTAT_DATA_ULONG); 800 kstat_named_init(&e1000g_ksp->Torl, "Total_Octets_Recvd_Lo", 801 KSTAT_DATA_ULONG); 802 kstat_named_init(&e1000g_ksp->Torh, "Total_Octets_Recvd_Hi", 803 KSTAT_DATA_ULONG); 804 kstat_named_init(&e1000g_ksp->Totl, "Total_Octets_Xmitd_Lo", 805 KSTAT_DATA_ULONG); 806 kstat_named_init(&e1000g_ksp->Toth, "Total_Octets_Xmitd_Hi", 807 KSTAT_DATA_ULONG); 808 kstat_named_init(&e1000g_ksp->Tpr, "Total_Packets_Recvd", 809 KSTAT_DATA_ULONG); 810 kstat_named_init(&e1000g_ksp->Tpt, "Total_Packets_Xmitd", 811 KSTAT_DATA_ULONG); 812 #ifdef E1000G_DEBUG 813 kstat_named_init(&e1000g_ksp->Ptc64, "Pkts_Xmitd_( 64b)", 814 KSTAT_DATA_ULONG); 815 kstat_named_init(&e1000g_ksp->Ptc127, "Pkts_Xmitd_( 65- 127b)", 816 KSTAT_DATA_ULONG); 817 kstat_named_init(&e1000g_ksp->Ptc255, "Pkts_Xmitd_( 128- 255b)", 818 KSTAT_DATA_ULONG); 819 kstat_named_init(&e1000g_ksp->Ptc511, "Pkts_Xmitd_( 255- 511b)", 820 KSTAT_DATA_ULONG); 821 kstat_named_init(&e1000g_ksp->Ptc1023, "Pkts_Xmitd_( 512-1023b)", 822 KSTAT_DATA_ULONG); 823 kstat_named_init(&e1000g_ksp->Ptc1522, "Pkts_Xmitd_(1024-1522b)", 824 KSTAT_DATA_ULONG); 825 #endif 826 kstat_named_init(&e1000g_ksp->Tncrs, "Xmit_with_No_CRS", 827 KSTAT_DATA_ULONG); 828 kstat_named_init(&e1000g_ksp->Tsctc, "Xmit_TCP_Seg_Contexts", 829 KSTAT_DATA_ULONG); 830 kstat_named_init(&e1000g_ksp->Tsctfc, "Xmit_TCP_Seg_Contexts_Fail", 831 KSTAT_DATA_ULONG); 832 833 #ifdef E1000G_DEBUG 834 kstat_named_init(&e1000g_ksp->rx_none, "Rx No Data", 835 KSTAT_DATA_ULONG); 836 kstat_named_init(&e1000g_ksp->rx_multi_desc, "Rx Span Multi Desc", 837 KSTAT_DATA_ULONG); 838 kstat_named_init(&e1000g_ksp->rx_no_freepkt, "Rx Freelist Empty", 839 KSTAT_DATA_ULONG); 840 kstat_named_init(&e1000g_ksp->rx_avail_freepkt, "Rx Freelist Avail", 841 KSTAT_DATA_ULONG); 842 843 kstat_named_init(&e1000g_ksp->tx_under_size, "Tx Pkt Under Size", 844 KSTAT_DATA_ULONG); 845 kstat_named_init(&e1000g_ksp->tx_exceed_frags, "Tx Exceed Max Frags", 846 KSTAT_DATA_ULONG); 847 kstat_named_init(&e1000g_ksp->tx_empty_frags, "Tx Empty Frags", 848 KSTAT_DATA_ULONG); 849 kstat_named_init(&e1000g_ksp->tx_recycle, "Tx Recycle", 850 KSTAT_DATA_ULONG); 851 kstat_named_init(&e1000g_ksp->tx_recycle_intr, "Tx Recycle Intr", 852 KSTAT_DATA_ULONG); 853 kstat_named_init(&e1000g_ksp->tx_recycle_retry, "Tx Recycle Retry", 854 KSTAT_DATA_ULONG); 855 kstat_named_init(&e1000g_ksp->tx_recycle_none, "Tx Recycled None", 856 KSTAT_DATA_ULONG); 857 kstat_named_init(&e1000g_ksp->tx_copy, "Tx Send Copy", 858 KSTAT_DATA_ULONG); 859 kstat_named_init(&e1000g_ksp->tx_bind, "Tx Send Bind", 860 KSTAT_DATA_ULONG); 861 kstat_named_init(&e1000g_ksp->tx_multi_copy, "Tx Copy Multi Frags", 862 KSTAT_DATA_ULONG); 863 kstat_named_init(&e1000g_ksp->tx_multi_cookie, "Tx Bind Multi Cookies", 864 KSTAT_DATA_ULONG); 865 kstat_named_init(&e1000g_ksp->tx_lack_desc, "Tx Desc Insufficient", 866 KSTAT_DATA_ULONG); 867 #endif 868 869 /* 870 * Function to provide kernel stat update on demand 871 */ 872 ksp->ks_update = e1000g_update_stats; 873 874 /* 875 * Pointer into provider's raw statistics 876 */ 877 ksp->ks_private = (void *)Adapter; 878 879 /* 880 * Add kstat to systems kstat chain 881 */ 882 kstat_install(ksp); 883 884 return (DDI_SUCCESS); 885 } 886