1 /****************************************************************************** 2 3 Copyright (c) 2001-2008, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 #ifndef _E1000_82541_H_ 36 #define _E1000_82541_H_ 37 38 #ifdef __cplusplus 39 extern "C" { 40 #endif 41 42 #define NVM_WORD_SIZE_BASE_SHIFT_82541 (NVM_WORD_SIZE_BASE_SHIFT + 1) 43 44 #define IGP01E1000_PHY_CHANNEL_NUM 4 45 46 #define IGP01E1000_PHY_AGC_A 0x1172 47 #define IGP01E1000_PHY_AGC_B 0x1272 48 #define IGP01E1000_PHY_AGC_C 0x1472 49 #define IGP01E1000_PHY_AGC_D 0x1872 50 51 #define IGP01E1000_PHY_AGC_PARAM_A 0x1171 52 #define IGP01E1000_PHY_AGC_PARAM_B 0x1271 53 #define IGP01E1000_PHY_AGC_PARAM_C 0x1471 54 #define IGP01E1000_PHY_AGC_PARAM_D 0x1871 55 56 #define IGP01E1000_PHY_EDAC_MU_INDEX 0xC000 57 #define IGP01E1000_PHY_EDAC_SIGN_EXT_9_BITS 0x8000 58 59 #define IGP01E1000_PHY_DSP_RESET 0x1F33 60 61 #define IGP01E1000_PHY_DSP_FFE 0x1F35 62 #define IGP01E1000_PHY_DSP_FFE_CM_CP 0x0069 63 #define IGP01E1000_PHY_DSP_FFE_DEFAULT 0x002A 64 65 #define IGP01E1000_IEEE_FORCE_GIG 0x0140 66 #define IGP01E1000_IEEE_RESTART_AUTONEG 0x3300 67 68 #define IGP01E1000_AGC_LENGTH_SHIFT 7 69 #define IGP01E1000_AGC_RANGE 10 70 71 #define FFE_IDLE_ERR_COUNT_TIMEOUT_20 20 72 #define FFE_IDLE_ERR_COUNT_TIMEOUT_100 100 73 74 #define IGP01E1000_ANALOG_FUSE_STATUS 0x20D0 75 #define IGP01E1000_ANALOG_SPARE_FUSE_STATUS 0x20D1 76 #define IGP01E1000_ANALOG_FUSE_CONTROL 0x20DC 77 #define IGP01E1000_ANALOG_FUSE_BYPASS 0x20DE 78 79 #define IGP01E1000_ANALOG_SPARE_FUSE_ENABLED 0x0100 80 #define IGP01E1000_ANALOG_FUSE_FINE_MASK 0x0F80 81 #define IGP01E1000_ANALOG_FUSE_COARSE_MASK 0x0070 82 #define IGP01E1000_ANALOG_FUSE_COARSE_THRESH 0x0040 83 #define IGP01E1000_ANALOG_FUSE_COARSE_10 0x0010 84 #define IGP01E1000_ANALOG_FUSE_FINE_1 0x0080 85 #define IGP01E1000_ANALOG_FUSE_FINE_10 0x0500 86 #define IGP01E1000_ANALOG_FUSE_POLY_MASK 0xF000 87 #define IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL 0x0002 88 89 #define IGP01E1000_MSE_CHANNEL_D 0x000F 90 #define IGP01E1000_MSE_CHANNEL_C 0x00F0 91 #define IGP01E1000_MSE_CHANNEL_B 0x0F00 92 #define IGP01E1000_MSE_CHANNEL_A 0xF000 93 94 #define E1000_FIFO_MULTIPLIER 0x80 95 #define E1000_FIFO_HDR_SIZE 0x10 96 #define E1000_FIFO_GRANULARITY 0x10 97 #define E1000_FIFO_PAD_82547 0x3E0 98 #define E1000_ERR_FIFO_WRAP 8 99 100 #define DSP_RESET_ENABLE 0x0 101 #define DSP_RESET_DISABLE 0x2 102 #define E1000_MAX_DSP_RESETS 10 103 104 #define E1000_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1)) 105 106 void e1000_init_script_state_82541(struct e1000_hw *hw, bool state); 107 s32 e1000_fifo_workaround_82547(struct e1000_hw *hw, u16 length); 108 void e1000_update_tx_fifo_head_82547(struct e1000_hw *hw, u32 length); 109 void e1000_set_ttl_workaround_state_82541(struct e1000_hw *hw, bool state); 110 bool e1000_ttl_workaround_enabled_82541(struct e1000_hw *hw); 111 s32 e1000_igp_ttl_workaround_82547(struct e1000_hw *hw); 112 113 #ifdef __cplusplus 114 } 115 #endif 116 #endif /* _E1000_82541_H_ */ 117