xref: /illumos-gate/usr/src/uts/common/io/cpudrv.c (revision c2aa8c918a0c67f7fd93724a31efac84968fc12c)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #pragma ident	"%Z%%M%	%I%	%E% SMI"
27 
28 /*
29  * CPU Device driver. The driver is not DDI-compliant.
30  *
31  * The driver supports following features:
32  *	- Power management.
33  */
34 
35 #include <sys/types.h>
36 #include <sys/param.h>
37 #include <sys/errno.h>
38 #include <sys/modctl.h>
39 #include <sys/kmem.h>
40 #include <sys/conf.h>
41 #include <sys/cmn_err.h>
42 #include <sys/stat.h>
43 #include <sys/debug.h>
44 #include <sys/systm.h>
45 #include <sys/ddi.h>
46 #include <sys/sunddi.h>
47 
48 #include <sys/machsystm.h>
49 #include <sys/x_call.h>
50 #include <sys/cpudrv.h>
51 #include <sys/cpudrv_plat.h>
52 #include <sys/msacct.h>
53 
54 /*
55  * CPU power management
56  *
57  * The supported power saving model is to slow down the CPU (on SPARC by
58  * dividing the CPU clock and on x86 by dropping down a P-state).
59  * Periodically we determine the amount of time the CPU is running
60  * idle thread and threads in user mode during the last quantum.  If the idle
61  * thread was running less than its low water mark for current speed for
62  * number of consecutive sampling periods, or number of running threads in
63  * user mode are above its high water mark, we arrange to go to the higher
64  * speed.  If the idle thread was running more than its high water mark without
65  * dropping a number of consecutive times below the mark, and number of threads
66  * running in user mode are below its low water mark, we arrange to go to the
67  * next lower speed.  While going down, we go through all the speeds.  While
68  * going up we go to the maximum speed to minimize impact on the user, but have
69  * provisions in the driver to go to other speeds.
70  *
71  * The driver does not have knowledge of a particular implementation of this
72  * scheme and will work with all CPUs supporting this model. On SPARC, the
73  * driver determines supported speeds by looking at 'clock-divisors' property
74  * created by OBP. On x86, the driver retrieves the supported speeds from
75  * ACPI.
76  */
77 
78 /*
79  * Configuration function prototypes and data structures
80  */
81 static int cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
82 static int cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
83 static int cpudrv_power(dev_info_t *dip, int comp, int level);
84 
85 struct dev_ops cpudrv_ops = {
86 	DEVO_REV,		/* rev */
87 	0,			/* refcnt */
88 	nodev,			/* getinfo */
89 	nulldev,		/* identify */
90 	nulldev,		/* probe */
91 	cpudrv_attach,		/* attach */
92 	cpudrv_detach,		/* detach */
93 	nodev,			/* reset */
94 	(struct cb_ops *)NULL,	/* cb_ops */
95 	(struct bus_ops *)NULL,	/* bus_ops */
96 	cpudrv_power		/* power */
97 };
98 
99 static struct modldrv modldrv = {
100 	&mod_driverops,			/* modops */
101 	"CPU Driver %I%",		/* linkinfo */
102 	&cpudrv_ops,			/* dev_ops */
103 };
104 
105 static struct modlinkage modlinkage = {
106 	MODREV_1,		/* rev */
107 	&modldrv,		/* linkage */
108 	NULL
109 };
110 
111 /*
112  * Function prototypes
113  */
114 static int cpudrv_pm_init(cpudrv_devstate_t *cpudsp);
115 static void cpudrv_pm_free(cpudrv_devstate_t *cpudsp);
116 static int cpudrv_pm_comp_create(cpudrv_devstate_t *cpudsp);
117 static void cpudrv_pm_monitor_disp(void *arg);
118 static void cpudrv_pm_monitor(void *arg);
119 
120 /*
121  * Driver global variables
122  */
123 uint_t cpudrv_debug = 0;
124 void *cpudrv_state;
125 static uint_t cpudrv_pm_idle_hwm = CPUDRV_PM_IDLE_HWM;
126 static uint_t cpudrv_pm_idle_lwm = CPUDRV_PM_IDLE_LWM;
127 static uint_t cpudrv_pm_idle_buf_zone = CPUDRV_PM_IDLE_BUF_ZONE;
128 static uint_t cpudrv_pm_idle_bhwm_cnt_max = CPUDRV_PM_IDLE_BHWM_CNT_MAX;
129 static uint_t cpudrv_pm_idle_blwm_cnt_max = CPUDRV_PM_IDLE_BLWM_CNT_MAX;
130 static uint_t cpudrv_pm_user_hwm = CPUDRV_PM_USER_HWM;
131 
132 /*
133  * cpudrv_direct_pm allows user applications to directly control the
134  * power state transitions (direct pm) without following the normal
135  * direct pm protocol. This is needed because the normal protocol
136  * requires that a device only be lowered when it is idle, and be
137  * brought up when it request to do so by calling pm_raise_power().
138  * Ignoring this protocol is harmless for CPU (other than speed).
139  * Moreover it might be the case that CPU is never idle or wants
140  * to be at higher speed because of the addition CPU cycles required
141  * to run the user application.
142  *
143  * The driver will still report idle/busy status to the framework. Although
144  * framework will ignore this information for direct pm devices and not
145  * try to bring them down when idle, user applications can still use this
146  * information if they wants.
147  *
148  * In the future, provide an ioctl to control setting of this mode. In
149  * that case, this variable should move to the state structure and
150  * be protected by the lock in the state structure.
151  */
152 int cpudrv_direct_pm = 0;
153 
154 /*
155  * Arranges for the handler function to be called at the interval suitable
156  * for current speed.
157  */
158 #define	CPUDRV_PM_MONITOR_INIT(cpudsp) { \
159 	ASSERT(mutex_owned(&(cpudsp)->lock)); \
160 	(cpudsp)->cpudrv_pm.timeout_id = timeout(cpudrv_pm_monitor_disp, \
161 	    (cpudsp), (((cpudsp)->cpudrv_pm.cur_spd == NULL) ? \
162 	    CPUDRV_PM_QUANT_CNT_OTHR : \
163 	    (cpudsp)->cpudrv_pm.cur_spd->quant_cnt)); \
164 }
165 
166 /*
167  * Arranges for the handler function not to be called back.
168  */
169 #define	CPUDRV_PM_MONITOR_FINI(cpudsp) { \
170 	timeout_id_t tmp_tid; \
171 	ASSERT(mutex_owned(&(cpudsp)->lock)); \
172 	ASSERT((cpudsp)->cpudrv_pm.timeout_id); \
173 	tmp_tid = (cpudsp)->cpudrv_pm.timeout_id; \
174 	(cpudsp)->cpudrv_pm.timeout_id = 0; \
175 	mutex_exit(&(cpudsp)->lock); \
176 	(void) untimeout(tmp_tid); \
177 	mutex_enter(&(cpudsp)->cpudrv_pm.timeout_lock); \
178 	while ((cpudsp)->cpudrv_pm.timeout_count != 0) \
179 		cv_wait(&(cpudsp)->cpudrv_pm.timeout_cv, \
180 		    &(cpudsp)->cpudrv_pm.timeout_lock); \
181 	mutex_exit(&(cpudsp)->cpudrv_pm.timeout_lock); \
182 	mutex_enter(&(cpudsp)->lock); \
183 }
184 
185 int
186 _init(void)
187 {
188 	int	error;
189 
190 	DPRINTF(D_INIT, (" _init: function called\n"));
191 	if ((error = ddi_soft_state_init(&cpudrv_state,
192 	    sizeof (cpudrv_devstate_t), 0)) != 0) {
193 		return (error);
194 	}
195 
196 	if ((error = mod_install(&modlinkage)) != 0)  {
197 		ddi_soft_state_fini(&cpudrv_state);
198 	}
199 
200 	/*
201 	 * Callbacks used by the PPM driver.
202 	 */
203 	CPUDRV_PM_SET_PPM_CALLBACKS();
204 	return (error);
205 }
206 
207 int
208 _fini(void)
209 {
210 	int	error;
211 
212 	DPRINTF(D_FINI, (" _fini: function called\n"));
213 	if ((error = mod_remove(&modlinkage)) == 0) {
214 		ddi_soft_state_fini(&cpudrv_state);
215 	}
216 
217 	return (error);
218 }
219 
220 int
221 _info(struct modinfo *modinfop)
222 {
223 	return (mod_info(&modlinkage, modinfop));
224 }
225 
226 /*
227  * Driver attach(9e) entry point.
228  */
229 static int
230 cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
231 {
232 	int			instance;
233 	cpudrv_devstate_t	*cpudsp;
234 	extern pri_t		maxclsyspri;
235 
236 	instance = ddi_get_instance(dip);
237 
238 	switch (cmd) {
239 	case DDI_ATTACH:
240 		DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: "
241 		    "DDI_ATTACH called\n", instance));
242 		if (ddi_soft_state_zalloc(cpudrv_state, instance) !=
243 		    DDI_SUCCESS) {
244 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
245 			    "can't allocate state", instance);
246 			CPUDRV_PM_DISABLE();
247 			return (DDI_FAILURE);
248 		}
249 		if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) ==
250 		    NULL) {
251 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
252 			    "can't get state", instance);
253 			ddi_soft_state_free(cpudrv_state, instance);
254 			CPUDRV_PM_DISABLE();
255 			return (DDI_FAILURE);
256 		}
257 		cpudsp->dip = dip;
258 
259 		/*
260 		 * Find CPU number for this dev_info node.
261 		 */
262 		if (!cpudrv_pm_get_cpu_id(dip, &(cpudsp->cpu_id))) {
263 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
264 			    "can't convert dip to cpu_id", instance);
265 			ddi_soft_state_free(cpudrv_state, instance);
266 			CPUDRV_PM_DISABLE();
267 			return (DDI_FAILURE);
268 		}
269 		if (cpudrv_pm_init(cpudsp) != DDI_SUCCESS) {
270 			ddi_soft_state_free(cpudrv_state, instance);
271 			CPUDRV_PM_DISABLE();
272 			return (DDI_FAILURE);
273 		}
274 		if (cpudrv_pm_comp_create(cpudsp) != DDI_SUCCESS) {
275 			ddi_soft_state_free(cpudrv_state, instance);
276 			CPUDRV_PM_DISABLE();
277 			cpudrv_pm_free(cpudsp);
278 			return (DDI_FAILURE);
279 		}
280 		if (ddi_prop_update_string(DDI_DEV_T_NONE,
281 		    dip, "pm-class", "CPU") != DDI_PROP_SUCCESS) {
282 			ddi_soft_state_free(cpudrv_state, instance);
283 			CPUDRV_PM_DISABLE();
284 			cpudrv_pm_free(cpudsp);
285 			return (DDI_FAILURE);
286 		}
287 
288 		/*
289 		 * Taskq is used to dispatch routine to monitor CPU activities.
290 		 */
291 		cpudsp->cpudrv_pm.tq = taskq_create_instance(
292 		    "cpudrv_pm_monitor",
293 		    ddi_get_instance(dip), CPUDRV_PM_TASKQ_THREADS,
294 		    (maxclsyspri - 1), CPUDRV_PM_TASKQ_MIN,
295 		    CPUDRV_PM_TASKQ_MAX, TASKQ_PREPOPULATE|TASKQ_CPR_SAFE);
296 
297 		mutex_init(&cpudsp->lock, NULL, MUTEX_DRIVER, NULL);
298 		mutex_init(&cpudsp->cpudrv_pm.timeout_lock, NULL, MUTEX_DRIVER,
299 		    NULL);
300 		cv_init(&cpudsp->cpudrv_pm.timeout_cv, NULL, CV_DEFAULT, NULL);
301 
302 		/*
303 		 * Driver needs to assume that CPU is running at unknown speed
304 		 * at DDI_ATTACH and switch it to the needed speed. We assume
305 		 * that initial needed speed is full speed for us.
306 		 */
307 		/*
308 		 * We need to take the lock because cpudrv_pm_monitor()
309 		 * will start running in parallel with attach().
310 		 */
311 		mutex_enter(&cpudsp->lock);
312 		cpudsp->cpudrv_pm.cur_spd = NULL;
313 		cpudsp->cpudrv_pm.targ_spd = cpudsp->cpudrv_pm.head_spd;
314 		/*
315 		 * We don't call pm_raise_power() directly from attach because
316 		 * driver attach for a slave CPU node can happen before the
317 		 * CPU is even initialized. We just start the monitoring
318 		 * system which understands unknown speed and moves CPU
319 		 * to targ_spd when it have been initialized.
320 		 */
321 		CPUDRV_PM_MONITOR_INIT(cpudsp);
322 		mutex_exit(&cpudsp->lock);
323 
324 		CPUDRV_PM_INSTALL_TOPSPEED_CHANGE_HANDLER(cpudsp, dip);
325 
326 		ddi_report_dev(dip);
327 		return (DDI_SUCCESS);
328 
329 	case DDI_RESUME:
330 		DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: "
331 		    "DDI_RESUME called\n", instance));
332 		if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) ==
333 		    NULL) {
334 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
335 			    "can't get state", instance);
336 			return (DDI_FAILURE);
337 		}
338 		mutex_enter(&cpudsp->lock);
339 		/*
340 		 * Driver needs to assume that CPU is running at unknown speed
341 		 * at DDI_RESUME and switch it to the needed speed. We assume
342 		 * that the needed speed is full speed for us.
343 		 */
344 		cpudsp->cpudrv_pm.cur_spd = NULL;
345 		cpudsp->cpudrv_pm.targ_spd = cpudsp->cpudrv_pm.head_spd;
346 		CPUDRV_PM_MONITOR_INIT(cpudsp);
347 		mutex_exit(&cpudsp->lock);
348 		CPUDRV_PM_REDEFINE_TOPSPEED(dip);
349 		return (DDI_SUCCESS);
350 
351 	default:
352 		return (DDI_FAILURE);
353 	}
354 }
355 
356 /*
357  * Driver detach(9e) entry point.
358  */
359 static int
360 cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
361 {
362 	int			instance;
363 	cpudrv_devstate_t	*cpudsp;
364 	cpudrv_pm_t		*cpupm;
365 
366 	instance = ddi_get_instance(dip);
367 
368 	switch (cmd) {
369 	case DDI_DETACH:
370 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: "
371 		    "DDI_DETACH called\n", instance));
372 		/*
373 		 * If the only thing supported by the driver is power
374 		 * management, we can in future enhance the driver and
375 		 * framework that loads it to unload the driver when
376 		 * user has disabled CPU power management.
377 		 */
378 		return (DDI_FAILURE);
379 
380 	case DDI_SUSPEND:
381 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: "
382 		    "DDI_SUSPEND called\n", instance));
383 		if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) ==
384 		    NULL) {
385 			cmn_err(CE_WARN, "cpudrv_detach: instance %d: "
386 			    "can't get state", instance);
387 			return (DDI_FAILURE);
388 		}
389 		/*
390 		 * During a checkpoint-resume sequence, framework will
391 		 * stop interrupts to quiesce kernel activity. This will
392 		 * leave our monitoring system ineffective. Handle this
393 		 * by stopping our monitoring system and bringing CPU
394 		 * to full speed. In case we are in special direct pm
395 		 * mode, we leave the CPU at whatever speed it is. This
396 		 * is harmless other than speed.
397 		 */
398 		mutex_enter(&cpudsp->lock);
399 		cpupm = &(cpudsp->cpudrv_pm);
400 
401 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: DDI_SUSPEND - "
402 		    "cur_spd %d, head_spd %d\n", instance,
403 		    cpupm->cur_spd->pm_level, cpupm->head_spd->pm_level));
404 
405 		CPUDRV_PM_MONITOR_FINI(cpudsp);
406 
407 		if (!cpudrv_direct_pm && (cpupm->cur_spd != cpupm->head_spd)) {
408 			if (cpupm->pm_busycnt < 1) {
409 				if ((pm_busy_component(dip, CPUDRV_PM_COMP_NUM)
410 				    == DDI_SUCCESS)) {
411 					cpupm->pm_busycnt++;
412 				} else {
413 					CPUDRV_PM_MONITOR_INIT(cpudsp);
414 					mutex_exit(&cpudsp->lock);
415 					cmn_err(CE_WARN, "cpudrv_detach: "
416 					    "instance %d: can't busy CPU "
417 					    "component", instance);
418 					return (DDI_FAILURE);
419 				}
420 			}
421 			mutex_exit(&cpudsp->lock);
422 			if (pm_raise_power(dip, CPUDRV_PM_COMP_NUM,
423 			    cpupm->head_spd->pm_level) != DDI_SUCCESS) {
424 				mutex_enter(&cpudsp->lock);
425 				CPUDRV_PM_MONITOR_INIT(cpudsp);
426 				mutex_exit(&cpudsp->lock);
427 				cmn_err(CE_WARN, "cpudrv_detach: instance %d: "
428 				    "can't raise CPU power level", instance);
429 				return (DDI_FAILURE);
430 			} else {
431 				return (DDI_SUCCESS);
432 			}
433 		} else {
434 			mutex_exit(&cpudsp->lock);
435 			return (DDI_SUCCESS);
436 		}
437 
438 	default:
439 		return (DDI_FAILURE);
440 	}
441 }
442 
443 /*
444  * Driver power(9e) entry point.
445  *
446  * Driver's notion of current power is set *only* in power(9e) entry point
447  * after actual power change operation has been successfully completed.
448  */
449 /* ARGSUSED */
450 static int
451 cpudrv_power(dev_info_t *dip, int comp, int level)
452 {
453 	int			instance;
454 	cpudrv_devstate_t	*cpudsp;
455 	cpudrv_pm_t 		*cpupm;
456 	cpudrv_pm_spd_t		*new_spd;
457 	boolean_t		is_ready;
458 	int			ret;
459 
460 	instance = ddi_get_instance(dip);
461 
462 	DPRINTF(D_POWER, ("cpudrv_power: instance %d: level %d\n",
463 	    instance, level));
464 	if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == NULL) {
465 		cmn_err(CE_WARN, "cpudrv_power: instance %d: can't get state",
466 		    instance);
467 		return (DDI_FAILURE);
468 	}
469 
470 	mutex_enter(&cpudsp->lock);
471 	cpupm = &(cpudsp->cpudrv_pm);
472 
473 	/*
474 	 * In normal operation, we fail if we are busy and request is
475 	 * to lower the power level. We let this go through if the driver
476 	 * is in special direct pm mode. On x86, we also let this through
477 	 * if the change is due to a request to throttle the max speed.
478 	 */
479 	if (!cpudrv_direct_pm && (cpupm->pm_busycnt >= 1) &&
480 		!cpudrv_pm_is_throttle_thread(cpupm)) {
481 		if ((cpupm->cur_spd != NULL) &&
482 		    (level < cpupm->cur_spd->pm_level)) {
483 			mutex_exit(&cpudsp->lock);
484 			return (DDI_FAILURE);
485 		}
486 	}
487 
488 	for (new_spd = cpupm->head_spd; new_spd; new_spd = new_spd->down_spd) {
489 		if (new_spd->pm_level == level)
490 			break;
491 	}
492 	if (!new_spd) {
493 		CPUDRV_PM_RESET_THROTTLE_THREAD(cpupm);
494 		mutex_exit(&cpudsp->lock);
495 		cmn_err(CE_WARN, "cpudrv_power: instance %d: "
496 		    "can't locate new CPU speed", instance);
497 		return (DDI_FAILURE);
498 	}
499 
500 	/*
501 	 * We currently refuse to power manage if the CPU is not ready to
502 	 * take cross calls (cross calls fail silently if CPU is not ready
503 	 * for it).
504 	 *
505 	 * Additionally, for x86 platforms we cannot power manage
506 	 * any one instance, until all instances have been initialized.
507 	 * That's because we don't know what the CPU domains look like
508 	 * until all instances have been initialized.
509 	 */
510 	is_ready = CPUDRV_PM_XCALL_IS_READY(cpudsp->cpu_id);
511 	if (!is_ready) {
512 		DPRINTF(D_POWER, ("cpudrv_power: instance %d: "
513 		    "CPU not ready for x-calls\n", instance));
514 	} else if (!(is_ready = cpudrv_pm_all_instances_ready())) {
515 		DPRINTF(D_POWER, ("cpudrv_power: instance %d: "
516 		    "waiting for all CPUs to be ready\n", instance));
517 	}
518 	if (!is_ready) {
519 		CPUDRV_PM_RESET_THROTTLE_THREAD(cpupm);
520 		mutex_exit(&cpudsp->lock);
521 		return (DDI_FAILURE);
522 	}
523 
524 	/*
525 	 * Execute CPU specific routine on the requested CPU to change its
526 	 * speed to normal-speed/divisor.
527 	 */
528 	if ((ret = cpudrv_pm_change_speed(cpudsp, new_spd)) != DDI_SUCCESS) {
529 		cmn_err(CE_WARN, "cpudrv_power: cpudrv_pm_change_speed() "
530 		    "return = %d", ret);
531 		mutex_exit(&cpudsp->lock);
532 		return (DDI_FAILURE);
533 	}
534 
535 	/*
536 	 * Reset idle threshold time for the new power level.
537 	 */
538 	if ((cpupm->cur_spd != NULL) && (level < cpupm->cur_spd->pm_level)) {
539 		if (pm_idle_component(dip, CPUDRV_PM_COMP_NUM) ==
540 		    DDI_SUCCESS) {
541 			if (cpupm->pm_busycnt >= 1)
542 				cpupm->pm_busycnt--;
543 		} else
544 			cmn_err(CE_WARN, "cpudrv_power: instance %d: can't "
545 			    "idle CPU component", ddi_get_instance(dip));
546 	}
547 	/*
548 	 * Reset various parameters because we are now running at new speed.
549 	 */
550 	cpupm->lastquan_mstate[CMS_IDLE] = 0;
551 	cpupm->lastquan_mstate[CMS_SYSTEM] = 0;
552 	cpupm->lastquan_mstate[CMS_USER] = 0;
553 	cpupm->lastquan_lbolt = 0;
554 	cpupm->cur_spd = new_spd;
555 	CPUDRV_PM_RESET_THROTTLE_THREAD(cpupm);
556 	mutex_exit(&cpudsp->lock);
557 
558 	return (DDI_SUCCESS);
559 }
560 
561 /*
562  * Initialize the field that will be used for reporting
563  * the supported_frequencies_Hz cpu_info kstat.
564  */
565 static void
566 set_supp_freqs(cpu_t *cp, cpudrv_pm_t *cpupm)
567 {
568 	char		*supp_freqs;
569 	char		*sfptr;
570 	uint64_t	*speeds;
571 	cpudrv_pm_spd_t	*spd;
572 	int		i;
573 #define	UINT64_MAX_STRING (sizeof ("18446744073709551615"))
574 
575 	speeds = kmem_zalloc(cpupm->num_spd * sizeof (uint64_t), KM_SLEEP);
576 	for (i = cpupm->num_spd - 1, spd = cpupm->head_spd; spd;
577 	    i--, spd = spd->down_spd) {
578 		speeds[i] =
579 		    CPUDRV_PM_SPEED_HZ(cp->cpu_type_info.pi_clock, spd->speed);
580 	}
581 
582 	supp_freqs = kmem_zalloc((UINT64_MAX_STRING * cpupm->num_spd),
583 	    KM_SLEEP);
584 	sfptr = supp_freqs;
585 	for (i = 0; i < cpupm->num_spd; i++) {
586 		if (i == cpupm->num_spd - 1) {
587 			(void) sprintf(sfptr, "%"PRIu64, speeds[i]);
588 		} else {
589 			(void) sprintf(sfptr, "%"PRIu64":", speeds[i]);
590 			sfptr = supp_freqs + strlen(supp_freqs);
591 		}
592 	}
593 	cp->cpu_type_info.pi_supp_freqs = supp_freqs;
594 	kmem_free(speeds, cpupm->num_spd * sizeof (uint64_t));
595 }
596 
597 /*
598  * Initialize power management data.
599  */
600 static int
601 cpudrv_pm_init(cpudrv_devstate_t *cpudsp)
602 {
603 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
604 	cpudrv_pm_spd_t	*cur_spd;
605 	cpudrv_pm_spd_t	*prev_spd = NULL;
606 	int		*speeds;
607 	uint_t		nspeeds;
608 	int		idle_cnt_percent;
609 	int		user_cnt_percent;
610 	int		i;
611 
612 	if (!cpudrv_pm_init_module(cpudsp))
613 		return (DDI_FAILURE);
614 
615 	CPUDRV_PM_GET_SPEEDS(cpudsp, speeds, nspeeds);
616 	if (nspeeds < 2) {
617 		/* Need at least two speeds to power manage */
618 		CPUDRV_PM_FREE_SPEEDS(speeds, nspeeds);
619 		cpudrv_pm_free_module(cpudsp);
620 		return (DDI_FAILURE);
621 	}
622 	cpupm->num_spd = nspeeds;
623 
624 	/*
625 	 * Calculate the watermarks and other parameters based on the
626 	 * supplied speeds.
627 	 *
628 	 * One of the basic assumption is that for X amount of CPU work,
629 	 * if CPU is slowed down by a factor of N, the time it takes to
630 	 * do the same work will be N * X.
631 	 *
632 	 * The driver declares that a CPU is idle and ready for slowed down,
633 	 * if amount of idle thread is more than the current speed idle_hwm
634 	 * without dropping below idle_hwm a number of consecutive sampling
635 	 * intervals and number of running threads in user mode are below
636 	 * user_lwm.  We want to set the current user_lwm such that if we
637 	 * just switched to the next slower speed with no change in real work
638 	 * load, the amount of user threads at the slower speed will be such
639 	 * that it falls below the slower speed's user_hwm.  If we didn't do
640 	 * that then we will just come back to the higher speed as soon as we
641 	 * go down even with no change in work load.
642 	 * The user_hwm is a fixed precentage and not calculated dynamically.
643 	 *
644 	 * We bring the CPU up if idle thread at current speed is less than
645 	 * the current speed idle_lwm for a number of consecutive sampling
646 	 * intervals or user threads are above the user_hwm for the current
647 	 * speed.
648 	 */
649 	for (i = 0; i < nspeeds; i++) {
650 		cur_spd = kmem_zalloc(sizeof (cpudrv_pm_spd_t), KM_SLEEP);
651 		cur_spd->speed = speeds[i];
652 		if (i == 0) {	/* normal speed */
653 			cpupm->head_spd = cur_spd;
654 			cur_spd->quant_cnt = CPUDRV_PM_QUANT_CNT_NORMAL;
655 			cur_spd->idle_hwm =
656 			    (cpudrv_pm_idle_hwm * cur_spd->quant_cnt) / 100;
657 			/* can't speed anymore */
658 			cur_spd->idle_lwm = 0;
659 			cur_spd->user_hwm = UINT_MAX;
660 		} else {
661 			cur_spd->quant_cnt = CPUDRV_PM_QUANT_CNT_OTHR;
662 			ASSERT(prev_spd != NULL);
663 			prev_spd->down_spd = cur_spd;
664 			cur_spd->up_spd = cpupm->head_spd;
665 
666 			/*
667 			 * Let's assume CPU is considered idle at full speed
668 			 * when it is spending I% of time in running the idle
669 			 * thread.  At full speed, CPU will be busy (100 - I) %
670 			 * of times.  This % of busyness increases by factor of
671 			 * N as CPU slows down.  CPU that is idle I% of times
672 			 * in full speed, it is idle (100 - ((100 - I) * N)) %
673 			 * of times in N speed.  The idle_lwm is a fixed
674 			 * percentage.  A large value of N may result in
675 			 * idle_hwm to go below idle_lwm.  We need to make sure
676 			 * that there is at least a buffer zone seperation
677 			 * between the idle_lwm and idle_hwm values.
678 			 */
679 			idle_cnt_percent = CPUDRV_PM_IDLE_CNT_PERCENT(
680 			    cpudrv_pm_idle_hwm, speeds, i);
681 			idle_cnt_percent = max(idle_cnt_percent,
682 			    (cpudrv_pm_idle_lwm + cpudrv_pm_idle_buf_zone));
683 			cur_spd->idle_hwm =
684 			    (idle_cnt_percent * cur_spd->quant_cnt) / 100;
685 			cur_spd->idle_lwm =
686 			    (cpudrv_pm_idle_lwm * cur_spd->quant_cnt) / 100;
687 
688 			/*
689 			 * The lwm for user threads are determined such that
690 			 * if CPU slows down, the load of work in the
691 			 * new speed would still keep the CPU at or below the
692 			 * user_hwm in the new speed.  This is to prevent
693 			 * the quick jump back up to higher speed.
694 			 */
695 			cur_spd->user_hwm = (cpudrv_pm_user_hwm *
696 			    cur_spd->quant_cnt) / 100;
697 			user_cnt_percent = CPUDRV_PM_USER_CNT_PERCENT(
698 			    cpudrv_pm_user_hwm, speeds, i);
699 			prev_spd->user_lwm =
700 			    (user_cnt_percent * prev_spd->quant_cnt) / 100;
701 		}
702 		prev_spd = cur_spd;
703 	}
704 	/* Slowest speed. Can't slow down anymore */
705 	cur_spd->idle_hwm = UINT_MAX;
706 	cur_spd->user_lwm = -1;
707 #ifdef	DEBUG
708 	DPRINTF(D_PM_INIT, ("cpudrv_pm_init: instance %d: head_spd spd %d, "
709 	    "num_spd %d\n", ddi_get_instance(cpudsp->dip),
710 	    cpupm->head_spd->speed, cpupm->num_spd));
711 	for (cur_spd = cpupm->head_spd; cur_spd; cur_spd = cur_spd->down_spd) {
712 		DPRINTF(D_PM_INIT, ("cpudrv_pm_init: instance %d: speed %d, "
713 		    "down_spd spd %d, idle_hwm %d, user_lwm %d, "
714 		    "up_spd spd %d, idle_lwm %d, user_hwm %d, "
715 		    "quant_cnt %d\n", ddi_get_instance(cpudsp->dip),
716 		    cur_spd->speed,
717 		    (cur_spd->down_spd ? cur_spd->down_spd->speed : 0),
718 		    cur_spd->idle_hwm, cur_spd->user_lwm,
719 		    (cur_spd->up_spd ? cur_spd->up_spd->speed : 0),
720 		    cur_spd->idle_lwm, cur_spd->user_hwm,
721 		    cur_spd->quant_cnt));
722 	}
723 #endif	/* DEBUG */
724 	CPUDRV_PM_FREE_SPEEDS(speeds, nspeeds);
725 	return (DDI_SUCCESS);
726 }
727 
728 /*
729  * Free CPU power management data.
730  */
731 static void
732 cpudrv_pm_free(cpudrv_devstate_t *cpudsp)
733 {
734 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
735 	cpudrv_pm_spd_t	*cur_spd, *next_spd;
736 
737 	cur_spd = cpupm->head_spd;
738 	while (cur_spd) {
739 		next_spd = cur_spd->down_spd;
740 		kmem_free(cur_spd, sizeof (cpudrv_pm_spd_t));
741 		cur_spd = next_spd;
742 	}
743 	bzero(cpupm, sizeof (cpudrv_pm_t));
744 	cpudrv_pm_free_module(cpudsp);
745 }
746 
747 /*
748  * Create pm-components property.
749  */
750 static int
751 cpudrv_pm_comp_create(cpudrv_devstate_t *cpudsp)
752 {
753 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
754 	cpudrv_pm_spd_t	*cur_spd;
755 	char		**pmc;
756 	int		size;
757 	char		name[] = "NAME=CPU Speed";
758 	int		i, j;
759 	uint_t		comp_spd;
760 	int		result = DDI_FAILURE;
761 
762 	pmc = kmem_zalloc((cpupm->num_spd + 1) * sizeof (char *), KM_SLEEP);
763 	size = CPUDRV_PM_COMP_SIZE();
764 	if (cpupm->num_spd > CPUDRV_PM_COMP_MAX_VAL) {
765 		cmn_err(CE_WARN, "cpudrv_pm_comp_create: instance %d: "
766 		    "number of speeds exceeded limits",
767 		    ddi_get_instance(cpudsp->dip));
768 		kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *));
769 		return (result);
770 	}
771 
772 	for (i = cpupm->num_spd, cur_spd = cpupm->head_spd; i > 0;
773 	    i--, cur_spd = cur_spd->down_spd) {
774 		cur_spd->pm_level = i;
775 		pmc[i] = kmem_zalloc((size * sizeof (char)), KM_SLEEP);
776 		comp_spd = CPUDRV_PM_COMP_SPEED(cpupm, cur_spd);
777 		if (comp_spd > CPUDRV_PM_COMP_MAX_VAL) {
778 			cmn_err(CE_WARN, "cpudrv_pm_comp_create: "
779 			    "instance %d: speed exceeded limits",
780 			    ddi_get_instance(cpudsp->dip));
781 			for (j = cpupm->num_spd; j >= i; j--) {
782 				kmem_free(pmc[j], size * sizeof (char));
783 			}
784 			kmem_free(pmc, (cpupm->num_spd + 1) *
785 			    sizeof (char *));
786 			return (result);
787 		}
788 		CPUDRV_PM_COMP_SPRINT(pmc[i], cpupm, cur_spd, comp_spd)
789 		DPRINTF(D_PM_COMP_CREATE, ("cpudrv_pm_comp_create: "
790 		    "instance %d: pm-components power level %d string '%s'\n",
791 		    ddi_get_instance(cpudsp->dip), i, pmc[i]));
792 	}
793 	pmc[0] = kmem_zalloc(sizeof (name), KM_SLEEP);
794 	(void) strcat(pmc[0], name);
795 	DPRINTF(D_PM_COMP_CREATE, ("cpudrv_pm_comp_create: instance %d: "
796 	    "pm-components component name '%s'\n",
797 	    ddi_get_instance(cpudsp->dip), pmc[0]));
798 
799 	if (ddi_prop_update_string_array(DDI_DEV_T_NONE, cpudsp->dip,
800 	    "pm-components", pmc, cpupm->num_spd + 1) == DDI_PROP_SUCCESS) {
801 		result = DDI_SUCCESS;
802 	} else {
803 		cmn_err(CE_WARN, "cpudrv_pm_comp_create: instance %d: "
804 		    "can't create pm-components property",
805 		    ddi_get_instance(cpudsp->dip));
806 	}
807 
808 	for (i = cpupm->num_spd; i > 0; i--) {
809 		kmem_free(pmc[i], size * sizeof (char));
810 	}
811 	kmem_free(pmc[0], sizeof (name));
812 	kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *));
813 	return (result);
814 }
815 
816 /*
817  * Mark a component idle.
818  */
819 #define	CPUDRV_PM_MONITOR_PM_IDLE_COMP(dip, cpupm) { \
820 	if ((cpupm)->pm_busycnt >= 1) { \
821 		if (pm_idle_component((dip), CPUDRV_PM_COMP_NUM) == \
822 		    DDI_SUCCESS) { \
823 			DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: " \
824 			    "instance %d: pm_idle_component called\n", \
825 			    ddi_get_instance((dip)))); \
826 			(cpupm)->pm_busycnt--; \
827 		} else { \
828 			cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: " \
829 			    "can't idle CPU component", \
830 			    ddi_get_instance((dip))); \
831 		} \
832 	} \
833 }
834 
835 /*
836  * Marks a component busy in both PM framework and driver state structure.
837  */
838 #define	CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm) { \
839 	if ((cpupm)->pm_busycnt < 1) { \
840 		if (pm_busy_component((dip), CPUDRV_PM_COMP_NUM) == \
841 		    DDI_SUCCESS) { \
842 			DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: " \
843 			    "instance %d: pm_busy_component called\n", \
844 			    ddi_get_instance((dip)))); \
845 			(cpupm)->pm_busycnt++; \
846 		} else { \
847 			cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: " \
848 			    "can't busy CPU component", \
849 			    ddi_get_instance((dip))); \
850 		} \
851 	} \
852 }
853 
854 /*
855  * Marks a component busy and calls pm_raise_power().
856  */
857 #define	CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, new_level) { \
858 	/* \
859 	 * Mark driver and PM framework busy first so framework doesn't try \
860 	 * to bring CPU to lower speed when we need to be at higher speed. \
861 	 */ \
862 	CPUDRV_PM_MONITOR_PM_BUSY_COMP((dip), (cpupm)); \
863 	mutex_exit(&(cpudsp)->lock); \
864 	DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " \
865 	    "pm_raise_power called to %d\n", ddi_get_instance((dip)), \
866 		(new_level))); \
867 	if (pm_raise_power((dip), CPUDRV_PM_COMP_NUM, (new_level)) != \
868 	    DDI_SUCCESS) { \
869 		cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: can't " \
870 		    "raise CPU power level", ddi_get_instance((dip))); \
871 	} \
872 	mutex_enter(&(cpudsp)->lock); \
873 }
874 
875 /*
876  * In order to monitor a CPU, we need to hold cpu_lock to access CPU
877  * statistics. Holding cpu_lock is not allowed from a callout routine.
878  * We dispatch a taskq to do that job.
879  */
880 static void
881 cpudrv_pm_monitor_disp(void *arg)
882 {
883 	cpudrv_devstate_t	*cpudsp = (cpudrv_devstate_t *)arg;
884 
885 	/*
886 	 * We are here because the last task has scheduled a timeout.
887 	 * The queue should be empty at this time.
888 	 */
889 	mutex_enter(&cpudsp->cpudrv_pm.timeout_lock);
890 	if (!taskq_dispatch(cpudsp->cpudrv_pm.tq, cpudrv_pm_monitor, arg,
891 	    TQ_NOSLEEP)) {
892 		mutex_exit(&cpudsp->cpudrv_pm.timeout_lock);
893 		DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor_disp: failed to "
894 		    "dispatch the cpudrv_pm_monitor taskq\n"));
895 		mutex_enter(&cpudsp->lock);
896 		CPUDRV_PM_MONITOR_INIT(cpudsp);
897 		mutex_exit(&cpudsp->lock);
898 		return;
899 	}
900 	cpudsp->cpudrv_pm.timeout_count++;
901 	mutex_exit(&cpudsp->cpudrv_pm.timeout_lock);
902 }
903 
904 /*
905  * Get current CPU microstate times and scale them. We should probably be
906  * using get_cpu_mstate() to get this data, but bugs in some of the ISRs
907  * have led to inflated system times and prevented CPUs from being power
908  * managed. We can probably safely ignore time spent in ISRs when
909  * determining idleness.
910  */
911 static void
912 cpudrv_get_cpu_mstate(cpu_t *cpu, hrtime_t *times)
913 {
914 	int i;
915 
916 	for (i = 0; i < NCMSTATES; i++) {
917 		times[i] = cpu->cpu_acct[i];
918 		scalehrtime(&times[i]);
919 	}
920 }
921 
922 /*
923  * Monitors each CPU for the amount of time idle thread was running in the
924  * last quantum and arranges for the CPU to go to the lower or higher speed.
925  * Called at the time interval appropriate for the current speed. The
926  * time interval for normal speed is CPUDRV_PM_QUANT_CNT_NORMAL. The time
927  * interval for other speeds (including unknown speed) is
928  * CPUDRV_PM_QUANT_CNT_OTHR.
929  */
930 static void
931 cpudrv_pm_monitor(void *arg)
932 {
933 	cpudrv_devstate_t	*cpudsp = (cpudrv_devstate_t *)arg;
934 	cpudrv_pm_t		*cpupm;
935 	cpudrv_pm_spd_t		*cur_spd, *new_spd;
936 	cpu_t			*cp;
937 	dev_info_t		*dip;
938 	uint_t			idle_cnt, user_cnt, system_cnt;
939 	clock_t			lbolt_cnt;
940 	hrtime_t		msnsecs[NCMSTATES];
941 	boolean_t		is_ready;
942 
943 #define	GET_CPU_MSTATE_CNT(state, cnt) \
944 	msnsecs[state] = NSEC_TO_TICK(msnsecs[state]); \
945 	if (cpupm->lastquan_mstate[state] > msnsecs[state]) \
946 		msnsecs[state] = cpupm->lastquan_mstate[state]; \
947 	cnt = msnsecs[state] - cpupm->lastquan_mstate[state]; \
948 	cpupm->lastquan_mstate[state] = msnsecs[state]
949 
950 	mutex_enter(&cpudsp->lock);
951 	cpupm = &(cpudsp->cpudrv_pm);
952 	if (cpupm->timeout_id == 0) {
953 		mutex_exit(&cpudsp->lock);
954 		goto do_return;
955 	}
956 	cur_spd = cpupm->cur_spd;
957 	dip = cpudsp->dip;
958 
959 	/*
960 	 * We assume that a CPU is initialized and has a valid cpu_t
961 	 * structure, if it is ready for cross calls. If this changes,
962 	 * additional checks might be needed.
963 	 *
964 	 * Additionally, for x86 platforms we cannot power manage
965 	 * any one instance, until all instances have been initialized.
966 	 * That's because we don't know what the CPU domains look like
967 	 * until all instances have been initialized.
968 	 */
969 	is_ready = CPUDRV_PM_XCALL_IS_READY(cpudsp->cpu_id);
970 	if (!is_ready) {
971 		DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: "
972 		    "CPU not ready for x-calls\n", ddi_get_instance(dip)));
973 	} else if (!(is_ready = cpudrv_pm_all_instances_ready())) {
974 		DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: "
975 		    "waiting for all CPUs to be ready\n",
976 		    ddi_get_instance(dip)));
977 	}
978 	if (!is_ready) {
979 		/*
980 		 * Make sure that we are busy so that framework doesn't
981 		 * try to bring us down in this situation.
982 		 */
983 		CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm);
984 		CPUDRV_PM_MONITOR_INIT(cpudsp);
985 		mutex_exit(&cpudsp->lock);
986 		goto do_return;
987 	}
988 
989 	/*
990 	 * Make sure that we are still not at unknown power level.
991 	 */
992 	if (cur_spd == NULL) {
993 		DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: "
994 		    "cur_spd is unknown\n", ddi_get_instance(dip)));
995 		CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm,
996 		    cpupm->targ_spd->pm_level);
997 		/*
998 		 * We just changed the speed. Wait till at least next
999 		 * call to this routine before proceeding ahead.
1000 		 */
1001 		CPUDRV_PM_MONITOR_INIT(cpudsp);
1002 		mutex_exit(&cpudsp->lock);
1003 		goto do_return;
1004 	}
1005 
1006 	mutex_enter(&cpu_lock);
1007 	if ((cp = cpu_get(cpudsp->cpu_id)) == NULL) {
1008 		mutex_exit(&cpu_lock);
1009 		CPUDRV_PM_MONITOR_INIT(cpudsp);
1010 		mutex_exit(&cpudsp->lock);
1011 		cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: can't get "
1012 		    "cpu_t", ddi_get_instance(dip));
1013 		goto do_return;
1014 	}
1015 	if (cp->cpu_type_info.pi_supp_freqs == NULL)
1016 		set_supp_freqs(cp, cpupm);
1017 
1018 	cpudrv_get_cpu_mstate(cp, msnsecs);
1019 	GET_CPU_MSTATE_CNT(CMS_IDLE, idle_cnt);
1020 	GET_CPU_MSTATE_CNT(CMS_USER, user_cnt);
1021 	GET_CPU_MSTATE_CNT(CMS_SYSTEM, system_cnt);
1022 
1023 	/*
1024 	 * We can't do anything when we have just switched to a state
1025 	 * because there is no valid timestamp.
1026 	 */
1027 	if (cpupm->lastquan_lbolt == 0) {
1028 		cpupm->lastquan_lbolt = lbolt;
1029 		mutex_exit(&cpu_lock);
1030 		CPUDRV_PM_MONITOR_INIT(cpudsp);
1031 		mutex_exit(&cpudsp->lock);
1032 		goto do_return;
1033 	}
1034 
1035 	/*
1036 	 * Various watermarks are based on this routine being called back
1037 	 * exactly at the requested period. This is not guaranteed
1038 	 * because this routine is called from a taskq that is dispatched
1039 	 * from a timeout routine.  Handle this by finding out how many
1040 	 * ticks have elapsed since the last call (lbolt_cnt) and adjusting
1041 	 * the idle_cnt based on the delay added to the requested period
1042 	 * by timeout and taskq.
1043 	 */
1044 	lbolt_cnt = lbolt - cpupm->lastquan_lbolt;
1045 	cpupm->lastquan_lbolt = lbolt;
1046 	mutex_exit(&cpu_lock);
1047 	/*
1048 	 * Time taken between recording the current counts and
1049 	 * arranging the next call of this routine is an error in our
1050 	 * calculation. We minimize the error by calling
1051 	 * CPUDRV_PM_MONITOR_INIT() here instead of end of this routine.
1052 	 */
1053 	CPUDRV_PM_MONITOR_INIT(cpudsp);
1054 	DPRINTF(D_PM_MONITOR_VERBOSE, ("cpudrv_pm_monitor: instance %d: "
1055 	    "idle count %d, user count %d, system count %d, pm_level %d, "
1056 	    "pm_busycnt %d\n", ddi_get_instance(dip), idle_cnt, user_cnt,
1057 	    system_cnt, cur_spd->pm_level, cpupm->pm_busycnt));
1058 
1059 #ifdef	DEBUG
1060 	/*
1061 	 * Notify that timeout and taskq has caused delays and we need to
1062 	 * scale our parameters accordingly.
1063 	 *
1064 	 * To get accurate result, don't turn on other DPRINTFs with
1065 	 * the following DPRINTF. PROM calls generated by other
1066 	 * DPRINTFs changes the timing.
1067 	 */
1068 	if (lbolt_cnt > cur_spd->quant_cnt) {
1069 		DPRINTF(D_PM_MONITOR_DELAY, ("cpudrv_pm_monitor: instance %d: "
1070 		    "lbolt count %ld > quantum_count %u\n",
1071 		    ddi_get_instance(dip), lbolt_cnt, cur_spd->quant_cnt));
1072 	}
1073 #endif	/* DEBUG */
1074 
1075 	/*
1076 	 * Adjust counts based on the delay added by timeout and taskq.
1077 	 */
1078 	idle_cnt = (idle_cnt * cur_spd->quant_cnt) / lbolt_cnt;
1079 	user_cnt = (user_cnt * cur_spd->quant_cnt) / lbolt_cnt;
1080 	if ((user_cnt > cur_spd->user_hwm) || (idle_cnt < cur_spd->idle_lwm &&
1081 	    cur_spd->idle_blwm_cnt >= cpudrv_pm_idle_blwm_cnt_max)) {
1082 		cur_spd->idle_blwm_cnt = 0;
1083 		cur_spd->idle_bhwm_cnt = 0;
1084 		/*
1085 		 * In normal situation, arrange to go to next higher speed.
1086 		 * If we are running in special direct pm mode, we just stay
1087 		 * at the current speed.
1088 		 */
1089 		if (cur_spd == cur_spd->up_spd || cpudrv_direct_pm) {
1090 			CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm);
1091 		} else {
1092 			new_spd = cur_spd->up_spd;
1093 			CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm,
1094 			    new_spd->pm_level);
1095 		}
1096 	} else if ((user_cnt <= cur_spd->user_lwm) &&
1097 	    (idle_cnt >= cur_spd->idle_hwm) || !CPU_ACTIVE(cp)) {
1098 		cur_spd->idle_blwm_cnt = 0;
1099 		cur_spd->idle_bhwm_cnt = 0;
1100 		/*
1101 		 * Arrange to go to next lower speed by informing our idle
1102 		 * status to the power management framework.
1103 		 */
1104 		CPUDRV_PM_MONITOR_PM_IDLE_COMP(dip, cpupm);
1105 	} else {
1106 		/*
1107 		 * If we are between the idle water marks and have not
1108 		 * been here enough consecutive times to be considered
1109 		 * busy, just increment the count and return.
1110 		 */
1111 		if ((idle_cnt < cur_spd->idle_hwm) &&
1112 		    (idle_cnt >= cur_spd->idle_lwm) &&
1113 		    (cur_spd->idle_bhwm_cnt < cpudrv_pm_idle_bhwm_cnt_max)) {
1114 			cur_spd->idle_blwm_cnt = 0;
1115 			cur_spd->idle_bhwm_cnt++;
1116 			mutex_exit(&cpudsp->lock);
1117 			goto do_return;
1118 		}
1119 		if (idle_cnt < cur_spd->idle_lwm) {
1120 			cur_spd->idle_blwm_cnt++;
1121 			cur_spd->idle_bhwm_cnt = 0;
1122 		}
1123 		/*
1124 		 * Arranges to stay at the current speed.
1125 		 */
1126 		CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm);
1127 	}
1128 	mutex_exit(&cpudsp->lock);
1129 do_return:
1130 	mutex_enter(&cpupm->timeout_lock);
1131 	ASSERT(cpupm->timeout_count > 0);
1132 	cpupm->timeout_count--;
1133 	cv_signal(&cpupm->timeout_cv);
1134 	mutex_exit(&cpupm->timeout_lock);
1135 }
1136