1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 /*
22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
23 * Use is subject to license terms.
24 * Copyright 2012 Milan Jurik. All rights reserved.
25 * Copyright (c) 2016 by Delphix. All rights reserved.
26 * Copyright 2023 Oxide Computer Company
27 */
28
29 #if defined(DEBUG)
30 #define BUSRA_DEBUG
31 #endif
32
33 /*
34 * This module provides a set of resource management interfaces
35 * to manage bus resources globally in the system.
36 *
37 * The bus nexus drivers are typically responsible to setup resource
38 * maps for the bus resources available for a bus instance. However
39 * this module also provides resource setup functions for PCI bus
40 * (used by both SPARC and X86 platforms) and ISA bus instances (used
41 * only for X86 platforms).
42 */
43
44 #include <sys/types.h>
45 #include <sys/systm.h>
46 #include <sys/ddi.h>
47 #include <sys/sunddi.h>
48 #include <sys/sunndi.h>
49 #include <sys/ddi_impldefs.h>
50 #include <sys/ndi_impldefs.h>
51 #include <sys/kmem.h>
52 #include <sys/pctypes.h>
53 #include <sys/modctl.h>
54 #include <sys/debug.h>
55 #include <sys/spl.h>
56 #include <sys/pci.h>
57 #include <sys/autoconf.h>
58
59 #if defined(BUSRA_DEBUG)
60 int busra_debug = 0;
61 #define DEBUGPRT \
62 if (busra_debug) cmn_err
63
64 #else
65 #define DEBUGPRT \
66 if (0) cmn_err
67 #endif
68
69
70 /*
71 * global mutex that protects the global list of resource maps.
72 */
73 kmutex_t ra_lock;
74
75 /*
76 * basic resource element
77 */
78 struct ra_resource {
79 struct ra_resource *ra_next;
80 uint64_t ra_base;
81 uint64_t ra_len;
82 };
83
84 /*
85 * link list element for the list of dips (and their resource ranges)
86 * for a particular resource type.
87 * ra_rangeset points to the list of resources available
88 * for this type and this dip.
89 */
90 struct ra_dip_type {
91 struct ra_dip_type *ra_next;
92 struct ra_resource *ra_rangeset;
93 dev_info_t *ra_dip;
94 };
95
96
97 /*
98 * link list element for list of types resources. Each element
99 * has all resources for a particular type.
100 */
101 struct ra_type_map {
102 struct ra_type_map *ra_next;
103 struct ra_dip_type *ra_dip_list;
104 char *type;
105 };
106
107
108 /*
109 * place holder to keep the head of the whole global list.
110 * the address of the first typemap would be stored in it.
111 */
112 static struct ra_type_map *ra_map_list_head = NULL;
113
114
115 /*
116 * This is the loadable module wrapper.
117 * It is essentially boilerplate so isn't documented
118 */
119 extern struct mod_ops mod_miscops;
120
121 #ifdef BUSRA_DEBUG
122 void ra_dump_all(char *, dev_info_t *);
123 #endif
124
125 /* internal function prototypes */
126 static struct ra_dip_type *find_dip_map_resources(dev_info_t *dip, char *type,
127 struct ra_dip_type ***backdip, struct ra_type_map ***backtype,
128 uint32_t flag);
129 static int isnot_pow2(uint64_t value);
130 static int claim_pci_busnum(dev_info_t *dip, void *arg);
131 static int ra_map_exist(dev_info_t *dip, char *type);
132
133 static int pci_get_available_prop(dev_info_t *dip, uint64_t base,
134 uint64_t len, char *busra_type);
135 static int pci_put_available_prop(dev_info_t *dip, uint64_t base,
136 uint64_t len, char *busra_type);
137 static uint32_t pci_type_ra2pci(char *type);
138 static boolean_t is_pcie_fabric(dev_info_t *dip);
139
140 #define PCI_ADDR_TYPE_MASK (PCI_REG_ADDR_M | PCI_REG_PF_M)
141 #define PCI_ADDR_TYPE_INVAL 0xffffffff
142
143 #define RA_INSERT(prev, el) \
144 el->ra_next = *prev; \
145 *prev = el;
146
147 #define RA_REMOVE(prev, el) \
148 *prev = el->ra_next;
149
150
151 static struct modlmisc modlmisc = {
152 &mod_miscops, /* Type of module. This one is a module */
153 "Bus Resource Allocator (BUSRA)", /* Name of the module. */
154 };
155
156 static struct modlinkage modlinkage = {
157 MODREV_1, (void *)&modlmisc, NULL
158 };
159
160 int
_init()161 _init()
162 {
163 int ret;
164
165 mutex_init(&ra_lock, NULL, MUTEX_DRIVER,
166 (void *)(intptr_t)__ipltospl(SPL7 - 1));
167 if ((ret = mod_install(&modlinkage)) != 0) {
168 mutex_destroy(&ra_lock);
169 }
170 return (ret);
171 }
172
173 int
_fini()174 _fini()
175 {
176 int ret;
177
178 mutex_enter(&ra_lock);
179
180 if (ra_map_list_head != NULL) {
181 mutex_exit(&ra_lock);
182 return (EBUSY);
183 }
184
185 ret = mod_remove(&modlinkage);
186
187 mutex_exit(&ra_lock);
188
189 if (ret == 0)
190 mutex_destroy(&ra_lock);
191
192 return (ret);
193 }
194
195 int
_info(struct modinfo * modinfop)196 _info(struct modinfo *modinfop)
197 {
198 return (mod_info(&modlinkage, modinfop));
199 }
200
201 /*
202 * set up an empty resource map for a given type and dip
203 */
204 int
ndi_ra_map_setup(dev_info_t * dip,char * type)205 ndi_ra_map_setup(dev_info_t *dip, char *type)
206 {
207 struct ra_type_map *typemapp;
208 struct ra_dip_type *dipmap;
209 struct ra_dip_type **backdip;
210 struct ra_type_map **backtype;
211
212
213 mutex_enter(&ra_lock);
214
215 dipmap = find_dip_map_resources(dip, type, &backdip, &backtype, 0);
216
217 if (dipmap == NULL) {
218 if (backtype == NULL) {
219 typemapp = (struct ra_type_map *)
220 kmem_zalloc(sizeof (*typemapp), KM_SLEEP);
221 typemapp->type = (char *)kmem_zalloc(strlen(type) + 1,
222 KM_SLEEP);
223 (void) strcpy(typemapp->type, type);
224 RA_INSERT(&ra_map_list_head, typemapp);
225 } else {
226 typemapp = *backtype;
227 }
228 if (backdip == NULL) {
229 /* allocate and insert in list of dips for this type */
230 dipmap = (struct ra_dip_type *)
231 kmem_zalloc(sizeof (*dipmap), KM_SLEEP);
232 dipmap->ra_dip = dip;
233 RA_INSERT(&typemapp->ra_dip_list, dipmap);
234 }
235 }
236
237 mutex_exit(&ra_lock);
238 return (NDI_SUCCESS);
239 }
240
241 /*
242 * destroys a resource map for a given dip and type
243 */
244 int
ndi_ra_map_destroy(dev_info_t * dip,char * type)245 ndi_ra_map_destroy(dev_info_t *dip, char *type)
246 {
247 struct ra_dip_type *dipmap;
248 struct ra_dip_type **backdip;
249 struct ra_type_map **backtype, *typemap;
250 struct ra_resource *range;
251
252 mutex_enter(&ra_lock);
253 dipmap = find_dip_map_resources(dip, type, &backdip, &backtype, 0);
254
255 if (dipmap == NULL) {
256 mutex_exit(&ra_lock);
257 return (NDI_FAILURE);
258 }
259
260 /*
261 * destroy all resources for this dip
262 * remove dip from type list
263 */
264 ASSERT((backdip != NULL) && (backtype != NULL));
265 while (dipmap->ra_rangeset != NULL) {
266 range = dipmap->ra_rangeset;
267 RA_REMOVE(&dipmap->ra_rangeset, range);
268 kmem_free((caddr_t)range, sizeof (*range));
269 }
270 /* remove from dip list */
271 RA_REMOVE(backdip, dipmap);
272 kmem_free((caddr_t)dipmap, sizeof (*dipmap));
273 if ((*backtype)->ra_dip_list == NULL) {
274 /*
275 * This was the last dip with this resource type.
276 * Remove the type from the global list.
277 */
278 typemap = *backtype;
279 RA_REMOVE(backtype, (*backtype));
280 kmem_free((caddr_t)typemap->type, strlen(typemap->type) + 1);
281 kmem_free((caddr_t)typemap, sizeof (*typemap));
282 }
283
284 mutex_exit(&ra_lock);
285 return (NDI_SUCCESS);
286 }
287
288 static int
ra_map_exist(dev_info_t * dip,char * type)289 ra_map_exist(dev_info_t *dip, char *type)
290 {
291 struct ra_dip_type **backdip;
292 struct ra_type_map **backtype;
293
294 mutex_enter(&ra_lock);
295 if (find_dip_map_resources(dip, type, &backdip, &backtype, 0) == NULL) {
296 mutex_exit(&ra_lock);
297 return (NDI_FAILURE);
298 }
299
300 mutex_exit(&ra_lock);
301 return (NDI_SUCCESS);
302 }
303 /*
304 * Find a dip map for the specified type, if NDI_RA_PASS will go up on dev tree
305 * if found, backdip and backtype will be updated to point to the previous
306 * dip in the list and previous type for this dip in the list.
307 * If no such type at all in the resource list both backdip and backtype
308 * will be null. If the type found but no dip, back dip will be null.
309 */
310
311 static struct ra_dip_type *
find_dip_map_resources(dev_info_t * dip,char * type,struct ra_dip_type *** backdip,struct ra_type_map *** backtype,uint32_t flag)312 find_dip_map_resources(dev_info_t *dip, char *type,
313 struct ra_dip_type ***backdip, struct ra_type_map ***backtype,
314 uint32_t flag)
315 {
316 struct ra_type_map **prevmap;
317 struct ra_dip_type *dipmap, **prevdip;
318
319 ASSERT(mutex_owned(&ra_lock));
320 prevdip = NULL;
321 dipmap = NULL;
322 prevmap = &ra_map_list_head;
323
324 while (*prevmap) {
325 if (strcmp((*prevmap)->type, type) == 0)
326 break;
327 prevmap = &(*prevmap)->ra_next;
328 }
329
330 if (*prevmap) {
331 for (; dip != NULL; dip = ddi_get_parent(dip)) {
332 prevdip = &(*prevmap)->ra_dip_list;
333 dipmap = *prevdip;
334
335 while (dipmap) {
336 if (dipmap->ra_dip == dip)
337 break;
338 prevdip = &dipmap->ra_next;
339 dipmap = dipmap->ra_next;
340 }
341
342 if (dipmap != NULL) {
343 /* found it */
344 break;
345 }
346
347 if (!(flag & NDI_RA_PASS)) {
348 break;
349 }
350 }
351 }
352
353 *backtype = (*prevmap == NULL) ? NULL: prevmap;
354 *backdip = (dipmap == NULL) ? NULL: prevdip;
355
356 return (dipmap);
357 }
358
359 int
ndi_ra_free(dev_info_t * dip,uint64_t base,uint64_t len,char * type,uint32_t flag)360 ndi_ra_free(dev_info_t *dip, uint64_t base, uint64_t len, char *type,
361 uint32_t flag)
362 {
363 struct ra_dip_type *dipmap;
364 struct ra_resource *newmap, *overlapmap, *oldmap = NULL;
365 struct ra_resource *mapp, **backp;
366 uint64_t newend, mapend;
367 struct ra_dip_type **backdip;
368 struct ra_type_map **backtype;
369
370 if (len == 0) {
371 return (NDI_SUCCESS);
372 }
373
374 mutex_enter(&ra_lock);
375
376 if ((dipmap = find_dip_map_resources(dip, type, &backdip, &backtype,
377 flag)) == NULL) {
378 mutex_exit(&ra_lock);
379 return (NDI_FAILURE);
380 }
381
382 mapp = dipmap->ra_rangeset;
383 backp = &dipmap->ra_rangeset;
384
385 /* now find where range lies and fix things up */
386 newend = base + len;
387 for (; mapp != NULL; backp = &(mapp->ra_next), mapp = mapp->ra_next) {
388 mapend = mapp->ra_base + mapp->ra_len;
389
390 /* check for overlap first */
391 if ((base <= mapp->ra_base && newend > mapp->ra_base) ||
392 (base > mapp->ra_base && base < mapend)) {
393 /* overlap with mapp */
394 overlapmap = mapp;
395 goto overlap;
396 } else if ((base == mapend && mapp->ra_next) &&
397 (newend > mapp->ra_next->ra_base)) {
398 /* overlap with mapp->ra_next */
399 overlapmap = mapp->ra_next;
400 goto overlap;
401 }
402
403 if (newend == mapp->ra_base) {
404 /* simple - on front */
405 mapp->ra_base = base;
406 mapp->ra_len += len;
407 /*
408 * don't need to check if it merges with
409 * previous since that would match on on end
410 */
411 break;
412 } else if (base == mapend) {
413 /* simple - on end */
414 mapp->ra_len += len;
415 if (mapp->ra_next &&
416 (newend == mapp->ra_next->ra_base)) {
417 /* merge with next node */
418 oldmap = mapp->ra_next;
419 mapp->ra_len += oldmap->ra_len;
420 RA_REMOVE(&mapp->ra_next, oldmap);
421 kmem_free((caddr_t)oldmap, sizeof (*oldmap));
422 }
423 break;
424 } else if (base < mapp->ra_base) {
425 /* somewhere in between so just an insert */
426 newmap = (struct ra_resource *)
427 kmem_zalloc(sizeof (*newmap), KM_SLEEP);
428 newmap->ra_base = base;
429 newmap->ra_len = len;
430 RA_INSERT(backp, newmap);
431 break;
432 }
433 }
434 if (mapp == NULL) {
435 /* stick on end */
436 newmap = (struct ra_resource *)
437 kmem_zalloc(sizeof (*newmap), KM_SLEEP);
438 newmap->ra_base = base;
439 newmap->ra_len = len;
440 RA_INSERT(backp, newmap);
441 }
442
443 mutex_exit(&ra_lock);
444
445 /*
446 * Update dip's "available" property, adding this piece of
447 * resource to the pool.
448 */
449 (void) pci_put_available_prop(dipmap->ra_dip, base, len, type);
450 return (NDI_SUCCESS);
451
452 overlap:
453 /*
454 * Bad free may happen on some x86 platforms with BIOS exporting
455 * incorrect resource maps. The system is otherwise functioning
456 * normally. We send such messages to syslog only.
457 */
458 cmn_err(CE_NOTE, "!ndi_ra_free: bad free, dip %p, resource type %s \n",
459 (void *)dip, type);
460 cmn_err(CE_NOTE, "!ndi_ra_free: freeing base 0x%" PRIx64 ", len 0x%"
461 PRIX64 " overlaps with existing resource base 0x%" PRIx64
462 ", len 0x%" PRIx64 "\n", base, len, overlapmap->ra_base,
463 overlapmap->ra_len);
464
465 mutex_exit(&ra_lock);
466 return (NDI_FAILURE);
467 }
468
469 /* check to see if value is power of 2 or not. */
470 static int
isnot_pow2(uint64_t value)471 isnot_pow2(uint64_t value)
472 {
473 uint32_t low;
474 uint32_t hi;
475
476 low = value & 0xffffffff;
477 hi = value >> 32;
478
479 /*
480 * ddi_ffs and ddi_fls gets long values, so in 32bit environment
481 * won't work correctly for 64bit values
482 */
483 if ((ddi_ffs(low) == ddi_fls(low)) &&
484 (ddi_ffs(hi) == ddi_fls(hi)))
485 return (0);
486 return (1);
487 }
488
489 static void
adjust_link(struct ra_resource ** backp,struct ra_resource * mapp,uint64_t base,uint64_t len)490 adjust_link(struct ra_resource **backp, struct ra_resource *mapp,
491 uint64_t base, uint64_t len)
492 {
493 struct ra_resource *newmap;
494 uint64_t newlen;
495
496 if (base != mapp->ra_base) {
497 /* in the middle or end */
498 newlen = base - mapp->ra_base;
499 if ((mapp->ra_len - newlen) == len) {
500 /* on the end */
501 mapp->ra_len = newlen;
502 } else {
503 /* in the middle */
504 newmap = (struct ra_resource *)
505 kmem_zalloc(sizeof (*newmap), KM_SLEEP);
506 newmap->ra_base = base + len;
507 newmap->ra_len = mapp->ra_len - (len + newlen);
508 mapp->ra_len = newlen;
509 RA_INSERT(&(mapp->ra_next), newmap);
510 }
511 } else {
512 /* at the beginning */
513 mapp->ra_base += len;
514 mapp->ra_len -= len;
515 if (mapp->ra_len == 0) {
516 /* remove the whole node */
517 RA_REMOVE(backp, mapp);
518 kmem_free((caddr_t)mapp, sizeof (*mapp));
519 }
520 }
521 }
522
523 int
ndi_ra_alloc(dev_info_t * dip,ndi_ra_request_t * req,uint64_t * retbasep,uint64_t * retlenp,char * type,uint32_t flag)524 ndi_ra_alloc(dev_info_t *dip, ndi_ra_request_t *req, uint64_t *retbasep,
525 uint64_t *retlenp, char *type, uint32_t flag)
526 {
527 struct ra_dip_type *dipmap;
528 struct ra_resource *mapp, **backp, **backlargestp;
529 uint64_t mask = 0;
530 uint64_t len, remlen, largestbase, largestlen;
531 uint64_t base, oldbase, lower, upper;
532 struct ra_dip_type **backdip;
533 struct ra_type_map **backtype;
534 int rval = NDI_FAILURE;
535
536
537 len = req->ra_len;
538
539 if (req->ra_flags & NDI_RA_ALIGN_SIZE) {
540 if (isnot_pow2(req->ra_len)) {
541 DEBUGPRT(CE_WARN, "ndi_ra_alloc: bad length(pow2) 0x%"
542 PRIx64, req->ra_len);
543 *retbasep = 0;
544 *retlenp = 0;
545 return (NDI_FAILURE);
546 }
547 }
548
549 mask = (req->ra_flags & NDI_RA_ALIGN_SIZE) ? (len - 1) :
550 req->ra_align_mask;
551
552
553 mutex_enter(&ra_lock);
554 dipmap = find_dip_map_resources(dip, type, &backdip, &backtype, flag);
555 if ((dipmap == NULL) || ((mapp = dipmap->ra_rangeset) == NULL)) {
556 mutex_exit(&ra_lock);
557 DEBUGPRT(CE_CONT, "ndi_ra_alloc no map found for this type\n");
558 return (NDI_FAILURE);
559 }
560
561 DEBUGPRT(CE_CONT, "ndi_ra_alloc: mapp = %p len=%" PRIx64 ", mask=%"
562 PRIx64 "\n", (void *)mapp, len, mask);
563
564 backp = &(dipmap->ra_rangeset);
565 backlargestp = NULL;
566 largestbase = 0;
567 largestlen = 0;
568
569 lower = 0;
570 upper = ~(uint64_t)0;
571
572 if (req->ra_flags & NDI_RA_ALLOC_BOUNDED) {
573 /* bounded so skip to first possible */
574 lower = req->ra_boundbase;
575 upper = req->ra_boundlen + lower;
576 if ((upper == 0) || (upper < req->ra_boundlen))
577 upper = ~(uint64_t)0;
578 DEBUGPRT(CE_CONT, "ndi_ra_alloc: ra_len = %" PRIx64 ", len = %"
579 PRIx64 " ra_base=%" PRIx64 ", mask=%" PRIx64
580 "\n", mapp->ra_len, len, mapp->ra_base, mask);
581 for (; mapp != NULL && (mapp->ra_base + mapp->ra_len) < lower;
582 backp = &(mapp->ra_next), mapp = mapp->ra_next) {
583 if (((mapp->ra_len + mapp->ra_base) == 0) ||
584 ((mapp->ra_len + mapp->ra_base) < mapp->ra_len))
585 /*
586 * This elements end goes beyond max uint64_t.
587 * potential candidate, check end against lower
588 * would not be precise.
589 */
590 break;
591
592 DEBUGPRT(CE_CONT, " ra_len = %" PRIx64 ", ra_base=%"
593 PRIx64 "\n", mapp->ra_len, mapp->ra_base);
594 }
595
596 }
597
598 if (!(req->ra_flags & NDI_RA_ALLOC_SPECIFIED)) {
599 /* first fit - not user specified */
600 DEBUGPRT(CE_CONT, "ndi_ra_alloc(unspecified request)"
601 "lower=%" PRIx64 ", upper=%" PRIx64 "\n", lower, upper);
602 for (; mapp != NULL && mapp->ra_base <= upper;
603 backp = &(mapp->ra_next), mapp = mapp->ra_next) {
604
605 DEBUGPRT(CE_CONT, "ndi_ra_alloc: ra_len = %" PRIx64
606 ", len = %" PRIx64 "", mapp->ra_len, len);
607 base = mapp->ra_base;
608 if (base < lower) {
609 base = lower;
610 DEBUGPRT(CE_CONT, "\tbase=%" PRIx64
611 ", ra_base=%" PRIx64 ", mask=%" PRIx64,
612 base, mapp->ra_base, mask);
613 }
614
615 if ((base & mask) != 0) {
616 oldbase = base;
617 /*
618 * failed a critical constraint
619 * adjust and see if it still fits
620 */
621 base = base & ~mask;
622 base += (mask + 1);
623 DEBUGPRT(CE_CONT, "\tnew base=%" PRIx64 "\n",
624 base);
625
626 /*
627 * Check to see if the new base is past
628 * the end of the resource.
629 */
630 if (base >= (oldbase + mapp->ra_len + 1)) {
631 continue;
632 }
633 }
634
635 if (req->ra_flags & NDI_RA_ALLOC_PARTIAL_OK) {
636 if ((upper - mapp->ra_base) < mapp->ra_len)
637 remlen = upper - base;
638 else
639 remlen = mapp->ra_len -
640 (base - mapp->ra_base);
641
642 if ((backlargestp == NULL) ||
643 (largestlen < remlen)) {
644
645 backlargestp = backp;
646 largestbase = base;
647 largestlen = remlen;
648 }
649 }
650
651 if (mapp->ra_len >= len) {
652 /* a candidate -- apply constraints */
653 if ((len > (mapp->ra_len -
654 (base - mapp->ra_base))) ||
655 ((len - 1 + base) > upper)) {
656 continue;
657 }
658
659 /* we have a fit */
660
661 DEBUGPRT(CE_CONT, "\thave a fit\n");
662
663 adjust_link(backp, mapp, base, len);
664 rval = NDI_SUCCESS;
665 break;
666
667 }
668 }
669 } else {
670 /* want an exact value/fit */
671 base = req->ra_addr;
672 len = req->ra_len;
673 for (; mapp != NULL && mapp->ra_base <= upper;
674 backp = &(mapp->ra_next), mapp = mapp->ra_next) {
675 if (base >= mapp->ra_base &&
676 ((base - mapp->ra_base) < mapp->ra_len)) {
677 /*
678 * This is the node with the requested base in
679 * its range
680 */
681 if ((len > mapp->ra_len) ||
682 (base - mapp->ra_base >
683 mapp->ra_len - len)) {
684 /* length requirement not satisfied */
685 if (req->ra_flags &
686 NDI_RA_ALLOC_PARTIAL_OK) {
687 if ((upper - mapp->ra_base)
688 < mapp->ra_len)
689 remlen = upper - base;
690 else
691 remlen =
692 mapp->ra_len -
693 (base -
694 mapp->ra_base);
695 }
696 backlargestp = backp;
697 largestbase = base;
698 largestlen = remlen;
699 base = 0;
700 } else {
701 /* We have a match */
702 adjust_link(backp, mapp, base, len);
703 rval = NDI_SUCCESS;
704 }
705 break;
706 }
707 }
708 }
709
710 if ((rval != NDI_SUCCESS) &&
711 (req->ra_flags & NDI_RA_ALLOC_PARTIAL_OK) &&
712 (backlargestp != NULL)) {
713 adjust_link(backlargestp, *backlargestp, largestbase,
714 largestlen);
715
716 base = largestbase;
717 len = largestlen;
718 rval = NDI_RA_PARTIAL_REQ;
719 }
720
721 mutex_exit(&ra_lock);
722
723 if (rval == NDI_FAILURE) {
724 *retbasep = 0;
725 *retlenp = 0;
726 } else {
727 *retbasep = base;
728 *retlenp = len;
729 }
730
731 /*
732 * Update dip's "available" property, substract this piece of
733 * resource from the pool.
734 */
735 if ((rval == NDI_SUCCESS) || (rval == NDI_RA_PARTIAL_REQ))
736 (void) pci_get_available_prop(dipmap->ra_dip,
737 *retbasep, *retlenp, type);
738
739 return (rval);
740 }
741
742 /*
743 * isa_resource_setup
744 * check for /used-resources and initialize
745 * based on info there. If no /used-resources,
746 * fail.
747 */
748 int
isa_resource_setup()749 isa_resource_setup()
750 {
751 dev_info_t *used, *usedpdip;
752 /*
753 * note that at this time bootconf creates 32 bit properties for
754 * io-space and device-memory
755 */
756 struct iorange {
757 uint32_t base;
758 uint32_t len;
759 } *iorange;
760 struct memrange {
761 uint32_t base;
762 uint32_t len;
763 } *memrange;
764 uint32_t *irq;
765 int proplen;
766 int i, len;
767 int maxrange;
768 ndi_ra_request_t req;
769 uint64_t retbase;
770 uint64_t retlen;
771
772 used = ddi_find_devinfo("used-resources", -1, 0);
773 if (used == NULL) {
774 DEBUGPRT(CE_CONT,
775 "isa_resource_setup: used-resources not found");
776 return (NDI_FAILURE);
777 }
778
779 /*
780 * initialize to all resources being present
781 * and then remove the ones in use.
782 */
783
784 usedpdip = ddi_root_node();
785
786 DEBUGPRT(CE_CONT, "isa_resource_setup: used = %p usedpdip = %p\n",
787 (void *)used, (void *)usedpdip);
788
789 if (ndi_ra_map_setup(usedpdip, NDI_RA_TYPE_IO) == NDI_FAILURE) {
790 return (NDI_FAILURE);
791 }
792
793 /* initialize io space, highest end base is 0xffff */
794 /* note that length is highest addr + 1 since starts from 0 */
795
796 (void) ndi_ra_free(usedpdip, 0, 0xffff + 1, NDI_RA_TYPE_IO, 0);
797
798 if (ddi_getlongprop(DDI_DEV_T_ANY, used, DDI_PROP_DONTPASS,
799 "io-space", (caddr_t)&iorange, &proplen) == DDI_SUCCESS) {
800 maxrange = proplen / sizeof (struct iorange);
801 /* remove the "used" I/O resources */
802 for (i = 0; i < maxrange; i++) {
803 bzero((caddr_t)&req, sizeof (req));
804 req.ra_addr = (uint64_t)iorange[i].base;
805 req.ra_len = (uint64_t)iorange[i].len;
806 req.ra_flags = NDI_RA_ALLOC_SPECIFIED;
807 (void) ndi_ra_alloc(usedpdip, &req, &retbase, &retlen,
808 NDI_RA_TYPE_IO, 0);
809 }
810
811 kmem_free((caddr_t)iorange, proplen);
812 }
813
814 if (ndi_ra_map_setup(usedpdip, NDI_RA_TYPE_MEM) == NDI_FAILURE) {
815 return (NDI_FAILURE);
816 }
817 /* initialize memory space where highest end base is 0xffffffff */
818 /* note that length is highest addr + 1 since starts from 0 */
819 (void) ndi_ra_free(usedpdip, 0, ((uint64_t)((uint32_t)~0)) + 1,
820 NDI_RA_TYPE_MEM, 0);
821
822 if (ddi_getlongprop(DDI_DEV_T_ANY, used, DDI_PROP_DONTPASS,
823 "device-memory", (caddr_t)&memrange, &proplen) == DDI_SUCCESS) {
824 maxrange = proplen / sizeof (struct memrange);
825 /* remove the "used" memory resources */
826 for (i = 0; i < maxrange; i++) {
827 bzero((caddr_t)&req, sizeof (req));
828 req.ra_addr = (uint64_t)memrange[i].base;
829 req.ra_len = (uint64_t)memrange[i].len;
830 req.ra_flags = NDI_RA_ALLOC_SPECIFIED;
831 (void) ndi_ra_alloc(usedpdip, &req, &retbase, &retlen,
832 NDI_RA_TYPE_MEM, 0);
833 }
834
835 kmem_free((caddr_t)memrange, proplen);
836 }
837
838 if (ndi_ra_map_setup(usedpdip, NDI_RA_TYPE_INTR) == NDI_FAILURE) {
839 return (NDI_FAILURE);
840 }
841
842 /* initialize the interrupt space */
843 (void) ndi_ra_free(usedpdip, 0, 16, NDI_RA_TYPE_INTR, 0);
844
845 /*
846 * The PC/AT had two PICs cascaded together through IRQ 2 on the
847 * primary with firmware providing compatibility. Effectively IRQ 2
848 * and 9 are the same. Intel platforms have retained compatibility
849 * for that since.
850 *
851 * Mark IRQ 2 as consumed, so it can never be allocated.
852 */
853 #if defined(__x86)
854 bzero(&req, sizeof (req));
855 req.ra_addr = 2;
856 req.ra_len = 1;
857 req.ra_flags = NDI_RA_ALLOC_SPECIFIED;
858 (void) ndi_ra_alloc(usedpdip, &req, &retbase, &retlen,
859 NDI_RA_TYPE_INTR, 0);
860 #endif
861
862 if (ddi_getlongprop(DDI_DEV_T_ANY, used, DDI_PROP_DONTPASS,
863 "interrupts", (caddr_t)&irq, &proplen) == DDI_SUCCESS) {
864 /* Initialize available interrupts by negating the used */
865 len = (proplen / sizeof (uint32_t));
866 for (i = 0; i < len; i++) {
867 bzero((caddr_t)&req, sizeof (req));
868 req.ra_addr = (uint64_t)irq[i];
869 req.ra_len = 1;
870 req.ra_flags = NDI_RA_ALLOC_SPECIFIED;
871 (void) ndi_ra_alloc(usedpdip, &req, &retbase, &retlen,
872 NDI_RA_TYPE_INTR, 0);
873 }
874 kmem_free((caddr_t)irq, proplen);
875 }
876
877 #ifdef BUSRA_DEBUG
878 if (busra_debug) {
879 (void) ra_dump_all(NULL, usedpdip);
880 }
881 #endif
882 return (NDI_SUCCESS);
883
884 }
885
886 #ifdef BUSRA_DEBUG
887 void
ra_dump_all(char * type,dev_info_t * dip)888 ra_dump_all(char *type, dev_info_t *dip)
889 {
890
891 struct ra_type_map *typemap;
892 struct ra_dip_type *dipmap;
893 struct ra_resource *res;
894
895 typemap = (struct ra_type_map *)ra_map_list_head;
896
897 for (; typemap != NULL; typemap = typemap->ra_next) {
898 if (type != NULL) {
899 if (strcmp(typemap->type, type) != 0)
900 continue;
901 }
902 cmn_err(CE_CONT, "type is %s\n", typemap->type);
903 for (dipmap = typemap->ra_dip_list; dipmap != NULL;
904 dipmap = dipmap->ra_next) {
905 if (dip != NULL) {
906 if ((dipmap->ra_dip) != dip)
907 continue;
908 }
909 cmn_err(CE_CONT, " dip is %p\n",
910 (void *)dipmap->ra_dip);
911 for (res = dipmap->ra_rangeset; res != NULL;
912 res = res->ra_next) {
913 cmn_err(CE_CONT, "\t range is %" PRIx64
914 " %" PRIx64 "\n", res->ra_base,
915 res->ra_len);
916 }
917 if (dip != NULL)
918 break;
919 }
920 if (type != NULL)
921 break;
922 }
923 }
924 #endif
925
926 struct bus_range { /* 1275 "bus-range" property definition */
927 uint32_t lo;
928 uint32_t hi;
929 } pci_bus_range;
930
931 struct busnum_ctrl {
932 int rv;
933 dev_info_t *dip;
934 struct bus_range *range;
935 };
936
937
938 /*
939 * Setup resource map for the pci bus node based on the "available"
940 * property and "bus-range" property.
941 */
942 int
pci_resource_setup(dev_info_t * dip)943 pci_resource_setup(dev_info_t *dip)
944 {
945 pci_regspec_t *regs;
946 int rlen, rcount, i;
947 char bus_type[16] = "(unknown)";
948 int len;
949 struct busnum_ctrl ctrl;
950 int rval = NDI_SUCCESS;
951
952 /*
953 * If this is a pci bus node then look for "available" property
954 * to find the available resources on this bus.
955 */
956 len = sizeof (bus_type);
957 if (ddi_prop_op(DDI_DEV_T_ANY, dip, PROP_LEN_AND_VAL_BUF,
958 DDI_PROP_CANSLEEP | DDI_PROP_DONTPASS, "device_type",
959 (caddr_t)&bus_type, &len) != DDI_SUCCESS)
960 return (NDI_FAILURE);
961
962 /* it is not a pci/pci-ex bus type */
963 if ((strcmp(bus_type, "pci") != 0) && (strcmp(bus_type, "pciex") != 0))
964 return (NDI_FAILURE);
965
966 /*
967 * The pci-hotplug project addresses adding the call
968 * to pci_resource_setup from pci nexus driver.
969 * However that project would initially be only for x86,
970 * so for sparc pcmcia-pci support we still need to call
971 * pci_resource_setup in pcic driver. Once all pci nexus drivers
972 * are updated to call pci_resource_setup this portion of the
973 * code would really become an assert to make sure this
974 * function is not called for the same dip twice.
975 */
976 /*
977 * Another user for the check below is hotplug PCI/PCIe bridges.
978 *
979 * For PCI/PCIE devices under a PCIE hierarchy, ndi_ra_alloc/free
980 * will update the devinfo node's "available" property, to reflect
981 * the fact that a piece of resource has been removed/added to
982 * a devinfo node.
983 * During probe of a new PCI bridge in the hotplug case, PCI
984 * configurator firstly allocates maximum MEM/IO from its parent,
985 * then calls ndi_ra_free() to use these resources to setup busra
986 * pool for the new bridge, as well as adding these resources to
987 * the "available" property of the new devinfo node. Then configu-
988 * rator will attach driver for the bridge before probing its
989 * children, and the bridge driver will then initialize its hotplug
990 * contollers (if it supports hotplug) and HPC driver will call
991 * this function to setup the busra pool, but the resource pool
992 * has already been setup at the first of pcicfg_probe_bridge(),
993 * thus we need the check below to return directly in this case.
994 * Otherwise the ndi_ra_free() below will see overlapping resources.
995 */
996 {
997 if (ra_map_exist(dip, NDI_RA_TYPE_MEM) == NDI_SUCCESS) {
998 return (NDI_FAILURE);
999 }
1000 }
1001
1002
1003 /*
1004 * Create empty resource maps first.
1005 *
1006 * NOTE: If all the allocated resources are already assigned to
1007 * device(s) in the hot plug slot then "available" property may not
1008 * be present. But, subsequent hot plug operation may unconfigure
1009 * the device in the slot and try to free up it's resources. So,
1010 * at the minimum we should create empty maps here.
1011 */
1012 if (ndi_ra_map_setup(dip, NDI_RA_TYPE_MEM) == NDI_FAILURE) {
1013 return (NDI_FAILURE);
1014 }
1015
1016 if (ndi_ra_map_setup(dip, NDI_RA_TYPE_IO) == NDI_FAILURE) {
1017 return (NDI_FAILURE);
1018 }
1019
1020 if (ndi_ra_map_setup(dip, NDI_RA_TYPE_PCI_BUSNUM) == NDI_FAILURE) {
1021 return (NDI_FAILURE);
1022 }
1023
1024 if (ndi_ra_map_setup(dip, NDI_RA_TYPE_PCI_PREFETCH_MEM) ==
1025 NDI_FAILURE) {
1026 return (NDI_FAILURE);
1027 }
1028
1029 /* read the "available" property if it is available */
1030 if (ddi_getlongprop(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
1031 "available", (caddr_t)®s, &rlen) == DDI_SUCCESS) {
1032 /*
1033 * Remove "available" property as the entries will be
1034 * re-created in ndi_ra_free() below, note prom based
1035 * property will not be removed. But in ndi_ra_free()
1036 * we'll be creating non prom based property entries.
1037 */
1038 (void) ndi_prop_remove(DDI_DEV_T_NONE, dip, "available");
1039 /*
1040 * create the available resource list for both memory and
1041 * io space
1042 */
1043 rcount = rlen / sizeof (pci_regspec_t);
1044 for (i = 0; i < rcount; i++) {
1045 switch (PCI_REG_ADDR_G(regs[i].pci_phys_hi)) {
1046 case PCI_REG_ADDR_G(PCI_ADDR_MEM32):
1047 (void) ndi_ra_free(dip,
1048 (uint64_t)regs[i].pci_phys_low,
1049 (uint64_t)regs[i].pci_size_low,
1050 (regs[i].pci_phys_hi & PCI_REG_PF_M) ?
1051 NDI_RA_TYPE_PCI_PREFETCH_MEM :
1052 NDI_RA_TYPE_MEM,
1053 0);
1054 break;
1055 case PCI_REG_ADDR_G(PCI_ADDR_MEM64):
1056 (void) ndi_ra_free(dip,
1057 ((uint64_t)(regs[i].pci_phys_mid) << 32) |
1058 ((uint64_t)(regs[i].pci_phys_low)),
1059 ((uint64_t)(regs[i].pci_size_hi) << 32) |
1060 ((uint64_t)(regs[i].pci_size_low)),
1061 (regs[i].pci_phys_hi & PCI_REG_PF_M) ?
1062 NDI_RA_TYPE_PCI_PREFETCH_MEM :
1063 NDI_RA_TYPE_MEM,
1064 0);
1065 break;
1066 case PCI_REG_ADDR_G(PCI_ADDR_IO):
1067 (void) ndi_ra_free(dip,
1068 (uint64_t)regs[i].pci_phys_low,
1069 (uint64_t)regs[i].pci_size_low,
1070 NDI_RA_TYPE_IO,
1071 0);
1072 break;
1073 case PCI_REG_ADDR_G(PCI_ADDR_CONFIG):
1074 break;
1075 default:
1076 cmn_err(CE_WARN,
1077 "pci_resource_setup: bad addr type: %x\n",
1078 PCI_REG_ADDR_G(regs[i].pci_phys_hi));
1079 break;
1080 }
1081 }
1082 kmem_free(regs, rlen);
1083 }
1084
1085 /*
1086 * update resource map for available bus numbers if the node
1087 * has available-bus-range or bus-range property.
1088 */
1089 len = sizeof (struct bus_range);
1090 if (ddi_getlongprop_buf(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
1091 "available-bus-range", (caddr_t)&pci_bus_range, &len) ==
1092 DDI_SUCCESS) {
1093 /*
1094 * Add bus numbers in the range to the free list.
1095 */
1096 (void) ndi_ra_free(dip, (uint64_t)pci_bus_range.lo,
1097 (uint64_t)pci_bus_range.hi - (uint64_t)pci_bus_range.lo +
1098 1, NDI_RA_TYPE_PCI_BUSNUM, 0);
1099 } else {
1100 /*
1101 * We don't have an available-bus-range property. If, instead,
1102 * we have a bus-range property we add all the bus numbers
1103 * in that range to the free list but we must then scan
1104 * for pci-pci bridges on this bus to find out the if there
1105 * are any of those bus numbers already in use. If so, we can
1106 * reclaim them.
1107 */
1108 len = sizeof (struct bus_range);
1109 if (ddi_getlongprop_buf(DDI_DEV_T_ANY, dip,
1110 DDI_PROP_DONTPASS, "bus-range", (caddr_t)&pci_bus_range,
1111 &len) == DDI_SUCCESS) {
1112 if (pci_bus_range.lo != pci_bus_range.hi) {
1113 /*
1114 * Add bus numbers other than the secondary
1115 * bus number to the free list.
1116 */
1117 (void) ndi_ra_free(dip,
1118 (uint64_t)pci_bus_range.lo + 1,
1119 (uint64_t)pci_bus_range.hi -
1120 (uint64_t)pci_bus_range.lo,
1121 NDI_RA_TYPE_PCI_BUSNUM, 0);
1122
1123 /* scan for pci-pci bridges */
1124 ctrl.rv = DDI_SUCCESS;
1125 ctrl.dip = dip;
1126 ctrl.range = &pci_bus_range;
1127 ndi_devi_enter(dip);
1128 ddi_walk_devs(ddi_get_child(dip),
1129 claim_pci_busnum, (void *)&ctrl);
1130 ndi_devi_exit(dip);
1131 if (ctrl.rv != DDI_SUCCESS) {
1132 /* failed to create the map */
1133 (void) ndi_ra_map_destroy(dip,
1134 NDI_RA_TYPE_PCI_BUSNUM);
1135 rval = NDI_FAILURE;
1136 }
1137 }
1138 }
1139 }
1140
1141 #ifdef BUSRA_DEBUG
1142 if (busra_debug) {
1143 (void) ra_dump_all(NULL, dip);
1144 }
1145 #endif
1146
1147 return (rval);
1148 }
1149
1150 /*
1151 * If the device is a PCI bus device (i.e bus-range property exists) then
1152 * claim the bus numbers used by the device from the specified bus
1153 * resource map.
1154 */
1155 static int
claim_pci_busnum(dev_info_t * dip,void * arg)1156 claim_pci_busnum(dev_info_t *dip, void *arg)
1157 {
1158 struct bus_range pci_bus_range;
1159 struct busnum_ctrl *ctrl;
1160 ndi_ra_request_t req;
1161 char bus_type[16] = "(unknown)";
1162 int len;
1163 uint64_t base;
1164 uint64_t retlen;
1165
1166 ctrl = (struct busnum_ctrl *)arg;
1167
1168 /* check if this is a PCI bus node */
1169 len = sizeof (bus_type);
1170 if (ddi_prop_op(DDI_DEV_T_ANY, dip, PROP_LEN_AND_VAL_BUF,
1171 DDI_PROP_CANSLEEP | DDI_PROP_DONTPASS, "device_type",
1172 (caddr_t)&bus_type, &len) != DDI_SUCCESS)
1173 return (DDI_WALK_PRUNECHILD);
1174
1175 /* it is not a pci/pci-ex bus type */
1176 if ((strcmp(bus_type, "pci") != 0) && (strcmp(bus_type, "pciex") != 0))
1177 return (DDI_WALK_PRUNECHILD);
1178
1179 /* look for the bus-range property */
1180 len = sizeof (struct bus_range);
1181 if (ddi_getlongprop_buf(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
1182 "bus-range", (caddr_t)&pci_bus_range, &len) == DDI_SUCCESS) {
1183 if ((pci_bus_range.lo >= ctrl->range->lo) &&
1184 (pci_bus_range.hi <= ctrl->range->hi)) {
1185
1186 /* claim the bus range from the bus resource map */
1187 bzero((caddr_t)&req, sizeof (req));
1188 req.ra_addr = (uint64_t)pci_bus_range.lo;
1189 req.ra_flags |= NDI_RA_ALLOC_SPECIFIED;
1190 req.ra_len = (uint64_t)pci_bus_range.hi -
1191 (uint64_t)pci_bus_range.lo + 1;
1192 if (ndi_ra_alloc(ctrl->dip, &req, &base, &retlen,
1193 NDI_RA_TYPE_PCI_BUSNUM, 0) == NDI_SUCCESS)
1194 return (DDI_WALK_PRUNECHILD);
1195 }
1196 }
1197
1198 /*
1199 * Error return.
1200 */
1201 ctrl->rv = DDI_FAILURE;
1202 return (DDI_WALK_TERMINATE);
1203 }
1204
1205 void
pci_resource_destroy(dev_info_t * dip)1206 pci_resource_destroy(dev_info_t *dip)
1207 {
1208 (void) ndi_ra_map_destroy(dip, NDI_RA_TYPE_IO);
1209
1210 (void) ndi_ra_map_destroy(dip, NDI_RA_TYPE_MEM);
1211
1212 (void) ndi_ra_map_destroy(dip, NDI_RA_TYPE_PCI_BUSNUM);
1213
1214 (void) ndi_ra_map_destroy(dip, NDI_RA_TYPE_PCI_PREFETCH_MEM);
1215 }
1216
1217
1218 int
pci_resource_setup_avail(dev_info_t * dip,pci_regspec_t * avail_p,int entries)1219 pci_resource_setup_avail(dev_info_t *dip, pci_regspec_t *avail_p, int entries)
1220 {
1221 int i;
1222
1223 if (ndi_ra_map_setup(dip, NDI_RA_TYPE_MEM) == NDI_FAILURE)
1224 return (NDI_FAILURE);
1225 if (ndi_ra_map_setup(dip, NDI_RA_TYPE_IO) == NDI_FAILURE)
1226 return (NDI_FAILURE);
1227 if (ndi_ra_map_setup(dip, NDI_RA_TYPE_PCI_PREFETCH_MEM) == NDI_FAILURE)
1228 return (NDI_FAILURE);
1229
1230 /* for each entry in the PCI "available" property */
1231 for (i = 0; i < entries; i++, avail_p++) {
1232 if (avail_p->pci_phys_hi == -1u)
1233 goto err;
1234
1235 switch (PCI_REG_ADDR_G(avail_p->pci_phys_hi)) {
1236 case PCI_REG_ADDR_G(PCI_ADDR_MEM32): {
1237 (void) ndi_ra_free(dip, (uint64_t)avail_p->pci_phys_low,
1238 (uint64_t)avail_p->pci_size_low,
1239 (avail_p->pci_phys_hi & PCI_REG_PF_M) ?
1240 NDI_RA_TYPE_PCI_PREFETCH_MEM : NDI_RA_TYPE_MEM,
1241 0);
1242 }
1243 break;
1244 case PCI_REG_ADDR_G(PCI_ADDR_IO):
1245 (void) ndi_ra_free(dip, (uint64_t)avail_p->pci_phys_low,
1246 (uint64_t)avail_p->pci_size_low, NDI_RA_TYPE_IO, 0);
1247 break;
1248 default:
1249 goto err;
1250 }
1251 }
1252 #ifdef BUSRA_DEBUG
1253 if (busra_debug) {
1254 (void) ra_dump_all(NULL, dip);
1255 }
1256 #endif
1257 return (NDI_SUCCESS);
1258
1259 err:
1260 cmn_err(CE_WARN, "pci_resource_setup_avail: bad entry[%d]=%x\n",
1261 i, avail_p->pci_phys_hi);
1262 return (NDI_FAILURE);
1263 }
1264
1265 /*
1266 * Return true if the devinfo node resides on PCI or PCI Express bus,
1267 * sitting in a PCI Express hierarchy.
1268 */
1269 static boolean_t
is_pcie_fabric(dev_info_t * dip)1270 is_pcie_fabric(dev_info_t *dip)
1271 {
1272 dev_info_t *root = ddi_root_node();
1273 dev_info_t *pdip;
1274 boolean_t found = B_FALSE;
1275 char *bus;
1276
1277 /*
1278 * Is this pci/pcie ?
1279 */
1280 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip,
1281 DDI_PROP_DONTPASS, "device_type", &bus) !=
1282 DDI_PROP_SUCCESS) {
1283 DEBUGPRT(CE_WARN, "is_pcie_fabric: cannot find "
1284 "\"device_type\" property for dip %p\n", (void *)dip);
1285 return (B_FALSE);
1286 }
1287
1288 if (strcmp(bus, "pciex") == 0) {
1289 /* pcie bus, done */
1290 ddi_prop_free(bus);
1291 return (B_TRUE);
1292 } else if (strcmp(bus, "pci") == 0) {
1293 /*
1294 * pci bus, fall through to check if it resides in
1295 * a pcie hierarchy.
1296 */
1297 ddi_prop_free(bus);
1298 } else {
1299 /* other bus, return failure */
1300 ddi_prop_free(bus);
1301 return (B_FALSE);
1302 }
1303
1304 /*
1305 * Does this device reside in a pcie fabric ?
1306 */
1307 for (pdip = ddi_get_parent(dip); pdip && (pdip != root) &&
1308 !found; pdip = ddi_get_parent(pdip)) {
1309 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, pdip,
1310 DDI_PROP_DONTPASS, "device_type", &bus) !=
1311 DDI_PROP_SUCCESS)
1312 break;
1313
1314 if (strcmp(bus, "pciex") == 0)
1315 found = B_TRUE;
1316
1317 ddi_prop_free(bus);
1318 }
1319
1320 return (found);
1321 }
1322
1323 /*
1324 * Remove a piece of IO/MEM resource from "available" property of 'dip'.
1325 */
1326 static int
pci_get_available_prop(dev_info_t * dip,uint64_t base,uint64_t len,char * busra_type)1327 pci_get_available_prop(dev_info_t *dip, uint64_t base, uint64_t len,
1328 char *busra_type)
1329 {
1330 pci_regspec_t *regs, *newregs;
1331 uint_t status;
1332 int rlen, rcount;
1333 int i, j, k;
1334 uint64_t dlen;
1335 boolean_t found = B_FALSE;
1336 uint32_t type;
1337
1338 /* check if we're manipulating MEM/IO resource */
1339 if ((type = pci_type_ra2pci(busra_type)) == PCI_ADDR_TYPE_INVAL)
1340 return (DDI_SUCCESS);
1341
1342 /* check if dip is a pci/pcie device resides in a pcie fabric */
1343 if (!is_pcie_fabric(dip))
1344 return (DDI_SUCCESS);
1345
1346 status = ddi_getlongprop(DDI_DEV_T_ANY, dip,
1347 DDI_PROP_DONTPASS | DDI_PROP_NOTPROM,
1348 "available", (caddr_t)®s, &rlen);
1349
1350 ASSERT(status == DDI_SUCCESS);
1351 if (status != DDI_SUCCESS)
1352 return (status);
1353
1354 /*
1355 * The updated "available" property will at most have one more entry
1356 * than existing one (when the requested range is in the middle of
1357 * the matched property entry)
1358 */
1359 newregs = kmem_alloc(rlen + sizeof (pci_regspec_t), KM_SLEEP);
1360
1361 rcount = rlen / sizeof (pci_regspec_t);
1362 for (i = 0, j = 0; i < rcount; i++) {
1363 if (type == (regs[i].pci_phys_hi & PCI_ADDR_TYPE_MASK)) {
1364 uint64_t range_base, range_len;
1365
1366 range_base = ((uint64_t)(regs[i].pci_phys_mid) << 32) |
1367 ((uint64_t)(regs[i].pci_phys_low));
1368 range_len = ((uint64_t)(regs[i].pci_size_hi) << 32) |
1369 ((uint64_t)(regs[i].pci_size_low));
1370
1371 if ((base < range_base) ||
1372 (base + len > range_base + range_len)) {
1373 /*
1374 * not a match, copy the entry
1375 */
1376 goto copy_entry;
1377 }
1378
1379 /*
1380 * range_base base base+len range_base
1381 * +range_len
1382 * +------------+-----------+----------+
1383 * | |///////////| |
1384 * +------------+-----------+----------+
1385 */
1386 /*
1387 * Found a match, remove the range out of this entry.
1388 */
1389 found = B_TRUE;
1390
1391 dlen = base - range_base;
1392 if (dlen != 0) {
1393 newregs[j].pci_phys_hi = regs[i].pci_phys_hi;
1394 newregs[j].pci_phys_mid =
1395 (uint32_t)(range_base >> 32);
1396 newregs[j].pci_phys_low =
1397 (uint32_t)(range_base);
1398 newregs[j].pci_size_hi = (uint32_t)(dlen >> 32);
1399 newregs[j].pci_size_low = (uint32_t)dlen;
1400 j++;
1401 }
1402
1403 dlen = (range_base + range_len) - (base + len);
1404 if (dlen != 0) {
1405 newregs[j].pci_phys_hi = regs[i].pci_phys_hi;
1406 newregs[j].pci_phys_mid =
1407 (uint32_t)((base + len)>> 32);
1408 newregs[j].pci_phys_low =
1409 (uint32_t)(base + len);
1410 newregs[j].pci_size_hi = (uint32_t)(dlen >> 32);
1411 newregs[j].pci_size_low = (uint32_t)dlen;
1412 j++;
1413 }
1414
1415 /*
1416 * We've allocated the resource from the matched
1417 * entry, almost finished but still need to copy
1418 * the rest entries from the original property
1419 * array.
1420 */
1421 for (k = i + 1; k < rcount; k++) {
1422 newregs[j] = regs[k];
1423 j++;
1424 }
1425
1426 goto done;
1427
1428 } else {
1429 copy_entry:
1430 newregs[j] = regs[i];
1431 j++;
1432 }
1433 }
1434
1435 done:
1436 /*
1437 * This should not fail so assert it. For non-debug kernel we don't
1438 * want to panic thus only logging a warning message.
1439 */
1440 ASSERT(found == B_TRUE);
1441 if (!found) {
1442 cmn_err(CE_WARN, "pci_get_available_prop: failed to remove "
1443 "resource from dip %p : base 0x%" PRIx64 ", len 0x%" PRIX64
1444 ", type 0x%x\n", (void *)dip, base, len, type);
1445 kmem_free(newregs, rlen + sizeof (pci_regspec_t));
1446 kmem_free(regs, rlen);
1447
1448 return (DDI_FAILURE);
1449 }
1450
1451 /*
1452 * Found the resources from parent, update the "available"
1453 * property.
1454 */
1455 if (j == 0) {
1456 /* all the resources are consumed, remove the property */
1457 (void) ndi_prop_remove(DDI_DEV_T_NONE, dip, "available");
1458 } else {
1459 /*
1460 * There are still resource available in the parent dip,
1461 * update with the remaining resources.
1462 */
1463 (void) ndi_prop_update_int_array(DDI_DEV_T_NONE, dip,
1464 "available", (int *)newregs,
1465 (j * sizeof (pci_regspec_t)) / sizeof (int));
1466 }
1467
1468 kmem_free(newregs, rlen + sizeof (pci_regspec_t));
1469 kmem_free(regs, rlen);
1470
1471 return (DDI_SUCCESS);
1472 }
1473
1474 /*
1475 * Add a piece of IO/MEM resource to "available" property of 'dip'.
1476 */
1477 static int
pci_put_available_prop(dev_info_t * dip,uint64_t base,uint64_t len,char * busra_type)1478 pci_put_available_prop(dev_info_t *dip, uint64_t base, uint64_t len,
1479 char *busra_type)
1480 {
1481 pci_regspec_t *regs, *newregs;
1482 uint_t status;
1483 int rlen, rcount;
1484 int i, j, k;
1485 int matched = 0;
1486 uint64_t orig_base = base;
1487 uint64_t orig_len = len;
1488 uint32_t type;
1489
1490 /* check if we're manipulating MEM/IO resource */
1491 if ((type = pci_type_ra2pci(busra_type)) == PCI_ADDR_TYPE_INVAL)
1492 return (DDI_SUCCESS);
1493
1494 /* check if dip is a pci/pcie device resides in a pcie fabric */
1495 if (!is_pcie_fabric(dip))
1496 return (DDI_SUCCESS);
1497
1498 status = ddi_getlongprop(DDI_DEV_T_ANY, dip,
1499 DDI_PROP_DONTPASS | DDI_PROP_NOTPROM,
1500 "available", (caddr_t)®s, &rlen);
1501
1502 switch (status) {
1503 case DDI_PROP_NOT_FOUND:
1504 goto not_found;
1505
1506 case DDI_PROP_SUCCESS:
1507 break;
1508
1509 default:
1510 return (status);
1511 }
1512
1513 /*
1514 * The "available" property exist on the node, try to put this
1515 * resource back, merge if there are adjacent resources.
1516 *
1517 * The updated "available" property will at most have one more entry
1518 * than existing one (when there is no adjacent entries thus the new
1519 * resource is appended at the end)
1520 */
1521 newregs = kmem_alloc(rlen + sizeof (pci_regspec_t), KM_SLEEP);
1522
1523 rcount = rlen / sizeof (pci_regspec_t);
1524 for (i = 0, j = 0; i < rcount; i++) {
1525 if (type == (regs[i].pci_phys_hi & PCI_ADDR_TYPE_MASK)) {
1526 uint64_t range_base, range_len;
1527
1528 range_base = ((uint64_t)(regs[i].pci_phys_mid) << 32) |
1529 ((uint64_t)(regs[i].pci_phys_low));
1530 range_len = ((uint64_t)(regs[i].pci_size_hi) << 32) |
1531 ((uint64_t)(regs[i].pci_size_low));
1532
1533 if ((base + len < range_base) ||
1534 (base > range_base + range_len)) {
1535 /*
1536 * Not adjacent, copy the entry and contiue
1537 */
1538 goto copy_entry;
1539 }
1540
1541 /*
1542 * Adjacent or overlap?
1543 *
1544 * Should not have overlapping resources so assert it.
1545 * For non-debug kernel we don't want to panic thus
1546 * only logging a warning message.
1547 */
1548 #if 0
1549 ASSERT((base + len == range_base) ||
1550 (base == range_base + range_len));
1551 #endif
1552 if ((base + len != range_base) &&
1553 (base != range_base + range_len)) {
1554 cmn_err(CE_WARN, "pci_put_available_prop: "
1555 "failed to add resource to dip %p : "
1556 "base 0x%" PRIx64 ", len 0x%" PRIx64 " "
1557 "overlaps with existing resource "
1558 "base 0x%" PRIx64 ", len 0x%" PRIx64 "\n",
1559 (void *)dip, orig_base, orig_len,
1560 range_base, range_len);
1561
1562 goto failure;
1563 }
1564
1565 /*
1566 * On the left:
1567 *
1568 * base range_base
1569 * +-------------+-------------+
1570 * |/////////////| |
1571 * +-------------+-------------+
1572 * len range_len
1573 *
1574 * On the right:
1575 *
1576 * range_base base
1577 * +-------------+-------------+
1578 * | |/////////////|
1579 * +-------------+-------------+
1580 * range_len len
1581 */
1582 /*
1583 * There are at most two piece of resources adjacent
1584 * with this resource, assert it.
1585 */
1586 ASSERT(matched < 2);
1587
1588 if (!(matched < 2)) {
1589 cmn_err(CE_WARN, "pci_put_available_prop: "
1590 "failed to add resource to dip %p : "
1591 "base 0x%" PRIx64 ", len 0x%" PRIx64 " "
1592 "found overlaps in existing resources\n",
1593 (void *)dip, orig_base, orig_len);
1594
1595 goto failure;
1596 }
1597
1598 /* setup base & len to refer to the merged range */
1599 len += range_len;
1600 if (base == range_base + range_len)
1601 base = range_base;
1602
1603 if (matched == 0) {
1604 /*
1605 * One adjacent entry, add this resource in
1606 */
1607 newregs[j].pci_phys_hi = regs[i].pci_phys_hi;
1608 newregs[j].pci_phys_mid =
1609 (uint32_t)(base >> 32);
1610 newregs[j].pci_phys_low = (uint32_t)(base);
1611 newregs[j].pci_size_hi = (uint32_t)(len >> 32);
1612 newregs[j].pci_size_low = (uint32_t)len;
1613
1614 matched = 1;
1615 k = j;
1616 j++;
1617 } else { /* matched == 1 */
1618 /*
1619 * Two adjacent entries, merge them together
1620 */
1621 newregs[k].pci_phys_hi = regs[i].pci_phys_hi;
1622 newregs[k].pci_phys_mid =
1623 (uint32_t)(base >> 32);
1624 newregs[k].pci_phys_low = (uint32_t)(base);
1625 newregs[k].pci_size_hi = (uint32_t)(len >> 32);
1626 newregs[k].pci_size_low = (uint32_t)len;
1627
1628 matched = 2;
1629 }
1630 } else {
1631 copy_entry:
1632 newregs[j] = regs[i];
1633 j++;
1634 }
1635 }
1636
1637 if (matched == 0) {
1638 /* No adjacent entries, append at end */
1639 ASSERT(j == rcount);
1640
1641 /*
1642 * According to page 15 of 1275 spec, bit "n" of "available"
1643 * should be set to 1.
1644 */
1645 newregs[j].pci_phys_hi = type;
1646 newregs[j].pci_phys_hi |= PCI_REG_REL_M;
1647
1648 newregs[j].pci_phys_mid = (uint32_t)(base >> 32);
1649 newregs[j].pci_phys_low = (uint32_t)base;
1650 newregs[j].pci_size_hi = (uint32_t)(len >> 32);
1651 newregs[j].pci_size_low = (uint32_t)len;
1652
1653 j++;
1654 }
1655
1656 (void) ndi_prop_update_int_array(DDI_DEV_T_NONE, dip,
1657 "available", (int *)newregs,
1658 (j * sizeof (pci_regspec_t)) / sizeof (int));
1659
1660 kmem_free(newregs, rlen + sizeof (pci_regspec_t));
1661 kmem_free(regs, rlen);
1662 return (DDI_SUCCESS);
1663
1664 not_found:
1665 /*
1666 * There is no "available" property on the parent node, create it.
1667 */
1668 newregs = kmem_alloc(sizeof (pci_regspec_t), KM_SLEEP);
1669
1670 /*
1671 * According to page 15 of 1275 spec, bit "n" of "available" should
1672 * be set to 1.
1673 */
1674 newregs[0].pci_phys_hi = type;
1675 newregs[0].pci_phys_hi |= PCI_REG_REL_M;
1676
1677 newregs[0].pci_phys_mid = (uint32_t)(base >> 32);
1678 newregs[0].pci_phys_low = (uint32_t)base;
1679 newregs[0].pci_size_hi = (uint32_t)(len >> 32);
1680 newregs[0].pci_size_low = (uint32_t)len;
1681
1682 (void) ndi_prop_update_int_array(DDI_DEV_T_NONE, dip,
1683 "available", (int *)newregs,
1684 sizeof (pci_regspec_t) / sizeof (int));
1685 kmem_free(newregs, sizeof (pci_regspec_t));
1686 return (DDI_SUCCESS);
1687
1688 failure:
1689 kmem_free(newregs, rlen + sizeof (pci_regspec_t));
1690 kmem_free(regs, rlen);
1691 return (DDI_FAILURE);
1692 }
1693
1694 static uint32_t
pci_type_ra2pci(char * type)1695 pci_type_ra2pci(char *type)
1696 {
1697 uint32_t pci_type = PCI_ADDR_TYPE_INVAL;
1698
1699 /*
1700 * No 64 bit mem support for now
1701 */
1702 if (strcmp(type, NDI_RA_TYPE_IO) == 0) {
1703 pci_type = PCI_ADDR_IO;
1704
1705 } else if (strcmp(type, NDI_RA_TYPE_MEM) == 0) {
1706 pci_type = PCI_ADDR_MEM32;
1707
1708 } else if (strcmp(type, NDI_RA_TYPE_PCI_PREFETCH_MEM) == 0) {
1709 pci_type = PCI_ADDR_MEM32;
1710 pci_type |= PCI_REG_PF_M;
1711 }
1712
1713 return (pci_type);
1714 }
1715