1 /* 2 * Copyright 2014-2017 Cavium, Inc. 3 * The contents of this file are subject to the terms of the Common Development 4 * and Distribution License, v.1, (the "License"). 5 * 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the License at available 9 * at http://opensource.org/licenses/CDDL-1.0 10 * 11 * See the License for the specific language governing permissions and 12 * limitations under the License. 13 */ 14 15 #ifndef _LM_DEFS_H 16 #define _LM_DEFS_H 17 18 #ifdef __cplusplus 19 extern "C" { 20 #endif 21 22 #include "bcmtype.h" 23 24 /* 25 * Simple constants. 26 */ 27 28 #ifndef TRUE 29 #define TRUE 1 30 #endif 31 32 #ifndef FALSE 33 #define FALSE 0 34 #endif 35 36 #ifndef NULL 37 #define NULL ((void *) 0) 38 #endif 39 40 41 /* Signatures for integrity checks. */ 42 #define LM_DEVICE_SIG 0x6d635242 /* BRcm */ 43 #define L2PACKET_RX_SIG 0x7872324c /* L2rx */ 44 #define L2PACKET_TX_SIG 0x7874324c /* L2tx */ 45 #define L4BUFFER_RX_SIG 0x7872344c /* L4rx */ 46 #define L4BUFFER_TX_SIG 0x7874344c /* L4tx */ 47 #define L4BUFFER_SIG 0x66754254 /* TBuf */ 48 #define L4GEN_BUFFER_SIG 0x006e6567 /* gen */ 49 #define L4GEN_BUFFER_SIG_END 0x0067656e /* neg */ 50 51 #define SIZEOF_SIG 16 52 #define SIG(_p) (*((u32_t *)((u8_t *)(_p) - sizeof (u32_t)))) 53 #define END_SIG(_p, _size) (*((u32_t *)((u8_t *)(_p) + (_size)))) 54 55 /* 56 * This macro rounds the given value to the next word boundary if it 57 * is not already at a word boundary. 58 */ 59 #define ALIGN_VALUE_TO_WORD_BOUNDARY(_v) \ 60 (((_v) + (sizeof (void *) - 1)) & ~(sizeof (void *) - 1)) 61 62 /* 63 * This macro determines the delta to the next alignment which is 64 * either 1, 2, 4, 8, 16, 32, etc. 65 */ 66 #define ALIGN_DELTA_TO_BOUNDARY(_p, _a) \ 67 (((((u8_t *)(_p) - (u8_t *)0) + ((_a) - 1)) & ~((_a) - 1)) - \ 68 ((u8_t *)(_p) - (u8_t *)0)) 69 70 /* 71 * This macro returns the pointer to the next alignment if the pointer 72 * is not currently on the indicated alignment boundary. 73 */ 74 #define ALIGN_PTR_TO_BOUNDARY(_p, _a) \ 75 ((u8_t *)(_p) + ALIGN_DELTA_TO_BOUNDARY(_p, _a)) 76 77 78 79 /* 80 * Status codes. 81 */ 82 83 typedef enum 84 { 85 LM_STATUS_SUCCESS = 0, 86 LM_STATUS_LINK_UNKNOWN = 0, 87 LM_STATUS_FAILURE = 1, 88 LM_STATUS_RESOURCE = 2, 89 LM_STATUS_ABORTED = 3, 90 LM_STATUS_PENDING = 4, 91 LM_STATUS_PAUSED = 5, 92 LM_STATUS_INVALID_PARAMETER = 6, 93 LM_STATUS_LINK_ACTIVE = 7, 94 LM_STATUS_LINK_DOWN = 8, 95 LM_STATUS_UNKNOWN_ADAPTER = 9, 96 LM_STATUS_UNKNOWN_PHY = 10, 97 LM_STATUS_UNKNOWN_MEDIUM = 11, 98 LM_STATUS_TOO_MANY_FRAGMENTS = 12, 99 LM_STATUS_BUFFER_TOO_SHORT = 16, 100 LM_STATUS_UPLOAD_IN_PROGRESS = 17, 101 LM_STATUS_BUSY = 18, 102 LM_STATUS_INVALID_KEY = 19, 103 LM_STATUS_TIMEOUT = 20, 104 LM_STATUS_REQUEST_NOT_ACCEPTED = 21, 105 LM_STATUS_CONNECTION_CLOSED = 22, 106 LM_STATUS_BAD_SIGNATURE = 23, 107 LM_STATUS_CONNECTION_RESET = 24, 108 LM_STATUS_EXISTING_OBJECT = 25, 109 LM_STATUS_OBJECT_NOT_FOUND = 26, 110 LM_STATUS_CONNECTION_RM_DISC = 27, 111 LM_STATUS_VF_LAMAC_REJECTED = 28, 112 LM_STATUS_NOT_IMPLEMENTED = 29, 113 LM_STATUS_UNKNOWN_EVENT_CODE = 30 114 } lm_status_t; 115 116 117 /* 118 * Receive filter masks. 119 */ 120 121 typedef u32_t lm_rx_mask_t; 122 123 #define LM_RX_MASK_ACCEPT_NONE 0x0000 124 #define LM_RX_MASK_ACCEPT_UNICAST 0x0001 125 #define LM_RX_MASK_ACCEPT_MULTICAST 0x0002 126 #define LM_RX_MASK_ACCEPT_ALL_MULTICAST 0x0004 127 #define LM_RX_MASK_ACCEPT_BROADCAST 0x0008 128 #define LM_RX_MASK_ACCEPT_ERROR_PACKET 0x0010 129 130 #define LM_RX_MASK_PROMISCUOUS_MODE 0x10000 131 132 133 134 /* 135 * Flow control. 136 */ 137 138 typedef u32_t lm_flow_control_t; 139 140 #define LM_FLOW_CONTROL_NONE 0x00 141 #define LM_FLOW_CONTROL_RECEIVE_PAUSE 0x01 142 #define LM_FLOW_CONTROL_TRANSMIT_PAUSE 0x02 143 144 /* 145 * This value can be or-ed with RECEIVE_PAUSE and TRANSMIT_PAUSE. If the 146 * auto-negotiation is disabled and the RECEIVE_PAUSE and TRANSMIT_PAUSE bits 147 * are set, then flow control is enabled regardless of link partner's flow 148 * control capability. Otherwise, if this bit is set, then flow is negotiated 149 * with the link partner. Values 0x80000000 and 0x80000003 are equivalent. 150 */ 151 #define LM_FLOW_CONTROL_AUTO_PAUSE 0x80000000 152 153 154 /* 155 * EEE control. 156 */ 157 158 /* 159 * values match the registry values for EeeCtrlMode . Default is MED 160 * ("Balanced") 161 */ 162 typedef enum 163 { 164 LM_EEE_CONTROL_HIGH = 0, // MaxPowerSave 165 LM_EEE_CONTROL_MED = 1, // Balance 166 LM_EEE_CONTROL_LOW = 2, // MaxPreformance 167 LM_EEE_CONTROL_NVRAM = 3, // use NVRAM 168 LM_EEE_CONTROL_NA = 4 // either N/A or disabled 169 } lm_eee_policy_t; 170 171 /* 172 * media type. 173 */ 174 175 typedef u32_t lm_medium_t; 176 177 #define LM_MEDIUM_AUTO_DETECT 0x0000 178 179 #define LM_MEDIUM_TYPE_UNKNOWN 0x0000 180 #define LM_MEDIUM_TYPE_BNC 0x0001 181 #define LM_MEDIUM_TYPE_UTP 0x0002 182 #define LM_MEDIUM_TYPE_FIBER 0x0003 183 #define LM_MEDIUM_TYPE_SERDES 0x0004 184 #define LM_MEDIUM_TYPE_SERDES_SGMII 0x0005 185 #define LM_MEDIUM_TYPE_XGXS 0x0006 186 #define LM_MEDIUM_TYPE_XGXS_SGMII 0x0007 187 #define LM_MEDIUM_TYPE_XMAC_LOOPBACK 0x0008 188 #define LM_MEDIUM_TYPE_UMAC_LOOPBACK 0x0009 189 #define LM_MEDIUM_TYPE_EXT_LOOPBACK 0x00f6 190 #define LM_MEDIUM_TYPE_EXT_PHY_LOOPBACK 0x00f7 191 #define LM_MEDIUM_TYPE_SERDES_LOOPBACK 0x00f8 192 #define LM_MEDIUM_TYPE_XGXS_LOOPBACK 0x00f9 193 #define LM_MEDIUM_TYPE_XGXS_10_LOOPBACK 0x00fa 194 #define LM_MEDIUM_TYPE_BMAC_LOOPBACK 0x00fb 195 #define LM_MEDIUM_TYPE_EMAC_LOOPBACK 0x00fc 196 #define LM_MEDIUM_TYPE_PHY_LOOPBACK 0x00fd 197 #define LM_MEDIUM_TYPE_MAC_LOOPBACK 0x00fe 198 #define LM_MEDIUM_TYPE_NULL 0x00ff 199 #define LM_MEDIUM_TYPE_MASK 0x00ff 200 #define GET_MEDIUM_TYPE(m) ((m) & LM_MEDIUM_TYPE_MASK) 201 #define SET_MEDIUM_TYPE(m, t) \ 202 (m) = ((m) & ~LM_MEDIUM_TYPE_MASK) | (t) 203 204 #define LM_MEDIUM_IS_LOOPBACK(_medium) \ 205 (((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_BMAC_LOOPBACK) || \ 206 ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_UMAC_LOOPBACK) || \ 207 ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_XMAC_LOOPBACK) || \ 208 ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_EXT_LOOPBACK) || \ 209 ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_EXT_PHY_LOOPBACK) || \ 210 ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_SERDES_LOOPBACK) || \ 211 ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_XGXS_LOOPBACK) || \ 212 ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_XGXS_10_LOOPBACK) || \ 213 ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_PHY_LOOPBACK) || \ 214 ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_MAC_LOOPBACK)) 215 216 #define LM_MEDIUM_SPEED_AUTONEG 0x0000 217 218 #define LM_MEDIUM_SPEED_UNKNOWN 0x0000 219 #define LM_MEDIUM_SPEED_10MBPS 0x0100 220 #define LM_MEDIUM_SPEED_100MBPS 0x0200 221 #define LM_MEDIUM_SPEED_1000MBPS 0x0300 222 #define LM_MEDIUM_SPEED_2500MBPS 0x0400 223 #define LM_MEDIUM_SPEED_10GBPS 0x0600 224 #define LM_MEDIUM_SPEED_12GBPS 0x0700 225 #define LM_MEDIUM_SPEED_12_5GBPS 0x0800 226 #define LM_MEDIUM_SPEED_13GBPS 0x0900 227 #define LM_MEDIUM_SPEED_15GBPS 0x0a00 228 #define LM_MEDIUM_SPEED_16GBPS 0x0b00 229 #define LM_MEDIUM_SPEED_20GBPS 0x0c00 230 #define LM_MEDIUM_SPEED_25GBPS 0x0d00 231 #define LM_MEDIUM_SPEED_40GBPS 0x0e00 232 #define LM_MEDIUM_SPEED_50GBPS 0x0f00 233 #define LM_MEDIUM_SPEED_SEQ_START 0x1d00 // 100Mbps 234 #define LM_MEDIUM_SPEED_SEQ_END 0xE400 // 20Gbps 235 #define LM_MEDIUM_SPEED_AUTONEG_1G_FALLBACK 0xFD00 /* Serdes */ 236 #define LM_MEDIUM_SPEED_AUTONEG_2_5G_FALLBACK 0xFE00 /* Serdes */ 237 #define LM_MEDIUM_SPEED_HARDWARE_DEFAULT 0xff00 /* Serdes nvram def. */ 238 #define LM_MEDIUM_SPEED_MASK 0xff00 239 #define GET_MEDIUM_SPEED(m) ((m) & LM_MEDIUM_SPEED_MASK) 240 #define SET_MEDIUM_SPEED(m, s) \ 241 (m) = ((m) & ~LM_MEDIUM_SPEED_MASK) | (s) 242 243 #define LM_MEDIUM_FULL_DUPLEX 0x00000 244 #define LM_MEDIUM_HALF_DUPLEX 0x10000 245 #define GET_MEDIUM_DUPLEX(m) ((m) & LM_MEDIUM_HALF_DUPLEX) 246 #define SET_MEDIUM_DUPLEX(m, d) \ 247 (m) = ((m) & ~LM_MEDIUM_HALF_DUPLEX) | (d) 248 249 #define LM_MEDIUM_SELECTIVE_AUTONEG 0x01000000 250 #define GET_MEDIUM_AUTONEG_MODE(m) ((m) & 0xff000000) 251 252 typedef struct _lm_link_settings_t 253 { 254 u32_t flag; 255 #define LINK_FLAG_SELECTIVE_AUTONEG_MASK 0x0f 256 #define LINK_FLAG_SELECTIVE_AUTONEG_ONE_SPEED 0x01 257 #define LINK_FLAG_SELECTIVE_AUTONEG_ENABLE_SLOWER_SPEEDS 0x02 258 #define LINK_FLAG_WIRE_SPEED 0x10 259 260 lm_medium_t req_medium; 261 lm_flow_control_t flow_ctrl; 262 263 u32_t _reserved; 264 } lm_link_settings_t; 265 266 267 268 /* 269 * Power state. 270 */ 271 272 typedef enum 273 { 274 LM_POWER_STATE_D0 = 0, 275 LM_POWER_STATE_D1 = 1, 276 LM_POWER_STATE_D2 = 2, 277 LM_POWER_STATE_D3 = 3 278 } lm_power_state_t; 279 280 281 282 /* 283 * offloading. 284 */ 285 286 typedef u32_t lm_offload_t; 287 288 #define LM_OFFLOAD_NONE 0x00000000 289 #define LM_OFFLOAD_TX_IP_CKSUM 0x00000001 290 #define LM_OFFLOAD_RX_IP_CKSUM 0x00000002 291 #define LM_OFFLOAD_TX_TCP_CKSUM 0x00000004 292 #define LM_OFFLOAD_RX_TCP_CKSUM 0x00000008 293 #define LM_OFFLOAD_TX_UDP_CKSUM 0x00000010 294 #define LM_OFFLOAD_RX_UDP_CKSUM 0x00000020 295 #define LM_OFFLOAD_IPV4_TCP_LSO 0x00000040 296 #define LM_OFFLOAD_IPV6_TCP_LSO 0x00000080 297 #define LM_OFFLOAD_CHIMNEY 0x00000100 298 #define LM_OFFLOAD_IPV6_CHIMNEY 0x00000200 299 #define LM_OFFLOAD_TX_TCP6_CKSUM 0x00001000 300 #define LM_OFFLOAD_RX_TCP6_CKSUM 0x00002000 301 #define LM_OFFLOAD_TX_UDP6_CKSUM 0x00004000 302 #define LM_OFFLOAD_RX_UDP6_CKSUM 0x00008000 303 #define LM_OFFLOAD_RSC_IPV4 0x00010000 304 #define LM_OFFLOAD_RSC_IPV6 0x00020000 305 #define LM_OFFLOAD_ENCAP_PACKET 0x00040000 306 307 308 309 /* 310 * RSS Hash Types 311 */ 312 313 typedef u32_t lm_rss_hash_t; 314 315 #define LM_RSS_HASH_IPV4 0x00000100 316 #define LM_RSS_HASH_TCP_IPV4 0x00000200 317 #define LM_RSS_HASH_IPV6 0x00000400 318 #define LM_RSS_HASH_IPV6_EX 0x00000800 319 #define LM_RSS_HASH_TCP_IPV6 0x00001000 320 #define LM_RSS_HASH_TCP_IPV6_EX 0x00002000 321 322 323 324 /* 325 * Chip reset reasons. 326 */ 327 328 typedef enum 329 { 330 LM_REASON_NONE = 0, 331 LM_REASON_DRIVER_RESET = 1, 332 LM_REASON_DRIVER_UNLOAD = 2, 333 LM_REASON_DRIVER_SHUTDOWN = 3, 334 LM_REASON_WOL_SUSPEND = 4, 335 LM_REASON_NO_WOL_SUSPEND = 5, 336 LM_REASON_DIAG = 6, 337 /* Power down phy/serdes */ 338 LM_REASON_DRIVER_UNLOAD_POWER_DOWN = 7, 339 LM_REASON_ERROR_RECOVERY = 8 340 } lm_reason_t; 341 342 343 344 /* 345 * Wake up mode. 346 */ 347 348 typedef u32_t lm_wake_up_mode_t; 349 350 #define LM_WAKE_UP_MODE_NONE 0 351 #define LM_WAKE_UP_MODE_MAGIC_PACKET 1 352 #define LM_WAKE_UP_MODE_NWUF 2 353 #define LM_WAKE_UP_MODE_LINK_CHANGE 4 354 355 356 357 /* 358 * Event code. 359 */ 360 typedef enum 361 { 362 LM_EVENT_CODE_LINK_CHANGE = 0, 363 LM_EVENT_CODE_PAUSE_OFFLOAD = 1, 364 LM_EVENT_CODE_RESUME_OFFLOAD = 2, 365 /* For Error Recovery Flow */ 366 LM_EVENT_CODE_STOP_CHIP_ACCESS = 3, 367 /* For Error Recovery Flow */ 368 LM_EVENT_CODE_RESTART_CHIP_ACCESS = 4, 369 LM_EVENT_CODE_UPLOAD_ALL = 5, 370 LM_EVENT_CODE_DCBX_OPERA_CHANGE = 6, 371 LM_EVENT_CODE_DCBX_REMOTE_CHANGE = 7, 372 LM_EVENT_CODE_INVALIDATE_VF_BLOCK = 8, 373 } lm_event_code_t; 374 375 376 /* 377 * Transmit control flags. 378 */ 379 380 typedef u32_t lm_tx_flag_t; 381 382 #define LM_TX_FLAG_INSERT_VLAN_TAG 0x01 383 #define LM_TX_FLAG_COMPUTE_IP_CKSUM 0x02 384 #define LM_TX_FLAG_COMPUTE_TCP_UDP_CKSUM 0x04 385 #define LM_TX_FLAG_TCP_LSO_FRAME 0x08 386 #define LM_TX_FLAG_TCP_LSO_SNAP_FRAME 0x10 387 #define LM_TX_FLAG_COAL_NOW 0x20 388 #define LM_TX_FLAG_DONT_COMPUTE_CRC 0x40 389 #define LM_TX_FLAG_SKIP_MBQ_WRITE 0x80 390 #define LM_TX_FLAG_IPV6_PACKET 0x100 391 #define LM_TX_FLAG_VLAN_TAG_EXISTS 0x200 392 /* 393 * If this flag is set, the firmware will ignore global 394 * configuration (except Outer VLAN)and will handle inner Vlan 395 * only according to driver instructions on the bd: 396 * 1. LM_TX_FLAG_VLAN_TAG_EXISTS. 397 * 2. LM_TX_FLAG_INSERT_VLAN_TAG. 398 * Note that if set the firmware will not handle default vlan / 399 * NIV tag / DCB. 400 */ 401 #define LM_TX_FLAG_FORCE_VLAN_MODE 0x400 402 /* Encapsulated packet offload flags. */ 403 #define LM_TX_FLAG_IS_ENCAP_PACKET 0x800 404 #define LM_TX_FLAG_ENCAP_PACKET_IS_INNER_IPV6 0x1000 405 406 typedef struct _lm_pkt_tx_info_t 407 { 408 lm_tx_flag_t flags; 409 410 u16_t vlan_tag; 411 u16_t lso_mss; 412 u16_t lso_ip_hdr_len; 413 u16_t lso_tcp_hdr_len; 414 u32_t lso_payload_len; 415 416 /* Everest only fields. */ 417 u32_t lso_tcp_send_seq; 418 u16_t lso_ipid; 419 u16_t tcp_pseudo_csum; 420 u8_t lso_tcp_flags; 421 u8_t tcp_nonce_sum_bit; 422 u16_t fw_ip_csum; 423 424 u8_t dst_mac_addr[8]; 425 s8_t cs_any_offset; 426 u8_t src_mac_addr[8]; 427 u8_t _unused1; 428 u8_t eth_type[4]; 429 430 /* 431 * Encapsulated packet offsets. These fields are only valid when 432 * LM_TX_FLAG_IS_ENCAP_PACKET is set. 433 */ 434 u8_t encap_packet_inner_frame_offset; 435 u8_t encap_packet_inner_ip_relative_offset; 436 u16_t encap_packet_inner_tcp_relative_offset; 437 } lm_pkt_tx_info_t; 438 439 440 441 /* 442 * Receive control flags. 443 */ 444 445 typedef u32_t lm_rx_flag_t; 446 447 #define LM_RX_FLAG_VALID_VLAN_TAG 0x00000001 448 #define LM_RX_FLAG_VALID_HASH_VALUE 0x00000010 449 450 #define LM_RX_FLAG_IS_IPV4_DATAGRAM 0x00000100 451 #define LM_RX_FLAG_IS_IPV6_DATAGRAM 0x00000200 452 #define LM_RX_FLAG_IP_CKSUM_IS_GOOD 0x00000400 453 #define LM_RX_FLAG_IP_CKSUM_IS_BAD 0x00000800 454 455 #define LM_RX_FLAG_IS_UDP_DATAGRAM 0x00001000 456 #define LM_RX_FLAG_UDP_CKSUM_IS_GOOD 0x00002000 457 #define LM_RX_FLAG_UDP_CKSUM_IS_BAD 0x00004000 458 459 #define LM_RX_FLAG_IS_TCP_SEGMENT 0x00010000 460 #define LM_RX_FLAG_TCP_CKSUM_IS_GOOD 0x00020000 461 #define LM_RX_FLAG_TCP_CKSUM_IS_BAD 0x00040000 462 #define LM_RX_FLAG_START_RSC_TPA 0x00080000 463 464 #define LM_RX_FLAG_HASH_TYPE_IPV4 0x00100000 465 #define LM_RX_FLAG_HASH_TYPE_TCP_IPV4 0x00200000 466 #define LM_RX_FLAG_HASH_TYPE_IPV6 0x00400000 467 #define LM_RX_FLAG_HASH_TYPE_TCP_IPV6 0x00800000 468 #define LM_RX_FLAG_HASH_TYPE_MASK 0x00f00000 469 470 typedef struct _lm_pkt_rx_info_t 471 { 472 lm_rx_flag_t flags; 473 474 u32_t size; 475 476 u16_t vlan_tag; 477 u16_t _pad; 478 479 /* 480 * Virtual address corresponding to the first byte of the first SGL 481 * entry. This is the starting location of the packet which may begin 482 * with some control information. 483 */ 484 u8_t *mem_virt; 485 u32_t mem_size; 486 487 /* these fields only valid when LM_RX_FLAG_START_RSC_TPA is set */ 488 u16_t coal_seg_cnt; 489 u16_t dup_ack_cnt; 490 u32_t ts_delta; /* valid when timestamp is enabled */ 491 /* 492 * if the packet is RSC, this field will hold the total size of the 493 * RSC SCU 494 */ 495 u32_t total_packet_size; 496 497 u32_t unused; 498 } lm_pkt_rx_info_t; 499 500 501 502 /* 503 * various type of counters. 504 */ 505 506 typedef enum 507 { 508 LM_STATS_BASE = 0x686b3000, 509 LM_STATS_FRAMES_XMITTED_OK = 0x686b3001, 510 LM_STATS_FRAMES_RECEIVED_OK = 0x686b3002, 511 LM_STATS_ERRORED_TRANSMIT_CNT = 0x686b3003, 512 LM_STATS_ERRORED_RECEIVE_CNT = 0x686b3004, 513 LM_STATS_RCV_CRC_ERROR = 0x686b3005, 514 LM_STATS_ALIGNMENT_ERROR = 0x686b3006, 515 LM_STATS_SINGLE_COLLISION_FRAMES = 0x686b3007, 516 LM_STATS_MULTIPLE_COLLISION_FRAMES = 0x686b3008, 517 LM_STATS_FRAMES_DEFERRED = 0x686b3009, 518 LM_STATS_MAX_COLLISIONS = 0x686b300a, 519 LM_STATS_RCV_OVERRUN = 0x686b300b, 520 LM_STATS_XMIT_UNDERRUN = 0x686b300c, 521 LM_STATS_UNICAST_FRAMES_XMIT = 0x686b300d, 522 LM_STATS_MULTICAST_FRAMES_XMIT = 0x686b300e, 523 LM_STATS_BROADCAST_FRAMES_XMIT = 0x686b300f, 524 LM_STATS_UNICAST_FRAMES_RCV = 0x686b3010, 525 LM_STATS_MULTICAST_FRAMES_RCV = 0x686b3011, 526 LM_STATS_BROADCAST_FRAMES_RCV = 0x686b3012, 527 LM_STATS_RCV_NO_BUFFER_DROP = 0x686b3013, 528 LM_STATS_BYTES_RCV = 0x686b3014, 529 LM_STATS_BYTES_XMIT = 0x686b3015, 530 LM_STATS_IP4_OFFLOAD = 0x686b3016, 531 LM_STATS_TCP_OFFLOAD = 0x686b3017, 532 LM_STATS_IF_IN_DISCARDS = 0x686b3018, 533 LM_STATS_IF_IN_ERRORS = 0x686b3019, 534 LM_STATS_IF_OUT_ERRORS = 0x686b301a, 535 LM_STATS_IP6_OFFLOAD = 0x686b301b, 536 LM_STATS_TCP6_OFFLOAD = 0x686b301c, 537 LM_STATS_XMIT_DISCARDS = 0x686b301d, 538 LM_STATS_DIRECTED_BYTES_RCV = 0x686b301e, 539 LM_STATS_MULTICAST_BYTES_RCV = 0x686b301f, 540 LM_STATS_BROADCAST_BYTES_RCV = 0x686b3020, 541 LM_STATS_DIRECTED_BYTES_XMIT = 0x686b3021, 542 LM_STATS_MULTICAST_BYTES_XMIT = 0x686b3022, 543 LM_STATS_BROADCAST_BYTES_XMIT = 0x686b3023, 544 } lm_stats_t; 545 546 #define NUM_OF_LM_STATS 36 547 548 549 /* 550 * 64-bit value. 551 */ 552 553 typedef union _lm_u64_t 554 { 555 struct _lm_u64_as_u32_t 556 { 557 #ifdef BIG_ENDIAN_HOST 558 u32_t high; 559 u32_t low; 560 #else 561 u32_t low; 562 u32_t high; 563 #endif 564 } as_u32; 565 566 u64_t as_u64; 567 568 void *as_ptr; 569 } lm_u64_t; 570 571 572 typedef lm_u64_t lm_address_t; 573 574 575 /* 64-bit increment. The second argument is a 32-bit value. */ 576 #define LM_INC64(result, addend32) \ 577 { \ 578 u32_t low; \ 579 \ 580 low = (result)->as_u32.low; \ 581 (result)->as_u32.low += (addend32); \ 582 if ((result)->as_u32.low < low) \ 583 { \ 584 (result)->as_u32.high++; \ 585 } \ 586 } 587 588 589 /* 64-bit decrement. The second argument is a 32-bit value. */ 590 #define LM_DEC64(result, addend32) \ 591 { \ 592 u32_t low; \ 593 \ 594 low = (result)->as_u32.low; \ 595 (result)->as_u32.low -= (addend32); \ 596 if ((result)->as_u32.low > low) \ 597 { \ 598 (result)->as_u32.high--; \ 599 } \ 600 } 601 602 /* 603 * IP4 and TCP offload stats. 604 */ 605 606 typedef struct _lm_ip4_offload_stats_t 607 { 608 u64_t in_receives; 609 u64_t in_delivers; 610 u64_t out_requests; 611 u32_t in_header_errors; 612 u32_t in_discards; 613 u32_t out_discards; 614 u32_t out_no_routes; 615 616 u32_t _pad[8]; 617 } lm_ip4_offload_stats_t; 618 619 620 typedef struct _lm_tcp_offload_stats_t 621 { 622 u64_t in_segments; 623 u64_t out_segments; 624 u32_t retran_segments; 625 u32_t in_errors; 626 u32_t out_resets; 627 628 u32_t _pad[8]; 629 } lm_tcp_offload_stats_t; 630 631 632 633 /* 634 * Host to network order conversion. 635 */ 636 637 #ifdef BIG_ENDIAN_HOST 638 639 #ifndef HTON16 640 #define HTON16(_val16) (_val16) 641 #endif 642 #ifndef HTON32 643 #define HTON32(_val32) (_val32) 644 #ifndef NTOH16 645 #endif 646 #define NTOH16(_val16) (_val16) 647 #endif 648 #ifndef NTOH32 649 #define NTOH32(_val32) (_val32) 650 #endif 651 652 #else 653 654 #ifndef HTON16 655 #define HTON16(_val16) (((_val16 & 0xff00) >> 8) | ((_val16 & 0xff) << 8)) 656 #endif 657 #ifndef HTON32 658 #define HTON32(_val32) ((HTON16(_val32) << 16) | (HTON16(_val32 >> 16))) 659 #endif 660 #ifndef NTOH16 661 #define NTOH16(_val16) HTON16(_val16) 662 #endif 663 #ifndef NTOH32 664 #define NTOH32(_val32) HTON32(_val32) 665 #endif 666 667 #endif 668 669 670 671 /* 672 * Fragment structure. 673 */ 674 675 typedef struct _lm_frag_t 676 { 677 lm_address_t addr; 678 u32_t size; 679 u32_t _reserved; 680 } lm_frag_t; 681 682 typedef struct _lm_frag_list_t 683 { 684 u32_t cnt; 685 u32_t size; 686 687 lm_frag_t frag_arr[1]; 688 } lm_frag_list_t; 689 690 /* a macro for declaring 'lm_frag_list_t' with various array sizes. */ 691 #define DECLARE_FRAG_LIST_BUFFER_TYPE(_FRAG_LIST_TYPE_NAME, _MAX_FRAG_CNT) \ 692 typedef struct _##_FRAG_LIST_TYPE_NAME \ 693 { \ 694 lm_frag_list_t list; \ 695 lm_frag_t frag_arr[_MAX_FRAG_CNT-1]; \ 696 } _FRAG_LIST_TYPE_NAME 697 698 /* 699 * DCBX indicate event parameters. 700 */ 701 typedef enum _dcb_condition_selector_t 702 { 703 DCB_CONDITION_RESERVED, 704 DCB_CONDITION_DEFAULT, 705 DCB_CONDITION_TCP_PORT, 706 DCB_CONDITION_UDP_PORT, 707 DCB_CONDITION_TCP_OR_UDP_PORT, 708 DCB_CONDITION_ETHERTYPE, 709 DCB_CONDITION_NETDIRECT_PORT, 710 DCB_CONDITION_MAX, 711 }dcb_condition_selector_t; 712 713 typedef enum _action_selector_t 714 { 715 DCB_ACTION_PRIORITY, 716 DCB_ACTION_MAX, 717 } action_selector_t; 718 719 typedef struct _dcb_classif_elem_t 720 { 721 u32_t flags; 722 #define DCB_CLASSIF_ENFORCED_BY_VBD 0x1 723 dcb_condition_selector_t condition_selector; 724 u16_t condition_field; 725 action_selector_t action_selector; 726 u16_t action_field; 727 }dcb_classif_elem_t; 728 729 typedef enum _dcb_classif_version_t 730 { 731 DCB_CLASSIFI_VER_SIMPLE_ELEM, 732 DCB_CLASSIFI_VER_SIMPLE_ELEM_MAX, 733 }dcb_classif_version_t; 734 735 typedef struct _dcb_classif_params_t 736 { 737 u16_t num_classif_elements; 738 u16_t _pad; 739 dcb_classif_version_t classif_version; 740 void *classif_table; 741 }dcb_classif_params_t; 742 743 typedef struct _dcb_pfc_param_t 744 { 745 u32_t pfc_enable; 746 #define DCB_PFC_MAX_BIT_ENABLE_MASK (0xFF) 747 }dcb_pfc_param_t; 748 749 typedef enum _tsa_assignment 750 { 751 TSA_ASSIGNMENT_DCB_TSA_STRICT, 752 TSA_ASSIGNMENT_DCB_TSA_CBS, 753 TSA_ASSIGNMENT_DCB_TSA_ETS, 754 } tsa_assignment; 755 756 typedef struct _dcb_ets_tsa_param_t 757 { 758 u32_t num_traffic_classes; 759 u8_t priority_assignment_table[8]; 760 u8_t tc_bw_assignment_table[8]; 761 tsa_assignment tsa_assignment_table[8]; 762 } dcb_ets_tsa_param_t; 763 764 typedef struct _dcb_indicate_event_params_t 765 { 766 u32_t flags; 767 #define DCB_PARAMS_ETS_ENABLED 0x00000001 768 #define DCB_PARAMS_ETS_CHANGED 0x00000002 769 #define DCB_PARAMS_PFC_ENABLED 0x00000004 770 #define DCB_PARAMS_PFC_CHANGED 0x00000008 771 #define DCB_PARAMS_CLASSIF_ENABLED 0x00000020 772 #define DCB_PARAMS_CLASSIF_CHANGED 0x00000040 773 #define DCB_PARAMS_WILLING 0x00000080 774 775 dcb_ets_tsa_param_t ets_params; 776 dcb_pfc_param_t pfc_params; 777 dcb_classif_params_t classif_params; 778 u32_t reserved[4]; 779 } dcb_indicate_event_params_t; 780 781 /* 782 * Macro fore calculating the address of the base of the structure given its 783 * type, and an address of a field within the structure. 784 */ 785 786 #define GET_CONTAINING_RECORD(address, type, field) \ 787 ((type *)((u8_t *)(address) - (u8_t *)(&((type *)0)->field))) 788 789 790 791 /* 792 * Simple macros. 793 */ 794 795 #define IS_ETH_BROADCAST(eth_addr) \ 796 (((unsigned char *) (eth_addr))[0] == ((unsigned char) 0xff)) 797 798 #define IS_ETH_MULTICAST(eth_addr) \ 799 (((unsigned char *) (eth_addr))[0] & ((unsigned char) 0x01)) 800 801 #define IS_ETH_ADDRESS_EQUAL(eth_addr1, eth_addr2) \ 802 ((((unsigned char *) (eth_addr1))[0] == \ 803 ((unsigned char *) (eth_addr2))[0]) && \ 804 (((unsigned char *) (eth_addr1))[1] == \ 805 ((unsigned char *) (eth_addr2))[1]) && \ 806 (((unsigned char *) (eth_addr1))[2] == \ 807 ((unsigned char *) (eth_addr2))[2]) && \ 808 (((unsigned char *) (eth_addr1))[3] == \ 809 ((unsigned char *) (eth_addr2))[3]) && \ 810 (((unsigned char *) (eth_addr1))[4] == \ 811 ((unsigned char *) (eth_addr2))[4]) && \ 812 (((unsigned char *) (eth_addr1))[5] == \ 813 ((unsigned char *) (eth_addr2))[5])) 814 815 #define COPY_ETH_ADDRESS(src, dst) \ 816 ((unsigned char *) (dst))[0] = ((unsigned char *) (src))[0]; \ 817 ((unsigned char *) (dst))[1] = ((unsigned char *) (src))[1]; \ 818 ((unsigned char *) (dst))[2] = ((unsigned char *) (src))[2]; \ 819 ((unsigned char *) (dst))[3] = ((unsigned char *) (src))[3]; \ 820 ((unsigned char *) (dst))[4] = ((unsigned char *) (src))[4]; \ 821 ((unsigned char *) (dst))[5] = ((unsigned char *) (src))[5]; 822 823 #ifdef __cplusplus 824 } 825 #endif 826 827 #endif /* _LM_DEFS_H */ 828