1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_BGE_H 28 #define _SYS_BGE_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 #include <sys/types.h> 35 36 /* 37 * Name of the driver 38 */ 39 #define BGE_DRIVER_NAME "bge" 40 41 /* 42 * The driver supports the NDD ioctls ND_GET/ND_SET, and the loopback 43 * ioctls LB_GET_INFO_SIZE/LB_GET_INFO/LB_GET_MODE/LB_SET_MODE 44 * 45 * These are the values to use with LD_SET_MODE. 46 * Note: they may not all be supported on any given chip/driver. 47 */ 48 #define BGE_LOOP_NONE 0 49 #define BGE_LOOP_EXTERNAL_1000 1 /* with Gbit loopback cable */ 50 #define BGE_LOOP_EXTERNAL_100 2 /* with loopback cable */ 51 #define BGE_LOOP_EXTERNAL_10 3 /* with loopback cable */ 52 #define BGE_LOOP_INTERNAL_PHY 4 53 #define BGE_LOOP_INTERNAL_MAC 5 54 55 /* 56 * BGE-specific ioctls ... 57 */ 58 #define BGE_IOC ((((('B' << 8) + 'G') << 8) + 'E') << 8) 59 60 /* 61 * PHY register read/write ioctls, used by cable test software 62 */ 63 #define BGE_MII_READ (BGE_IOC|1) 64 #define BGE_MII_WRITE (BGE_IOC|2) 65 66 struct bge_mii_rw { 67 uint32_t mii_reg; /* PHY register number [0..31] */ 68 uint32_t mii_data; /* data to write/data read */ 69 }; 70 71 /* 72 * SEEPROM read/write ioctls, for use by SEEPROM upgrade utility 73 * 74 * Note: SEEPROMs can only be accessed as 32-bit words, so <see_addr> 75 * must be a multiple of 4. Not all systems have a SEEPROM fitted! 76 */ 77 #define BGE_SEE_READ (BGE_IOC|3) 78 #define BGE_SEE_WRITE (BGE_IOC|4) 79 80 struct bge_see_rw { 81 uint32_t see_addr; /* Byte offset within SEEPROM */ 82 uint32_t see_data; /* Data read/data to write */ 83 }; 84 85 /* 86 * Flash read/write ioctls, for flash upgrade utility 87 * 88 * Note: flash can only be accessed as 32-bit words, so <flash_addr> 89 * must be a multiple of 4. Not all systems have flash fitted! 90 */ 91 #define BGE_FLASH_READ (BGE_IOC|5) 92 #define BGE_FLASH_WRITE (BGE_IOC|6) 93 94 struct bge_flash_rw { 95 uint32_t flash_addr; /* Byte offset within flash */ 96 uint32_t flash_data; /* Data read/data to write */ 97 }; 98 99 /* 100 * These diagnostic IOCTLS are enabled only in DEBUG drivers 101 */ 102 #define BGE_DIAG (BGE_IOC|10) /* currently a no-op */ 103 #define BGE_PEEK (BGE_IOC|11) 104 #define BGE_POKE (BGE_IOC|12) 105 #define BGE_PHY_RESET (BGE_IOC|13) 106 #define BGE_SOFT_RESET (BGE_IOC|14) 107 #define BGE_HARD_RESET (BGE_IOC|15) 108 109 typedef struct { 110 uint64_t pp_acc_size; /* in bytes: 1,2,4,8 */ 111 uint64_t pp_acc_space; /* See #defines below */ 112 uint64_t pp_acc_offset; 113 uint64_t pp_acc_data; /* output for peek */ 114 /* input for poke */ 115 } bge_peekpoke_t; 116 117 #define BGE_PP_SPACE_CFG 0 /* PCI config space */ 118 #define BGE_PP_SPACE_REG 1 /* PCI memory space */ 119 #define BGE_PP_SPACE_NIC 2 /* on-chip memory */ 120 #define BGE_PP_SPACE_MII 3 /* PHY's MII registers */ 121 #define BGE_PP_SPACE_BGE 4 /* driver's soft state */ 122 #define BGE_PP_SPACE_TXDESC 5 /* TX descriptors */ 123 #define BGE_PP_SPACE_TXBUFF 6 /* TX buffers */ 124 #define BGE_PP_SPACE_RXDESC 7 /* RX descriptors */ 125 #define BGE_PP_SPACE_RXBUFF 8 /* RX buffers */ 126 #define BGE_PP_SPACE_STATUS 9 /* status block */ 127 #define BGE_PP_SPACE_STATISTICS 10 /* statistics block */ 128 #define BGE_PP_SPACE_SEEPROM 11 /* SEEPROM (if fitted) */ 129 #define BGE_PP_SPACE_FLASH 12 /* FLASH (if fitted) */ 130 131 #define BGE_IPMI_ASF 132 133 /* 134 * Enable BGE_NETCONSOLE only with SPARC 135 */ 136 #ifdef __sparc 137 #define BGE_NETCONSOLE 138 #endif 139 140 /* 141 * BGE_MAXPKT_RCVED is defined to make sure bge does not stick 142 * in a receiving loop too long. This value is the tuning result 143 * of performance testing on sparc/x86 platforms, with regarding 144 * to throughput/latency/CPU utilization, TCP/UDP 145 */ 146 #define BGE_MAXPKT_RCVED 32 147 148 #ifdef __cplusplus 149 } 150 #endif 151 152 #endif /* _SYS_BGE_H */ 153