1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 27 /* 28 * audio1575 Audio Driver 29 * 30 * The driver is primarily targeted at providing audio support for 31 * those systems which use the Uli M1575 audio core. 32 * 33 * The M1575 audio core, in AC'97 controller mode, has independent 34 * channels for PCM in, PCM out, mic in, modem in, and modem out. 35 * 36 * The AC'97 controller is a PCI bus master with scatter/gather 37 * support. Each channel has a DMA engine. Currently, we use only 38 * the PCM in and PCM out channels. Each DMA engine uses one buffer 39 * descriptor list. And the buffer descriptor list is an array of up 40 * to 32 entries, each of which describes a data buffer. Each entry 41 * contains a pointer to a data buffer, control bits, and the length 42 * of the buffer being pointed to, where the length is expressed as 43 * the number of samples. This, combined with the 16-bit sample size, 44 * gives the actual physical length of the buffer. 45 * 46 * NOTE: 47 * This driver depends on the drv/audio, misc/ac97 48 * modules being loaded first. 49 */ 50 51 #include <sys/types.h> 52 #include <sys/modctl.h> 53 #include <sys/kmem.h> 54 #include <sys/conf.h> 55 #include <sys/ddi.h> 56 #include <sys/sunddi.h> 57 #include <sys/pci.h> 58 #include <sys/note.h> 59 #include <sys/audio/audio_driver.h> 60 #include <sys/audio/ac97.h> 61 #include "audio1575.h" 62 63 /* 64 * Module linkage routines for the kernel 65 */ 66 static int audio1575_ddi_attach(dev_info_t *, ddi_attach_cmd_t); 67 static int audio1575_ddi_detach(dev_info_t *, ddi_detach_cmd_t); 68 static int audio1575_ddi_quiesce(dev_info_t *); 69 70 /* 71 * Entry point routine prototypes 72 */ 73 static int audio1575_open(void *, int, unsigned *, unsigned *, caddr_t *); 74 static void audio1575_close(void *); 75 static int audio1575_start(void *); 76 static void audio1575_stop(void *); 77 static int audio1575_format(void *); 78 static int audio1575_channels(void *); 79 static int audio1575_rate(void *); 80 static uint64_t audio1575_count(void *); 81 static void audio1575_sync(void *, unsigned); 82 83 static audio_engine_ops_t audio1575_engine_ops = { 84 AUDIO_ENGINE_VERSION, 85 audio1575_open, 86 audio1575_close, 87 audio1575_start, 88 audio1575_stop, 89 audio1575_count, 90 audio1575_format, 91 audio1575_channels, 92 audio1575_rate, 93 audio1575_sync, 94 NULL, 95 NULL, 96 NULL 97 }; 98 99 /* 100 * interrupt handler 101 */ 102 static uint_t audio1575_intr(caddr_t, caddr_t); 103 104 /* 105 * Local Routine Prototypes 106 */ 107 static int audio1575_attach(dev_info_t *); 108 static int audio1575_resume(dev_info_t *); 109 static int audio1575_detach(dev_info_t *); 110 static int audio1575_suspend(dev_info_t *); 111 112 static int audio1575_alloc_port(audio1575_state_t *, int, uint8_t); 113 static void audio1575_free_port(audio1575_port_t *); 114 static void audio1575_start_port(audio1575_port_t *); 115 static void audio1575_stop_port(audio1575_port_t *); 116 static void audio1575_reset_port(audio1575_port_t *); 117 static void audio1575_update_port(audio1575_port_t *); 118 119 static int audio1575_setup_intr(audio1575_state_t *); 120 static int audio1575_codec_sync(audio1575_state_t *); 121 static void audio1575_write_ac97(void *, uint8_t, uint16_t); 122 static uint16_t audio1575_read_ac97(void *, uint8_t); 123 static int audio1575_chip_init(audio1575_state_t *); 124 static int audio1575_map_regs(audio1575_state_t *); 125 static void audio1575_unmap_regs(audio1575_state_t *); 126 static void audio1575_dma_stop(audio1575_state_t *, boolean_t); 127 static void audio1575_pci_enable(audio1575_state_t *); 128 static void audio1575_pci_disable(audio1575_state_t *); 129 130 static void audio1575_destroy(audio1575_state_t *); 131 132 /* 133 * Global variables, but used only by this file. 134 */ 135 136 /* 137 * DDI Structures 138 */ 139 140 141 /* Device operations structure */ 142 static struct dev_ops audio1575_dev_ops = { 143 DEVO_REV, /* devo_rev */ 144 0, /* devo_refcnt */ 145 NULL, /* devo_getinfo */ 146 nulldev, /* devo_identify - obsolete */ 147 nulldev, /* devo_probe */ 148 audio1575_ddi_attach, /* devo_attach */ 149 audio1575_ddi_detach, /* devo_detach */ 150 nodev, /* devo_reset */ 151 NULL, /* devi_cb_ops */ 152 NULL, /* devo_bus_ops */ 153 NULL, /* devo_power */ 154 audio1575_ddi_quiesce, /* devo_quiesce */ 155 }; 156 157 /* Linkage structure for loadable drivers */ 158 static struct modldrv audio1575_modldrv = { 159 &mod_driverops, /* drv_modops */ 160 M1575_MOD_NAME, /* drv_linkinfo */ 161 &audio1575_dev_ops, /* drv_dev_ops */ 162 }; 163 164 /* Module linkage structure */ 165 static struct modlinkage audio1575_modlinkage = { 166 MODREV_1, /* ml_rev */ 167 (void *)&audio1575_modldrv, /* ml_linkage */ 168 NULL /* NULL terminates the list */ 169 }; 170 171 172 /* 173 * device access attributes for register mapping 174 */ 175 static struct ddi_device_acc_attr dev_attr = { 176 DDI_DEVICE_ATTR_V0, 177 DDI_STRUCTURE_LE_ACC, 178 DDI_STRICTORDER_ACC 179 }; 180 181 static struct ddi_device_acc_attr buf_attr = { 182 DDI_DEVICE_ATTR_V0, 183 DDI_NEVERSWAP_ACC, 184 DDI_STRICTORDER_ACC 185 }; 186 187 /* 188 * DMA attributes of buffer descriptor list 189 */ 190 static ddi_dma_attr_t bdlist_dma_attr = { 191 DMA_ATTR_V0, /* version */ 192 0x0000000000000000LL, /* dlim_addr_lo */ 193 0x00000000ffffffffLL, /* dlim_addr_hi */ 194 0x000000000000ffffLL, /* DMA counter register - 64 bits */ 195 0x0000000000000008LL, /* DMA address align must be 8-bytes */ 196 0x0000003c, /* 1 through 64 byte burst sizes */ 197 0x00000008, /* min xfer DMA size BDList entry */ 198 0x00000000000ffffLL, /* max xfer size, 64K */ 199 0x000000000001fffLL, /* seg, set to PAGESIZE */ 200 0x00000001, /* s/g list length, no s/g */ 201 0x00000008, /* granularity of device minxfer */ 202 0 /* DMA flags use virtual address */ 203 }; 204 205 /* 206 * DMA attributes of buffers to be used to receive/send audio data 207 */ 208 static ddi_dma_attr_t sample_buf_dma_attr = { 209 DMA_ATTR_V0, 210 0x0000000000000000LL, /* dlim_addr_lo */ 211 0x00000000ffffffffLL, /* dlim_addr_hi */ 212 0x000000000001fffeLL, /* DMA counter register - 16 bits */ 213 0x0000000000000004LL, /* DMA address align 2-byte boundary */ 214 0x0000003c, /* 1 through 60 byte burst sizes */ 215 0x00000004, /* min xfer DMA size BDList entry */ 216 0x000000000001ffffLL, /* max xfer size, 64K */ 217 0x000000000001ffffLL, /* seg, set to 64K */ 218 0x00000001, /* s/g list length, no s/g */ 219 0x00000004, /* granularity of device minxfer */ 220 0 /* DMA flags use virtual address */ 221 }; 222 223 /* 224 * _init() 225 * 226 * Description: 227 * Driver initialization, called when driver is first loaded. 228 * This is how access is initially given to all the static structures. 229 * 230 * Arguments: 231 * None 232 * 233 * Returns: 234 * mod_install() status, see mod_install(9f) 235 */ 236 int 237 _init(void) 238 { 239 int error; 240 241 audio_init_ops(&audio1575_dev_ops, M1575_NAME); 242 243 if ((error = mod_install(&audio1575_modlinkage)) != 0) { 244 audio_fini_ops(&audio1575_dev_ops); 245 } 246 247 return (error); 248 } 249 250 /* 251 * _fini() 252 * 253 * Description: 254 * Module de-initialization, called when the driver is to be unloaded. 255 * 256 * Arguments: 257 * None 258 * 259 * Returns: 260 * mod_remove() status, see mod_remove(9f) 261 */ 262 int 263 _fini(void) 264 { 265 int error; 266 267 if ((error = mod_remove(&audio1575_modlinkage)) != 0) { 268 return (error); 269 } 270 271 /* clean up ops */ 272 audio_fini_ops(&audio1575_dev_ops); 273 274 return (0); 275 } 276 277 /* 278 * _info() 279 * 280 * Description: 281 * Module information, returns information about the driver. 282 * 283 * Arguments: 284 * modinfo *modinfop Pointer to the opaque modinfo structure 285 * 286 * Returns: 287 * mod_info() status, see mod_info(9f) 288 */ 289 int 290 _info(struct modinfo *modinfop) 291 { 292 return (mod_info(&audio1575_modlinkage, modinfop)); 293 } 294 295 296 /* ******************* Driver Entry Points ********************************* */ 297 298 /* 299 * audio1575_ddi_attach() 300 * 301 * Description: 302 * Implements the DDI attach(9e) entry point. 303 * 304 * Arguments: 305 * dev_info_t *dip Pointer to the device's dev_info struct 306 * ddi_attach_cmd_t cmd Attach command 307 * 308 * Returns: 309 * DDI_SUCCESS The driver was initialized properly 310 * DDI_FAILURE The driver couldn't be initialized properly 311 */ 312 static int 313 audio1575_ddi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 314 { 315 switch (cmd) { 316 case DDI_ATTACH: 317 return (audio1575_attach(dip)); 318 319 case DDI_RESUME: 320 return (audio1575_resume(dip)); 321 } 322 return (DDI_FAILURE); 323 } 324 325 /* 326 * audio1575_ddi_detach() 327 * 328 * Description: 329 * Implements the detach(9e) entry point. 330 * 331 * Arguments: 332 * dev_info_t *dip Pointer to the device's dev_info struct 333 * ddi_detach_cmd_t cmd Detach command 334 * 335 * Returns: 336 * DDI_SUCCESS The driver was detached 337 * DDI_FAILURE The driver couldn't be detached 338 */ 339 static int 340 audio1575_ddi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 341 { 342 switch (cmd) { 343 case DDI_DETACH: 344 return (audio1575_detach(dip)); 345 346 case DDI_SUSPEND: 347 return (audio1575_suspend(dip)); 348 } 349 return (DDI_FAILURE); 350 } 351 352 /* 353 * audio1575_ddi_quiesce() 354 * 355 * Description: 356 * Implements the quiesce(9e) entry point. 357 * 358 * Arguments: 359 * dev_info_t *dip Pointer to the device's dev_info struct 360 * 361 * Returns: 362 * DDI_SUCCESS The driver was quiesced 363 * DDI_FAILURE The driver couldn't be quiesced 364 */ 365 static int 366 audio1575_ddi_quiesce(dev_info_t *dip) 367 { 368 audio1575_state_t *statep; 369 370 if ((statep = ddi_get_driver_private(dip)) == NULL) 371 return (DDI_FAILURE); 372 373 audio1575_dma_stop(statep, B_TRUE); 374 return (DDI_SUCCESS); 375 } 376 377 378 /* 379 * audio1575_intr() 380 * 381 * Description: 382 * Interrupt service routine for both play and record. For play we 383 * get the next buffers worth of audio. For record we send it on to 384 * the mixer. 385 * 386 * Each of buffer descriptor has a field IOC(interrupt on completion) 387 * When both this and the IOC bit of correspondent dma control register 388 * is set, it means that the controller should issue an interrupt upon 389 * completion of this buffer. Note that in the clearing of the interrupts 390 * below that the PCM IN and PCM out interrupts ar cleared by their 391 * respective control registers and not by writing a '1' to the INTRSR 392 * the interrupt status register. Only CPRINTR,SPINTR,and GPIOINTR 393 * require a '1' written to the INTRSR register to clear those 394 * interrupts. See comments below. 395 * 396 * Arguments: 397 * caddr_t arg Pointer to the interrupting device's state 398 * structure 399 * 400 * Returns: 401 * DDI_INTR_CLAIMED Interrupt claimed and processed 402 * DDI_INTR_UNCLAIMED Interrupt not claimed, and thus ignored 403 */ 404 static uint_t 405 audio1575_intr(caddr_t arg, caddr_t dontcare) 406 { 407 audio1575_state_t *statep = (void *)arg; 408 uint32_t intrsr; 409 uint8_t index; 410 audio1575_port_t *consume = NULL; 411 audio1575_port_t *produce = NULL; 412 413 _NOTE(ARGUNUSED(dontcare)); 414 415 mutex_enter(&statep->lock); 416 417 intrsr = GET32(M1575_INTRSR_REG); 418 419 /* check if device is interrupting */ 420 if (intrsr == 0) { 421 if (statep->ksp) { 422 /* increment the spurious ino5 interrupt cnt */ 423 M1575_KIOP(statep)->intrs[KSTAT_INTR_SPURIOUS]++; 424 } 425 426 mutex_exit(&statep->lock); 427 return (DDI_INTR_UNCLAIMED); 428 } 429 430 /* update the kernel interrupt statistics */ 431 if (statep->ksp) { 432 M1575_KIOP(statep)->intrs[KSTAT_INTR_HARD]++; 433 } 434 435 /* 436 * The Uli M1575 generates an interrupt for each interrupt 437 * type. therefore we only process one interrupt type 438 * per invocation of the audio1575_intr() routine. 439 * WARNING: DO NOT attempt to optimize this by looping 440 * until the INTRSR register is clear as this will 441 * generate spurious ino5 interrupts. 442 */ 443 if (GET16(M1575_PCMISR_REG) & M1575_PCMISR_BCIS) { 444 /* Clear PCM IN interrupt */ 445 PUT16(M1575_PCMISR_REG, M1575_SR_CLR); 446 /* 447 * Note: This interrupt is not cleared by writing a '1' 448 * to the M1575_INTRSR_REG according to the M1575 Super I/O 449 * data sheet on page 189. 450 */ 451 452 /* update the LVI -- we just set it to the current value - 1 */ 453 index = GET8(M1575_PCMICIV_REG); 454 index = (index - 1) % M1575_BD_NUMS; 455 PUT8(M1575_PCMILVIV_REG, index); 456 produce = statep->ports[M1575_REC]; 457 458 } else if (GET16(M1575_PCMOSR_REG) & M1575_PCMOSR_BCIS) { 459 /* Clear PCM OUT interrupt */ 460 PUT16(M1575_PCMOSR_REG, M1575_SR_CLR); 461 /* 462 * Note: This interrupt is not cleared by writing a '1' 463 * to the M1575_INTRSR_REG according to the M1575 Super I/O 464 * data sheet on page 189. 465 */ 466 467 /* update the LVI -- we just set it to the current value - 1 */ 468 index = GET8(M1575_PCMOCIV_REG); 469 index = (index - 1) % M1575_BD_NUMS; 470 PUT8(M1575_PCMOLVIV_REG, index); 471 consume = statep->ports[M1575_PLAY]; 472 473 } else { 474 /* Clear other interrupts (there should not be any) */ 475 PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK)); 476 } 477 478 mutex_exit(&statep->lock); 479 480 if (produce) { 481 audio_engine_produce(produce->engine); 482 } 483 if (consume) { 484 audio_engine_consume(consume->engine); 485 } 486 487 return (DDI_INTR_CLAIMED); 488 } 489 490 /* 491 * audio1575_open() 492 * 493 * Description: 494 * Opens a DMA engine for use. 495 * 496 * Arguments: 497 * void *arg The DMA engine to set up 498 * int flag Open flags 499 * unsigned *fragfrp Receives number of frames per fragment 500 * unsigned *nfragsp Receives number of fragments 501 * caddr_t *bufp Receives kernel data buffer 502 * 503 * Returns: 504 * 0 on success 505 * errno on failure 506 */ 507 static int 508 audio1575_open(void *arg, int flag, 509 unsigned *fragfrp, unsigned *nfragsp, caddr_t *bufp) 510 { 511 audio1575_port_t *port = arg; 512 513 _NOTE(ARGUNUSED(flag)); 514 515 port->started = B_FALSE; 516 port->count = 0; 517 *fragfrp = port->fragfr; 518 *nfragsp = M1575_BD_NUMS; 519 *bufp = port->samp_kaddr; 520 521 mutex_enter(&port->statep->lock); 522 audio1575_reset_port(port); 523 mutex_exit(&port->statep->lock); 524 525 return (0); 526 } 527 528 529 /* 530 * audio1575_close() 531 * 532 * Description: 533 * Closes an audio DMA engine that was previously opened. Since 534 * nobody is using it, we take this opportunity to possibly power 535 * down the entire device. 536 * 537 * Arguments: 538 * void *arg The DMA engine to shut down 539 */ 540 static void 541 audio1575_close(void *arg) 542 { 543 audio1575_port_t *port = arg; 544 audio1575_state_t *statep = port->statep; 545 546 mutex_enter(&statep->lock); 547 audio1575_stop_port(port); 548 port->started = B_FALSE; 549 mutex_exit(&statep->lock); 550 } 551 552 /* 553 * audio1575_stop() 554 * 555 * Description: 556 * This is called by the framework to stop a port that is 557 * transferring data. 558 * 559 * Arguments: 560 * void *arg The DMA engine to stop 561 */ 562 static void 563 audio1575_stop(void *arg) 564 { 565 audio1575_port_t *port = arg; 566 audio1575_state_t *statep = port->statep; 567 568 mutex_enter(&statep->lock); 569 if (port->started) { 570 audio1575_stop_port(port); 571 } 572 port->started = B_FALSE; 573 mutex_exit(&statep->lock); 574 } 575 576 /* 577 * audio1575_start() 578 * 579 * Description: 580 * This is called by the framework to start a port transferring data. 581 * 582 * Arguments: 583 * void *arg The DMA engine to start 584 * 585 * Returns: 586 * 0 on success (never fails, errno if it did) 587 */ 588 static int 589 audio1575_start(void *arg) 590 { 591 audio1575_port_t *port = arg; 592 audio1575_state_t *statep = port->statep; 593 594 mutex_enter(&statep->lock); 595 if (!port->started) { 596 audio1575_start_port(port); 597 port->started = B_TRUE; 598 } 599 mutex_exit(&statep->lock); 600 return (0); 601 } 602 603 /* 604 * audio1575_format() 605 * 606 * Description: 607 * Called by the framework to query the format for the device. 608 * 609 * Arguments: 610 * void *arg The DMA engine to query 611 * 612 * Returns: 613 * AUDIO_FORMAT_S16_LE 614 */ 615 static int 616 audio1575_format(void *arg) 617 { 618 _NOTE(ARGUNUSED(arg)); 619 620 return (AUDIO_FORMAT_S16_LE); 621 } 622 623 /* 624 * audio1575_channels() 625 * 626 * Description: 627 * Called by the framework to query the channels for the device. 628 * 629 * Arguments: 630 * void *arg The DMA engine to query 631 * 632 * Returns: 633 * Number of channels for the device 634 */ 635 static int 636 audio1575_channels(void *arg) 637 { 638 audio1575_port_t *port = arg; 639 640 return (port->nchan); 641 } 642 643 /* 644 * audio1575_rate() 645 * 646 * Description: 647 * Called by the framework to query the sample rate for the device. 648 * 649 * Arguments: 650 * void *arg The DMA engine to query 651 * 652 * Returns: 653 * 48000 654 */ 655 static int 656 audio1575_rate(void *arg) 657 { 658 _NOTE(ARGUNUSED(arg)); 659 660 return (48000); 661 } 662 663 /* 664 * audio1575_count() 665 * 666 * Description: 667 * This is called by the framework to get the engine's frame counter 668 * 669 * Arguments: 670 * void *arg The DMA engine to query 671 * 672 * Returns: 673 * frame count for current engine 674 */ 675 static uint64_t 676 audio1575_count(void *arg) 677 { 678 audio1575_port_t *port = arg; 679 audio1575_state_t *statep = port->statep; 680 uint64_t val; 681 682 mutex_enter(&statep->lock); 683 audio1575_update_port(port); 684 val = port->count + (port->picb / port->nchan); 685 mutex_exit(&statep->lock); 686 687 return (val); 688 } 689 690 /* 691 * audio1575_sync() 692 * 693 * Description: 694 * This is called by the framework to synchronize DMA caches. 695 * 696 * Arguments: 697 * void *arg The DMA engine to sync 698 */ 699 static void 700 audio1575_sync(void *arg, unsigned nframes) 701 { 702 audio1575_port_t *port = arg; 703 _NOTE(ARGUNUSED(nframes)); 704 705 (void) ddi_dma_sync(port->samp_dmah, 0, 0, port->sync_dir); 706 } 707 708 /* 709 * audio1575_start_port() 710 * 711 * Description: 712 * This routine starts the DMA engine. 713 * 714 * Arguments: 715 * audio1575_port_t *port Port of DMA engine to start. 716 */ 717 static void 718 audio1575_start_port(audio1575_port_t *port) 719 { 720 audio1575_state_t *statep = port->statep; 721 722 ASSERT(mutex_owned(&statep->lock)); 723 724 /* if suspended, then do nothing else */ 725 if (statep->suspended) { 726 return; 727 } 728 729 if (port->num == M1575_REC) { 730 /* ULi says do fifo resets here */ 731 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMIRST); 732 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE); 733 PUT8(M1575_PCMICR_REG, M1575_PCMICR_IOCE); 734 SET32(M1575_DMACR_REG, M1575_DMACR_PCMISTART); 735 } else { 736 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE); 737 PUT8(M1575_PCMOCR_REG, M1575_PCMOCR_IOCE); 738 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOSTART); 739 } 740 } 741 742 /* 743 * audio1575_stop_port() 744 * 745 * Description: 746 * This routine stops the DMA engine. 747 * 748 * Arguments: 749 * audio1575_port_t *port Port of DMA engine to stop. 750 */ 751 static void 752 audio1575_stop_port(audio1575_port_t *port) 753 { 754 audio1575_state_t *statep = port->statep; 755 756 ASSERT(mutex_owned(&statep->lock)); 757 758 /* if suspended, then do nothing else */ 759 if (statep->suspended) { 760 return; 761 } 762 763 if (port->num == M1575_REC) { 764 SET32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE); 765 } else { 766 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE); 767 } 768 } 769 770 /* 771 * audio1575_reset_port() 772 * 773 * Description: 774 * This routine resets the DMA engine pareparing it for work. 775 * 776 * Arguments: 777 * audio1575_port_t *port Port of DMA engine to reset. 778 */ 779 static void 780 audio1575_reset_port(audio1575_port_t *port) 781 { 782 audio1575_state_t *statep = port->statep; 783 784 ASSERT(mutex_owned(&statep->lock)); 785 786 port->civ = 0; 787 port->picb = 0; 788 789 if (statep->suspended) 790 return; 791 792 if (port->num == M1575_REC) { 793 /* Uli FIFO madness ... */ 794 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMIRST); 795 SET32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE); 796 797 PUT8(M1575_PCMICR_REG, 0); 798 PUT8(M1575_PCMICR_REG, M1575_CR_RR | M1575_CR_IOCE); 799 800 PUT32(M1575_PCMIBDBAR_REG, port->bdl_paddr); 801 PUT8(M1575_PCMILVIV_REG, M1575_BD_NUMS - 1); 802 803 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE); 804 805 } else { 806 807 uint32_t scr; 808 809 /* Uli FIFO madness ... */ 810 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMORST); 811 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE); 812 813 /* configure the number of channels properly */ 814 scr = GET32(M1575_SCR_REG); 815 scr &= ~(M1575_SCR_6CHL_MASK | M1575_SCR_CHAMOD_MASK); 816 scr |= M1575_SCR_6CHL_2; /* select our proper ordering */ 817 switch (port->nchan) { 818 case 2: 819 scr |= M1575_SCR_CHAMOD_2; 820 break; 821 case 4: 822 scr |= M1575_SCR_CHAMOD_4; 823 break; 824 case 6: 825 scr |= M1575_SCR_CHAMOD_6; 826 break; 827 } 828 PUT32(M1575_SCR_REG, scr); 829 830 PUT8(M1575_PCMOCR_REG, 0); 831 PUT8(M1575_PCMOCR_REG, M1575_CR_RR | M1575_CR_IOCE); 832 833 PUT32(M1575_PCMOBDBAR_REG, port->bdl_paddr); 834 PUT8(M1575_PCMOLVIV_REG, M1575_BD_NUMS - 1); 835 836 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE); 837 } 838 } 839 840 /* 841 * audio1575_update_port() 842 * 843 * Description: 844 * This routine updates the ports frame counter from hardware, and 845 * gracefully handles wraps. 846 * 847 * Arguments: 848 * audio1575_port_t *port The port to update. 849 */ 850 static void 851 audio1575_update_port(audio1575_port_t *port) 852 { 853 audio1575_state_t *statep = port->statep; 854 uint8_t civ; 855 uint16_t picb; 856 unsigned n; 857 int civoff; 858 int picoff; 859 860 if (port->num == M1575_REC) { 861 civoff = M1575_PCMICIV_REG; 862 picoff = M1575_PCMIPICB_REG; 863 } else { 864 civoff = M1575_PCMOCIV_REG; 865 picoff = M1575_PCMOPICB_REG; 866 } 867 868 if (statep->suspended) { 869 civ = 0; 870 picb = 0; 871 } else { 872 /* 873 * We read the position counters, but we're careful to avoid 874 * the situation where the position counter resets at the end 875 * of a buffer. 876 */ 877 for (int i = 0; i < 2; i++) { 878 civ = GET8(civoff); 879 picb = GET16(picoff); 880 if (GET8(civoff) == civ) { 881 /* 882 * Chip did not start a new index, so 883 * the picb is valid. 884 */ 885 break; 886 } 887 } 888 if (civ >= port->civ) { 889 n = civ - port->civ; 890 } else { 891 n = civ + (M1575_BD_NUMS - port->civ); 892 } 893 port->count += (n * port->fragfr); 894 } 895 port->civ = civ; 896 port->picb = picb; 897 } 898 899 /* 900 * audio1575_attach() 901 * 902 * Description: 903 * Attach an instance of the audio1575 driver. This routine does the 904 * device dependent attach tasks. When it is completed, it registers 905 * with the audio framework. 906 * 907 * Arguments: 908 * dev_info_t *dip Pointer to the device's dev_info struct 909 * 910 * Returns: 911 * DDI_SUCCESS The driver was initialized properly 912 * DDI_FAILURE The driver couldn't be initialized properly 913 */ 914 static int 915 audio1575_attach(dev_info_t *dip) 916 { 917 audio1575_state_t *statep; 918 audio_dev_t *adev; 919 uint32_t devid; 920 const char *name; 921 const char *rev; 922 int maxch; 923 924 /* allocate the soft state structure */ 925 statep = kmem_zalloc(sizeof (*statep), KM_SLEEP); 926 ddi_set_driver_private(dip, statep); 927 statep->dip = dip; 928 929 /* 930 * We want the micboost enabled by default as well. 931 */ 932 (void) ddi_prop_update_int(DDI_DEV_T_NONE, dip, AC97_PROP_MICBOOST, 1); 933 934 /* allocate common audio dev structure */ 935 adev = audio_dev_alloc(dip, 0); 936 if (adev == NULL) { 937 audio_dev_warn(NULL, "unable to allocate audio dev"); 938 goto error; 939 } 940 statep->adev = adev; 941 942 /* map in the audio registers */ 943 if (audio1575_map_regs(statep) != DDI_SUCCESS) { 944 audio_dev_warn(adev, "couldn't map registers"); 945 goto error; 946 } 947 948 if (audio1575_setup_intr(statep) != DDI_SUCCESS) { 949 /* message already noted */ 950 goto error; 951 } 952 953 /* Enable PCI I/O and Memory Spaces */ 954 audio1575_pci_enable(statep); 955 956 devid = (pci_config_get16(statep->pcih, PCI_CONF_VENID) << 16) | 957 pci_config_get16(statep->pcih, PCI_CONF_DEVID); 958 switch (devid) { 959 case 0x10b95455: 960 name = "Uli M1575 AC'97"; 961 rev = "M5455"; 962 break; 963 default: 964 name = "Uli AC'97"; 965 rev = "Unknown"; 966 break; 967 } 968 /* set device information -- this should check PCI config space */ 969 audio_dev_set_description(adev, name); 970 audio_dev_set_version(adev, rev); 971 972 statep->ac97 = ac97_alloc(dip, audio1575_read_ac97, 973 audio1575_write_ac97, statep); 974 ASSERT(statep->ac97 != NULL); 975 976 /* 977 * Override "max-channels" property to prevent configuration 978 * of 4 or 6 (or possibly even 8!) channel audio. The default 979 * is to support as many channels as the hardware can do. 980 */ 981 maxch = ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 982 "max-channels", ac97_num_channels(statep->ac97)); 983 if (maxch < 2) { 984 maxch = 2; 985 } 986 987 statep->maxch = min(maxch, 6) & ~1; 988 989 /* allocate port structures */ 990 if ((audio1575_alloc_port(statep, M1575_PLAY, statep->maxch) != 991 DDI_SUCCESS) || 992 (audio1575_alloc_port(statep, M1575_REC, 2) != DDI_SUCCESS)) { 993 goto error; 994 } 995 996 if (audio1575_chip_init(statep) != DDI_SUCCESS) { 997 audio_dev_warn(adev, "failed to init chip"); 998 goto error; 999 } 1000 1001 if (ac97_init(statep->ac97, adev) != DDI_SUCCESS) { 1002 audio_dev_warn(adev, "ac'97 initialization failed"); 1003 goto error; 1004 } 1005 1006 /* set up kernel statistics */ 1007 if ((statep->ksp = kstat_create(M1575_NAME, 1008 ddi_get_instance(dip), M1575_NAME, "controller", 1009 KSTAT_TYPE_INTR, 1, KSTAT_FLAG_PERSISTENT)) != NULL) { 1010 kstat_install(statep->ksp); 1011 } 1012 1013 /* Enable PCI Interrupts */ 1014 pci_config_put8(statep->pcih, M1575_PCIMISC_REG, M1575_PCIMISC_INTENB); 1015 1016 /* enable audio interrupts */ 1017 if (ddi_intr_enable(statep->ih) != DDI_SUCCESS) { 1018 audio_dev_warn(adev, "ddi_intr_enable() failure"); 1019 goto error; 1020 } 1021 1022 /* register with the framework */ 1023 if (audio_dev_register(adev) != DDI_SUCCESS) { 1024 audio_dev_warn(adev, "unable to register with framework"); 1025 goto error; 1026 } 1027 1028 /* everything worked out, so report the device */ 1029 ddi_report_dev(dip); 1030 1031 return (DDI_SUCCESS); 1032 1033 error: 1034 audio1575_destroy(statep); 1035 return (DDI_FAILURE); 1036 } 1037 1038 /* 1039 * audio1575_detach() 1040 * 1041 * Description: 1042 * Detach an instance of the audio1575 driver. 1043 * 1044 * Arguments: 1045 * dev_info_t *dip Pointer to the device's dev_info struct 1046 * 1047 * Returns: 1048 * DDI_SUCCESS The driver was detached 1049 * DDI_FAILURE The driver couldn't be detached 1050 */ 1051 static int 1052 audio1575_detach(dev_info_t *dip) 1053 { 1054 audio1575_state_t *statep; 1055 1056 statep = ddi_get_driver_private(dip); 1057 1058 if (audio_dev_unregister(statep->adev) != DDI_SUCCESS) { 1059 return (DDI_FAILURE); 1060 } 1061 1062 audio1575_destroy(statep); 1063 return (DDI_SUCCESS); 1064 } 1065 1066 /* *********************** Local Routines *************************** */ 1067 1068 /* 1069 * audio1575_setup_intr() 1070 * 1071 * Description: 1072 * This routine initializes the audio driver's interrupt handle and 1073 * mutex. 1074 * 1075 * Arguments: 1076 * audio1575_state_t *state The device's state structure 1077 * 1078 * Returns: 1079 * DDI_SUCCESS Interrupt handle & mutex initialized 1080 * DDI_FAILURE Interrupt handle & mutex not initialized 1081 */ 1082 int 1083 audio1575_setup_intr(audio1575_state_t *statep) 1084 { 1085 audio_dev_t *adev; 1086 dev_info_t *dip; 1087 uint_t ipri; 1088 int actual; 1089 int rv; 1090 int itype; 1091 int count; 1092 ddi_intr_handle_t ih = NULL; 1093 1094 dip = statep->dip; 1095 adev = statep->adev; 1096 1097 /* get supported interrupt types */ 1098 rv = ddi_intr_get_supported_types(dip, &itype); 1099 if ((rv != DDI_SUCCESS) || (!(itype & DDI_INTR_TYPE_FIXED))) { 1100 audio_dev_warn(adev, "Fixed type interrupts not supported"); 1101 return (DDI_FAILURE); 1102 } 1103 1104 /* make sure we only have one fixed type interrupt */ 1105 rv = ddi_intr_get_nintrs(dip, DDI_INTR_TYPE_FIXED, &count); 1106 if ((rv != DDI_SUCCESS) || (count != 1)) { 1107 audio_dev_warn(adev, "No fixed interrupts"); 1108 return (DDI_FAILURE); 1109 } 1110 1111 rv = ddi_intr_alloc(statep->dip, &ih, DDI_INTR_TYPE_FIXED, 1112 0, 1, &actual, DDI_INTR_ALLOC_STRICT); 1113 if ((rv != DDI_SUCCESS) || (actual != 1)) { 1114 audio_dev_warn(adev, "Can't alloc interrupt handle"); 1115 return (DDI_FAILURE); 1116 } 1117 1118 /* test for a high level interrupt */ 1119 if (ddi_intr_get_pri(ih, &ipri) != DDI_SUCCESS) { 1120 audio_dev_warn(adev, "Can't get interrupt priority"); 1121 (void) ddi_intr_free(ih); 1122 return (DDI_FAILURE); 1123 } 1124 if (ipri >= ddi_intr_get_hilevel_pri()) { 1125 audio_dev_warn(adev, "Unsupported high level interrupt"); 1126 (void) ddi_intr_free(ih); 1127 return (DDI_FAILURE); 1128 } 1129 1130 if (ddi_intr_add_handler(ih, audio1575_intr, statep, NULL) != 1131 DDI_SUCCESS) { 1132 audio_dev_warn(adev, "Can't add interrupt handler"); 1133 (void) ddi_intr_free(ih); 1134 return (DDI_FAILURE); 1135 } 1136 1137 statep->ih = ih; 1138 mutex_init(&statep->lock, NULL, MUTEX_DRIVER, DDI_INTR_PRI(ipri)); 1139 mutex_init(&statep->ac_lock, NULL, MUTEX_DRIVER, DDI_INTR_PRI(ipri)); 1140 1141 return (DDI_SUCCESS); 1142 } 1143 1144 /* 1145 * audio1575_alloc_port() 1146 * 1147 * Description: 1148 * This routine allocates the DMA handles and the memory for the 1149 * DMA engines to use. It also configures the BDL lists properly 1150 * for use. 1151 * 1152 * Arguments: 1153 * dev_info_t *dip Pointer to the device's devinfo 1154 * int num M1575_PLAY or M1575_REC 1155 * uint8_t nchan Number of channels (2 = stereo, 6 = 5.1, etc.) 1156 * 1157 * Returns: 1158 * DDI_SUCCESS Registers successfully mapped 1159 * DDI_FAILURE Registers not successfully mapped 1160 */ 1161 static int 1162 audio1575_alloc_port(audio1575_state_t *statep, int num, uint8_t nchan) 1163 { 1164 ddi_dma_cookie_t cookie; 1165 uint_t count; 1166 int dir; 1167 unsigned caps; 1168 char *prop; 1169 audio_dev_t *adev; 1170 audio1575_port_t *port; 1171 uint32_t *kaddr; 1172 uint32_t paddr; 1173 int rc; 1174 dev_info_t *dip; 1175 1176 adev = statep->adev; 1177 dip = statep->dip; 1178 1179 port = kmem_zalloc(sizeof (*port), KM_SLEEP); 1180 statep->ports[num] = port; 1181 port->num = num; 1182 port->statep = statep; 1183 port->started = B_FALSE; 1184 port->nchan = nchan; 1185 1186 if (num == M1575_REC) { 1187 prop = "record-interrupts"; 1188 dir = DDI_DMA_READ; 1189 caps = ENGINE_INPUT_CAP; 1190 port->sync_dir = DDI_DMA_SYNC_FORKERNEL; 1191 } else { 1192 prop = "play-interrupts"; 1193 dir = DDI_DMA_WRITE; 1194 caps = ENGINE_OUTPUT_CAP; 1195 port->sync_dir = DDI_DMA_SYNC_FORDEV; 1196 } 1197 1198 port->intrs = ddi_prop_get_int(DDI_DEV_T_ANY, dip, 1199 DDI_PROP_DONTPASS, prop, M1575_INTS); 1200 1201 /* make sure the values are good */ 1202 if (port->intrs < M1575_MIN_INTS) { 1203 audio_dev_warn(adev, "%s too low, %d, resetting to %d", 1204 prop, port->intrs, M1575_INTS); 1205 port->intrs = M1575_INTS; 1206 } else if (port->intrs > M1575_MAX_INTS) { 1207 audio_dev_warn(adev, "%s too high, %d, resetting to %d", 1208 prop, port->intrs, M1575_INTS); 1209 port->intrs = M1575_INTS; 1210 } 1211 1212 /* 1213 * Figure out how much space we need. Sample rate is 48kHz, and 1214 * we need to store 32 chunks. (Note that this means that low 1215 * interrupt frequencies will require more RAM. We could probably 1216 * do some cleverness to use a shorter BD list.) 1217 */ 1218 port->fragfr = 48000 / port->intrs; 1219 port->fragfr = M1575_ROUNDUP(port->fragfr, M1575_MOD_SIZE); 1220 port->samp_size = port->fragfr * port->nchan * 2; 1221 port->samp_size *= M1575_BD_NUMS; 1222 1223 /* allocate dma handle */ 1224 rc = ddi_dma_alloc_handle(dip, &sample_buf_dma_attr, DDI_DMA_SLEEP, 1225 NULL, &port->samp_dmah); 1226 if (rc != DDI_SUCCESS) { 1227 audio_dev_warn(adev, "ddi_dma_alloc_handle failed: %d", rc); 1228 return (DDI_FAILURE); 1229 } 1230 /* allocate DMA buffer */ 1231 rc = ddi_dma_mem_alloc(port->samp_dmah, port->samp_size, &buf_attr, 1232 DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, &port->samp_kaddr, 1233 &port->samp_size, &port->samp_acch); 1234 if (rc == DDI_FAILURE) { 1235 audio_dev_warn(adev, "dma_mem_alloc failed"); 1236 return (DDI_FAILURE); 1237 } 1238 1239 /* bind DMA buffer */ 1240 rc = ddi_dma_addr_bind_handle(port->samp_dmah, NULL, 1241 port->samp_kaddr, port->samp_size, dir|DDI_DMA_CONSISTENT, 1242 DDI_DMA_SLEEP, NULL, &cookie, &count); 1243 if ((rc != DDI_DMA_MAPPED) || (count != 1)) { 1244 audio_dev_warn(adev, 1245 "ddi_dma_addr_bind_handle failed: %d", rc); 1246 return (DDI_FAILURE); 1247 } 1248 port->samp_paddr = cookie.dmac_address; 1249 1250 /* 1251 * now, from here we allocate DMA memory for buffer descriptor list. 1252 * we allocate adjacent DMA memory for all DMA engines. 1253 */ 1254 rc = ddi_dma_alloc_handle(dip, &bdlist_dma_attr, DDI_DMA_SLEEP, 1255 NULL, &port->bdl_dmah); 1256 if (rc != DDI_SUCCESS) { 1257 audio_dev_warn(adev, "ddi_dma_alloc_handle(bdlist) failed"); 1258 return (DDI_FAILURE); 1259 } 1260 1261 /* 1262 * we allocate all buffer descriptors lists in continuous dma memory. 1263 */ 1264 port->bdl_size = sizeof (m1575_bd_entry_t) * M1575_BD_NUMS; 1265 rc = ddi_dma_mem_alloc(port->bdl_dmah, port->bdl_size, 1266 &dev_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, 1267 &port->bdl_kaddr, &port->bdl_size, &port->bdl_acch); 1268 if (rc != DDI_SUCCESS) { 1269 audio_dev_warn(adev, "ddi_dma_mem_alloc(bdlist) failed"); 1270 return (DDI_FAILURE); 1271 } 1272 1273 /* 1274 * Wire up the BD list. We do this *before* binding the BD list 1275 * so that we don't have to do an extra ddi_dma_sync. 1276 */ 1277 paddr = port->samp_paddr; 1278 kaddr = (void *)port->bdl_kaddr; 1279 for (int i = 0; i < M1575_BD_NUMS; i++) { 1280 1281 /* set base address of buffer */ 1282 ddi_put32(port->bdl_acch, kaddr, paddr); 1283 kaddr++; 1284 1285 /* set size in frames, and enable IOC interrupt */ 1286 ddi_put32(port->bdl_acch, kaddr, 1287 ((port->fragfr * port->nchan) | (1U << 31))); 1288 kaddr++; 1289 1290 paddr += (port->fragfr * port->nchan * 2); 1291 } 1292 1293 rc = ddi_dma_addr_bind_handle(port->bdl_dmah, NULL, port->bdl_kaddr, 1294 port->bdl_size, DDI_DMA_WRITE|DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, 1295 NULL, &cookie, &count); 1296 if ((rc != DDI_DMA_MAPPED) || (count != 1)) { 1297 audio_dev_warn(adev, "addr_bind_handle failed"); 1298 return (DDI_FAILURE); 1299 } 1300 port->bdl_paddr = cookie.dmac_address; 1301 1302 port->engine = audio_engine_alloc(&audio1575_engine_ops, caps); 1303 if (port->engine == NULL) { 1304 audio_dev_warn(adev, "audio_engine_alloc failed"); 1305 return (DDI_FAILURE); 1306 } 1307 1308 audio_engine_set_private(port->engine, port); 1309 audio_dev_add_engine(adev, port->engine); 1310 1311 return (DDI_SUCCESS); 1312 } 1313 1314 /* 1315 * audio1575_free_port() 1316 * 1317 * Description: 1318 * This routine unbinds the DMA cookies, frees the DMA buffers, 1319 * deallocates the DMA handles. 1320 * 1321 * Arguments: 1322 * audio810_port_t *port The port structure for a DMA engine. 1323 */ 1324 static void 1325 audio1575_free_port(audio1575_port_t *port) 1326 { 1327 if (port == NULL) 1328 return; 1329 1330 if (port->engine) { 1331 audio_dev_remove_engine(port->statep->adev, port->engine); 1332 audio_engine_free(port->engine); 1333 } 1334 if (port->bdl_paddr) { 1335 (void) ddi_dma_unbind_handle(port->bdl_dmah); 1336 } 1337 if (port->bdl_acch) { 1338 ddi_dma_mem_free(&port->bdl_acch); 1339 } 1340 if (port->bdl_dmah) { 1341 ddi_dma_free_handle(&port->bdl_dmah); 1342 } 1343 if (port->samp_paddr) { 1344 (void) ddi_dma_unbind_handle(port->samp_dmah); 1345 } 1346 if (port->samp_acch) { 1347 ddi_dma_mem_free(&port->samp_acch); 1348 } 1349 if (port->samp_dmah) { 1350 ddi_dma_free_handle(&port->samp_dmah); 1351 } 1352 kmem_free(port, sizeof (*port)); 1353 } 1354 1355 /* 1356 * audio1575_map_regs() 1357 * 1358 * Description: 1359 * The registers are mapped in. 1360 * 1361 * Arguments: 1362 * dev_info_t *dip Pointer to the device's devinfo 1363 * 1364 * Returns: 1365 * DDI_SUCCESS Registers successfully mapped 1366 * DDI_FAILURE Registers not successfully mapped 1367 */ 1368 static int 1369 audio1575_map_regs(audio1575_state_t *statep) 1370 { 1371 dev_info_t *dip = statep->dip; 1372 1373 /* map the M1575 Audio PCI Cfg Space */ 1374 if (pci_config_setup(dip, &statep->pcih) != DDI_SUCCESS) { 1375 audio_dev_warn(statep->adev, "PCI config map failure"); 1376 goto error; 1377 } 1378 1379 /* map the M1575 Audio registers in PCI IO Space */ 1380 if ((ddi_regs_map_setup(dip, M1575_AUDIO_IO_SPACE, &statep->regsp, 1381 0, 0, &dev_attr, &statep->regsh)) != DDI_SUCCESS) { 1382 audio_dev_warn(statep->adev, "Audio IO mapping failure"); 1383 goto error; 1384 } 1385 return (DDI_SUCCESS); 1386 1387 error: 1388 audio1575_unmap_regs(statep); 1389 1390 return (DDI_FAILURE); 1391 } 1392 1393 /* 1394 * audio1575_unmap_regs() 1395 * 1396 * Description: 1397 * This routine unmaps control registers. 1398 * 1399 * Arguments: 1400 * audio1575_state_t *state The device's state structure 1401 */ 1402 static void 1403 audio1575_unmap_regs(audio1575_state_t *statep) 1404 { 1405 if (statep->regsh) { 1406 ddi_regs_map_free(&statep->regsh); 1407 } 1408 1409 if (statep->pcih) { 1410 pci_config_teardown(&statep->pcih); 1411 } 1412 } 1413 1414 /* 1415 * audio1575_chip_init() 1416 * 1417 * Description: 1418 * This routine initializes the M1575 AC97 audio controller and the AC97 1419 * codec. The AC97 codec registers are programmed from codec_shadow[]. 1420 * If we are not doing a restore, we initialize codec_shadow[], otherwise 1421 * we use the current values of shadow. This routine expects that the 1422 * PCI IO and Memory spaces have been mapped and enabled already. 1423 * Arguments: 1424 * audio1575_state_t *state The device's state structure 1425 * restore from codec_shadow[] 1426 * Returns: 1427 * DDI_SUCCESS The hardware was initialized properly 1428 * DDI_FAILURE The hardware couldn't be initialized properly 1429 */ 1430 static int 1431 audio1575_chip_init(audio1575_state_t *statep) 1432 { 1433 uint32_t ssr; 1434 uint32_t rtsr; 1435 uint32_t intrsr; 1436 int i; 1437 int j; 1438 #ifdef __sparc 1439 uint8_t clk_detect; 1440 ddi_acc_handle_t pcih; 1441 #endif 1442 clock_t ticks; 1443 1444 /* 1445 * clear the interrupt control and status register 1446 * READ/WRITE/READ workaround required 1447 * for buggy hardware 1448 */ 1449 1450 PUT32(M1575_INTRCR_REG, 0); 1451 (void) GET32(M1575_INTRCR_REG); 1452 1453 intrsr = GET32(M1575_INTRSR_REG); 1454 PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK)); 1455 (void) GET32(M1575_INTRSR_REG); 1456 1457 ticks = drv_usectohz(M1575_LOOP_CTR); 1458 1459 /* 1460 * SADA only supports stereo, so we set the channel bits 1461 * to "00" to select 2 channels. 1462 * will also set the following: 1463 * 1464 * Disable double rate enable 1465 * no SPDIF output selected 1466 * 16 bit audio record mode 1467 * 16 bit pcm out mode 1468 * PCM Out 6 chan mode FL FR CEN BL BR LFE 1469 * PCM Out 2 channel mode (00) 1470 */ 1471 for (i = 0; i < M1575_LOOP_CTR; i++) { 1472 /* Reset the AC97 Codec and default to 2 channel 16 bit mode */ 1473 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST); 1474 delay(ticks<<1); 1475 1476 /* Read the System Status Reg */ 1477 ssr = GET32(M1575_SSR_REG); 1478 1479 /* make sure and release the blocked reset bit */ 1480 if (ssr & M1575_SSR_RSTBLK) { 1481 SET32(M1575_INTFCR_REG, M1575_INTFCR_RSTREL); 1482 delay(ticks); 1483 1484 /* Read the System Status Reg */ 1485 ssr = GET32(M1575_SSR_REG); 1486 1487 /* make sure and release the blocked reset bit */ 1488 if (ssr & M1575_SSR_RSTBLK) { 1489 return (DDI_FAILURE); 1490 } 1491 1492 /* Reset the controller */ 1493 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST); 1494 delay(ticks); 1495 } 1496 1497 /* according AC'97 spec, wait for codec reset */ 1498 for (j = 0; j < M1575_LOOP_CTR; j++) { 1499 if ((GET32(M1575_SCR_REG) & M1575_SCR_COLDRST) == 0) { 1500 break; 1501 } 1502 delay(ticks); 1503 } 1504 1505 /* codec reset failed */ 1506 if (j >= M1575_LOOP_CTR) { 1507 audio_dev_warn(statep->adev, 1508 "failure to reset codec"); 1509 return (DDI_FAILURE); 1510 } 1511 1512 /* 1513 * Wait for FACRDY First codec ready. The hardware can 1514 * provide the state of 1515 * codec ready bit on SDATA_IN[0] and as reflected in 1516 * the Recv Tag Slot Reg. 1517 */ 1518 rtsr = GET32(M1575_RTSR_REG); 1519 if (rtsr & M1575_RTSR_FACRDY) { 1520 break; 1521 } else { /* reset the status and wait for new status to set */ 1522 rtsr |= M1575_RTSR_FACRDY; 1523 PUT32(M1575_RTSR_REG, rtsr); 1524 drv_usecwait(10); 1525 } 1526 } 1527 1528 /* if we could not reset the AC97 codec then report failure */ 1529 if (i >= M1575_LOOP_CTR) { 1530 audio_dev_warn(statep->adev, 1531 "no codec ready signal received"); 1532 return (DDI_FAILURE); 1533 } 1534 1535 #ifdef __sparc 1536 /* Magic code from ULi to Turn on the AC_LINK clock */ 1537 pcih = statep->pcih; 1538 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1539 pci_config_put8(pcih, M1575_PCIACD_REG, 4); 1540 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1541 (void) pci_config_get8(pcih, M1575_PCIACD_REG); 1542 pci_config_put8(pcih, M1575_PCIACD_REG, 2); 1543 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1544 clk_detect = pci_config_get8(pcih, M1575_PCIACD_REG); 1545 1546 if (clk_detect != 1) { 1547 audio_dev_warn(statep->adev, "No AC97 Clock Detected"); 1548 return (DDI_FAILURE); 1549 } 1550 #endif 1551 1552 /* Magic code from Uli to Init FIFO1 and FIFO2 */ 1553 PUT32(M1575_FIFOCR1_REG, 0x81818181); 1554 PUT32(M1575_FIFOCR2_REG, 0x81818181); 1555 PUT32(M1575_FIFOCR3_REG, 0x81818181); 1556 1557 /* Make sure that PCM in and PCM out are enabled */ 1558 SET32(M1575_INTFCR_REG, (M1575_INTFCR_PCMIENB | M1575_INTFCR_PCMOENB)); 1559 1560 audio1575_dma_stop(statep, B_FALSE); 1561 1562 return (DDI_SUCCESS); 1563 } 1564 1565 /* 1566 * audio1575_dma_stop() 1567 * 1568 * Description: 1569 * This routine is used to put each DMA engine into the quiet state. 1570 * 1571 * Arguments: 1572 * audio1575_state_t *statep The device's state structure 1573 */ 1574 static void 1575 audio1575_dma_stop(audio1575_state_t *statep, boolean_t quiesce) 1576 { 1577 uint32_t intrsr; 1578 int i; 1579 1580 if (statep->regsh == NULL) { 1581 return; 1582 } 1583 1584 /* pause bus master (needed for the following reset register) */ 1585 for (i = 0; i < M1575_LOOP_CTR; i++) { 1586 1587 SET32(M1575_DMACR_REG, M1575_DMACR_PAUSE_ALL); 1588 if (GET32(M1575_DMACR_REG) & M1575_DMACR_PAUSE_ALL) { 1589 break; 1590 } 1591 drv_usecwait(10); 1592 } 1593 1594 if (i >= M1575_LOOP_CTR) { 1595 if (!quiesce) 1596 audio_dev_warn(statep->adev, "failed to stop DMA"); 1597 return; 1598 } 1599 1600 /* Pause bus master (needed for the following reset register) */ 1601 PUT8(M1575_PCMICR_REG, 0); 1602 PUT8(M1575_PCMOCR_REG, 0); 1603 PUT8(M1575_MICICR_REG, 0); 1604 PUT8(M1575_CSPOCR_REG, 0); 1605 PUT8(M1575_PCMI2CR_RR, 0); 1606 PUT8(M1575_MICI2CR_RR, 0); 1607 1608 /* Reset the bus master registers for all DMA engines */ 1609 PUT8(M1575_PCMICR_REG, M1575_PCMICR_RR); 1610 PUT8(M1575_PCMOCR_REG, M1575_PCMOCR_RR); 1611 PUT8(M1575_MICICR_REG, M1575_MICICR_RR); 1612 PUT8(M1575_CSPOCR_REG, M1575_CSPOCR_RR); 1613 PUT8(M1575_PCMI2CR_REG, M1575_PCMI2CR_RR); 1614 PUT8(M1575_MICI2CR_REG, M1575_MICI2CR_RR); 1615 1616 /* Reset FIFOS */ 1617 PUT32(M1575_FIFOCR1_REG, 0x81818181); 1618 PUT32(M1575_FIFOCR2_REG, 0x81818181); 1619 PUT32(M1575_FIFOCR3_REG, 0x81818181); 1620 1621 /* Clear Interrupts */ 1622 SET16(M1575_PCMISR_REG, M1575_SR_CLR); 1623 SET16(M1575_PCMOSR_REG, M1575_SR_CLR); 1624 SET16(M1575_MICISR_REG, M1575_SR_CLR); 1625 SET16(M1575_CSPOSR_REG, M1575_SR_CLR); 1626 SET16(M1575_PCMI2SR_REG, M1575_SR_CLR); 1627 SET16(M1575_MICI2SR_REG, M1575_SR_CLR); 1628 1629 /* 1630 * clear the interrupt control and status register 1631 * READ/WRITE/READ workaround required 1632 * for buggy hardware 1633 */ 1634 1635 PUT32(M1575_INTRCR_REG, 0); 1636 (void) GET32(M1575_INTRCR_REG); 1637 1638 intrsr = GET32(M1575_INTRSR_REG); 1639 PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK)); 1640 (void) GET32(M1575_INTRSR_REG); 1641 } 1642 1643 /* 1644 * audio1575_codec_sync() 1645 * 1646 * Description: 1647 * Serialize access to the AC97 audio mixer registers. 1648 * 1649 * Arguments: 1650 * audio1575_state_t *state The device's state structure 1651 * 1652 * Returns: 1653 * DDI_SUCCESS Ready for an I/O access to the codec 1654 * DDI_FAILURE An I/O access is currently in progress, can't 1655 * perform another I/O access. 1656 */ 1657 static int 1658 audio1575_codec_sync(audio1575_state_t *statep) 1659 { 1660 /* do the Uli Shuffle ... */ 1661 for (int i = 0; i < M1575_LOOP_CTR; i++) { 1662 /* Read the semaphore, and loop till we own it */ 1663 if ((GET32(M1575_CASR_REG) & 1) == 0) { 1664 for (int j = 0; j < M1575_LOOP_CTR; j++) { 1665 /* Wait for CWRSUCC 0x8 */ 1666 if (GET32(M1575_CSPSR_REG) & 1667 M1575_CSPSR_SUCC) { 1668 return (DDI_SUCCESS); 1669 } 1670 drv_usecwait(1); 1671 } 1672 } 1673 drv_usecwait(10); 1674 } 1675 1676 return (DDI_FAILURE); 1677 } 1678 1679 /* 1680 * audio1575_write_ac97() 1681 * 1682 * Description: 1683 * Set the specific AC97 Codec register. 1684 * 1685 * Arguments: 1686 * void *arg The device's state structure 1687 * uint8_t reg AC97 register number 1688 * uint16_t data The data want to be set 1689 */ 1690 static void 1691 audio1575_write_ac97(void *arg, uint8_t reg, uint16_t data) 1692 { 1693 audio1575_state_t *statep = arg; 1694 int i; 1695 1696 mutex_enter(&statep->ac_lock); 1697 1698 if (audio1575_codec_sync(statep) != DDI_SUCCESS) { 1699 mutex_exit(&statep->ac_lock); 1700 return; 1701 } 1702 1703 /* write the data to WRITE to the lo word of the CPR register */ 1704 PUT16(M1575_CPR_REG, data); 1705 1706 /* write the address to WRITE to the hi word of the CPR register */ 1707 PUT16(M1575_CPR_REG+2, reg); 1708 1709 /* wait until command is completed sucessfully */ 1710 for (i = 0; i < M1575_LOOP_CTR; i++) { 1711 /* Wait for Write Ready 0x01 */ 1712 if (GET32(M1575_CSPSR_REG) & M1575_CSPSR_WRRDY) { 1713 break; 1714 } 1715 drv_usecwait(1); 1716 } 1717 1718 mutex_exit(&statep->ac_lock); 1719 1720 if (i < M1575_LOOP_CTR) { 1721 (void) audio1575_read_ac97(statep, reg); 1722 } 1723 } 1724 1725 /* 1726 * audio1575_read_ac97() 1727 * 1728 * Description: 1729 * Get the specific AC97 Codec register. It also updates codec_shadow[] 1730 * with the register value. 1731 * 1732 * Arguments: 1733 * void *arg The device's state structure 1734 * uint8_t reg AC97 register number 1735 * 1736 * Returns: 1737 * Value of AC97 register. (0xffff in failure situations). 1738 */ 1739 static uint16_t 1740 audio1575_read_ac97(void *arg, uint8_t reg) 1741 { 1742 audio1575_state_t *statep = arg; 1743 uint16_t addr = 0; 1744 uint16_t data = 0xffff; 1745 int i; 1746 1747 mutex_enter(&statep->ac_lock); 1748 if ((audio1575_codec_sync(statep)) != DDI_SUCCESS) { 1749 mutex_exit(&statep->ac_lock); 1750 return (data); 1751 } 1752 1753 /* 1754 * at this point we have the CASR semaphore 1755 * and the codec is r/w ready 1756 * OR in the READ opcode into the address field 1757 */ 1758 1759 addr = (reg | M1575_CPR_READ); 1760 1761 /* write the address to READ to the hi word of the CPR register */ 1762 PUT16(M1575_CPR_REG+2, addr); 1763 1764 /* wait until command is completed sucessfully */ 1765 for (i = 0; i < M1575_LOOP_CTR; i++) { 1766 /* Wait for Read Ready 0x02 */ 1767 if (GET32(M1575_CSPSR_REG) & M1575_CSPSR_RDRDY) { 1768 break; 1769 } 1770 drv_usecwait(1); 1771 } 1772 1773 if (i < M1575_LOOP_CTR) { 1774 /* read back the data and address */ 1775 data = GET16(M1575_SPR_REG); 1776 addr = GET16(M1575_SPR_REG+2); 1777 if (addr != reg) { 1778 data = 0xffff; 1779 } 1780 } 1781 1782 mutex_exit(&statep->ac_lock); 1783 return (data); 1784 } 1785 1786 /* 1787 * audio1575_pci_enable() 1788 * 1789 * Description: 1790 * This routine Enables all PCI IO and MEMORY accesses 1791 * 1792 * Arguments: 1793 * audio1575_state_t *statep The device's state structure 1794 */ 1795 static void 1796 audio1575_pci_enable(audio1575_state_t *statep) 1797 { 1798 uint16_t pcics_reg; 1799 1800 pcics_reg = pci_config_get16(statep->pcih, PCI_CONF_COMM); 1801 pcics_reg |= (PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME); 1802 pci_config_put16(statep->pcih, PCI_CONF_COMM, pcics_reg); 1803 } 1804 1805 /* 1806 * audio1575_pci_disable() 1807 * 1808 * Description: 1809 * This routine Disables all PCI IO and MEMORY accesses 1810 * 1811 * Arguments: 1812 * audio1575_state_t *statep The device's state structure 1813 */ 1814 static void 1815 audio1575_pci_disable(audio1575_state_t *statep) 1816 { 1817 uint16_t pcics_reg; 1818 1819 if (statep->pcih == NULL) 1820 return; 1821 pcics_reg = pci_config_get16(statep->pcih, PCI_CONF_COMM); 1822 pcics_reg &= ~(PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME); 1823 pci_config_put16(statep->pcih, PCI_CONF_COMM, pcics_reg); 1824 } 1825 1826 /* 1827 * audio1575_resume() 1828 * 1829 * Description: 1830 * Resume operation of the device after sleeping or hibernating. 1831 * Note that this should never fail, even if hardware goes wonky, 1832 * because the current PM framework will panic if it does. 1833 * 1834 * Arguments: 1835 * dev_info_t *dip Pointer to the device's dev_info struct 1836 * 1837 * Returns: 1838 * DDI_SUCCESS The driver was resumed 1839 */ 1840 static int 1841 audio1575_resume(dev_info_t *dip) 1842 { 1843 audio1575_state_t *statep; 1844 audio_dev_t *adev; 1845 1846 /* we've already allocated the state structure so get ptr */ 1847 statep = ddi_get_driver_private(dip); 1848 adev = statep->adev; 1849 ASSERT(!mutex_owned(&statep->lock)); 1850 1851 if (audio1575_chip_init(statep) != DDI_SUCCESS) { 1852 /* 1853 * Note that PM gurus say we should return 1854 * success here. Failure of audio shouldn't 1855 * be considered FATAL to the system. The 1856 * upshot is that audio will not progress. 1857 */ 1858 audio_dev_warn(adev, "DDI_RESUME failed to init chip"); 1859 return (DDI_SUCCESS); 1860 } 1861 1862 /* allow ac97 operations again */ 1863 ac97_resume(statep->ac97); 1864 1865 mutex_enter(&statep->lock); 1866 1867 ASSERT(statep->suspended); 1868 statep->suspended = B_FALSE; 1869 1870 for (int i = 0; i < M1575_NUM_PORTS; i++) { 1871 1872 audio1575_port_t *port = statep->ports[i]; 1873 1874 if (port != NULL) { 1875 /* reset framework DMA engine buffer */ 1876 if (port->engine != NULL) { 1877 audio_engine_reset(port->engine); 1878 } 1879 1880 /* reset and initialize hardware ports */ 1881 audio1575_reset_port(port); 1882 if (port->started) { 1883 audio1575_start_port(port); 1884 } else { 1885 audio1575_stop_port(port); 1886 } 1887 } 1888 } 1889 mutex_exit(&statep->lock); 1890 1891 return (DDI_SUCCESS); 1892 } 1893 1894 /* 1895 * audio1575_suspend() 1896 * 1897 * Description: 1898 * Suspend an instance of the audio1575 driver. 1899 * 1900 * Arguments: 1901 * dev_info_t *dip Pointer to the device's dev_info struct 1902 * 1903 * Returns: 1904 * DDI_SUCCESS The driver was suspended 1905 */ 1906 static int 1907 audio1575_suspend(dev_info_t *dip) 1908 { 1909 audio1575_state_t *statep; 1910 1911 statep = ddi_get_driver_private(dip); 1912 1913 ac97_suspend(statep->ac97); 1914 1915 mutex_enter(&statep->lock); 1916 1917 statep->suspended = B_TRUE; 1918 1919 /* 1920 * stop all DMA operations 1921 */ 1922 audio1575_dma_stop(statep, B_FALSE); 1923 1924 mutex_exit(&statep->lock); 1925 1926 return (DDI_SUCCESS); 1927 } 1928 1929 /* 1930 * audio1575_destroy() 1931 * 1932 * Description: 1933 * This routine releases all resources held by the device instance, 1934 * as part of either detach or a failure in attach. 1935 * 1936 * Arguments: 1937 * audio1575_state_t *state The device soft state. 1938 * 1939 * Returns: 1940 * None 1941 */ 1942 void 1943 audio1575_destroy(audio1575_state_t *statep) 1944 { 1945 ddi_acc_handle_t pcih; 1946 1947 /* stop DMA engines */ 1948 audio1575_dma_stop(statep, B_FALSE); 1949 1950 if (statep->regsh != NULL) { 1951 /* reset the codec */ 1952 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST); 1953 } 1954 1955 if ((pcih = statep->pcih) != NULL) { 1956 /* turn off the AC_LINK clock */ 1957 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1958 pci_config_put8(pcih, M1575_PCIACD_REG, 4); 1959 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1960 } 1961 1962 /* Disable PCI I/O and Memory Spaces */ 1963 audio1575_pci_disable(statep); 1964 1965 if (statep->ih != NULL) { 1966 (void) ddi_intr_disable(statep->ih); 1967 (void) ddi_intr_remove_handler(statep->ih); 1968 (void) ddi_intr_free(statep->ih); 1969 mutex_destroy(&statep->lock); 1970 mutex_destroy(&statep->ac_lock); 1971 } 1972 1973 if (statep->ksp != NULL) { 1974 kstat_delete(statep->ksp); 1975 } 1976 1977 audio1575_free_port(statep->ports[M1575_PLAY]); 1978 audio1575_free_port(statep->ports[M1575_REC]); 1979 1980 audio1575_unmap_regs(statep); 1981 1982 if (statep->ac97 != NULL) { 1983 ac97_free(statep->ac97); 1984 } 1985 1986 if (statep->adev != NULL) { 1987 audio_dev_free(statep->adev); 1988 } 1989 1990 kmem_free(statep, sizeof (*statep)); 1991 } 1992