1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 27 /* 28 * audio1575 Audio Driver 29 * 30 * The driver is primarily targeted at providing audio support for 31 * those systems which use the Uli M1575 audio core. 32 * 33 * The M1575 audio core, in AC'97 controller mode, has independent 34 * channels for PCM in, PCM out, mic in, modem in, and modem out. 35 * 36 * The AC'97 controller is a PCI bus master with scatter/gather 37 * support. Each channel has a DMA engine. Currently, we use only 38 * the PCM in and PCM out channels. Each DMA engine uses one buffer 39 * descriptor list. And the buffer descriptor list is an array of up 40 * to 32 entries, each of which describes a data buffer. Each entry 41 * contains a pointer to a data buffer, control bits, and the length 42 * of the buffer being pointed to, where the length is expressed as 43 * the number of samples. This, combined with the 16-bit sample size, 44 * gives the actual physical length of the buffer. 45 * 46 * NOTE: 47 * This driver depends on the drv/audio, misc/ac97 48 * modules being loaded first. 49 */ 50 51 #include <sys/types.h> 52 #include <sys/modctl.h> 53 #include <sys/kmem.h> 54 #include <sys/conf.h> 55 #include <sys/ddi.h> 56 #include <sys/sunddi.h> 57 #include <sys/pci.h> 58 #include <sys/note.h> 59 #include <sys/audio/audio_driver.h> 60 #include <sys/audio/ac97.h> 61 #include "audio1575.h" 62 63 /* 64 * Module linkage routines for the kernel 65 */ 66 static int audio1575_ddi_attach(dev_info_t *, ddi_attach_cmd_t); 67 static int audio1575_ddi_detach(dev_info_t *, ddi_detach_cmd_t); 68 static int audio1575_ddi_quiesce(dev_info_t *); 69 70 /* 71 * Entry point routine prototypes 72 */ 73 static int audio1575_open(void *, int, unsigned *, unsigned *, caddr_t *); 74 static void audio1575_close(void *); 75 static int audio1575_start(void *); 76 static void audio1575_stop(void *); 77 static int audio1575_format(void *); 78 static int audio1575_channels(void *); 79 static int audio1575_rate(void *); 80 static uint64_t audio1575_count(void *); 81 static void audio1575_sync(void *, unsigned); 82 static size_t audio1575_qlen(void *); 83 84 static audio_engine_ops_t audio1575_engine_ops = { 85 AUDIO_ENGINE_VERSION, 86 audio1575_open, 87 audio1575_close, 88 audio1575_start, 89 audio1575_stop, 90 audio1575_count, 91 audio1575_format, 92 audio1575_channels, 93 audio1575_rate, 94 audio1575_sync, 95 audio1575_qlen 96 }; 97 98 /* 99 * interrupt handler 100 */ 101 static uint_t audio1575_intr(caddr_t, caddr_t); 102 103 /* 104 * Local Routine Prototypes 105 */ 106 static int audio1575_attach(dev_info_t *); 107 static int audio1575_resume(dev_info_t *); 108 static int audio1575_detach(dev_info_t *); 109 static int audio1575_suspend(dev_info_t *); 110 111 static int audio1575_alloc_port(audio1575_state_t *, int, uint8_t); 112 static void audio1575_free_port(audio1575_port_t *); 113 static void audio1575_start_port(audio1575_port_t *); 114 static void audio1575_stop_port(audio1575_port_t *); 115 static void audio1575_reset_port(audio1575_port_t *); 116 static void audio1575_update_port(audio1575_port_t *); 117 118 static int audio1575_setup_intr(audio1575_state_t *); 119 static int audio1575_codec_sync(audio1575_state_t *); 120 static void audio1575_write_ac97(void *, uint8_t, uint16_t); 121 static uint16_t audio1575_read_ac97(void *, uint8_t); 122 static int audio1575_chip_init(audio1575_state_t *); 123 static int audio1575_map_regs(audio1575_state_t *); 124 static void audio1575_unmap_regs(audio1575_state_t *); 125 static void audio1575_dma_stop(audio1575_state_t *, boolean_t); 126 static void audio1575_pci_enable(audio1575_state_t *); 127 static void audio1575_pci_disable(audio1575_state_t *); 128 129 static void audio1575_destroy(audio1575_state_t *); 130 131 /* 132 * Global variables, but used only by this file. 133 */ 134 135 /* 136 * DDI Structures 137 */ 138 139 140 /* Device operations structure */ 141 static struct dev_ops audio1575_dev_ops = { 142 DEVO_REV, /* devo_rev */ 143 0, /* devo_refcnt */ 144 NULL, /* devo_getinfo */ 145 nulldev, /* devo_identify - obsolete */ 146 nulldev, /* devo_probe */ 147 audio1575_ddi_attach, /* devo_attach */ 148 audio1575_ddi_detach, /* devo_detach */ 149 nodev, /* devo_reset */ 150 NULL, /* devi_cb_ops */ 151 NULL, /* devo_bus_ops */ 152 NULL, /* devo_power */ 153 audio1575_ddi_quiesce, /* devo_quiesce */ 154 }; 155 156 /* Linkage structure for loadable drivers */ 157 static struct modldrv audio1575_modldrv = { 158 &mod_driverops, /* drv_modops */ 159 M1575_MOD_NAME, /* drv_linkinfo */ 160 &audio1575_dev_ops, /* drv_dev_ops */ 161 }; 162 163 /* Module linkage structure */ 164 static struct modlinkage audio1575_modlinkage = { 165 MODREV_1, /* ml_rev */ 166 (void *)&audio1575_modldrv, /* ml_linkage */ 167 NULL /* NULL terminates the list */ 168 }; 169 170 171 /* 172 * device access attributes for register mapping 173 */ 174 static struct ddi_device_acc_attr dev_attr = { 175 DDI_DEVICE_ATTR_V0, 176 DDI_STRUCTURE_LE_ACC, 177 DDI_STRICTORDER_ACC 178 }; 179 180 static struct ddi_device_acc_attr buf_attr = { 181 DDI_DEVICE_ATTR_V0, 182 DDI_NEVERSWAP_ACC, 183 DDI_STRICTORDER_ACC 184 }; 185 186 /* 187 * DMA attributes of buffer descriptor list 188 */ 189 static ddi_dma_attr_t bdlist_dma_attr = { 190 DMA_ATTR_V0, /* version */ 191 0x0000000000000000LL, /* dlim_addr_lo */ 192 0x00000000ffffffffLL, /* dlim_addr_hi */ 193 0x000000000000ffffLL, /* DMA counter register - 64 bits */ 194 0x0000000000000008LL, /* DMA address align must be 8-bytes */ 195 0x0000003c, /* 1 through 64 byte burst sizes */ 196 0x00000008, /* min xfer DMA size BDList entry */ 197 0x00000000000ffffLL, /* max xfer size, 64K */ 198 0x000000000001fffLL, /* seg, set to PAGESIZE */ 199 0x00000001, /* s/g list length, no s/g */ 200 0x00000008, /* granularity of device minxfer */ 201 0 /* DMA flags use virtual address */ 202 }; 203 204 /* 205 * DMA attributes of buffers to be used to receive/send audio data 206 */ 207 static ddi_dma_attr_t sample_buf_dma_attr = { 208 DMA_ATTR_V0, 209 0x0000000000000000LL, /* dlim_addr_lo */ 210 0x00000000ffffffffLL, /* dlim_addr_hi */ 211 0x000000000001fffeLL, /* DMA counter register - 16 bits */ 212 0x0000000000000004LL, /* DMA address align 2-byte boundary */ 213 0x0000003c, /* 1 through 60 byte burst sizes */ 214 0x00000004, /* min xfer DMA size BDList entry */ 215 0x000000000001ffffLL, /* max xfer size, 64K */ 216 0x000000000001ffffLL, /* seg, set to 64K */ 217 0x00000001, /* s/g list length, no s/g */ 218 0x00000004, /* granularity of device minxfer */ 219 0 /* DMA flags use virtual address */ 220 }; 221 222 /* 223 * _init() 224 * 225 * Description: 226 * Driver initialization, called when driver is first loaded. 227 * This is how access is initially given to all the static structures. 228 * 229 * Arguments: 230 * None 231 * 232 * Returns: 233 * mod_install() status, see mod_install(9f) 234 */ 235 int 236 _init(void) 237 { 238 int error; 239 240 audio_init_ops(&audio1575_dev_ops, M1575_NAME); 241 242 if ((error = mod_install(&audio1575_modlinkage)) != 0) { 243 audio_fini_ops(&audio1575_dev_ops); 244 } 245 246 return (error); 247 } 248 249 /* 250 * _fini() 251 * 252 * Description: 253 * Module de-initialization, called when the driver is to be unloaded. 254 * 255 * Arguments: 256 * None 257 * 258 * Returns: 259 * mod_remove() status, see mod_remove(9f) 260 */ 261 int 262 _fini(void) 263 { 264 int error; 265 266 if ((error = mod_remove(&audio1575_modlinkage)) != 0) { 267 return (error); 268 } 269 270 /* clean up ops */ 271 audio_fini_ops(&audio1575_dev_ops); 272 273 return (0); 274 } 275 276 /* 277 * _info() 278 * 279 * Description: 280 * Module information, returns information about the driver. 281 * 282 * Arguments: 283 * modinfo *modinfop Pointer to the opaque modinfo structure 284 * 285 * Returns: 286 * mod_info() status, see mod_info(9f) 287 */ 288 int 289 _info(struct modinfo *modinfop) 290 { 291 return (mod_info(&audio1575_modlinkage, modinfop)); 292 } 293 294 295 /* ******************* Driver Entry Points ********************************* */ 296 297 /* 298 * audio1575_ddi_attach() 299 * 300 * Description: 301 * Implements the DDI attach(9e) entry point. 302 * 303 * Arguments: 304 * dev_info_t *dip Pointer to the device's dev_info struct 305 * ddi_attach_cmd_t cmd Attach command 306 * 307 * Returns: 308 * DDI_SUCCESS The driver was initialized properly 309 * DDI_FAILURE The driver couldn't be initialized properly 310 */ 311 static int 312 audio1575_ddi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 313 { 314 switch (cmd) { 315 case DDI_ATTACH: 316 return (audio1575_attach(dip)); 317 318 case DDI_RESUME: 319 return (audio1575_resume(dip)); 320 } 321 return (DDI_FAILURE); 322 } 323 324 /* 325 * audio1575_ddi_detach() 326 * 327 * Description: 328 * Implements the detach(9e) entry point. 329 * 330 * Arguments: 331 * dev_info_t *dip Pointer to the device's dev_info struct 332 * ddi_detach_cmd_t cmd Detach command 333 * 334 * Returns: 335 * DDI_SUCCESS The driver was detached 336 * DDI_FAILURE The driver couldn't be detached 337 */ 338 static int 339 audio1575_ddi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 340 { 341 switch (cmd) { 342 case DDI_DETACH: 343 return (audio1575_detach(dip)); 344 345 case DDI_SUSPEND: 346 return (audio1575_suspend(dip)); 347 } 348 return (DDI_FAILURE); 349 } 350 351 /* 352 * audio1575_ddi_quiesce() 353 * 354 * Description: 355 * Implements the quiesce(9e) entry point. 356 * 357 * Arguments: 358 * dev_info_t *dip Pointer to the device's dev_info struct 359 * 360 * Returns: 361 * DDI_SUCCESS The driver was quiesced 362 * DDI_FAILURE The driver couldn't be quiesced 363 */ 364 static int 365 audio1575_ddi_quiesce(dev_info_t *dip) 366 { 367 audio1575_state_t *statep; 368 369 if ((statep = ddi_get_driver_private(dip)) == NULL) 370 return (DDI_FAILURE); 371 372 audio1575_dma_stop(statep, B_TRUE); 373 return (DDI_SUCCESS); 374 } 375 376 377 /* 378 * audio1575_intr() 379 * 380 * Description: 381 * Interrupt service routine for both play and record. For play we 382 * get the next buffers worth of audio. For record we send it on to 383 * the mixer. 384 * 385 * Each of buffer descriptor has a field IOC(interrupt on completion) 386 * When both this and the IOC bit of correspondent dma control register 387 * is set, it means that the controller should issue an interrupt upon 388 * completion of this buffer. Note that in the clearing of the interrupts 389 * below that the PCM IN and PCM out interrupts ar cleared by their 390 * respective control registers and not by writing a '1' to the INTRSR 391 * the interrupt status register. Only CPRINTR,SPINTR,and GPIOINTR 392 * require a '1' written to the INTRSR register to clear those 393 * interrupts. See comments below. 394 * 395 * Arguments: 396 * caddr_t arg Pointer to the interrupting device's state 397 * structure 398 * 399 * Returns: 400 * DDI_INTR_CLAIMED Interrupt claimed and processed 401 * DDI_INTR_UNCLAIMED Interrupt not claimed, and thus ignored 402 */ 403 static uint_t 404 audio1575_intr(caddr_t arg, caddr_t dontcare) 405 { 406 audio1575_state_t *statep = (void *)arg; 407 uint32_t intrsr; 408 uint8_t index; 409 audio1575_port_t *consume = NULL; 410 audio1575_port_t *produce = NULL; 411 412 _NOTE(ARGUNUSED(dontcare)); 413 414 mutex_enter(&statep->lock); 415 416 intrsr = GET32(M1575_INTRSR_REG); 417 418 /* check if device is interrupting */ 419 if (intrsr == 0) { 420 if (statep->ksp) { 421 /* increment the spurious ino5 interrupt cnt */ 422 M1575_KIOP(statep)->intrs[KSTAT_INTR_SPURIOUS]++; 423 } 424 425 mutex_exit(&statep->lock); 426 return (DDI_INTR_UNCLAIMED); 427 } 428 429 /* update the kernel interrupt statistics */ 430 if (statep->ksp) { 431 M1575_KIOP(statep)->intrs[KSTAT_INTR_HARD]++; 432 } 433 434 /* 435 * The Uli M1575 generates an interrupt for each interrupt 436 * type. therefore we only process one interrupt type 437 * per invocation of the audio1575_intr() routine. 438 * WARNING: DO NOT attempt to optimize this by looping 439 * until the INTRSR register is clear as this will 440 * generate spurious ino5 interrupts. 441 */ 442 if (GET16(M1575_PCMISR_REG) & M1575_PCMISR_BCIS) { 443 /* Clear PCM IN interrupt */ 444 PUT16(M1575_PCMISR_REG, M1575_SR_CLR); 445 /* 446 * Note: This interrupt is not cleared by writing a '1' 447 * to the M1575_INTRSR_REG according to the M1575 Super I/O 448 * data sheet on page 189. 449 */ 450 451 /* update the LVI -- we just set it to the current value - 1 */ 452 index = GET8(M1575_PCMICIV_REG); 453 index = (index - 1) % M1575_BD_NUMS; 454 PUT8(M1575_PCMILVIV_REG, index); 455 produce = statep->ports[M1575_REC]; 456 457 } else if (GET16(M1575_PCMOSR_REG) & M1575_PCMOSR_BCIS) { 458 /* Clear PCM OUT interrupt */ 459 PUT16(M1575_PCMOSR_REG, M1575_SR_CLR); 460 /* 461 * Note: This interrupt is not cleared by writing a '1' 462 * to the M1575_INTRSR_REG according to the M1575 Super I/O 463 * data sheet on page 189. 464 */ 465 466 /* update the LVI -- we just set it to the current value - 1 */ 467 index = GET8(M1575_PCMOCIV_REG); 468 index = (index - 1) % M1575_BD_NUMS; 469 PUT8(M1575_PCMOLVIV_REG, index); 470 consume = statep->ports[M1575_PLAY]; 471 472 } else { 473 /* Clear other interrupts (there should not be any) */ 474 PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK)); 475 } 476 477 mutex_exit(&statep->lock); 478 479 if (produce) { 480 audio_engine_produce(produce->engine); 481 } 482 if (consume) { 483 audio_engine_consume(consume->engine); 484 } 485 486 return (DDI_INTR_CLAIMED); 487 } 488 489 /* 490 * audio1575_open() 491 * 492 * Description: 493 * Opens a DMA engine for use. 494 * 495 * Arguments: 496 * void *arg The DMA engine to set up 497 * int flag Open flags 498 * unsigned *fragfrp Receives number of frames per fragment 499 * unsigned *nfragsp Receives number of fragments 500 * caddr_t *bufp Receives kernel data buffer 501 * 502 * Returns: 503 * 0 on success 504 * errno on failure 505 */ 506 static int 507 audio1575_open(void *arg, int flag, 508 unsigned *fragfrp, unsigned *nfragsp, caddr_t *bufp) 509 { 510 audio1575_port_t *port = arg; 511 512 _NOTE(ARGUNUSED(flag)); 513 514 port->started = B_FALSE; 515 port->count = 0; 516 *fragfrp = port->fragfr; 517 *nfragsp = M1575_BD_NUMS; 518 *bufp = port->samp_kaddr; 519 520 mutex_enter(&port->statep->lock); 521 audio1575_reset_port(port); 522 mutex_exit(&port->statep->lock); 523 524 return (0); 525 } 526 527 528 /* 529 * audio1575_close() 530 * 531 * Description: 532 * Closes an audio DMA engine that was previously opened. Since 533 * nobody is using it, we take this opportunity to possibly power 534 * down the entire device. 535 * 536 * Arguments: 537 * void *arg The DMA engine to shut down 538 */ 539 static void 540 audio1575_close(void *arg) 541 { 542 audio1575_port_t *port = arg; 543 audio1575_state_t *statep = port->statep; 544 545 mutex_enter(&statep->lock); 546 audio1575_stop_port(port); 547 port->started = B_FALSE; 548 mutex_exit(&statep->lock); 549 } 550 551 /* 552 * audio1575_stop() 553 * 554 * Description: 555 * This is called by the framework to stop a port that is 556 * transferring data. 557 * 558 * Arguments: 559 * void *arg The DMA engine to stop 560 */ 561 static void 562 audio1575_stop(void *arg) 563 { 564 audio1575_port_t *port = arg; 565 audio1575_state_t *statep = port->statep; 566 567 mutex_enter(&statep->lock); 568 if (port->started) { 569 audio1575_stop_port(port); 570 } 571 port->started = B_FALSE; 572 mutex_exit(&statep->lock); 573 } 574 575 /* 576 * audio1575_start() 577 * 578 * Description: 579 * This is called by the framework to start a port transferring data. 580 * 581 * Arguments: 582 * void *arg The DMA engine to start 583 * 584 * Returns: 585 * 0 on success (never fails, errno if it did) 586 */ 587 static int 588 audio1575_start(void *arg) 589 { 590 audio1575_port_t *port = arg; 591 audio1575_state_t *statep = port->statep; 592 593 mutex_enter(&statep->lock); 594 if (!port->started) { 595 audio1575_start_port(port); 596 port->started = B_TRUE; 597 } 598 mutex_exit(&statep->lock); 599 return (0); 600 } 601 602 /* 603 * audio1575_format() 604 * 605 * Description: 606 * Called by the framework to query the format for the device. 607 * 608 * Arguments: 609 * void *arg The DMA engine to query 610 * 611 * Returns: 612 * AUDIO_FORMAT_S16_LE 613 */ 614 static int 615 audio1575_format(void *arg) 616 { 617 _NOTE(ARGUNUSED(arg)); 618 619 return (AUDIO_FORMAT_S16_LE); 620 } 621 622 /* 623 * audio1575_channels() 624 * 625 * Description: 626 * Called by the framework to query the channels for the device. 627 * 628 * Arguments: 629 * void *arg The DMA engine to query 630 * 631 * Returns: 632 * Number of channels for the device 633 */ 634 static int 635 audio1575_channels(void *arg) 636 { 637 audio1575_port_t *port = arg; 638 639 return (port->nchan); 640 } 641 642 /* 643 * audio1575_rate() 644 * 645 * Description: 646 * Called by the framework to query the sample rate for the device. 647 * 648 * Arguments: 649 * void *arg The DMA engine to query 650 * 651 * Returns: 652 * 48000 653 */ 654 static int 655 audio1575_rate(void *arg) 656 { 657 _NOTE(ARGUNUSED(arg)); 658 659 return (48000); 660 } 661 662 /* 663 * audio1575_count() 664 * 665 * Description: 666 * This is called by the framework to get the engine's frame counter 667 * 668 * Arguments: 669 * void *arg The DMA engine to query 670 * 671 * Returns: 672 * frame count for current engine 673 */ 674 static uint64_t 675 audio1575_count(void *arg) 676 { 677 audio1575_port_t *port = arg; 678 audio1575_state_t *statep = port->statep; 679 uint64_t val; 680 681 mutex_enter(&statep->lock); 682 audio1575_update_port(port); 683 val = port->count + (port->picb / port->nchan); 684 mutex_exit(&statep->lock); 685 686 return (val); 687 } 688 689 /* 690 * audio1575_sync() 691 * 692 * Description: 693 * This is called by the framework to synchronize DMA caches. 694 * 695 * Arguments: 696 * void *arg The DMA engine to sync 697 */ 698 static void 699 audio1575_sync(void *arg, unsigned nframes) 700 { 701 audio1575_port_t *port = arg; 702 _NOTE(ARGUNUSED(nframes)); 703 704 (void) ddi_dma_sync(port->samp_dmah, 0, 0, port->sync_dir); 705 } 706 707 /* 708 * audio1575_qlen() 709 * 710 * Description: 711 * This is called by the framework to determine on-device queue length. 712 * 713 * Arguments: 714 * void *arg The DMA engine to query 715 * 716 * Returns: 717 * hardware queue length not reported by count (0 for this device) 718 */ 719 static size_t 720 audio1575_qlen(void *arg) 721 { 722 _NOTE(ARGUNUSED(arg)); 723 return (0); 724 } 725 726 727 /* 728 * audio1575_start_port() 729 * 730 * Description: 731 * This routine starts the DMA engine. 732 * 733 * Arguments: 734 * audio1575_port_t *port Port of DMA engine to start. 735 */ 736 static void 737 audio1575_start_port(audio1575_port_t *port) 738 { 739 audio1575_state_t *statep = port->statep; 740 741 ASSERT(mutex_owned(&statep->lock)); 742 743 /* if suspended, then do nothing else */ 744 if (statep->suspended) { 745 return; 746 } 747 748 if (port->num == M1575_REC) { 749 /* ULi says do fifo resets here */ 750 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMIRST); 751 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE); 752 PUT8(M1575_PCMICR_REG, M1575_PCMICR_IOCE); 753 SET32(M1575_DMACR_REG, M1575_DMACR_PCMISTART); 754 } else { 755 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE); 756 PUT8(M1575_PCMOCR_REG, M1575_PCMOCR_IOCE); 757 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOSTART); 758 } 759 } 760 761 /* 762 * audio1575_stop_port() 763 * 764 * Description: 765 * This routine stops the DMA engine. 766 * 767 * Arguments: 768 * audio1575_port_t *port Port of DMA engine to stop. 769 */ 770 static void 771 audio1575_stop_port(audio1575_port_t *port) 772 { 773 audio1575_state_t *statep = port->statep; 774 775 ASSERT(mutex_owned(&statep->lock)); 776 777 /* if suspended, then do nothing else */ 778 if (statep->suspended) { 779 return; 780 } 781 782 if (port->num == M1575_REC) { 783 SET32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE); 784 } else { 785 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE); 786 } 787 } 788 789 /* 790 * audio1575_reset_port() 791 * 792 * Description: 793 * This routine resets the DMA engine pareparing it for work. 794 * 795 * Arguments: 796 * audio1575_port_t *port Port of DMA engine to reset. 797 */ 798 static void 799 audio1575_reset_port(audio1575_port_t *port) 800 { 801 audio1575_state_t *statep = port->statep; 802 803 ASSERT(mutex_owned(&statep->lock)); 804 805 port->civ = 0; 806 port->picb = 0; 807 808 if (statep->suspended) 809 return; 810 811 if (port->num == M1575_REC) { 812 /* Uli FIFO madness ... */ 813 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMIRST); 814 SET32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE); 815 816 PUT8(M1575_PCMICR_REG, 0); 817 PUT8(M1575_PCMICR_REG, M1575_CR_RR | M1575_CR_IOCE); 818 819 PUT32(M1575_PCMIBDBAR_REG, port->bdl_paddr); 820 PUT8(M1575_PCMILVIV_REG, M1575_BD_NUMS - 1); 821 822 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE); 823 824 } else { 825 826 uint32_t scr; 827 828 /* Uli FIFO madness ... */ 829 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMORST); 830 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE); 831 832 /* configure the number of channels properly */ 833 scr = GET32(M1575_SCR_REG); 834 scr &= ~(M1575_SCR_6CHL_MASK | M1575_SCR_CHAMOD_MASK); 835 scr |= M1575_SCR_6CHL_2; /* select our proper ordering */ 836 switch (port->nchan) { 837 case 2: 838 scr |= M1575_SCR_CHAMOD_2; 839 break; 840 case 4: 841 scr |= M1575_SCR_CHAMOD_4; 842 break; 843 case 6: 844 scr |= M1575_SCR_CHAMOD_6; 845 break; 846 } 847 PUT32(M1575_SCR_REG, scr); 848 849 PUT8(M1575_PCMOCR_REG, 0); 850 PUT8(M1575_PCMOCR_REG, M1575_CR_RR | M1575_CR_IOCE); 851 852 PUT32(M1575_PCMOBDBAR_REG, port->bdl_paddr); 853 PUT8(M1575_PCMOLVIV_REG, M1575_BD_NUMS - 1); 854 855 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE); 856 } 857 } 858 859 /* 860 * audio1575_update_port() 861 * 862 * Description: 863 * This routine updates the ports frame counter from hardware, and 864 * gracefully handles wraps. 865 * 866 * Arguments: 867 * audio1575_port_t *port The port to update. 868 */ 869 static void 870 audio1575_update_port(audio1575_port_t *port) 871 { 872 audio1575_state_t *statep = port->statep; 873 uint8_t civ; 874 uint16_t picb; 875 unsigned n; 876 int civoff; 877 int picoff; 878 879 if (port->num == M1575_REC) { 880 civoff = M1575_PCMICIV_REG; 881 picoff = M1575_PCMIPICB_REG; 882 } else { 883 civoff = M1575_PCMOCIV_REG; 884 picoff = M1575_PCMOPICB_REG; 885 } 886 887 if (statep->suspended) { 888 civ = 0; 889 picb = 0; 890 } else { 891 /* 892 * We read the position counters, but we're careful to avoid 893 * the situation where the position counter resets at the end 894 * of a buffer. 895 */ 896 for (int i = 0; i < 2; i++) { 897 civ = GET8(civoff); 898 picb = GET16(picoff); 899 if (GET8(civoff) == civ) { 900 /* 901 * Chip did not start a new index, so 902 * the picb is valid. 903 */ 904 break; 905 } 906 } 907 if (civ >= port->civ) { 908 n = civ - port->civ; 909 } else { 910 n = civ + (M1575_BD_NUMS - port->civ); 911 } 912 port->count += (n * port->fragfr); 913 } 914 port->civ = civ; 915 port->picb = picb; 916 } 917 918 /* 919 * audio1575_attach() 920 * 921 * Description: 922 * Attach an instance of the audio1575 driver. This routine does the 923 * device dependent attach tasks. When it is completed, it registers 924 * with the audio framework. 925 * 926 * Arguments: 927 * dev_info_t *dip Pointer to the device's dev_info struct 928 * 929 * Returns: 930 * DDI_SUCCESS The driver was initialized properly 931 * DDI_FAILURE The driver couldn't be initialized properly 932 */ 933 static int 934 audio1575_attach(dev_info_t *dip) 935 { 936 audio1575_state_t *statep; 937 audio_dev_t *adev; 938 uint32_t devid; 939 const char *name; 940 const char *rev; 941 int maxch; 942 943 /* allocate the soft state structure */ 944 statep = kmem_zalloc(sizeof (*statep), KM_SLEEP); 945 ddi_set_driver_private(dip, statep); 946 statep->dip = dip; 947 948 /* 949 * We want the micboost enabled by default as well. 950 */ 951 (void) ddi_prop_update_int(DDI_DEV_T_NONE, dip, AC97_PROP_MICBOOST, 1); 952 953 /* allocate common audio dev structure */ 954 adev = audio_dev_alloc(dip, 0); 955 if (adev == NULL) { 956 audio_dev_warn(NULL, "unable to allocate audio dev"); 957 goto error; 958 } 959 statep->adev = adev; 960 961 /* map in the audio registers */ 962 if (audio1575_map_regs(statep) != DDI_SUCCESS) { 963 audio_dev_warn(adev, "couldn't map registers"); 964 goto error; 965 } 966 967 if (audio1575_setup_intr(statep) != DDI_SUCCESS) { 968 /* message already noted */ 969 goto error; 970 } 971 972 /* Enable PCI I/O and Memory Spaces */ 973 audio1575_pci_enable(statep); 974 975 devid = (pci_config_get16(statep->pcih, PCI_CONF_VENID) << 16) | 976 pci_config_get16(statep->pcih, PCI_CONF_DEVID); 977 switch (devid) { 978 case 0x10b95455: 979 name = "Uli M1575 AC'97"; 980 rev = "M5455"; 981 break; 982 default: 983 name = "Uli AC'97"; 984 rev = "Unknown"; 985 break; 986 } 987 /* set device information -- this should check PCI config space */ 988 audio_dev_set_description(adev, name); 989 audio_dev_set_version(adev, rev); 990 991 statep->ac97 = ac97_alloc(dip, audio1575_read_ac97, 992 audio1575_write_ac97, statep); 993 ASSERT(statep->ac97 != NULL); 994 995 /* 996 * Override "max-channels" property to prevent configuration 997 * of 4 or 6 (or possibly even 8!) channel audio. The default 998 * is to support as many channels as the hardware can do. 999 */ 1000 maxch = ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 1001 "max-channels", ac97_num_channels(statep->ac97)); 1002 if (maxch < 2) { 1003 maxch = 2; 1004 } 1005 1006 statep->maxch = min(maxch, 6) & ~1; 1007 1008 /* allocate port structures */ 1009 if ((audio1575_alloc_port(statep, M1575_PLAY, statep->maxch) != 1010 DDI_SUCCESS) || 1011 (audio1575_alloc_port(statep, M1575_REC, 2) != DDI_SUCCESS)) { 1012 goto error; 1013 } 1014 1015 if (audio1575_chip_init(statep) != DDI_SUCCESS) { 1016 audio_dev_warn(adev, "failed to init chip"); 1017 goto error; 1018 } 1019 1020 if (ac97_init(statep->ac97, adev) != DDI_SUCCESS) { 1021 audio_dev_warn(adev, "ac'97 initialization failed"); 1022 goto error; 1023 } 1024 1025 /* set up kernel statistics */ 1026 if ((statep->ksp = kstat_create(M1575_NAME, 1027 ddi_get_instance(dip), M1575_NAME, "controller", 1028 KSTAT_TYPE_INTR, 1, KSTAT_FLAG_PERSISTENT)) != NULL) { 1029 kstat_install(statep->ksp); 1030 } 1031 1032 /* Enable PCI Interrupts */ 1033 pci_config_put8(statep->pcih, M1575_PCIMISC_REG, M1575_PCIMISC_INTENB); 1034 1035 /* enable audio interrupts */ 1036 if (ddi_intr_enable(statep->ih) != DDI_SUCCESS) { 1037 audio_dev_warn(adev, "ddi_intr_enable() failure"); 1038 goto error; 1039 } 1040 1041 /* register with the framework */ 1042 if (audio_dev_register(adev) != DDI_SUCCESS) { 1043 audio_dev_warn(adev, "unable to register with framework"); 1044 goto error; 1045 } 1046 1047 /* everything worked out, so report the device */ 1048 ddi_report_dev(dip); 1049 1050 return (DDI_SUCCESS); 1051 1052 error: 1053 audio1575_destroy(statep); 1054 return (DDI_FAILURE); 1055 } 1056 1057 /* 1058 * audio1575_detach() 1059 * 1060 * Description: 1061 * Detach an instance of the audio1575 driver. 1062 * 1063 * Arguments: 1064 * dev_info_t *dip Pointer to the device's dev_info struct 1065 * 1066 * Returns: 1067 * DDI_SUCCESS The driver was detached 1068 * DDI_FAILURE The driver couldn't be detached 1069 */ 1070 static int 1071 audio1575_detach(dev_info_t *dip) 1072 { 1073 audio1575_state_t *statep; 1074 1075 statep = ddi_get_driver_private(dip); 1076 1077 if (audio_dev_unregister(statep->adev) != DDI_SUCCESS) { 1078 return (DDI_FAILURE); 1079 } 1080 1081 audio1575_destroy(statep); 1082 return (DDI_SUCCESS); 1083 } 1084 1085 /* *********************** Local Routines *************************** */ 1086 1087 /* 1088 * audio1575_setup_intr() 1089 * 1090 * Description: 1091 * This routine initializes the audio driver's interrupt handle and 1092 * mutex. 1093 * 1094 * Arguments: 1095 * audio1575_state_t *state The device's state structure 1096 * 1097 * Returns: 1098 * DDI_SUCCESS Interrupt handle & mutex initialized 1099 * DDI_FAILURE Interrupt handle & mutex not initialized 1100 */ 1101 int 1102 audio1575_setup_intr(audio1575_state_t *statep) 1103 { 1104 audio_dev_t *adev; 1105 dev_info_t *dip; 1106 uint_t ipri; 1107 int actual; 1108 int rv; 1109 int itype; 1110 int count; 1111 ddi_intr_handle_t ih = NULL; 1112 1113 dip = statep->dip; 1114 adev = statep->adev; 1115 1116 /* get supported interrupt types */ 1117 rv = ddi_intr_get_supported_types(dip, &itype); 1118 if ((rv != DDI_SUCCESS) || (!(itype & DDI_INTR_TYPE_FIXED))) { 1119 audio_dev_warn(adev, "Fixed type interrupts not supported"); 1120 return (DDI_FAILURE); 1121 } 1122 1123 /* make sure we only have one fixed type interrupt */ 1124 rv = ddi_intr_get_nintrs(dip, DDI_INTR_TYPE_FIXED, &count); 1125 if ((rv != DDI_SUCCESS) || (count != 1)) { 1126 audio_dev_warn(adev, "No fixed interrupts"); 1127 return (DDI_FAILURE); 1128 } 1129 1130 rv = ddi_intr_alloc(statep->dip, &ih, DDI_INTR_TYPE_FIXED, 1131 0, 1, &actual, DDI_INTR_ALLOC_STRICT); 1132 if ((rv != DDI_SUCCESS) || (actual != 1)) { 1133 audio_dev_warn(adev, "Can't alloc interrupt handle"); 1134 return (DDI_FAILURE); 1135 } 1136 1137 /* test for a high level interrupt */ 1138 if (ddi_intr_get_pri(ih, &ipri) != DDI_SUCCESS) { 1139 audio_dev_warn(adev, "Can't get interrupt priority"); 1140 (void) ddi_intr_free(ih); 1141 return (DDI_FAILURE); 1142 } 1143 if (ipri >= ddi_intr_get_hilevel_pri()) { 1144 audio_dev_warn(adev, "Unsupported high level interrupt"); 1145 (void) ddi_intr_free(ih); 1146 return (DDI_FAILURE); 1147 } 1148 1149 if (ddi_intr_add_handler(ih, audio1575_intr, statep, NULL) != 1150 DDI_SUCCESS) { 1151 audio_dev_warn(adev, "Can't add interrupt handler"); 1152 (void) ddi_intr_free(ih); 1153 return (DDI_FAILURE); 1154 } 1155 1156 statep->ih = ih; 1157 mutex_init(&statep->lock, NULL, MUTEX_DRIVER, DDI_INTR_PRI(ipri)); 1158 mutex_init(&statep->ac_lock, NULL, MUTEX_DRIVER, DDI_INTR_PRI(ipri)); 1159 1160 return (DDI_SUCCESS); 1161 } 1162 1163 /* 1164 * audio1575_alloc_port() 1165 * 1166 * Description: 1167 * This routine allocates the DMA handles and the memory for the 1168 * DMA engines to use. It also configures the BDL lists properly 1169 * for use. 1170 * 1171 * Arguments: 1172 * dev_info_t *dip Pointer to the device's devinfo 1173 * int num M1575_PLAY or M1575_REC 1174 * uint8_t nchan Number of channels (2 = stereo, 6 = 5.1, etc.) 1175 * 1176 * Returns: 1177 * DDI_SUCCESS Registers successfully mapped 1178 * DDI_FAILURE Registers not successfully mapped 1179 */ 1180 static int 1181 audio1575_alloc_port(audio1575_state_t *statep, int num, uint8_t nchan) 1182 { 1183 ddi_dma_cookie_t cookie; 1184 uint_t count; 1185 int dir; 1186 unsigned caps; 1187 char *prop; 1188 audio_dev_t *adev; 1189 audio1575_port_t *port; 1190 uint32_t *kaddr; 1191 uint32_t paddr; 1192 int rc; 1193 dev_info_t *dip; 1194 1195 adev = statep->adev; 1196 dip = statep->dip; 1197 1198 port = kmem_zalloc(sizeof (*port), KM_SLEEP); 1199 statep->ports[num] = port; 1200 port->num = num; 1201 port->statep = statep; 1202 port->started = B_FALSE; 1203 port->nchan = nchan; 1204 1205 if (num == M1575_REC) { 1206 prop = "record-interrupts"; 1207 dir = DDI_DMA_READ; 1208 caps = ENGINE_INPUT_CAP; 1209 port->sync_dir = DDI_DMA_SYNC_FORKERNEL; 1210 } else { 1211 prop = "play-interrupts"; 1212 dir = DDI_DMA_WRITE; 1213 caps = ENGINE_OUTPUT_CAP; 1214 port->sync_dir = DDI_DMA_SYNC_FORDEV; 1215 } 1216 1217 port->intrs = ddi_prop_get_int(DDI_DEV_T_ANY, dip, 1218 DDI_PROP_DONTPASS, prop, M1575_INTS); 1219 1220 /* make sure the values are good */ 1221 if (port->intrs < M1575_MIN_INTS) { 1222 audio_dev_warn(adev, "%s too low, %d, resetting to %d", 1223 prop, port->intrs, M1575_INTS); 1224 port->intrs = M1575_INTS; 1225 } else if (port->intrs > M1575_MAX_INTS) { 1226 audio_dev_warn(adev, "%s too high, %d, resetting to %d", 1227 prop, port->intrs, M1575_INTS); 1228 port->intrs = M1575_INTS; 1229 } 1230 1231 /* 1232 * Figure out how much space we need. Sample rate is 48kHz, and 1233 * we need to store 32 chunks. (Note that this means that low 1234 * interrupt frequencies will require more RAM. We could probably 1235 * do some cleverness to use a shorter BD list.) 1236 */ 1237 port->fragfr = 48000 / port->intrs; 1238 port->fragfr = M1575_ROUNDUP(port->fragfr, M1575_MOD_SIZE); 1239 port->samp_size = port->fragfr * port->nchan * 2; 1240 port->samp_size *= M1575_BD_NUMS; 1241 1242 /* allocate dma handle */ 1243 rc = ddi_dma_alloc_handle(dip, &sample_buf_dma_attr, DDI_DMA_SLEEP, 1244 NULL, &port->samp_dmah); 1245 if (rc != DDI_SUCCESS) { 1246 audio_dev_warn(adev, "ddi_dma_alloc_handle failed: %d", rc); 1247 return (DDI_FAILURE); 1248 } 1249 /* allocate DMA buffer */ 1250 rc = ddi_dma_mem_alloc(port->samp_dmah, port->samp_size, &buf_attr, 1251 DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, &port->samp_kaddr, 1252 &port->samp_size, &port->samp_acch); 1253 if (rc == DDI_FAILURE) { 1254 audio_dev_warn(adev, "dma_mem_alloc failed"); 1255 return (DDI_FAILURE); 1256 } 1257 1258 /* bind DMA buffer */ 1259 rc = ddi_dma_addr_bind_handle(port->samp_dmah, NULL, 1260 port->samp_kaddr, port->samp_size, dir|DDI_DMA_CONSISTENT, 1261 DDI_DMA_SLEEP, NULL, &cookie, &count); 1262 if ((rc != DDI_DMA_MAPPED) || (count != 1)) { 1263 audio_dev_warn(adev, 1264 "ddi_dma_addr_bind_handle failed: %d", rc); 1265 return (DDI_FAILURE); 1266 } 1267 port->samp_paddr = cookie.dmac_address; 1268 1269 /* 1270 * now, from here we allocate DMA memory for buffer descriptor list. 1271 * we allocate adjacent DMA memory for all DMA engines. 1272 */ 1273 rc = ddi_dma_alloc_handle(dip, &bdlist_dma_attr, DDI_DMA_SLEEP, 1274 NULL, &port->bdl_dmah); 1275 if (rc != DDI_SUCCESS) { 1276 audio_dev_warn(adev, "ddi_dma_alloc_handle(bdlist) failed"); 1277 return (DDI_FAILURE); 1278 } 1279 1280 /* 1281 * we allocate all buffer descriptors lists in continuous dma memory. 1282 */ 1283 port->bdl_size = sizeof (m1575_bd_entry_t) * M1575_BD_NUMS; 1284 rc = ddi_dma_mem_alloc(port->bdl_dmah, port->bdl_size, 1285 &dev_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, 1286 &port->bdl_kaddr, &port->bdl_size, &port->bdl_acch); 1287 if (rc != DDI_SUCCESS) { 1288 audio_dev_warn(adev, "ddi_dma_mem_alloc(bdlist) failed"); 1289 return (DDI_FAILURE); 1290 } 1291 1292 /* 1293 * Wire up the BD list. We do this *before* binding the BD list 1294 * so that we don't have to do an extra ddi_dma_sync. 1295 */ 1296 paddr = port->samp_paddr; 1297 kaddr = (void *)port->bdl_kaddr; 1298 for (int i = 0; i < M1575_BD_NUMS; i++) { 1299 1300 /* set base address of buffer */ 1301 ddi_put32(port->bdl_acch, kaddr, paddr); 1302 kaddr++; 1303 1304 /* set size in frames, and enable IOC interrupt */ 1305 ddi_put32(port->bdl_acch, kaddr, 1306 ((port->fragfr * port->nchan) | (1U << 31))); 1307 kaddr++; 1308 1309 paddr += (port->fragfr * port->nchan * 2); 1310 } 1311 1312 rc = ddi_dma_addr_bind_handle(port->bdl_dmah, NULL, port->bdl_kaddr, 1313 port->bdl_size, DDI_DMA_WRITE|DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, 1314 NULL, &cookie, &count); 1315 if ((rc != DDI_DMA_MAPPED) || (count != 1)) { 1316 audio_dev_warn(adev, "addr_bind_handle failed"); 1317 return (DDI_FAILURE); 1318 } 1319 port->bdl_paddr = cookie.dmac_address; 1320 1321 port->engine = audio_engine_alloc(&audio1575_engine_ops, caps); 1322 if (port->engine == NULL) { 1323 audio_dev_warn(adev, "audio_engine_alloc failed"); 1324 return (DDI_FAILURE); 1325 } 1326 1327 audio_engine_set_private(port->engine, port); 1328 audio_dev_add_engine(adev, port->engine); 1329 1330 return (DDI_SUCCESS); 1331 } 1332 1333 /* 1334 * audio1575_free_port() 1335 * 1336 * Description: 1337 * This routine unbinds the DMA cookies, frees the DMA buffers, 1338 * deallocates the DMA handles. 1339 * 1340 * Arguments: 1341 * audio810_port_t *port The port structure for a DMA engine. 1342 */ 1343 static void 1344 audio1575_free_port(audio1575_port_t *port) 1345 { 1346 if (port == NULL) 1347 return; 1348 1349 if (port->engine) { 1350 audio_dev_remove_engine(port->statep->adev, port->engine); 1351 audio_engine_free(port->engine); 1352 } 1353 if (port->bdl_paddr) { 1354 (void) ddi_dma_unbind_handle(port->bdl_dmah); 1355 } 1356 if (port->bdl_acch) { 1357 ddi_dma_mem_free(&port->bdl_acch); 1358 } 1359 if (port->bdl_dmah) { 1360 ddi_dma_free_handle(&port->bdl_dmah); 1361 } 1362 if (port->samp_paddr) { 1363 (void) ddi_dma_unbind_handle(port->samp_dmah); 1364 } 1365 if (port->samp_acch) { 1366 ddi_dma_mem_free(&port->samp_acch); 1367 } 1368 if (port->samp_dmah) { 1369 ddi_dma_free_handle(&port->samp_dmah); 1370 } 1371 kmem_free(port, sizeof (*port)); 1372 } 1373 1374 /* 1375 * audio1575_map_regs() 1376 * 1377 * Description: 1378 * The registers are mapped in. 1379 * 1380 * Arguments: 1381 * dev_info_t *dip Pointer to the device's devinfo 1382 * 1383 * Returns: 1384 * DDI_SUCCESS Registers successfully mapped 1385 * DDI_FAILURE Registers not successfully mapped 1386 */ 1387 static int 1388 audio1575_map_regs(audio1575_state_t *statep) 1389 { 1390 dev_info_t *dip = statep->dip; 1391 1392 /* Check for fault management capabilities */ 1393 if (DDI_FM_ACC_ERR_CAP(ddi_fm_capable(dip))) { 1394 dev_attr.devacc_attr_access = DDI_FLAGERR_ACC; 1395 } 1396 1397 /* map the M1575 Audio PCI Cfg Space */ 1398 if (pci_config_setup(dip, &statep->pcih) != DDI_SUCCESS) { 1399 audio_dev_warn(statep->adev, "PCI config map failure"); 1400 goto error; 1401 } 1402 1403 /* map the M1575 Audio registers in PCI IO Space */ 1404 if ((ddi_regs_map_setup(dip, M1575_AUDIO_IO_SPACE, &statep->regsp, 1405 0, 0, &dev_attr, &statep->regsh)) != DDI_SUCCESS) { 1406 audio_dev_warn(statep->adev, "Audio IO mapping failure"); 1407 goto error; 1408 } 1409 return (DDI_SUCCESS); 1410 1411 error: 1412 audio1575_unmap_regs(statep); 1413 1414 return (DDI_FAILURE); 1415 } 1416 1417 /* 1418 * audio1575_unmap_regs() 1419 * 1420 * Description: 1421 * This routine unmaps control registers. 1422 * 1423 * Arguments: 1424 * audio1575_state_t *state The device's state structure 1425 */ 1426 static void 1427 audio1575_unmap_regs(audio1575_state_t *statep) 1428 { 1429 if (statep->regsh) { 1430 ddi_regs_map_free(&statep->regsh); 1431 } 1432 1433 if (statep->pcih) { 1434 pci_config_teardown(&statep->pcih); 1435 } 1436 } 1437 1438 /* 1439 * audio1575_chip_init() 1440 * 1441 * Description: 1442 * This routine initializes the M1575 AC97 audio controller and the AC97 1443 * codec. The AC97 codec registers are programmed from codec_shadow[]. 1444 * If we are not doing a restore, we initialize codec_shadow[], otherwise 1445 * we use the current values of shadow. This routine expects that the 1446 * PCI IO and Memory spaces have been mapped and enabled already. 1447 * Arguments: 1448 * audio1575_state_t *state The device's state structure 1449 * restore from codec_shadow[] 1450 * Returns: 1451 * DDI_SUCCESS The hardware was initialized properly 1452 * DDI_FAILURE The hardware couldn't be initialized properly 1453 */ 1454 static int 1455 audio1575_chip_init(audio1575_state_t *statep) 1456 { 1457 uint32_t ssr; 1458 uint32_t rtsr; 1459 uint32_t intrsr; 1460 int i; 1461 int j; 1462 #ifdef __sparc 1463 uint8_t clk_detect; 1464 ddi_acc_handle_t pcih; 1465 #endif 1466 clock_t ticks; 1467 1468 /* 1469 * clear the interrupt control and status register 1470 * READ/WRITE/READ workaround required 1471 * for buggy hardware 1472 */ 1473 1474 PUT32(M1575_INTRCR_REG, 0); 1475 (void) GET32(M1575_INTRCR_REG); 1476 1477 intrsr = GET32(M1575_INTRSR_REG); 1478 PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK)); 1479 (void) GET32(M1575_INTRSR_REG); 1480 1481 ticks = drv_usectohz(M1575_LOOP_CTR); 1482 1483 /* 1484 * SADA only supports stereo, so we set the channel bits 1485 * to "00" to select 2 channels. 1486 * will also set the following: 1487 * 1488 * Disable double rate enable 1489 * no SPDIF output selected 1490 * 16 bit audio record mode 1491 * 16 bit pcm out mode 1492 * PCM Out 6 chan mode FL FR CEN BL BR LFE 1493 * PCM Out 2 channel mode (00) 1494 */ 1495 for (i = 0; i < M1575_LOOP_CTR; i++) { 1496 /* Reset the AC97 Codec and default to 2 channel 16 bit mode */ 1497 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST); 1498 delay(ticks<<1); 1499 1500 /* Read the System Status Reg */ 1501 ssr = GET32(M1575_SSR_REG); 1502 1503 /* make sure and release the blocked reset bit */ 1504 if (ssr & M1575_SSR_RSTBLK) { 1505 SET32(M1575_INTFCR_REG, M1575_INTFCR_RSTREL); 1506 delay(ticks); 1507 1508 /* Read the System Status Reg */ 1509 ssr = GET32(M1575_SSR_REG); 1510 1511 /* make sure and release the blocked reset bit */ 1512 if (ssr & M1575_SSR_RSTBLK) { 1513 return (DDI_FAILURE); 1514 } 1515 1516 /* Reset the controller */ 1517 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST); 1518 delay(ticks); 1519 } 1520 1521 /* according AC'97 spec, wait for codec reset */ 1522 for (j = 0; j < M1575_LOOP_CTR; j++) { 1523 if ((GET32(M1575_SCR_REG) & M1575_SCR_COLDRST) == 0) { 1524 break; 1525 } 1526 delay(ticks); 1527 } 1528 1529 /* codec reset failed */ 1530 if (j >= M1575_LOOP_CTR) { 1531 audio_dev_warn(statep->adev, 1532 "failure to reset codec"); 1533 return (DDI_FAILURE); 1534 } 1535 1536 /* 1537 * Wait for FACRDY First codec ready. The hardware can 1538 * provide the state of 1539 * codec ready bit on SDATA_IN[0] and as reflected in 1540 * the Recv Tag Slot Reg. 1541 */ 1542 rtsr = GET32(M1575_RTSR_REG); 1543 if (rtsr & M1575_RTSR_FACRDY) { 1544 break; 1545 } else { /* reset the status and wait for new status to set */ 1546 rtsr |= M1575_RTSR_FACRDY; 1547 PUT32(M1575_RTSR_REG, rtsr); 1548 drv_usecwait(10); 1549 } 1550 } 1551 1552 /* if we could not reset the AC97 codec then report failure */ 1553 if (i >= M1575_LOOP_CTR) { 1554 audio_dev_warn(statep->adev, 1555 "no codec ready signal received"); 1556 return (DDI_FAILURE); 1557 } 1558 1559 #ifdef __sparc 1560 /* Magic code from ULi to Turn on the AC_LINK clock */ 1561 pcih = statep->pcih; 1562 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1563 pci_config_put8(pcih, M1575_PCIACD_REG, 4); 1564 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1565 (void) pci_config_get8(pcih, M1575_PCIACD_REG); 1566 pci_config_put8(pcih, M1575_PCIACD_REG, 2); 1567 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1568 clk_detect = pci_config_get8(pcih, M1575_PCIACD_REG); 1569 1570 if (clk_detect != 1) { 1571 audio_dev_warn(statep->adev, "No AC97 Clock Detected"); 1572 return (DDI_FAILURE); 1573 } 1574 #endif 1575 1576 /* Magic code from Uli to Init FIFO1 and FIFO2 */ 1577 PUT32(M1575_FIFOCR1_REG, 0x81818181); 1578 PUT32(M1575_FIFOCR2_REG, 0x81818181); 1579 PUT32(M1575_FIFOCR3_REG, 0x81818181); 1580 1581 /* Make sure that PCM in and PCM out are enabled */ 1582 SET32(M1575_INTFCR_REG, (M1575_INTFCR_PCMIENB | M1575_INTFCR_PCMOENB)); 1583 1584 audio1575_dma_stop(statep, B_FALSE); 1585 1586 return (DDI_SUCCESS); 1587 } 1588 1589 /* 1590 * audio1575_dma_stop() 1591 * 1592 * Description: 1593 * This routine is used to put each DMA engine into the quiet state. 1594 * 1595 * Arguments: 1596 * audio1575_state_t *statep The device's state structure 1597 */ 1598 static void 1599 audio1575_dma_stop(audio1575_state_t *statep, boolean_t quiesce) 1600 { 1601 uint32_t intrsr; 1602 int i; 1603 1604 if (statep->regsh == NULL) { 1605 return; 1606 } 1607 1608 /* pause bus master (needed for the following reset register) */ 1609 for (i = 0; i < M1575_LOOP_CTR; i++) { 1610 1611 SET32(M1575_DMACR_REG, M1575_DMACR_PAUSE_ALL); 1612 if (GET32(M1575_DMACR_REG) & M1575_DMACR_PAUSE_ALL) { 1613 break; 1614 } 1615 drv_usecwait(10); 1616 } 1617 1618 if (i >= M1575_LOOP_CTR) { 1619 if (!quiesce) 1620 audio_dev_warn(statep->adev, "failed to stop DMA"); 1621 return; 1622 } 1623 1624 /* Pause bus master (needed for the following reset register) */ 1625 PUT8(M1575_PCMICR_REG, 0); 1626 PUT8(M1575_PCMOCR_REG, 0); 1627 PUT8(M1575_MICICR_REG, 0); 1628 PUT8(M1575_CSPOCR_REG, 0); 1629 PUT8(M1575_PCMI2CR_RR, 0); 1630 PUT8(M1575_MICI2CR_RR, 0); 1631 1632 /* Reset the bus master registers for all DMA engines */ 1633 PUT8(M1575_PCMICR_REG, M1575_PCMICR_RR); 1634 PUT8(M1575_PCMOCR_REG, M1575_PCMOCR_RR); 1635 PUT8(M1575_MICICR_REG, M1575_MICICR_RR); 1636 PUT8(M1575_CSPOCR_REG, M1575_CSPOCR_RR); 1637 PUT8(M1575_PCMI2CR_REG, M1575_PCMI2CR_RR); 1638 PUT8(M1575_MICI2CR_REG, M1575_MICI2CR_RR); 1639 1640 /* Reset FIFOS */ 1641 PUT32(M1575_FIFOCR1_REG, 0x81818181); 1642 PUT32(M1575_FIFOCR2_REG, 0x81818181); 1643 PUT32(M1575_FIFOCR3_REG, 0x81818181); 1644 1645 /* Clear Interrupts */ 1646 SET16(M1575_PCMISR_REG, M1575_SR_CLR); 1647 SET16(M1575_PCMOSR_REG, M1575_SR_CLR); 1648 SET16(M1575_MICISR_REG, M1575_SR_CLR); 1649 SET16(M1575_CSPOSR_REG, M1575_SR_CLR); 1650 SET16(M1575_PCMI2SR_REG, M1575_SR_CLR); 1651 SET16(M1575_MICI2SR_REG, M1575_SR_CLR); 1652 1653 /* 1654 * clear the interrupt control and status register 1655 * READ/WRITE/READ workaround required 1656 * for buggy hardware 1657 */ 1658 1659 PUT32(M1575_INTRCR_REG, 0); 1660 (void) GET32(M1575_INTRCR_REG); 1661 1662 intrsr = GET32(M1575_INTRSR_REG); 1663 PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK)); 1664 (void) GET32(M1575_INTRSR_REG); 1665 } 1666 1667 /* 1668 * audio1575_codec_sync() 1669 * 1670 * Description: 1671 * Serialize access to the AC97 audio mixer registers. 1672 * 1673 * Arguments: 1674 * audio1575_state_t *state The device's state structure 1675 * 1676 * Returns: 1677 * DDI_SUCCESS Ready for an I/O access to the codec 1678 * DDI_FAILURE An I/O access is currently in progress, can't 1679 * perform another I/O access. 1680 */ 1681 static int 1682 audio1575_codec_sync(audio1575_state_t *statep) 1683 { 1684 /* do the Uli Shuffle ... */ 1685 for (int i = 0; i < M1575_LOOP_CTR; i++) { 1686 /* Read the semaphore, and loop till we own it */ 1687 if ((GET32(M1575_CASR_REG) & 1) == 0) { 1688 for (int j = 0; j < M1575_LOOP_CTR; j++) { 1689 /* Wait for CWRSUCC 0x8 */ 1690 if (GET32(M1575_CSPSR_REG) & 1691 M1575_CSPSR_SUCC) { 1692 return (DDI_SUCCESS); 1693 } 1694 drv_usecwait(1); 1695 } 1696 } 1697 drv_usecwait(10); 1698 } 1699 1700 return (DDI_FAILURE); 1701 } 1702 1703 /* 1704 * audio1575_write_ac97() 1705 * 1706 * Description: 1707 * Set the specific AC97 Codec register. 1708 * 1709 * Arguments: 1710 * void *arg The device's state structure 1711 * uint8_t reg AC97 register number 1712 * uint16_t data The data want to be set 1713 */ 1714 static void 1715 audio1575_write_ac97(void *arg, uint8_t reg, uint16_t data) 1716 { 1717 audio1575_state_t *statep = arg; 1718 int i; 1719 1720 mutex_enter(&statep->ac_lock); 1721 1722 if (audio1575_codec_sync(statep) != DDI_SUCCESS) { 1723 mutex_exit(&statep->ac_lock); 1724 return; 1725 } 1726 1727 /* write the data to WRITE to the lo word of the CPR register */ 1728 PUT16(M1575_CPR_REG, data); 1729 1730 /* write the address to WRITE to the hi word of the CPR register */ 1731 PUT16(M1575_CPR_REG+2, reg); 1732 1733 /* wait until command is completed sucessfully */ 1734 for (i = 0; i < M1575_LOOP_CTR; i++) { 1735 /* Wait for Write Ready 0x01 */ 1736 if (GET32(M1575_CSPSR_REG) & M1575_CSPSR_WRRDY) { 1737 break; 1738 } 1739 drv_usecwait(1); 1740 } 1741 1742 mutex_exit(&statep->ac_lock); 1743 1744 if (i < M1575_LOOP_CTR) { 1745 (void) audio1575_read_ac97(statep, reg); 1746 } 1747 } 1748 1749 /* 1750 * audio1575_read_ac97() 1751 * 1752 * Description: 1753 * Get the specific AC97 Codec register. It also updates codec_shadow[] 1754 * with the register value. 1755 * 1756 * Arguments: 1757 * void *arg The device's state structure 1758 * uint8_t reg AC97 register number 1759 * 1760 * Returns: 1761 * Value of AC97 register. (0xffff in failure situations). 1762 */ 1763 static uint16_t 1764 audio1575_read_ac97(void *arg, uint8_t reg) 1765 { 1766 audio1575_state_t *statep = arg; 1767 uint16_t addr = 0; 1768 uint16_t data = 0xffff; 1769 int i; 1770 1771 mutex_enter(&statep->ac_lock); 1772 if ((audio1575_codec_sync(statep)) != DDI_SUCCESS) { 1773 mutex_exit(&statep->ac_lock); 1774 return (data); 1775 } 1776 1777 /* 1778 * at this point we have the CASR semaphore 1779 * and the codec is r/w ready 1780 * OR in the READ opcode into the address field 1781 */ 1782 1783 addr = (reg | M1575_CPR_READ); 1784 1785 /* write the address to READ to the hi word of the CPR register */ 1786 PUT16(M1575_CPR_REG+2, addr); 1787 1788 /* wait until command is completed sucessfully */ 1789 for (i = 0; i < M1575_LOOP_CTR; i++) { 1790 /* Wait for Read Ready 0x02 */ 1791 if (GET32(M1575_CSPSR_REG) & M1575_CSPSR_RDRDY) { 1792 break; 1793 } 1794 drv_usecwait(1); 1795 } 1796 1797 if (i < M1575_LOOP_CTR) { 1798 /* read back the data and address */ 1799 data = GET16(M1575_SPR_REG); 1800 addr = GET16(M1575_SPR_REG+2); 1801 if (addr != reg) { 1802 data = 0xffff; 1803 } 1804 } 1805 1806 mutex_exit(&statep->ac_lock); 1807 return (data); 1808 } 1809 1810 /* 1811 * audio1575_pci_enable() 1812 * 1813 * Description: 1814 * This routine Enables all PCI IO and MEMORY accesses 1815 * 1816 * Arguments: 1817 * audio1575_state_t *statep The device's state structure 1818 */ 1819 static void 1820 audio1575_pci_enable(audio1575_state_t *statep) 1821 { 1822 uint16_t pcics_reg; 1823 1824 pcics_reg = pci_config_get16(statep->pcih, PCI_CONF_COMM); 1825 pcics_reg |= (PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME); 1826 pci_config_put16(statep->pcih, PCI_CONF_COMM, pcics_reg); 1827 } 1828 1829 /* 1830 * audio1575_pci_disable() 1831 * 1832 * Description: 1833 * This routine Disables all PCI IO and MEMORY accesses 1834 * 1835 * Arguments: 1836 * audio1575_state_t *statep The device's state structure 1837 */ 1838 static void 1839 audio1575_pci_disable(audio1575_state_t *statep) 1840 { 1841 uint16_t pcics_reg; 1842 1843 if (statep->pcih == NULL) 1844 return; 1845 pcics_reg = pci_config_get16(statep->pcih, PCI_CONF_COMM); 1846 pcics_reg &= ~(PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME); 1847 pci_config_put16(statep->pcih, PCI_CONF_COMM, pcics_reg); 1848 } 1849 1850 /* 1851 * audio1575_resume() 1852 * 1853 * Description: 1854 * Resume operation of the device after sleeping or hibernating. 1855 * Note that this should never fail, even if hardware goes wonky, 1856 * because the current PM framework will panic if it does. 1857 * 1858 * Arguments: 1859 * dev_info_t *dip Pointer to the device's dev_info struct 1860 * 1861 * Returns: 1862 * DDI_SUCCESS The driver was resumed 1863 */ 1864 static int 1865 audio1575_resume(dev_info_t *dip) 1866 { 1867 audio1575_state_t *statep; 1868 audio_dev_t *adev; 1869 1870 /* we've already allocated the state structure so get ptr */ 1871 statep = ddi_get_driver_private(dip); 1872 adev = statep->adev; 1873 ASSERT(!mutex_owned(&statep->lock)); 1874 1875 if (audio1575_chip_init(statep) != DDI_SUCCESS) { 1876 /* 1877 * Note that PM gurus say we should return 1878 * success here. Failure of audio shouldn't 1879 * be considered FATAL to the system. The 1880 * upshot is that audio will not progress. 1881 */ 1882 audio_dev_warn(adev, "DDI_RESUME failed to init chip"); 1883 return (DDI_SUCCESS); 1884 } 1885 1886 /* allow ac97 operations again */ 1887 ac97_resume(statep->ac97); 1888 1889 mutex_enter(&statep->lock); 1890 1891 ASSERT(statep->suspended); 1892 statep->suspended = B_FALSE; 1893 1894 for (int i = 0; i < M1575_NUM_PORTS; i++) { 1895 1896 audio1575_port_t *port = statep->ports[i]; 1897 1898 if (port != NULL) { 1899 /* reset framework DMA engine buffer */ 1900 if (port->engine != NULL) { 1901 audio_engine_reset(port->engine); 1902 } 1903 1904 /* reset and initialize hardware ports */ 1905 audio1575_reset_port(port); 1906 if (port->started) { 1907 audio1575_start_port(port); 1908 } else { 1909 audio1575_stop_port(port); 1910 } 1911 } 1912 } 1913 mutex_exit(&statep->lock); 1914 1915 return (DDI_SUCCESS); 1916 } 1917 1918 /* 1919 * audio1575_suspend() 1920 * 1921 * Description: 1922 * Suspend an instance of the audio1575 driver. 1923 * 1924 * Arguments: 1925 * dev_info_t *dip Pointer to the device's dev_info struct 1926 * 1927 * Returns: 1928 * DDI_SUCCESS The driver was suspended 1929 */ 1930 static int 1931 audio1575_suspend(dev_info_t *dip) 1932 { 1933 audio1575_state_t *statep; 1934 1935 statep = ddi_get_driver_private(dip); 1936 1937 ac97_suspend(statep->ac97); 1938 1939 mutex_enter(&statep->lock); 1940 1941 statep->suspended = B_TRUE; 1942 1943 /* 1944 * stop all DMA operations 1945 */ 1946 audio1575_dma_stop(statep, B_FALSE); 1947 1948 mutex_exit(&statep->lock); 1949 1950 return (DDI_SUCCESS); 1951 } 1952 1953 /* 1954 * audio1575_destroy() 1955 * 1956 * Description: 1957 * This routine releases all resources held by the device instance, 1958 * as part of either detach or a failure in attach. 1959 * 1960 * Arguments: 1961 * audio1575_state_t *state The device soft state. 1962 * 1963 * Returns: 1964 * None 1965 */ 1966 void 1967 audio1575_destroy(audio1575_state_t *statep) 1968 { 1969 ddi_acc_handle_t pcih; 1970 1971 /* stop DMA engines */ 1972 audio1575_dma_stop(statep, B_FALSE); 1973 1974 if (statep->regsh != NULL) { 1975 /* reset the codec */ 1976 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST); 1977 } 1978 1979 if ((pcih = statep->pcih) != NULL) { 1980 /* turn off the AC_LINK clock */ 1981 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1982 pci_config_put8(pcih, M1575_PCIACD_REG, 4); 1983 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1984 } 1985 1986 /* Disable PCI I/O and Memory Spaces */ 1987 audio1575_pci_disable(statep); 1988 1989 if (statep->ih != NULL) { 1990 (void) ddi_intr_disable(statep->ih); 1991 (void) ddi_intr_remove_handler(statep->ih); 1992 (void) ddi_intr_free(statep->ih); 1993 mutex_destroy(&statep->lock); 1994 mutex_destroy(&statep->ac_lock); 1995 } 1996 1997 if (statep->ksp != NULL) { 1998 kstat_delete(statep->ksp); 1999 } 2000 2001 audio1575_free_port(statep->ports[M1575_PLAY]); 2002 audio1575_free_port(statep->ports[M1575_REC]); 2003 2004 audio1575_unmap_regs(statep); 2005 2006 if (statep->ac97 != NULL) { 2007 ac97_free(statep->ac97); 2008 } 2009 2010 if (statep->adev != NULL) { 2011 audio_dev_free(statep->adev); 2012 } 2013 2014 kmem_free(statep, sizeof (*statep)); 2015 } 2016