1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2010 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 27 /* 28 * audio1575 Audio Driver 29 * 30 * The driver is primarily targeted at providing audio support for 31 * those systems which use the Uli M1575 audio core. 32 * 33 * The M1575 audio core, in AC'97 controller mode, has independent 34 * channels for PCM in, PCM out, mic in, modem in, and modem out. 35 * 36 * The AC'97 controller is a PCI bus master with scatter/gather 37 * support. Each channel has a DMA engine. Currently, we use only 38 * the PCM in and PCM out channels. Each DMA engine uses one buffer 39 * descriptor list. And the buffer descriptor list is an array of up 40 * to 32 entries, each of which describes a data buffer. Each entry 41 * contains a pointer to a data buffer, control bits, and the length 42 * of the buffer being pointed to, where the length is expressed as 43 * the number of samples. This, combined with the 16-bit sample size, 44 * gives the actual physical length of the buffer. 45 * 46 * NOTE: 47 * This driver depends on the drv/audio, misc/ac97 48 * modules being loaded first. 49 */ 50 51 #include <sys/types.h> 52 #include <sys/modctl.h> 53 #include <sys/kmem.h> 54 #include <sys/conf.h> 55 #include <sys/ddi.h> 56 #include <sys/sunddi.h> 57 #include <sys/pci.h> 58 #include <sys/note.h> 59 #include <sys/audio/audio_driver.h> 60 #include <sys/audio/ac97.h> 61 #include "audio1575.h" 62 63 /* 64 * Module linkage routines for the kernel 65 */ 66 static int audio1575_ddi_attach(dev_info_t *, ddi_attach_cmd_t); 67 static int audio1575_ddi_detach(dev_info_t *, ddi_detach_cmd_t); 68 static int audio1575_ddi_quiesce(dev_info_t *); 69 70 /* 71 * Entry point routine prototypes 72 */ 73 static int audio1575_open(void *, int, unsigned *, caddr_t *); 74 static void audio1575_close(void *); 75 static int audio1575_start(void *); 76 static void audio1575_stop(void *); 77 static int audio1575_format(void *); 78 static int audio1575_channels(void *); 79 static int audio1575_rate(void *); 80 static uint64_t audio1575_count(void *); 81 static void audio1575_sync(void *, unsigned); 82 83 static audio_engine_ops_t audio1575_engine_ops = { 84 AUDIO_ENGINE_VERSION, 85 audio1575_open, 86 audio1575_close, 87 audio1575_start, 88 audio1575_stop, 89 audio1575_count, 90 audio1575_format, 91 audio1575_channels, 92 audio1575_rate, 93 audio1575_sync, 94 NULL, 95 NULL, 96 NULL 97 }; 98 99 /* 100 * Local Routine Prototypes 101 */ 102 static int audio1575_attach(dev_info_t *); 103 static int audio1575_resume(dev_info_t *); 104 static int audio1575_detach(dev_info_t *); 105 static int audio1575_suspend(dev_info_t *); 106 107 static int audio1575_alloc_port(audio1575_state_t *, int, uint8_t); 108 static void audio1575_free_port(audio1575_port_t *); 109 110 static int audio1575_codec_sync(audio1575_state_t *); 111 static void audio1575_write_ac97(void *, uint8_t, uint16_t); 112 static uint16_t audio1575_read_ac97(void *, uint8_t); 113 static int audio1575_chip_init(audio1575_state_t *); 114 static int audio1575_map_regs(audio1575_state_t *); 115 static void audio1575_unmap_regs(audio1575_state_t *); 116 static void audio1575_dma_stop(audio1575_state_t *, boolean_t); 117 static void audio1575_pci_enable(audio1575_state_t *); 118 static void audio1575_pci_disable(audio1575_state_t *); 119 120 static void audio1575_destroy(audio1575_state_t *); 121 122 /* 123 * Global variables, but used only by this file. 124 */ 125 126 /* 127 * DDI Structures 128 */ 129 130 131 /* Device operations structure */ 132 static struct dev_ops audio1575_dev_ops = { 133 DEVO_REV, /* devo_rev */ 134 0, /* devo_refcnt */ 135 NULL, /* devo_getinfo */ 136 nulldev, /* devo_identify - obsolete */ 137 nulldev, /* devo_probe */ 138 audio1575_ddi_attach, /* devo_attach */ 139 audio1575_ddi_detach, /* devo_detach */ 140 nodev, /* devo_reset */ 141 NULL, /* devi_cb_ops */ 142 NULL, /* devo_bus_ops */ 143 NULL, /* devo_power */ 144 audio1575_ddi_quiesce, /* devo_quiesce */ 145 }; 146 147 /* Linkage structure for loadable drivers */ 148 static struct modldrv audio1575_modldrv = { 149 &mod_driverops, /* drv_modops */ 150 M1575_MOD_NAME, /* drv_linkinfo */ 151 &audio1575_dev_ops, /* drv_dev_ops */ 152 }; 153 154 /* Module linkage structure */ 155 static struct modlinkage audio1575_modlinkage = { 156 MODREV_1, /* ml_rev */ 157 (void *)&audio1575_modldrv, /* ml_linkage */ 158 NULL /* NULL terminates the list */ 159 }; 160 161 162 /* 163 * device access attributes for register mapping 164 */ 165 static struct ddi_device_acc_attr dev_attr = { 166 DDI_DEVICE_ATTR_V0, 167 DDI_STRUCTURE_LE_ACC, 168 DDI_STRICTORDER_ACC 169 }; 170 171 static struct ddi_device_acc_attr buf_attr = { 172 DDI_DEVICE_ATTR_V0, 173 DDI_NEVERSWAP_ACC, 174 DDI_STRICTORDER_ACC 175 }; 176 177 /* 178 * DMA attributes of buffer descriptor list 179 */ 180 static ddi_dma_attr_t bdlist_dma_attr = { 181 DMA_ATTR_V0, /* version */ 182 0x0000000000000000LL, /* dlim_addr_lo */ 183 0x00000000ffffffffLL, /* dlim_addr_hi */ 184 0x000000000000ffffLL, /* DMA counter register - 64 bits */ 185 0x0000000000000008LL, /* DMA address align must be 8-bytes */ 186 0x0000003c, /* 1 through 64 byte burst sizes */ 187 0x00000008, /* min xfer DMA size BDList entry */ 188 0x00000000000ffffLL, /* max xfer size, 64K */ 189 0x000000000001fffLL, /* seg, set to PAGESIZE */ 190 0x00000001, /* s/g list length, no s/g */ 191 0x00000008, /* granularity of device minxfer */ 192 0 /* DMA flags use virtual address */ 193 }; 194 195 /* 196 * DMA attributes of buffers to be used to receive/send audio data 197 */ 198 static ddi_dma_attr_t sample_buf_dma_attr = { 199 DMA_ATTR_V0, 200 0x0000000000000000LL, /* dlim_addr_lo */ 201 0x00000000ffffffffLL, /* dlim_addr_hi */ 202 0x000000000001fffeLL, /* DMA counter register - 16 bits */ 203 0x0000000000000004LL, /* DMA address align 2-byte boundary */ 204 0x0000003c, /* 1 through 60 byte burst sizes */ 205 0x00000004, /* min xfer DMA size BDList entry */ 206 0x000000000001ffffLL, /* max xfer size, 64K */ 207 0x000000000001ffffLL, /* seg, set to 64K */ 208 0x00000001, /* s/g list length, no s/g */ 209 0x00000004, /* granularity of device minxfer */ 210 0 /* DMA flags use virtual address */ 211 }; 212 213 /* 214 * _init() 215 * 216 * Description: 217 * Driver initialization, called when driver is first loaded. 218 * This is how access is initially given to all the static structures. 219 * 220 * Arguments: 221 * None 222 * 223 * Returns: 224 * mod_install() status, see mod_install(9f) 225 */ 226 int 227 _init(void) 228 { 229 int error; 230 231 audio_init_ops(&audio1575_dev_ops, M1575_NAME); 232 233 if ((error = mod_install(&audio1575_modlinkage)) != 0) { 234 audio_fini_ops(&audio1575_dev_ops); 235 } 236 237 return (error); 238 } 239 240 /* 241 * _fini() 242 * 243 * Description: 244 * Module de-initialization, called when the driver is to be unloaded. 245 * 246 * Arguments: 247 * None 248 * 249 * Returns: 250 * mod_remove() status, see mod_remove(9f) 251 */ 252 int 253 _fini(void) 254 { 255 int error; 256 257 if ((error = mod_remove(&audio1575_modlinkage)) != 0) { 258 return (error); 259 } 260 261 /* clean up ops */ 262 audio_fini_ops(&audio1575_dev_ops); 263 264 return (0); 265 } 266 267 /* 268 * _info() 269 * 270 * Description: 271 * Module information, returns information about the driver. 272 * 273 * Arguments: 274 * modinfo *modinfop Pointer to the opaque modinfo structure 275 * 276 * Returns: 277 * mod_info() status, see mod_info(9f) 278 */ 279 int 280 _info(struct modinfo *modinfop) 281 { 282 return (mod_info(&audio1575_modlinkage, modinfop)); 283 } 284 285 286 /* ******************* Driver Entry Points ********************************* */ 287 288 /* 289 * audio1575_ddi_attach() 290 * 291 * Description: 292 * Implements the DDI attach(9e) entry point. 293 * 294 * Arguments: 295 * dev_info_t *dip Pointer to the device's dev_info struct 296 * ddi_attach_cmd_t cmd Attach command 297 * 298 * Returns: 299 * DDI_SUCCESS The driver was initialized properly 300 * DDI_FAILURE The driver couldn't be initialized properly 301 */ 302 static int 303 audio1575_ddi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 304 { 305 switch (cmd) { 306 case DDI_ATTACH: 307 return (audio1575_attach(dip)); 308 309 case DDI_RESUME: 310 return (audio1575_resume(dip)); 311 } 312 return (DDI_FAILURE); 313 } 314 315 /* 316 * audio1575_ddi_detach() 317 * 318 * Description: 319 * Implements the detach(9e) entry point. 320 * 321 * Arguments: 322 * dev_info_t *dip Pointer to the device's dev_info struct 323 * ddi_detach_cmd_t cmd Detach command 324 * 325 * Returns: 326 * DDI_SUCCESS The driver was detached 327 * DDI_FAILURE The driver couldn't be detached 328 */ 329 static int 330 audio1575_ddi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 331 { 332 switch (cmd) { 333 case DDI_DETACH: 334 return (audio1575_detach(dip)); 335 336 case DDI_SUSPEND: 337 return (audio1575_suspend(dip)); 338 } 339 return (DDI_FAILURE); 340 } 341 342 /* 343 * audio1575_ddi_quiesce() 344 * 345 * Description: 346 * Implements the quiesce(9e) entry point. 347 * 348 * Arguments: 349 * dev_info_t *dip Pointer to the device's dev_info struct 350 * 351 * Returns: 352 * DDI_SUCCESS The driver was quiesced 353 * DDI_FAILURE The driver couldn't be quiesced 354 */ 355 static int 356 audio1575_ddi_quiesce(dev_info_t *dip) 357 { 358 audio1575_state_t *statep; 359 360 if ((statep = ddi_get_driver_private(dip)) == NULL) 361 return (DDI_FAILURE); 362 363 audio1575_dma_stop(statep, B_TRUE); 364 return (DDI_SUCCESS); 365 } 366 367 /* 368 * audio1575_open() 369 * 370 * Description: 371 * Opens a DMA engine for use. 372 * 373 * Arguments: 374 * void *arg The DMA engine to set up 375 * int flag Open flags 376 * unsigned *nframesp Receives number of frames 377 * caddr_t *bufp Receives kernel data buffer 378 * 379 * Returns: 380 * 0 on success 381 * errno on failure 382 */ 383 static int 384 audio1575_open(void *arg, int flag, unsigned *nframesp, caddr_t *bufp) 385 { 386 audio1575_port_t *port = arg; 387 388 _NOTE(ARGUNUSED(flag)); 389 390 port->count = 0; 391 *nframesp = port->nframes; 392 *bufp = port->samp_kaddr; 393 394 return (0); 395 } 396 397 398 /* 399 * audio1575_close() 400 * 401 * Description: 402 * Closes an audio DMA engine that was previously opened. Since 403 * nobody is using it, we take this opportunity to possibly power 404 * down the entire device. 405 * 406 * Arguments: 407 * void *arg The DMA engine to shut down 408 */ 409 static void 410 audio1575_close(void *arg) 411 { 412 _NOTE(ARGUNUSED(arg)); 413 } 414 415 /* 416 * audio1575_stop() 417 * 418 * Description: 419 * This is called by the framework to stop a port that is 420 * transferring data. 421 * 422 * Arguments: 423 * void *arg The DMA engine to stop 424 */ 425 static void 426 audio1575_stop(void *arg) 427 { 428 audio1575_port_t *port = arg; 429 audio1575_state_t *statep = port->statep; 430 431 mutex_enter(&statep->lock); 432 if (port->num == M1575_REC) { 433 SET32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE); 434 } else { 435 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE); 436 } 437 mutex_exit(&statep->lock); 438 } 439 440 /* 441 * audio1575_start() 442 * 443 * Description: 444 * This is called by the framework to start a port transferring data. 445 * 446 * Arguments: 447 * void *arg The DMA engine to start 448 * 449 * Returns: 450 * 0 on success (never fails, errno if it did) 451 */ 452 static int 453 audio1575_start(void *arg) 454 { 455 audio1575_port_t *port = arg; 456 audio1575_state_t *statep = port->statep; 457 458 mutex_enter(&statep->lock); 459 460 port->offset = 0; 461 462 if (port->num == M1575_REC) { 463 /* Uli FIFO madness ... */ 464 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMIRST); 465 SET32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE); 466 467 PUT8(M1575_PCMICR_REG, 0); 468 PUT8(M1575_PCMICR_REG, M1575_CR_RR); 469 470 PUT32(M1575_PCMIBDBAR_REG, port->bdl_paddr); 471 PUT8(M1575_PCMILVIV_REG, M1575_BD_NUMS - 1); 472 473 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE); 474 475 /* ULi says do fifo resets here */ 476 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMIRST); 477 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMIPAUSE); 478 PUT8(M1575_PCMICR_REG, 0); 479 SET32(M1575_DMACR_REG, M1575_DMACR_PCMISTART); 480 481 } else { 482 483 uint32_t scr; 484 485 /* Uli FIFO madness ... */ 486 SET32(M1575_FIFOCR1_REG, M1575_FIFOCR1_PCMORST); 487 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE); 488 489 /* configure the number of channels properly */ 490 scr = GET32(M1575_SCR_REG); 491 scr &= ~(M1575_SCR_6CHL_MASK | M1575_SCR_CHAMOD_MASK); 492 scr |= M1575_SCR_6CHL_2; /* select our proper ordering */ 493 switch (port->nchan) { 494 case 2: 495 scr |= M1575_SCR_CHAMOD_2; 496 break; 497 case 4: 498 scr |= M1575_SCR_CHAMOD_4; 499 break; 500 case 6: 501 scr |= M1575_SCR_CHAMOD_6; 502 break; 503 } 504 PUT32(M1575_SCR_REG, scr); 505 506 PUT8(M1575_PCMOCR_REG, 0); 507 PUT8(M1575_PCMOCR_REG, M1575_CR_RR); 508 509 PUT32(M1575_PCMOBDBAR_REG, port->bdl_paddr); 510 PUT8(M1575_PCMOLVIV_REG, M1575_BD_NUMS - 1); 511 512 CLR32(M1575_DMACR_REG, M1575_DMACR_PCMOPAUSE); 513 PUT8(M1575_PCMOCR_REG, 0); 514 SET32(M1575_DMACR_REG, M1575_DMACR_PCMOSTART); 515 } 516 517 mutex_exit(&statep->lock); 518 return (0); 519 } 520 521 522 523 /* 524 * audio1575_format() 525 * 526 * Description: 527 * Called by the framework to query the format for the device. 528 * 529 * Arguments: 530 * void *arg The DMA engine to query 531 * 532 * Returns: 533 * AUDIO_FORMAT_S16_LE 534 */ 535 static int 536 audio1575_format(void *arg) 537 { 538 _NOTE(ARGUNUSED(arg)); 539 540 return (AUDIO_FORMAT_S16_LE); 541 } 542 543 /* 544 * audio1575_channels() 545 * 546 * Description: 547 * Called by the framework to query the channels for the device. 548 * 549 * Arguments: 550 * void *arg The DMA engine to query 551 * 552 * Returns: 553 * Number of channels for the device 554 */ 555 static int 556 audio1575_channels(void *arg) 557 { 558 audio1575_port_t *port = arg; 559 560 return (port->nchan); 561 } 562 563 /* 564 * audio1575_rate() 565 * 566 * Description: 567 * Called by the framework to query the sample rate for the device. 568 * 569 * Arguments: 570 * void *arg The DMA engine to query 571 * 572 * Returns: 573 * 48000 574 */ 575 static int 576 audio1575_rate(void *arg) 577 { 578 _NOTE(ARGUNUSED(arg)); 579 580 return (48000); 581 } 582 583 /* 584 * audio1575_count() 585 * 586 * Description: 587 * This is called by the framework to get the engine's frame counter 588 * 589 * Arguments: 590 * void *arg The DMA engine to query 591 * 592 * Returns: 593 * frame count for current engine 594 */ 595 static uint64_t 596 audio1575_count(void *arg) 597 { 598 audio1575_port_t *port = arg; 599 audio1575_state_t *statep = port->statep; 600 uint64_t val; 601 uint8_t civ; 602 unsigned n; 603 int civoff; 604 int lvioff; 605 int picoff; 606 607 mutex_enter(&statep->lock); 608 609 if (port->num == M1575_REC) { 610 civoff = M1575_PCMICIV_REG; 611 lvioff = M1575_PCMILVIV_REG; 612 picoff = M1575_PCMIPICB_REG; 613 } else { 614 civoff = M1575_PCMOCIV_REG; 615 lvioff = M1575_PCMOLVIV_REG; 616 picoff = M1575_PCMOPICB_REG; 617 } 618 619 /* 620 * Read the position counters. We also take this opportunity 621 * to update the last valid index to the one just previous to 622 * the one we're working on (so we'll fully loop.) 623 */ 624 n = GET16(picoff); 625 civ = GET8(civoff); 626 PUT8(lvioff, (civ - 1) % M1575_BD_NUMS); 627 628 n = port->samp_size - (n * sizeof (int16_t)); 629 if (n < port->offset) { 630 val = (port->samp_size - port->offset) + n; 631 } else { 632 val = n - port->offset; 633 } 634 port->offset = n; 635 port->count += (val / (port->nchan * sizeof (int16_t))); 636 val = port->count; 637 mutex_exit(&statep->lock); 638 639 return (val); 640 } 641 642 /* 643 * audio1575_sync() 644 * 645 * Description: 646 * This is called by the framework to synchronize DMA caches. 647 * 648 * Arguments: 649 * void *arg The DMA engine to sync 650 */ 651 static void 652 audio1575_sync(void *arg, unsigned nframes) 653 { 654 audio1575_port_t *port = arg; 655 _NOTE(ARGUNUSED(nframes)); 656 657 (void) ddi_dma_sync(port->samp_dmah, 0, 0, port->sync_dir); 658 } 659 660 /* 661 * audio1575_attach() 662 * 663 * Description: 664 * Attach an instance of the audio1575 driver. This routine does the 665 * device dependent attach tasks. When it is completed, it registers 666 * with the audio framework. 667 * 668 * Arguments: 669 * dev_info_t *dip Pointer to the device's dev_info struct 670 * 671 * Returns: 672 * DDI_SUCCESS The driver was initialized properly 673 * DDI_FAILURE The driver couldn't be initialized properly 674 */ 675 static int 676 audio1575_attach(dev_info_t *dip) 677 { 678 audio1575_state_t *statep; 679 audio_dev_t *adev; 680 uint32_t devid; 681 const char *name; 682 const char *rev; 683 int maxch; 684 685 /* allocate the soft state structure */ 686 statep = kmem_zalloc(sizeof (*statep), KM_SLEEP); 687 ddi_set_driver_private(dip, statep); 688 statep->dip = dip; 689 690 /* 691 * We want the micboost enabled by default as well. 692 */ 693 (void) ddi_prop_update_int(DDI_DEV_T_NONE, dip, AC97_PROP_MICBOOST, 1); 694 695 /* allocate common audio dev structure */ 696 adev = audio_dev_alloc(dip, 0); 697 if (adev == NULL) { 698 audio_dev_warn(NULL, "unable to allocate audio dev"); 699 goto error; 700 } 701 statep->adev = adev; 702 703 /* map in the audio registers */ 704 if (audio1575_map_regs(statep) != DDI_SUCCESS) { 705 audio_dev_warn(adev, "couldn't map registers"); 706 goto error; 707 } 708 709 /* Enable PCI I/O and Memory Spaces */ 710 audio1575_pci_enable(statep); 711 712 devid = (pci_config_get16(statep->pcih, PCI_CONF_VENID) << 16) | 713 pci_config_get16(statep->pcih, PCI_CONF_DEVID); 714 switch (devid) { 715 case 0x10b95455: 716 name = "Uli M1575 AC'97"; 717 rev = "M5455"; 718 break; 719 default: 720 name = "Uli AC'97"; 721 rev = "Unknown"; 722 break; 723 } 724 /* set device information -- this should check PCI config space */ 725 audio_dev_set_description(adev, name); 726 audio_dev_set_version(adev, rev); 727 728 statep->ac97 = ac97_alloc(dip, audio1575_read_ac97, 729 audio1575_write_ac97, statep); 730 ASSERT(statep->ac97 != NULL); 731 732 /* 733 * Override "max-channels" property to prevent configuration 734 * of 4 or 6 (or possibly even 8!) channel audio. The default 735 * is to support as many channels as the hardware can do. 736 */ 737 maxch = ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 738 "max-channels", ac97_num_channels(statep->ac97)); 739 if (maxch < 2) { 740 maxch = 2; 741 } 742 743 statep->maxch = min(maxch, 6) & ~1; 744 745 /* allocate port structures */ 746 if ((audio1575_alloc_port(statep, M1575_PLAY, statep->maxch) != 747 DDI_SUCCESS) || 748 (audio1575_alloc_port(statep, M1575_REC, 2) != DDI_SUCCESS)) { 749 goto error; 750 } 751 752 if (audio1575_chip_init(statep) != DDI_SUCCESS) { 753 audio_dev_warn(adev, "failed to init chip"); 754 goto error; 755 } 756 757 if (ac97_init(statep->ac97, adev) != DDI_SUCCESS) { 758 audio_dev_warn(adev, "ac'97 initialization failed"); 759 goto error; 760 } 761 762 /* register with the framework */ 763 if (audio_dev_register(adev) != DDI_SUCCESS) { 764 audio_dev_warn(adev, "unable to register with framework"); 765 goto error; 766 } 767 768 /* everything worked out, so report the device */ 769 ddi_report_dev(dip); 770 771 return (DDI_SUCCESS); 772 773 error: 774 audio1575_destroy(statep); 775 return (DDI_FAILURE); 776 } 777 778 /* 779 * audio1575_detach() 780 * 781 * Description: 782 * Detach an instance of the audio1575 driver. 783 * 784 * Arguments: 785 * dev_info_t *dip Pointer to the device's dev_info struct 786 * 787 * Returns: 788 * DDI_SUCCESS The driver was detached 789 * DDI_FAILURE The driver couldn't be detached 790 */ 791 static int 792 audio1575_detach(dev_info_t *dip) 793 { 794 audio1575_state_t *statep; 795 796 statep = ddi_get_driver_private(dip); 797 798 if (audio_dev_unregister(statep->adev) != DDI_SUCCESS) { 799 return (DDI_FAILURE); 800 } 801 802 audio1575_destroy(statep); 803 return (DDI_SUCCESS); 804 } 805 806 /* *********************** Local Routines *************************** */ 807 808 /* 809 * audio1575_alloc_port() 810 * 811 * Description: 812 * This routine allocates the DMA handles and the memory for the 813 * DMA engines to use. It also configures the BDL lists properly 814 * for use. 815 * 816 * Arguments: 817 * dev_info_t *dip Pointer to the device's devinfo 818 * int num M1575_PLAY or M1575_REC 819 * uint8_t nchan Number of channels (2 = stereo, 6 = 5.1, etc.) 820 * 821 * Returns: 822 * DDI_SUCCESS Registers successfully mapped 823 * DDI_FAILURE Registers not successfully mapped 824 */ 825 static int 826 audio1575_alloc_port(audio1575_state_t *statep, int num, uint8_t nchan) 827 { 828 ddi_dma_cookie_t cookie; 829 uint_t count; 830 int dir; 831 unsigned caps; 832 audio_dev_t *adev; 833 audio1575_port_t *port; 834 uint32_t *kaddr; 835 int rc; 836 dev_info_t *dip; 837 838 adev = statep->adev; 839 dip = statep->dip; 840 841 port = kmem_zalloc(sizeof (*port), KM_SLEEP); 842 statep->ports[num] = port; 843 port->num = num; 844 port->statep = statep; 845 port->nchan = nchan; 846 847 if (num == M1575_REC) { 848 dir = DDI_DMA_READ; 849 caps = ENGINE_INPUT_CAP; 850 port->sync_dir = DDI_DMA_SYNC_FORKERNEL; 851 } else { 852 dir = DDI_DMA_WRITE; 853 caps = ENGINE_OUTPUT_CAP; 854 port->sync_dir = DDI_DMA_SYNC_FORDEV; 855 } 856 857 /* 858 * We use one big sample area. The sample area must be larger 859 * than about 1.5 framework fragment sizes. (Currently 480 * 860 * 1.5 = 720 frames.) This is necessary to ensure that we 861 * don't have to involve an interrupt service routine on our 862 * own, to keep the last valid index updated reasonably. 863 */ 864 port->nframes = 2048; 865 port->samp_size = port->nframes * port->nchan * sizeof (int16_t); 866 867 /* allocate dma handle */ 868 rc = ddi_dma_alloc_handle(dip, &sample_buf_dma_attr, DDI_DMA_SLEEP, 869 NULL, &port->samp_dmah); 870 if (rc != DDI_SUCCESS) { 871 audio_dev_warn(adev, "ddi_dma_alloc_handle failed: %d", rc); 872 return (DDI_FAILURE); 873 } 874 /* allocate DMA buffer */ 875 rc = ddi_dma_mem_alloc(port->samp_dmah, port->samp_size, &buf_attr, 876 DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, &port->samp_kaddr, 877 &port->samp_size, &port->samp_acch); 878 if (rc == DDI_FAILURE) { 879 audio_dev_warn(adev, "dma_mem_alloc failed"); 880 return (DDI_FAILURE); 881 } 882 883 /* bind DMA buffer */ 884 rc = ddi_dma_addr_bind_handle(port->samp_dmah, NULL, 885 port->samp_kaddr, port->samp_size, dir|DDI_DMA_CONSISTENT, 886 DDI_DMA_SLEEP, NULL, &cookie, &count); 887 if ((rc != DDI_DMA_MAPPED) || (count != 1)) { 888 audio_dev_warn(adev, 889 "ddi_dma_addr_bind_handle failed: %d", rc); 890 return (DDI_FAILURE); 891 } 892 port->samp_paddr = cookie.dmac_address; 893 894 /* 895 * now, from here we allocate DMA memory for buffer descriptor list. 896 * we allocate adjacent DMA memory for all DMA engines. 897 */ 898 rc = ddi_dma_alloc_handle(dip, &bdlist_dma_attr, DDI_DMA_SLEEP, 899 NULL, &port->bdl_dmah); 900 if (rc != DDI_SUCCESS) { 901 audio_dev_warn(adev, "ddi_dma_alloc_handle(bdlist) failed"); 902 return (DDI_FAILURE); 903 } 904 905 /* 906 * we allocate all buffer descriptors lists in continuous dma memory. 907 */ 908 port->bdl_size = sizeof (m1575_bd_entry_t) * M1575_BD_NUMS; 909 rc = ddi_dma_mem_alloc(port->bdl_dmah, port->bdl_size, 910 &dev_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, 911 &port->bdl_kaddr, &port->bdl_size, &port->bdl_acch); 912 if (rc != DDI_SUCCESS) { 913 audio_dev_warn(adev, "ddi_dma_mem_alloc(bdlist) failed"); 914 return (DDI_FAILURE); 915 } 916 917 /* 918 * Wire up the BD list. We do this *before* binding the BD list 919 * so that we don't have to do an extra ddi_dma_sync. 920 */ 921 kaddr = (void *)port->bdl_kaddr; 922 for (int i = 0; i < M1575_BD_NUMS; i++) { 923 924 /* set base address of buffer */ 925 ddi_put32(port->bdl_acch, kaddr, port->samp_paddr); 926 kaddr++; 927 928 /* set size in frames, and enable IOC interrupt */ 929 ddi_put32(port->bdl_acch, kaddr, 930 ((port->samp_size / sizeof (int16_t)) | (1U << 31))); 931 kaddr++; 932 } 933 934 rc = ddi_dma_addr_bind_handle(port->bdl_dmah, NULL, port->bdl_kaddr, 935 port->bdl_size, DDI_DMA_WRITE|DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, 936 NULL, &cookie, &count); 937 if ((rc != DDI_DMA_MAPPED) || (count != 1)) { 938 audio_dev_warn(adev, "addr_bind_handle failed"); 939 return (DDI_FAILURE); 940 } 941 port->bdl_paddr = cookie.dmac_address; 942 943 port->engine = audio_engine_alloc(&audio1575_engine_ops, caps); 944 if (port->engine == NULL) { 945 audio_dev_warn(adev, "audio_engine_alloc failed"); 946 return (DDI_FAILURE); 947 } 948 949 audio_engine_set_private(port->engine, port); 950 audio_dev_add_engine(adev, port->engine); 951 952 return (DDI_SUCCESS); 953 } 954 955 /* 956 * audio1575_free_port() 957 * 958 * Description: 959 * This routine unbinds the DMA cookies, frees the DMA buffers, 960 * deallocates the DMA handles. 961 * 962 * Arguments: 963 * audio1575_port_t *port The port structure for a DMA engine. 964 */ 965 static void 966 audio1575_free_port(audio1575_port_t *port) 967 { 968 if (port == NULL) 969 return; 970 971 if (port->engine) { 972 audio_dev_remove_engine(port->statep->adev, port->engine); 973 audio_engine_free(port->engine); 974 } 975 if (port->bdl_paddr) { 976 (void) ddi_dma_unbind_handle(port->bdl_dmah); 977 } 978 if (port->bdl_acch) { 979 ddi_dma_mem_free(&port->bdl_acch); 980 } 981 if (port->bdl_dmah) { 982 ddi_dma_free_handle(&port->bdl_dmah); 983 } 984 if (port->samp_paddr) { 985 (void) ddi_dma_unbind_handle(port->samp_dmah); 986 } 987 if (port->samp_acch) { 988 ddi_dma_mem_free(&port->samp_acch); 989 } 990 if (port->samp_dmah) { 991 ddi_dma_free_handle(&port->samp_dmah); 992 } 993 kmem_free(port, sizeof (*port)); 994 } 995 996 /* 997 * audio1575_map_regs() 998 * 999 * Description: 1000 * The registers are mapped in. 1001 * 1002 * Arguments: 1003 * dev_info_t *dip Pointer to the device's devinfo 1004 * 1005 * Returns: 1006 * DDI_SUCCESS Registers successfully mapped 1007 * DDI_FAILURE Registers not successfully mapped 1008 */ 1009 static int 1010 audio1575_map_regs(audio1575_state_t *statep) 1011 { 1012 dev_info_t *dip = statep->dip; 1013 1014 /* map the M1575 Audio PCI Cfg Space */ 1015 if (pci_config_setup(dip, &statep->pcih) != DDI_SUCCESS) { 1016 audio_dev_warn(statep->adev, "PCI config map failure"); 1017 goto error; 1018 } 1019 1020 /* map the M1575 Audio registers in PCI IO Space */ 1021 if ((ddi_regs_map_setup(dip, M1575_AUDIO_IO_SPACE, &statep->regsp, 1022 0, 0, &dev_attr, &statep->regsh)) != DDI_SUCCESS) { 1023 audio_dev_warn(statep->adev, "Audio IO mapping failure"); 1024 goto error; 1025 } 1026 return (DDI_SUCCESS); 1027 1028 error: 1029 audio1575_unmap_regs(statep); 1030 1031 return (DDI_FAILURE); 1032 } 1033 1034 /* 1035 * audio1575_unmap_regs() 1036 * 1037 * Description: 1038 * This routine unmaps control registers. 1039 * 1040 * Arguments: 1041 * audio1575_state_t *state The device's state structure 1042 */ 1043 static void 1044 audio1575_unmap_regs(audio1575_state_t *statep) 1045 { 1046 if (statep->regsh) { 1047 ddi_regs_map_free(&statep->regsh); 1048 } 1049 1050 if (statep->pcih) { 1051 pci_config_teardown(&statep->pcih); 1052 } 1053 } 1054 1055 /* 1056 * audio1575_chip_init() 1057 * 1058 * Description: 1059 * This routine initializes the M1575 AC97 audio controller and the AC97 1060 * codec. The AC97 codec registers are programmed from codec_shadow[]. 1061 * If we are not doing a restore, we initialize codec_shadow[], otherwise 1062 * we use the current values of shadow. This routine expects that the 1063 * PCI IO and Memory spaces have been mapped and enabled already. 1064 * Arguments: 1065 * audio1575_state_t *state The device's state structure 1066 * restore from codec_shadow[] 1067 * Returns: 1068 * DDI_SUCCESS The hardware was initialized properly 1069 * DDI_FAILURE The hardware couldn't be initialized properly 1070 */ 1071 static int 1072 audio1575_chip_init(audio1575_state_t *statep) 1073 { 1074 uint32_t ssr; 1075 uint32_t rtsr; 1076 uint32_t intrsr; 1077 int i; 1078 int j; 1079 #ifdef __sparc 1080 uint8_t clk_detect; 1081 ddi_acc_handle_t pcih; 1082 #endif 1083 clock_t ticks; 1084 1085 /* 1086 * clear the interrupt control and status register 1087 * READ/WRITE/READ workaround required 1088 * for buggy hardware 1089 */ 1090 1091 PUT32(M1575_INTRCR_REG, 0); 1092 (void) GET32(M1575_INTRCR_REG); 1093 1094 intrsr = GET32(M1575_INTRSR_REG); 1095 PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK)); 1096 (void) GET32(M1575_INTRSR_REG); 1097 1098 ticks = drv_usectohz(M1575_LOOP_CTR); 1099 1100 /* 1101 * SADA only supports stereo, so we set the channel bits 1102 * to "00" to select 2 channels. 1103 * will also set the following: 1104 * 1105 * Disable double rate enable 1106 * no SPDIF output selected 1107 * 16 bit audio record mode 1108 * 16 bit pcm out mode 1109 * PCM Out 6 chan mode FL FR CEN BL BR LFE 1110 * PCM Out 2 channel mode (00) 1111 */ 1112 for (i = 0; i < M1575_LOOP_CTR; i++) { 1113 /* Reset the AC97 Codec and default to 2 channel 16 bit mode */ 1114 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST); 1115 delay(ticks<<1); 1116 1117 /* Read the System Status Reg */ 1118 ssr = GET32(M1575_SSR_REG); 1119 1120 /* make sure and release the blocked reset bit */ 1121 if (ssr & M1575_SSR_RSTBLK) { 1122 SET32(M1575_INTFCR_REG, M1575_INTFCR_RSTREL); 1123 delay(ticks); 1124 1125 /* Read the System Status Reg */ 1126 ssr = GET32(M1575_SSR_REG); 1127 1128 /* make sure and release the blocked reset bit */ 1129 if (ssr & M1575_SSR_RSTBLK) { 1130 return (DDI_FAILURE); 1131 } 1132 1133 /* Reset the controller */ 1134 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST); 1135 delay(ticks); 1136 } 1137 1138 /* according AC'97 spec, wait for codec reset */ 1139 for (j = 0; j < M1575_LOOP_CTR; j++) { 1140 if ((GET32(M1575_SCR_REG) & M1575_SCR_COLDRST) == 0) { 1141 break; 1142 } 1143 delay(ticks); 1144 } 1145 1146 /* codec reset failed */ 1147 if (j >= M1575_LOOP_CTR) { 1148 audio_dev_warn(statep->adev, 1149 "failure to reset codec"); 1150 return (DDI_FAILURE); 1151 } 1152 1153 /* 1154 * Wait for FACRDY First codec ready. The hardware can 1155 * provide the state of 1156 * codec ready bit on SDATA_IN[0] and as reflected in 1157 * the Recv Tag Slot Reg. 1158 */ 1159 rtsr = GET32(M1575_RTSR_REG); 1160 if (rtsr & M1575_RTSR_FACRDY) { 1161 break; 1162 } else { /* reset the status and wait for new status to set */ 1163 rtsr |= M1575_RTSR_FACRDY; 1164 PUT32(M1575_RTSR_REG, rtsr); 1165 drv_usecwait(10); 1166 } 1167 } 1168 1169 /* if we could not reset the AC97 codec then report failure */ 1170 if (i >= M1575_LOOP_CTR) { 1171 audio_dev_warn(statep->adev, 1172 "no codec ready signal received"); 1173 return (DDI_FAILURE); 1174 } 1175 1176 #ifdef __sparc 1177 /* Magic code from ULi to Turn on the AC_LINK clock */ 1178 pcih = statep->pcih; 1179 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1180 pci_config_put8(pcih, M1575_PCIACD_REG, 4); 1181 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1182 (void) pci_config_get8(pcih, M1575_PCIACD_REG); 1183 pci_config_put8(pcih, M1575_PCIACD_REG, 2); 1184 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1185 clk_detect = pci_config_get8(pcih, M1575_PCIACD_REG); 1186 1187 if (clk_detect != 1) { 1188 audio_dev_warn(statep->adev, "No AC97 Clock Detected"); 1189 return (DDI_FAILURE); 1190 } 1191 #endif 1192 1193 /* Magic code from Uli to Init FIFO1 and FIFO2 */ 1194 PUT32(M1575_FIFOCR1_REG, 0x81818181); 1195 PUT32(M1575_FIFOCR2_REG, 0x81818181); 1196 PUT32(M1575_FIFOCR3_REG, 0x81818181); 1197 1198 /* Make sure that PCM in and PCM out are enabled */ 1199 SET32(M1575_INTFCR_REG, (M1575_INTFCR_PCMIENB | M1575_INTFCR_PCMOENB)); 1200 1201 audio1575_dma_stop(statep, B_FALSE); 1202 1203 return (DDI_SUCCESS); 1204 } 1205 1206 /* 1207 * audio1575_dma_stop() 1208 * 1209 * Description: 1210 * This routine is used to put each DMA engine into the quiet state. 1211 * 1212 * Arguments: 1213 * audio1575_state_t *statep The device's state structure 1214 */ 1215 static void 1216 audio1575_dma_stop(audio1575_state_t *statep, boolean_t quiesce) 1217 { 1218 uint32_t intrsr; 1219 int i; 1220 1221 if (statep->regsh == NULL) { 1222 return; 1223 } 1224 1225 /* pause bus master (needed for the following reset register) */ 1226 for (i = 0; i < M1575_LOOP_CTR; i++) { 1227 1228 SET32(M1575_DMACR_REG, M1575_DMACR_PAUSE_ALL); 1229 if (GET32(M1575_DMACR_REG) & M1575_DMACR_PAUSE_ALL) { 1230 break; 1231 } 1232 drv_usecwait(10); 1233 } 1234 1235 if (i >= M1575_LOOP_CTR) { 1236 if (!quiesce) 1237 audio_dev_warn(statep->adev, "failed to stop DMA"); 1238 return; 1239 } 1240 1241 /* Pause bus master (needed for the following reset register) */ 1242 PUT8(M1575_PCMICR_REG, 0); 1243 PUT8(M1575_PCMOCR_REG, 0); 1244 PUT8(M1575_MICICR_REG, 0); 1245 PUT8(M1575_CSPOCR_REG, 0); 1246 PUT8(M1575_PCMI2CR_RR, 0); 1247 PUT8(M1575_MICI2CR_RR, 0); 1248 1249 /* Reset the bus master registers for all DMA engines */ 1250 PUT8(M1575_PCMICR_REG, M1575_PCMICR_RR); 1251 PUT8(M1575_PCMOCR_REG, M1575_PCMOCR_RR); 1252 PUT8(M1575_MICICR_REG, M1575_MICICR_RR); 1253 PUT8(M1575_CSPOCR_REG, M1575_CSPOCR_RR); 1254 PUT8(M1575_PCMI2CR_REG, M1575_PCMI2CR_RR); 1255 PUT8(M1575_MICI2CR_REG, M1575_MICI2CR_RR); 1256 1257 /* Reset FIFOS */ 1258 PUT32(M1575_FIFOCR1_REG, 0x81818181); 1259 PUT32(M1575_FIFOCR2_REG, 0x81818181); 1260 PUT32(M1575_FIFOCR3_REG, 0x81818181); 1261 1262 /* Clear Interrupts */ 1263 SET16(M1575_PCMISR_REG, M1575_SR_CLR); 1264 SET16(M1575_PCMOSR_REG, M1575_SR_CLR); 1265 SET16(M1575_MICISR_REG, M1575_SR_CLR); 1266 SET16(M1575_CSPOSR_REG, M1575_SR_CLR); 1267 SET16(M1575_PCMI2SR_REG, M1575_SR_CLR); 1268 SET16(M1575_MICI2SR_REG, M1575_SR_CLR); 1269 1270 /* 1271 * clear the interrupt control and status register 1272 * READ/WRITE/READ workaround required to flush PCI caches 1273 */ 1274 1275 PUT32(M1575_INTRCR_REG, 0); 1276 (void) GET32(M1575_INTRCR_REG); 1277 1278 intrsr = GET32(M1575_INTRSR_REG); 1279 PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK)); 1280 (void) GET32(M1575_INTRSR_REG); 1281 } 1282 1283 /* 1284 * audio1575_codec_sync() 1285 * 1286 * Description: 1287 * Serialize access to the AC97 audio mixer registers. 1288 * 1289 * Arguments: 1290 * audio1575_state_t *state The device's state structure 1291 * 1292 * Returns: 1293 * DDI_SUCCESS Ready for an I/O access to the codec 1294 * DDI_FAILURE An I/O access is currently in progress, can't 1295 * perform another I/O access. 1296 */ 1297 static int 1298 audio1575_codec_sync(audio1575_state_t *statep) 1299 { 1300 /* do the Uli Shuffle ... */ 1301 for (int i = 0; i < M1575_LOOP_CTR; i++) { 1302 /* Read the semaphore, and loop till we own it */ 1303 if ((GET32(M1575_CASR_REG) & 1) == 0) { 1304 for (int j = 0; j < M1575_LOOP_CTR; j++) { 1305 /* Wait for CWRSUCC 0x8 */ 1306 if (GET32(M1575_CSPSR_REG) & 1307 M1575_CSPSR_SUCC) { 1308 return (DDI_SUCCESS); 1309 } 1310 drv_usecwait(1); 1311 } 1312 } 1313 drv_usecwait(10); 1314 } 1315 1316 return (DDI_FAILURE); 1317 } 1318 1319 /* 1320 * audio1575_write_ac97() 1321 * 1322 * Description: 1323 * Set the specific AC97 Codec register. 1324 * 1325 * Arguments: 1326 * void *arg The device's state structure 1327 * uint8_t reg AC97 register number 1328 * uint16_t data The data want to be set 1329 */ 1330 static void 1331 audio1575_write_ac97(void *arg, uint8_t reg, uint16_t data) 1332 { 1333 audio1575_state_t *statep = arg; 1334 int i; 1335 1336 if (audio1575_codec_sync(statep) != DDI_SUCCESS) { 1337 return; 1338 } 1339 1340 /* write the data to WRITE to the lo word of the CPR register */ 1341 PUT16(M1575_CPR_REG, data); 1342 1343 /* write the address to WRITE to the hi word of the CPR register */ 1344 PUT16(M1575_CPR_REG+2, reg); 1345 1346 /* wait until command is completed sucessfully */ 1347 for (i = 0; i < M1575_LOOP_CTR; i++) { 1348 /* Wait for Write Ready 0x01 */ 1349 if (GET32(M1575_CSPSR_REG) & M1575_CSPSR_WRRDY) { 1350 break; 1351 } 1352 drv_usecwait(1); 1353 } 1354 1355 if (i < M1575_LOOP_CTR) { 1356 (void) audio1575_read_ac97(statep, reg); 1357 } 1358 } 1359 1360 /* 1361 * audio1575_read_ac97() 1362 * 1363 * Description: 1364 * Get the specific AC97 Codec register. It also updates codec_shadow[] 1365 * with the register value. 1366 * 1367 * Arguments: 1368 * void *arg The device's state structure 1369 * uint8_t reg AC97 register number 1370 * 1371 * Returns: 1372 * Value of AC97 register. (0xffff in failure situations). 1373 */ 1374 static uint16_t 1375 audio1575_read_ac97(void *arg, uint8_t reg) 1376 { 1377 audio1575_state_t *statep = arg; 1378 uint16_t addr = 0; 1379 uint16_t data = 0xffff; 1380 int i; 1381 1382 if ((audio1575_codec_sync(statep)) != DDI_SUCCESS) { 1383 return (data); 1384 } 1385 1386 /* 1387 * at this point we have the CASR semaphore 1388 * and the codec is r/w ready 1389 * OR in the READ opcode into the address field 1390 */ 1391 1392 addr = (reg | M1575_CPR_READ); 1393 1394 /* write the address to READ to the hi word of the CPR register */ 1395 PUT16(M1575_CPR_REG+2, addr); 1396 1397 /* wait until command is completed sucessfully */ 1398 for (i = 0; i < M1575_LOOP_CTR; i++) { 1399 /* Wait for Read Ready 0x02 */ 1400 if (GET32(M1575_CSPSR_REG) & M1575_CSPSR_RDRDY) { 1401 break; 1402 } 1403 drv_usecwait(1); 1404 } 1405 1406 if (i < M1575_LOOP_CTR) { 1407 /* read back the data and address */ 1408 data = GET16(M1575_SPR_REG); 1409 addr = GET16(M1575_SPR_REG+2); 1410 if (addr != reg) { 1411 data = 0xffff; 1412 } 1413 } 1414 1415 return (data); 1416 } 1417 1418 /* 1419 * audio1575_pci_enable() 1420 * 1421 * Description: 1422 * This routine Enables all PCI IO and MEMORY accesses 1423 * 1424 * Arguments: 1425 * audio1575_state_t *statep The device's state structure 1426 */ 1427 static void 1428 audio1575_pci_enable(audio1575_state_t *statep) 1429 { 1430 uint16_t pcics_reg; 1431 1432 pcics_reg = pci_config_get16(statep->pcih, PCI_CONF_COMM); 1433 pcics_reg |= (PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME); 1434 pci_config_put16(statep->pcih, PCI_CONF_COMM, pcics_reg); 1435 } 1436 1437 /* 1438 * audio1575_pci_disable() 1439 * 1440 * Description: 1441 * This routine Disables all PCI IO and MEMORY accesses 1442 * 1443 * Arguments: 1444 * audio1575_state_t *statep The device's state structure 1445 */ 1446 static void 1447 audio1575_pci_disable(audio1575_state_t *statep) 1448 { 1449 uint16_t pcics_reg; 1450 1451 if (statep->pcih == NULL) 1452 return; 1453 pcics_reg = pci_config_get16(statep->pcih, PCI_CONF_COMM); 1454 pcics_reg &= ~(PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME); 1455 pci_config_put16(statep->pcih, PCI_CONF_COMM, pcics_reg); 1456 } 1457 1458 /* 1459 * audio1575_resume() 1460 * 1461 * Description: 1462 * Resume operation of the device after sleeping or hibernating. 1463 * Note that this should never fail, even if hardware goes wonky, 1464 * because the current PM framework will panic if it does. 1465 * 1466 * Arguments: 1467 * dev_info_t *dip Pointer to the device's dev_info struct 1468 * 1469 * Returns: 1470 * DDI_SUCCESS The driver was resumed 1471 */ 1472 static int 1473 audio1575_resume(dev_info_t *dip) 1474 { 1475 audio1575_state_t *statep; 1476 audio_dev_t *adev; 1477 1478 /* we've already allocated the state structure so get ptr */ 1479 statep = ddi_get_driver_private(dip); 1480 adev = statep->adev; 1481 ASSERT(!mutex_owned(&statep->lock)); 1482 1483 if (audio1575_chip_init(statep) != DDI_SUCCESS) { 1484 /* 1485 * Note that PM gurus say we should return 1486 * success here. Failure of audio shouldn't 1487 * be considered FATAL to the system. The 1488 * upshot is that audio will not progress. 1489 */ 1490 audio_dev_warn(adev, "DDI_RESUME failed to init chip"); 1491 return (DDI_SUCCESS); 1492 } 1493 1494 /* allow ac97 operations again */ 1495 ac97_reset(statep->ac97); 1496 1497 audio_dev_resume(adev); 1498 1499 return (DDI_SUCCESS); 1500 } 1501 1502 /* 1503 * audio1575_suspend() 1504 * 1505 * Description: 1506 * Suspend an instance of the audio1575 driver. 1507 * 1508 * Arguments: 1509 * dev_info_t *dip Pointer to the device's dev_info struct 1510 * 1511 * Returns: 1512 * DDI_SUCCESS The driver was suspended 1513 */ 1514 static int 1515 audio1575_suspend(dev_info_t *dip) 1516 { 1517 audio1575_state_t *statep; 1518 1519 statep = ddi_get_driver_private(dip); 1520 1521 audio_dev_suspend(statep->adev); 1522 1523 return (DDI_SUCCESS); 1524 } 1525 1526 /* 1527 * audio1575_destroy() 1528 * 1529 * Description: 1530 * This routine releases all resources held by the device instance, 1531 * as part of either detach or a failure in attach. 1532 * 1533 * Arguments: 1534 * audio1575_state_t *state The device soft state. 1535 */ 1536 void 1537 audio1575_destroy(audio1575_state_t *statep) 1538 { 1539 ddi_acc_handle_t pcih; 1540 1541 /* stop DMA engines */ 1542 audio1575_dma_stop(statep, B_FALSE); 1543 1544 if (statep->regsh != NULL) { 1545 /* reset the codec */ 1546 PUT32(M1575_SCR_REG, M1575_SCR_COLDRST); 1547 } 1548 1549 if ((pcih = statep->pcih) != NULL) { 1550 /* turn off the AC_LINK clock */ 1551 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1552 pci_config_put8(pcih, M1575_PCIACD_REG, 4); 1553 pci_config_put8(pcih, M1575_PCIACD_REG, 0); 1554 } 1555 1556 /* Disable PCI I/O and Memory Spaces */ 1557 audio1575_pci_disable(statep); 1558 1559 audio1575_free_port(statep->ports[M1575_PLAY]); 1560 audio1575_free_port(statep->ports[M1575_REC]); 1561 1562 audio1575_unmap_regs(statep); 1563 1564 if (statep->ac97 != NULL) { 1565 ac97_free(statep->ac97); 1566 } 1567 1568 if (statep->adev != NULL) { 1569 audio_dev_free(statep->adev); 1570 } 1571 1572 kmem_free(statep, sizeof (*statep)); 1573 } 1574